github.com/rakyll/go@v0.0.0-20170216000551-64c02460d703/src/cmd/compile/internal/ssa/rewriteS390X.go (about) 1 // autogenerated from gen/S390X.rules: do not edit! 2 // generated with: cd gen; go run *.go 3 4 package ssa 5 6 import "math" 7 8 var _ = math.MinInt8 // in case not otherwise used 9 func rewriteValueS390X(v *Value, config *Config) bool { 10 switch v.Op { 11 case OpAdd16: 12 return rewriteValueS390X_OpAdd16(v, config) 13 case OpAdd32: 14 return rewriteValueS390X_OpAdd32(v, config) 15 case OpAdd32F: 16 return rewriteValueS390X_OpAdd32F(v, config) 17 case OpAdd64: 18 return rewriteValueS390X_OpAdd64(v, config) 19 case OpAdd64F: 20 return rewriteValueS390X_OpAdd64F(v, config) 21 case OpAdd8: 22 return rewriteValueS390X_OpAdd8(v, config) 23 case OpAddPtr: 24 return rewriteValueS390X_OpAddPtr(v, config) 25 case OpAddr: 26 return rewriteValueS390X_OpAddr(v, config) 27 case OpAnd16: 28 return rewriteValueS390X_OpAnd16(v, config) 29 case OpAnd32: 30 return rewriteValueS390X_OpAnd32(v, config) 31 case OpAnd64: 32 return rewriteValueS390X_OpAnd64(v, config) 33 case OpAnd8: 34 return rewriteValueS390X_OpAnd8(v, config) 35 case OpAndB: 36 return rewriteValueS390X_OpAndB(v, config) 37 case OpAtomicAdd32: 38 return rewriteValueS390X_OpAtomicAdd32(v, config) 39 case OpAtomicAdd64: 40 return rewriteValueS390X_OpAtomicAdd64(v, config) 41 case OpAtomicCompareAndSwap32: 42 return rewriteValueS390X_OpAtomicCompareAndSwap32(v, config) 43 case OpAtomicCompareAndSwap64: 44 return rewriteValueS390X_OpAtomicCompareAndSwap64(v, config) 45 case OpAtomicExchange32: 46 return rewriteValueS390X_OpAtomicExchange32(v, config) 47 case OpAtomicExchange64: 48 return rewriteValueS390X_OpAtomicExchange64(v, config) 49 case OpAtomicLoad32: 50 return rewriteValueS390X_OpAtomicLoad32(v, config) 51 case OpAtomicLoad64: 52 return rewriteValueS390X_OpAtomicLoad64(v, config) 53 case OpAtomicLoadPtr: 54 return rewriteValueS390X_OpAtomicLoadPtr(v, config) 55 case OpAtomicStore32: 56 return rewriteValueS390X_OpAtomicStore32(v, config) 57 case OpAtomicStore64: 58 return rewriteValueS390X_OpAtomicStore64(v, config) 59 case OpAtomicStorePtrNoWB: 60 return rewriteValueS390X_OpAtomicStorePtrNoWB(v, config) 61 case OpAvg64u: 62 return rewriteValueS390X_OpAvg64u(v, config) 63 case OpBswap32: 64 return rewriteValueS390X_OpBswap32(v, config) 65 case OpBswap64: 66 return rewriteValueS390X_OpBswap64(v, config) 67 case OpClosureCall: 68 return rewriteValueS390X_OpClosureCall(v, config) 69 case OpCom16: 70 return rewriteValueS390X_OpCom16(v, config) 71 case OpCom32: 72 return rewriteValueS390X_OpCom32(v, config) 73 case OpCom64: 74 return rewriteValueS390X_OpCom64(v, config) 75 case OpCom8: 76 return rewriteValueS390X_OpCom8(v, config) 77 case OpConst16: 78 return rewriteValueS390X_OpConst16(v, config) 79 case OpConst32: 80 return rewriteValueS390X_OpConst32(v, config) 81 case OpConst32F: 82 return rewriteValueS390X_OpConst32F(v, config) 83 case OpConst64: 84 return rewriteValueS390X_OpConst64(v, config) 85 case OpConst64F: 86 return rewriteValueS390X_OpConst64F(v, config) 87 case OpConst8: 88 return rewriteValueS390X_OpConst8(v, config) 89 case OpConstBool: 90 return rewriteValueS390X_OpConstBool(v, config) 91 case OpConstNil: 92 return rewriteValueS390X_OpConstNil(v, config) 93 case OpConvert: 94 return rewriteValueS390X_OpConvert(v, config) 95 case OpCtz32: 96 return rewriteValueS390X_OpCtz32(v, config) 97 case OpCtz64: 98 return rewriteValueS390X_OpCtz64(v, config) 99 case OpCvt32Fto32: 100 return rewriteValueS390X_OpCvt32Fto32(v, config) 101 case OpCvt32Fto64: 102 return rewriteValueS390X_OpCvt32Fto64(v, config) 103 case OpCvt32Fto64F: 104 return rewriteValueS390X_OpCvt32Fto64F(v, config) 105 case OpCvt32to32F: 106 return rewriteValueS390X_OpCvt32to32F(v, config) 107 case OpCvt32to64F: 108 return rewriteValueS390X_OpCvt32to64F(v, config) 109 case OpCvt64Fto32: 110 return rewriteValueS390X_OpCvt64Fto32(v, config) 111 case OpCvt64Fto32F: 112 return rewriteValueS390X_OpCvt64Fto32F(v, config) 113 case OpCvt64Fto64: 114 return rewriteValueS390X_OpCvt64Fto64(v, config) 115 case OpCvt64to32F: 116 return rewriteValueS390X_OpCvt64to32F(v, config) 117 case OpCvt64to64F: 118 return rewriteValueS390X_OpCvt64to64F(v, config) 119 case OpDeferCall: 120 return rewriteValueS390X_OpDeferCall(v, config) 121 case OpDiv16: 122 return rewriteValueS390X_OpDiv16(v, config) 123 case OpDiv16u: 124 return rewriteValueS390X_OpDiv16u(v, config) 125 case OpDiv32: 126 return rewriteValueS390X_OpDiv32(v, config) 127 case OpDiv32F: 128 return rewriteValueS390X_OpDiv32F(v, config) 129 case OpDiv32u: 130 return rewriteValueS390X_OpDiv32u(v, config) 131 case OpDiv64: 132 return rewriteValueS390X_OpDiv64(v, config) 133 case OpDiv64F: 134 return rewriteValueS390X_OpDiv64F(v, config) 135 case OpDiv64u: 136 return rewriteValueS390X_OpDiv64u(v, config) 137 case OpDiv8: 138 return rewriteValueS390X_OpDiv8(v, config) 139 case OpDiv8u: 140 return rewriteValueS390X_OpDiv8u(v, config) 141 case OpEq16: 142 return rewriteValueS390X_OpEq16(v, config) 143 case OpEq32: 144 return rewriteValueS390X_OpEq32(v, config) 145 case OpEq32F: 146 return rewriteValueS390X_OpEq32F(v, config) 147 case OpEq64: 148 return rewriteValueS390X_OpEq64(v, config) 149 case OpEq64F: 150 return rewriteValueS390X_OpEq64F(v, config) 151 case OpEq8: 152 return rewriteValueS390X_OpEq8(v, config) 153 case OpEqB: 154 return rewriteValueS390X_OpEqB(v, config) 155 case OpEqPtr: 156 return rewriteValueS390X_OpEqPtr(v, config) 157 case OpGeq16: 158 return rewriteValueS390X_OpGeq16(v, config) 159 case OpGeq16U: 160 return rewriteValueS390X_OpGeq16U(v, config) 161 case OpGeq32: 162 return rewriteValueS390X_OpGeq32(v, config) 163 case OpGeq32F: 164 return rewriteValueS390X_OpGeq32F(v, config) 165 case OpGeq32U: 166 return rewriteValueS390X_OpGeq32U(v, config) 167 case OpGeq64: 168 return rewriteValueS390X_OpGeq64(v, config) 169 case OpGeq64F: 170 return rewriteValueS390X_OpGeq64F(v, config) 171 case OpGeq64U: 172 return rewriteValueS390X_OpGeq64U(v, config) 173 case OpGeq8: 174 return rewriteValueS390X_OpGeq8(v, config) 175 case OpGeq8U: 176 return rewriteValueS390X_OpGeq8U(v, config) 177 case OpGetClosurePtr: 178 return rewriteValueS390X_OpGetClosurePtr(v, config) 179 case OpGetG: 180 return rewriteValueS390X_OpGetG(v, config) 181 case OpGoCall: 182 return rewriteValueS390X_OpGoCall(v, config) 183 case OpGreater16: 184 return rewriteValueS390X_OpGreater16(v, config) 185 case OpGreater16U: 186 return rewriteValueS390X_OpGreater16U(v, config) 187 case OpGreater32: 188 return rewriteValueS390X_OpGreater32(v, config) 189 case OpGreater32F: 190 return rewriteValueS390X_OpGreater32F(v, config) 191 case OpGreater32U: 192 return rewriteValueS390X_OpGreater32U(v, config) 193 case OpGreater64: 194 return rewriteValueS390X_OpGreater64(v, config) 195 case OpGreater64F: 196 return rewriteValueS390X_OpGreater64F(v, config) 197 case OpGreater64U: 198 return rewriteValueS390X_OpGreater64U(v, config) 199 case OpGreater8: 200 return rewriteValueS390X_OpGreater8(v, config) 201 case OpGreater8U: 202 return rewriteValueS390X_OpGreater8U(v, config) 203 case OpHmul16: 204 return rewriteValueS390X_OpHmul16(v, config) 205 case OpHmul16u: 206 return rewriteValueS390X_OpHmul16u(v, config) 207 case OpHmul32: 208 return rewriteValueS390X_OpHmul32(v, config) 209 case OpHmul32u: 210 return rewriteValueS390X_OpHmul32u(v, config) 211 case OpHmul64: 212 return rewriteValueS390X_OpHmul64(v, config) 213 case OpHmul64u: 214 return rewriteValueS390X_OpHmul64u(v, config) 215 case OpHmul8: 216 return rewriteValueS390X_OpHmul8(v, config) 217 case OpHmul8u: 218 return rewriteValueS390X_OpHmul8u(v, config) 219 case OpITab: 220 return rewriteValueS390X_OpITab(v, config) 221 case OpInterCall: 222 return rewriteValueS390X_OpInterCall(v, config) 223 case OpIsInBounds: 224 return rewriteValueS390X_OpIsInBounds(v, config) 225 case OpIsNonNil: 226 return rewriteValueS390X_OpIsNonNil(v, config) 227 case OpIsSliceInBounds: 228 return rewriteValueS390X_OpIsSliceInBounds(v, config) 229 case OpLeq16: 230 return rewriteValueS390X_OpLeq16(v, config) 231 case OpLeq16U: 232 return rewriteValueS390X_OpLeq16U(v, config) 233 case OpLeq32: 234 return rewriteValueS390X_OpLeq32(v, config) 235 case OpLeq32F: 236 return rewriteValueS390X_OpLeq32F(v, config) 237 case OpLeq32U: 238 return rewriteValueS390X_OpLeq32U(v, config) 239 case OpLeq64: 240 return rewriteValueS390X_OpLeq64(v, config) 241 case OpLeq64F: 242 return rewriteValueS390X_OpLeq64F(v, config) 243 case OpLeq64U: 244 return rewriteValueS390X_OpLeq64U(v, config) 245 case OpLeq8: 246 return rewriteValueS390X_OpLeq8(v, config) 247 case OpLeq8U: 248 return rewriteValueS390X_OpLeq8U(v, config) 249 case OpLess16: 250 return rewriteValueS390X_OpLess16(v, config) 251 case OpLess16U: 252 return rewriteValueS390X_OpLess16U(v, config) 253 case OpLess32: 254 return rewriteValueS390X_OpLess32(v, config) 255 case OpLess32F: 256 return rewriteValueS390X_OpLess32F(v, config) 257 case OpLess32U: 258 return rewriteValueS390X_OpLess32U(v, config) 259 case OpLess64: 260 return rewriteValueS390X_OpLess64(v, config) 261 case OpLess64F: 262 return rewriteValueS390X_OpLess64F(v, config) 263 case OpLess64U: 264 return rewriteValueS390X_OpLess64U(v, config) 265 case OpLess8: 266 return rewriteValueS390X_OpLess8(v, config) 267 case OpLess8U: 268 return rewriteValueS390X_OpLess8U(v, config) 269 case OpLoad: 270 return rewriteValueS390X_OpLoad(v, config) 271 case OpLsh16x16: 272 return rewriteValueS390X_OpLsh16x16(v, config) 273 case OpLsh16x32: 274 return rewriteValueS390X_OpLsh16x32(v, config) 275 case OpLsh16x64: 276 return rewriteValueS390X_OpLsh16x64(v, config) 277 case OpLsh16x8: 278 return rewriteValueS390X_OpLsh16x8(v, config) 279 case OpLsh32x16: 280 return rewriteValueS390X_OpLsh32x16(v, config) 281 case OpLsh32x32: 282 return rewriteValueS390X_OpLsh32x32(v, config) 283 case OpLsh32x64: 284 return rewriteValueS390X_OpLsh32x64(v, config) 285 case OpLsh32x8: 286 return rewriteValueS390X_OpLsh32x8(v, config) 287 case OpLsh64x16: 288 return rewriteValueS390X_OpLsh64x16(v, config) 289 case OpLsh64x32: 290 return rewriteValueS390X_OpLsh64x32(v, config) 291 case OpLsh64x64: 292 return rewriteValueS390X_OpLsh64x64(v, config) 293 case OpLsh64x8: 294 return rewriteValueS390X_OpLsh64x8(v, config) 295 case OpLsh8x16: 296 return rewriteValueS390X_OpLsh8x16(v, config) 297 case OpLsh8x32: 298 return rewriteValueS390X_OpLsh8x32(v, config) 299 case OpLsh8x64: 300 return rewriteValueS390X_OpLsh8x64(v, config) 301 case OpLsh8x8: 302 return rewriteValueS390X_OpLsh8x8(v, config) 303 case OpMod16: 304 return rewriteValueS390X_OpMod16(v, config) 305 case OpMod16u: 306 return rewriteValueS390X_OpMod16u(v, config) 307 case OpMod32: 308 return rewriteValueS390X_OpMod32(v, config) 309 case OpMod32u: 310 return rewriteValueS390X_OpMod32u(v, config) 311 case OpMod64: 312 return rewriteValueS390X_OpMod64(v, config) 313 case OpMod64u: 314 return rewriteValueS390X_OpMod64u(v, config) 315 case OpMod8: 316 return rewriteValueS390X_OpMod8(v, config) 317 case OpMod8u: 318 return rewriteValueS390X_OpMod8u(v, config) 319 case OpMove: 320 return rewriteValueS390X_OpMove(v, config) 321 case OpMul16: 322 return rewriteValueS390X_OpMul16(v, config) 323 case OpMul32: 324 return rewriteValueS390X_OpMul32(v, config) 325 case OpMul32F: 326 return rewriteValueS390X_OpMul32F(v, config) 327 case OpMul64: 328 return rewriteValueS390X_OpMul64(v, config) 329 case OpMul64F: 330 return rewriteValueS390X_OpMul64F(v, config) 331 case OpMul8: 332 return rewriteValueS390X_OpMul8(v, config) 333 case OpNeg16: 334 return rewriteValueS390X_OpNeg16(v, config) 335 case OpNeg32: 336 return rewriteValueS390X_OpNeg32(v, config) 337 case OpNeg32F: 338 return rewriteValueS390X_OpNeg32F(v, config) 339 case OpNeg64: 340 return rewriteValueS390X_OpNeg64(v, config) 341 case OpNeg64F: 342 return rewriteValueS390X_OpNeg64F(v, config) 343 case OpNeg8: 344 return rewriteValueS390X_OpNeg8(v, config) 345 case OpNeq16: 346 return rewriteValueS390X_OpNeq16(v, config) 347 case OpNeq32: 348 return rewriteValueS390X_OpNeq32(v, config) 349 case OpNeq32F: 350 return rewriteValueS390X_OpNeq32F(v, config) 351 case OpNeq64: 352 return rewriteValueS390X_OpNeq64(v, config) 353 case OpNeq64F: 354 return rewriteValueS390X_OpNeq64F(v, config) 355 case OpNeq8: 356 return rewriteValueS390X_OpNeq8(v, config) 357 case OpNeqB: 358 return rewriteValueS390X_OpNeqB(v, config) 359 case OpNeqPtr: 360 return rewriteValueS390X_OpNeqPtr(v, config) 361 case OpNilCheck: 362 return rewriteValueS390X_OpNilCheck(v, config) 363 case OpNot: 364 return rewriteValueS390X_OpNot(v, config) 365 case OpOffPtr: 366 return rewriteValueS390X_OpOffPtr(v, config) 367 case OpOr16: 368 return rewriteValueS390X_OpOr16(v, config) 369 case OpOr32: 370 return rewriteValueS390X_OpOr32(v, config) 371 case OpOr64: 372 return rewriteValueS390X_OpOr64(v, config) 373 case OpOr8: 374 return rewriteValueS390X_OpOr8(v, config) 375 case OpOrB: 376 return rewriteValueS390X_OpOrB(v, config) 377 case OpRsh16Ux16: 378 return rewriteValueS390X_OpRsh16Ux16(v, config) 379 case OpRsh16Ux32: 380 return rewriteValueS390X_OpRsh16Ux32(v, config) 381 case OpRsh16Ux64: 382 return rewriteValueS390X_OpRsh16Ux64(v, config) 383 case OpRsh16Ux8: 384 return rewriteValueS390X_OpRsh16Ux8(v, config) 385 case OpRsh16x16: 386 return rewriteValueS390X_OpRsh16x16(v, config) 387 case OpRsh16x32: 388 return rewriteValueS390X_OpRsh16x32(v, config) 389 case OpRsh16x64: 390 return rewriteValueS390X_OpRsh16x64(v, config) 391 case OpRsh16x8: 392 return rewriteValueS390X_OpRsh16x8(v, config) 393 case OpRsh32Ux16: 394 return rewriteValueS390X_OpRsh32Ux16(v, config) 395 case OpRsh32Ux32: 396 return rewriteValueS390X_OpRsh32Ux32(v, config) 397 case OpRsh32Ux64: 398 return rewriteValueS390X_OpRsh32Ux64(v, config) 399 case OpRsh32Ux8: 400 return rewriteValueS390X_OpRsh32Ux8(v, config) 401 case OpRsh32x16: 402 return rewriteValueS390X_OpRsh32x16(v, config) 403 case OpRsh32x32: 404 return rewriteValueS390X_OpRsh32x32(v, config) 405 case OpRsh32x64: 406 return rewriteValueS390X_OpRsh32x64(v, config) 407 case OpRsh32x8: 408 return rewriteValueS390X_OpRsh32x8(v, config) 409 case OpRsh64Ux16: 410 return rewriteValueS390X_OpRsh64Ux16(v, config) 411 case OpRsh64Ux32: 412 return rewriteValueS390X_OpRsh64Ux32(v, config) 413 case OpRsh64Ux64: 414 return rewriteValueS390X_OpRsh64Ux64(v, config) 415 case OpRsh64Ux8: 416 return rewriteValueS390X_OpRsh64Ux8(v, config) 417 case OpRsh64x16: 418 return rewriteValueS390X_OpRsh64x16(v, config) 419 case OpRsh64x32: 420 return rewriteValueS390X_OpRsh64x32(v, config) 421 case OpRsh64x64: 422 return rewriteValueS390X_OpRsh64x64(v, config) 423 case OpRsh64x8: 424 return rewriteValueS390X_OpRsh64x8(v, config) 425 case OpRsh8Ux16: 426 return rewriteValueS390X_OpRsh8Ux16(v, config) 427 case OpRsh8Ux32: 428 return rewriteValueS390X_OpRsh8Ux32(v, config) 429 case OpRsh8Ux64: 430 return rewriteValueS390X_OpRsh8Ux64(v, config) 431 case OpRsh8Ux8: 432 return rewriteValueS390X_OpRsh8Ux8(v, config) 433 case OpRsh8x16: 434 return rewriteValueS390X_OpRsh8x16(v, config) 435 case OpRsh8x32: 436 return rewriteValueS390X_OpRsh8x32(v, config) 437 case OpRsh8x64: 438 return rewriteValueS390X_OpRsh8x64(v, config) 439 case OpRsh8x8: 440 return rewriteValueS390X_OpRsh8x8(v, config) 441 case OpS390XADD: 442 return rewriteValueS390X_OpS390XADD(v, config) 443 case OpS390XADDW: 444 return rewriteValueS390X_OpS390XADDW(v, config) 445 case OpS390XADDWconst: 446 return rewriteValueS390X_OpS390XADDWconst(v, config) 447 case OpS390XADDconst: 448 return rewriteValueS390X_OpS390XADDconst(v, config) 449 case OpS390XAND: 450 return rewriteValueS390X_OpS390XAND(v, config) 451 case OpS390XANDW: 452 return rewriteValueS390X_OpS390XANDW(v, config) 453 case OpS390XANDWconst: 454 return rewriteValueS390X_OpS390XANDWconst(v, config) 455 case OpS390XANDconst: 456 return rewriteValueS390X_OpS390XANDconst(v, config) 457 case OpS390XCMP: 458 return rewriteValueS390X_OpS390XCMP(v, config) 459 case OpS390XCMPU: 460 return rewriteValueS390X_OpS390XCMPU(v, config) 461 case OpS390XCMPUconst: 462 return rewriteValueS390X_OpS390XCMPUconst(v, config) 463 case OpS390XCMPW: 464 return rewriteValueS390X_OpS390XCMPW(v, config) 465 case OpS390XCMPWU: 466 return rewriteValueS390X_OpS390XCMPWU(v, config) 467 case OpS390XCMPWUconst: 468 return rewriteValueS390X_OpS390XCMPWUconst(v, config) 469 case OpS390XCMPWconst: 470 return rewriteValueS390X_OpS390XCMPWconst(v, config) 471 case OpS390XCMPconst: 472 return rewriteValueS390X_OpS390XCMPconst(v, config) 473 case OpS390XFMOVDload: 474 return rewriteValueS390X_OpS390XFMOVDload(v, config) 475 case OpS390XFMOVDloadidx: 476 return rewriteValueS390X_OpS390XFMOVDloadidx(v, config) 477 case OpS390XFMOVDstore: 478 return rewriteValueS390X_OpS390XFMOVDstore(v, config) 479 case OpS390XFMOVDstoreidx: 480 return rewriteValueS390X_OpS390XFMOVDstoreidx(v, config) 481 case OpS390XFMOVSload: 482 return rewriteValueS390X_OpS390XFMOVSload(v, config) 483 case OpS390XFMOVSloadidx: 484 return rewriteValueS390X_OpS390XFMOVSloadidx(v, config) 485 case OpS390XFMOVSstore: 486 return rewriteValueS390X_OpS390XFMOVSstore(v, config) 487 case OpS390XFMOVSstoreidx: 488 return rewriteValueS390X_OpS390XFMOVSstoreidx(v, config) 489 case OpS390XMOVBZload: 490 return rewriteValueS390X_OpS390XMOVBZload(v, config) 491 case OpS390XMOVBZloadidx: 492 return rewriteValueS390X_OpS390XMOVBZloadidx(v, config) 493 case OpS390XMOVBZreg: 494 return rewriteValueS390X_OpS390XMOVBZreg(v, config) 495 case OpS390XMOVBload: 496 return rewriteValueS390X_OpS390XMOVBload(v, config) 497 case OpS390XMOVBreg: 498 return rewriteValueS390X_OpS390XMOVBreg(v, config) 499 case OpS390XMOVBstore: 500 return rewriteValueS390X_OpS390XMOVBstore(v, config) 501 case OpS390XMOVBstoreconst: 502 return rewriteValueS390X_OpS390XMOVBstoreconst(v, config) 503 case OpS390XMOVBstoreidx: 504 return rewriteValueS390X_OpS390XMOVBstoreidx(v, config) 505 case OpS390XMOVDEQ: 506 return rewriteValueS390X_OpS390XMOVDEQ(v, config) 507 case OpS390XMOVDGE: 508 return rewriteValueS390X_OpS390XMOVDGE(v, config) 509 case OpS390XMOVDGT: 510 return rewriteValueS390X_OpS390XMOVDGT(v, config) 511 case OpS390XMOVDLE: 512 return rewriteValueS390X_OpS390XMOVDLE(v, config) 513 case OpS390XMOVDLT: 514 return rewriteValueS390X_OpS390XMOVDLT(v, config) 515 case OpS390XMOVDNE: 516 return rewriteValueS390X_OpS390XMOVDNE(v, config) 517 case OpS390XMOVDaddridx: 518 return rewriteValueS390X_OpS390XMOVDaddridx(v, config) 519 case OpS390XMOVDload: 520 return rewriteValueS390X_OpS390XMOVDload(v, config) 521 case OpS390XMOVDloadidx: 522 return rewriteValueS390X_OpS390XMOVDloadidx(v, config) 523 case OpS390XMOVDnop: 524 return rewriteValueS390X_OpS390XMOVDnop(v, config) 525 case OpS390XMOVDreg: 526 return rewriteValueS390X_OpS390XMOVDreg(v, config) 527 case OpS390XMOVDstore: 528 return rewriteValueS390X_OpS390XMOVDstore(v, config) 529 case OpS390XMOVDstoreconst: 530 return rewriteValueS390X_OpS390XMOVDstoreconst(v, config) 531 case OpS390XMOVDstoreidx: 532 return rewriteValueS390X_OpS390XMOVDstoreidx(v, config) 533 case OpS390XMOVHBRstore: 534 return rewriteValueS390X_OpS390XMOVHBRstore(v, config) 535 case OpS390XMOVHBRstoreidx: 536 return rewriteValueS390X_OpS390XMOVHBRstoreidx(v, config) 537 case OpS390XMOVHZload: 538 return rewriteValueS390X_OpS390XMOVHZload(v, config) 539 case OpS390XMOVHZloadidx: 540 return rewriteValueS390X_OpS390XMOVHZloadidx(v, config) 541 case OpS390XMOVHZreg: 542 return rewriteValueS390X_OpS390XMOVHZreg(v, config) 543 case OpS390XMOVHload: 544 return rewriteValueS390X_OpS390XMOVHload(v, config) 545 case OpS390XMOVHreg: 546 return rewriteValueS390X_OpS390XMOVHreg(v, config) 547 case OpS390XMOVHstore: 548 return rewriteValueS390X_OpS390XMOVHstore(v, config) 549 case OpS390XMOVHstoreconst: 550 return rewriteValueS390X_OpS390XMOVHstoreconst(v, config) 551 case OpS390XMOVHstoreidx: 552 return rewriteValueS390X_OpS390XMOVHstoreidx(v, config) 553 case OpS390XMOVWBRstore: 554 return rewriteValueS390X_OpS390XMOVWBRstore(v, config) 555 case OpS390XMOVWBRstoreidx: 556 return rewriteValueS390X_OpS390XMOVWBRstoreidx(v, config) 557 case OpS390XMOVWZload: 558 return rewriteValueS390X_OpS390XMOVWZload(v, config) 559 case OpS390XMOVWZloadidx: 560 return rewriteValueS390X_OpS390XMOVWZloadidx(v, config) 561 case OpS390XMOVWZreg: 562 return rewriteValueS390X_OpS390XMOVWZreg(v, config) 563 case OpS390XMOVWload: 564 return rewriteValueS390X_OpS390XMOVWload(v, config) 565 case OpS390XMOVWreg: 566 return rewriteValueS390X_OpS390XMOVWreg(v, config) 567 case OpS390XMOVWstore: 568 return rewriteValueS390X_OpS390XMOVWstore(v, config) 569 case OpS390XMOVWstoreconst: 570 return rewriteValueS390X_OpS390XMOVWstoreconst(v, config) 571 case OpS390XMOVWstoreidx: 572 return rewriteValueS390X_OpS390XMOVWstoreidx(v, config) 573 case OpS390XMULLD: 574 return rewriteValueS390X_OpS390XMULLD(v, config) 575 case OpS390XMULLDconst: 576 return rewriteValueS390X_OpS390XMULLDconst(v, config) 577 case OpS390XMULLW: 578 return rewriteValueS390X_OpS390XMULLW(v, config) 579 case OpS390XMULLWconst: 580 return rewriteValueS390X_OpS390XMULLWconst(v, config) 581 case OpS390XNEG: 582 return rewriteValueS390X_OpS390XNEG(v, config) 583 case OpS390XNEGW: 584 return rewriteValueS390X_OpS390XNEGW(v, config) 585 case OpS390XNOT: 586 return rewriteValueS390X_OpS390XNOT(v, config) 587 case OpS390XNOTW: 588 return rewriteValueS390X_OpS390XNOTW(v, config) 589 case OpS390XOR: 590 return rewriteValueS390X_OpS390XOR(v, config) 591 case OpS390XORW: 592 return rewriteValueS390X_OpS390XORW(v, config) 593 case OpS390XORWconst: 594 return rewriteValueS390X_OpS390XORWconst(v, config) 595 case OpS390XORconst: 596 return rewriteValueS390X_OpS390XORconst(v, config) 597 case OpS390XSLD: 598 return rewriteValueS390X_OpS390XSLD(v, config) 599 case OpS390XSLW: 600 return rewriteValueS390X_OpS390XSLW(v, config) 601 case OpS390XSRAD: 602 return rewriteValueS390X_OpS390XSRAD(v, config) 603 case OpS390XSRADconst: 604 return rewriteValueS390X_OpS390XSRADconst(v, config) 605 case OpS390XSRAW: 606 return rewriteValueS390X_OpS390XSRAW(v, config) 607 case OpS390XSRAWconst: 608 return rewriteValueS390X_OpS390XSRAWconst(v, config) 609 case OpS390XSRD: 610 return rewriteValueS390X_OpS390XSRD(v, config) 611 case OpS390XSRW: 612 return rewriteValueS390X_OpS390XSRW(v, config) 613 case OpS390XSTM2: 614 return rewriteValueS390X_OpS390XSTM2(v, config) 615 case OpS390XSTMG2: 616 return rewriteValueS390X_OpS390XSTMG2(v, config) 617 case OpS390XSUB: 618 return rewriteValueS390X_OpS390XSUB(v, config) 619 case OpS390XSUBEWcarrymask: 620 return rewriteValueS390X_OpS390XSUBEWcarrymask(v, config) 621 case OpS390XSUBEcarrymask: 622 return rewriteValueS390X_OpS390XSUBEcarrymask(v, config) 623 case OpS390XSUBW: 624 return rewriteValueS390X_OpS390XSUBW(v, config) 625 case OpS390XSUBWconst: 626 return rewriteValueS390X_OpS390XSUBWconst(v, config) 627 case OpS390XSUBconst: 628 return rewriteValueS390X_OpS390XSUBconst(v, config) 629 case OpS390XXOR: 630 return rewriteValueS390X_OpS390XXOR(v, config) 631 case OpS390XXORW: 632 return rewriteValueS390X_OpS390XXORW(v, config) 633 case OpS390XXORWconst: 634 return rewriteValueS390X_OpS390XXORWconst(v, config) 635 case OpS390XXORconst: 636 return rewriteValueS390X_OpS390XXORconst(v, config) 637 case OpSelect0: 638 return rewriteValueS390X_OpSelect0(v, config) 639 case OpSelect1: 640 return rewriteValueS390X_OpSelect1(v, config) 641 case OpSignExt16to32: 642 return rewriteValueS390X_OpSignExt16to32(v, config) 643 case OpSignExt16to64: 644 return rewriteValueS390X_OpSignExt16to64(v, config) 645 case OpSignExt32to64: 646 return rewriteValueS390X_OpSignExt32to64(v, config) 647 case OpSignExt8to16: 648 return rewriteValueS390X_OpSignExt8to16(v, config) 649 case OpSignExt8to32: 650 return rewriteValueS390X_OpSignExt8to32(v, config) 651 case OpSignExt8to64: 652 return rewriteValueS390X_OpSignExt8to64(v, config) 653 case OpSlicemask: 654 return rewriteValueS390X_OpSlicemask(v, config) 655 case OpSqrt: 656 return rewriteValueS390X_OpSqrt(v, config) 657 case OpStaticCall: 658 return rewriteValueS390X_OpStaticCall(v, config) 659 case OpStore: 660 return rewriteValueS390X_OpStore(v, config) 661 case OpSub16: 662 return rewriteValueS390X_OpSub16(v, config) 663 case OpSub32: 664 return rewriteValueS390X_OpSub32(v, config) 665 case OpSub32F: 666 return rewriteValueS390X_OpSub32F(v, config) 667 case OpSub64: 668 return rewriteValueS390X_OpSub64(v, config) 669 case OpSub64F: 670 return rewriteValueS390X_OpSub64F(v, config) 671 case OpSub8: 672 return rewriteValueS390X_OpSub8(v, config) 673 case OpSubPtr: 674 return rewriteValueS390X_OpSubPtr(v, config) 675 case OpTrunc16to8: 676 return rewriteValueS390X_OpTrunc16to8(v, config) 677 case OpTrunc32to16: 678 return rewriteValueS390X_OpTrunc32to16(v, config) 679 case OpTrunc32to8: 680 return rewriteValueS390X_OpTrunc32to8(v, config) 681 case OpTrunc64to16: 682 return rewriteValueS390X_OpTrunc64to16(v, config) 683 case OpTrunc64to32: 684 return rewriteValueS390X_OpTrunc64to32(v, config) 685 case OpTrunc64to8: 686 return rewriteValueS390X_OpTrunc64to8(v, config) 687 case OpXor16: 688 return rewriteValueS390X_OpXor16(v, config) 689 case OpXor32: 690 return rewriteValueS390X_OpXor32(v, config) 691 case OpXor64: 692 return rewriteValueS390X_OpXor64(v, config) 693 case OpXor8: 694 return rewriteValueS390X_OpXor8(v, config) 695 case OpZero: 696 return rewriteValueS390X_OpZero(v, config) 697 case OpZeroExt16to32: 698 return rewriteValueS390X_OpZeroExt16to32(v, config) 699 case OpZeroExt16to64: 700 return rewriteValueS390X_OpZeroExt16to64(v, config) 701 case OpZeroExt32to64: 702 return rewriteValueS390X_OpZeroExt32to64(v, config) 703 case OpZeroExt8to16: 704 return rewriteValueS390X_OpZeroExt8to16(v, config) 705 case OpZeroExt8to32: 706 return rewriteValueS390X_OpZeroExt8to32(v, config) 707 case OpZeroExt8to64: 708 return rewriteValueS390X_OpZeroExt8to64(v, config) 709 } 710 return false 711 } 712 func rewriteValueS390X_OpAdd16(v *Value, config *Config) bool { 713 b := v.Block 714 _ = b 715 // match: (Add16 x y) 716 // cond: 717 // result: (ADDW x y) 718 for { 719 x := v.Args[0] 720 y := v.Args[1] 721 v.reset(OpS390XADDW) 722 v.AddArg(x) 723 v.AddArg(y) 724 return true 725 } 726 } 727 func rewriteValueS390X_OpAdd32(v *Value, config *Config) bool { 728 b := v.Block 729 _ = b 730 // match: (Add32 x y) 731 // cond: 732 // result: (ADDW x y) 733 for { 734 x := v.Args[0] 735 y := v.Args[1] 736 v.reset(OpS390XADDW) 737 v.AddArg(x) 738 v.AddArg(y) 739 return true 740 } 741 } 742 func rewriteValueS390X_OpAdd32F(v *Value, config *Config) bool { 743 b := v.Block 744 _ = b 745 // match: (Add32F x y) 746 // cond: 747 // result: (FADDS x y) 748 for { 749 x := v.Args[0] 750 y := v.Args[1] 751 v.reset(OpS390XFADDS) 752 v.AddArg(x) 753 v.AddArg(y) 754 return true 755 } 756 } 757 func rewriteValueS390X_OpAdd64(v *Value, config *Config) bool { 758 b := v.Block 759 _ = b 760 // match: (Add64 x y) 761 // cond: 762 // result: (ADD x y) 763 for { 764 x := v.Args[0] 765 y := v.Args[1] 766 v.reset(OpS390XADD) 767 v.AddArg(x) 768 v.AddArg(y) 769 return true 770 } 771 } 772 func rewriteValueS390X_OpAdd64F(v *Value, config *Config) bool { 773 b := v.Block 774 _ = b 775 // match: (Add64F x y) 776 // cond: 777 // result: (FADD x y) 778 for { 779 x := v.Args[0] 780 y := v.Args[1] 781 v.reset(OpS390XFADD) 782 v.AddArg(x) 783 v.AddArg(y) 784 return true 785 } 786 } 787 func rewriteValueS390X_OpAdd8(v *Value, config *Config) bool { 788 b := v.Block 789 _ = b 790 // match: (Add8 x y) 791 // cond: 792 // result: (ADDW x y) 793 for { 794 x := v.Args[0] 795 y := v.Args[1] 796 v.reset(OpS390XADDW) 797 v.AddArg(x) 798 v.AddArg(y) 799 return true 800 } 801 } 802 func rewriteValueS390X_OpAddPtr(v *Value, config *Config) bool { 803 b := v.Block 804 _ = b 805 // match: (AddPtr x y) 806 // cond: 807 // result: (ADD x y) 808 for { 809 x := v.Args[0] 810 y := v.Args[1] 811 v.reset(OpS390XADD) 812 v.AddArg(x) 813 v.AddArg(y) 814 return true 815 } 816 } 817 func rewriteValueS390X_OpAddr(v *Value, config *Config) bool { 818 b := v.Block 819 _ = b 820 // match: (Addr {sym} base) 821 // cond: 822 // result: (MOVDaddr {sym} base) 823 for { 824 sym := v.Aux 825 base := v.Args[0] 826 v.reset(OpS390XMOVDaddr) 827 v.Aux = sym 828 v.AddArg(base) 829 return true 830 } 831 } 832 func rewriteValueS390X_OpAnd16(v *Value, config *Config) bool { 833 b := v.Block 834 _ = b 835 // match: (And16 x y) 836 // cond: 837 // result: (ANDW x y) 838 for { 839 x := v.Args[0] 840 y := v.Args[1] 841 v.reset(OpS390XANDW) 842 v.AddArg(x) 843 v.AddArg(y) 844 return true 845 } 846 } 847 func rewriteValueS390X_OpAnd32(v *Value, config *Config) bool { 848 b := v.Block 849 _ = b 850 // match: (And32 x y) 851 // cond: 852 // result: (ANDW x y) 853 for { 854 x := v.Args[0] 855 y := v.Args[1] 856 v.reset(OpS390XANDW) 857 v.AddArg(x) 858 v.AddArg(y) 859 return true 860 } 861 } 862 func rewriteValueS390X_OpAnd64(v *Value, config *Config) bool { 863 b := v.Block 864 _ = b 865 // match: (And64 x y) 866 // cond: 867 // result: (AND x y) 868 for { 869 x := v.Args[0] 870 y := v.Args[1] 871 v.reset(OpS390XAND) 872 v.AddArg(x) 873 v.AddArg(y) 874 return true 875 } 876 } 877 func rewriteValueS390X_OpAnd8(v *Value, config *Config) bool { 878 b := v.Block 879 _ = b 880 // match: (And8 x y) 881 // cond: 882 // result: (ANDW x y) 883 for { 884 x := v.Args[0] 885 y := v.Args[1] 886 v.reset(OpS390XANDW) 887 v.AddArg(x) 888 v.AddArg(y) 889 return true 890 } 891 } 892 func rewriteValueS390X_OpAndB(v *Value, config *Config) bool { 893 b := v.Block 894 _ = b 895 // match: (AndB x y) 896 // cond: 897 // result: (ANDW x y) 898 for { 899 x := v.Args[0] 900 y := v.Args[1] 901 v.reset(OpS390XANDW) 902 v.AddArg(x) 903 v.AddArg(y) 904 return true 905 } 906 } 907 func rewriteValueS390X_OpAtomicAdd32(v *Value, config *Config) bool { 908 b := v.Block 909 _ = b 910 // match: (AtomicAdd32 ptr val mem) 911 // cond: 912 // result: (AddTupleFirst32 (LAA ptr val mem) val) 913 for { 914 ptr := v.Args[0] 915 val := v.Args[1] 916 mem := v.Args[2] 917 v.reset(OpS390XAddTupleFirst32) 918 v0 := b.NewValue0(v.Pos, OpS390XLAA, MakeTuple(config.fe.TypeUInt32(), TypeMem)) 919 v0.AddArg(ptr) 920 v0.AddArg(val) 921 v0.AddArg(mem) 922 v.AddArg(v0) 923 v.AddArg(val) 924 return true 925 } 926 } 927 func rewriteValueS390X_OpAtomicAdd64(v *Value, config *Config) bool { 928 b := v.Block 929 _ = b 930 // match: (AtomicAdd64 ptr val mem) 931 // cond: 932 // result: (AddTupleFirst64 (LAAG ptr val mem) val) 933 for { 934 ptr := v.Args[0] 935 val := v.Args[1] 936 mem := v.Args[2] 937 v.reset(OpS390XAddTupleFirst64) 938 v0 := b.NewValue0(v.Pos, OpS390XLAAG, MakeTuple(config.fe.TypeUInt64(), TypeMem)) 939 v0.AddArg(ptr) 940 v0.AddArg(val) 941 v0.AddArg(mem) 942 v.AddArg(v0) 943 v.AddArg(val) 944 return true 945 } 946 } 947 func rewriteValueS390X_OpAtomicCompareAndSwap32(v *Value, config *Config) bool { 948 b := v.Block 949 _ = b 950 // match: (AtomicCompareAndSwap32 ptr old new_ mem) 951 // cond: 952 // result: (LoweredAtomicCas32 ptr old new_ mem) 953 for { 954 ptr := v.Args[0] 955 old := v.Args[1] 956 new_ := v.Args[2] 957 mem := v.Args[3] 958 v.reset(OpS390XLoweredAtomicCas32) 959 v.AddArg(ptr) 960 v.AddArg(old) 961 v.AddArg(new_) 962 v.AddArg(mem) 963 return true 964 } 965 } 966 func rewriteValueS390X_OpAtomicCompareAndSwap64(v *Value, config *Config) bool { 967 b := v.Block 968 _ = b 969 // match: (AtomicCompareAndSwap64 ptr old new_ mem) 970 // cond: 971 // result: (LoweredAtomicCas64 ptr old new_ mem) 972 for { 973 ptr := v.Args[0] 974 old := v.Args[1] 975 new_ := v.Args[2] 976 mem := v.Args[3] 977 v.reset(OpS390XLoweredAtomicCas64) 978 v.AddArg(ptr) 979 v.AddArg(old) 980 v.AddArg(new_) 981 v.AddArg(mem) 982 return true 983 } 984 } 985 func rewriteValueS390X_OpAtomicExchange32(v *Value, config *Config) bool { 986 b := v.Block 987 _ = b 988 // match: (AtomicExchange32 ptr val mem) 989 // cond: 990 // result: (LoweredAtomicExchange32 ptr val mem) 991 for { 992 ptr := v.Args[0] 993 val := v.Args[1] 994 mem := v.Args[2] 995 v.reset(OpS390XLoweredAtomicExchange32) 996 v.AddArg(ptr) 997 v.AddArg(val) 998 v.AddArg(mem) 999 return true 1000 } 1001 } 1002 func rewriteValueS390X_OpAtomicExchange64(v *Value, config *Config) bool { 1003 b := v.Block 1004 _ = b 1005 // match: (AtomicExchange64 ptr val mem) 1006 // cond: 1007 // result: (LoweredAtomicExchange64 ptr val mem) 1008 for { 1009 ptr := v.Args[0] 1010 val := v.Args[1] 1011 mem := v.Args[2] 1012 v.reset(OpS390XLoweredAtomicExchange64) 1013 v.AddArg(ptr) 1014 v.AddArg(val) 1015 v.AddArg(mem) 1016 return true 1017 } 1018 } 1019 func rewriteValueS390X_OpAtomicLoad32(v *Value, config *Config) bool { 1020 b := v.Block 1021 _ = b 1022 // match: (AtomicLoad32 ptr mem) 1023 // cond: 1024 // result: (MOVWZatomicload ptr mem) 1025 for { 1026 ptr := v.Args[0] 1027 mem := v.Args[1] 1028 v.reset(OpS390XMOVWZatomicload) 1029 v.AddArg(ptr) 1030 v.AddArg(mem) 1031 return true 1032 } 1033 } 1034 func rewriteValueS390X_OpAtomicLoad64(v *Value, config *Config) bool { 1035 b := v.Block 1036 _ = b 1037 // match: (AtomicLoad64 ptr mem) 1038 // cond: 1039 // result: (MOVDatomicload ptr mem) 1040 for { 1041 ptr := v.Args[0] 1042 mem := v.Args[1] 1043 v.reset(OpS390XMOVDatomicload) 1044 v.AddArg(ptr) 1045 v.AddArg(mem) 1046 return true 1047 } 1048 } 1049 func rewriteValueS390X_OpAtomicLoadPtr(v *Value, config *Config) bool { 1050 b := v.Block 1051 _ = b 1052 // match: (AtomicLoadPtr ptr mem) 1053 // cond: 1054 // result: (MOVDatomicload ptr mem) 1055 for { 1056 ptr := v.Args[0] 1057 mem := v.Args[1] 1058 v.reset(OpS390XMOVDatomicload) 1059 v.AddArg(ptr) 1060 v.AddArg(mem) 1061 return true 1062 } 1063 } 1064 func rewriteValueS390X_OpAtomicStore32(v *Value, config *Config) bool { 1065 b := v.Block 1066 _ = b 1067 // match: (AtomicStore32 ptr val mem) 1068 // cond: 1069 // result: (MOVWatomicstore ptr val mem) 1070 for { 1071 ptr := v.Args[0] 1072 val := v.Args[1] 1073 mem := v.Args[2] 1074 v.reset(OpS390XMOVWatomicstore) 1075 v.AddArg(ptr) 1076 v.AddArg(val) 1077 v.AddArg(mem) 1078 return true 1079 } 1080 } 1081 func rewriteValueS390X_OpAtomicStore64(v *Value, config *Config) bool { 1082 b := v.Block 1083 _ = b 1084 // match: (AtomicStore64 ptr val mem) 1085 // cond: 1086 // result: (MOVDatomicstore ptr val mem) 1087 for { 1088 ptr := v.Args[0] 1089 val := v.Args[1] 1090 mem := v.Args[2] 1091 v.reset(OpS390XMOVDatomicstore) 1092 v.AddArg(ptr) 1093 v.AddArg(val) 1094 v.AddArg(mem) 1095 return true 1096 } 1097 } 1098 func rewriteValueS390X_OpAtomicStorePtrNoWB(v *Value, config *Config) bool { 1099 b := v.Block 1100 _ = b 1101 // match: (AtomicStorePtrNoWB ptr val mem) 1102 // cond: 1103 // result: (MOVDatomicstore ptr val mem) 1104 for { 1105 ptr := v.Args[0] 1106 val := v.Args[1] 1107 mem := v.Args[2] 1108 v.reset(OpS390XMOVDatomicstore) 1109 v.AddArg(ptr) 1110 v.AddArg(val) 1111 v.AddArg(mem) 1112 return true 1113 } 1114 } 1115 func rewriteValueS390X_OpAvg64u(v *Value, config *Config) bool { 1116 b := v.Block 1117 _ = b 1118 // match: (Avg64u <t> x y) 1119 // cond: 1120 // result: (ADD (ADD <t> (SRDconst <t> x [1]) (SRDconst <t> y [1])) (ANDconst <t> (AND <t> x y) [1])) 1121 for { 1122 t := v.Type 1123 x := v.Args[0] 1124 y := v.Args[1] 1125 v.reset(OpS390XADD) 1126 v0 := b.NewValue0(v.Pos, OpS390XADD, t) 1127 v1 := b.NewValue0(v.Pos, OpS390XSRDconst, t) 1128 v1.AuxInt = 1 1129 v1.AddArg(x) 1130 v0.AddArg(v1) 1131 v2 := b.NewValue0(v.Pos, OpS390XSRDconst, t) 1132 v2.AuxInt = 1 1133 v2.AddArg(y) 1134 v0.AddArg(v2) 1135 v.AddArg(v0) 1136 v3 := b.NewValue0(v.Pos, OpS390XANDconst, t) 1137 v3.AuxInt = 1 1138 v4 := b.NewValue0(v.Pos, OpS390XAND, t) 1139 v4.AddArg(x) 1140 v4.AddArg(y) 1141 v3.AddArg(v4) 1142 v.AddArg(v3) 1143 return true 1144 } 1145 } 1146 func rewriteValueS390X_OpBswap32(v *Value, config *Config) bool { 1147 b := v.Block 1148 _ = b 1149 // match: (Bswap32 x) 1150 // cond: 1151 // result: (MOVWBR x) 1152 for { 1153 x := v.Args[0] 1154 v.reset(OpS390XMOVWBR) 1155 v.AddArg(x) 1156 return true 1157 } 1158 } 1159 func rewriteValueS390X_OpBswap64(v *Value, config *Config) bool { 1160 b := v.Block 1161 _ = b 1162 // match: (Bswap64 x) 1163 // cond: 1164 // result: (MOVDBR x) 1165 for { 1166 x := v.Args[0] 1167 v.reset(OpS390XMOVDBR) 1168 v.AddArg(x) 1169 return true 1170 } 1171 } 1172 func rewriteValueS390X_OpClosureCall(v *Value, config *Config) bool { 1173 b := v.Block 1174 _ = b 1175 // match: (ClosureCall [argwid] entry closure mem) 1176 // cond: 1177 // result: (CALLclosure [argwid] entry closure mem) 1178 for { 1179 argwid := v.AuxInt 1180 entry := v.Args[0] 1181 closure := v.Args[1] 1182 mem := v.Args[2] 1183 v.reset(OpS390XCALLclosure) 1184 v.AuxInt = argwid 1185 v.AddArg(entry) 1186 v.AddArg(closure) 1187 v.AddArg(mem) 1188 return true 1189 } 1190 } 1191 func rewriteValueS390X_OpCom16(v *Value, config *Config) bool { 1192 b := v.Block 1193 _ = b 1194 // match: (Com16 x) 1195 // cond: 1196 // result: (NOTW x) 1197 for { 1198 x := v.Args[0] 1199 v.reset(OpS390XNOTW) 1200 v.AddArg(x) 1201 return true 1202 } 1203 } 1204 func rewriteValueS390X_OpCom32(v *Value, config *Config) bool { 1205 b := v.Block 1206 _ = b 1207 // match: (Com32 x) 1208 // cond: 1209 // result: (NOTW x) 1210 for { 1211 x := v.Args[0] 1212 v.reset(OpS390XNOTW) 1213 v.AddArg(x) 1214 return true 1215 } 1216 } 1217 func rewriteValueS390X_OpCom64(v *Value, config *Config) bool { 1218 b := v.Block 1219 _ = b 1220 // match: (Com64 x) 1221 // cond: 1222 // result: (NOT x) 1223 for { 1224 x := v.Args[0] 1225 v.reset(OpS390XNOT) 1226 v.AddArg(x) 1227 return true 1228 } 1229 } 1230 func rewriteValueS390X_OpCom8(v *Value, config *Config) bool { 1231 b := v.Block 1232 _ = b 1233 // match: (Com8 x) 1234 // cond: 1235 // result: (NOTW x) 1236 for { 1237 x := v.Args[0] 1238 v.reset(OpS390XNOTW) 1239 v.AddArg(x) 1240 return true 1241 } 1242 } 1243 func rewriteValueS390X_OpConst16(v *Value, config *Config) bool { 1244 b := v.Block 1245 _ = b 1246 // match: (Const16 [val]) 1247 // cond: 1248 // result: (MOVDconst [val]) 1249 for { 1250 val := v.AuxInt 1251 v.reset(OpS390XMOVDconst) 1252 v.AuxInt = val 1253 return true 1254 } 1255 } 1256 func rewriteValueS390X_OpConst32(v *Value, config *Config) bool { 1257 b := v.Block 1258 _ = b 1259 // match: (Const32 [val]) 1260 // cond: 1261 // result: (MOVDconst [val]) 1262 for { 1263 val := v.AuxInt 1264 v.reset(OpS390XMOVDconst) 1265 v.AuxInt = val 1266 return true 1267 } 1268 } 1269 func rewriteValueS390X_OpConst32F(v *Value, config *Config) bool { 1270 b := v.Block 1271 _ = b 1272 // match: (Const32F [val]) 1273 // cond: 1274 // result: (FMOVSconst [val]) 1275 for { 1276 val := v.AuxInt 1277 v.reset(OpS390XFMOVSconst) 1278 v.AuxInt = val 1279 return true 1280 } 1281 } 1282 func rewriteValueS390X_OpConst64(v *Value, config *Config) bool { 1283 b := v.Block 1284 _ = b 1285 // match: (Const64 [val]) 1286 // cond: 1287 // result: (MOVDconst [val]) 1288 for { 1289 val := v.AuxInt 1290 v.reset(OpS390XMOVDconst) 1291 v.AuxInt = val 1292 return true 1293 } 1294 } 1295 func rewriteValueS390X_OpConst64F(v *Value, config *Config) bool { 1296 b := v.Block 1297 _ = b 1298 // match: (Const64F [val]) 1299 // cond: 1300 // result: (FMOVDconst [val]) 1301 for { 1302 val := v.AuxInt 1303 v.reset(OpS390XFMOVDconst) 1304 v.AuxInt = val 1305 return true 1306 } 1307 } 1308 func rewriteValueS390X_OpConst8(v *Value, config *Config) bool { 1309 b := v.Block 1310 _ = b 1311 // match: (Const8 [val]) 1312 // cond: 1313 // result: (MOVDconst [val]) 1314 for { 1315 val := v.AuxInt 1316 v.reset(OpS390XMOVDconst) 1317 v.AuxInt = val 1318 return true 1319 } 1320 } 1321 func rewriteValueS390X_OpConstBool(v *Value, config *Config) bool { 1322 b := v.Block 1323 _ = b 1324 // match: (ConstBool [b]) 1325 // cond: 1326 // result: (MOVDconst [b]) 1327 for { 1328 b := v.AuxInt 1329 v.reset(OpS390XMOVDconst) 1330 v.AuxInt = b 1331 return true 1332 } 1333 } 1334 func rewriteValueS390X_OpConstNil(v *Value, config *Config) bool { 1335 b := v.Block 1336 _ = b 1337 // match: (ConstNil) 1338 // cond: 1339 // result: (MOVDconst [0]) 1340 for { 1341 v.reset(OpS390XMOVDconst) 1342 v.AuxInt = 0 1343 return true 1344 } 1345 } 1346 func rewriteValueS390X_OpConvert(v *Value, config *Config) bool { 1347 b := v.Block 1348 _ = b 1349 // match: (Convert <t> x mem) 1350 // cond: 1351 // result: (MOVDconvert <t> x mem) 1352 for { 1353 t := v.Type 1354 x := v.Args[0] 1355 mem := v.Args[1] 1356 v.reset(OpS390XMOVDconvert) 1357 v.Type = t 1358 v.AddArg(x) 1359 v.AddArg(mem) 1360 return true 1361 } 1362 } 1363 func rewriteValueS390X_OpCtz32(v *Value, config *Config) bool { 1364 b := v.Block 1365 _ = b 1366 // match: (Ctz32 <t> x) 1367 // cond: 1368 // result: (SUB (MOVDconst [64]) (FLOGR (MOVWZreg (ANDW <t> (SUBWconst <t> [1] x) (NOTW <t> x))))) 1369 for { 1370 t := v.Type 1371 x := v.Args[0] 1372 v.reset(OpS390XSUB) 1373 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1374 v0.AuxInt = 64 1375 v.AddArg(v0) 1376 v1 := b.NewValue0(v.Pos, OpS390XFLOGR, config.fe.TypeUInt64()) 1377 v2 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1378 v3 := b.NewValue0(v.Pos, OpS390XANDW, t) 1379 v4 := b.NewValue0(v.Pos, OpS390XSUBWconst, t) 1380 v4.AuxInt = 1 1381 v4.AddArg(x) 1382 v3.AddArg(v4) 1383 v5 := b.NewValue0(v.Pos, OpS390XNOTW, t) 1384 v5.AddArg(x) 1385 v3.AddArg(v5) 1386 v2.AddArg(v3) 1387 v1.AddArg(v2) 1388 v.AddArg(v1) 1389 return true 1390 } 1391 } 1392 func rewriteValueS390X_OpCtz64(v *Value, config *Config) bool { 1393 b := v.Block 1394 _ = b 1395 // match: (Ctz64 <t> x) 1396 // cond: 1397 // result: (SUB (MOVDconst [64]) (FLOGR (AND <t> (SUBconst <t> [1] x) (NOT <t> x)))) 1398 for { 1399 t := v.Type 1400 x := v.Args[0] 1401 v.reset(OpS390XSUB) 1402 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1403 v0.AuxInt = 64 1404 v.AddArg(v0) 1405 v1 := b.NewValue0(v.Pos, OpS390XFLOGR, config.fe.TypeUInt64()) 1406 v2 := b.NewValue0(v.Pos, OpS390XAND, t) 1407 v3 := b.NewValue0(v.Pos, OpS390XSUBconst, t) 1408 v3.AuxInt = 1 1409 v3.AddArg(x) 1410 v2.AddArg(v3) 1411 v4 := b.NewValue0(v.Pos, OpS390XNOT, t) 1412 v4.AddArg(x) 1413 v2.AddArg(v4) 1414 v1.AddArg(v2) 1415 v.AddArg(v1) 1416 return true 1417 } 1418 } 1419 func rewriteValueS390X_OpCvt32Fto32(v *Value, config *Config) bool { 1420 b := v.Block 1421 _ = b 1422 // match: (Cvt32Fto32 x) 1423 // cond: 1424 // result: (CFEBRA x) 1425 for { 1426 x := v.Args[0] 1427 v.reset(OpS390XCFEBRA) 1428 v.AddArg(x) 1429 return true 1430 } 1431 } 1432 func rewriteValueS390X_OpCvt32Fto64(v *Value, config *Config) bool { 1433 b := v.Block 1434 _ = b 1435 // match: (Cvt32Fto64 x) 1436 // cond: 1437 // result: (CGEBRA x) 1438 for { 1439 x := v.Args[0] 1440 v.reset(OpS390XCGEBRA) 1441 v.AddArg(x) 1442 return true 1443 } 1444 } 1445 func rewriteValueS390X_OpCvt32Fto64F(v *Value, config *Config) bool { 1446 b := v.Block 1447 _ = b 1448 // match: (Cvt32Fto64F x) 1449 // cond: 1450 // result: (LDEBR x) 1451 for { 1452 x := v.Args[0] 1453 v.reset(OpS390XLDEBR) 1454 v.AddArg(x) 1455 return true 1456 } 1457 } 1458 func rewriteValueS390X_OpCvt32to32F(v *Value, config *Config) bool { 1459 b := v.Block 1460 _ = b 1461 // match: (Cvt32to32F x) 1462 // cond: 1463 // result: (CEFBRA x) 1464 for { 1465 x := v.Args[0] 1466 v.reset(OpS390XCEFBRA) 1467 v.AddArg(x) 1468 return true 1469 } 1470 } 1471 func rewriteValueS390X_OpCvt32to64F(v *Value, config *Config) bool { 1472 b := v.Block 1473 _ = b 1474 // match: (Cvt32to64F x) 1475 // cond: 1476 // result: (CDFBRA x) 1477 for { 1478 x := v.Args[0] 1479 v.reset(OpS390XCDFBRA) 1480 v.AddArg(x) 1481 return true 1482 } 1483 } 1484 func rewriteValueS390X_OpCvt64Fto32(v *Value, config *Config) bool { 1485 b := v.Block 1486 _ = b 1487 // match: (Cvt64Fto32 x) 1488 // cond: 1489 // result: (CFDBRA x) 1490 for { 1491 x := v.Args[0] 1492 v.reset(OpS390XCFDBRA) 1493 v.AddArg(x) 1494 return true 1495 } 1496 } 1497 func rewriteValueS390X_OpCvt64Fto32F(v *Value, config *Config) bool { 1498 b := v.Block 1499 _ = b 1500 // match: (Cvt64Fto32F x) 1501 // cond: 1502 // result: (LEDBR x) 1503 for { 1504 x := v.Args[0] 1505 v.reset(OpS390XLEDBR) 1506 v.AddArg(x) 1507 return true 1508 } 1509 } 1510 func rewriteValueS390X_OpCvt64Fto64(v *Value, config *Config) bool { 1511 b := v.Block 1512 _ = b 1513 // match: (Cvt64Fto64 x) 1514 // cond: 1515 // result: (CGDBRA x) 1516 for { 1517 x := v.Args[0] 1518 v.reset(OpS390XCGDBRA) 1519 v.AddArg(x) 1520 return true 1521 } 1522 } 1523 func rewriteValueS390X_OpCvt64to32F(v *Value, config *Config) bool { 1524 b := v.Block 1525 _ = b 1526 // match: (Cvt64to32F x) 1527 // cond: 1528 // result: (CEGBRA x) 1529 for { 1530 x := v.Args[0] 1531 v.reset(OpS390XCEGBRA) 1532 v.AddArg(x) 1533 return true 1534 } 1535 } 1536 func rewriteValueS390X_OpCvt64to64F(v *Value, config *Config) bool { 1537 b := v.Block 1538 _ = b 1539 // match: (Cvt64to64F x) 1540 // cond: 1541 // result: (CDGBRA x) 1542 for { 1543 x := v.Args[0] 1544 v.reset(OpS390XCDGBRA) 1545 v.AddArg(x) 1546 return true 1547 } 1548 } 1549 func rewriteValueS390X_OpDeferCall(v *Value, config *Config) bool { 1550 b := v.Block 1551 _ = b 1552 // match: (DeferCall [argwid] mem) 1553 // cond: 1554 // result: (CALLdefer [argwid] mem) 1555 for { 1556 argwid := v.AuxInt 1557 mem := v.Args[0] 1558 v.reset(OpS390XCALLdefer) 1559 v.AuxInt = argwid 1560 v.AddArg(mem) 1561 return true 1562 } 1563 } 1564 func rewriteValueS390X_OpDiv16(v *Value, config *Config) bool { 1565 b := v.Block 1566 _ = b 1567 // match: (Div16 x y) 1568 // cond: 1569 // result: (DIVW (MOVHreg x) (MOVHreg y)) 1570 for { 1571 x := v.Args[0] 1572 y := v.Args[1] 1573 v.reset(OpS390XDIVW) 1574 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1575 v0.AddArg(x) 1576 v.AddArg(v0) 1577 v1 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1578 v1.AddArg(y) 1579 v.AddArg(v1) 1580 return true 1581 } 1582 } 1583 func rewriteValueS390X_OpDiv16u(v *Value, config *Config) bool { 1584 b := v.Block 1585 _ = b 1586 // match: (Div16u x y) 1587 // cond: 1588 // result: (DIVWU (MOVHZreg x) (MOVHZreg y)) 1589 for { 1590 x := v.Args[0] 1591 y := v.Args[1] 1592 v.reset(OpS390XDIVWU) 1593 v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1594 v0.AddArg(x) 1595 v.AddArg(v0) 1596 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1597 v1.AddArg(y) 1598 v.AddArg(v1) 1599 return true 1600 } 1601 } 1602 func rewriteValueS390X_OpDiv32(v *Value, config *Config) bool { 1603 b := v.Block 1604 _ = b 1605 // match: (Div32 x y) 1606 // cond: 1607 // result: (DIVW (MOVWreg x) y) 1608 for { 1609 x := v.Args[0] 1610 y := v.Args[1] 1611 v.reset(OpS390XDIVW) 1612 v0 := b.NewValue0(v.Pos, OpS390XMOVWreg, config.fe.TypeInt64()) 1613 v0.AddArg(x) 1614 v.AddArg(v0) 1615 v.AddArg(y) 1616 return true 1617 } 1618 } 1619 func rewriteValueS390X_OpDiv32F(v *Value, config *Config) bool { 1620 b := v.Block 1621 _ = b 1622 // match: (Div32F x y) 1623 // cond: 1624 // result: (FDIVS x y) 1625 for { 1626 x := v.Args[0] 1627 y := v.Args[1] 1628 v.reset(OpS390XFDIVS) 1629 v.AddArg(x) 1630 v.AddArg(y) 1631 return true 1632 } 1633 } 1634 func rewriteValueS390X_OpDiv32u(v *Value, config *Config) bool { 1635 b := v.Block 1636 _ = b 1637 // match: (Div32u x y) 1638 // cond: 1639 // result: (DIVWU (MOVWZreg x) y) 1640 for { 1641 x := v.Args[0] 1642 y := v.Args[1] 1643 v.reset(OpS390XDIVWU) 1644 v0 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1645 v0.AddArg(x) 1646 v.AddArg(v0) 1647 v.AddArg(y) 1648 return true 1649 } 1650 } 1651 func rewriteValueS390X_OpDiv64(v *Value, config *Config) bool { 1652 b := v.Block 1653 _ = b 1654 // match: (Div64 x y) 1655 // cond: 1656 // result: (DIVD x y) 1657 for { 1658 x := v.Args[0] 1659 y := v.Args[1] 1660 v.reset(OpS390XDIVD) 1661 v.AddArg(x) 1662 v.AddArg(y) 1663 return true 1664 } 1665 } 1666 func rewriteValueS390X_OpDiv64F(v *Value, config *Config) bool { 1667 b := v.Block 1668 _ = b 1669 // match: (Div64F x y) 1670 // cond: 1671 // result: (FDIV x y) 1672 for { 1673 x := v.Args[0] 1674 y := v.Args[1] 1675 v.reset(OpS390XFDIV) 1676 v.AddArg(x) 1677 v.AddArg(y) 1678 return true 1679 } 1680 } 1681 func rewriteValueS390X_OpDiv64u(v *Value, config *Config) bool { 1682 b := v.Block 1683 _ = b 1684 // match: (Div64u x y) 1685 // cond: 1686 // result: (DIVDU x y) 1687 for { 1688 x := v.Args[0] 1689 y := v.Args[1] 1690 v.reset(OpS390XDIVDU) 1691 v.AddArg(x) 1692 v.AddArg(y) 1693 return true 1694 } 1695 } 1696 func rewriteValueS390X_OpDiv8(v *Value, config *Config) bool { 1697 b := v.Block 1698 _ = b 1699 // match: (Div8 x y) 1700 // cond: 1701 // result: (DIVW (MOVBreg x) (MOVBreg y)) 1702 for { 1703 x := v.Args[0] 1704 y := v.Args[1] 1705 v.reset(OpS390XDIVW) 1706 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1707 v0.AddArg(x) 1708 v.AddArg(v0) 1709 v1 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1710 v1.AddArg(y) 1711 v.AddArg(v1) 1712 return true 1713 } 1714 } 1715 func rewriteValueS390X_OpDiv8u(v *Value, config *Config) bool { 1716 b := v.Block 1717 _ = b 1718 // match: (Div8u x y) 1719 // cond: 1720 // result: (DIVWU (MOVBZreg x) (MOVBZreg y)) 1721 for { 1722 x := v.Args[0] 1723 y := v.Args[1] 1724 v.reset(OpS390XDIVWU) 1725 v0 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1726 v0.AddArg(x) 1727 v.AddArg(v0) 1728 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1729 v1.AddArg(y) 1730 v.AddArg(v1) 1731 return true 1732 } 1733 } 1734 func rewriteValueS390X_OpEq16(v *Value, config *Config) bool { 1735 b := v.Block 1736 _ = b 1737 // match: (Eq16 x y) 1738 // cond: 1739 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1740 for { 1741 x := v.Args[0] 1742 y := v.Args[1] 1743 v.reset(OpS390XMOVDEQ) 1744 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1745 v0.AuxInt = 0 1746 v.AddArg(v0) 1747 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1748 v1.AuxInt = 1 1749 v.AddArg(v1) 1750 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1751 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1752 v3.AddArg(x) 1753 v2.AddArg(v3) 1754 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1755 v4.AddArg(y) 1756 v2.AddArg(v4) 1757 v.AddArg(v2) 1758 return true 1759 } 1760 } 1761 func rewriteValueS390X_OpEq32(v *Value, config *Config) bool { 1762 b := v.Block 1763 _ = b 1764 // match: (Eq32 x y) 1765 // cond: 1766 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1767 for { 1768 x := v.Args[0] 1769 y := v.Args[1] 1770 v.reset(OpS390XMOVDEQ) 1771 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1772 v0.AuxInt = 0 1773 v.AddArg(v0) 1774 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1775 v1.AuxInt = 1 1776 v.AddArg(v1) 1777 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 1778 v2.AddArg(x) 1779 v2.AddArg(y) 1780 v.AddArg(v2) 1781 return true 1782 } 1783 } 1784 func rewriteValueS390X_OpEq32F(v *Value, config *Config) bool { 1785 b := v.Block 1786 _ = b 1787 // match: (Eq32F x y) 1788 // cond: 1789 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 1790 for { 1791 x := v.Args[0] 1792 y := v.Args[1] 1793 v.reset(OpS390XMOVDEQ) 1794 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1795 v0.AuxInt = 0 1796 v.AddArg(v0) 1797 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1798 v1.AuxInt = 1 1799 v.AddArg(v1) 1800 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 1801 v2.AddArg(x) 1802 v2.AddArg(y) 1803 v.AddArg(v2) 1804 return true 1805 } 1806 } 1807 func rewriteValueS390X_OpEq64(v *Value, config *Config) bool { 1808 b := v.Block 1809 _ = b 1810 // match: (Eq64 x y) 1811 // cond: 1812 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1813 for { 1814 x := v.Args[0] 1815 y := v.Args[1] 1816 v.reset(OpS390XMOVDEQ) 1817 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1818 v0.AuxInt = 0 1819 v.AddArg(v0) 1820 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1821 v1.AuxInt = 1 1822 v.AddArg(v1) 1823 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1824 v2.AddArg(x) 1825 v2.AddArg(y) 1826 v.AddArg(v2) 1827 return true 1828 } 1829 } 1830 func rewriteValueS390X_OpEq64F(v *Value, config *Config) bool { 1831 b := v.Block 1832 _ = b 1833 // match: (Eq64F x y) 1834 // cond: 1835 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 1836 for { 1837 x := v.Args[0] 1838 y := v.Args[1] 1839 v.reset(OpS390XMOVDEQ) 1840 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1841 v0.AuxInt = 0 1842 v.AddArg(v0) 1843 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1844 v1.AuxInt = 1 1845 v.AddArg(v1) 1846 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 1847 v2.AddArg(x) 1848 v2.AddArg(y) 1849 v.AddArg(v2) 1850 return true 1851 } 1852 } 1853 func rewriteValueS390X_OpEq8(v *Value, config *Config) bool { 1854 b := v.Block 1855 _ = b 1856 // match: (Eq8 x y) 1857 // cond: 1858 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1859 for { 1860 x := v.Args[0] 1861 y := v.Args[1] 1862 v.reset(OpS390XMOVDEQ) 1863 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1864 v0.AuxInt = 0 1865 v.AddArg(v0) 1866 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1867 v1.AuxInt = 1 1868 v.AddArg(v1) 1869 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1870 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1871 v3.AddArg(x) 1872 v2.AddArg(v3) 1873 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1874 v4.AddArg(y) 1875 v2.AddArg(v4) 1876 v.AddArg(v2) 1877 return true 1878 } 1879 } 1880 func rewriteValueS390X_OpEqB(v *Value, config *Config) bool { 1881 b := v.Block 1882 _ = b 1883 // match: (EqB x y) 1884 // cond: 1885 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1886 for { 1887 x := v.Args[0] 1888 y := v.Args[1] 1889 v.reset(OpS390XMOVDEQ) 1890 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1891 v0.AuxInt = 0 1892 v.AddArg(v0) 1893 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1894 v1.AuxInt = 1 1895 v.AddArg(v1) 1896 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1897 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1898 v3.AddArg(x) 1899 v2.AddArg(v3) 1900 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1901 v4.AddArg(y) 1902 v2.AddArg(v4) 1903 v.AddArg(v2) 1904 return true 1905 } 1906 } 1907 func rewriteValueS390X_OpEqPtr(v *Value, config *Config) bool { 1908 b := v.Block 1909 _ = b 1910 // match: (EqPtr x y) 1911 // cond: 1912 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1913 for { 1914 x := v.Args[0] 1915 y := v.Args[1] 1916 v.reset(OpS390XMOVDEQ) 1917 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1918 v0.AuxInt = 0 1919 v.AddArg(v0) 1920 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1921 v1.AuxInt = 1 1922 v.AddArg(v1) 1923 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1924 v2.AddArg(x) 1925 v2.AddArg(y) 1926 v.AddArg(v2) 1927 return true 1928 } 1929 } 1930 func rewriteValueS390X_OpGeq16(v *Value, config *Config) bool { 1931 b := v.Block 1932 _ = b 1933 // match: (Geq16 x y) 1934 // cond: 1935 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1936 for { 1937 x := v.Args[0] 1938 y := v.Args[1] 1939 v.reset(OpS390XMOVDGE) 1940 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1941 v0.AuxInt = 0 1942 v.AddArg(v0) 1943 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1944 v1.AuxInt = 1 1945 v.AddArg(v1) 1946 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1947 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1948 v3.AddArg(x) 1949 v2.AddArg(v3) 1950 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1951 v4.AddArg(y) 1952 v2.AddArg(v4) 1953 v.AddArg(v2) 1954 return true 1955 } 1956 } 1957 func rewriteValueS390X_OpGeq16U(v *Value, config *Config) bool { 1958 b := v.Block 1959 _ = b 1960 // match: (Geq16U x y) 1961 // cond: 1962 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 1963 for { 1964 x := v.Args[0] 1965 y := v.Args[1] 1966 v.reset(OpS390XMOVDGE) 1967 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1968 v0.AuxInt = 0 1969 v.AddArg(v0) 1970 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1971 v1.AuxInt = 1 1972 v.AddArg(v1) 1973 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 1974 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1975 v3.AddArg(x) 1976 v2.AddArg(v3) 1977 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1978 v4.AddArg(y) 1979 v2.AddArg(v4) 1980 v.AddArg(v2) 1981 return true 1982 } 1983 } 1984 func rewriteValueS390X_OpGeq32(v *Value, config *Config) bool { 1985 b := v.Block 1986 _ = b 1987 // match: (Geq32 x y) 1988 // cond: 1989 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1990 for { 1991 x := v.Args[0] 1992 y := v.Args[1] 1993 v.reset(OpS390XMOVDGE) 1994 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1995 v0.AuxInt = 0 1996 v.AddArg(v0) 1997 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1998 v1.AuxInt = 1 1999 v.AddArg(v1) 2000 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 2001 v2.AddArg(x) 2002 v2.AddArg(y) 2003 v.AddArg(v2) 2004 return true 2005 } 2006 } 2007 func rewriteValueS390X_OpGeq32F(v *Value, config *Config) bool { 2008 b := v.Block 2009 _ = b 2010 // match: (Geq32F x y) 2011 // cond: 2012 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2013 for { 2014 x := v.Args[0] 2015 y := v.Args[1] 2016 v.reset(OpS390XMOVDGEnoinv) 2017 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2018 v0.AuxInt = 0 2019 v.AddArg(v0) 2020 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2021 v1.AuxInt = 1 2022 v.AddArg(v1) 2023 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 2024 v2.AddArg(x) 2025 v2.AddArg(y) 2026 v.AddArg(v2) 2027 return true 2028 } 2029 } 2030 func rewriteValueS390X_OpGeq32U(v *Value, config *Config) bool { 2031 b := v.Block 2032 _ = b 2033 // match: (Geq32U x y) 2034 // cond: 2035 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2036 for { 2037 x := v.Args[0] 2038 y := v.Args[1] 2039 v.reset(OpS390XMOVDGE) 2040 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2041 v0.AuxInt = 0 2042 v.AddArg(v0) 2043 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2044 v1.AuxInt = 1 2045 v.AddArg(v1) 2046 v2 := b.NewValue0(v.Pos, OpS390XCMPWU, TypeFlags) 2047 v2.AddArg(x) 2048 v2.AddArg(y) 2049 v.AddArg(v2) 2050 return true 2051 } 2052 } 2053 func rewriteValueS390X_OpGeq64(v *Value, config *Config) bool { 2054 b := v.Block 2055 _ = b 2056 // match: (Geq64 x y) 2057 // cond: 2058 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2059 for { 2060 x := v.Args[0] 2061 y := v.Args[1] 2062 v.reset(OpS390XMOVDGE) 2063 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2064 v0.AuxInt = 0 2065 v.AddArg(v0) 2066 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2067 v1.AuxInt = 1 2068 v.AddArg(v1) 2069 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2070 v2.AddArg(x) 2071 v2.AddArg(y) 2072 v.AddArg(v2) 2073 return true 2074 } 2075 } 2076 func rewriteValueS390X_OpGeq64F(v *Value, config *Config) bool { 2077 b := v.Block 2078 _ = b 2079 // match: (Geq64F x y) 2080 // cond: 2081 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2082 for { 2083 x := v.Args[0] 2084 y := v.Args[1] 2085 v.reset(OpS390XMOVDGEnoinv) 2086 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2087 v0.AuxInt = 0 2088 v.AddArg(v0) 2089 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2090 v1.AuxInt = 1 2091 v.AddArg(v1) 2092 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 2093 v2.AddArg(x) 2094 v2.AddArg(y) 2095 v.AddArg(v2) 2096 return true 2097 } 2098 } 2099 func rewriteValueS390X_OpGeq64U(v *Value, config *Config) bool { 2100 b := v.Block 2101 _ = b 2102 // match: (Geq64U x y) 2103 // cond: 2104 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2105 for { 2106 x := v.Args[0] 2107 y := v.Args[1] 2108 v.reset(OpS390XMOVDGE) 2109 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2110 v0.AuxInt = 0 2111 v.AddArg(v0) 2112 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2113 v1.AuxInt = 1 2114 v.AddArg(v1) 2115 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2116 v2.AddArg(x) 2117 v2.AddArg(y) 2118 v.AddArg(v2) 2119 return true 2120 } 2121 } 2122 func rewriteValueS390X_OpGeq8(v *Value, config *Config) bool { 2123 b := v.Block 2124 _ = b 2125 // match: (Geq8 x y) 2126 // cond: 2127 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2128 for { 2129 x := v.Args[0] 2130 y := v.Args[1] 2131 v.reset(OpS390XMOVDGE) 2132 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2133 v0.AuxInt = 0 2134 v.AddArg(v0) 2135 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2136 v1.AuxInt = 1 2137 v.AddArg(v1) 2138 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2139 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2140 v3.AddArg(x) 2141 v2.AddArg(v3) 2142 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2143 v4.AddArg(y) 2144 v2.AddArg(v4) 2145 v.AddArg(v2) 2146 return true 2147 } 2148 } 2149 func rewriteValueS390X_OpGeq8U(v *Value, config *Config) bool { 2150 b := v.Block 2151 _ = b 2152 // match: (Geq8U x y) 2153 // cond: 2154 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2155 for { 2156 x := v.Args[0] 2157 y := v.Args[1] 2158 v.reset(OpS390XMOVDGE) 2159 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2160 v0.AuxInt = 0 2161 v.AddArg(v0) 2162 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2163 v1.AuxInt = 1 2164 v.AddArg(v1) 2165 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2166 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2167 v3.AddArg(x) 2168 v2.AddArg(v3) 2169 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2170 v4.AddArg(y) 2171 v2.AddArg(v4) 2172 v.AddArg(v2) 2173 return true 2174 } 2175 } 2176 func rewriteValueS390X_OpGetClosurePtr(v *Value, config *Config) bool { 2177 b := v.Block 2178 _ = b 2179 // match: (GetClosurePtr) 2180 // cond: 2181 // result: (LoweredGetClosurePtr) 2182 for { 2183 v.reset(OpS390XLoweredGetClosurePtr) 2184 return true 2185 } 2186 } 2187 func rewriteValueS390X_OpGetG(v *Value, config *Config) bool { 2188 b := v.Block 2189 _ = b 2190 // match: (GetG mem) 2191 // cond: 2192 // result: (LoweredGetG mem) 2193 for { 2194 mem := v.Args[0] 2195 v.reset(OpS390XLoweredGetG) 2196 v.AddArg(mem) 2197 return true 2198 } 2199 } 2200 func rewriteValueS390X_OpGoCall(v *Value, config *Config) bool { 2201 b := v.Block 2202 _ = b 2203 // match: (GoCall [argwid] mem) 2204 // cond: 2205 // result: (CALLgo [argwid] mem) 2206 for { 2207 argwid := v.AuxInt 2208 mem := v.Args[0] 2209 v.reset(OpS390XCALLgo) 2210 v.AuxInt = argwid 2211 v.AddArg(mem) 2212 return true 2213 } 2214 } 2215 func rewriteValueS390X_OpGreater16(v *Value, config *Config) bool { 2216 b := v.Block 2217 _ = b 2218 // match: (Greater16 x y) 2219 // cond: 2220 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2221 for { 2222 x := v.Args[0] 2223 y := v.Args[1] 2224 v.reset(OpS390XMOVDGT) 2225 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2226 v0.AuxInt = 0 2227 v.AddArg(v0) 2228 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2229 v1.AuxInt = 1 2230 v.AddArg(v1) 2231 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2232 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2233 v3.AddArg(x) 2234 v2.AddArg(v3) 2235 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2236 v4.AddArg(y) 2237 v2.AddArg(v4) 2238 v.AddArg(v2) 2239 return true 2240 } 2241 } 2242 func rewriteValueS390X_OpGreater16U(v *Value, config *Config) bool { 2243 b := v.Block 2244 _ = b 2245 // match: (Greater16U x y) 2246 // cond: 2247 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2248 for { 2249 x := v.Args[0] 2250 y := v.Args[1] 2251 v.reset(OpS390XMOVDGT) 2252 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2253 v0.AuxInt = 0 2254 v.AddArg(v0) 2255 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2256 v1.AuxInt = 1 2257 v.AddArg(v1) 2258 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2259 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2260 v3.AddArg(x) 2261 v2.AddArg(v3) 2262 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2263 v4.AddArg(y) 2264 v2.AddArg(v4) 2265 v.AddArg(v2) 2266 return true 2267 } 2268 } 2269 func rewriteValueS390X_OpGreater32(v *Value, config *Config) bool { 2270 b := v.Block 2271 _ = b 2272 // match: (Greater32 x y) 2273 // cond: 2274 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2275 for { 2276 x := v.Args[0] 2277 y := v.Args[1] 2278 v.reset(OpS390XMOVDGT) 2279 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2280 v0.AuxInt = 0 2281 v.AddArg(v0) 2282 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2283 v1.AuxInt = 1 2284 v.AddArg(v1) 2285 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 2286 v2.AddArg(x) 2287 v2.AddArg(y) 2288 v.AddArg(v2) 2289 return true 2290 } 2291 } 2292 func rewriteValueS390X_OpGreater32F(v *Value, config *Config) bool { 2293 b := v.Block 2294 _ = b 2295 // match: (Greater32F x y) 2296 // cond: 2297 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2298 for { 2299 x := v.Args[0] 2300 y := v.Args[1] 2301 v.reset(OpS390XMOVDGTnoinv) 2302 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2303 v0.AuxInt = 0 2304 v.AddArg(v0) 2305 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2306 v1.AuxInt = 1 2307 v.AddArg(v1) 2308 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 2309 v2.AddArg(x) 2310 v2.AddArg(y) 2311 v.AddArg(v2) 2312 return true 2313 } 2314 } 2315 func rewriteValueS390X_OpGreater32U(v *Value, config *Config) bool { 2316 b := v.Block 2317 _ = b 2318 // match: (Greater32U x y) 2319 // cond: 2320 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2321 for { 2322 x := v.Args[0] 2323 y := v.Args[1] 2324 v.reset(OpS390XMOVDGT) 2325 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2326 v0.AuxInt = 0 2327 v.AddArg(v0) 2328 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2329 v1.AuxInt = 1 2330 v.AddArg(v1) 2331 v2 := b.NewValue0(v.Pos, OpS390XCMPWU, TypeFlags) 2332 v2.AddArg(x) 2333 v2.AddArg(y) 2334 v.AddArg(v2) 2335 return true 2336 } 2337 } 2338 func rewriteValueS390X_OpGreater64(v *Value, config *Config) bool { 2339 b := v.Block 2340 _ = b 2341 // match: (Greater64 x y) 2342 // cond: 2343 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2344 for { 2345 x := v.Args[0] 2346 y := v.Args[1] 2347 v.reset(OpS390XMOVDGT) 2348 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2349 v0.AuxInt = 0 2350 v.AddArg(v0) 2351 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2352 v1.AuxInt = 1 2353 v.AddArg(v1) 2354 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2355 v2.AddArg(x) 2356 v2.AddArg(y) 2357 v.AddArg(v2) 2358 return true 2359 } 2360 } 2361 func rewriteValueS390X_OpGreater64F(v *Value, config *Config) bool { 2362 b := v.Block 2363 _ = b 2364 // match: (Greater64F x y) 2365 // cond: 2366 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2367 for { 2368 x := v.Args[0] 2369 y := v.Args[1] 2370 v.reset(OpS390XMOVDGTnoinv) 2371 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2372 v0.AuxInt = 0 2373 v.AddArg(v0) 2374 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2375 v1.AuxInt = 1 2376 v.AddArg(v1) 2377 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 2378 v2.AddArg(x) 2379 v2.AddArg(y) 2380 v.AddArg(v2) 2381 return true 2382 } 2383 } 2384 func rewriteValueS390X_OpGreater64U(v *Value, config *Config) bool { 2385 b := v.Block 2386 _ = b 2387 // match: (Greater64U x y) 2388 // cond: 2389 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2390 for { 2391 x := v.Args[0] 2392 y := v.Args[1] 2393 v.reset(OpS390XMOVDGT) 2394 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2395 v0.AuxInt = 0 2396 v.AddArg(v0) 2397 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2398 v1.AuxInt = 1 2399 v.AddArg(v1) 2400 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2401 v2.AddArg(x) 2402 v2.AddArg(y) 2403 v.AddArg(v2) 2404 return true 2405 } 2406 } 2407 func rewriteValueS390X_OpGreater8(v *Value, config *Config) bool { 2408 b := v.Block 2409 _ = b 2410 // match: (Greater8 x y) 2411 // cond: 2412 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2413 for { 2414 x := v.Args[0] 2415 y := v.Args[1] 2416 v.reset(OpS390XMOVDGT) 2417 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2418 v0.AuxInt = 0 2419 v.AddArg(v0) 2420 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2421 v1.AuxInt = 1 2422 v.AddArg(v1) 2423 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2424 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2425 v3.AddArg(x) 2426 v2.AddArg(v3) 2427 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2428 v4.AddArg(y) 2429 v2.AddArg(v4) 2430 v.AddArg(v2) 2431 return true 2432 } 2433 } 2434 func rewriteValueS390X_OpGreater8U(v *Value, config *Config) bool { 2435 b := v.Block 2436 _ = b 2437 // match: (Greater8U x y) 2438 // cond: 2439 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2440 for { 2441 x := v.Args[0] 2442 y := v.Args[1] 2443 v.reset(OpS390XMOVDGT) 2444 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2445 v0.AuxInt = 0 2446 v.AddArg(v0) 2447 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2448 v1.AuxInt = 1 2449 v.AddArg(v1) 2450 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2451 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2452 v3.AddArg(x) 2453 v2.AddArg(v3) 2454 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2455 v4.AddArg(y) 2456 v2.AddArg(v4) 2457 v.AddArg(v2) 2458 return true 2459 } 2460 } 2461 func rewriteValueS390X_OpHmul16(v *Value, config *Config) bool { 2462 b := v.Block 2463 _ = b 2464 // match: (Hmul16 x y) 2465 // cond: 2466 // result: (SRDconst [16] (MULLW (MOVHreg x) (MOVHreg y))) 2467 for { 2468 x := v.Args[0] 2469 y := v.Args[1] 2470 v.reset(OpS390XSRDconst) 2471 v.AuxInt = 16 2472 v0 := b.NewValue0(v.Pos, OpS390XMULLW, config.fe.TypeInt32()) 2473 v1 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2474 v1.AddArg(x) 2475 v0.AddArg(v1) 2476 v2 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2477 v2.AddArg(y) 2478 v0.AddArg(v2) 2479 v.AddArg(v0) 2480 return true 2481 } 2482 } 2483 func rewriteValueS390X_OpHmul16u(v *Value, config *Config) bool { 2484 b := v.Block 2485 _ = b 2486 // match: (Hmul16u x y) 2487 // cond: 2488 // result: (SRDconst [16] (MULLW (MOVHZreg x) (MOVHZreg y))) 2489 for { 2490 x := v.Args[0] 2491 y := v.Args[1] 2492 v.reset(OpS390XSRDconst) 2493 v.AuxInt = 16 2494 v0 := b.NewValue0(v.Pos, OpS390XMULLW, config.fe.TypeInt32()) 2495 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2496 v1.AddArg(x) 2497 v0.AddArg(v1) 2498 v2 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2499 v2.AddArg(y) 2500 v0.AddArg(v2) 2501 v.AddArg(v0) 2502 return true 2503 } 2504 } 2505 func rewriteValueS390X_OpHmul32(v *Value, config *Config) bool { 2506 b := v.Block 2507 _ = b 2508 // match: (Hmul32 x y) 2509 // cond: 2510 // result: (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y))) 2511 for { 2512 x := v.Args[0] 2513 y := v.Args[1] 2514 v.reset(OpS390XSRDconst) 2515 v.AuxInt = 32 2516 v0 := b.NewValue0(v.Pos, OpS390XMULLD, config.fe.TypeInt64()) 2517 v1 := b.NewValue0(v.Pos, OpS390XMOVWreg, config.fe.TypeInt64()) 2518 v1.AddArg(x) 2519 v0.AddArg(v1) 2520 v2 := b.NewValue0(v.Pos, OpS390XMOVWreg, config.fe.TypeInt64()) 2521 v2.AddArg(y) 2522 v0.AddArg(v2) 2523 v.AddArg(v0) 2524 return true 2525 } 2526 } 2527 func rewriteValueS390X_OpHmul32u(v *Value, config *Config) bool { 2528 b := v.Block 2529 _ = b 2530 // match: (Hmul32u x y) 2531 // cond: 2532 // result: (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y))) 2533 for { 2534 x := v.Args[0] 2535 y := v.Args[1] 2536 v.reset(OpS390XSRDconst) 2537 v.AuxInt = 32 2538 v0 := b.NewValue0(v.Pos, OpS390XMULLD, config.fe.TypeInt64()) 2539 v1 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2540 v1.AddArg(x) 2541 v0.AddArg(v1) 2542 v2 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2543 v2.AddArg(y) 2544 v0.AddArg(v2) 2545 v.AddArg(v0) 2546 return true 2547 } 2548 } 2549 func rewriteValueS390X_OpHmul64(v *Value, config *Config) bool { 2550 b := v.Block 2551 _ = b 2552 // match: (Hmul64 x y) 2553 // cond: 2554 // result: (MULHD x y) 2555 for { 2556 x := v.Args[0] 2557 y := v.Args[1] 2558 v.reset(OpS390XMULHD) 2559 v.AddArg(x) 2560 v.AddArg(y) 2561 return true 2562 } 2563 } 2564 func rewriteValueS390X_OpHmul64u(v *Value, config *Config) bool { 2565 b := v.Block 2566 _ = b 2567 // match: (Hmul64u x y) 2568 // cond: 2569 // result: (MULHDU x y) 2570 for { 2571 x := v.Args[0] 2572 y := v.Args[1] 2573 v.reset(OpS390XMULHDU) 2574 v.AddArg(x) 2575 v.AddArg(y) 2576 return true 2577 } 2578 } 2579 func rewriteValueS390X_OpHmul8(v *Value, config *Config) bool { 2580 b := v.Block 2581 _ = b 2582 // match: (Hmul8 x y) 2583 // cond: 2584 // result: (SRDconst [8] (MULLW (MOVBreg x) (MOVBreg y))) 2585 for { 2586 x := v.Args[0] 2587 y := v.Args[1] 2588 v.reset(OpS390XSRDconst) 2589 v.AuxInt = 8 2590 v0 := b.NewValue0(v.Pos, OpS390XMULLW, config.fe.TypeInt32()) 2591 v1 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2592 v1.AddArg(x) 2593 v0.AddArg(v1) 2594 v2 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2595 v2.AddArg(y) 2596 v0.AddArg(v2) 2597 v.AddArg(v0) 2598 return true 2599 } 2600 } 2601 func rewriteValueS390X_OpHmul8u(v *Value, config *Config) bool { 2602 b := v.Block 2603 _ = b 2604 // match: (Hmul8u x y) 2605 // cond: 2606 // result: (SRDconst [8] (MULLW (MOVBZreg x) (MOVBZreg y))) 2607 for { 2608 x := v.Args[0] 2609 y := v.Args[1] 2610 v.reset(OpS390XSRDconst) 2611 v.AuxInt = 8 2612 v0 := b.NewValue0(v.Pos, OpS390XMULLW, config.fe.TypeInt32()) 2613 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2614 v1.AddArg(x) 2615 v0.AddArg(v1) 2616 v2 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2617 v2.AddArg(y) 2618 v0.AddArg(v2) 2619 v.AddArg(v0) 2620 return true 2621 } 2622 } 2623 func rewriteValueS390X_OpITab(v *Value, config *Config) bool { 2624 b := v.Block 2625 _ = b 2626 // match: (ITab (Load ptr mem)) 2627 // cond: 2628 // result: (MOVDload ptr mem) 2629 for { 2630 v_0 := v.Args[0] 2631 if v_0.Op != OpLoad { 2632 break 2633 } 2634 ptr := v_0.Args[0] 2635 mem := v_0.Args[1] 2636 v.reset(OpS390XMOVDload) 2637 v.AddArg(ptr) 2638 v.AddArg(mem) 2639 return true 2640 } 2641 return false 2642 } 2643 func rewriteValueS390X_OpInterCall(v *Value, config *Config) bool { 2644 b := v.Block 2645 _ = b 2646 // match: (InterCall [argwid] entry mem) 2647 // cond: 2648 // result: (CALLinter [argwid] entry mem) 2649 for { 2650 argwid := v.AuxInt 2651 entry := v.Args[0] 2652 mem := v.Args[1] 2653 v.reset(OpS390XCALLinter) 2654 v.AuxInt = argwid 2655 v.AddArg(entry) 2656 v.AddArg(mem) 2657 return true 2658 } 2659 } 2660 func rewriteValueS390X_OpIsInBounds(v *Value, config *Config) bool { 2661 b := v.Block 2662 _ = b 2663 // match: (IsInBounds idx len) 2664 // cond: 2665 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2666 for { 2667 idx := v.Args[0] 2668 len := v.Args[1] 2669 v.reset(OpS390XMOVDLT) 2670 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2671 v0.AuxInt = 0 2672 v.AddArg(v0) 2673 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2674 v1.AuxInt = 1 2675 v.AddArg(v1) 2676 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2677 v2.AddArg(idx) 2678 v2.AddArg(len) 2679 v.AddArg(v2) 2680 return true 2681 } 2682 } 2683 func rewriteValueS390X_OpIsNonNil(v *Value, config *Config) bool { 2684 b := v.Block 2685 _ = b 2686 // match: (IsNonNil p) 2687 // cond: 2688 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPconst p [0])) 2689 for { 2690 p := v.Args[0] 2691 v.reset(OpS390XMOVDNE) 2692 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2693 v0.AuxInt = 0 2694 v.AddArg(v0) 2695 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2696 v1.AuxInt = 1 2697 v.AddArg(v1) 2698 v2 := b.NewValue0(v.Pos, OpS390XCMPconst, TypeFlags) 2699 v2.AuxInt = 0 2700 v2.AddArg(p) 2701 v.AddArg(v2) 2702 return true 2703 } 2704 } 2705 func rewriteValueS390X_OpIsSliceInBounds(v *Value, config *Config) bool { 2706 b := v.Block 2707 _ = b 2708 // match: (IsSliceInBounds idx len) 2709 // cond: 2710 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2711 for { 2712 idx := v.Args[0] 2713 len := v.Args[1] 2714 v.reset(OpS390XMOVDLE) 2715 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2716 v0.AuxInt = 0 2717 v.AddArg(v0) 2718 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2719 v1.AuxInt = 1 2720 v.AddArg(v1) 2721 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2722 v2.AddArg(idx) 2723 v2.AddArg(len) 2724 v.AddArg(v2) 2725 return true 2726 } 2727 } 2728 func rewriteValueS390X_OpLeq16(v *Value, config *Config) bool { 2729 b := v.Block 2730 _ = b 2731 // match: (Leq16 x y) 2732 // cond: 2733 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2734 for { 2735 x := v.Args[0] 2736 y := v.Args[1] 2737 v.reset(OpS390XMOVDLE) 2738 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2739 v0.AuxInt = 0 2740 v.AddArg(v0) 2741 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2742 v1.AuxInt = 1 2743 v.AddArg(v1) 2744 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2745 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2746 v3.AddArg(x) 2747 v2.AddArg(v3) 2748 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2749 v4.AddArg(y) 2750 v2.AddArg(v4) 2751 v.AddArg(v2) 2752 return true 2753 } 2754 } 2755 func rewriteValueS390X_OpLeq16U(v *Value, config *Config) bool { 2756 b := v.Block 2757 _ = b 2758 // match: (Leq16U x y) 2759 // cond: 2760 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2761 for { 2762 x := v.Args[0] 2763 y := v.Args[1] 2764 v.reset(OpS390XMOVDLE) 2765 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2766 v0.AuxInt = 0 2767 v.AddArg(v0) 2768 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2769 v1.AuxInt = 1 2770 v.AddArg(v1) 2771 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2772 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2773 v3.AddArg(x) 2774 v2.AddArg(v3) 2775 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2776 v4.AddArg(y) 2777 v2.AddArg(v4) 2778 v.AddArg(v2) 2779 return true 2780 } 2781 } 2782 func rewriteValueS390X_OpLeq32(v *Value, config *Config) bool { 2783 b := v.Block 2784 _ = b 2785 // match: (Leq32 x y) 2786 // cond: 2787 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2788 for { 2789 x := v.Args[0] 2790 y := v.Args[1] 2791 v.reset(OpS390XMOVDLE) 2792 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2793 v0.AuxInt = 0 2794 v.AddArg(v0) 2795 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2796 v1.AuxInt = 1 2797 v.AddArg(v1) 2798 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 2799 v2.AddArg(x) 2800 v2.AddArg(y) 2801 v.AddArg(v2) 2802 return true 2803 } 2804 } 2805 func rewriteValueS390X_OpLeq32F(v *Value, config *Config) bool { 2806 b := v.Block 2807 _ = b 2808 // match: (Leq32F x y) 2809 // cond: 2810 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 2811 for { 2812 x := v.Args[0] 2813 y := v.Args[1] 2814 v.reset(OpS390XMOVDGEnoinv) 2815 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2816 v0.AuxInt = 0 2817 v.AddArg(v0) 2818 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2819 v1.AuxInt = 1 2820 v.AddArg(v1) 2821 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 2822 v2.AddArg(y) 2823 v2.AddArg(x) 2824 v.AddArg(v2) 2825 return true 2826 } 2827 } 2828 func rewriteValueS390X_OpLeq32U(v *Value, config *Config) bool { 2829 b := v.Block 2830 _ = b 2831 // match: (Leq32U x y) 2832 // cond: 2833 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2834 for { 2835 x := v.Args[0] 2836 y := v.Args[1] 2837 v.reset(OpS390XMOVDLE) 2838 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2839 v0.AuxInt = 0 2840 v.AddArg(v0) 2841 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2842 v1.AuxInt = 1 2843 v.AddArg(v1) 2844 v2 := b.NewValue0(v.Pos, OpS390XCMPWU, TypeFlags) 2845 v2.AddArg(x) 2846 v2.AddArg(y) 2847 v.AddArg(v2) 2848 return true 2849 } 2850 } 2851 func rewriteValueS390X_OpLeq64(v *Value, config *Config) bool { 2852 b := v.Block 2853 _ = b 2854 // match: (Leq64 x y) 2855 // cond: 2856 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2857 for { 2858 x := v.Args[0] 2859 y := v.Args[1] 2860 v.reset(OpS390XMOVDLE) 2861 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2862 v0.AuxInt = 0 2863 v.AddArg(v0) 2864 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2865 v1.AuxInt = 1 2866 v.AddArg(v1) 2867 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2868 v2.AddArg(x) 2869 v2.AddArg(y) 2870 v.AddArg(v2) 2871 return true 2872 } 2873 } 2874 func rewriteValueS390X_OpLeq64F(v *Value, config *Config) bool { 2875 b := v.Block 2876 _ = b 2877 // match: (Leq64F x y) 2878 // cond: 2879 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 2880 for { 2881 x := v.Args[0] 2882 y := v.Args[1] 2883 v.reset(OpS390XMOVDGEnoinv) 2884 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2885 v0.AuxInt = 0 2886 v.AddArg(v0) 2887 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2888 v1.AuxInt = 1 2889 v.AddArg(v1) 2890 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 2891 v2.AddArg(y) 2892 v2.AddArg(x) 2893 v.AddArg(v2) 2894 return true 2895 } 2896 } 2897 func rewriteValueS390X_OpLeq64U(v *Value, config *Config) bool { 2898 b := v.Block 2899 _ = b 2900 // match: (Leq64U x y) 2901 // cond: 2902 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2903 for { 2904 x := v.Args[0] 2905 y := v.Args[1] 2906 v.reset(OpS390XMOVDLE) 2907 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2908 v0.AuxInt = 0 2909 v.AddArg(v0) 2910 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2911 v1.AuxInt = 1 2912 v.AddArg(v1) 2913 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2914 v2.AddArg(x) 2915 v2.AddArg(y) 2916 v.AddArg(v2) 2917 return true 2918 } 2919 } 2920 func rewriteValueS390X_OpLeq8(v *Value, config *Config) bool { 2921 b := v.Block 2922 _ = b 2923 // match: (Leq8 x y) 2924 // cond: 2925 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2926 for { 2927 x := v.Args[0] 2928 y := v.Args[1] 2929 v.reset(OpS390XMOVDLE) 2930 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2931 v0.AuxInt = 0 2932 v.AddArg(v0) 2933 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2934 v1.AuxInt = 1 2935 v.AddArg(v1) 2936 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2937 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2938 v3.AddArg(x) 2939 v2.AddArg(v3) 2940 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2941 v4.AddArg(y) 2942 v2.AddArg(v4) 2943 v.AddArg(v2) 2944 return true 2945 } 2946 } 2947 func rewriteValueS390X_OpLeq8U(v *Value, config *Config) bool { 2948 b := v.Block 2949 _ = b 2950 // match: (Leq8U x y) 2951 // cond: 2952 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2953 for { 2954 x := v.Args[0] 2955 y := v.Args[1] 2956 v.reset(OpS390XMOVDLE) 2957 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2958 v0.AuxInt = 0 2959 v.AddArg(v0) 2960 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2961 v1.AuxInt = 1 2962 v.AddArg(v1) 2963 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2964 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2965 v3.AddArg(x) 2966 v2.AddArg(v3) 2967 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2968 v4.AddArg(y) 2969 v2.AddArg(v4) 2970 v.AddArg(v2) 2971 return true 2972 } 2973 } 2974 func rewriteValueS390X_OpLess16(v *Value, config *Config) bool { 2975 b := v.Block 2976 _ = b 2977 // match: (Less16 x y) 2978 // cond: 2979 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2980 for { 2981 x := v.Args[0] 2982 y := v.Args[1] 2983 v.reset(OpS390XMOVDLT) 2984 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2985 v0.AuxInt = 0 2986 v.AddArg(v0) 2987 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2988 v1.AuxInt = 1 2989 v.AddArg(v1) 2990 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2991 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2992 v3.AddArg(x) 2993 v2.AddArg(v3) 2994 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2995 v4.AddArg(y) 2996 v2.AddArg(v4) 2997 v.AddArg(v2) 2998 return true 2999 } 3000 } 3001 func rewriteValueS390X_OpLess16U(v *Value, config *Config) bool { 3002 b := v.Block 3003 _ = b 3004 // match: (Less16U x y) 3005 // cond: 3006 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 3007 for { 3008 x := v.Args[0] 3009 y := v.Args[1] 3010 v.reset(OpS390XMOVDLT) 3011 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3012 v0.AuxInt = 0 3013 v.AddArg(v0) 3014 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3015 v1.AuxInt = 1 3016 v.AddArg(v1) 3017 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 3018 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3019 v3.AddArg(x) 3020 v2.AddArg(v3) 3021 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3022 v4.AddArg(y) 3023 v2.AddArg(v4) 3024 v.AddArg(v2) 3025 return true 3026 } 3027 } 3028 func rewriteValueS390X_OpLess32(v *Value, config *Config) bool { 3029 b := v.Block 3030 _ = b 3031 // match: (Less32 x y) 3032 // cond: 3033 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 3034 for { 3035 x := v.Args[0] 3036 y := v.Args[1] 3037 v.reset(OpS390XMOVDLT) 3038 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3039 v0.AuxInt = 0 3040 v.AddArg(v0) 3041 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3042 v1.AuxInt = 1 3043 v.AddArg(v1) 3044 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 3045 v2.AddArg(x) 3046 v2.AddArg(y) 3047 v.AddArg(v2) 3048 return true 3049 } 3050 } 3051 func rewriteValueS390X_OpLess32F(v *Value, config *Config) bool { 3052 b := v.Block 3053 _ = b 3054 // match: (Less32F x y) 3055 // cond: 3056 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 3057 for { 3058 x := v.Args[0] 3059 y := v.Args[1] 3060 v.reset(OpS390XMOVDGTnoinv) 3061 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3062 v0.AuxInt = 0 3063 v.AddArg(v0) 3064 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3065 v1.AuxInt = 1 3066 v.AddArg(v1) 3067 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 3068 v2.AddArg(y) 3069 v2.AddArg(x) 3070 v.AddArg(v2) 3071 return true 3072 } 3073 } 3074 func rewriteValueS390X_OpLess32U(v *Value, config *Config) bool { 3075 b := v.Block 3076 _ = b 3077 // match: (Less32U x y) 3078 // cond: 3079 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 3080 for { 3081 x := v.Args[0] 3082 y := v.Args[1] 3083 v.reset(OpS390XMOVDLT) 3084 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3085 v0.AuxInt = 0 3086 v.AddArg(v0) 3087 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3088 v1.AuxInt = 1 3089 v.AddArg(v1) 3090 v2 := b.NewValue0(v.Pos, OpS390XCMPWU, TypeFlags) 3091 v2.AddArg(x) 3092 v2.AddArg(y) 3093 v.AddArg(v2) 3094 return true 3095 } 3096 } 3097 func rewriteValueS390X_OpLess64(v *Value, config *Config) bool { 3098 b := v.Block 3099 _ = b 3100 // match: (Less64 x y) 3101 // cond: 3102 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 3103 for { 3104 x := v.Args[0] 3105 y := v.Args[1] 3106 v.reset(OpS390XMOVDLT) 3107 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3108 v0.AuxInt = 0 3109 v.AddArg(v0) 3110 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3111 v1.AuxInt = 1 3112 v.AddArg(v1) 3113 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 3114 v2.AddArg(x) 3115 v2.AddArg(y) 3116 v.AddArg(v2) 3117 return true 3118 } 3119 } 3120 func rewriteValueS390X_OpLess64F(v *Value, config *Config) bool { 3121 b := v.Block 3122 _ = b 3123 // match: (Less64F x y) 3124 // cond: 3125 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 3126 for { 3127 x := v.Args[0] 3128 y := v.Args[1] 3129 v.reset(OpS390XMOVDGTnoinv) 3130 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3131 v0.AuxInt = 0 3132 v.AddArg(v0) 3133 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3134 v1.AuxInt = 1 3135 v.AddArg(v1) 3136 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 3137 v2.AddArg(y) 3138 v2.AddArg(x) 3139 v.AddArg(v2) 3140 return true 3141 } 3142 } 3143 func rewriteValueS390X_OpLess64U(v *Value, config *Config) bool { 3144 b := v.Block 3145 _ = b 3146 // match: (Less64U x y) 3147 // cond: 3148 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 3149 for { 3150 x := v.Args[0] 3151 y := v.Args[1] 3152 v.reset(OpS390XMOVDLT) 3153 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3154 v0.AuxInt = 0 3155 v.AddArg(v0) 3156 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3157 v1.AuxInt = 1 3158 v.AddArg(v1) 3159 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 3160 v2.AddArg(x) 3161 v2.AddArg(y) 3162 v.AddArg(v2) 3163 return true 3164 } 3165 } 3166 func rewriteValueS390X_OpLess8(v *Value, config *Config) bool { 3167 b := v.Block 3168 _ = b 3169 // match: (Less8 x y) 3170 // cond: 3171 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 3172 for { 3173 x := v.Args[0] 3174 y := v.Args[1] 3175 v.reset(OpS390XMOVDLT) 3176 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3177 v0.AuxInt = 0 3178 v.AddArg(v0) 3179 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3180 v1.AuxInt = 1 3181 v.AddArg(v1) 3182 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 3183 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 3184 v3.AddArg(x) 3185 v2.AddArg(v3) 3186 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 3187 v4.AddArg(y) 3188 v2.AddArg(v4) 3189 v.AddArg(v2) 3190 return true 3191 } 3192 } 3193 func rewriteValueS390X_OpLess8U(v *Value, config *Config) bool { 3194 b := v.Block 3195 _ = b 3196 // match: (Less8U x y) 3197 // cond: 3198 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 3199 for { 3200 x := v.Args[0] 3201 y := v.Args[1] 3202 v.reset(OpS390XMOVDLT) 3203 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3204 v0.AuxInt = 0 3205 v.AddArg(v0) 3206 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3207 v1.AuxInt = 1 3208 v.AddArg(v1) 3209 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 3210 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3211 v3.AddArg(x) 3212 v2.AddArg(v3) 3213 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3214 v4.AddArg(y) 3215 v2.AddArg(v4) 3216 v.AddArg(v2) 3217 return true 3218 } 3219 } 3220 func rewriteValueS390X_OpLoad(v *Value, config *Config) bool { 3221 b := v.Block 3222 _ = b 3223 // match: (Load <t> ptr mem) 3224 // cond: (is64BitInt(t) || isPtr(t)) 3225 // result: (MOVDload ptr mem) 3226 for { 3227 t := v.Type 3228 ptr := v.Args[0] 3229 mem := v.Args[1] 3230 if !(is64BitInt(t) || isPtr(t)) { 3231 break 3232 } 3233 v.reset(OpS390XMOVDload) 3234 v.AddArg(ptr) 3235 v.AddArg(mem) 3236 return true 3237 } 3238 // match: (Load <t> ptr mem) 3239 // cond: is32BitInt(t) && isSigned(t) 3240 // result: (MOVWload ptr mem) 3241 for { 3242 t := v.Type 3243 ptr := v.Args[0] 3244 mem := v.Args[1] 3245 if !(is32BitInt(t) && isSigned(t)) { 3246 break 3247 } 3248 v.reset(OpS390XMOVWload) 3249 v.AddArg(ptr) 3250 v.AddArg(mem) 3251 return true 3252 } 3253 // match: (Load <t> ptr mem) 3254 // cond: is32BitInt(t) && !isSigned(t) 3255 // result: (MOVWZload ptr mem) 3256 for { 3257 t := v.Type 3258 ptr := v.Args[0] 3259 mem := v.Args[1] 3260 if !(is32BitInt(t) && !isSigned(t)) { 3261 break 3262 } 3263 v.reset(OpS390XMOVWZload) 3264 v.AddArg(ptr) 3265 v.AddArg(mem) 3266 return true 3267 } 3268 // match: (Load <t> ptr mem) 3269 // cond: is16BitInt(t) && isSigned(t) 3270 // result: (MOVHload ptr mem) 3271 for { 3272 t := v.Type 3273 ptr := v.Args[0] 3274 mem := v.Args[1] 3275 if !(is16BitInt(t) && isSigned(t)) { 3276 break 3277 } 3278 v.reset(OpS390XMOVHload) 3279 v.AddArg(ptr) 3280 v.AddArg(mem) 3281 return true 3282 } 3283 // match: (Load <t> ptr mem) 3284 // cond: is16BitInt(t) && !isSigned(t) 3285 // result: (MOVHZload ptr mem) 3286 for { 3287 t := v.Type 3288 ptr := v.Args[0] 3289 mem := v.Args[1] 3290 if !(is16BitInt(t) && !isSigned(t)) { 3291 break 3292 } 3293 v.reset(OpS390XMOVHZload) 3294 v.AddArg(ptr) 3295 v.AddArg(mem) 3296 return true 3297 } 3298 // match: (Load <t> ptr mem) 3299 // cond: is8BitInt(t) && isSigned(t) 3300 // result: (MOVBload ptr mem) 3301 for { 3302 t := v.Type 3303 ptr := v.Args[0] 3304 mem := v.Args[1] 3305 if !(is8BitInt(t) && isSigned(t)) { 3306 break 3307 } 3308 v.reset(OpS390XMOVBload) 3309 v.AddArg(ptr) 3310 v.AddArg(mem) 3311 return true 3312 } 3313 // match: (Load <t> ptr mem) 3314 // cond: (t.IsBoolean() || (is8BitInt(t) && !isSigned(t))) 3315 // result: (MOVBZload ptr mem) 3316 for { 3317 t := v.Type 3318 ptr := v.Args[0] 3319 mem := v.Args[1] 3320 if !(t.IsBoolean() || (is8BitInt(t) && !isSigned(t))) { 3321 break 3322 } 3323 v.reset(OpS390XMOVBZload) 3324 v.AddArg(ptr) 3325 v.AddArg(mem) 3326 return true 3327 } 3328 // match: (Load <t> ptr mem) 3329 // cond: is32BitFloat(t) 3330 // result: (FMOVSload ptr mem) 3331 for { 3332 t := v.Type 3333 ptr := v.Args[0] 3334 mem := v.Args[1] 3335 if !(is32BitFloat(t)) { 3336 break 3337 } 3338 v.reset(OpS390XFMOVSload) 3339 v.AddArg(ptr) 3340 v.AddArg(mem) 3341 return true 3342 } 3343 // match: (Load <t> ptr mem) 3344 // cond: is64BitFloat(t) 3345 // result: (FMOVDload ptr mem) 3346 for { 3347 t := v.Type 3348 ptr := v.Args[0] 3349 mem := v.Args[1] 3350 if !(is64BitFloat(t)) { 3351 break 3352 } 3353 v.reset(OpS390XFMOVDload) 3354 v.AddArg(ptr) 3355 v.AddArg(mem) 3356 return true 3357 } 3358 return false 3359 } 3360 func rewriteValueS390X_OpLsh16x16(v *Value, config *Config) bool { 3361 b := v.Block 3362 _ = b 3363 // match: (Lsh16x16 <t> x y) 3364 // cond: 3365 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3366 for { 3367 t := v.Type 3368 x := v.Args[0] 3369 y := v.Args[1] 3370 v.reset(OpS390XANDW) 3371 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3372 v0.AddArg(x) 3373 v0.AddArg(y) 3374 v.AddArg(v0) 3375 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3376 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3377 v2.AuxInt = 31 3378 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3379 v3.AddArg(y) 3380 v2.AddArg(v3) 3381 v1.AddArg(v2) 3382 v.AddArg(v1) 3383 return true 3384 } 3385 } 3386 func rewriteValueS390X_OpLsh16x32(v *Value, config *Config) bool { 3387 b := v.Block 3388 _ = b 3389 // match: (Lsh16x32 <t> x y) 3390 // cond: 3391 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3392 for { 3393 t := v.Type 3394 x := v.Args[0] 3395 y := v.Args[1] 3396 v.reset(OpS390XANDW) 3397 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3398 v0.AddArg(x) 3399 v0.AddArg(y) 3400 v.AddArg(v0) 3401 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3402 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3403 v2.AuxInt = 31 3404 v2.AddArg(y) 3405 v1.AddArg(v2) 3406 v.AddArg(v1) 3407 return true 3408 } 3409 } 3410 func rewriteValueS390X_OpLsh16x64(v *Value, config *Config) bool { 3411 b := v.Block 3412 _ = b 3413 // match: (Lsh16x64 <t> x y) 3414 // cond: 3415 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3416 for { 3417 t := v.Type 3418 x := v.Args[0] 3419 y := v.Args[1] 3420 v.reset(OpS390XANDW) 3421 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3422 v0.AddArg(x) 3423 v0.AddArg(y) 3424 v.AddArg(v0) 3425 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3426 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 3427 v2.AuxInt = 31 3428 v2.AddArg(y) 3429 v1.AddArg(v2) 3430 v.AddArg(v1) 3431 return true 3432 } 3433 } 3434 func rewriteValueS390X_OpLsh16x8(v *Value, config *Config) bool { 3435 b := v.Block 3436 _ = b 3437 // match: (Lsh16x8 <t> x y) 3438 // cond: 3439 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3440 for { 3441 t := v.Type 3442 x := v.Args[0] 3443 y := v.Args[1] 3444 v.reset(OpS390XANDW) 3445 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3446 v0.AddArg(x) 3447 v0.AddArg(y) 3448 v.AddArg(v0) 3449 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3450 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3451 v2.AuxInt = 31 3452 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3453 v3.AddArg(y) 3454 v2.AddArg(v3) 3455 v1.AddArg(v2) 3456 v.AddArg(v1) 3457 return true 3458 } 3459 } 3460 func rewriteValueS390X_OpLsh32x16(v *Value, config *Config) bool { 3461 b := v.Block 3462 _ = b 3463 // match: (Lsh32x16 <t> x y) 3464 // cond: 3465 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3466 for { 3467 t := v.Type 3468 x := v.Args[0] 3469 y := v.Args[1] 3470 v.reset(OpS390XANDW) 3471 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3472 v0.AddArg(x) 3473 v0.AddArg(y) 3474 v.AddArg(v0) 3475 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3476 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3477 v2.AuxInt = 31 3478 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3479 v3.AddArg(y) 3480 v2.AddArg(v3) 3481 v1.AddArg(v2) 3482 v.AddArg(v1) 3483 return true 3484 } 3485 } 3486 func rewriteValueS390X_OpLsh32x32(v *Value, config *Config) bool { 3487 b := v.Block 3488 _ = b 3489 // match: (Lsh32x32 <t> x y) 3490 // cond: 3491 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3492 for { 3493 t := v.Type 3494 x := v.Args[0] 3495 y := v.Args[1] 3496 v.reset(OpS390XANDW) 3497 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3498 v0.AddArg(x) 3499 v0.AddArg(y) 3500 v.AddArg(v0) 3501 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3502 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3503 v2.AuxInt = 31 3504 v2.AddArg(y) 3505 v1.AddArg(v2) 3506 v.AddArg(v1) 3507 return true 3508 } 3509 } 3510 func rewriteValueS390X_OpLsh32x64(v *Value, config *Config) bool { 3511 b := v.Block 3512 _ = b 3513 // match: (Lsh32x64 <t> x y) 3514 // cond: 3515 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3516 for { 3517 t := v.Type 3518 x := v.Args[0] 3519 y := v.Args[1] 3520 v.reset(OpS390XANDW) 3521 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3522 v0.AddArg(x) 3523 v0.AddArg(y) 3524 v.AddArg(v0) 3525 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3526 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 3527 v2.AuxInt = 31 3528 v2.AddArg(y) 3529 v1.AddArg(v2) 3530 v.AddArg(v1) 3531 return true 3532 } 3533 } 3534 func rewriteValueS390X_OpLsh32x8(v *Value, config *Config) bool { 3535 b := v.Block 3536 _ = b 3537 // match: (Lsh32x8 <t> x y) 3538 // cond: 3539 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3540 for { 3541 t := v.Type 3542 x := v.Args[0] 3543 y := v.Args[1] 3544 v.reset(OpS390XANDW) 3545 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3546 v0.AddArg(x) 3547 v0.AddArg(y) 3548 v.AddArg(v0) 3549 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3550 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3551 v2.AuxInt = 31 3552 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3553 v3.AddArg(y) 3554 v2.AddArg(v3) 3555 v1.AddArg(v2) 3556 v.AddArg(v1) 3557 return true 3558 } 3559 } 3560 func rewriteValueS390X_OpLsh64x16(v *Value, config *Config) bool { 3561 b := v.Block 3562 _ = b 3563 // match: (Lsh64x16 <t> x y) 3564 // cond: 3565 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 3566 for { 3567 t := v.Type 3568 x := v.Args[0] 3569 y := v.Args[1] 3570 v.reset(OpS390XAND) 3571 v0 := b.NewValue0(v.Pos, OpS390XSLD, t) 3572 v0.AddArg(x) 3573 v0.AddArg(y) 3574 v.AddArg(v0) 3575 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 3576 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3577 v2.AuxInt = 63 3578 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3579 v3.AddArg(y) 3580 v2.AddArg(v3) 3581 v1.AddArg(v2) 3582 v.AddArg(v1) 3583 return true 3584 } 3585 } 3586 func rewriteValueS390X_OpLsh64x32(v *Value, config *Config) bool { 3587 b := v.Block 3588 _ = b 3589 // match: (Lsh64x32 <t> x y) 3590 // cond: 3591 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 3592 for { 3593 t := v.Type 3594 x := v.Args[0] 3595 y := v.Args[1] 3596 v.reset(OpS390XAND) 3597 v0 := b.NewValue0(v.Pos, OpS390XSLD, t) 3598 v0.AddArg(x) 3599 v0.AddArg(y) 3600 v.AddArg(v0) 3601 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 3602 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3603 v2.AuxInt = 63 3604 v2.AddArg(y) 3605 v1.AddArg(v2) 3606 v.AddArg(v1) 3607 return true 3608 } 3609 } 3610 func rewriteValueS390X_OpLsh64x64(v *Value, config *Config) bool { 3611 b := v.Block 3612 _ = b 3613 // match: (Lsh64x64 <t> x y) 3614 // cond: 3615 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 3616 for { 3617 t := v.Type 3618 x := v.Args[0] 3619 y := v.Args[1] 3620 v.reset(OpS390XAND) 3621 v0 := b.NewValue0(v.Pos, OpS390XSLD, t) 3622 v0.AddArg(x) 3623 v0.AddArg(y) 3624 v.AddArg(v0) 3625 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 3626 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 3627 v2.AuxInt = 63 3628 v2.AddArg(y) 3629 v1.AddArg(v2) 3630 v.AddArg(v1) 3631 return true 3632 } 3633 } 3634 func rewriteValueS390X_OpLsh64x8(v *Value, config *Config) bool { 3635 b := v.Block 3636 _ = b 3637 // match: (Lsh64x8 <t> x y) 3638 // cond: 3639 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 3640 for { 3641 t := v.Type 3642 x := v.Args[0] 3643 y := v.Args[1] 3644 v.reset(OpS390XAND) 3645 v0 := b.NewValue0(v.Pos, OpS390XSLD, t) 3646 v0.AddArg(x) 3647 v0.AddArg(y) 3648 v.AddArg(v0) 3649 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 3650 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3651 v2.AuxInt = 63 3652 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3653 v3.AddArg(y) 3654 v2.AddArg(v3) 3655 v1.AddArg(v2) 3656 v.AddArg(v1) 3657 return true 3658 } 3659 } 3660 func rewriteValueS390X_OpLsh8x16(v *Value, config *Config) bool { 3661 b := v.Block 3662 _ = b 3663 // match: (Lsh8x16 <t> x y) 3664 // cond: 3665 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3666 for { 3667 t := v.Type 3668 x := v.Args[0] 3669 y := v.Args[1] 3670 v.reset(OpS390XANDW) 3671 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3672 v0.AddArg(x) 3673 v0.AddArg(y) 3674 v.AddArg(v0) 3675 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3676 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3677 v2.AuxInt = 31 3678 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3679 v3.AddArg(y) 3680 v2.AddArg(v3) 3681 v1.AddArg(v2) 3682 v.AddArg(v1) 3683 return true 3684 } 3685 } 3686 func rewriteValueS390X_OpLsh8x32(v *Value, config *Config) bool { 3687 b := v.Block 3688 _ = b 3689 // match: (Lsh8x32 <t> x y) 3690 // cond: 3691 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3692 for { 3693 t := v.Type 3694 x := v.Args[0] 3695 y := v.Args[1] 3696 v.reset(OpS390XANDW) 3697 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3698 v0.AddArg(x) 3699 v0.AddArg(y) 3700 v.AddArg(v0) 3701 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3702 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3703 v2.AuxInt = 31 3704 v2.AddArg(y) 3705 v1.AddArg(v2) 3706 v.AddArg(v1) 3707 return true 3708 } 3709 } 3710 func rewriteValueS390X_OpLsh8x64(v *Value, config *Config) bool { 3711 b := v.Block 3712 _ = b 3713 // match: (Lsh8x64 <t> x y) 3714 // cond: 3715 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3716 for { 3717 t := v.Type 3718 x := v.Args[0] 3719 y := v.Args[1] 3720 v.reset(OpS390XANDW) 3721 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3722 v0.AddArg(x) 3723 v0.AddArg(y) 3724 v.AddArg(v0) 3725 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3726 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 3727 v2.AuxInt = 31 3728 v2.AddArg(y) 3729 v1.AddArg(v2) 3730 v.AddArg(v1) 3731 return true 3732 } 3733 } 3734 func rewriteValueS390X_OpLsh8x8(v *Value, config *Config) bool { 3735 b := v.Block 3736 _ = b 3737 // match: (Lsh8x8 <t> x y) 3738 // cond: 3739 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3740 for { 3741 t := v.Type 3742 x := v.Args[0] 3743 y := v.Args[1] 3744 v.reset(OpS390XANDW) 3745 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3746 v0.AddArg(x) 3747 v0.AddArg(y) 3748 v.AddArg(v0) 3749 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3750 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3751 v2.AuxInt = 31 3752 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3753 v3.AddArg(y) 3754 v2.AddArg(v3) 3755 v1.AddArg(v2) 3756 v.AddArg(v1) 3757 return true 3758 } 3759 } 3760 func rewriteValueS390X_OpMod16(v *Value, config *Config) bool { 3761 b := v.Block 3762 _ = b 3763 // match: (Mod16 x y) 3764 // cond: 3765 // result: (MODW (MOVHreg x) (MOVHreg y)) 3766 for { 3767 x := v.Args[0] 3768 y := v.Args[1] 3769 v.reset(OpS390XMODW) 3770 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 3771 v0.AddArg(x) 3772 v.AddArg(v0) 3773 v1 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 3774 v1.AddArg(y) 3775 v.AddArg(v1) 3776 return true 3777 } 3778 } 3779 func rewriteValueS390X_OpMod16u(v *Value, config *Config) bool { 3780 b := v.Block 3781 _ = b 3782 // match: (Mod16u x y) 3783 // cond: 3784 // result: (MODWU (MOVHZreg x) (MOVHZreg y)) 3785 for { 3786 x := v.Args[0] 3787 y := v.Args[1] 3788 v.reset(OpS390XMODWU) 3789 v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3790 v0.AddArg(x) 3791 v.AddArg(v0) 3792 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3793 v1.AddArg(y) 3794 v.AddArg(v1) 3795 return true 3796 } 3797 } 3798 func rewriteValueS390X_OpMod32(v *Value, config *Config) bool { 3799 b := v.Block 3800 _ = b 3801 // match: (Mod32 x y) 3802 // cond: 3803 // result: (MODW (MOVWreg x) y) 3804 for { 3805 x := v.Args[0] 3806 y := v.Args[1] 3807 v.reset(OpS390XMODW) 3808 v0 := b.NewValue0(v.Pos, OpS390XMOVWreg, config.fe.TypeInt64()) 3809 v0.AddArg(x) 3810 v.AddArg(v0) 3811 v.AddArg(y) 3812 return true 3813 } 3814 } 3815 func rewriteValueS390X_OpMod32u(v *Value, config *Config) bool { 3816 b := v.Block 3817 _ = b 3818 // match: (Mod32u x y) 3819 // cond: 3820 // result: (MODWU (MOVWZreg x) y) 3821 for { 3822 x := v.Args[0] 3823 y := v.Args[1] 3824 v.reset(OpS390XMODWU) 3825 v0 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 3826 v0.AddArg(x) 3827 v.AddArg(v0) 3828 v.AddArg(y) 3829 return true 3830 } 3831 } 3832 func rewriteValueS390X_OpMod64(v *Value, config *Config) bool { 3833 b := v.Block 3834 _ = b 3835 // match: (Mod64 x y) 3836 // cond: 3837 // result: (MODD x y) 3838 for { 3839 x := v.Args[0] 3840 y := v.Args[1] 3841 v.reset(OpS390XMODD) 3842 v.AddArg(x) 3843 v.AddArg(y) 3844 return true 3845 } 3846 } 3847 func rewriteValueS390X_OpMod64u(v *Value, config *Config) bool { 3848 b := v.Block 3849 _ = b 3850 // match: (Mod64u x y) 3851 // cond: 3852 // result: (MODDU x y) 3853 for { 3854 x := v.Args[0] 3855 y := v.Args[1] 3856 v.reset(OpS390XMODDU) 3857 v.AddArg(x) 3858 v.AddArg(y) 3859 return true 3860 } 3861 } 3862 func rewriteValueS390X_OpMod8(v *Value, config *Config) bool { 3863 b := v.Block 3864 _ = b 3865 // match: (Mod8 x y) 3866 // cond: 3867 // result: (MODW (MOVBreg x) (MOVBreg y)) 3868 for { 3869 x := v.Args[0] 3870 y := v.Args[1] 3871 v.reset(OpS390XMODW) 3872 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 3873 v0.AddArg(x) 3874 v.AddArg(v0) 3875 v1 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 3876 v1.AddArg(y) 3877 v.AddArg(v1) 3878 return true 3879 } 3880 } 3881 func rewriteValueS390X_OpMod8u(v *Value, config *Config) bool { 3882 b := v.Block 3883 _ = b 3884 // match: (Mod8u x y) 3885 // cond: 3886 // result: (MODWU (MOVBZreg x) (MOVBZreg y)) 3887 for { 3888 x := v.Args[0] 3889 y := v.Args[1] 3890 v.reset(OpS390XMODWU) 3891 v0 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3892 v0.AddArg(x) 3893 v.AddArg(v0) 3894 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3895 v1.AddArg(y) 3896 v.AddArg(v1) 3897 return true 3898 } 3899 } 3900 func rewriteValueS390X_OpMove(v *Value, config *Config) bool { 3901 b := v.Block 3902 _ = b 3903 // match: (Move [s] _ _ mem) 3904 // cond: SizeAndAlign(s).Size() == 0 3905 // result: mem 3906 for { 3907 s := v.AuxInt 3908 mem := v.Args[2] 3909 if !(SizeAndAlign(s).Size() == 0) { 3910 break 3911 } 3912 v.reset(OpCopy) 3913 v.Type = mem.Type 3914 v.AddArg(mem) 3915 return true 3916 } 3917 // match: (Move [s] dst src mem) 3918 // cond: SizeAndAlign(s).Size() == 1 3919 // result: (MOVBstore dst (MOVBZload src mem) mem) 3920 for { 3921 s := v.AuxInt 3922 dst := v.Args[0] 3923 src := v.Args[1] 3924 mem := v.Args[2] 3925 if !(SizeAndAlign(s).Size() == 1) { 3926 break 3927 } 3928 v.reset(OpS390XMOVBstore) 3929 v.AddArg(dst) 3930 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, config.fe.TypeUInt8()) 3931 v0.AddArg(src) 3932 v0.AddArg(mem) 3933 v.AddArg(v0) 3934 v.AddArg(mem) 3935 return true 3936 } 3937 // match: (Move [s] dst src mem) 3938 // cond: SizeAndAlign(s).Size() == 2 3939 // result: (MOVHstore dst (MOVHZload src mem) mem) 3940 for { 3941 s := v.AuxInt 3942 dst := v.Args[0] 3943 src := v.Args[1] 3944 mem := v.Args[2] 3945 if !(SizeAndAlign(s).Size() == 2) { 3946 break 3947 } 3948 v.reset(OpS390XMOVHstore) 3949 v.AddArg(dst) 3950 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 3951 v0.AddArg(src) 3952 v0.AddArg(mem) 3953 v.AddArg(v0) 3954 v.AddArg(mem) 3955 return true 3956 } 3957 // match: (Move [s] dst src mem) 3958 // cond: SizeAndAlign(s).Size() == 4 3959 // result: (MOVWstore dst (MOVWZload src mem) mem) 3960 for { 3961 s := v.AuxInt 3962 dst := v.Args[0] 3963 src := v.Args[1] 3964 mem := v.Args[2] 3965 if !(SizeAndAlign(s).Size() == 4) { 3966 break 3967 } 3968 v.reset(OpS390XMOVWstore) 3969 v.AddArg(dst) 3970 v0 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 3971 v0.AddArg(src) 3972 v0.AddArg(mem) 3973 v.AddArg(v0) 3974 v.AddArg(mem) 3975 return true 3976 } 3977 // match: (Move [s] dst src mem) 3978 // cond: SizeAndAlign(s).Size() == 8 3979 // result: (MOVDstore dst (MOVDload src mem) mem) 3980 for { 3981 s := v.AuxInt 3982 dst := v.Args[0] 3983 src := v.Args[1] 3984 mem := v.Args[2] 3985 if !(SizeAndAlign(s).Size() == 8) { 3986 break 3987 } 3988 v.reset(OpS390XMOVDstore) 3989 v.AddArg(dst) 3990 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 3991 v0.AddArg(src) 3992 v0.AddArg(mem) 3993 v.AddArg(v0) 3994 v.AddArg(mem) 3995 return true 3996 } 3997 // match: (Move [s] dst src mem) 3998 // cond: SizeAndAlign(s).Size() == 16 3999 // result: (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem)) 4000 for { 4001 s := v.AuxInt 4002 dst := v.Args[0] 4003 src := v.Args[1] 4004 mem := v.Args[2] 4005 if !(SizeAndAlign(s).Size() == 16) { 4006 break 4007 } 4008 v.reset(OpS390XMOVDstore) 4009 v.AuxInt = 8 4010 v.AddArg(dst) 4011 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4012 v0.AuxInt = 8 4013 v0.AddArg(src) 4014 v0.AddArg(mem) 4015 v.AddArg(v0) 4016 v1 := b.NewValue0(v.Pos, OpS390XMOVDstore, TypeMem) 4017 v1.AddArg(dst) 4018 v2 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4019 v2.AddArg(src) 4020 v2.AddArg(mem) 4021 v1.AddArg(v2) 4022 v1.AddArg(mem) 4023 v.AddArg(v1) 4024 return true 4025 } 4026 // match: (Move [s] dst src mem) 4027 // cond: SizeAndAlign(s).Size() == 24 4028 // result: (MOVDstore [16] dst (MOVDload [16] src mem) (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))) 4029 for { 4030 s := v.AuxInt 4031 dst := v.Args[0] 4032 src := v.Args[1] 4033 mem := v.Args[2] 4034 if !(SizeAndAlign(s).Size() == 24) { 4035 break 4036 } 4037 v.reset(OpS390XMOVDstore) 4038 v.AuxInt = 16 4039 v.AddArg(dst) 4040 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4041 v0.AuxInt = 16 4042 v0.AddArg(src) 4043 v0.AddArg(mem) 4044 v.AddArg(v0) 4045 v1 := b.NewValue0(v.Pos, OpS390XMOVDstore, TypeMem) 4046 v1.AuxInt = 8 4047 v1.AddArg(dst) 4048 v2 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4049 v2.AuxInt = 8 4050 v2.AddArg(src) 4051 v2.AddArg(mem) 4052 v1.AddArg(v2) 4053 v3 := b.NewValue0(v.Pos, OpS390XMOVDstore, TypeMem) 4054 v3.AddArg(dst) 4055 v4 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4056 v4.AddArg(src) 4057 v4.AddArg(mem) 4058 v3.AddArg(v4) 4059 v3.AddArg(mem) 4060 v1.AddArg(v3) 4061 v.AddArg(v1) 4062 return true 4063 } 4064 // match: (Move [s] dst src mem) 4065 // cond: SizeAndAlign(s).Size() == 3 4066 // result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHZload src mem) mem)) 4067 for { 4068 s := v.AuxInt 4069 dst := v.Args[0] 4070 src := v.Args[1] 4071 mem := v.Args[2] 4072 if !(SizeAndAlign(s).Size() == 3) { 4073 break 4074 } 4075 v.reset(OpS390XMOVBstore) 4076 v.AuxInt = 2 4077 v.AddArg(dst) 4078 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, config.fe.TypeUInt8()) 4079 v0.AuxInt = 2 4080 v0.AddArg(src) 4081 v0.AddArg(mem) 4082 v.AddArg(v0) 4083 v1 := b.NewValue0(v.Pos, OpS390XMOVHstore, TypeMem) 4084 v1.AddArg(dst) 4085 v2 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 4086 v2.AddArg(src) 4087 v2.AddArg(mem) 4088 v1.AddArg(v2) 4089 v1.AddArg(mem) 4090 v.AddArg(v1) 4091 return true 4092 } 4093 // match: (Move [s] dst src mem) 4094 // cond: SizeAndAlign(s).Size() == 5 4095 // result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4096 for { 4097 s := v.AuxInt 4098 dst := v.Args[0] 4099 src := v.Args[1] 4100 mem := v.Args[2] 4101 if !(SizeAndAlign(s).Size() == 5) { 4102 break 4103 } 4104 v.reset(OpS390XMOVBstore) 4105 v.AuxInt = 4 4106 v.AddArg(dst) 4107 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, config.fe.TypeUInt8()) 4108 v0.AuxInt = 4 4109 v0.AddArg(src) 4110 v0.AddArg(mem) 4111 v.AddArg(v0) 4112 v1 := b.NewValue0(v.Pos, OpS390XMOVWstore, TypeMem) 4113 v1.AddArg(dst) 4114 v2 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 4115 v2.AddArg(src) 4116 v2.AddArg(mem) 4117 v1.AddArg(v2) 4118 v1.AddArg(mem) 4119 v.AddArg(v1) 4120 return true 4121 } 4122 // match: (Move [s] dst src mem) 4123 // cond: SizeAndAlign(s).Size() == 6 4124 // result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4125 for { 4126 s := v.AuxInt 4127 dst := v.Args[0] 4128 src := v.Args[1] 4129 mem := v.Args[2] 4130 if !(SizeAndAlign(s).Size() == 6) { 4131 break 4132 } 4133 v.reset(OpS390XMOVHstore) 4134 v.AuxInt = 4 4135 v.AddArg(dst) 4136 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 4137 v0.AuxInt = 4 4138 v0.AddArg(src) 4139 v0.AddArg(mem) 4140 v.AddArg(v0) 4141 v1 := b.NewValue0(v.Pos, OpS390XMOVWstore, TypeMem) 4142 v1.AddArg(dst) 4143 v2 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 4144 v2.AddArg(src) 4145 v2.AddArg(mem) 4146 v1.AddArg(v2) 4147 v1.AddArg(mem) 4148 v.AddArg(v1) 4149 return true 4150 } 4151 // match: (Move [s] dst src mem) 4152 // cond: SizeAndAlign(s).Size() == 7 4153 // result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))) 4154 for { 4155 s := v.AuxInt 4156 dst := v.Args[0] 4157 src := v.Args[1] 4158 mem := v.Args[2] 4159 if !(SizeAndAlign(s).Size() == 7) { 4160 break 4161 } 4162 v.reset(OpS390XMOVBstore) 4163 v.AuxInt = 6 4164 v.AddArg(dst) 4165 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, config.fe.TypeUInt8()) 4166 v0.AuxInt = 6 4167 v0.AddArg(src) 4168 v0.AddArg(mem) 4169 v.AddArg(v0) 4170 v1 := b.NewValue0(v.Pos, OpS390XMOVHstore, TypeMem) 4171 v1.AuxInt = 4 4172 v1.AddArg(dst) 4173 v2 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 4174 v2.AuxInt = 4 4175 v2.AddArg(src) 4176 v2.AddArg(mem) 4177 v1.AddArg(v2) 4178 v3 := b.NewValue0(v.Pos, OpS390XMOVWstore, TypeMem) 4179 v3.AddArg(dst) 4180 v4 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 4181 v4.AddArg(src) 4182 v4.AddArg(mem) 4183 v3.AddArg(v4) 4184 v3.AddArg(mem) 4185 v1.AddArg(v3) 4186 v.AddArg(v1) 4187 return true 4188 } 4189 // match: (Move [s] dst src mem) 4190 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256 4191 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size(), 0)] dst src mem) 4192 for { 4193 s := v.AuxInt 4194 dst := v.Args[0] 4195 src := v.Args[1] 4196 mem := v.Args[2] 4197 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256) { 4198 break 4199 } 4200 v.reset(OpS390XMVC) 4201 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 4202 v.AddArg(dst) 4203 v.AddArg(src) 4204 v.AddArg(mem) 4205 return true 4206 } 4207 // match: (Move [s] dst src mem) 4208 // cond: SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512 4209 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)) 4210 for { 4211 s := v.AuxInt 4212 dst := v.Args[0] 4213 src := v.Args[1] 4214 mem := v.Args[2] 4215 if !(SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512) { 4216 break 4217 } 4218 v.reset(OpS390XMVC) 4219 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-256, 256) 4220 v.AddArg(dst) 4221 v.AddArg(src) 4222 v0 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4223 v0.AuxInt = makeValAndOff(256, 0) 4224 v0.AddArg(dst) 4225 v0.AddArg(src) 4226 v0.AddArg(mem) 4227 v.AddArg(v0) 4228 return true 4229 } 4230 // match: (Move [s] dst src mem) 4231 // cond: SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768 4232 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-512, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem))) 4233 for { 4234 s := v.AuxInt 4235 dst := v.Args[0] 4236 src := v.Args[1] 4237 mem := v.Args[2] 4238 if !(SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768) { 4239 break 4240 } 4241 v.reset(OpS390XMVC) 4242 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-512, 512) 4243 v.AddArg(dst) 4244 v.AddArg(src) 4245 v0 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4246 v0.AuxInt = makeValAndOff(256, 256) 4247 v0.AddArg(dst) 4248 v0.AddArg(src) 4249 v1 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4250 v1.AuxInt = makeValAndOff(256, 0) 4251 v1.AddArg(dst) 4252 v1.AddArg(src) 4253 v1.AddArg(mem) 4254 v0.AddArg(v1) 4255 v.AddArg(v0) 4256 return true 4257 } 4258 // match: (Move [s] dst src mem) 4259 // cond: SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024 4260 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-768, 768)] dst src (MVC [makeValAndOff(256, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)))) 4261 for { 4262 s := v.AuxInt 4263 dst := v.Args[0] 4264 src := v.Args[1] 4265 mem := v.Args[2] 4266 if !(SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024) { 4267 break 4268 } 4269 v.reset(OpS390XMVC) 4270 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-768, 768) 4271 v.AddArg(dst) 4272 v.AddArg(src) 4273 v0 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4274 v0.AuxInt = makeValAndOff(256, 512) 4275 v0.AddArg(dst) 4276 v0.AddArg(src) 4277 v1 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4278 v1.AuxInt = makeValAndOff(256, 256) 4279 v1.AddArg(dst) 4280 v1.AddArg(src) 4281 v2 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4282 v2.AuxInt = makeValAndOff(256, 0) 4283 v2.AddArg(dst) 4284 v2.AddArg(src) 4285 v2.AddArg(mem) 4286 v1.AddArg(v2) 4287 v0.AddArg(v1) 4288 v.AddArg(v0) 4289 return true 4290 } 4291 // match: (Move [s] dst src mem) 4292 // cond: SizeAndAlign(s).Size() > 1024 4293 // result: (LoweredMove [SizeAndAlign(s).Size()%256] dst src (ADDconst <src.Type> src [(SizeAndAlign(s).Size()/256)*256]) mem) 4294 for { 4295 s := v.AuxInt 4296 dst := v.Args[0] 4297 src := v.Args[1] 4298 mem := v.Args[2] 4299 if !(SizeAndAlign(s).Size() > 1024) { 4300 break 4301 } 4302 v.reset(OpS390XLoweredMove) 4303 v.AuxInt = SizeAndAlign(s).Size() % 256 4304 v.AddArg(dst) 4305 v.AddArg(src) 4306 v0 := b.NewValue0(v.Pos, OpS390XADDconst, src.Type) 4307 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 4308 v0.AddArg(src) 4309 v.AddArg(v0) 4310 v.AddArg(mem) 4311 return true 4312 } 4313 return false 4314 } 4315 func rewriteValueS390X_OpMul16(v *Value, config *Config) bool { 4316 b := v.Block 4317 _ = b 4318 // match: (Mul16 x y) 4319 // cond: 4320 // result: (MULLW x y) 4321 for { 4322 x := v.Args[0] 4323 y := v.Args[1] 4324 v.reset(OpS390XMULLW) 4325 v.AddArg(x) 4326 v.AddArg(y) 4327 return true 4328 } 4329 } 4330 func rewriteValueS390X_OpMul32(v *Value, config *Config) bool { 4331 b := v.Block 4332 _ = b 4333 // match: (Mul32 x y) 4334 // cond: 4335 // result: (MULLW x y) 4336 for { 4337 x := v.Args[0] 4338 y := v.Args[1] 4339 v.reset(OpS390XMULLW) 4340 v.AddArg(x) 4341 v.AddArg(y) 4342 return true 4343 } 4344 } 4345 func rewriteValueS390X_OpMul32F(v *Value, config *Config) bool { 4346 b := v.Block 4347 _ = b 4348 // match: (Mul32F x y) 4349 // cond: 4350 // result: (FMULS x y) 4351 for { 4352 x := v.Args[0] 4353 y := v.Args[1] 4354 v.reset(OpS390XFMULS) 4355 v.AddArg(x) 4356 v.AddArg(y) 4357 return true 4358 } 4359 } 4360 func rewriteValueS390X_OpMul64(v *Value, config *Config) bool { 4361 b := v.Block 4362 _ = b 4363 // match: (Mul64 x y) 4364 // cond: 4365 // result: (MULLD x y) 4366 for { 4367 x := v.Args[0] 4368 y := v.Args[1] 4369 v.reset(OpS390XMULLD) 4370 v.AddArg(x) 4371 v.AddArg(y) 4372 return true 4373 } 4374 } 4375 func rewriteValueS390X_OpMul64F(v *Value, config *Config) bool { 4376 b := v.Block 4377 _ = b 4378 // match: (Mul64F x y) 4379 // cond: 4380 // result: (FMUL x y) 4381 for { 4382 x := v.Args[0] 4383 y := v.Args[1] 4384 v.reset(OpS390XFMUL) 4385 v.AddArg(x) 4386 v.AddArg(y) 4387 return true 4388 } 4389 } 4390 func rewriteValueS390X_OpMul8(v *Value, config *Config) bool { 4391 b := v.Block 4392 _ = b 4393 // match: (Mul8 x y) 4394 // cond: 4395 // result: (MULLW x y) 4396 for { 4397 x := v.Args[0] 4398 y := v.Args[1] 4399 v.reset(OpS390XMULLW) 4400 v.AddArg(x) 4401 v.AddArg(y) 4402 return true 4403 } 4404 } 4405 func rewriteValueS390X_OpNeg16(v *Value, config *Config) bool { 4406 b := v.Block 4407 _ = b 4408 // match: (Neg16 x) 4409 // cond: 4410 // result: (NEGW (MOVHreg x)) 4411 for { 4412 x := v.Args[0] 4413 v.reset(OpS390XNEGW) 4414 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4415 v0.AddArg(x) 4416 v.AddArg(v0) 4417 return true 4418 } 4419 } 4420 func rewriteValueS390X_OpNeg32(v *Value, config *Config) bool { 4421 b := v.Block 4422 _ = b 4423 // match: (Neg32 x) 4424 // cond: 4425 // result: (NEGW x) 4426 for { 4427 x := v.Args[0] 4428 v.reset(OpS390XNEGW) 4429 v.AddArg(x) 4430 return true 4431 } 4432 } 4433 func rewriteValueS390X_OpNeg32F(v *Value, config *Config) bool { 4434 b := v.Block 4435 _ = b 4436 // match: (Neg32F x) 4437 // cond: 4438 // result: (FNEGS x) 4439 for { 4440 x := v.Args[0] 4441 v.reset(OpS390XFNEGS) 4442 v.AddArg(x) 4443 return true 4444 } 4445 } 4446 func rewriteValueS390X_OpNeg64(v *Value, config *Config) bool { 4447 b := v.Block 4448 _ = b 4449 // match: (Neg64 x) 4450 // cond: 4451 // result: (NEG x) 4452 for { 4453 x := v.Args[0] 4454 v.reset(OpS390XNEG) 4455 v.AddArg(x) 4456 return true 4457 } 4458 } 4459 func rewriteValueS390X_OpNeg64F(v *Value, config *Config) bool { 4460 b := v.Block 4461 _ = b 4462 // match: (Neg64F x) 4463 // cond: 4464 // result: (FNEG x) 4465 for { 4466 x := v.Args[0] 4467 v.reset(OpS390XFNEG) 4468 v.AddArg(x) 4469 return true 4470 } 4471 } 4472 func rewriteValueS390X_OpNeg8(v *Value, config *Config) bool { 4473 b := v.Block 4474 _ = b 4475 // match: (Neg8 x) 4476 // cond: 4477 // result: (NEGW (MOVBreg x)) 4478 for { 4479 x := v.Args[0] 4480 v.reset(OpS390XNEGW) 4481 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4482 v0.AddArg(x) 4483 v.AddArg(v0) 4484 return true 4485 } 4486 } 4487 func rewriteValueS390X_OpNeq16(v *Value, config *Config) bool { 4488 b := v.Block 4489 _ = b 4490 // match: (Neq16 x y) 4491 // cond: 4492 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 4493 for { 4494 x := v.Args[0] 4495 y := v.Args[1] 4496 v.reset(OpS390XMOVDNE) 4497 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4498 v0.AuxInt = 0 4499 v.AddArg(v0) 4500 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4501 v1.AuxInt = 1 4502 v.AddArg(v1) 4503 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4504 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4505 v3.AddArg(x) 4506 v2.AddArg(v3) 4507 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4508 v4.AddArg(y) 4509 v2.AddArg(v4) 4510 v.AddArg(v2) 4511 return true 4512 } 4513 } 4514 func rewriteValueS390X_OpNeq32(v *Value, config *Config) bool { 4515 b := v.Block 4516 _ = b 4517 // match: (Neq32 x y) 4518 // cond: 4519 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 4520 for { 4521 x := v.Args[0] 4522 y := v.Args[1] 4523 v.reset(OpS390XMOVDNE) 4524 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4525 v0.AuxInt = 0 4526 v.AddArg(v0) 4527 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4528 v1.AuxInt = 1 4529 v.AddArg(v1) 4530 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 4531 v2.AddArg(x) 4532 v2.AddArg(y) 4533 v.AddArg(v2) 4534 return true 4535 } 4536 } 4537 func rewriteValueS390X_OpNeq32F(v *Value, config *Config) bool { 4538 b := v.Block 4539 _ = b 4540 // match: (Neq32F x y) 4541 // cond: 4542 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 4543 for { 4544 x := v.Args[0] 4545 y := v.Args[1] 4546 v.reset(OpS390XMOVDNE) 4547 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4548 v0.AuxInt = 0 4549 v.AddArg(v0) 4550 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4551 v1.AuxInt = 1 4552 v.AddArg(v1) 4553 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 4554 v2.AddArg(x) 4555 v2.AddArg(y) 4556 v.AddArg(v2) 4557 return true 4558 } 4559 } 4560 func rewriteValueS390X_OpNeq64(v *Value, config *Config) bool { 4561 b := v.Block 4562 _ = b 4563 // match: (Neq64 x y) 4564 // cond: 4565 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4566 for { 4567 x := v.Args[0] 4568 y := v.Args[1] 4569 v.reset(OpS390XMOVDNE) 4570 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4571 v0.AuxInt = 0 4572 v.AddArg(v0) 4573 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4574 v1.AuxInt = 1 4575 v.AddArg(v1) 4576 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4577 v2.AddArg(x) 4578 v2.AddArg(y) 4579 v.AddArg(v2) 4580 return true 4581 } 4582 } 4583 func rewriteValueS390X_OpNeq64F(v *Value, config *Config) bool { 4584 b := v.Block 4585 _ = b 4586 // match: (Neq64F x y) 4587 // cond: 4588 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 4589 for { 4590 x := v.Args[0] 4591 y := v.Args[1] 4592 v.reset(OpS390XMOVDNE) 4593 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4594 v0.AuxInt = 0 4595 v.AddArg(v0) 4596 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4597 v1.AuxInt = 1 4598 v.AddArg(v1) 4599 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 4600 v2.AddArg(x) 4601 v2.AddArg(y) 4602 v.AddArg(v2) 4603 return true 4604 } 4605 } 4606 func rewriteValueS390X_OpNeq8(v *Value, config *Config) bool { 4607 b := v.Block 4608 _ = b 4609 // match: (Neq8 x y) 4610 // cond: 4611 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4612 for { 4613 x := v.Args[0] 4614 y := v.Args[1] 4615 v.reset(OpS390XMOVDNE) 4616 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4617 v0.AuxInt = 0 4618 v.AddArg(v0) 4619 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4620 v1.AuxInt = 1 4621 v.AddArg(v1) 4622 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4623 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4624 v3.AddArg(x) 4625 v2.AddArg(v3) 4626 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4627 v4.AddArg(y) 4628 v2.AddArg(v4) 4629 v.AddArg(v2) 4630 return true 4631 } 4632 } 4633 func rewriteValueS390X_OpNeqB(v *Value, config *Config) bool { 4634 b := v.Block 4635 _ = b 4636 // match: (NeqB x y) 4637 // cond: 4638 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4639 for { 4640 x := v.Args[0] 4641 y := v.Args[1] 4642 v.reset(OpS390XMOVDNE) 4643 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4644 v0.AuxInt = 0 4645 v.AddArg(v0) 4646 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4647 v1.AuxInt = 1 4648 v.AddArg(v1) 4649 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4650 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4651 v3.AddArg(x) 4652 v2.AddArg(v3) 4653 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4654 v4.AddArg(y) 4655 v2.AddArg(v4) 4656 v.AddArg(v2) 4657 return true 4658 } 4659 } 4660 func rewriteValueS390X_OpNeqPtr(v *Value, config *Config) bool { 4661 b := v.Block 4662 _ = b 4663 // match: (NeqPtr x y) 4664 // cond: 4665 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4666 for { 4667 x := v.Args[0] 4668 y := v.Args[1] 4669 v.reset(OpS390XMOVDNE) 4670 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4671 v0.AuxInt = 0 4672 v.AddArg(v0) 4673 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4674 v1.AuxInt = 1 4675 v.AddArg(v1) 4676 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4677 v2.AddArg(x) 4678 v2.AddArg(y) 4679 v.AddArg(v2) 4680 return true 4681 } 4682 } 4683 func rewriteValueS390X_OpNilCheck(v *Value, config *Config) bool { 4684 b := v.Block 4685 _ = b 4686 // match: (NilCheck ptr mem) 4687 // cond: 4688 // result: (LoweredNilCheck ptr mem) 4689 for { 4690 ptr := v.Args[0] 4691 mem := v.Args[1] 4692 v.reset(OpS390XLoweredNilCheck) 4693 v.AddArg(ptr) 4694 v.AddArg(mem) 4695 return true 4696 } 4697 } 4698 func rewriteValueS390X_OpNot(v *Value, config *Config) bool { 4699 b := v.Block 4700 _ = b 4701 // match: (Not x) 4702 // cond: 4703 // result: (XORWconst [1] x) 4704 for { 4705 x := v.Args[0] 4706 v.reset(OpS390XXORWconst) 4707 v.AuxInt = 1 4708 v.AddArg(x) 4709 return true 4710 } 4711 } 4712 func rewriteValueS390X_OpOffPtr(v *Value, config *Config) bool { 4713 b := v.Block 4714 _ = b 4715 // match: (OffPtr [off] ptr:(SP)) 4716 // cond: 4717 // result: (MOVDaddr [off] ptr) 4718 for { 4719 off := v.AuxInt 4720 ptr := v.Args[0] 4721 if ptr.Op != OpSP { 4722 break 4723 } 4724 v.reset(OpS390XMOVDaddr) 4725 v.AuxInt = off 4726 v.AddArg(ptr) 4727 return true 4728 } 4729 // match: (OffPtr [off] ptr) 4730 // cond: is32Bit(off) 4731 // result: (ADDconst [off] ptr) 4732 for { 4733 off := v.AuxInt 4734 ptr := v.Args[0] 4735 if !(is32Bit(off)) { 4736 break 4737 } 4738 v.reset(OpS390XADDconst) 4739 v.AuxInt = off 4740 v.AddArg(ptr) 4741 return true 4742 } 4743 // match: (OffPtr [off] ptr) 4744 // cond: 4745 // result: (ADD (MOVDconst [off]) ptr) 4746 for { 4747 off := v.AuxInt 4748 ptr := v.Args[0] 4749 v.reset(OpS390XADD) 4750 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4751 v0.AuxInt = off 4752 v.AddArg(v0) 4753 v.AddArg(ptr) 4754 return true 4755 } 4756 } 4757 func rewriteValueS390X_OpOr16(v *Value, config *Config) bool { 4758 b := v.Block 4759 _ = b 4760 // match: (Or16 x y) 4761 // cond: 4762 // result: (ORW x y) 4763 for { 4764 x := v.Args[0] 4765 y := v.Args[1] 4766 v.reset(OpS390XORW) 4767 v.AddArg(x) 4768 v.AddArg(y) 4769 return true 4770 } 4771 } 4772 func rewriteValueS390X_OpOr32(v *Value, config *Config) bool { 4773 b := v.Block 4774 _ = b 4775 // match: (Or32 x y) 4776 // cond: 4777 // result: (ORW x y) 4778 for { 4779 x := v.Args[0] 4780 y := v.Args[1] 4781 v.reset(OpS390XORW) 4782 v.AddArg(x) 4783 v.AddArg(y) 4784 return true 4785 } 4786 } 4787 func rewriteValueS390X_OpOr64(v *Value, config *Config) bool { 4788 b := v.Block 4789 _ = b 4790 // match: (Or64 x y) 4791 // cond: 4792 // result: (OR x y) 4793 for { 4794 x := v.Args[0] 4795 y := v.Args[1] 4796 v.reset(OpS390XOR) 4797 v.AddArg(x) 4798 v.AddArg(y) 4799 return true 4800 } 4801 } 4802 func rewriteValueS390X_OpOr8(v *Value, config *Config) bool { 4803 b := v.Block 4804 _ = b 4805 // match: (Or8 x y) 4806 // cond: 4807 // result: (ORW x y) 4808 for { 4809 x := v.Args[0] 4810 y := v.Args[1] 4811 v.reset(OpS390XORW) 4812 v.AddArg(x) 4813 v.AddArg(y) 4814 return true 4815 } 4816 } 4817 func rewriteValueS390X_OpOrB(v *Value, config *Config) bool { 4818 b := v.Block 4819 _ = b 4820 // match: (OrB x y) 4821 // cond: 4822 // result: (ORW x y) 4823 for { 4824 x := v.Args[0] 4825 y := v.Args[1] 4826 v.reset(OpS390XORW) 4827 v.AddArg(x) 4828 v.AddArg(y) 4829 return true 4830 } 4831 } 4832 func rewriteValueS390X_OpRsh16Ux16(v *Value, config *Config) bool { 4833 b := v.Block 4834 _ = b 4835 // match: (Rsh16Ux16 <t> x y) 4836 // cond: 4837 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [15]))) 4838 for { 4839 t := v.Type 4840 x := v.Args[0] 4841 y := v.Args[1] 4842 v.reset(OpS390XANDW) 4843 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 4844 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4845 v1.AddArg(x) 4846 v0.AddArg(v1) 4847 v0.AddArg(y) 4848 v.AddArg(v0) 4849 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 4850 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4851 v3.AuxInt = 15 4852 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4853 v4.AddArg(y) 4854 v3.AddArg(v4) 4855 v2.AddArg(v3) 4856 v.AddArg(v2) 4857 return true 4858 } 4859 } 4860 func rewriteValueS390X_OpRsh16Ux32(v *Value, config *Config) bool { 4861 b := v.Block 4862 _ = b 4863 // match: (Rsh16Ux32 <t> x y) 4864 // cond: 4865 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [15]))) 4866 for { 4867 t := v.Type 4868 x := v.Args[0] 4869 y := v.Args[1] 4870 v.reset(OpS390XANDW) 4871 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 4872 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4873 v1.AddArg(x) 4874 v0.AddArg(v1) 4875 v0.AddArg(y) 4876 v.AddArg(v0) 4877 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 4878 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4879 v3.AuxInt = 15 4880 v3.AddArg(y) 4881 v2.AddArg(v3) 4882 v.AddArg(v2) 4883 return true 4884 } 4885 } 4886 func rewriteValueS390X_OpRsh16Ux64(v *Value, config *Config) bool { 4887 b := v.Block 4888 _ = b 4889 // match: (Rsh16Ux64 <t> x y) 4890 // cond: 4891 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [15]))) 4892 for { 4893 t := v.Type 4894 x := v.Args[0] 4895 y := v.Args[1] 4896 v.reset(OpS390XANDW) 4897 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 4898 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4899 v1.AddArg(x) 4900 v0.AddArg(v1) 4901 v0.AddArg(y) 4902 v.AddArg(v0) 4903 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 4904 v3 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 4905 v3.AuxInt = 15 4906 v3.AddArg(y) 4907 v2.AddArg(v3) 4908 v.AddArg(v2) 4909 return true 4910 } 4911 } 4912 func rewriteValueS390X_OpRsh16Ux8(v *Value, config *Config) bool { 4913 b := v.Block 4914 _ = b 4915 // match: (Rsh16Ux8 <t> x y) 4916 // cond: 4917 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [15]))) 4918 for { 4919 t := v.Type 4920 x := v.Args[0] 4921 y := v.Args[1] 4922 v.reset(OpS390XANDW) 4923 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 4924 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4925 v1.AddArg(x) 4926 v0.AddArg(v1) 4927 v0.AddArg(y) 4928 v.AddArg(v0) 4929 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 4930 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4931 v3.AuxInt = 15 4932 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 4933 v4.AddArg(y) 4934 v3.AddArg(v4) 4935 v2.AddArg(v3) 4936 v.AddArg(v2) 4937 return true 4938 } 4939 } 4940 func rewriteValueS390X_OpRsh16x16(v *Value, config *Config) bool { 4941 b := v.Block 4942 _ = b 4943 // match: (Rsh16x16 <t> x y) 4944 // cond: 4945 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [15]))))) 4946 for { 4947 t := v.Type 4948 x := v.Args[0] 4949 y := v.Args[1] 4950 v.reset(OpS390XSRAW) 4951 v.Type = t 4952 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4953 v0.AddArg(x) 4954 v.AddArg(v0) 4955 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 4956 v1.AddArg(y) 4957 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 4958 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 4959 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4960 v4.AuxInt = 15 4961 v5 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4962 v5.AddArg(y) 4963 v4.AddArg(v5) 4964 v3.AddArg(v4) 4965 v2.AddArg(v3) 4966 v1.AddArg(v2) 4967 v.AddArg(v1) 4968 return true 4969 } 4970 } 4971 func rewriteValueS390X_OpRsh16x32(v *Value, config *Config) bool { 4972 b := v.Block 4973 _ = b 4974 // match: (Rsh16x32 <t> x y) 4975 // cond: 4976 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [15]))))) 4977 for { 4978 t := v.Type 4979 x := v.Args[0] 4980 y := v.Args[1] 4981 v.reset(OpS390XSRAW) 4982 v.Type = t 4983 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4984 v0.AddArg(x) 4985 v.AddArg(v0) 4986 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 4987 v1.AddArg(y) 4988 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 4989 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 4990 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4991 v4.AuxInt = 15 4992 v4.AddArg(y) 4993 v3.AddArg(v4) 4994 v2.AddArg(v3) 4995 v1.AddArg(v2) 4996 v.AddArg(v1) 4997 return true 4998 } 4999 } 5000 func rewriteValueS390X_OpRsh16x64(v *Value, config *Config) bool { 5001 b := v.Block 5002 _ = b 5003 // match: (Rsh16x64 <t> x y) 5004 // cond: 5005 // result: (SRAW <t> (MOVHreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [15]))))) 5006 for { 5007 t := v.Type 5008 x := v.Args[0] 5009 y := v.Args[1] 5010 v.reset(OpS390XSRAW) 5011 v.Type = t 5012 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 5013 v0.AddArg(x) 5014 v.AddArg(v0) 5015 v1 := b.NewValue0(v.Pos, OpS390XOR, y.Type) 5016 v1.AddArg(y) 5017 v2 := b.NewValue0(v.Pos, OpS390XNOT, y.Type) 5018 v3 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, y.Type) 5019 v4 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5020 v4.AuxInt = 15 5021 v4.AddArg(y) 5022 v3.AddArg(v4) 5023 v2.AddArg(v3) 5024 v1.AddArg(v2) 5025 v.AddArg(v1) 5026 return true 5027 } 5028 } 5029 func rewriteValueS390X_OpRsh16x8(v *Value, config *Config) bool { 5030 b := v.Block 5031 _ = b 5032 // match: (Rsh16x8 <t> x y) 5033 // cond: 5034 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [15]))))) 5035 for { 5036 t := v.Type 5037 x := v.Args[0] 5038 y := v.Args[1] 5039 v.reset(OpS390XSRAW) 5040 v.Type = t 5041 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 5042 v0.AddArg(x) 5043 v.AddArg(v0) 5044 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5045 v1.AddArg(y) 5046 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5047 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5048 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5049 v4.AuxInt = 15 5050 v5 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5051 v5.AddArg(y) 5052 v4.AddArg(v5) 5053 v3.AddArg(v4) 5054 v2.AddArg(v3) 5055 v1.AddArg(v2) 5056 v.AddArg(v1) 5057 return true 5058 } 5059 } 5060 func rewriteValueS390X_OpRsh32Ux16(v *Value, config *Config) bool { 5061 b := v.Block 5062 _ = b 5063 // match: (Rsh32Ux16 <t> x y) 5064 // cond: 5065 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 5066 for { 5067 t := v.Type 5068 x := v.Args[0] 5069 y := v.Args[1] 5070 v.reset(OpS390XANDW) 5071 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5072 v0.AddArg(x) 5073 v0.AddArg(y) 5074 v.AddArg(v0) 5075 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5076 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5077 v2.AuxInt = 31 5078 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5079 v3.AddArg(y) 5080 v2.AddArg(v3) 5081 v1.AddArg(v2) 5082 v.AddArg(v1) 5083 return true 5084 } 5085 } 5086 func rewriteValueS390X_OpRsh32Ux32(v *Value, config *Config) bool { 5087 b := v.Block 5088 _ = b 5089 // match: (Rsh32Ux32 <t> x y) 5090 // cond: 5091 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 5092 for { 5093 t := v.Type 5094 x := v.Args[0] 5095 y := v.Args[1] 5096 v.reset(OpS390XANDW) 5097 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5098 v0.AddArg(x) 5099 v0.AddArg(y) 5100 v.AddArg(v0) 5101 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5102 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5103 v2.AuxInt = 31 5104 v2.AddArg(y) 5105 v1.AddArg(v2) 5106 v.AddArg(v1) 5107 return true 5108 } 5109 } 5110 func rewriteValueS390X_OpRsh32Ux64(v *Value, config *Config) bool { 5111 b := v.Block 5112 _ = b 5113 // match: (Rsh32Ux64 <t> x y) 5114 // cond: 5115 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 5116 for { 5117 t := v.Type 5118 x := v.Args[0] 5119 y := v.Args[1] 5120 v.reset(OpS390XANDW) 5121 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5122 v0.AddArg(x) 5123 v0.AddArg(y) 5124 v.AddArg(v0) 5125 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5126 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5127 v2.AuxInt = 31 5128 v2.AddArg(y) 5129 v1.AddArg(v2) 5130 v.AddArg(v1) 5131 return true 5132 } 5133 } 5134 func rewriteValueS390X_OpRsh32Ux8(v *Value, config *Config) bool { 5135 b := v.Block 5136 _ = b 5137 // match: (Rsh32Ux8 <t> x y) 5138 // cond: 5139 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 5140 for { 5141 t := v.Type 5142 x := v.Args[0] 5143 y := v.Args[1] 5144 v.reset(OpS390XANDW) 5145 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5146 v0.AddArg(x) 5147 v0.AddArg(y) 5148 v.AddArg(v0) 5149 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5150 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5151 v2.AuxInt = 31 5152 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5153 v3.AddArg(y) 5154 v2.AddArg(v3) 5155 v1.AddArg(v2) 5156 v.AddArg(v1) 5157 return true 5158 } 5159 } 5160 func rewriteValueS390X_OpRsh32x16(v *Value, config *Config) bool { 5161 b := v.Block 5162 _ = b 5163 // match: (Rsh32x16 <t> x y) 5164 // cond: 5165 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [31]))))) 5166 for { 5167 t := v.Type 5168 x := v.Args[0] 5169 y := v.Args[1] 5170 v.reset(OpS390XSRAW) 5171 v.Type = t 5172 v.AddArg(x) 5173 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5174 v0.AddArg(y) 5175 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5176 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5177 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5178 v3.AuxInt = 31 5179 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5180 v4.AddArg(y) 5181 v3.AddArg(v4) 5182 v2.AddArg(v3) 5183 v1.AddArg(v2) 5184 v0.AddArg(v1) 5185 v.AddArg(v0) 5186 return true 5187 } 5188 } 5189 func rewriteValueS390X_OpRsh32x32(v *Value, config *Config) bool { 5190 b := v.Block 5191 _ = b 5192 // match: (Rsh32x32 <t> x y) 5193 // cond: 5194 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [31]))))) 5195 for { 5196 t := v.Type 5197 x := v.Args[0] 5198 y := v.Args[1] 5199 v.reset(OpS390XSRAW) 5200 v.Type = t 5201 v.AddArg(x) 5202 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5203 v0.AddArg(y) 5204 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5205 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5206 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5207 v3.AuxInt = 31 5208 v3.AddArg(y) 5209 v2.AddArg(v3) 5210 v1.AddArg(v2) 5211 v0.AddArg(v1) 5212 v.AddArg(v0) 5213 return true 5214 } 5215 } 5216 func rewriteValueS390X_OpRsh32x64(v *Value, config *Config) bool { 5217 b := v.Block 5218 _ = b 5219 // match: (Rsh32x64 <t> x y) 5220 // cond: 5221 // result: (SRAW <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [31]))))) 5222 for { 5223 t := v.Type 5224 x := v.Args[0] 5225 y := v.Args[1] 5226 v.reset(OpS390XSRAW) 5227 v.Type = t 5228 v.AddArg(x) 5229 v0 := b.NewValue0(v.Pos, OpS390XOR, y.Type) 5230 v0.AddArg(y) 5231 v1 := b.NewValue0(v.Pos, OpS390XNOT, y.Type) 5232 v2 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, y.Type) 5233 v3 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5234 v3.AuxInt = 31 5235 v3.AddArg(y) 5236 v2.AddArg(v3) 5237 v1.AddArg(v2) 5238 v0.AddArg(v1) 5239 v.AddArg(v0) 5240 return true 5241 } 5242 } 5243 func rewriteValueS390X_OpRsh32x8(v *Value, config *Config) bool { 5244 b := v.Block 5245 _ = b 5246 // match: (Rsh32x8 <t> x y) 5247 // cond: 5248 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [31]))))) 5249 for { 5250 t := v.Type 5251 x := v.Args[0] 5252 y := v.Args[1] 5253 v.reset(OpS390XSRAW) 5254 v.Type = t 5255 v.AddArg(x) 5256 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5257 v0.AddArg(y) 5258 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5259 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5260 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5261 v3.AuxInt = 31 5262 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5263 v4.AddArg(y) 5264 v3.AddArg(v4) 5265 v2.AddArg(v3) 5266 v1.AddArg(v2) 5267 v0.AddArg(v1) 5268 v.AddArg(v0) 5269 return true 5270 } 5271 } 5272 func rewriteValueS390X_OpRsh64Ux16(v *Value, config *Config) bool { 5273 b := v.Block 5274 _ = b 5275 // match: (Rsh64Ux16 <t> x y) 5276 // cond: 5277 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 5278 for { 5279 t := v.Type 5280 x := v.Args[0] 5281 y := v.Args[1] 5282 v.reset(OpS390XAND) 5283 v0 := b.NewValue0(v.Pos, OpS390XSRD, t) 5284 v0.AddArg(x) 5285 v0.AddArg(y) 5286 v.AddArg(v0) 5287 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 5288 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5289 v2.AuxInt = 63 5290 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5291 v3.AddArg(y) 5292 v2.AddArg(v3) 5293 v1.AddArg(v2) 5294 v.AddArg(v1) 5295 return true 5296 } 5297 } 5298 func rewriteValueS390X_OpRsh64Ux32(v *Value, config *Config) bool { 5299 b := v.Block 5300 _ = b 5301 // match: (Rsh64Ux32 <t> x y) 5302 // cond: 5303 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 5304 for { 5305 t := v.Type 5306 x := v.Args[0] 5307 y := v.Args[1] 5308 v.reset(OpS390XAND) 5309 v0 := b.NewValue0(v.Pos, OpS390XSRD, t) 5310 v0.AddArg(x) 5311 v0.AddArg(y) 5312 v.AddArg(v0) 5313 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 5314 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5315 v2.AuxInt = 63 5316 v2.AddArg(y) 5317 v1.AddArg(v2) 5318 v.AddArg(v1) 5319 return true 5320 } 5321 } 5322 func rewriteValueS390X_OpRsh64Ux64(v *Value, config *Config) bool { 5323 b := v.Block 5324 _ = b 5325 // match: (Rsh64Ux64 <t> x y) 5326 // cond: 5327 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 5328 for { 5329 t := v.Type 5330 x := v.Args[0] 5331 y := v.Args[1] 5332 v.reset(OpS390XAND) 5333 v0 := b.NewValue0(v.Pos, OpS390XSRD, t) 5334 v0.AddArg(x) 5335 v0.AddArg(y) 5336 v.AddArg(v0) 5337 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 5338 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5339 v2.AuxInt = 63 5340 v2.AddArg(y) 5341 v1.AddArg(v2) 5342 v.AddArg(v1) 5343 return true 5344 } 5345 } 5346 func rewriteValueS390X_OpRsh64Ux8(v *Value, config *Config) bool { 5347 b := v.Block 5348 _ = b 5349 // match: (Rsh64Ux8 <t> x y) 5350 // cond: 5351 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 5352 for { 5353 t := v.Type 5354 x := v.Args[0] 5355 y := v.Args[1] 5356 v.reset(OpS390XAND) 5357 v0 := b.NewValue0(v.Pos, OpS390XSRD, t) 5358 v0.AddArg(x) 5359 v0.AddArg(y) 5360 v.AddArg(v0) 5361 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 5362 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5363 v2.AuxInt = 63 5364 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5365 v3.AddArg(y) 5366 v2.AddArg(v3) 5367 v1.AddArg(v2) 5368 v.AddArg(v1) 5369 return true 5370 } 5371 } 5372 func rewriteValueS390X_OpRsh64x16(v *Value, config *Config) bool { 5373 b := v.Block 5374 _ = b 5375 // match: (Rsh64x16 <t> x y) 5376 // cond: 5377 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [63]))))) 5378 for { 5379 t := v.Type 5380 x := v.Args[0] 5381 y := v.Args[1] 5382 v.reset(OpS390XSRAD) 5383 v.Type = t 5384 v.AddArg(x) 5385 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5386 v0.AddArg(y) 5387 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5388 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5389 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5390 v3.AuxInt = 63 5391 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5392 v4.AddArg(y) 5393 v3.AddArg(v4) 5394 v2.AddArg(v3) 5395 v1.AddArg(v2) 5396 v0.AddArg(v1) 5397 v.AddArg(v0) 5398 return true 5399 } 5400 } 5401 func rewriteValueS390X_OpRsh64x32(v *Value, config *Config) bool { 5402 b := v.Block 5403 _ = b 5404 // match: (Rsh64x32 <t> x y) 5405 // cond: 5406 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [63]))))) 5407 for { 5408 t := v.Type 5409 x := v.Args[0] 5410 y := v.Args[1] 5411 v.reset(OpS390XSRAD) 5412 v.Type = t 5413 v.AddArg(x) 5414 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5415 v0.AddArg(y) 5416 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5417 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5418 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5419 v3.AuxInt = 63 5420 v3.AddArg(y) 5421 v2.AddArg(v3) 5422 v1.AddArg(v2) 5423 v0.AddArg(v1) 5424 v.AddArg(v0) 5425 return true 5426 } 5427 } 5428 func rewriteValueS390X_OpRsh64x64(v *Value, config *Config) bool { 5429 b := v.Block 5430 _ = b 5431 // match: (Rsh64x64 <t> x y) 5432 // cond: 5433 // result: (SRAD <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [63]))))) 5434 for { 5435 t := v.Type 5436 x := v.Args[0] 5437 y := v.Args[1] 5438 v.reset(OpS390XSRAD) 5439 v.Type = t 5440 v.AddArg(x) 5441 v0 := b.NewValue0(v.Pos, OpS390XOR, y.Type) 5442 v0.AddArg(y) 5443 v1 := b.NewValue0(v.Pos, OpS390XNOT, y.Type) 5444 v2 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, y.Type) 5445 v3 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5446 v3.AuxInt = 63 5447 v3.AddArg(y) 5448 v2.AddArg(v3) 5449 v1.AddArg(v2) 5450 v0.AddArg(v1) 5451 v.AddArg(v0) 5452 return true 5453 } 5454 } 5455 func rewriteValueS390X_OpRsh64x8(v *Value, config *Config) bool { 5456 b := v.Block 5457 _ = b 5458 // match: (Rsh64x8 <t> x y) 5459 // cond: 5460 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [63]))))) 5461 for { 5462 t := v.Type 5463 x := v.Args[0] 5464 y := v.Args[1] 5465 v.reset(OpS390XSRAD) 5466 v.Type = t 5467 v.AddArg(x) 5468 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5469 v0.AddArg(y) 5470 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5471 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5472 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5473 v3.AuxInt = 63 5474 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5475 v4.AddArg(y) 5476 v3.AddArg(v4) 5477 v2.AddArg(v3) 5478 v1.AddArg(v2) 5479 v0.AddArg(v1) 5480 v.AddArg(v0) 5481 return true 5482 } 5483 } 5484 func rewriteValueS390X_OpRsh8Ux16(v *Value, config *Config) bool { 5485 b := v.Block 5486 _ = b 5487 // match: (Rsh8Ux16 <t> x y) 5488 // cond: 5489 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [7]))) 5490 for { 5491 t := v.Type 5492 x := v.Args[0] 5493 y := v.Args[1] 5494 v.reset(OpS390XANDW) 5495 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5496 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5497 v1.AddArg(x) 5498 v0.AddArg(v1) 5499 v0.AddArg(y) 5500 v.AddArg(v0) 5501 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5502 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5503 v3.AuxInt = 7 5504 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5505 v4.AddArg(y) 5506 v3.AddArg(v4) 5507 v2.AddArg(v3) 5508 v.AddArg(v2) 5509 return true 5510 } 5511 } 5512 func rewriteValueS390X_OpRsh8Ux32(v *Value, config *Config) bool { 5513 b := v.Block 5514 _ = b 5515 // match: (Rsh8Ux32 <t> x y) 5516 // cond: 5517 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [7]))) 5518 for { 5519 t := v.Type 5520 x := v.Args[0] 5521 y := v.Args[1] 5522 v.reset(OpS390XANDW) 5523 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5524 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5525 v1.AddArg(x) 5526 v0.AddArg(v1) 5527 v0.AddArg(y) 5528 v.AddArg(v0) 5529 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5530 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5531 v3.AuxInt = 7 5532 v3.AddArg(y) 5533 v2.AddArg(v3) 5534 v.AddArg(v2) 5535 return true 5536 } 5537 } 5538 func rewriteValueS390X_OpRsh8Ux64(v *Value, config *Config) bool { 5539 b := v.Block 5540 _ = b 5541 // match: (Rsh8Ux64 <t> x y) 5542 // cond: 5543 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [7]))) 5544 for { 5545 t := v.Type 5546 x := v.Args[0] 5547 y := v.Args[1] 5548 v.reset(OpS390XANDW) 5549 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5550 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5551 v1.AddArg(x) 5552 v0.AddArg(v1) 5553 v0.AddArg(y) 5554 v.AddArg(v0) 5555 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5556 v3 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5557 v3.AuxInt = 7 5558 v3.AddArg(y) 5559 v2.AddArg(v3) 5560 v.AddArg(v2) 5561 return true 5562 } 5563 } 5564 func rewriteValueS390X_OpRsh8Ux8(v *Value, config *Config) bool { 5565 b := v.Block 5566 _ = b 5567 // match: (Rsh8Ux8 <t> x y) 5568 // cond: 5569 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [7]))) 5570 for { 5571 t := v.Type 5572 x := v.Args[0] 5573 y := v.Args[1] 5574 v.reset(OpS390XANDW) 5575 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5576 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5577 v1.AddArg(x) 5578 v0.AddArg(v1) 5579 v0.AddArg(y) 5580 v.AddArg(v0) 5581 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5582 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5583 v3.AuxInt = 7 5584 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5585 v4.AddArg(y) 5586 v3.AddArg(v4) 5587 v2.AddArg(v3) 5588 v.AddArg(v2) 5589 return true 5590 } 5591 } 5592 func rewriteValueS390X_OpRsh8x16(v *Value, config *Config) bool { 5593 b := v.Block 5594 _ = b 5595 // match: (Rsh8x16 <t> x y) 5596 // cond: 5597 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [7]))))) 5598 for { 5599 t := v.Type 5600 x := v.Args[0] 5601 y := v.Args[1] 5602 v.reset(OpS390XSRAW) 5603 v.Type = t 5604 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 5605 v0.AddArg(x) 5606 v.AddArg(v0) 5607 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5608 v1.AddArg(y) 5609 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5610 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5611 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5612 v4.AuxInt = 7 5613 v5 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5614 v5.AddArg(y) 5615 v4.AddArg(v5) 5616 v3.AddArg(v4) 5617 v2.AddArg(v3) 5618 v1.AddArg(v2) 5619 v.AddArg(v1) 5620 return true 5621 } 5622 } 5623 func rewriteValueS390X_OpRsh8x32(v *Value, config *Config) bool { 5624 b := v.Block 5625 _ = b 5626 // match: (Rsh8x32 <t> x y) 5627 // cond: 5628 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [7]))))) 5629 for { 5630 t := v.Type 5631 x := v.Args[0] 5632 y := v.Args[1] 5633 v.reset(OpS390XSRAW) 5634 v.Type = t 5635 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 5636 v0.AddArg(x) 5637 v.AddArg(v0) 5638 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5639 v1.AddArg(y) 5640 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5641 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5642 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5643 v4.AuxInt = 7 5644 v4.AddArg(y) 5645 v3.AddArg(v4) 5646 v2.AddArg(v3) 5647 v1.AddArg(v2) 5648 v.AddArg(v1) 5649 return true 5650 } 5651 } 5652 func rewriteValueS390X_OpRsh8x64(v *Value, config *Config) bool { 5653 b := v.Block 5654 _ = b 5655 // match: (Rsh8x64 <t> x y) 5656 // cond: 5657 // result: (SRAW <t> (MOVBreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [7]))))) 5658 for { 5659 t := v.Type 5660 x := v.Args[0] 5661 y := v.Args[1] 5662 v.reset(OpS390XSRAW) 5663 v.Type = t 5664 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 5665 v0.AddArg(x) 5666 v.AddArg(v0) 5667 v1 := b.NewValue0(v.Pos, OpS390XOR, y.Type) 5668 v1.AddArg(y) 5669 v2 := b.NewValue0(v.Pos, OpS390XNOT, y.Type) 5670 v3 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, y.Type) 5671 v4 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5672 v4.AuxInt = 7 5673 v4.AddArg(y) 5674 v3.AddArg(v4) 5675 v2.AddArg(v3) 5676 v1.AddArg(v2) 5677 v.AddArg(v1) 5678 return true 5679 } 5680 } 5681 func rewriteValueS390X_OpRsh8x8(v *Value, config *Config) bool { 5682 b := v.Block 5683 _ = b 5684 // match: (Rsh8x8 <t> x y) 5685 // cond: 5686 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [7]))))) 5687 for { 5688 t := v.Type 5689 x := v.Args[0] 5690 y := v.Args[1] 5691 v.reset(OpS390XSRAW) 5692 v.Type = t 5693 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 5694 v0.AddArg(x) 5695 v.AddArg(v0) 5696 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5697 v1.AddArg(y) 5698 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5699 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5700 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5701 v4.AuxInt = 7 5702 v5 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5703 v5.AddArg(y) 5704 v4.AddArg(v5) 5705 v3.AddArg(v4) 5706 v2.AddArg(v3) 5707 v1.AddArg(v2) 5708 v.AddArg(v1) 5709 return true 5710 } 5711 } 5712 func rewriteValueS390X_OpS390XADD(v *Value, config *Config) bool { 5713 b := v.Block 5714 _ = b 5715 // match: (ADD x (MOVDconst [c])) 5716 // cond: is32Bit(c) 5717 // result: (ADDconst [c] x) 5718 for { 5719 x := v.Args[0] 5720 v_1 := v.Args[1] 5721 if v_1.Op != OpS390XMOVDconst { 5722 break 5723 } 5724 c := v_1.AuxInt 5725 if !(is32Bit(c)) { 5726 break 5727 } 5728 v.reset(OpS390XADDconst) 5729 v.AuxInt = c 5730 v.AddArg(x) 5731 return true 5732 } 5733 // match: (ADD (MOVDconst [c]) x) 5734 // cond: is32Bit(c) 5735 // result: (ADDconst [c] x) 5736 for { 5737 v_0 := v.Args[0] 5738 if v_0.Op != OpS390XMOVDconst { 5739 break 5740 } 5741 c := v_0.AuxInt 5742 x := v.Args[1] 5743 if !(is32Bit(c)) { 5744 break 5745 } 5746 v.reset(OpS390XADDconst) 5747 v.AuxInt = c 5748 v.AddArg(x) 5749 return true 5750 } 5751 // match: (ADD (SLDconst x [c]) (SRDconst x [64-c])) 5752 // cond: 5753 // result: (RLLGconst [ c] x) 5754 for { 5755 v_0 := v.Args[0] 5756 if v_0.Op != OpS390XSLDconst { 5757 break 5758 } 5759 c := v_0.AuxInt 5760 x := v_0.Args[0] 5761 v_1 := v.Args[1] 5762 if v_1.Op != OpS390XSRDconst { 5763 break 5764 } 5765 if v_1.AuxInt != 64-c { 5766 break 5767 } 5768 if x != v_1.Args[0] { 5769 break 5770 } 5771 v.reset(OpS390XRLLGconst) 5772 v.AuxInt = c 5773 v.AddArg(x) 5774 return true 5775 } 5776 // match: (ADD (SRDconst x [c]) (SLDconst x [64-c])) 5777 // cond: 5778 // result: (RLLGconst [64-c] x) 5779 for { 5780 v_0 := v.Args[0] 5781 if v_0.Op != OpS390XSRDconst { 5782 break 5783 } 5784 c := v_0.AuxInt 5785 x := v_0.Args[0] 5786 v_1 := v.Args[1] 5787 if v_1.Op != OpS390XSLDconst { 5788 break 5789 } 5790 if v_1.AuxInt != 64-c { 5791 break 5792 } 5793 if x != v_1.Args[0] { 5794 break 5795 } 5796 v.reset(OpS390XRLLGconst) 5797 v.AuxInt = 64 - c 5798 v.AddArg(x) 5799 return true 5800 } 5801 // match: (ADD x (MOVDaddr [c] {s} y)) 5802 // cond: x.Op != OpSB && y.Op != OpSB 5803 // result: (MOVDaddridx [c] {s} x y) 5804 for { 5805 x := v.Args[0] 5806 v_1 := v.Args[1] 5807 if v_1.Op != OpS390XMOVDaddr { 5808 break 5809 } 5810 c := v_1.AuxInt 5811 s := v_1.Aux 5812 y := v_1.Args[0] 5813 if !(x.Op != OpSB && y.Op != OpSB) { 5814 break 5815 } 5816 v.reset(OpS390XMOVDaddridx) 5817 v.AuxInt = c 5818 v.Aux = s 5819 v.AddArg(x) 5820 v.AddArg(y) 5821 return true 5822 } 5823 // match: (ADD (MOVDaddr [c] {s} x) y) 5824 // cond: x.Op != OpSB && y.Op != OpSB 5825 // result: (MOVDaddridx [c] {s} x y) 5826 for { 5827 v_0 := v.Args[0] 5828 if v_0.Op != OpS390XMOVDaddr { 5829 break 5830 } 5831 c := v_0.AuxInt 5832 s := v_0.Aux 5833 x := v_0.Args[0] 5834 y := v.Args[1] 5835 if !(x.Op != OpSB && y.Op != OpSB) { 5836 break 5837 } 5838 v.reset(OpS390XMOVDaddridx) 5839 v.AuxInt = c 5840 v.Aux = s 5841 v.AddArg(x) 5842 v.AddArg(y) 5843 return true 5844 } 5845 // match: (ADD x (NEG y)) 5846 // cond: 5847 // result: (SUB x y) 5848 for { 5849 x := v.Args[0] 5850 v_1 := v.Args[1] 5851 if v_1.Op != OpS390XNEG { 5852 break 5853 } 5854 y := v_1.Args[0] 5855 v.reset(OpS390XSUB) 5856 v.AddArg(x) 5857 v.AddArg(y) 5858 return true 5859 } 5860 // match: (ADD <t> x g:(MOVDload [off] {sym} ptr mem)) 5861 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5862 // result: (ADDload <t> [off] {sym} x ptr mem) 5863 for { 5864 t := v.Type 5865 x := v.Args[0] 5866 g := v.Args[1] 5867 if g.Op != OpS390XMOVDload { 5868 break 5869 } 5870 off := g.AuxInt 5871 sym := g.Aux 5872 ptr := g.Args[0] 5873 mem := g.Args[1] 5874 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5875 break 5876 } 5877 v.reset(OpS390XADDload) 5878 v.Type = t 5879 v.AuxInt = off 5880 v.Aux = sym 5881 v.AddArg(x) 5882 v.AddArg(ptr) 5883 v.AddArg(mem) 5884 return true 5885 } 5886 // match: (ADD <t> g:(MOVDload [off] {sym} ptr mem) x) 5887 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5888 // result: (ADDload <t> [off] {sym} x ptr mem) 5889 for { 5890 t := v.Type 5891 g := v.Args[0] 5892 if g.Op != OpS390XMOVDload { 5893 break 5894 } 5895 off := g.AuxInt 5896 sym := g.Aux 5897 ptr := g.Args[0] 5898 mem := g.Args[1] 5899 x := v.Args[1] 5900 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5901 break 5902 } 5903 v.reset(OpS390XADDload) 5904 v.Type = t 5905 v.AuxInt = off 5906 v.Aux = sym 5907 v.AddArg(x) 5908 v.AddArg(ptr) 5909 v.AddArg(mem) 5910 return true 5911 } 5912 return false 5913 } 5914 func rewriteValueS390X_OpS390XADDW(v *Value, config *Config) bool { 5915 b := v.Block 5916 _ = b 5917 // match: (ADDW x (MOVDconst [c])) 5918 // cond: 5919 // result: (ADDWconst [c] x) 5920 for { 5921 x := v.Args[0] 5922 v_1 := v.Args[1] 5923 if v_1.Op != OpS390XMOVDconst { 5924 break 5925 } 5926 c := v_1.AuxInt 5927 v.reset(OpS390XADDWconst) 5928 v.AuxInt = c 5929 v.AddArg(x) 5930 return true 5931 } 5932 // match: (ADDW (MOVDconst [c]) x) 5933 // cond: 5934 // result: (ADDWconst [c] x) 5935 for { 5936 v_0 := v.Args[0] 5937 if v_0.Op != OpS390XMOVDconst { 5938 break 5939 } 5940 c := v_0.AuxInt 5941 x := v.Args[1] 5942 v.reset(OpS390XADDWconst) 5943 v.AuxInt = c 5944 v.AddArg(x) 5945 return true 5946 } 5947 // match: (ADDW (SLWconst x [c]) (SRWconst x [32-c])) 5948 // cond: 5949 // result: (RLLconst [ c] x) 5950 for { 5951 v_0 := v.Args[0] 5952 if v_0.Op != OpS390XSLWconst { 5953 break 5954 } 5955 c := v_0.AuxInt 5956 x := v_0.Args[0] 5957 v_1 := v.Args[1] 5958 if v_1.Op != OpS390XSRWconst { 5959 break 5960 } 5961 if v_1.AuxInt != 32-c { 5962 break 5963 } 5964 if x != v_1.Args[0] { 5965 break 5966 } 5967 v.reset(OpS390XRLLconst) 5968 v.AuxInt = c 5969 v.AddArg(x) 5970 return true 5971 } 5972 // match: (ADDW (SRWconst x [c]) (SLWconst x [32-c])) 5973 // cond: 5974 // result: (RLLconst [32-c] x) 5975 for { 5976 v_0 := v.Args[0] 5977 if v_0.Op != OpS390XSRWconst { 5978 break 5979 } 5980 c := v_0.AuxInt 5981 x := v_0.Args[0] 5982 v_1 := v.Args[1] 5983 if v_1.Op != OpS390XSLWconst { 5984 break 5985 } 5986 if v_1.AuxInt != 32-c { 5987 break 5988 } 5989 if x != v_1.Args[0] { 5990 break 5991 } 5992 v.reset(OpS390XRLLconst) 5993 v.AuxInt = 32 - c 5994 v.AddArg(x) 5995 return true 5996 } 5997 // match: (ADDW x (NEGW y)) 5998 // cond: 5999 // result: (SUBW x y) 6000 for { 6001 x := v.Args[0] 6002 v_1 := v.Args[1] 6003 if v_1.Op != OpS390XNEGW { 6004 break 6005 } 6006 y := v_1.Args[0] 6007 v.reset(OpS390XSUBW) 6008 v.AddArg(x) 6009 v.AddArg(y) 6010 return true 6011 } 6012 // match: (ADDW <t> x g:(MOVWload [off] {sym} ptr mem)) 6013 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6014 // result: (ADDWload <t> [off] {sym} x ptr mem) 6015 for { 6016 t := v.Type 6017 x := v.Args[0] 6018 g := v.Args[1] 6019 if g.Op != OpS390XMOVWload { 6020 break 6021 } 6022 off := g.AuxInt 6023 sym := g.Aux 6024 ptr := g.Args[0] 6025 mem := g.Args[1] 6026 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6027 break 6028 } 6029 v.reset(OpS390XADDWload) 6030 v.Type = t 6031 v.AuxInt = off 6032 v.Aux = sym 6033 v.AddArg(x) 6034 v.AddArg(ptr) 6035 v.AddArg(mem) 6036 return true 6037 } 6038 // match: (ADDW <t> g:(MOVWload [off] {sym} ptr mem) x) 6039 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6040 // result: (ADDWload <t> [off] {sym} x ptr mem) 6041 for { 6042 t := v.Type 6043 g := v.Args[0] 6044 if g.Op != OpS390XMOVWload { 6045 break 6046 } 6047 off := g.AuxInt 6048 sym := g.Aux 6049 ptr := g.Args[0] 6050 mem := g.Args[1] 6051 x := v.Args[1] 6052 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6053 break 6054 } 6055 v.reset(OpS390XADDWload) 6056 v.Type = t 6057 v.AuxInt = off 6058 v.Aux = sym 6059 v.AddArg(x) 6060 v.AddArg(ptr) 6061 v.AddArg(mem) 6062 return true 6063 } 6064 // match: (ADDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6065 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6066 // result: (ADDWload <t> [off] {sym} x ptr mem) 6067 for { 6068 t := v.Type 6069 x := v.Args[0] 6070 g := v.Args[1] 6071 if g.Op != OpS390XMOVWZload { 6072 break 6073 } 6074 off := g.AuxInt 6075 sym := g.Aux 6076 ptr := g.Args[0] 6077 mem := g.Args[1] 6078 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6079 break 6080 } 6081 v.reset(OpS390XADDWload) 6082 v.Type = t 6083 v.AuxInt = off 6084 v.Aux = sym 6085 v.AddArg(x) 6086 v.AddArg(ptr) 6087 v.AddArg(mem) 6088 return true 6089 } 6090 // match: (ADDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6091 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6092 // result: (ADDWload <t> [off] {sym} x ptr mem) 6093 for { 6094 t := v.Type 6095 g := v.Args[0] 6096 if g.Op != OpS390XMOVWZload { 6097 break 6098 } 6099 off := g.AuxInt 6100 sym := g.Aux 6101 ptr := g.Args[0] 6102 mem := g.Args[1] 6103 x := v.Args[1] 6104 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6105 break 6106 } 6107 v.reset(OpS390XADDWload) 6108 v.Type = t 6109 v.AuxInt = off 6110 v.Aux = sym 6111 v.AddArg(x) 6112 v.AddArg(ptr) 6113 v.AddArg(mem) 6114 return true 6115 } 6116 return false 6117 } 6118 func rewriteValueS390X_OpS390XADDWconst(v *Value, config *Config) bool { 6119 b := v.Block 6120 _ = b 6121 // match: (ADDWconst [c] x) 6122 // cond: int32(c)==0 6123 // result: x 6124 for { 6125 c := v.AuxInt 6126 x := v.Args[0] 6127 if !(int32(c) == 0) { 6128 break 6129 } 6130 v.reset(OpCopy) 6131 v.Type = x.Type 6132 v.AddArg(x) 6133 return true 6134 } 6135 // match: (ADDWconst [c] (MOVDconst [d])) 6136 // cond: 6137 // result: (MOVDconst [int64(int32(c+d))]) 6138 for { 6139 c := v.AuxInt 6140 v_0 := v.Args[0] 6141 if v_0.Op != OpS390XMOVDconst { 6142 break 6143 } 6144 d := v_0.AuxInt 6145 v.reset(OpS390XMOVDconst) 6146 v.AuxInt = int64(int32(c + d)) 6147 return true 6148 } 6149 // match: (ADDWconst [c] (ADDWconst [d] x)) 6150 // cond: 6151 // result: (ADDWconst [int64(int32(c+d))] x) 6152 for { 6153 c := v.AuxInt 6154 v_0 := v.Args[0] 6155 if v_0.Op != OpS390XADDWconst { 6156 break 6157 } 6158 d := v_0.AuxInt 6159 x := v_0.Args[0] 6160 v.reset(OpS390XADDWconst) 6161 v.AuxInt = int64(int32(c + d)) 6162 v.AddArg(x) 6163 return true 6164 } 6165 return false 6166 } 6167 func rewriteValueS390X_OpS390XADDconst(v *Value, config *Config) bool { 6168 b := v.Block 6169 _ = b 6170 // match: (ADDconst [c] (MOVDaddr [d] {s} x:(SB))) 6171 // cond: ((c+d)&1 == 0) && is32Bit(c+d) 6172 // result: (MOVDaddr [c+d] {s} x) 6173 for { 6174 c := v.AuxInt 6175 v_0 := v.Args[0] 6176 if v_0.Op != OpS390XMOVDaddr { 6177 break 6178 } 6179 d := v_0.AuxInt 6180 s := v_0.Aux 6181 x := v_0.Args[0] 6182 if x.Op != OpSB { 6183 break 6184 } 6185 if !(((c+d)&1 == 0) && is32Bit(c+d)) { 6186 break 6187 } 6188 v.reset(OpS390XMOVDaddr) 6189 v.AuxInt = c + d 6190 v.Aux = s 6191 v.AddArg(x) 6192 return true 6193 } 6194 // match: (ADDconst [c] (MOVDaddr [d] {s} x)) 6195 // cond: x.Op != OpSB && is20Bit(c+d) 6196 // result: (MOVDaddr [c+d] {s} x) 6197 for { 6198 c := v.AuxInt 6199 v_0 := v.Args[0] 6200 if v_0.Op != OpS390XMOVDaddr { 6201 break 6202 } 6203 d := v_0.AuxInt 6204 s := v_0.Aux 6205 x := v_0.Args[0] 6206 if !(x.Op != OpSB && is20Bit(c+d)) { 6207 break 6208 } 6209 v.reset(OpS390XMOVDaddr) 6210 v.AuxInt = c + d 6211 v.Aux = s 6212 v.AddArg(x) 6213 return true 6214 } 6215 // match: (ADDconst [c] (MOVDaddridx [d] {s} x y)) 6216 // cond: is20Bit(c+d) 6217 // result: (MOVDaddridx [c+d] {s} x y) 6218 for { 6219 c := v.AuxInt 6220 v_0 := v.Args[0] 6221 if v_0.Op != OpS390XMOVDaddridx { 6222 break 6223 } 6224 d := v_0.AuxInt 6225 s := v_0.Aux 6226 x := v_0.Args[0] 6227 y := v_0.Args[1] 6228 if !(is20Bit(c + d)) { 6229 break 6230 } 6231 v.reset(OpS390XMOVDaddridx) 6232 v.AuxInt = c + d 6233 v.Aux = s 6234 v.AddArg(x) 6235 v.AddArg(y) 6236 return true 6237 } 6238 // match: (ADDconst [0] x) 6239 // cond: 6240 // result: x 6241 for { 6242 if v.AuxInt != 0 { 6243 break 6244 } 6245 x := v.Args[0] 6246 v.reset(OpCopy) 6247 v.Type = x.Type 6248 v.AddArg(x) 6249 return true 6250 } 6251 // match: (ADDconst [c] (MOVDconst [d])) 6252 // cond: 6253 // result: (MOVDconst [c+d]) 6254 for { 6255 c := v.AuxInt 6256 v_0 := v.Args[0] 6257 if v_0.Op != OpS390XMOVDconst { 6258 break 6259 } 6260 d := v_0.AuxInt 6261 v.reset(OpS390XMOVDconst) 6262 v.AuxInt = c + d 6263 return true 6264 } 6265 // match: (ADDconst [c] (ADDconst [d] x)) 6266 // cond: is32Bit(c+d) 6267 // result: (ADDconst [c+d] x) 6268 for { 6269 c := v.AuxInt 6270 v_0 := v.Args[0] 6271 if v_0.Op != OpS390XADDconst { 6272 break 6273 } 6274 d := v_0.AuxInt 6275 x := v_0.Args[0] 6276 if !(is32Bit(c + d)) { 6277 break 6278 } 6279 v.reset(OpS390XADDconst) 6280 v.AuxInt = c + d 6281 v.AddArg(x) 6282 return true 6283 } 6284 return false 6285 } 6286 func rewriteValueS390X_OpS390XAND(v *Value, config *Config) bool { 6287 b := v.Block 6288 _ = b 6289 // match: (AND x (MOVDconst [c])) 6290 // cond: is32Bit(c) && c < 0 6291 // result: (ANDconst [c] x) 6292 for { 6293 x := v.Args[0] 6294 v_1 := v.Args[1] 6295 if v_1.Op != OpS390XMOVDconst { 6296 break 6297 } 6298 c := v_1.AuxInt 6299 if !(is32Bit(c) && c < 0) { 6300 break 6301 } 6302 v.reset(OpS390XANDconst) 6303 v.AuxInt = c 6304 v.AddArg(x) 6305 return true 6306 } 6307 // match: (AND (MOVDconst [c]) x) 6308 // cond: is32Bit(c) && c < 0 6309 // result: (ANDconst [c] x) 6310 for { 6311 v_0 := v.Args[0] 6312 if v_0.Op != OpS390XMOVDconst { 6313 break 6314 } 6315 c := v_0.AuxInt 6316 x := v.Args[1] 6317 if !(is32Bit(c) && c < 0) { 6318 break 6319 } 6320 v.reset(OpS390XANDconst) 6321 v.AuxInt = c 6322 v.AddArg(x) 6323 return true 6324 } 6325 // match: (AND (MOVDconst [0xFF]) x) 6326 // cond: 6327 // result: (MOVBZreg x) 6328 for { 6329 v_0 := v.Args[0] 6330 if v_0.Op != OpS390XMOVDconst { 6331 break 6332 } 6333 if v_0.AuxInt != 0xFF { 6334 break 6335 } 6336 x := v.Args[1] 6337 v.reset(OpS390XMOVBZreg) 6338 v.AddArg(x) 6339 return true 6340 } 6341 // match: (AND x (MOVDconst [0xFF])) 6342 // cond: 6343 // result: (MOVBZreg x) 6344 for { 6345 x := v.Args[0] 6346 v_1 := v.Args[1] 6347 if v_1.Op != OpS390XMOVDconst { 6348 break 6349 } 6350 if v_1.AuxInt != 0xFF { 6351 break 6352 } 6353 v.reset(OpS390XMOVBZreg) 6354 v.AddArg(x) 6355 return true 6356 } 6357 // match: (AND (MOVDconst [0xFFFF]) x) 6358 // cond: 6359 // result: (MOVHZreg x) 6360 for { 6361 v_0 := v.Args[0] 6362 if v_0.Op != OpS390XMOVDconst { 6363 break 6364 } 6365 if v_0.AuxInt != 0xFFFF { 6366 break 6367 } 6368 x := v.Args[1] 6369 v.reset(OpS390XMOVHZreg) 6370 v.AddArg(x) 6371 return true 6372 } 6373 // match: (AND x (MOVDconst [0xFFFF])) 6374 // cond: 6375 // result: (MOVHZreg x) 6376 for { 6377 x := v.Args[0] 6378 v_1 := v.Args[1] 6379 if v_1.Op != OpS390XMOVDconst { 6380 break 6381 } 6382 if v_1.AuxInt != 0xFFFF { 6383 break 6384 } 6385 v.reset(OpS390XMOVHZreg) 6386 v.AddArg(x) 6387 return true 6388 } 6389 // match: (AND (MOVDconst [0xFFFFFFFF]) x) 6390 // cond: 6391 // result: (MOVWZreg x) 6392 for { 6393 v_0 := v.Args[0] 6394 if v_0.Op != OpS390XMOVDconst { 6395 break 6396 } 6397 if v_0.AuxInt != 0xFFFFFFFF { 6398 break 6399 } 6400 x := v.Args[1] 6401 v.reset(OpS390XMOVWZreg) 6402 v.AddArg(x) 6403 return true 6404 } 6405 // match: (AND x (MOVDconst [0xFFFFFFFF])) 6406 // cond: 6407 // result: (MOVWZreg x) 6408 for { 6409 x := v.Args[0] 6410 v_1 := v.Args[1] 6411 if v_1.Op != OpS390XMOVDconst { 6412 break 6413 } 6414 if v_1.AuxInt != 0xFFFFFFFF { 6415 break 6416 } 6417 v.reset(OpS390XMOVWZreg) 6418 v.AddArg(x) 6419 return true 6420 } 6421 // match: (AND (MOVDconst [c]) (MOVDconst [d])) 6422 // cond: 6423 // result: (MOVDconst [c&d]) 6424 for { 6425 v_0 := v.Args[0] 6426 if v_0.Op != OpS390XMOVDconst { 6427 break 6428 } 6429 c := v_0.AuxInt 6430 v_1 := v.Args[1] 6431 if v_1.Op != OpS390XMOVDconst { 6432 break 6433 } 6434 d := v_1.AuxInt 6435 v.reset(OpS390XMOVDconst) 6436 v.AuxInt = c & d 6437 return true 6438 } 6439 // match: (AND x x) 6440 // cond: 6441 // result: x 6442 for { 6443 x := v.Args[0] 6444 if x != v.Args[1] { 6445 break 6446 } 6447 v.reset(OpCopy) 6448 v.Type = x.Type 6449 v.AddArg(x) 6450 return true 6451 } 6452 // match: (AND <t> x g:(MOVDload [off] {sym} ptr mem)) 6453 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6454 // result: (ANDload <t> [off] {sym} x ptr mem) 6455 for { 6456 t := v.Type 6457 x := v.Args[0] 6458 g := v.Args[1] 6459 if g.Op != OpS390XMOVDload { 6460 break 6461 } 6462 off := g.AuxInt 6463 sym := g.Aux 6464 ptr := g.Args[0] 6465 mem := g.Args[1] 6466 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6467 break 6468 } 6469 v.reset(OpS390XANDload) 6470 v.Type = t 6471 v.AuxInt = off 6472 v.Aux = sym 6473 v.AddArg(x) 6474 v.AddArg(ptr) 6475 v.AddArg(mem) 6476 return true 6477 } 6478 // match: (AND <t> g:(MOVDload [off] {sym} ptr mem) x) 6479 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6480 // result: (ANDload <t> [off] {sym} x ptr mem) 6481 for { 6482 t := v.Type 6483 g := v.Args[0] 6484 if g.Op != OpS390XMOVDload { 6485 break 6486 } 6487 off := g.AuxInt 6488 sym := g.Aux 6489 ptr := g.Args[0] 6490 mem := g.Args[1] 6491 x := v.Args[1] 6492 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6493 break 6494 } 6495 v.reset(OpS390XANDload) 6496 v.Type = t 6497 v.AuxInt = off 6498 v.Aux = sym 6499 v.AddArg(x) 6500 v.AddArg(ptr) 6501 v.AddArg(mem) 6502 return true 6503 } 6504 return false 6505 } 6506 func rewriteValueS390X_OpS390XANDW(v *Value, config *Config) bool { 6507 b := v.Block 6508 _ = b 6509 // match: (ANDW x (MOVDconst [c])) 6510 // cond: 6511 // result: (ANDWconst [c] x) 6512 for { 6513 x := v.Args[0] 6514 v_1 := v.Args[1] 6515 if v_1.Op != OpS390XMOVDconst { 6516 break 6517 } 6518 c := v_1.AuxInt 6519 v.reset(OpS390XANDWconst) 6520 v.AuxInt = c 6521 v.AddArg(x) 6522 return true 6523 } 6524 // match: (ANDW (MOVDconst [c]) x) 6525 // cond: 6526 // result: (ANDWconst [c] x) 6527 for { 6528 v_0 := v.Args[0] 6529 if v_0.Op != OpS390XMOVDconst { 6530 break 6531 } 6532 c := v_0.AuxInt 6533 x := v.Args[1] 6534 v.reset(OpS390XANDWconst) 6535 v.AuxInt = c 6536 v.AddArg(x) 6537 return true 6538 } 6539 // match: (ANDW x x) 6540 // cond: 6541 // result: x 6542 for { 6543 x := v.Args[0] 6544 if x != v.Args[1] { 6545 break 6546 } 6547 v.reset(OpCopy) 6548 v.Type = x.Type 6549 v.AddArg(x) 6550 return true 6551 } 6552 // match: (ANDW <t> x g:(MOVWload [off] {sym} ptr mem)) 6553 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6554 // result: (ANDWload <t> [off] {sym} x ptr mem) 6555 for { 6556 t := v.Type 6557 x := v.Args[0] 6558 g := v.Args[1] 6559 if g.Op != OpS390XMOVWload { 6560 break 6561 } 6562 off := g.AuxInt 6563 sym := g.Aux 6564 ptr := g.Args[0] 6565 mem := g.Args[1] 6566 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6567 break 6568 } 6569 v.reset(OpS390XANDWload) 6570 v.Type = t 6571 v.AuxInt = off 6572 v.Aux = sym 6573 v.AddArg(x) 6574 v.AddArg(ptr) 6575 v.AddArg(mem) 6576 return true 6577 } 6578 // match: (ANDW <t> g:(MOVWload [off] {sym} ptr mem) x) 6579 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6580 // result: (ANDWload <t> [off] {sym} x ptr mem) 6581 for { 6582 t := v.Type 6583 g := v.Args[0] 6584 if g.Op != OpS390XMOVWload { 6585 break 6586 } 6587 off := g.AuxInt 6588 sym := g.Aux 6589 ptr := g.Args[0] 6590 mem := g.Args[1] 6591 x := v.Args[1] 6592 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6593 break 6594 } 6595 v.reset(OpS390XANDWload) 6596 v.Type = t 6597 v.AuxInt = off 6598 v.Aux = sym 6599 v.AddArg(x) 6600 v.AddArg(ptr) 6601 v.AddArg(mem) 6602 return true 6603 } 6604 // match: (ANDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6605 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6606 // result: (ANDWload <t> [off] {sym} x ptr mem) 6607 for { 6608 t := v.Type 6609 x := v.Args[0] 6610 g := v.Args[1] 6611 if g.Op != OpS390XMOVWZload { 6612 break 6613 } 6614 off := g.AuxInt 6615 sym := g.Aux 6616 ptr := g.Args[0] 6617 mem := g.Args[1] 6618 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6619 break 6620 } 6621 v.reset(OpS390XANDWload) 6622 v.Type = t 6623 v.AuxInt = off 6624 v.Aux = sym 6625 v.AddArg(x) 6626 v.AddArg(ptr) 6627 v.AddArg(mem) 6628 return true 6629 } 6630 // match: (ANDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6631 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6632 // result: (ANDWload <t> [off] {sym} x ptr mem) 6633 for { 6634 t := v.Type 6635 g := v.Args[0] 6636 if g.Op != OpS390XMOVWZload { 6637 break 6638 } 6639 off := g.AuxInt 6640 sym := g.Aux 6641 ptr := g.Args[0] 6642 mem := g.Args[1] 6643 x := v.Args[1] 6644 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6645 break 6646 } 6647 v.reset(OpS390XANDWload) 6648 v.Type = t 6649 v.AuxInt = off 6650 v.Aux = sym 6651 v.AddArg(x) 6652 v.AddArg(ptr) 6653 v.AddArg(mem) 6654 return true 6655 } 6656 return false 6657 } 6658 func rewriteValueS390X_OpS390XANDWconst(v *Value, config *Config) bool { 6659 b := v.Block 6660 _ = b 6661 // match: (ANDWconst [c] (ANDWconst [d] x)) 6662 // cond: 6663 // result: (ANDWconst [c & d] x) 6664 for { 6665 c := v.AuxInt 6666 v_0 := v.Args[0] 6667 if v_0.Op != OpS390XANDWconst { 6668 break 6669 } 6670 d := v_0.AuxInt 6671 x := v_0.Args[0] 6672 v.reset(OpS390XANDWconst) 6673 v.AuxInt = c & d 6674 v.AddArg(x) 6675 return true 6676 } 6677 // match: (ANDWconst [0xFF] x) 6678 // cond: 6679 // result: (MOVBZreg x) 6680 for { 6681 if v.AuxInt != 0xFF { 6682 break 6683 } 6684 x := v.Args[0] 6685 v.reset(OpS390XMOVBZreg) 6686 v.AddArg(x) 6687 return true 6688 } 6689 // match: (ANDWconst [0xFFFF] x) 6690 // cond: 6691 // result: (MOVHZreg x) 6692 for { 6693 if v.AuxInt != 0xFFFF { 6694 break 6695 } 6696 x := v.Args[0] 6697 v.reset(OpS390XMOVHZreg) 6698 v.AddArg(x) 6699 return true 6700 } 6701 // match: (ANDWconst [c] _) 6702 // cond: int32(c)==0 6703 // result: (MOVDconst [0]) 6704 for { 6705 c := v.AuxInt 6706 if !(int32(c) == 0) { 6707 break 6708 } 6709 v.reset(OpS390XMOVDconst) 6710 v.AuxInt = 0 6711 return true 6712 } 6713 // match: (ANDWconst [c] x) 6714 // cond: int32(c)==-1 6715 // result: x 6716 for { 6717 c := v.AuxInt 6718 x := v.Args[0] 6719 if !(int32(c) == -1) { 6720 break 6721 } 6722 v.reset(OpCopy) 6723 v.Type = x.Type 6724 v.AddArg(x) 6725 return true 6726 } 6727 // match: (ANDWconst [c] (MOVDconst [d])) 6728 // cond: 6729 // result: (MOVDconst [c&d]) 6730 for { 6731 c := v.AuxInt 6732 v_0 := v.Args[0] 6733 if v_0.Op != OpS390XMOVDconst { 6734 break 6735 } 6736 d := v_0.AuxInt 6737 v.reset(OpS390XMOVDconst) 6738 v.AuxInt = c & d 6739 return true 6740 } 6741 return false 6742 } 6743 func rewriteValueS390X_OpS390XANDconst(v *Value, config *Config) bool { 6744 b := v.Block 6745 _ = b 6746 // match: (ANDconst [c] (ANDconst [d] x)) 6747 // cond: 6748 // result: (ANDconst [c & d] x) 6749 for { 6750 c := v.AuxInt 6751 v_0 := v.Args[0] 6752 if v_0.Op != OpS390XANDconst { 6753 break 6754 } 6755 d := v_0.AuxInt 6756 x := v_0.Args[0] 6757 v.reset(OpS390XANDconst) 6758 v.AuxInt = c & d 6759 v.AddArg(x) 6760 return true 6761 } 6762 // match: (ANDconst [0] _) 6763 // cond: 6764 // result: (MOVDconst [0]) 6765 for { 6766 if v.AuxInt != 0 { 6767 break 6768 } 6769 v.reset(OpS390XMOVDconst) 6770 v.AuxInt = 0 6771 return true 6772 } 6773 // match: (ANDconst [-1] x) 6774 // cond: 6775 // result: x 6776 for { 6777 if v.AuxInt != -1 { 6778 break 6779 } 6780 x := v.Args[0] 6781 v.reset(OpCopy) 6782 v.Type = x.Type 6783 v.AddArg(x) 6784 return true 6785 } 6786 // match: (ANDconst [c] (MOVDconst [d])) 6787 // cond: 6788 // result: (MOVDconst [c&d]) 6789 for { 6790 c := v.AuxInt 6791 v_0 := v.Args[0] 6792 if v_0.Op != OpS390XMOVDconst { 6793 break 6794 } 6795 d := v_0.AuxInt 6796 v.reset(OpS390XMOVDconst) 6797 v.AuxInt = c & d 6798 return true 6799 } 6800 return false 6801 } 6802 func rewriteValueS390X_OpS390XCMP(v *Value, config *Config) bool { 6803 b := v.Block 6804 _ = b 6805 // match: (CMP x (MOVDconst [c])) 6806 // cond: is32Bit(c) 6807 // result: (CMPconst x [c]) 6808 for { 6809 x := v.Args[0] 6810 v_1 := v.Args[1] 6811 if v_1.Op != OpS390XMOVDconst { 6812 break 6813 } 6814 c := v_1.AuxInt 6815 if !(is32Bit(c)) { 6816 break 6817 } 6818 v.reset(OpS390XCMPconst) 6819 v.AuxInt = c 6820 v.AddArg(x) 6821 return true 6822 } 6823 // match: (CMP (MOVDconst [c]) x) 6824 // cond: is32Bit(c) 6825 // result: (InvertFlags (CMPconst x [c])) 6826 for { 6827 v_0 := v.Args[0] 6828 if v_0.Op != OpS390XMOVDconst { 6829 break 6830 } 6831 c := v_0.AuxInt 6832 x := v.Args[1] 6833 if !(is32Bit(c)) { 6834 break 6835 } 6836 v.reset(OpS390XInvertFlags) 6837 v0 := b.NewValue0(v.Pos, OpS390XCMPconst, TypeFlags) 6838 v0.AuxInt = c 6839 v0.AddArg(x) 6840 v.AddArg(v0) 6841 return true 6842 } 6843 return false 6844 } 6845 func rewriteValueS390X_OpS390XCMPU(v *Value, config *Config) bool { 6846 b := v.Block 6847 _ = b 6848 // match: (CMPU x (MOVDconst [c])) 6849 // cond: is32Bit(c) 6850 // result: (CMPUconst x [int64(uint32(c))]) 6851 for { 6852 x := v.Args[0] 6853 v_1 := v.Args[1] 6854 if v_1.Op != OpS390XMOVDconst { 6855 break 6856 } 6857 c := v_1.AuxInt 6858 if !(is32Bit(c)) { 6859 break 6860 } 6861 v.reset(OpS390XCMPUconst) 6862 v.AuxInt = int64(uint32(c)) 6863 v.AddArg(x) 6864 return true 6865 } 6866 // match: (CMPU (MOVDconst [c]) x) 6867 // cond: is32Bit(c) 6868 // result: (InvertFlags (CMPUconst x [int64(uint32(c))])) 6869 for { 6870 v_0 := v.Args[0] 6871 if v_0.Op != OpS390XMOVDconst { 6872 break 6873 } 6874 c := v_0.AuxInt 6875 x := v.Args[1] 6876 if !(is32Bit(c)) { 6877 break 6878 } 6879 v.reset(OpS390XInvertFlags) 6880 v0 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 6881 v0.AuxInt = int64(uint32(c)) 6882 v0.AddArg(x) 6883 v.AddArg(v0) 6884 return true 6885 } 6886 return false 6887 } 6888 func rewriteValueS390X_OpS390XCMPUconst(v *Value, config *Config) bool { 6889 b := v.Block 6890 _ = b 6891 // match: (CMPUconst (MOVDconst [x]) [y]) 6892 // cond: uint64(x)==uint64(y) 6893 // result: (FlagEQ) 6894 for { 6895 y := v.AuxInt 6896 v_0 := v.Args[0] 6897 if v_0.Op != OpS390XMOVDconst { 6898 break 6899 } 6900 x := v_0.AuxInt 6901 if !(uint64(x) == uint64(y)) { 6902 break 6903 } 6904 v.reset(OpS390XFlagEQ) 6905 return true 6906 } 6907 // match: (CMPUconst (MOVDconst [x]) [y]) 6908 // cond: uint64(x)<uint64(y) 6909 // result: (FlagLT) 6910 for { 6911 y := v.AuxInt 6912 v_0 := v.Args[0] 6913 if v_0.Op != OpS390XMOVDconst { 6914 break 6915 } 6916 x := v_0.AuxInt 6917 if !(uint64(x) < uint64(y)) { 6918 break 6919 } 6920 v.reset(OpS390XFlagLT) 6921 return true 6922 } 6923 // match: (CMPUconst (MOVDconst [x]) [y]) 6924 // cond: uint64(x)>uint64(y) 6925 // result: (FlagGT) 6926 for { 6927 y := v.AuxInt 6928 v_0 := v.Args[0] 6929 if v_0.Op != OpS390XMOVDconst { 6930 break 6931 } 6932 x := v_0.AuxInt 6933 if !(uint64(x) > uint64(y)) { 6934 break 6935 } 6936 v.reset(OpS390XFlagGT) 6937 return true 6938 } 6939 return false 6940 } 6941 func rewriteValueS390X_OpS390XCMPW(v *Value, config *Config) bool { 6942 b := v.Block 6943 _ = b 6944 // match: (CMPW x (MOVDconst [c])) 6945 // cond: 6946 // result: (CMPWconst x [c]) 6947 for { 6948 x := v.Args[0] 6949 v_1 := v.Args[1] 6950 if v_1.Op != OpS390XMOVDconst { 6951 break 6952 } 6953 c := v_1.AuxInt 6954 v.reset(OpS390XCMPWconst) 6955 v.AuxInt = c 6956 v.AddArg(x) 6957 return true 6958 } 6959 // match: (CMPW (MOVDconst [c]) x) 6960 // cond: 6961 // result: (InvertFlags (CMPWconst x [c])) 6962 for { 6963 v_0 := v.Args[0] 6964 if v_0.Op != OpS390XMOVDconst { 6965 break 6966 } 6967 c := v_0.AuxInt 6968 x := v.Args[1] 6969 v.reset(OpS390XInvertFlags) 6970 v0 := b.NewValue0(v.Pos, OpS390XCMPWconst, TypeFlags) 6971 v0.AuxInt = c 6972 v0.AddArg(x) 6973 v.AddArg(v0) 6974 return true 6975 } 6976 return false 6977 } 6978 func rewriteValueS390X_OpS390XCMPWU(v *Value, config *Config) bool { 6979 b := v.Block 6980 _ = b 6981 // match: (CMPWU x (MOVDconst [c])) 6982 // cond: 6983 // result: (CMPWUconst x [int64(uint32(c))]) 6984 for { 6985 x := v.Args[0] 6986 v_1 := v.Args[1] 6987 if v_1.Op != OpS390XMOVDconst { 6988 break 6989 } 6990 c := v_1.AuxInt 6991 v.reset(OpS390XCMPWUconst) 6992 v.AuxInt = int64(uint32(c)) 6993 v.AddArg(x) 6994 return true 6995 } 6996 // match: (CMPWU (MOVDconst [c]) x) 6997 // cond: 6998 // result: (InvertFlags (CMPWUconst x [int64(uint32(c))])) 6999 for { 7000 v_0 := v.Args[0] 7001 if v_0.Op != OpS390XMOVDconst { 7002 break 7003 } 7004 c := v_0.AuxInt 7005 x := v.Args[1] 7006 v.reset(OpS390XInvertFlags) 7007 v0 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 7008 v0.AuxInt = int64(uint32(c)) 7009 v0.AddArg(x) 7010 v.AddArg(v0) 7011 return true 7012 } 7013 return false 7014 } 7015 func rewriteValueS390X_OpS390XCMPWUconst(v *Value, config *Config) bool { 7016 b := v.Block 7017 _ = b 7018 // match: (CMPWUconst (MOVDconst [x]) [y]) 7019 // cond: uint32(x)==uint32(y) 7020 // result: (FlagEQ) 7021 for { 7022 y := v.AuxInt 7023 v_0 := v.Args[0] 7024 if v_0.Op != OpS390XMOVDconst { 7025 break 7026 } 7027 x := v_0.AuxInt 7028 if !(uint32(x) == uint32(y)) { 7029 break 7030 } 7031 v.reset(OpS390XFlagEQ) 7032 return true 7033 } 7034 // match: (CMPWUconst (MOVDconst [x]) [y]) 7035 // cond: uint32(x)<uint32(y) 7036 // result: (FlagLT) 7037 for { 7038 y := v.AuxInt 7039 v_0 := v.Args[0] 7040 if v_0.Op != OpS390XMOVDconst { 7041 break 7042 } 7043 x := v_0.AuxInt 7044 if !(uint32(x) < uint32(y)) { 7045 break 7046 } 7047 v.reset(OpS390XFlagLT) 7048 return true 7049 } 7050 // match: (CMPWUconst (MOVDconst [x]) [y]) 7051 // cond: uint32(x)>uint32(y) 7052 // result: (FlagGT) 7053 for { 7054 y := v.AuxInt 7055 v_0 := v.Args[0] 7056 if v_0.Op != OpS390XMOVDconst { 7057 break 7058 } 7059 x := v_0.AuxInt 7060 if !(uint32(x) > uint32(y)) { 7061 break 7062 } 7063 v.reset(OpS390XFlagGT) 7064 return true 7065 } 7066 return false 7067 } 7068 func rewriteValueS390X_OpS390XCMPWconst(v *Value, config *Config) bool { 7069 b := v.Block 7070 _ = b 7071 // match: (CMPWconst (MOVDconst [x]) [y]) 7072 // cond: int32(x)==int32(y) 7073 // result: (FlagEQ) 7074 for { 7075 y := v.AuxInt 7076 v_0 := v.Args[0] 7077 if v_0.Op != OpS390XMOVDconst { 7078 break 7079 } 7080 x := v_0.AuxInt 7081 if !(int32(x) == int32(y)) { 7082 break 7083 } 7084 v.reset(OpS390XFlagEQ) 7085 return true 7086 } 7087 // match: (CMPWconst (MOVDconst [x]) [y]) 7088 // cond: int32(x)<int32(y) 7089 // result: (FlagLT) 7090 for { 7091 y := v.AuxInt 7092 v_0 := v.Args[0] 7093 if v_0.Op != OpS390XMOVDconst { 7094 break 7095 } 7096 x := v_0.AuxInt 7097 if !(int32(x) < int32(y)) { 7098 break 7099 } 7100 v.reset(OpS390XFlagLT) 7101 return true 7102 } 7103 // match: (CMPWconst (MOVDconst [x]) [y]) 7104 // cond: int32(x)>int32(y) 7105 // result: (FlagGT) 7106 for { 7107 y := v.AuxInt 7108 v_0 := v.Args[0] 7109 if v_0.Op != OpS390XMOVDconst { 7110 break 7111 } 7112 x := v_0.AuxInt 7113 if !(int32(x) > int32(y)) { 7114 break 7115 } 7116 v.reset(OpS390XFlagGT) 7117 return true 7118 } 7119 // match: (CMPWconst (SRWconst _ [c]) [n]) 7120 // cond: 0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n) 7121 // result: (FlagLT) 7122 for { 7123 n := v.AuxInt 7124 v_0 := v.Args[0] 7125 if v_0.Op != OpS390XSRWconst { 7126 break 7127 } 7128 c := v_0.AuxInt 7129 if !(0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)) { 7130 break 7131 } 7132 v.reset(OpS390XFlagLT) 7133 return true 7134 } 7135 // match: (CMPWconst (ANDWconst _ [m]) [n]) 7136 // cond: 0 <= int32(m) && int32(m) < int32(n) 7137 // result: (FlagLT) 7138 for { 7139 n := v.AuxInt 7140 v_0 := v.Args[0] 7141 if v_0.Op != OpS390XANDWconst { 7142 break 7143 } 7144 m := v_0.AuxInt 7145 if !(0 <= int32(m) && int32(m) < int32(n)) { 7146 break 7147 } 7148 v.reset(OpS390XFlagLT) 7149 return true 7150 } 7151 return false 7152 } 7153 func rewriteValueS390X_OpS390XCMPconst(v *Value, config *Config) bool { 7154 b := v.Block 7155 _ = b 7156 // match: (CMPconst (MOVDconst [x]) [y]) 7157 // cond: x==y 7158 // result: (FlagEQ) 7159 for { 7160 y := v.AuxInt 7161 v_0 := v.Args[0] 7162 if v_0.Op != OpS390XMOVDconst { 7163 break 7164 } 7165 x := v_0.AuxInt 7166 if !(x == y) { 7167 break 7168 } 7169 v.reset(OpS390XFlagEQ) 7170 return true 7171 } 7172 // match: (CMPconst (MOVDconst [x]) [y]) 7173 // cond: x<y 7174 // result: (FlagLT) 7175 for { 7176 y := v.AuxInt 7177 v_0 := v.Args[0] 7178 if v_0.Op != OpS390XMOVDconst { 7179 break 7180 } 7181 x := v_0.AuxInt 7182 if !(x < y) { 7183 break 7184 } 7185 v.reset(OpS390XFlagLT) 7186 return true 7187 } 7188 // match: (CMPconst (MOVDconst [x]) [y]) 7189 // cond: x>y 7190 // result: (FlagGT) 7191 for { 7192 y := v.AuxInt 7193 v_0 := v.Args[0] 7194 if v_0.Op != OpS390XMOVDconst { 7195 break 7196 } 7197 x := v_0.AuxInt 7198 if !(x > y) { 7199 break 7200 } 7201 v.reset(OpS390XFlagGT) 7202 return true 7203 } 7204 // match: (CMPconst (MOVBZreg _) [c]) 7205 // cond: 0xFF < c 7206 // result: (FlagLT) 7207 for { 7208 c := v.AuxInt 7209 v_0 := v.Args[0] 7210 if v_0.Op != OpS390XMOVBZreg { 7211 break 7212 } 7213 if !(0xFF < c) { 7214 break 7215 } 7216 v.reset(OpS390XFlagLT) 7217 return true 7218 } 7219 // match: (CMPconst (MOVHZreg _) [c]) 7220 // cond: 0xFFFF < c 7221 // result: (FlagLT) 7222 for { 7223 c := v.AuxInt 7224 v_0 := v.Args[0] 7225 if v_0.Op != OpS390XMOVHZreg { 7226 break 7227 } 7228 if !(0xFFFF < c) { 7229 break 7230 } 7231 v.reset(OpS390XFlagLT) 7232 return true 7233 } 7234 // match: (CMPconst (MOVWZreg _) [c]) 7235 // cond: 0xFFFFFFFF < c 7236 // result: (FlagLT) 7237 for { 7238 c := v.AuxInt 7239 v_0 := v.Args[0] 7240 if v_0.Op != OpS390XMOVWZreg { 7241 break 7242 } 7243 if !(0xFFFFFFFF < c) { 7244 break 7245 } 7246 v.reset(OpS390XFlagLT) 7247 return true 7248 } 7249 // match: (CMPconst (SRDconst _ [c]) [n]) 7250 // cond: 0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n) 7251 // result: (FlagLT) 7252 for { 7253 n := v.AuxInt 7254 v_0 := v.Args[0] 7255 if v_0.Op != OpS390XSRDconst { 7256 break 7257 } 7258 c := v_0.AuxInt 7259 if !(0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n)) { 7260 break 7261 } 7262 v.reset(OpS390XFlagLT) 7263 return true 7264 } 7265 // match: (CMPconst (ANDconst _ [m]) [n]) 7266 // cond: 0 <= m && m < n 7267 // result: (FlagLT) 7268 for { 7269 n := v.AuxInt 7270 v_0 := v.Args[0] 7271 if v_0.Op != OpS390XANDconst { 7272 break 7273 } 7274 m := v_0.AuxInt 7275 if !(0 <= m && m < n) { 7276 break 7277 } 7278 v.reset(OpS390XFlagLT) 7279 return true 7280 } 7281 return false 7282 } 7283 func rewriteValueS390X_OpS390XFMOVDload(v *Value, config *Config) bool { 7284 b := v.Block 7285 _ = b 7286 // match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 7287 // cond: is20Bit(off1+off2) 7288 // result: (FMOVDload [off1+off2] {sym} ptr mem) 7289 for { 7290 off1 := v.AuxInt 7291 sym := v.Aux 7292 v_0 := v.Args[0] 7293 if v_0.Op != OpS390XADDconst { 7294 break 7295 } 7296 off2 := v_0.AuxInt 7297 ptr := v_0.Args[0] 7298 mem := v.Args[1] 7299 if !(is20Bit(off1 + off2)) { 7300 break 7301 } 7302 v.reset(OpS390XFMOVDload) 7303 v.AuxInt = off1 + off2 7304 v.Aux = sym 7305 v.AddArg(ptr) 7306 v.AddArg(mem) 7307 return true 7308 } 7309 // match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7310 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7311 // result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7312 for { 7313 off1 := v.AuxInt 7314 sym1 := v.Aux 7315 v_0 := v.Args[0] 7316 if v_0.Op != OpS390XMOVDaddr { 7317 break 7318 } 7319 off2 := v_0.AuxInt 7320 sym2 := v_0.Aux 7321 base := v_0.Args[0] 7322 mem := v.Args[1] 7323 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7324 break 7325 } 7326 v.reset(OpS390XFMOVDload) 7327 v.AuxInt = off1 + off2 7328 v.Aux = mergeSym(sym1, sym2) 7329 v.AddArg(base) 7330 v.AddArg(mem) 7331 return true 7332 } 7333 // match: (FMOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7334 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7335 // result: (FMOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7336 for { 7337 off1 := v.AuxInt 7338 sym1 := v.Aux 7339 v_0 := v.Args[0] 7340 if v_0.Op != OpS390XMOVDaddridx { 7341 break 7342 } 7343 off2 := v_0.AuxInt 7344 sym2 := v_0.Aux 7345 ptr := v_0.Args[0] 7346 idx := v_0.Args[1] 7347 mem := v.Args[1] 7348 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7349 break 7350 } 7351 v.reset(OpS390XFMOVDloadidx) 7352 v.AuxInt = off1 + off2 7353 v.Aux = mergeSym(sym1, sym2) 7354 v.AddArg(ptr) 7355 v.AddArg(idx) 7356 v.AddArg(mem) 7357 return true 7358 } 7359 // match: (FMOVDload [off] {sym} (ADD ptr idx) mem) 7360 // cond: ptr.Op != OpSB 7361 // result: (FMOVDloadidx [off] {sym} ptr idx mem) 7362 for { 7363 off := v.AuxInt 7364 sym := v.Aux 7365 v_0 := v.Args[0] 7366 if v_0.Op != OpS390XADD { 7367 break 7368 } 7369 ptr := v_0.Args[0] 7370 idx := v_0.Args[1] 7371 mem := v.Args[1] 7372 if !(ptr.Op != OpSB) { 7373 break 7374 } 7375 v.reset(OpS390XFMOVDloadidx) 7376 v.AuxInt = off 7377 v.Aux = sym 7378 v.AddArg(ptr) 7379 v.AddArg(idx) 7380 v.AddArg(mem) 7381 return true 7382 } 7383 return false 7384 } 7385 func rewriteValueS390X_OpS390XFMOVDloadidx(v *Value, config *Config) bool { 7386 b := v.Block 7387 _ = b 7388 // match: (FMOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7389 // cond: 7390 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7391 for { 7392 c := v.AuxInt 7393 sym := v.Aux 7394 v_0 := v.Args[0] 7395 if v_0.Op != OpS390XADDconst { 7396 break 7397 } 7398 d := v_0.AuxInt 7399 ptr := v_0.Args[0] 7400 idx := v.Args[1] 7401 mem := v.Args[2] 7402 v.reset(OpS390XFMOVDloadidx) 7403 v.AuxInt = c + d 7404 v.Aux = sym 7405 v.AddArg(ptr) 7406 v.AddArg(idx) 7407 v.AddArg(mem) 7408 return true 7409 } 7410 // match: (FMOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7411 // cond: 7412 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7413 for { 7414 c := v.AuxInt 7415 sym := v.Aux 7416 ptr := v.Args[0] 7417 v_1 := v.Args[1] 7418 if v_1.Op != OpS390XADDconst { 7419 break 7420 } 7421 d := v_1.AuxInt 7422 idx := v_1.Args[0] 7423 mem := v.Args[2] 7424 v.reset(OpS390XFMOVDloadidx) 7425 v.AuxInt = c + d 7426 v.Aux = sym 7427 v.AddArg(ptr) 7428 v.AddArg(idx) 7429 v.AddArg(mem) 7430 return true 7431 } 7432 return false 7433 } 7434 func rewriteValueS390X_OpS390XFMOVDstore(v *Value, config *Config) bool { 7435 b := v.Block 7436 _ = b 7437 // match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7438 // cond: is20Bit(off1+off2) 7439 // result: (FMOVDstore [off1+off2] {sym} ptr val mem) 7440 for { 7441 off1 := v.AuxInt 7442 sym := v.Aux 7443 v_0 := v.Args[0] 7444 if v_0.Op != OpS390XADDconst { 7445 break 7446 } 7447 off2 := v_0.AuxInt 7448 ptr := v_0.Args[0] 7449 val := v.Args[1] 7450 mem := v.Args[2] 7451 if !(is20Bit(off1 + off2)) { 7452 break 7453 } 7454 v.reset(OpS390XFMOVDstore) 7455 v.AuxInt = off1 + off2 7456 v.Aux = sym 7457 v.AddArg(ptr) 7458 v.AddArg(val) 7459 v.AddArg(mem) 7460 return true 7461 } 7462 // match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7463 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7464 // result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7465 for { 7466 off1 := v.AuxInt 7467 sym1 := v.Aux 7468 v_0 := v.Args[0] 7469 if v_0.Op != OpS390XMOVDaddr { 7470 break 7471 } 7472 off2 := v_0.AuxInt 7473 sym2 := v_0.Aux 7474 base := v_0.Args[0] 7475 val := v.Args[1] 7476 mem := v.Args[2] 7477 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7478 break 7479 } 7480 v.reset(OpS390XFMOVDstore) 7481 v.AuxInt = off1 + off2 7482 v.Aux = mergeSym(sym1, sym2) 7483 v.AddArg(base) 7484 v.AddArg(val) 7485 v.AddArg(mem) 7486 return true 7487 } 7488 // match: (FMOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7489 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7490 // result: (FMOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7491 for { 7492 off1 := v.AuxInt 7493 sym1 := v.Aux 7494 v_0 := v.Args[0] 7495 if v_0.Op != OpS390XMOVDaddridx { 7496 break 7497 } 7498 off2 := v_0.AuxInt 7499 sym2 := v_0.Aux 7500 ptr := v_0.Args[0] 7501 idx := v_0.Args[1] 7502 val := v.Args[1] 7503 mem := v.Args[2] 7504 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7505 break 7506 } 7507 v.reset(OpS390XFMOVDstoreidx) 7508 v.AuxInt = off1 + off2 7509 v.Aux = mergeSym(sym1, sym2) 7510 v.AddArg(ptr) 7511 v.AddArg(idx) 7512 v.AddArg(val) 7513 v.AddArg(mem) 7514 return true 7515 } 7516 // match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem) 7517 // cond: ptr.Op != OpSB 7518 // result: (FMOVDstoreidx [off] {sym} ptr idx val mem) 7519 for { 7520 off := v.AuxInt 7521 sym := v.Aux 7522 v_0 := v.Args[0] 7523 if v_0.Op != OpS390XADD { 7524 break 7525 } 7526 ptr := v_0.Args[0] 7527 idx := v_0.Args[1] 7528 val := v.Args[1] 7529 mem := v.Args[2] 7530 if !(ptr.Op != OpSB) { 7531 break 7532 } 7533 v.reset(OpS390XFMOVDstoreidx) 7534 v.AuxInt = off 7535 v.Aux = sym 7536 v.AddArg(ptr) 7537 v.AddArg(idx) 7538 v.AddArg(val) 7539 v.AddArg(mem) 7540 return true 7541 } 7542 return false 7543 } 7544 func rewriteValueS390X_OpS390XFMOVDstoreidx(v *Value, config *Config) bool { 7545 b := v.Block 7546 _ = b 7547 // match: (FMOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7548 // cond: 7549 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7550 for { 7551 c := v.AuxInt 7552 sym := v.Aux 7553 v_0 := v.Args[0] 7554 if v_0.Op != OpS390XADDconst { 7555 break 7556 } 7557 d := v_0.AuxInt 7558 ptr := v_0.Args[0] 7559 idx := v.Args[1] 7560 val := v.Args[2] 7561 mem := v.Args[3] 7562 v.reset(OpS390XFMOVDstoreidx) 7563 v.AuxInt = c + d 7564 v.Aux = sym 7565 v.AddArg(ptr) 7566 v.AddArg(idx) 7567 v.AddArg(val) 7568 v.AddArg(mem) 7569 return true 7570 } 7571 // match: (FMOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7572 // cond: 7573 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7574 for { 7575 c := v.AuxInt 7576 sym := v.Aux 7577 ptr := v.Args[0] 7578 v_1 := v.Args[1] 7579 if v_1.Op != OpS390XADDconst { 7580 break 7581 } 7582 d := v_1.AuxInt 7583 idx := v_1.Args[0] 7584 val := v.Args[2] 7585 mem := v.Args[3] 7586 v.reset(OpS390XFMOVDstoreidx) 7587 v.AuxInt = c + d 7588 v.Aux = sym 7589 v.AddArg(ptr) 7590 v.AddArg(idx) 7591 v.AddArg(val) 7592 v.AddArg(mem) 7593 return true 7594 } 7595 return false 7596 } 7597 func rewriteValueS390X_OpS390XFMOVSload(v *Value, config *Config) bool { 7598 b := v.Block 7599 _ = b 7600 // match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem) 7601 // cond: is20Bit(off1+off2) 7602 // result: (FMOVSload [off1+off2] {sym} ptr mem) 7603 for { 7604 off1 := v.AuxInt 7605 sym := v.Aux 7606 v_0 := v.Args[0] 7607 if v_0.Op != OpS390XADDconst { 7608 break 7609 } 7610 off2 := v_0.AuxInt 7611 ptr := v_0.Args[0] 7612 mem := v.Args[1] 7613 if !(is20Bit(off1 + off2)) { 7614 break 7615 } 7616 v.reset(OpS390XFMOVSload) 7617 v.AuxInt = off1 + off2 7618 v.Aux = sym 7619 v.AddArg(ptr) 7620 v.AddArg(mem) 7621 return true 7622 } 7623 // match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7624 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7625 // result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7626 for { 7627 off1 := v.AuxInt 7628 sym1 := v.Aux 7629 v_0 := v.Args[0] 7630 if v_0.Op != OpS390XMOVDaddr { 7631 break 7632 } 7633 off2 := v_0.AuxInt 7634 sym2 := v_0.Aux 7635 base := v_0.Args[0] 7636 mem := v.Args[1] 7637 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7638 break 7639 } 7640 v.reset(OpS390XFMOVSload) 7641 v.AuxInt = off1 + off2 7642 v.Aux = mergeSym(sym1, sym2) 7643 v.AddArg(base) 7644 v.AddArg(mem) 7645 return true 7646 } 7647 // match: (FMOVSload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7648 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7649 // result: (FMOVSloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7650 for { 7651 off1 := v.AuxInt 7652 sym1 := v.Aux 7653 v_0 := v.Args[0] 7654 if v_0.Op != OpS390XMOVDaddridx { 7655 break 7656 } 7657 off2 := v_0.AuxInt 7658 sym2 := v_0.Aux 7659 ptr := v_0.Args[0] 7660 idx := v_0.Args[1] 7661 mem := v.Args[1] 7662 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7663 break 7664 } 7665 v.reset(OpS390XFMOVSloadidx) 7666 v.AuxInt = off1 + off2 7667 v.Aux = mergeSym(sym1, sym2) 7668 v.AddArg(ptr) 7669 v.AddArg(idx) 7670 v.AddArg(mem) 7671 return true 7672 } 7673 // match: (FMOVSload [off] {sym} (ADD ptr idx) mem) 7674 // cond: ptr.Op != OpSB 7675 // result: (FMOVSloadidx [off] {sym} ptr idx mem) 7676 for { 7677 off := v.AuxInt 7678 sym := v.Aux 7679 v_0 := v.Args[0] 7680 if v_0.Op != OpS390XADD { 7681 break 7682 } 7683 ptr := v_0.Args[0] 7684 idx := v_0.Args[1] 7685 mem := v.Args[1] 7686 if !(ptr.Op != OpSB) { 7687 break 7688 } 7689 v.reset(OpS390XFMOVSloadidx) 7690 v.AuxInt = off 7691 v.Aux = sym 7692 v.AddArg(ptr) 7693 v.AddArg(idx) 7694 v.AddArg(mem) 7695 return true 7696 } 7697 return false 7698 } 7699 func rewriteValueS390X_OpS390XFMOVSloadidx(v *Value, config *Config) bool { 7700 b := v.Block 7701 _ = b 7702 // match: (FMOVSloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7703 // cond: 7704 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7705 for { 7706 c := v.AuxInt 7707 sym := v.Aux 7708 v_0 := v.Args[0] 7709 if v_0.Op != OpS390XADDconst { 7710 break 7711 } 7712 d := v_0.AuxInt 7713 ptr := v_0.Args[0] 7714 idx := v.Args[1] 7715 mem := v.Args[2] 7716 v.reset(OpS390XFMOVSloadidx) 7717 v.AuxInt = c + d 7718 v.Aux = sym 7719 v.AddArg(ptr) 7720 v.AddArg(idx) 7721 v.AddArg(mem) 7722 return true 7723 } 7724 // match: (FMOVSloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7725 // cond: 7726 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7727 for { 7728 c := v.AuxInt 7729 sym := v.Aux 7730 ptr := v.Args[0] 7731 v_1 := v.Args[1] 7732 if v_1.Op != OpS390XADDconst { 7733 break 7734 } 7735 d := v_1.AuxInt 7736 idx := v_1.Args[0] 7737 mem := v.Args[2] 7738 v.reset(OpS390XFMOVSloadidx) 7739 v.AuxInt = c + d 7740 v.Aux = sym 7741 v.AddArg(ptr) 7742 v.AddArg(idx) 7743 v.AddArg(mem) 7744 return true 7745 } 7746 return false 7747 } 7748 func rewriteValueS390X_OpS390XFMOVSstore(v *Value, config *Config) bool { 7749 b := v.Block 7750 _ = b 7751 // match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7752 // cond: is20Bit(off1+off2) 7753 // result: (FMOVSstore [off1+off2] {sym} ptr val mem) 7754 for { 7755 off1 := v.AuxInt 7756 sym := v.Aux 7757 v_0 := v.Args[0] 7758 if v_0.Op != OpS390XADDconst { 7759 break 7760 } 7761 off2 := v_0.AuxInt 7762 ptr := v_0.Args[0] 7763 val := v.Args[1] 7764 mem := v.Args[2] 7765 if !(is20Bit(off1 + off2)) { 7766 break 7767 } 7768 v.reset(OpS390XFMOVSstore) 7769 v.AuxInt = off1 + off2 7770 v.Aux = sym 7771 v.AddArg(ptr) 7772 v.AddArg(val) 7773 v.AddArg(mem) 7774 return true 7775 } 7776 // match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7777 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7778 // result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7779 for { 7780 off1 := v.AuxInt 7781 sym1 := v.Aux 7782 v_0 := v.Args[0] 7783 if v_0.Op != OpS390XMOVDaddr { 7784 break 7785 } 7786 off2 := v_0.AuxInt 7787 sym2 := v_0.Aux 7788 base := v_0.Args[0] 7789 val := v.Args[1] 7790 mem := v.Args[2] 7791 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7792 break 7793 } 7794 v.reset(OpS390XFMOVSstore) 7795 v.AuxInt = off1 + off2 7796 v.Aux = mergeSym(sym1, sym2) 7797 v.AddArg(base) 7798 v.AddArg(val) 7799 v.AddArg(mem) 7800 return true 7801 } 7802 // match: (FMOVSstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7803 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7804 // result: (FMOVSstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7805 for { 7806 off1 := v.AuxInt 7807 sym1 := v.Aux 7808 v_0 := v.Args[0] 7809 if v_0.Op != OpS390XMOVDaddridx { 7810 break 7811 } 7812 off2 := v_0.AuxInt 7813 sym2 := v_0.Aux 7814 ptr := v_0.Args[0] 7815 idx := v_0.Args[1] 7816 val := v.Args[1] 7817 mem := v.Args[2] 7818 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7819 break 7820 } 7821 v.reset(OpS390XFMOVSstoreidx) 7822 v.AuxInt = off1 + off2 7823 v.Aux = mergeSym(sym1, sym2) 7824 v.AddArg(ptr) 7825 v.AddArg(idx) 7826 v.AddArg(val) 7827 v.AddArg(mem) 7828 return true 7829 } 7830 // match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem) 7831 // cond: ptr.Op != OpSB 7832 // result: (FMOVSstoreidx [off] {sym} ptr idx val mem) 7833 for { 7834 off := v.AuxInt 7835 sym := v.Aux 7836 v_0 := v.Args[0] 7837 if v_0.Op != OpS390XADD { 7838 break 7839 } 7840 ptr := v_0.Args[0] 7841 idx := v_0.Args[1] 7842 val := v.Args[1] 7843 mem := v.Args[2] 7844 if !(ptr.Op != OpSB) { 7845 break 7846 } 7847 v.reset(OpS390XFMOVSstoreidx) 7848 v.AuxInt = off 7849 v.Aux = sym 7850 v.AddArg(ptr) 7851 v.AddArg(idx) 7852 v.AddArg(val) 7853 v.AddArg(mem) 7854 return true 7855 } 7856 return false 7857 } 7858 func rewriteValueS390X_OpS390XFMOVSstoreidx(v *Value, config *Config) bool { 7859 b := v.Block 7860 _ = b 7861 // match: (FMOVSstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7862 // cond: 7863 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7864 for { 7865 c := v.AuxInt 7866 sym := v.Aux 7867 v_0 := v.Args[0] 7868 if v_0.Op != OpS390XADDconst { 7869 break 7870 } 7871 d := v_0.AuxInt 7872 ptr := v_0.Args[0] 7873 idx := v.Args[1] 7874 val := v.Args[2] 7875 mem := v.Args[3] 7876 v.reset(OpS390XFMOVSstoreidx) 7877 v.AuxInt = c + d 7878 v.Aux = sym 7879 v.AddArg(ptr) 7880 v.AddArg(idx) 7881 v.AddArg(val) 7882 v.AddArg(mem) 7883 return true 7884 } 7885 // match: (FMOVSstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7886 // cond: 7887 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7888 for { 7889 c := v.AuxInt 7890 sym := v.Aux 7891 ptr := v.Args[0] 7892 v_1 := v.Args[1] 7893 if v_1.Op != OpS390XADDconst { 7894 break 7895 } 7896 d := v_1.AuxInt 7897 idx := v_1.Args[0] 7898 val := v.Args[2] 7899 mem := v.Args[3] 7900 v.reset(OpS390XFMOVSstoreidx) 7901 v.AuxInt = c + d 7902 v.Aux = sym 7903 v.AddArg(ptr) 7904 v.AddArg(idx) 7905 v.AddArg(val) 7906 v.AddArg(mem) 7907 return true 7908 } 7909 return false 7910 } 7911 func rewriteValueS390X_OpS390XMOVBZload(v *Value, config *Config) bool { 7912 b := v.Block 7913 _ = b 7914 // match: (MOVBZload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) 7915 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 7916 // result: (MOVDreg x) 7917 for { 7918 off := v.AuxInt 7919 sym := v.Aux 7920 ptr := v.Args[0] 7921 v_1 := v.Args[1] 7922 if v_1.Op != OpS390XMOVBstore { 7923 break 7924 } 7925 off2 := v_1.AuxInt 7926 sym2 := v_1.Aux 7927 ptr2 := v_1.Args[0] 7928 x := v_1.Args[1] 7929 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 7930 break 7931 } 7932 v.reset(OpS390XMOVDreg) 7933 v.AddArg(x) 7934 return true 7935 } 7936 // match: (MOVBZload [off1] {sym} (ADDconst [off2] ptr) mem) 7937 // cond: is20Bit(off1+off2) 7938 // result: (MOVBZload [off1+off2] {sym} ptr mem) 7939 for { 7940 off1 := v.AuxInt 7941 sym := v.Aux 7942 v_0 := v.Args[0] 7943 if v_0.Op != OpS390XADDconst { 7944 break 7945 } 7946 off2 := v_0.AuxInt 7947 ptr := v_0.Args[0] 7948 mem := v.Args[1] 7949 if !(is20Bit(off1 + off2)) { 7950 break 7951 } 7952 v.reset(OpS390XMOVBZload) 7953 v.AuxInt = off1 + off2 7954 v.Aux = sym 7955 v.AddArg(ptr) 7956 v.AddArg(mem) 7957 return true 7958 } 7959 // match: (MOVBZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7960 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7961 // result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7962 for { 7963 off1 := v.AuxInt 7964 sym1 := v.Aux 7965 v_0 := v.Args[0] 7966 if v_0.Op != OpS390XMOVDaddr { 7967 break 7968 } 7969 off2 := v_0.AuxInt 7970 sym2 := v_0.Aux 7971 base := v_0.Args[0] 7972 mem := v.Args[1] 7973 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7974 break 7975 } 7976 v.reset(OpS390XMOVBZload) 7977 v.AuxInt = off1 + off2 7978 v.Aux = mergeSym(sym1, sym2) 7979 v.AddArg(base) 7980 v.AddArg(mem) 7981 return true 7982 } 7983 // match: (MOVBZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7984 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7985 // result: (MOVBZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7986 for { 7987 off1 := v.AuxInt 7988 sym1 := v.Aux 7989 v_0 := v.Args[0] 7990 if v_0.Op != OpS390XMOVDaddridx { 7991 break 7992 } 7993 off2 := v_0.AuxInt 7994 sym2 := v_0.Aux 7995 ptr := v_0.Args[0] 7996 idx := v_0.Args[1] 7997 mem := v.Args[1] 7998 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7999 break 8000 } 8001 v.reset(OpS390XMOVBZloadidx) 8002 v.AuxInt = off1 + off2 8003 v.Aux = mergeSym(sym1, sym2) 8004 v.AddArg(ptr) 8005 v.AddArg(idx) 8006 v.AddArg(mem) 8007 return true 8008 } 8009 // match: (MOVBZload [off] {sym} (ADD ptr idx) mem) 8010 // cond: ptr.Op != OpSB 8011 // result: (MOVBZloadidx [off] {sym} ptr idx mem) 8012 for { 8013 off := v.AuxInt 8014 sym := v.Aux 8015 v_0 := v.Args[0] 8016 if v_0.Op != OpS390XADD { 8017 break 8018 } 8019 ptr := v_0.Args[0] 8020 idx := v_0.Args[1] 8021 mem := v.Args[1] 8022 if !(ptr.Op != OpSB) { 8023 break 8024 } 8025 v.reset(OpS390XMOVBZloadidx) 8026 v.AuxInt = off 8027 v.Aux = sym 8028 v.AddArg(ptr) 8029 v.AddArg(idx) 8030 v.AddArg(mem) 8031 return true 8032 } 8033 return false 8034 } 8035 func rewriteValueS390X_OpS390XMOVBZloadidx(v *Value, config *Config) bool { 8036 b := v.Block 8037 _ = b 8038 // match: (MOVBZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 8039 // cond: 8040 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 8041 for { 8042 c := v.AuxInt 8043 sym := v.Aux 8044 v_0 := v.Args[0] 8045 if v_0.Op != OpS390XADDconst { 8046 break 8047 } 8048 d := v_0.AuxInt 8049 ptr := v_0.Args[0] 8050 idx := v.Args[1] 8051 mem := v.Args[2] 8052 v.reset(OpS390XMOVBZloadidx) 8053 v.AuxInt = c + d 8054 v.Aux = sym 8055 v.AddArg(ptr) 8056 v.AddArg(idx) 8057 v.AddArg(mem) 8058 return true 8059 } 8060 // match: (MOVBZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 8061 // cond: 8062 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 8063 for { 8064 c := v.AuxInt 8065 sym := v.Aux 8066 ptr := v.Args[0] 8067 v_1 := v.Args[1] 8068 if v_1.Op != OpS390XADDconst { 8069 break 8070 } 8071 d := v_1.AuxInt 8072 idx := v_1.Args[0] 8073 mem := v.Args[2] 8074 v.reset(OpS390XMOVBZloadidx) 8075 v.AuxInt = c + d 8076 v.Aux = sym 8077 v.AddArg(ptr) 8078 v.AddArg(idx) 8079 v.AddArg(mem) 8080 return true 8081 } 8082 return false 8083 } 8084 func rewriteValueS390X_OpS390XMOVBZreg(v *Value, config *Config) bool { 8085 b := v.Block 8086 _ = b 8087 // match: (MOVBZreg x:(MOVDLT (MOVDconst [c]) (MOVDconst [d]) _)) 8088 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8089 // result: (MOVDreg x) 8090 for { 8091 x := v.Args[0] 8092 if x.Op != OpS390XMOVDLT { 8093 break 8094 } 8095 x_0 := x.Args[0] 8096 if x_0.Op != OpS390XMOVDconst { 8097 break 8098 } 8099 c := x_0.AuxInt 8100 x_1 := x.Args[1] 8101 if x_1.Op != OpS390XMOVDconst { 8102 break 8103 } 8104 d := x_1.AuxInt 8105 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8106 break 8107 } 8108 v.reset(OpS390XMOVDreg) 8109 v.AddArg(x) 8110 return true 8111 } 8112 // match: (MOVBZreg x:(MOVDLE (MOVDconst [c]) (MOVDconst [d]) _)) 8113 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8114 // result: (MOVDreg x) 8115 for { 8116 x := v.Args[0] 8117 if x.Op != OpS390XMOVDLE { 8118 break 8119 } 8120 x_0 := x.Args[0] 8121 if x_0.Op != OpS390XMOVDconst { 8122 break 8123 } 8124 c := x_0.AuxInt 8125 x_1 := x.Args[1] 8126 if x_1.Op != OpS390XMOVDconst { 8127 break 8128 } 8129 d := x_1.AuxInt 8130 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8131 break 8132 } 8133 v.reset(OpS390XMOVDreg) 8134 v.AddArg(x) 8135 return true 8136 } 8137 // match: (MOVBZreg x:(MOVDGT (MOVDconst [c]) (MOVDconst [d]) _)) 8138 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8139 // result: (MOVDreg x) 8140 for { 8141 x := v.Args[0] 8142 if x.Op != OpS390XMOVDGT { 8143 break 8144 } 8145 x_0 := x.Args[0] 8146 if x_0.Op != OpS390XMOVDconst { 8147 break 8148 } 8149 c := x_0.AuxInt 8150 x_1 := x.Args[1] 8151 if x_1.Op != OpS390XMOVDconst { 8152 break 8153 } 8154 d := x_1.AuxInt 8155 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8156 break 8157 } 8158 v.reset(OpS390XMOVDreg) 8159 v.AddArg(x) 8160 return true 8161 } 8162 // match: (MOVBZreg x:(MOVDGE (MOVDconst [c]) (MOVDconst [d]) _)) 8163 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8164 // result: (MOVDreg x) 8165 for { 8166 x := v.Args[0] 8167 if x.Op != OpS390XMOVDGE { 8168 break 8169 } 8170 x_0 := x.Args[0] 8171 if x_0.Op != OpS390XMOVDconst { 8172 break 8173 } 8174 c := x_0.AuxInt 8175 x_1 := x.Args[1] 8176 if x_1.Op != OpS390XMOVDconst { 8177 break 8178 } 8179 d := x_1.AuxInt 8180 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8181 break 8182 } 8183 v.reset(OpS390XMOVDreg) 8184 v.AddArg(x) 8185 return true 8186 } 8187 // match: (MOVBZreg x:(MOVDEQ (MOVDconst [c]) (MOVDconst [d]) _)) 8188 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8189 // result: (MOVDreg x) 8190 for { 8191 x := v.Args[0] 8192 if x.Op != OpS390XMOVDEQ { 8193 break 8194 } 8195 x_0 := x.Args[0] 8196 if x_0.Op != OpS390XMOVDconst { 8197 break 8198 } 8199 c := x_0.AuxInt 8200 x_1 := x.Args[1] 8201 if x_1.Op != OpS390XMOVDconst { 8202 break 8203 } 8204 d := x_1.AuxInt 8205 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8206 break 8207 } 8208 v.reset(OpS390XMOVDreg) 8209 v.AddArg(x) 8210 return true 8211 } 8212 // match: (MOVBZreg x:(MOVDNE (MOVDconst [c]) (MOVDconst [d]) _)) 8213 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8214 // result: (MOVDreg x) 8215 for { 8216 x := v.Args[0] 8217 if x.Op != OpS390XMOVDNE { 8218 break 8219 } 8220 x_0 := x.Args[0] 8221 if x_0.Op != OpS390XMOVDconst { 8222 break 8223 } 8224 c := x_0.AuxInt 8225 x_1 := x.Args[1] 8226 if x_1.Op != OpS390XMOVDconst { 8227 break 8228 } 8229 d := x_1.AuxInt 8230 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8231 break 8232 } 8233 v.reset(OpS390XMOVDreg) 8234 v.AddArg(x) 8235 return true 8236 } 8237 // match: (MOVBZreg x:(MOVDGTnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8238 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8239 // result: (MOVDreg x) 8240 for { 8241 x := v.Args[0] 8242 if x.Op != OpS390XMOVDGTnoinv { 8243 break 8244 } 8245 x_0 := x.Args[0] 8246 if x_0.Op != OpS390XMOVDconst { 8247 break 8248 } 8249 c := x_0.AuxInt 8250 x_1 := x.Args[1] 8251 if x_1.Op != OpS390XMOVDconst { 8252 break 8253 } 8254 d := x_1.AuxInt 8255 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8256 break 8257 } 8258 v.reset(OpS390XMOVDreg) 8259 v.AddArg(x) 8260 return true 8261 } 8262 // match: (MOVBZreg x:(MOVDGEnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8263 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8264 // result: (MOVDreg x) 8265 for { 8266 x := v.Args[0] 8267 if x.Op != OpS390XMOVDGEnoinv { 8268 break 8269 } 8270 x_0 := x.Args[0] 8271 if x_0.Op != OpS390XMOVDconst { 8272 break 8273 } 8274 c := x_0.AuxInt 8275 x_1 := x.Args[1] 8276 if x_1.Op != OpS390XMOVDconst { 8277 break 8278 } 8279 d := x_1.AuxInt 8280 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8281 break 8282 } 8283 v.reset(OpS390XMOVDreg) 8284 v.AddArg(x) 8285 return true 8286 } 8287 // match: (MOVBZreg x:(MOVBZload _ _)) 8288 // cond: 8289 // result: (MOVDreg x) 8290 for { 8291 x := v.Args[0] 8292 if x.Op != OpS390XMOVBZload { 8293 break 8294 } 8295 v.reset(OpS390XMOVDreg) 8296 v.AddArg(x) 8297 return true 8298 } 8299 // match: (MOVBZreg x:(Arg <t>)) 8300 // cond: is8BitInt(t) && !isSigned(t) 8301 // result: (MOVDreg x) 8302 for { 8303 x := v.Args[0] 8304 if x.Op != OpArg { 8305 break 8306 } 8307 t := x.Type 8308 if !(is8BitInt(t) && !isSigned(t)) { 8309 break 8310 } 8311 v.reset(OpS390XMOVDreg) 8312 v.AddArg(x) 8313 return true 8314 } 8315 // match: (MOVBZreg x:(MOVBZreg _)) 8316 // cond: 8317 // result: (MOVDreg x) 8318 for { 8319 x := v.Args[0] 8320 if x.Op != OpS390XMOVBZreg { 8321 break 8322 } 8323 v.reset(OpS390XMOVDreg) 8324 v.AddArg(x) 8325 return true 8326 } 8327 // match: (MOVBZreg (MOVDconst [c])) 8328 // cond: 8329 // result: (MOVDconst [int64(uint8(c))]) 8330 for { 8331 v_0 := v.Args[0] 8332 if v_0.Op != OpS390XMOVDconst { 8333 break 8334 } 8335 c := v_0.AuxInt 8336 v.reset(OpS390XMOVDconst) 8337 v.AuxInt = int64(uint8(c)) 8338 return true 8339 } 8340 // match: (MOVBZreg x:(MOVBZload [off] {sym} ptr mem)) 8341 // cond: x.Uses == 1 && clobber(x) 8342 // result: @x.Block (MOVBZload <v.Type> [off] {sym} ptr mem) 8343 for { 8344 x := v.Args[0] 8345 if x.Op != OpS390XMOVBZload { 8346 break 8347 } 8348 off := x.AuxInt 8349 sym := x.Aux 8350 ptr := x.Args[0] 8351 mem := x.Args[1] 8352 if !(x.Uses == 1 && clobber(x)) { 8353 break 8354 } 8355 b = x.Block 8356 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, v.Type) 8357 v.reset(OpCopy) 8358 v.AddArg(v0) 8359 v0.AuxInt = off 8360 v0.Aux = sym 8361 v0.AddArg(ptr) 8362 v0.AddArg(mem) 8363 return true 8364 } 8365 // match: (MOVBZreg x:(MOVBZloadidx [off] {sym} ptr idx mem)) 8366 // cond: x.Uses == 1 && clobber(x) 8367 // result: @x.Block (MOVBZloadidx <v.Type> [off] {sym} ptr idx mem) 8368 for { 8369 x := v.Args[0] 8370 if x.Op != OpS390XMOVBZloadidx { 8371 break 8372 } 8373 off := x.AuxInt 8374 sym := x.Aux 8375 ptr := x.Args[0] 8376 idx := x.Args[1] 8377 mem := x.Args[2] 8378 if !(x.Uses == 1 && clobber(x)) { 8379 break 8380 } 8381 b = x.Block 8382 v0 := b.NewValue0(v.Pos, OpS390XMOVBZloadidx, v.Type) 8383 v.reset(OpCopy) 8384 v.AddArg(v0) 8385 v0.AuxInt = off 8386 v0.Aux = sym 8387 v0.AddArg(ptr) 8388 v0.AddArg(idx) 8389 v0.AddArg(mem) 8390 return true 8391 } 8392 return false 8393 } 8394 func rewriteValueS390X_OpS390XMOVBload(v *Value, config *Config) bool { 8395 b := v.Block 8396 _ = b 8397 // match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) 8398 // cond: is20Bit(off1+off2) 8399 // result: (MOVBload [off1+off2] {sym} ptr mem) 8400 for { 8401 off1 := v.AuxInt 8402 sym := v.Aux 8403 v_0 := v.Args[0] 8404 if v_0.Op != OpS390XADDconst { 8405 break 8406 } 8407 off2 := v_0.AuxInt 8408 ptr := v_0.Args[0] 8409 mem := v.Args[1] 8410 if !(is20Bit(off1 + off2)) { 8411 break 8412 } 8413 v.reset(OpS390XMOVBload) 8414 v.AuxInt = off1 + off2 8415 v.Aux = sym 8416 v.AddArg(ptr) 8417 v.AddArg(mem) 8418 return true 8419 } 8420 // match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 8421 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8422 // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem) 8423 for { 8424 off1 := v.AuxInt 8425 sym1 := v.Aux 8426 v_0 := v.Args[0] 8427 if v_0.Op != OpS390XMOVDaddr { 8428 break 8429 } 8430 off2 := v_0.AuxInt 8431 sym2 := v_0.Aux 8432 base := v_0.Args[0] 8433 mem := v.Args[1] 8434 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8435 break 8436 } 8437 v.reset(OpS390XMOVBload) 8438 v.AuxInt = off1 + off2 8439 v.Aux = mergeSym(sym1, sym2) 8440 v.AddArg(base) 8441 v.AddArg(mem) 8442 return true 8443 } 8444 return false 8445 } 8446 func rewriteValueS390X_OpS390XMOVBreg(v *Value, config *Config) bool { 8447 b := v.Block 8448 _ = b 8449 // match: (MOVBreg x:(MOVBload _ _)) 8450 // cond: 8451 // result: (MOVDreg x) 8452 for { 8453 x := v.Args[0] 8454 if x.Op != OpS390XMOVBload { 8455 break 8456 } 8457 v.reset(OpS390XMOVDreg) 8458 v.AddArg(x) 8459 return true 8460 } 8461 // match: (MOVBreg x:(Arg <t>)) 8462 // cond: is8BitInt(t) && isSigned(t) 8463 // result: (MOVDreg x) 8464 for { 8465 x := v.Args[0] 8466 if x.Op != OpArg { 8467 break 8468 } 8469 t := x.Type 8470 if !(is8BitInt(t) && isSigned(t)) { 8471 break 8472 } 8473 v.reset(OpS390XMOVDreg) 8474 v.AddArg(x) 8475 return true 8476 } 8477 // match: (MOVBreg x:(MOVBreg _)) 8478 // cond: 8479 // result: (MOVDreg x) 8480 for { 8481 x := v.Args[0] 8482 if x.Op != OpS390XMOVBreg { 8483 break 8484 } 8485 v.reset(OpS390XMOVDreg) 8486 v.AddArg(x) 8487 return true 8488 } 8489 // match: (MOVBreg (MOVDconst [c])) 8490 // cond: 8491 // result: (MOVDconst [int64(int8(c))]) 8492 for { 8493 v_0 := v.Args[0] 8494 if v_0.Op != OpS390XMOVDconst { 8495 break 8496 } 8497 c := v_0.AuxInt 8498 v.reset(OpS390XMOVDconst) 8499 v.AuxInt = int64(int8(c)) 8500 return true 8501 } 8502 // match: (MOVBreg x:(MOVBZload [off] {sym} ptr mem)) 8503 // cond: x.Uses == 1 && clobber(x) 8504 // result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem) 8505 for { 8506 x := v.Args[0] 8507 if x.Op != OpS390XMOVBZload { 8508 break 8509 } 8510 off := x.AuxInt 8511 sym := x.Aux 8512 ptr := x.Args[0] 8513 mem := x.Args[1] 8514 if !(x.Uses == 1 && clobber(x)) { 8515 break 8516 } 8517 b = x.Block 8518 v0 := b.NewValue0(v.Pos, OpS390XMOVBload, v.Type) 8519 v.reset(OpCopy) 8520 v.AddArg(v0) 8521 v0.AuxInt = off 8522 v0.Aux = sym 8523 v0.AddArg(ptr) 8524 v0.AddArg(mem) 8525 return true 8526 } 8527 return false 8528 } 8529 func rewriteValueS390X_OpS390XMOVBstore(v *Value, config *Config) bool { 8530 b := v.Block 8531 _ = b 8532 // match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem) 8533 // cond: 8534 // result: (MOVBstore [off] {sym} ptr x mem) 8535 for { 8536 off := v.AuxInt 8537 sym := v.Aux 8538 ptr := v.Args[0] 8539 v_1 := v.Args[1] 8540 if v_1.Op != OpS390XMOVBreg { 8541 break 8542 } 8543 x := v_1.Args[0] 8544 mem := v.Args[2] 8545 v.reset(OpS390XMOVBstore) 8546 v.AuxInt = off 8547 v.Aux = sym 8548 v.AddArg(ptr) 8549 v.AddArg(x) 8550 v.AddArg(mem) 8551 return true 8552 } 8553 // match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem) 8554 // cond: 8555 // result: (MOVBstore [off] {sym} ptr x mem) 8556 for { 8557 off := v.AuxInt 8558 sym := v.Aux 8559 ptr := v.Args[0] 8560 v_1 := v.Args[1] 8561 if v_1.Op != OpS390XMOVBZreg { 8562 break 8563 } 8564 x := v_1.Args[0] 8565 mem := v.Args[2] 8566 v.reset(OpS390XMOVBstore) 8567 v.AuxInt = off 8568 v.Aux = sym 8569 v.AddArg(ptr) 8570 v.AddArg(x) 8571 v.AddArg(mem) 8572 return true 8573 } 8574 // match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) 8575 // cond: is20Bit(off1+off2) 8576 // result: (MOVBstore [off1+off2] {sym} ptr val mem) 8577 for { 8578 off1 := v.AuxInt 8579 sym := v.Aux 8580 v_0 := v.Args[0] 8581 if v_0.Op != OpS390XADDconst { 8582 break 8583 } 8584 off2 := v_0.AuxInt 8585 ptr := v_0.Args[0] 8586 val := v.Args[1] 8587 mem := v.Args[2] 8588 if !(is20Bit(off1 + off2)) { 8589 break 8590 } 8591 v.reset(OpS390XMOVBstore) 8592 v.AuxInt = off1 + off2 8593 v.Aux = sym 8594 v.AddArg(ptr) 8595 v.AddArg(val) 8596 v.AddArg(mem) 8597 return true 8598 } 8599 // match: (MOVBstore [off] {sym} ptr (MOVDconst [c]) mem) 8600 // cond: validOff(off) && ptr.Op != OpSB 8601 // result: (MOVBstoreconst [makeValAndOff(int64(int8(c)),off)] {sym} ptr mem) 8602 for { 8603 off := v.AuxInt 8604 sym := v.Aux 8605 ptr := v.Args[0] 8606 v_1 := v.Args[1] 8607 if v_1.Op != OpS390XMOVDconst { 8608 break 8609 } 8610 c := v_1.AuxInt 8611 mem := v.Args[2] 8612 if !(validOff(off) && ptr.Op != OpSB) { 8613 break 8614 } 8615 v.reset(OpS390XMOVBstoreconst) 8616 v.AuxInt = makeValAndOff(int64(int8(c)), off) 8617 v.Aux = sym 8618 v.AddArg(ptr) 8619 v.AddArg(mem) 8620 return true 8621 } 8622 // match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 8623 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8624 // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 8625 for { 8626 off1 := v.AuxInt 8627 sym1 := v.Aux 8628 v_0 := v.Args[0] 8629 if v_0.Op != OpS390XMOVDaddr { 8630 break 8631 } 8632 off2 := v_0.AuxInt 8633 sym2 := v_0.Aux 8634 base := v_0.Args[0] 8635 val := v.Args[1] 8636 mem := v.Args[2] 8637 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8638 break 8639 } 8640 v.reset(OpS390XMOVBstore) 8641 v.AuxInt = off1 + off2 8642 v.Aux = mergeSym(sym1, sym2) 8643 v.AddArg(base) 8644 v.AddArg(val) 8645 v.AddArg(mem) 8646 return true 8647 } 8648 // match: (MOVBstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 8649 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8650 // result: (MOVBstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 8651 for { 8652 off1 := v.AuxInt 8653 sym1 := v.Aux 8654 v_0 := v.Args[0] 8655 if v_0.Op != OpS390XMOVDaddridx { 8656 break 8657 } 8658 off2 := v_0.AuxInt 8659 sym2 := v_0.Aux 8660 ptr := v_0.Args[0] 8661 idx := v_0.Args[1] 8662 val := v.Args[1] 8663 mem := v.Args[2] 8664 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8665 break 8666 } 8667 v.reset(OpS390XMOVBstoreidx) 8668 v.AuxInt = off1 + off2 8669 v.Aux = mergeSym(sym1, sym2) 8670 v.AddArg(ptr) 8671 v.AddArg(idx) 8672 v.AddArg(val) 8673 v.AddArg(mem) 8674 return true 8675 } 8676 // match: (MOVBstore [off] {sym} (ADD ptr idx) val mem) 8677 // cond: ptr.Op != OpSB 8678 // result: (MOVBstoreidx [off] {sym} ptr idx val mem) 8679 for { 8680 off := v.AuxInt 8681 sym := v.Aux 8682 v_0 := v.Args[0] 8683 if v_0.Op != OpS390XADD { 8684 break 8685 } 8686 ptr := v_0.Args[0] 8687 idx := v_0.Args[1] 8688 val := v.Args[1] 8689 mem := v.Args[2] 8690 if !(ptr.Op != OpSB) { 8691 break 8692 } 8693 v.reset(OpS390XMOVBstoreidx) 8694 v.AuxInt = off 8695 v.Aux = sym 8696 v.AddArg(ptr) 8697 v.AddArg(idx) 8698 v.AddArg(val) 8699 v.AddArg(mem) 8700 return true 8701 } 8702 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRDconst [8] w) mem)) 8703 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8704 // result: (MOVHstore [i-1] {s} p w mem) 8705 for { 8706 i := v.AuxInt 8707 s := v.Aux 8708 p := v.Args[0] 8709 w := v.Args[1] 8710 x := v.Args[2] 8711 if x.Op != OpS390XMOVBstore { 8712 break 8713 } 8714 if x.AuxInt != i-1 { 8715 break 8716 } 8717 if x.Aux != s { 8718 break 8719 } 8720 if p != x.Args[0] { 8721 break 8722 } 8723 x_1 := x.Args[1] 8724 if x_1.Op != OpS390XSRDconst { 8725 break 8726 } 8727 if x_1.AuxInt != 8 { 8728 break 8729 } 8730 if w != x_1.Args[0] { 8731 break 8732 } 8733 mem := x.Args[2] 8734 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8735 break 8736 } 8737 v.reset(OpS390XMOVHstore) 8738 v.AuxInt = i - 1 8739 v.Aux = s 8740 v.AddArg(p) 8741 v.AddArg(w) 8742 v.AddArg(mem) 8743 return true 8744 } 8745 // match: (MOVBstore [i] {s} p w0:(SRDconst [j] w) x:(MOVBstore [i-1] {s} p (SRDconst [j+8] w) mem)) 8746 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8747 // result: (MOVHstore [i-1] {s} p w0 mem) 8748 for { 8749 i := v.AuxInt 8750 s := v.Aux 8751 p := v.Args[0] 8752 w0 := v.Args[1] 8753 if w0.Op != OpS390XSRDconst { 8754 break 8755 } 8756 j := w0.AuxInt 8757 w := w0.Args[0] 8758 x := v.Args[2] 8759 if x.Op != OpS390XMOVBstore { 8760 break 8761 } 8762 if x.AuxInt != i-1 { 8763 break 8764 } 8765 if x.Aux != s { 8766 break 8767 } 8768 if p != x.Args[0] { 8769 break 8770 } 8771 x_1 := x.Args[1] 8772 if x_1.Op != OpS390XSRDconst { 8773 break 8774 } 8775 if x_1.AuxInt != j+8 { 8776 break 8777 } 8778 if w != x_1.Args[0] { 8779 break 8780 } 8781 mem := x.Args[2] 8782 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8783 break 8784 } 8785 v.reset(OpS390XMOVHstore) 8786 v.AuxInt = i - 1 8787 v.Aux = s 8788 v.AddArg(p) 8789 v.AddArg(w0) 8790 v.AddArg(mem) 8791 return true 8792 } 8793 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRWconst [8] w) mem)) 8794 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8795 // result: (MOVHstore [i-1] {s} p w mem) 8796 for { 8797 i := v.AuxInt 8798 s := v.Aux 8799 p := v.Args[0] 8800 w := v.Args[1] 8801 x := v.Args[2] 8802 if x.Op != OpS390XMOVBstore { 8803 break 8804 } 8805 if x.AuxInt != i-1 { 8806 break 8807 } 8808 if x.Aux != s { 8809 break 8810 } 8811 if p != x.Args[0] { 8812 break 8813 } 8814 x_1 := x.Args[1] 8815 if x_1.Op != OpS390XSRWconst { 8816 break 8817 } 8818 if x_1.AuxInt != 8 { 8819 break 8820 } 8821 if w != x_1.Args[0] { 8822 break 8823 } 8824 mem := x.Args[2] 8825 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8826 break 8827 } 8828 v.reset(OpS390XMOVHstore) 8829 v.AuxInt = i - 1 8830 v.Aux = s 8831 v.AddArg(p) 8832 v.AddArg(w) 8833 v.AddArg(mem) 8834 return true 8835 } 8836 // match: (MOVBstore [i] {s} p w0:(SRWconst [j] w) x:(MOVBstore [i-1] {s} p (SRWconst [j+8] w) mem)) 8837 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8838 // result: (MOVHstore [i-1] {s} p w0 mem) 8839 for { 8840 i := v.AuxInt 8841 s := v.Aux 8842 p := v.Args[0] 8843 w0 := v.Args[1] 8844 if w0.Op != OpS390XSRWconst { 8845 break 8846 } 8847 j := w0.AuxInt 8848 w := w0.Args[0] 8849 x := v.Args[2] 8850 if x.Op != OpS390XMOVBstore { 8851 break 8852 } 8853 if x.AuxInt != i-1 { 8854 break 8855 } 8856 if x.Aux != s { 8857 break 8858 } 8859 if p != x.Args[0] { 8860 break 8861 } 8862 x_1 := x.Args[1] 8863 if x_1.Op != OpS390XSRWconst { 8864 break 8865 } 8866 if x_1.AuxInt != j+8 { 8867 break 8868 } 8869 if w != x_1.Args[0] { 8870 break 8871 } 8872 mem := x.Args[2] 8873 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8874 break 8875 } 8876 v.reset(OpS390XMOVHstore) 8877 v.AuxInt = i - 1 8878 v.Aux = s 8879 v.AddArg(p) 8880 v.AddArg(w0) 8881 v.AddArg(mem) 8882 return true 8883 } 8884 // match: (MOVBstore [i] {s} p (SRDconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8885 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8886 // result: (MOVHBRstore [i-1] {s} p w mem) 8887 for { 8888 i := v.AuxInt 8889 s := v.Aux 8890 p := v.Args[0] 8891 v_1 := v.Args[1] 8892 if v_1.Op != OpS390XSRDconst { 8893 break 8894 } 8895 if v_1.AuxInt != 8 { 8896 break 8897 } 8898 w := v_1.Args[0] 8899 x := v.Args[2] 8900 if x.Op != OpS390XMOVBstore { 8901 break 8902 } 8903 if x.AuxInt != i-1 { 8904 break 8905 } 8906 if x.Aux != s { 8907 break 8908 } 8909 if p != x.Args[0] { 8910 break 8911 } 8912 if w != x.Args[1] { 8913 break 8914 } 8915 mem := x.Args[2] 8916 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8917 break 8918 } 8919 v.reset(OpS390XMOVHBRstore) 8920 v.AuxInt = i - 1 8921 v.Aux = s 8922 v.AddArg(p) 8923 v.AddArg(w) 8924 v.AddArg(mem) 8925 return true 8926 } 8927 // match: (MOVBstore [i] {s} p (SRDconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRDconst [j-8] w) mem)) 8928 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8929 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8930 for { 8931 i := v.AuxInt 8932 s := v.Aux 8933 p := v.Args[0] 8934 v_1 := v.Args[1] 8935 if v_1.Op != OpS390XSRDconst { 8936 break 8937 } 8938 j := v_1.AuxInt 8939 w := v_1.Args[0] 8940 x := v.Args[2] 8941 if x.Op != OpS390XMOVBstore { 8942 break 8943 } 8944 if x.AuxInt != i-1 { 8945 break 8946 } 8947 if x.Aux != s { 8948 break 8949 } 8950 if p != x.Args[0] { 8951 break 8952 } 8953 w0 := x.Args[1] 8954 if w0.Op != OpS390XSRDconst { 8955 break 8956 } 8957 if w0.AuxInt != j-8 { 8958 break 8959 } 8960 if w != w0.Args[0] { 8961 break 8962 } 8963 mem := x.Args[2] 8964 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8965 break 8966 } 8967 v.reset(OpS390XMOVHBRstore) 8968 v.AuxInt = i - 1 8969 v.Aux = s 8970 v.AddArg(p) 8971 v.AddArg(w0) 8972 v.AddArg(mem) 8973 return true 8974 } 8975 // match: (MOVBstore [i] {s} p (SRWconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8976 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8977 // result: (MOVHBRstore [i-1] {s} p w mem) 8978 for { 8979 i := v.AuxInt 8980 s := v.Aux 8981 p := v.Args[0] 8982 v_1 := v.Args[1] 8983 if v_1.Op != OpS390XSRWconst { 8984 break 8985 } 8986 if v_1.AuxInt != 8 { 8987 break 8988 } 8989 w := v_1.Args[0] 8990 x := v.Args[2] 8991 if x.Op != OpS390XMOVBstore { 8992 break 8993 } 8994 if x.AuxInt != i-1 { 8995 break 8996 } 8997 if x.Aux != s { 8998 break 8999 } 9000 if p != x.Args[0] { 9001 break 9002 } 9003 if w != x.Args[1] { 9004 break 9005 } 9006 mem := x.Args[2] 9007 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 9008 break 9009 } 9010 v.reset(OpS390XMOVHBRstore) 9011 v.AuxInt = i - 1 9012 v.Aux = s 9013 v.AddArg(p) 9014 v.AddArg(w) 9015 v.AddArg(mem) 9016 return true 9017 } 9018 // match: (MOVBstore [i] {s} p (SRWconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRWconst [j-8] w) mem)) 9019 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 9020 // result: (MOVHBRstore [i-1] {s} p w0 mem) 9021 for { 9022 i := v.AuxInt 9023 s := v.Aux 9024 p := v.Args[0] 9025 v_1 := v.Args[1] 9026 if v_1.Op != OpS390XSRWconst { 9027 break 9028 } 9029 j := v_1.AuxInt 9030 w := v_1.Args[0] 9031 x := v.Args[2] 9032 if x.Op != OpS390XMOVBstore { 9033 break 9034 } 9035 if x.AuxInt != i-1 { 9036 break 9037 } 9038 if x.Aux != s { 9039 break 9040 } 9041 if p != x.Args[0] { 9042 break 9043 } 9044 w0 := x.Args[1] 9045 if w0.Op != OpS390XSRWconst { 9046 break 9047 } 9048 if w0.AuxInt != j-8 { 9049 break 9050 } 9051 if w != w0.Args[0] { 9052 break 9053 } 9054 mem := x.Args[2] 9055 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 9056 break 9057 } 9058 v.reset(OpS390XMOVHBRstore) 9059 v.AuxInt = i - 1 9060 v.Aux = s 9061 v.AddArg(p) 9062 v.AddArg(w0) 9063 v.AddArg(mem) 9064 return true 9065 } 9066 return false 9067 } 9068 func rewriteValueS390X_OpS390XMOVBstoreconst(v *Value, config *Config) bool { 9069 b := v.Block 9070 _ = b 9071 // match: (MOVBstoreconst [sc] {s} (ADDconst [off] ptr) mem) 9072 // cond: ValAndOff(sc).canAdd(off) 9073 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 9074 for { 9075 sc := v.AuxInt 9076 s := v.Aux 9077 v_0 := v.Args[0] 9078 if v_0.Op != OpS390XADDconst { 9079 break 9080 } 9081 off := v_0.AuxInt 9082 ptr := v_0.Args[0] 9083 mem := v.Args[1] 9084 if !(ValAndOff(sc).canAdd(off)) { 9085 break 9086 } 9087 v.reset(OpS390XMOVBstoreconst) 9088 v.AuxInt = ValAndOff(sc).add(off) 9089 v.Aux = s 9090 v.AddArg(ptr) 9091 v.AddArg(mem) 9092 return true 9093 } 9094 // match: (MOVBstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 9095 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 9096 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 9097 for { 9098 sc := v.AuxInt 9099 sym1 := v.Aux 9100 v_0 := v.Args[0] 9101 if v_0.Op != OpS390XMOVDaddr { 9102 break 9103 } 9104 off := v_0.AuxInt 9105 sym2 := v_0.Aux 9106 ptr := v_0.Args[0] 9107 mem := v.Args[1] 9108 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 9109 break 9110 } 9111 v.reset(OpS390XMOVBstoreconst) 9112 v.AuxInt = ValAndOff(sc).add(off) 9113 v.Aux = mergeSym(sym1, sym2) 9114 v.AddArg(ptr) 9115 v.AddArg(mem) 9116 return true 9117 } 9118 // match: (MOVBstoreconst [c] {s} p x:(MOVBstoreconst [a] {s} p mem)) 9119 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 1 == ValAndOff(c).Off() && clobber(x) 9120 // result: (MOVHstoreconst [makeValAndOff(ValAndOff(c).Val()&0xff | ValAndOff(a).Val()<<8, ValAndOff(a).Off())] {s} p mem) 9121 for { 9122 c := v.AuxInt 9123 s := v.Aux 9124 p := v.Args[0] 9125 x := v.Args[1] 9126 if x.Op != OpS390XMOVBstoreconst { 9127 break 9128 } 9129 a := x.AuxInt 9130 if x.Aux != s { 9131 break 9132 } 9133 if p != x.Args[0] { 9134 break 9135 } 9136 mem := x.Args[1] 9137 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) { 9138 break 9139 } 9140 v.reset(OpS390XMOVHstoreconst) 9141 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xff|ValAndOff(a).Val()<<8, ValAndOff(a).Off()) 9142 v.Aux = s 9143 v.AddArg(p) 9144 v.AddArg(mem) 9145 return true 9146 } 9147 return false 9148 } 9149 func rewriteValueS390X_OpS390XMOVBstoreidx(v *Value, config *Config) bool { 9150 b := v.Block 9151 _ = b 9152 // match: (MOVBstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 9153 // cond: 9154 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9155 for { 9156 c := v.AuxInt 9157 sym := v.Aux 9158 v_0 := v.Args[0] 9159 if v_0.Op != OpS390XADDconst { 9160 break 9161 } 9162 d := v_0.AuxInt 9163 ptr := v_0.Args[0] 9164 idx := v.Args[1] 9165 val := v.Args[2] 9166 mem := v.Args[3] 9167 v.reset(OpS390XMOVBstoreidx) 9168 v.AuxInt = c + d 9169 v.Aux = sym 9170 v.AddArg(ptr) 9171 v.AddArg(idx) 9172 v.AddArg(val) 9173 v.AddArg(mem) 9174 return true 9175 } 9176 // match: (MOVBstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 9177 // cond: 9178 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9179 for { 9180 c := v.AuxInt 9181 sym := v.Aux 9182 ptr := v.Args[0] 9183 v_1 := v.Args[1] 9184 if v_1.Op != OpS390XADDconst { 9185 break 9186 } 9187 d := v_1.AuxInt 9188 idx := v_1.Args[0] 9189 val := v.Args[2] 9190 mem := v.Args[3] 9191 v.reset(OpS390XMOVBstoreidx) 9192 v.AuxInt = c + d 9193 v.Aux = sym 9194 v.AddArg(ptr) 9195 v.AddArg(idx) 9196 v.AddArg(val) 9197 v.AddArg(mem) 9198 return true 9199 } 9200 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [8] w) mem)) 9201 // cond: x.Uses == 1 && clobber(x) 9202 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9203 for { 9204 i := v.AuxInt 9205 s := v.Aux 9206 p := v.Args[0] 9207 idx := v.Args[1] 9208 w := v.Args[2] 9209 x := v.Args[3] 9210 if x.Op != OpS390XMOVBstoreidx { 9211 break 9212 } 9213 if x.AuxInt != i-1 { 9214 break 9215 } 9216 if x.Aux != s { 9217 break 9218 } 9219 if p != x.Args[0] { 9220 break 9221 } 9222 if idx != x.Args[1] { 9223 break 9224 } 9225 x_2 := x.Args[2] 9226 if x_2.Op != OpS390XSRDconst { 9227 break 9228 } 9229 if x_2.AuxInt != 8 { 9230 break 9231 } 9232 if w != x_2.Args[0] { 9233 break 9234 } 9235 mem := x.Args[3] 9236 if !(x.Uses == 1 && clobber(x)) { 9237 break 9238 } 9239 v.reset(OpS390XMOVHstoreidx) 9240 v.AuxInt = i - 1 9241 v.Aux = s 9242 v.AddArg(p) 9243 v.AddArg(idx) 9244 v.AddArg(w) 9245 v.AddArg(mem) 9246 return true 9247 } 9248 // match: (MOVBstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [j+8] w) mem)) 9249 // cond: x.Uses == 1 && clobber(x) 9250 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9251 for { 9252 i := v.AuxInt 9253 s := v.Aux 9254 p := v.Args[0] 9255 idx := v.Args[1] 9256 w0 := v.Args[2] 9257 if w0.Op != OpS390XSRDconst { 9258 break 9259 } 9260 j := w0.AuxInt 9261 w := w0.Args[0] 9262 x := v.Args[3] 9263 if x.Op != OpS390XMOVBstoreidx { 9264 break 9265 } 9266 if x.AuxInt != i-1 { 9267 break 9268 } 9269 if x.Aux != s { 9270 break 9271 } 9272 if p != x.Args[0] { 9273 break 9274 } 9275 if idx != x.Args[1] { 9276 break 9277 } 9278 x_2 := x.Args[2] 9279 if x_2.Op != OpS390XSRDconst { 9280 break 9281 } 9282 if x_2.AuxInt != j+8 { 9283 break 9284 } 9285 if w != x_2.Args[0] { 9286 break 9287 } 9288 mem := x.Args[3] 9289 if !(x.Uses == 1 && clobber(x)) { 9290 break 9291 } 9292 v.reset(OpS390XMOVHstoreidx) 9293 v.AuxInt = i - 1 9294 v.Aux = s 9295 v.AddArg(p) 9296 v.AddArg(idx) 9297 v.AddArg(w0) 9298 v.AddArg(mem) 9299 return true 9300 } 9301 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [8] w) mem)) 9302 // cond: x.Uses == 1 && clobber(x) 9303 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9304 for { 9305 i := v.AuxInt 9306 s := v.Aux 9307 p := v.Args[0] 9308 idx := v.Args[1] 9309 w := v.Args[2] 9310 x := v.Args[3] 9311 if x.Op != OpS390XMOVBstoreidx { 9312 break 9313 } 9314 if x.AuxInt != i-1 { 9315 break 9316 } 9317 if x.Aux != s { 9318 break 9319 } 9320 if p != x.Args[0] { 9321 break 9322 } 9323 if idx != x.Args[1] { 9324 break 9325 } 9326 x_2 := x.Args[2] 9327 if x_2.Op != OpS390XSRWconst { 9328 break 9329 } 9330 if x_2.AuxInt != 8 { 9331 break 9332 } 9333 if w != x_2.Args[0] { 9334 break 9335 } 9336 mem := x.Args[3] 9337 if !(x.Uses == 1 && clobber(x)) { 9338 break 9339 } 9340 v.reset(OpS390XMOVHstoreidx) 9341 v.AuxInt = i - 1 9342 v.Aux = s 9343 v.AddArg(p) 9344 v.AddArg(idx) 9345 v.AddArg(w) 9346 v.AddArg(mem) 9347 return true 9348 } 9349 // match: (MOVBstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [j+8] w) mem)) 9350 // cond: x.Uses == 1 && clobber(x) 9351 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9352 for { 9353 i := v.AuxInt 9354 s := v.Aux 9355 p := v.Args[0] 9356 idx := v.Args[1] 9357 w0 := v.Args[2] 9358 if w0.Op != OpS390XSRWconst { 9359 break 9360 } 9361 j := w0.AuxInt 9362 w := w0.Args[0] 9363 x := v.Args[3] 9364 if x.Op != OpS390XMOVBstoreidx { 9365 break 9366 } 9367 if x.AuxInt != i-1 { 9368 break 9369 } 9370 if x.Aux != s { 9371 break 9372 } 9373 if p != x.Args[0] { 9374 break 9375 } 9376 if idx != x.Args[1] { 9377 break 9378 } 9379 x_2 := x.Args[2] 9380 if x_2.Op != OpS390XSRWconst { 9381 break 9382 } 9383 if x_2.AuxInt != j+8 { 9384 break 9385 } 9386 if w != x_2.Args[0] { 9387 break 9388 } 9389 mem := x.Args[3] 9390 if !(x.Uses == 1 && clobber(x)) { 9391 break 9392 } 9393 v.reset(OpS390XMOVHstoreidx) 9394 v.AuxInt = i - 1 9395 v.Aux = s 9396 v.AddArg(p) 9397 v.AddArg(idx) 9398 v.AddArg(w0) 9399 v.AddArg(mem) 9400 return true 9401 } 9402 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9403 // cond: x.Uses == 1 && clobber(x) 9404 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9405 for { 9406 i := v.AuxInt 9407 s := v.Aux 9408 p := v.Args[0] 9409 idx := v.Args[1] 9410 v_2 := v.Args[2] 9411 if v_2.Op != OpS390XSRDconst { 9412 break 9413 } 9414 if v_2.AuxInt != 8 { 9415 break 9416 } 9417 w := v_2.Args[0] 9418 x := v.Args[3] 9419 if x.Op != OpS390XMOVBstoreidx { 9420 break 9421 } 9422 if x.AuxInt != i-1 { 9423 break 9424 } 9425 if x.Aux != s { 9426 break 9427 } 9428 if p != x.Args[0] { 9429 break 9430 } 9431 if idx != x.Args[1] { 9432 break 9433 } 9434 if w != x.Args[2] { 9435 break 9436 } 9437 mem := x.Args[3] 9438 if !(x.Uses == 1 && clobber(x)) { 9439 break 9440 } 9441 v.reset(OpS390XMOVHBRstoreidx) 9442 v.AuxInt = i - 1 9443 v.Aux = s 9444 v.AddArg(p) 9445 v.AddArg(idx) 9446 v.AddArg(w) 9447 v.AddArg(mem) 9448 return true 9449 } 9450 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRDconst [j-8] w) mem)) 9451 // cond: x.Uses == 1 && clobber(x) 9452 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9453 for { 9454 i := v.AuxInt 9455 s := v.Aux 9456 p := v.Args[0] 9457 idx := v.Args[1] 9458 v_2 := v.Args[2] 9459 if v_2.Op != OpS390XSRDconst { 9460 break 9461 } 9462 j := v_2.AuxInt 9463 w := v_2.Args[0] 9464 x := v.Args[3] 9465 if x.Op != OpS390XMOVBstoreidx { 9466 break 9467 } 9468 if x.AuxInt != i-1 { 9469 break 9470 } 9471 if x.Aux != s { 9472 break 9473 } 9474 if p != x.Args[0] { 9475 break 9476 } 9477 if idx != x.Args[1] { 9478 break 9479 } 9480 w0 := x.Args[2] 9481 if w0.Op != OpS390XSRDconst { 9482 break 9483 } 9484 if w0.AuxInt != j-8 { 9485 break 9486 } 9487 if w != w0.Args[0] { 9488 break 9489 } 9490 mem := x.Args[3] 9491 if !(x.Uses == 1 && clobber(x)) { 9492 break 9493 } 9494 v.reset(OpS390XMOVHBRstoreidx) 9495 v.AuxInt = i - 1 9496 v.Aux = s 9497 v.AddArg(p) 9498 v.AddArg(idx) 9499 v.AddArg(w0) 9500 v.AddArg(mem) 9501 return true 9502 } 9503 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9504 // cond: x.Uses == 1 && clobber(x) 9505 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9506 for { 9507 i := v.AuxInt 9508 s := v.Aux 9509 p := v.Args[0] 9510 idx := v.Args[1] 9511 v_2 := v.Args[2] 9512 if v_2.Op != OpS390XSRWconst { 9513 break 9514 } 9515 if v_2.AuxInt != 8 { 9516 break 9517 } 9518 w := v_2.Args[0] 9519 x := v.Args[3] 9520 if x.Op != OpS390XMOVBstoreidx { 9521 break 9522 } 9523 if x.AuxInt != i-1 { 9524 break 9525 } 9526 if x.Aux != s { 9527 break 9528 } 9529 if p != x.Args[0] { 9530 break 9531 } 9532 if idx != x.Args[1] { 9533 break 9534 } 9535 if w != x.Args[2] { 9536 break 9537 } 9538 mem := x.Args[3] 9539 if !(x.Uses == 1 && clobber(x)) { 9540 break 9541 } 9542 v.reset(OpS390XMOVHBRstoreidx) 9543 v.AuxInt = i - 1 9544 v.Aux = s 9545 v.AddArg(p) 9546 v.AddArg(idx) 9547 v.AddArg(w) 9548 v.AddArg(mem) 9549 return true 9550 } 9551 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRWconst [j-8] w) mem)) 9552 // cond: x.Uses == 1 && clobber(x) 9553 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9554 for { 9555 i := v.AuxInt 9556 s := v.Aux 9557 p := v.Args[0] 9558 idx := v.Args[1] 9559 v_2 := v.Args[2] 9560 if v_2.Op != OpS390XSRWconst { 9561 break 9562 } 9563 j := v_2.AuxInt 9564 w := v_2.Args[0] 9565 x := v.Args[3] 9566 if x.Op != OpS390XMOVBstoreidx { 9567 break 9568 } 9569 if x.AuxInt != i-1 { 9570 break 9571 } 9572 if x.Aux != s { 9573 break 9574 } 9575 if p != x.Args[0] { 9576 break 9577 } 9578 if idx != x.Args[1] { 9579 break 9580 } 9581 w0 := x.Args[2] 9582 if w0.Op != OpS390XSRWconst { 9583 break 9584 } 9585 if w0.AuxInt != j-8 { 9586 break 9587 } 9588 if w != w0.Args[0] { 9589 break 9590 } 9591 mem := x.Args[3] 9592 if !(x.Uses == 1 && clobber(x)) { 9593 break 9594 } 9595 v.reset(OpS390XMOVHBRstoreidx) 9596 v.AuxInt = i - 1 9597 v.Aux = s 9598 v.AddArg(p) 9599 v.AddArg(idx) 9600 v.AddArg(w0) 9601 v.AddArg(mem) 9602 return true 9603 } 9604 return false 9605 } 9606 func rewriteValueS390X_OpS390XMOVDEQ(v *Value, config *Config) bool { 9607 b := v.Block 9608 _ = b 9609 // match: (MOVDEQ x y (InvertFlags cmp)) 9610 // cond: 9611 // result: (MOVDEQ x y cmp) 9612 for { 9613 x := v.Args[0] 9614 y := v.Args[1] 9615 v_2 := v.Args[2] 9616 if v_2.Op != OpS390XInvertFlags { 9617 break 9618 } 9619 cmp := v_2.Args[0] 9620 v.reset(OpS390XMOVDEQ) 9621 v.AddArg(x) 9622 v.AddArg(y) 9623 v.AddArg(cmp) 9624 return true 9625 } 9626 // match: (MOVDEQ _ x (FlagEQ)) 9627 // cond: 9628 // result: x 9629 for { 9630 x := v.Args[1] 9631 v_2 := v.Args[2] 9632 if v_2.Op != OpS390XFlagEQ { 9633 break 9634 } 9635 v.reset(OpCopy) 9636 v.Type = x.Type 9637 v.AddArg(x) 9638 return true 9639 } 9640 // match: (MOVDEQ y _ (FlagLT)) 9641 // cond: 9642 // result: y 9643 for { 9644 y := v.Args[0] 9645 v_2 := v.Args[2] 9646 if v_2.Op != OpS390XFlagLT { 9647 break 9648 } 9649 v.reset(OpCopy) 9650 v.Type = y.Type 9651 v.AddArg(y) 9652 return true 9653 } 9654 // match: (MOVDEQ y _ (FlagGT)) 9655 // cond: 9656 // result: y 9657 for { 9658 y := v.Args[0] 9659 v_2 := v.Args[2] 9660 if v_2.Op != OpS390XFlagGT { 9661 break 9662 } 9663 v.reset(OpCopy) 9664 v.Type = y.Type 9665 v.AddArg(y) 9666 return true 9667 } 9668 return false 9669 } 9670 func rewriteValueS390X_OpS390XMOVDGE(v *Value, config *Config) bool { 9671 b := v.Block 9672 _ = b 9673 // match: (MOVDGE x y (InvertFlags cmp)) 9674 // cond: 9675 // result: (MOVDLE x y cmp) 9676 for { 9677 x := v.Args[0] 9678 y := v.Args[1] 9679 v_2 := v.Args[2] 9680 if v_2.Op != OpS390XInvertFlags { 9681 break 9682 } 9683 cmp := v_2.Args[0] 9684 v.reset(OpS390XMOVDLE) 9685 v.AddArg(x) 9686 v.AddArg(y) 9687 v.AddArg(cmp) 9688 return true 9689 } 9690 // match: (MOVDGE _ x (FlagEQ)) 9691 // cond: 9692 // result: x 9693 for { 9694 x := v.Args[1] 9695 v_2 := v.Args[2] 9696 if v_2.Op != OpS390XFlagEQ { 9697 break 9698 } 9699 v.reset(OpCopy) 9700 v.Type = x.Type 9701 v.AddArg(x) 9702 return true 9703 } 9704 // match: (MOVDGE y _ (FlagLT)) 9705 // cond: 9706 // result: y 9707 for { 9708 y := v.Args[0] 9709 v_2 := v.Args[2] 9710 if v_2.Op != OpS390XFlagLT { 9711 break 9712 } 9713 v.reset(OpCopy) 9714 v.Type = y.Type 9715 v.AddArg(y) 9716 return true 9717 } 9718 // match: (MOVDGE _ x (FlagGT)) 9719 // cond: 9720 // result: x 9721 for { 9722 x := v.Args[1] 9723 v_2 := v.Args[2] 9724 if v_2.Op != OpS390XFlagGT { 9725 break 9726 } 9727 v.reset(OpCopy) 9728 v.Type = x.Type 9729 v.AddArg(x) 9730 return true 9731 } 9732 return false 9733 } 9734 func rewriteValueS390X_OpS390XMOVDGT(v *Value, config *Config) bool { 9735 b := v.Block 9736 _ = b 9737 // match: (MOVDGT x y (InvertFlags cmp)) 9738 // cond: 9739 // result: (MOVDLT x y cmp) 9740 for { 9741 x := v.Args[0] 9742 y := v.Args[1] 9743 v_2 := v.Args[2] 9744 if v_2.Op != OpS390XInvertFlags { 9745 break 9746 } 9747 cmp := v_2.Args[0] 9748 v.reset(OpS390XMOVDLT) 9749 v.AddArg(x) 9750 v.AddArg(y) 9751 v.AddArg(cmp) 9752 return true 9753 } 9754 // match: (MOVDGT y _ (FlagEQ)) 9755 // cond: 9756 // result: y 9757 for { 9758 y := v.Args[0] 9759 v_2 := v.Args[2] 9760 if v_2.Op != OpS390XFlagEQ { 9761 break 9762 } 9763 v.reset(OpCopy) 9764 v.Type = y.Type 9765 v.AddArg(y) 9766 return true 9767 } 9768 // match: (MOVDGT y _ (FlagLT)) 9769 // cond: 9770 // result: y 9771 for { 9772 y := v.Args[0] 9773 v_2 := v.Args[2] 9774 if v_2.Op != OpS390XFlagLT { 9775 break 9776 } 9777 v.reset(OpCopy) 9778 v.Type = y.Type 9779 v.AddArg(y) 9780 return true 9781 } 9782 // match: (MOVDGT _ x (FlagGT)) 9783 // cond: 9784 // result: x 9785 for { 9786 x := v.Args[1] 9787 v_2 := v.Args[2] 9788 if v_2.Op != OpS390XFlagGT { 9789 break 9790 } 9791 v.reset(OpCopy) 9792 v.Type = x.Type 9793 v.AddArg(x) 9794 return true 9795 } 9796 return false 9797 } 9798 func rewriteValueS390X_OpS390XMOVDLE(v *Value, config *Config) bool { 9799 b := v.Block 9800 _ = b 9801 // match: (MOVDLE x y (InvertFlags cmp)) 9802 // cond: 9803 // result: (MOVDGE x y cmp) 9804 for { 9805 x := v.Args[0] 9806 y := v.Args[1] 9807 v_2 := v.Args[2] 9808 if v_2.Op != OpS390XInvertFlags { 9809 break 9810 } 9811 cmp := v_2.Args[0] 9812 v.reset(OpS390XMOVDGE) 9813 v.AddArg(x) 9814 v.AddArg(y) 9815 v.AddArg(cmp) 9816 return true 9817 } 9818 // match: (MOVDLE _ x (FlagEQ)) 9819 // cond: 9820 // result: x 9821 for { 9822 x := v.Args[1] 9823 v_2 := v.Args[2] 9824 if v_2.Op != OpS390XFlagEQ { 9825 break 9826 } 9827 v.reset(OpCopy) 9828 v.Type = x.Type 9829 v.AddArg(x) 9830 return true 9831 } 9832 // match: (MOVDLE _ x (FlagLT)) 9833 // cond: 9834 // result: x 9835 for { 9836 x := v.Args[1] 9837 v_2 := v.Args[2] 9838 if v_2.Op != OpS390XFlagLT { 9839 break 9840 } 9841 v.reset(OpCopy) 9842 v.Type = x.Type 9843 v.AddArg(x) 9844 return true 9845 } 9846 // match: (MOVDLE y _ (FlagGT)) 9847 // cond: 9848 // result: y 9849 for { 9850 y := v.Args[0] 9851 v_2 := v.Args[2] 9852 if v_2.Op != OpS390XFlagGT { 9853 break 9854 } 9855 v.reset(OpCopy) 9856 v.Type = y.Type 9857 v.AddArg(y) 9858 return true 9859 } 9860 return false 9861 } 9862 func rewriteValueS390X_OpS390XMOVDLT(v *Value, config *Config) bool { 9863 b := v.Block 9864 _ = b 9865 // match: (MOVDLT x y (InvertFlags cmp)) 9866 // cond: 9867 // result: (MOVDGT x y cmp) 9868 for { 9869 x := v.Args[0] 9870 y := v.Args[1] 9871 v_2 := v.Args[2] 9872 if v_2.Op != OpS390XInvertFlags { 9873 break 9874 } 9875 cmp := v_2.Args[0] 9876 v.reset(OpS390XMOVDGT) 9877 v.AddArg(x) 9878 v.AddArg(y) 9879 v.AddArg(cmp) 9880 return true 9881 } 9882 // match: (MOVDLT y _ (FlagEQ)) 9883 // cond: 9884 // result: y 9885 for { 9886 y := v.Args[0] 9887 v_2 := v.Args[2] 9888 if v_2.Op != OpS390XFlagEQ { 9889 break 9890 } 9891 v.reset(OpCopy) 9892 v.Type = y.Type 9893 v.AddArg(y) 9894 return true 9895 } 9896 // match: (MOVDLT _ x (FlagLT)) 9897 // cond: 9898 // result: x 9899 for { 9900 x := v.Args[1] 9901 v_2 := v.Args[2] 9902 if v_2.Op != OpS390XFlagLT { 9903 break 9904 } 9905 v.reset(OpCopy) 9906 v.Type = x.Type 9907 v.AddArg(x) 9908 return true 9909 } 9910 // match: (MOVDLT y _ (FlagGT)) 9911 // cond: 9912 // result: y 9913 for { 9914 y := v.Args[0] 9915 v_2 := v.Args[2] 9916 if v_2.Op != OpS390XFlagGT { 9917 break 9918 } 9919 v.reset(OpCopy) 9920 v.Type = y.Type 9921 v.AddArg(y) 9922 return true 9923 } 9924 return false 9925 } 9926 func rewriteValueS390X_OpS390XMOVDNE(v *Value, config *Config) bool { 9927 b := v.Block 9928 _ = b 9929 // match: (MOVDNE x y (InvertFlags cmp)) 9930 // cond: 9931 // result: (MOVDNE x y cmp) 9932 for { 9933 x := v.Args[0] 9934 y := v.Args[1] 9935 v_2 := v.Args[2] 9936 if v_2.Op != OpS390XInvertFlags { 9937 break 9938 } 9939 cmp := v_2.Args[0] 9940 v.reset(OpS390XMOVDNE) 9941 v.AddArg(x) 9942 v.AddArg(y) 9943 v.AddArg(cmp) 9944 return true 9945 } 9946 // match: (MOVDNE y _ (FlagEQ)) 9947 // cond: 9948 // result: y 9949 for { 9950 y := v.Args[0] 9951 v_2 := v.Args[2] 9952 if v_2.Op != OpS390XFlagEQ { 9953 break 9954 } 9955 v.reset(OpCopy) 9956 v.Type = y.Type 9957 v.AddArg(y) 9958 return true 9959 } 9960 // match: (MOVDNE _ x (FlagLT)) 9961 // cond: 9962 // result: x 9963 for { 9964 x := v.Args[1] 9965 v_2 := v.Args[2] 9966 if v_2.Op != OpS390XFlagLT { 9967 break 9968 } 9969 v.reset(OpCopy) 9970 v.Type = x.Type 9971 v.AddArg(x) 9972 return true 9973 } 9974 // match: (MOVDNE _ x (FlagGT)) 9975 // cond: 9976 // result: x 9977 for { 9978 x := v.Args[1] 9979 v_2 := v.Args[2] 9980 if v_2.Op != OpS390XFlagGT { 9981 break 9982 } 9983 v.reset(OpCopy) 9984 v.Type = x.Type 9985 v.AddArg(x) 9986 return true 9987 } 9988 return false 9989 } 9990 func rewriteValueS390X_OpS390XMOVDaddridx(v *Value, config *Config) bool { 9991 b := v.Block 9992 _ = b 9993 // match: (MOVDaddridx [c] {s} (ADDconst [d] x) y) 9994 // cond: is20Bit(c+d) && x.Op != OpSB 9995 // result: (MOVDaddridx [c+d] {s} x y) 9996 for { 9997 c := v.AuxInt 9998 s := v.Aux 9999 v_0 := v.Args[0] 10000 if v_0.Op != OpS390XADDconst { 10001 break 10002 } 10003 d := v_0.AuxInt 10004 x := v_0.Args[0] 10005 y := v.Args[1] 10006 if !(is20Bit(c+d) && x.Op != OpSB) { 10007 break 10008 } 10009 v.reset(OpS390XMOVDaddridx) 10010 v.AuxInt = c + d 10011 v.Aux = s 10012 v.AddArg(x) 10013 v.AddArg(y) 10014 return true 10015 } 10016 // match: (MOVDaddridx [c] {s} x (ADDconst [d] y)) 10017 // cond: is20Bit(c+d) && y.Op != OpSB 10018 // result: (MOVDaddridx [c+d] {s} x y) 10019 for { 10020 c := v.AuxInt 10021 s := v.Aux 10022 x := v.Args[0] 10023 v_1 := v.Args[1] 10024 if v_1.Op != OpS390XADDconst { 10025 break 10026 } 10027 d := v_1.AuxInt 10028 y := v_1.Args[0] 10029 if !(is20Bit(c+d) && y.Op != OpSB) { 10030 break 10031 } 10032 v.reset(OpS390XMOVDaddridx) 10033 v.AuxInt = c + d 10034 v.Aux = s 10035 v.AddArg(x) 10036 v.AddArg(y) 10037 return true 10038 } 10039 // match: (MOVDaddridx [off1] {sym1} (MOVDaddr [off2] {sym2} x) y) 10040 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 10041 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 10042 for { 10043 off1 := v.AuxInt 10044 sym1 := v.Aux 10045 v_0 := v.Args[0] 10046 if v_0.Op != OpS390XMOVDaddr { 10047 break 10048 } 10049 off2 := v_0.AuxInt 10050 sym2 := v_0.Aux 10051 x := v_0.Args[0] 10052 y := v.Args[1] 10053 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 10054 break 10055 } 10056 v.reset(OpS390XMOVDaddridx) 10057 v.AuxInt = off1 + off2 10058 v.Aux = mergeSym(sym1, sym2) 10059 v.AddArg(x) 10060 v.AddArg(y) 10061 return true 10062 } 10063 // match: (MOVDaddridx [off1] {sym1} x (MOVDaddr [off2] {sym2} y)) 10064 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB 10065 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 10066 for { 10067 off1 := v.AuxInt 10068 sym1 := v.Aux 10069 x := v.Args[0] 10070 v_1 := v.Args[1] 10071 if v_1.Op != OpS390XMOVDaddr { 10072 break 10073 } 10074 off2 := v_1.AuxInt 10075 sym2 := v_1.Aux 10076 y := v_1.Args[0] 10077 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB) { 10078 break 10079 } 10080 v.reset(OpS390XMOVDaddridx) 10081 v.AuxInt = off1 + off2 10082 v.Aux = mergeSym(sym1, sym2) 10083 v.AddArg(x) 10084 v.AddArg(y) 10085 return true 10086 } 10087 return false 10088 } 10089 func rewriteValueS390X_OpS390XMOVDload(v *Value, config *Config) bool { 10090 b := v.Block 10091 _ = b 10092 // match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) 10093 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 10094 // result: (MOVDreg x) 10095 for { 10096 off := v.AuxInt 10097 sym := v.Aux 10098 ptr := v.Args[0] 10099 v_1 := v.Args[1] 10100 if v_1.Op != OpS390XMOVDstore { 10101 break 10102 } 10103 off2 := v_1.AuxInt 10104 sym2 := v_1.Aux 10105 ptr2 := v_1.Args[0] 10106 x := v_1.Args[1] 10107 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 10108 break 10109 } 10110 v.reset(OpS390XMOVDreg) 10111 v.AddArg(x) 10112 return true 10113 } 10114 // match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 10115 // cond: is20Bit(off1+off2) 10116 // result: (MOVDload [off1+off2] {sym} ptr mem) 10117 for { 10118 off1 := v.AuxInt 10119 sym := v.Aux 10120 v_0 := v.Args[0] 10121 if v_0.Op != OpS390XADDconst { 10122 break 10123 } 10124 off2 := v_0.AuxInt 10125 ptr := v_0.Args[0] 10126 mem := v.Args[1] 10127 if !(is20Bit(off1 + off2)) { 10128 break 10129 } 10130 v.reset(OpS390XMOVDload) 10131 v.AuxInt = off1 + off2 10132 v.Aux = sym 10133 v.AddArg(ptr) 10134 v.AddArg(mem) 10135 return true 10136 } 10137 // match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 10138 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10139 // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 10140 for { 10141 off1 := v.AuxInt 10142 sym1 := v.Aux 10143 v_0 := v.Args[0] 10144 if v_0.Op != OpS390XMOVDaddr { 10145 break 10146 } 10147 off2 := v_0.AuxInt 10148 sym2 := v_0.Aux 10149 base := v_0.Args[0] 10150 mem := v.Args[1] 10151 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10152 break 10153 } 10154 v.reset(OpS390XMOVDload) 10155 v.AuxInt = off1 + off2 10156 v.Aux = mergeSym(sym1, sym2) 10157 v.AddArg(base) 10158 v.AddArg(mem) 10159 return true 10160 } 10161 // match: (MOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 10162 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10163 // result: (MOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 10164 for { 10165 off1 := v.AuxInt 10166 sym1 := v.Aux 10167 v_0 := v.Args[0] 10168 if v_0.Op != OpS390XMOVDaddridx { 10169 break 10170 } 10171 off2 := v_0.AuxInt 10172 sym2 := v_0.Aux 10173 ptr := v_0.Args[0] 10174 idx := v_0.Args[1] 10175 mem := v.Args[1] 10176 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10177 break 10178 } 10179 v.reset(OpS390XMOVDloadidx) 10180 v.AuxInt = off1 + off2 10181 v.Aux = mergeSym(sym1, sym2) 10182 v.AddArg(ptr) 10183 v.AddArg(idx) 10184 v.AddArg(mem) 10185 return true 10186 } 10187 // match: (MOVDload [off] {sym} (ADD ptr idx) mem) 10188 // cond: ptr.Op != OpSB 10189 // result: (MOVDloadidx [off] {sym} ptr idx mem) 10190 for { 10191 off := v.AuxInt 10192 sym := v.Aux 10193 v_0 := v.Args[0] 10194 if v_0.Op != OpS390XADD { 10195 break 10196 } 10197 ptr := v_0.Args[0] 10198 idx := v_0.Args[1] 10199 mem := v.Args[1] 10200 if !(ptr.Op != OpSB) { 10201 break 10202 } 10203 v.reset(OpS390XMOVDloadidx) 10204 v.AuxInt = off 10205 v.Aux = sym 10206 v.AddArg(ptr) 10207 v.AddArg(idx) 10208 v.AddArg(mem) 10209 return true 10210 } 10211 return false 10212 } 10213 func rewriteValueS390X_OpS390XMOVDloadidx(v *Value, config *Config) bool { 10214 b := v.Block 10215 _ = b 10216 // match: (MOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 10217 // cond: 10218 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10219 for { 10220 c := v.AuxInt 10221 sym := v.Aux 10222 v_0 := v.Args[0] 10223 if v_0.Op != OpS390XADDconst { 10224 break 10225 } 10226 d := v_0.AuxInt 10227 ptr := v_0.Args[0] 10228 idx := v.Args[1] 10229 mem := v.Args[2] 10230 v.reset(OpS390XMOVDloadidx) 10231 v.AuxInt = c + d 10232 v.Aux = sym 10233 v.AddArg(ptr) 10234 v.AddArg(idx) 10235 v.AddArg(mem) 10236 return true 10237 } 10238 // match: (MOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 10239 // cond: 10240 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10241 for { 10242 c := v.AuxInt 10243 sym := v.Aux 10244 ptr := v.Args[0] 10245 v_1 := v.Args[1] 10246 if v_1.Op != OpS390XADDconst { 10247 break 10248 } 10249 d := v_1.AuxInt 10250 idx := v_1.Args[0] 10251 mem := v.Args[2] 10252 v.reset(OpS390XMOVDloadidx) 10253 v.AuxInt = c + d 10254 v.Aux = sym 10255 v.AddArg(ptr) 10256 v.AddArg(idx) 10257 v.AddArg(mem) 10258 return true 10259 } 10260 return false 10261 } 10262 func rewriteValueS390X_OpS390XMOVDnop(v *Value, config *Config) bool { 10263 b := v.Block 10264 _ = b 10265 // match: (MOVDnop <t> x) 10266 // cond: t.Compare(x.Type) == CMPeq 10267 // result: x 10268 for { 10269 t := v.Type 10270 x := v.Args[0] 10271 if !(t.Compare(x.Type) == CMPeq) { 10272 break 10273 } 10274 v.reset(OpCopy) 10275 v.Type = x.Type 10276 v.AddArg(x) 10277 return true 10278 } 10279 // match: (MOVDnop (MOVDconst [c])) 10280 // cond: 10281 // result: (MOVDconst [c]) 10282 for { 10283 v_0 := v.Args[0] 10284 if v_0.Op != OpS390XMOVDconst { 10285 break 10286 } 10287 c := v_0.AuxInt 10288 v.reset(OpS390XMOVDconst) 10289 v.AuxInt = c 10290 return true 10291 } 10292 // match: (MOVDnop <t> x:(MOVBZload [off] {sym} ptr mem)) 10293 // cond: x.Uses == 1 && clobber(x) 10294 // result: @x.Block (MOVBZload <t> [off] {sym} ptr mem) 10295 for { 10296 t := v.Type 10297 x := v.Args[0] 10298 if x.Op != OpS390XMOVBZload { 10299 break 10300 } 10301 off := x.AuxInt 10302 sym := x.Aux 10303 ptr := x.Args[0] 10304 mem := x.Args[1] 10305 if !(x.Uses == 1 && clobber(x)) { 10306 break 10307 } 10308 b = x.Block 10309 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, t) 10310 v.reset(OpCopy) 10311 v.AddArg(v0) 10312 v0.AuxInt = off 10313 v0.Aux = sym 10314 v0.AddArg(ptr) 10315 v0.AddArg(mem) 10316 return true 10317 } 10318 // match: (MOVDnop <t> x:(MOVBload [off] {sym} ptr mem)) 10319 // cond: x.Uses == 1 && clobber(x) 10320 // result: @x.Block (MOVBload <t> [off] {sym} ptr mem) 10321 for { 10322 t := v.Type 10323 x := v.Args[0] 10324 if x.Op != OpS390XMOVBload { 10325 break 10326 } 10327 off := x.AuxInt 10328 sym := x.Aux 10329 ptr := x.Args[0] 10330 mem := x.Args[1] 10331 if !(x.Uses == 1 && clobber(x)) { 10332 break 10333 } 10334 b = x.Block 10335 v0 := b.NewValue0(v.Pos, OpS390XMOVBload, t) 10336 v.reset(OpCopy) 10337 v.AddArg(v0) 10338 v0.AuxInt = off 10339 v0.Aux = sym 10340 v0.AddArg(ptr) 10341 v0.AddArg(mem) 10342 return true 10343 } 10344 // match: (MOVDnop <t> x:(MOVHZload [off] {sym} ptr mem)) 10345 // cond: x.Uses == 1 && clobber(x) 10346 // result: @x.Block (MOVHZload <t> [off] {sym} ptr mem) 10347 for { 10348 t := v.Type 10349 x := v.Args[0] 10350 if x.Op != OpS390XMOVHZload { 10351 break 10352 } 10353 off := x.AuxInt 10354 sym := x.Aux 10355 ptr := x.Args[0] 10356 mem := x.Args[1] 10357 if !(x.Uses == 1 && clobber(x)) { 10358 break 10359 } 10360 b = x.Block 10361 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, t) 10362 v.reset(OpCopy) 10363 v.AddArg(v0) 10364 v0.AuxInt = off 10365 v0.Aux = sym 10366 v0.AddArg(ptr) 10367 v0.AddArg(mem) 10368 return true 10369 } 10370 // match: (MOVDnop <t> x:(MOVHload [off] {sym} ptr mem)) 10371 // cond: x.Uses == 1 && clobber(x) 10372 // result: @x.Block (MOVHload <t> [off] {sym} ptr mem) 10373 for { 10374 t := v.Type 10375 x := v.Args[0] 10376 if x.Op != OpS390XMOVHload { 10377 break 10378 } 10379 off := x.AuxInt 10380 sym := x.Aux 10381 ptr := x.Args[0] 10382 mem := x.Args[1] 10383 if !(x.Uses == 1 && clobber(x)) { 10384 break 10385 } 10386 b = x.Block 10387 v0 := b.NewValue0(v.Pos, OpS390XMOVHload, t) 10388 v.reset(OpCopy) 10389 v.AddArg(v0) 10390 v0.AuxInt = off 10391 v0.Aux = sym 10392 v0.AddArg(ptr) 10393 v0.AddArg(mem) 10394 return true 10395 } 10396 // match: (MOVDnop <t> x:(MOVWZload [off] {sym} ptr mem)) 10397 // cond: x.Uses == 1 && clobber(x) 10398 // result: @x.Block (MOVWZload <t> [off] {sym} ptr mem) 10399 for { 10400 t := v.Type 10401 x := v.Args[0] 10402 if x.Op != OpS390XMOVWZload { 10403 break 10404 } 10405 off := x.AuxInt 10406 sym := x.Aux 10407 ptr := x.Args[0] 10408 mem := x.Args[1] 10409 if !(x.Uses == 1 && clobber(x)) { 10410 break 10411 } 10412 b = x.Block 10413 v0 := b.NewValue0(v.Pos, OpS390XMOVWZload, t) 10414 v.reset(OpCopy) 10415 v.AddArg(v0) 10416 v0.AuxInt = off 10417 v0.Aux = sym 10418 v0.AddArg(ptr) 10419 v0.AddArg(mem) 10420 return true 10421 } 10422 // match: (MOVDnop <t> x:(MOVWload [off] {sym} ptr mem)) 10423 // cond: x.Uses == 1 && clobber(x) 10424 // result: @x.Block (MOVWload <t> [off] {sym} ptr mem) 10425 for { 10426 t := v.Type 10427 x := v.Args[0] 10428 if x.Op != OpS390XMOVWload { 10429 break 10430 } 10431 off := x.AuxInt 10432 sym := x.Aux 10433 ptr := x.Args[0] 10434 mem := x.Args[1] 10435 if !(x.Uses == 1 && clobber(x)) { 10436 break 10437 } 10438 b = x.Block 10439 v0 := b.NewValue0(v.Pos, OpS390XMOVWload, t) 10440 v.reset(OpCopy) 10441 v.AddArg(v0) 10442 v0.AuxInt = off 10443 v0.Aux = sym 10444 v0.AddArg(ptr) 10445 v0.AddArg(mem) 10446 return true 10447 } 10448 // match: (MOVDnop <t> x:(MOVDload [off] {sym} ptr mem)) 10449 // cond: x.Uses == 1 && clobber(x) 10450 // result: @x.Block (MOVDload <t> [off] {sym} ptr mem) 10451 for { 10452 t := v.Type 10453 x := v.Args[0] 10454 if x.Op != OpS390XMOVDload { 10455 break 10456 } 10457 off := x.AuxInt 10458 sym := x.Aux 10459 ptr := x.Args[0] 10460 mem := x.Args[1] 10461 if !(x.Uses == 1 && clobber(x)) { 10462 break 10463 } 10464 b = x.Block 10465 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, t) 10466 v.reset(OpCopy) 10467 v.AddArg(v0) 10468 v0.AuxInt = off 10469 v0.Aux = sym 10470 v0.AddArg(ptr) 10471 v0.AddArg(mem) 10472 return true 10473 } 10474 // match: (MOVDnop <t> x:(MOVBZloadidx [off] {sym} ptr idx mem)) 10475 // cond: x.Uses == 1 && clobber(x) 10476 // result: @x.Block (MOVBZloadidx <t> [off] {sym} ptr idx mem) 10477 for { 10478 t := v.Type 10479 x := v.Args[0] 10480 if x.Op != OpS390XMOVBZloadidx { 10481 break 10482 } 10483 off := x.AuxInt 10484 sym := x.Aux 10485 ptr := x.Args[0] 10486 idx := x.Args[1] 10487 mem := x.Args[2] 10488 if !(x.Uses == 1 && clobber(x)) { 10489 break 10490 } 10491 b = x.Block 10492 v0 := b.NewValue0(v.Pos, OpS390XMOVBZloadidx, t) 10493 v.reset(OpCopy) 10494 v.AddArg(v0) 10495 v0.AuxInt = off 10496 v0.Aux = sym 10497 v0.AddArg(ptr) 10498 v0.AddArg(idx) 10499 v0.AddArg(mem) 10500 return true 10501 } 10502 // match: (MOVDnop <t> x:(MOVHZloadidx [off] {sym} ptr idx mem)) 10503 // cond: x.Uses == 1 && clobber(x) 10504 // result: @x.Block (MOVHZloadidx <t> [off] {sym} ptr idx mem) 10505 for { 10506 t := v.Type 10507 x := v.Args[0] 10508 if x.Op != OpS390XMOVHZloadidx { 10509 break 10510 } 10511 off := x.AuxInt 10512 sym := x.Aux 10513 ptr := x.Args[0] 10514 idx := x.Args[1] 10515 mem := x.Args[2] 10516 if !(x.Uses == 1 && clobber(x)) { 10517 break 10518 } 10519 b = x.Block 10520 v0 := b.NewValue0(v.Pos, OpS390XMOVHZloadidx, t) 10521 v.reset(OpCopy) 10522 v.AddArg(v0) 10523 v0.AuxInt = off 10524 v0.Aux = sym 10525 v0.AddArg(ptr) 10526 v0.AddArg(idx) 10527 v0.AddArg(mem) 10528 return true 10529 } 10530 // match: (MOVDnop <t> x:(MOVWZloadidx [off] {sym} ptr idx mem)) 10531 // cond: x.Uses == 1 && clobber(x) 10532 // result: @x.Block (MOVWZloadidx <t> [off] {sym} ptr idx mem) 10533 for { 10534 t := v.Type 10535 x := v.Args[0] 10536 if x.Op != OpS390XMOVWZloadidx { 10537 break 10538 } 10539 off := x.AuxInt 10540 sym := x.Aux 10541 ptr := x.Args[0] 10542 idx := x.Args[1] 10543 mem := x.Args[2] 10544 if !(x.Uses == 1 && clobber(x)) { 10545 break 10546 } 10547 b = x.Block 10548 v0 := b.NewValue0(v.Pos, OpS390XMOVWZloadidx, t) 10549 v.reset(OpCopy) 10550 v.AddArg(v0) 10551 v0.AuxInt = off 10552 v0.Aux = sym 10553 v0.AddArg(ptr) 10554 v0.AddArg(idx) 10555 v0.AddArg(mem) 10556 return true 10557 } 10558 // match: (MOVDnop <t> x:(MOVDloadidx [off] {sym} ptr idx mem)) 10559 // cond: x.Uses == 1 && clobber(x) 10560 // result: @x.Block (MOVDloadidx <t> [off] {sym} ptr idx mem) 10561 for { 10562 t := v.Type 10563 x := v.Args[0] 10564 if x.Op != OpS390XMOVDloadidx { 10565 break 10566 } 10567 off := x.AuxInt 10568 sym := x.Aux 10569 ptr := x.Args[0] 10570 idx := x.Args[1] 10571 mem := x.Args[2] 10572 if !(x.Uses == 1 && clobber(x)) { 10573 break 10574 } 10575 b = x.Block 10576 v0 := b.NewValue0(v.Pos, OpS390XMOVDloadidx, t) 10577 v.reset(OpCopy) 10578 v.AddArg(v0) 10579 v0.AuxInt = off 10580 v0.Aux = sym 10581 v0.AddArg(ptr) 10582 v0.AddArg(idx) 10583 v0.AddArg(mem) 10584 return true 10585 } 10586 return false 10587 } 10588 func rewriteValueS390X_OpS390XMOVDreg(v *Value, config *Config) bool { 10589 b := v.Block 10590 _ = b 10591 // match: (MOVDreg <t> x) 10592 // cond: t.Compare(x.Type) == CMPeq 10593 // result: x 10594 for { 10595 t := v.Type 10596 x := v.Args[0] 10597 if !(t.Compare(x.Type) == CMPeq) { 10598 break 10599 } 10600 v.reset(OpCopy) 10601 v.Type = x.Type 10602 v.AddArg(x) 10603 return true 10604 } 10605 // match: (MOVDreg (MOVDconst [c])) 10606 // cond: 10607 // result: (MOVDconst [c]) 10608 for { 10609 v_0 := v.Args[0] 10610 if v_0.Op != OpS390XMOVDconst { 10611 break 10612 } 10613 c := v_0.AuxInt 10614 v.reset(OpS390XMOVDconst) 10615 v.AuxInt = c 10616 return true 10617 } 10618 // match: (MOVDreg x) 10619 // cond: x.Uses == 1 10620 // result: (MOVDnop x) 10621 for { 10622 x := v.Args[0] 10623 if !(x.Uses == 1) { 10624 break 10625 } 10626 v.reset(OpS390XMOVDnop) 10627 v.AddArg(x) 10628 return true 10629 } 10630 // match: (MOVDreg <t> x:(MOVBZload [off] {sym} ptr mem)) 10631 // cond: x.Uses == 1 && clobber(x) 10632 // result: @x.Block (MOVBZload <t> [off] {sym} ptr mem) 10633 for { 10634 t := v.Type 10635 x := v.Args[0] 10636 if x.Op != OpS390XMOVBZload { 10637 break 10638 } 10639 off := x.AuxInt 10640 sym := x.Aux 10641 ptr := x.Args[0] 10642 mem := x.Args[1] 10643 if !(x.Uses == 1 && clobber(x)) { 10644 break 10645 } 10646 b = x.Block 10647 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, t) 10648 v.reset(OpCopy) 10649 v.AddArg(v0) 10650 v0.AuxInt = off 10651 v0.Aux = sym 10652 v0.AddArg(ptr) 10653 v0.AddArg(mem) 10654 return true 10655 } 10656 // match: (MOVDreg <t> x:(MOVBload [off] {sym} ptr mem)) 10657 // cond: x.Uses == 1 && clobber(x) 10658 // result: @x.Block (MOVBload <t> [off] {sym} ptr mem) 10659 for { 10660 t := v.Type 10661 x := v.Args[0] 10662 if x.Op != OpS390XMOVBload { 10663 break 10664 } 10665 off := x.AuxInt 10666 sym := x.Aux 10667 ptr := x.Args[0] 10668 mem := x.Args[1] 10669 if !(x.Uses == 1 && clobber(x)) { 10670 break 10671 } 10672 b = x.Block 10673 v0 := b.NewValue0(v.Pos, OpS390XMOVBload, t) 10674 v.reset(OpCopy) 10675 v.AddArg(v0) 10676 v0.AuxInt = off 10677 v0.Aux = sym 10678 v0.AddArg(ptr) 10679 v0.AddArg(mem) 10680 return true 10681 } 10682 // match: (MOVDreg <t> x:(MOVHZload [off] {sym} ptr mem)) 10683 // cond: x.Uses == 1 && clobber(x) 10684 // result: @x.Block (MOVHZload <t> [off] {sym} ptr mem) 10685 for { 10686 t := v.Type 10687 x := v.Args[0] 10688 if x.Op != OpS390XMOVHZload { 10689 break 10690 } 10691 off := x.AuxInt 10692 sym := x.Aux 10693 ptr := x.Args[0] 10694 mem := x.Args[1] 10695 if !(x.Uses == 1 && clobber(x)) { 10696 break 10697 } 10698 b = x.Block 10699 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, t) 10700 v.reset(OpCopy) 10701 v.AddArg(v0) 10702 v0.AuxInt = off 10703 v0.Aux = sym 10704 v0.AddArg(ptr) 10705 v0.AddArg(mem) 10706 return true 10707 } 10708 // match: (MOVDreg <t> x:(MOVHload [off] {sym} ptr mem)) 10709 // cond: x.Uses == 1 && clobber(x) 10710 // result: @x.Block (MOVHload <t> [off] {sym} ptr mem) 10711 for { 10712 t := v.Type 10713 x := v.Args[0] 10714 if x.Op != OpS390XMOVHload { 10715 break 10716 } 10717 off := x.AuxInt 10718 sym := x.Aux 10719 ptr := x.Args[0] 10720 mem := x.Args[1] 10721 if !(x.Uses == 1 && clobber(x)) { 10722 break 10723 } 10724 b = x.Block 10725 v0 := b.NewValue0(v.Pos, OpS390XMOVHload, t) 10726 v.reset(OpCopy) 10727 v.AddArg(v0) 10728 v0.AuxInt = off 10729 v0.Aux = sym 10730 v0.AddArg(ptr) 10731 v0.AddArg(mem) 10732 return true 10733 } 10734 // match: (MOVDreg <t> x:(MOVWZload [off] {sym} ptr mem)) 10735 // cond: x.Uses == 1 && clobber(x) 10736 // result: @x.Block (MOVWZload <t> [off] {sym} ptr mem) 10737 for { 10738 t := v.Type 10739 x := v.Args[0] 10740 if x.Op != OpS390XMOVWZload { 10741 break 10742 } 10743 off := x.AuxInt 10744 sym := x.Aux 10745 ptr := x.Args[0] 10746 mem := x.Args[1] 10747 if !(x.Uses == 1 && clobber(x)) { 10748 break 10749 } 10750 b = x.Block 10751 v0 := b.NewValue0(v.Pos, OpS390XMOVWZload, t) 10752 v.reset(OpCopy) 10753 v.AddArg(v0) 10754 v0.AuxInt = off 10755 v0.Aux = sym 10756 v0.AddArg(ptr) 10757 v0.AddArg(mem) 10758 return true 10759 } 10760 // match: (MOVDreg <t> x:(MOVWload [off] {sym} ptr mem)) 10761 // cond: x.Uses == 1 && clobber(x) 10762 // result: @x.Block (MOVWload <t> [off] {sym} ptr mem) 10763 for { 10764 t := v.Type 10765 x := v.Args[0] 10766 if x.Op != OpS390XMOVWload { 10767 break 10768 } 10769 off := x.AuxInt 10770 sym := x.Aux 10771 ptr := x.Args[0] 10772 mem := x.Args[1] 10773 if !(x.Uses == 1 && clobber(x)) { 10774 break 10775 } 10776 b = x.Block 10777 v0 := b.NewValue0(v.Pos, OpS390XMOVWload, t) 10778 v.reset(OpCopy) 10779 v.AddArg(v0) 10780 v0.AuxInt = off 10781 v0.Aux = sym 10782 v0.AddArg(ptr) 10783 v0.AddArg(mem) 10784 return true 10785 } 10786 // match: (MOVDreg <t> x:(MOVDload [off] {sym} ptr mem)) 10787 // cond: x.Uses == 1 && clobber(x) 10788 // result: @x.Block (MOVDload <t> [off] {sym} ptr mem) 10789 for { 10790 t := v.Type 10791 x := v.Args[0] 10792 if x.Op != OpS390XMOVDload { 10793 break 10794 } 10795 off := x.AuxInt 10796 sym := x.Aux 10797 ptr := x.Args[0] 10798 mem := x.Args[1] 10799 if !(x.Uses == 1 && clobber(x)) { 10800 break 10801 } 10802 b = x.Block 10803 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, t) 10804 v.reset(OpCopy) 10805 v.AddArg(v0) 10806 v0.AuxInt = off 10807 v0.Aux = sym 10808 v0.AddArg(ptr) 10809 v0.AddArg(mem) 10810 return true 10811 } 10812 // match: (MOVDreg <t> x:(MOVBZloadidx [off] {sym} ptr idx mem)) 10813 // cond: x.Uses == 1 && clobber(x) 10814 // result: @x.Block (MOVBZloadidx <t> [off] {sym} ptr idx mem) 10815 for { 10816 t := v.Type 10817 x := v.Args[0] 10818 if x.Op != OpS390XMOVBZloadidx { 10819 break 10820 } 10821 off := x.AuxInt 10822 sym := x.Aux 10823 ptr := x.Args[0] 10824 idx := x.Args[1] 10825 mem := x.Args[2] 10826 if !(x.Uses == 1 && clobber(x)) { 10827 break 10828 } 10829 b = x.Block 10830 v0 := b.NewValue0(v.Pos, OpS390XMOVBZloadidx, t) 10831 v.reset(OpCopy) 10832 v.AddArg(v0) 10833 v0.AuxInt = off 10834 v0.Aux = sym 10835 v0.AddArg(ptr) 10836 v0.AddArg(idx) 10837 v0.AddArg(mem) 10838 return true 10839 } 10840 // match: (MOVDreg <t> x:(MOVHZloadidx [off] {sym} ptr idx mem)) 10841 // cond: x.Uses == 1 && clobber(x) 10842 // result: @x.Block (MOVHZloadidx <t> [off] {sym} ptr idx mem) 10843 for { 10844 t := v.Type 10845 x := v.Args[0] 10846 if x.Op != OpS390XMOVHZloadidx { 10847 break 10848 } 10849 off := x.AuxInt 10850 sym := x.Aux 10851 ptr := x.Args[0] 10852 idx := x.Args[1] 10853 mem := x.Args[2] 10854 if !(x.Uses == 1 && clobber(x)) { 10855 break 10856 } 10857 b = x.Block 10858 v0 := b.NewValue0(v.Pos, OpS390XMOVHZloadidx, t) 10859 v.reset(OpCopy) 10860 v.AddArg(v0) 10861 v0.AuxInt = off 10862 v0.Aux = sym 10863 v0.AddArg(ptr) 10864 v0.AddArg(idx) 10865 v0.AddArg(mem) 10866 return true 10867 } 10868 // match: (MOVDreg <t> x:(MOVWZloadidx [off] {sym} ptr idx mem)) 10869 // cond: x.Uses == 1 && clobber(x) 10870 // result: @x.Block (MOVWZloadidx <t> [off] {sym} ptr idx mem) 10871 for { 10872 t := v.Type 10873 x := v.Args[0] 10874 if x.Op != OpS390XMOVWZloadidx { 10875 break 10876 } 10877 off := x.AuxInt 10878 sym := x.Aux 10879 ptr := x.Args[0] 10880 idx := x.Args[1] 10881 mem := x.Args[2] 10882 if !(x.Uses == 1 && clobber(x)) { 10883 break 10884 } 10885 b = x.Block 10886 v0 := b.NewValue0(v.Pos, OpS390XMOVWZloadidx, t) 10887 v.reset(OpCopy) 10888 v.AddArg(v0) 10889 v0.AuxInt = off 10890 v0.Aux = sym 10891 v0.AddArg(ptr) 10892 v0.AddArg(idx) 10893 v0.AddArg(mem) 10894 return true 10895 } 10896 // match: (MOVDreg <t> x:(MOVDloadidx [off] {sym} ptr idx mem)) 10897 // cond: x.Uses == 1 && clobber(x) 10898 // result: @x.Block (MOVDloadidx <t> [off] {sym} ptr idx mem) 10899 for { 10900 t := v.Type 10901 x := v.Args[0] 10902 if x.Op != OpS390XMOVDloadidx { 10903 break 10904 } 10905 off := x.AuxInt 10906 sym := x.Aux 10907 ptr := x.Args[0] 10908 idx := x.Args[1] 10909 mem := x.Args[2] 10910 if !(x.Uses == 1 && clobber(x)) { 10911 break 10912 } 10913 b = x.Block 10914 v0 := b.NewValue0(v.Pos, OpS390XMOVDloadidx, t) 10915 v.reset(OpCopy) 10916 v.AddArg(v0) 10917 v0.AuxInt = off 10918 v0.Aux = sym 10919 v0.AddArg(ptr) 10920 v0.AddArg(idx) 10921 v0.AddArg(mem) 10922 return true 10923 } 10924 return false 10925 } 10926 func rewriteValueS390X_OpS390XMOVDstore(v *Value, config *Config) bool { 10927 b := v.Block 10928 _ = b 10929 // match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 10930 // cond: is20Bit(off1+off2) 10931 // result: (MOVDstore [off1+off2] {sym} ptr val mem) 10932 for { 10933 off1 := v.AuxInt 10934 sym := v.Aux 10935 v_0 := v.Args[0] 10936 if v_0.Op != OpS390XADDconst { 10937 break 10938 } 10939 off2 := v_0.AuxInt 10940 ptr := v_0.Args[0] 10941 val := v.Args[1] 10942 mem := v.Args[2] 10943 if !(is20Bit(off1 + off2)) { 10944 break 10945 } 10946 v.reset(OpS390XMOVDstore) 10947 v.AuxInt = off1 + off2 10948 v.Aux = sym 10949 v.AddArg(ptr) 10950 v.AddArg(val) 10951 v.AddArg(mem) 10952 return true 10953 } 10954 // match: (MOVDstore [off] {sym} ptr (MOVDconst [c]) mem) 10955 // cond: validValAndOff(c,off) && int64(int16(c)) == c && ptr.Op != OpSB 10956 // result: (MOVDstoreconst [makeValAndOff(c,off)] {sym} ptr mem) 10957 for { 10958 off := v.AuxInt 10959 sym := v.Aux 10960 ptr := v.Args[0] 10961 v_1 := v.Args[1] 10962 if v_1.Op != OpS390XMOVDconst { 10963 break 10964 } 10965 c := v_1.AuxInt 10966 mem := v.Args[2] 10967 if !(validValAndOff(c, off) && int64(int16(c)) == c && ptr.Op != OpSB) { 10968 break 10969 } 10970 v.reset(OpS390XMOVDstoreconst) 10971 v.AuxInt = makeValAndOff(c, off) 10972 v.Aux = sym 10973 v.AddArg(ptr) 10974 v.AddArg(mem) 10975 return true 10976 } 10977 // match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 10978 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10979 // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 10980 for { 10981 off1 := v.AuxInt 10982 sym1 := v.Aux 10983 v_0 := v.Args[0] 10984 if v_0.Op != OpS390XMOVDaddr { 10985 break 10986 } 10987 off2 := v_0.AuxInt 10988 sym2 := v_0.Aux 10989 base := v_0.Args[0] 10990 val := v.Args[1] 10991 mem := v.Args[2] 10992 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10993 break 10994 } 10995 v.reset(OpS390XMOVDstore) 10996 v.AuxInt = off1 + off2 10997 v.Aux = mergeSym(sym1, sym2) 10998 v.AddArg(base) 10999 v.AddArg(val) 11000 v.AddArg(mem) 11001 return true 11002 } 11003 // match: (MOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 11004 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11005 // result: (MOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 11006 for { 11007 off1 := v.AuxInt 11008 sym1 := v.Aux 11009 v_0 := v.Args[0] 11010 if v_0.Op != OpS390XMOVDaddridx { 11011 break 11012 } 11013 off2 := v_0.AuxInt 11014 sym2 := v_0.Aux 11015 ptr := v_0.Args[0] 11016 idx := v_0.Args[1] 11017 val := v.Args[1] 11018 mem := v.Args[2] 11019 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11020 break 11021 } 11022 v.reset(OpS390XMOVDstoreidx) 11023 v.AuxInt = off1 + off2 11024 v.Aux = mergeSym(sym1, sym2) 11025 v.AddArg(ptr) 11026 v.AddArg(idx) 11027 v.AddArg(val) 11028 v.AddArg(mem) 11029 return true 11030 } 11031 // match: (MOVDstore [off] {sym} (ADD ptr idx) val mem) 11032 // cond: ptr.Op != OpSB 11033 // result: (MOVDstoreidx [off] {sym} ptr idx val mem) 11034 for { 11035 off := v.AuxInt 11036 sym := v.Aux 11037 v_0 := v.Args[0] 11038 if v_0.Op != OpS390XADD { 11039 break 11040 } 11041 ptr := v_0.Args[0] 11042 idx := v_0.Args[1] 11043 val := v.Args[1] 11044 mem := v.Args[2] 11045 if !(ptr.Op != OpSB) { 11046 break 11047 } 11048 v.reset(OpS390XMOVDstoreidx) 11049 v.AuxInt = off 11050 v.Aux = sym 11051 v.AddArg(ptr) 11052 v.AddArg(idx) 11053 v.AddArg(val) 11054 v.AddArg(mem) 11055 return true 11056 } 11057 // match: (MOVDstore [i] {s} p w1 x:(MOVDstore [i-8] {s} p w0 mem)) 11058 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x) 11059 // result: (STMG2 [i-8] {s} p w0 w1 mem) 11060 for { 11061 i := v.AuxInt 11062 s := v.Aux 11063 p := v.Args[0] 11064 w1 := v.Args[1] 11065 x := v.Args[2] 11066 if x.Op != OpS390XMOVDstore { 11067 break 11068 } 11069 if x.AuxInt != i-8 { 11070 break 11071 } 11072 if x.Aux != s { 11073 break 11074 } 11075 if p != x.Args[0] { 11076 break 11077 } 11078 w0 := x.Args[1] 11079 mem := x.Args[2] 11080 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 11081 break 11082 } 11083 v.reset(OpS390XSTMG2) 11084 v.AuxInt = i - 8 11085 v.Aux = s 11086 v.AddArg(p) 11087 v.AddArg(w0) 11088 v.AddArg(w1) 11089 v.AddArg(mem) 11090 return true 11091 } 11092 // match: (MOVDstore [i] {s} p w2 x:(STMG2 [i-16] {s} p w0 w1 mem)) 11093 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 11094 // result: (STMG3 [i-16] {s} p w0 w1 w2 mem) 11095 for { 11096 i := v.AuxInt 11097 s := v.Aux 11098 p := v.Args[0] 11099 w2 := v.Args[1] 11100 x := v.Args[2] 11101 if x.Op != OpS390XSTMG2 { 11102 break 11103 } 11104 if x.AuxInt != i-16 { 11105 break 11106 } 11107 if x.Aux != s { 11108 break 11109 } 11110 if p != x.Args[0] { 11111 break 11112 } 11113 w0 := x.Args[1] 11114 w1 := x.Args[2] 11115 mem := x.Args[3] 11116 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 11117 break 11118 } 11119 v.reset(OpS390XSTMG3) 11120 v.AuxInt = i - 16 11121 v.Aux = s 11122 v.AddArg(p) 11123 v.AddArg(w0) 11124 v.AddArg(w1) 11125 v.AddArg(w2) 11126 v.AddArg(mem) 11127 return true 11128 } 11129 // match: (MOVDstore [i] {s} p w3 x:(STMG3 [i-24] {s} p w0 w1 w2 mem)) 11130 // cond: x.Uses == 1 && is20Bit(i-24) && clobber(x) 11131 // result: (STMG4 [i-24] {s} p w0 w1 w2 w3 mem) 11132 for { 11133 i := v.AuxInt 11134 s := v.Aux 11135 p := v.Args[0] 11136 w3 := v.Args[1] 11137 x := v.Args[2] 11138 if x.Op != OpS390XSTMG3 { 11139 break 11140 } 11141 if x.AuxInt != i-24 { 11142 break 11143 } 11144 if x.Aux != s { 11145 break 11146 } 11147 if p != x.Args[0] { 11148 break 11149 } 11150 w0 := x.Args[1] 11151 w1 := x.Args[2] 11152 w2 := x.Args[3] 11153 mem := x.Args[4] 11154 if !(x.Uses == 1 && is20Bit(i-24) && clobber(x)) { 11155 break 11156 } 11157 v.reset(OpS390XSTMG4) 11158 v.AuxInt = i - 24 11159 v.Aux = s 11160 v.AddArg(p) 11161 v.AddArg(w0) 11162 v.AddArg(w1) 11163 v.AddArg(w2) 11164 v.AddArg(w3) 11165 v.AddArg(mem) 11166 return true 11167 } 11168 return false 11169 } 11170 func rewriteValueS390X_OpS390XMOVDstoreconst(v *Value, config *Config) bool { 11171 b := v.Block 11172 _ = b 11173 // match: (MOVDstoreconst [sc] {s} (ADDconst [off] ptr) mem) 11174 // cond: ValAndOff(sc).canAdd(off) 11175 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 11176 for { 11177 sc := v.AuxInt 11178 s := v.Aux 11179 v_0 := v.Args[0] 11180 if v_0.Op != OpS390XADDconst { 11181 break 11182 } 11183 off := v_0.AuxInt 11184 ptr := v_0.Args[0] 11185 mem := v.Args[1] 11186 if !(ValAndOff(sc).canAdd(off)) { 11187 break 11188 } 11189 v.reset(OpS390XMOVDstoreconst) 11190 v.AuxInt = ValAndOff(sc).add(off) 11191 v.Aux = s 11192 v.AddArg(ptr) 11193 v.AddArg(mem) 11194 return true 11195 } 11196 // match: (MOVDstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 11197 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 11198 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 11199 for { 11200 sc := v.AuxInt 11201 sym1 := v.Aux 11202 v_0 := v.Args[0] 11203 if v_0.Op != OpS390XMOVDaddr { 11204 break 11205 } 11206 off := v_0.AuxInt 11207 sym2 := v_0.Aux 11208 ptr := v_0.Args[0] 11209 mem := v.Args[1] 11210 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 11211 break 11212 } 11213 v.reset(OpS390XMOVDstoreconst) 11214 v.AuxInt = ValAndOff(sc).add(off) 11215 v.Aux = mergeSym(sym1, sym2) 11216 v.AddArg(ptr) 11217 v.AddArg(mem) 11218 return true 11219 } 11220 return false 11221 } 11222 func rewriteValueS390X_OpS390XMOVDstoreidx(v *Value, config *Config) bool { 11223 b := v.Block 11224 _ = b 11225 // match: (MOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 11226 // cond: 11227 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 11228 for { 11229 c := v.AuxInt 11230 sym := v.Aux 11231 v_0 := v.Args[0] 11232 if v_0.Op != OpS390XADDconst { 11233 break 11234 } 11235 d := v_0.AuxInt 11236 ptr := v_0.Args[0] 11237 idx := v.Args[1] 11238 val := v.Args[2] 11239 mem := v.Args[3] 11240 v.reset(OpS390XMOVDstoreidx) 11241 v.AuxInt = c + d 11242 v.Aux = sym 11243 v.AddArg(ptr) 11244 v.AddArg(idx) 11245 v.AddArg(val) 11246 v.AddArg(mem) 11247 return true 11248 } 11249 // match: (MOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 11250 // cond: 11251 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 11252 for { 11253 c := v.AuxInt 11254 sym := v.Aux 11255 ptr := v.Args[0] 11256 v_1 := v.Args[1] 11257 if v_1.Op != OpS390XADDconst { 11258 break 11259 } 11260 d := v_1.AuxInt 11261 idx := v_1.Args[0] 11262 val := v.Args[2] 11263 mem := v.Args[3] 11264 v.reset(OpS390XMOVDstoreidx) 11265 v.AuxInt = c + d 11266 v.Aux = sym 11267 v.AddArg(ptr) 11268 v.AddArg(idx) 11269 v.AddArg(val) 11270 v.AddArg(mem) 11271 return true 11272 } 11273 return false 11274 } 11275 func rewriteValueS390X_OpS390XMOVHBRstore(v *Value, config *Config) bool { 11276 b := v.Block 11277 _ = b 11278 // match: (MOVHBRstore [i] {s} p (SRDconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 11279 // cond: x.Uses == 1 && clobber(x) 11280 // result: (MOVWBRstore [i-2] {s} p w mem) 11281 for { 11282 i := v.AuxInt 11283 s := v.Aux 11284 p := v.Args[0] 11285 v_1 := v.Args[1] 11286 if v_1.Op != OpS390XSRDconst { 11287 break 11288 } 11289 if v_1.AuxInt != 16 { 11290 break 11291 } 11292 w := v_1.Args[0] 11293 x := v.Args[2] 11294 if x.Op != OpS390XMOVHBRstore { 11295 break 11296 } 11297 if x.AuxInt != i-2 { 11298 break 11299 } 11300 if x.Aux != s { 11301 break 11302 } 11303 if p != x.Args[0] { 11304 break 11305 } 11306 if w != x.Args[1] { 11307 break 11308 } 11309 mem := x.Args[2] 11310 if !(x.Uses == 1 && clobber(x)) { 11311 break 11312 } 11313 v.reset(OpS390XMOVWBRstore) 11314 v.AuxInt = i - 2 11315 v.Aux = s 11316 v.AddArg(p) 11317 v.AddArg(w) 11318 v.AddArg(mem) 11319 return true 11320 } 11321 // match: (MOVHBRstore [i] {s} p (SRDconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRDconst [j-16] w) mem)) 11322 // cond: x.Uses == 1 && clobber(x) 11323 // result: (MOVWBRstore [i-2] {s} p w0 mem) 11324 for { 11325 i := v.AuxInt 11326 s := v.Aux 11327 p := v.Args[0] 11328 v_1 := v.Args[1] 11329 if v_1.Op != OpS390XSRDconst { 11330 break 11331 } 11332 j := v_1.AuxInt 11333 w := v_1.Args[0] 11334 x := v.Args[2] 11335 if x.Op != OpS390XMOVHBRstore { 11336 break 11337 } 11338 if x.AuxInt != i-2 { 11339 break 11340 } 11341 if x.Aux != s { 11342 break 11343 } 11344 if p != x.Args[0] { 11345 break 11346 } 11347 w0 := x.Args[1] 11348 if w0.Op != OpS390XSRDconst { 11349 break 11350 } 11351 if w0.AuxInt != j-16 { 11352 break 11353 } 11354 if w != w0.Args[0] { 11355 break 11356 } 11357 mem := x.Args[2] 11358 if !(x.Uses == 1 && clobber(x)) { 11359 break 11360 } 11361 v.reset(OpS390XMOVWBRstore) 11362 v.AuxInt = i - 2 11363 v.Aux = s 11364 v.AddArg(p) 11365 v.AddArg(w0) 11366 v.AddArg(mem) 11367 return true 11368 } 11369 // match: (MOVHBRstore [i] {s} p (SRWconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 11370 // cond: x.Uses == 1 && clobber(x) 11371 // result: (MOVWBRstore [i-2] {s} p w mem) 11372 for { 11373 i := v.AuxInt 11374 s := v.Aux 11375 p := v.Args[0] 11376 v_1 := v.Args[1] 11377 if v_1.Op != OpS390XSRWconst { 11378 break 11379 } 11380 if v_1.AuxInt != 16 { 11381 break 11382 } 11383 w := v_1.Args[0] 11384 x := v.Args[2] 11385 if x.Op != OpS390XMOVHBRstore { 11386 break 11387 } 11388 if x.AuxInt != i-2 { 11389 break 11390 } 11391 if x.Aux != s { 11392 break 11393 } 11394 if p != x.Args[0] { 11395 break 11396 } 11397 if w != x.Args[1] { 11398 break 11399 } 11400 mem := x.Args[2] 11401 if !(x.Uses == 1 && clobber(x)) { 11402 break 11403 } 11404 v.reset(OpS390XMOVWBRstore) 11405 v.AuxInt = i - 2 11406 v.Aux = s 11407 v.AddArg(p) 11408 v.AddArg(w) 11409 v.AddArg(mem) 11410 return true 11411 } 11412 // match: (MOVHBRstore [i] {s} p (SRWconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRWconst [j-16] w) mem)) 11413 // cond: x.Uses == 1 && clobber(x) 11414 // result: (MOVWBRstore [i-2] {s} p w0 mem) 11415 for { 11416 i := v.AuxInt 11417 s := v.Aux 11418 p := v.Args[0] 11419 v_1 := v.Args[1] 11420 if v_1.Op != OpS390XSRWconst { 11421 break 11422 } 11423 j := v_1.AuxInt 11424 w := v_1.Args[0] 11425 x := v.Args[2] 11426 if x.Op != OpS390XMOVHBRstore { 11427 break 11428 } 11429 if x.AuxInt != i-2 { 11430 break 11431 } 11432 if x.Aux != s { 11433 break 11434 } 11435 if p != x.Args[0] { 11436 break 11437 } 11438 w0 := x.Args[1] 11439 if w0.Op != OpS390XSRWconst { 11440 break 11441 } 11442 if w0.AuxInt != j-16 { 11443 break 11444 } 11445 if w != w0.Args[0] { 11446 break 11447 } 11448 mem := x.Args[2] 11449 if !(x.Uses == 1 && clobber(x)) { 11450 break 11451 } 11452 v.reset(OpS390XMOVWBRstore) 11453 v.AuxInt = i - 2 11454 v.Aux = s 11455 v.AddArg(p) 11456 v.AddArg(w0) 11457 v.AddArg(mem) 11458 return true 11459 } 11460 return false 11461 } 11462 func rewriteValueS390X_OpS390XMOVHBRstoreidx(v *Value, config *Config) bool { 11463 b := v.Block 11464 _ = b 11465 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 11466 // cond: x.Uses == 1 && clobber(x) 11467 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 11468 for { 11469 i := v.AuxInt 11470 s := v.Aux 11471 p := v.Args[0] 11472 idx := v.Args[1] 11473 v_2 := v.Args[2] 11474 if v_2.Op != OpS390XSRDconst { 11475 break 11476 } 11477 if v_2.AuxInt != 16 { 11478 break 11479 } 11480 w := v_2.Args[0] 11481 x := v.Args[3] 11482 if x.Op != OpS390XMOVHBRstoreidx { 11483 break 11484 } 11485 if x.AuxInt != i-2 { 11486 break 11487 } 11488 if x.Aux != s { 11489 break 11490 } 11491 if p != x.Args[0] { 11492 break 11493 } 11494 if idx != x.Args[1] { 11495 break 11496 } 11497 if w != x.Args[2] { 11498 break 11499 } 11500 mem := x.Args[3] 11501 if !(x.Uses == 1 && clobber(x)) { 11502 break 11503 } 11504 v.reset(OpS390XMOVWBRstoreidx) 11505 v.AuxInt = i - 2 11506 v.Aux = s 11507 v.AddArg(p) 11508 v.AddArg(idx) 11509 v.AddArg(w) 11510 v.AddArg(mem) 11511 return true 11512 } 11513 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRDconst [j-16] w) mem)) 11514 // cond: x.Uses == 1 && clobber(x) 11515 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 11516 for { 11517 i := v.AuxInt 11518 s := v.Aux 11519 p := v.Args[0] 11520 idx := v.Args[1] 11521 v_2 := v.Args[2] 11522 if v_2.Op != OpS390XSRDconst { 11523 break 11524 } 11525 j := v_2.AuxInt 11526 w := v_2.Args[0] 11527 x := v.Args[3] 11528 if x.Op != OpS390XMOVHBRstoreidx { 11529 break 11530 } 11531 if x.AuxInt != i-2 { 11532 break 11533 } 11534 if x.Aux != s { 11535 break 11536 } 11537 if p != x.Args[0] { 11538 break 11539 } 11540 if idx != x.Args[1] { 11541 break 11542 } 11543 w0 := x.Args[2] 11544 if w0.Op != OpS390XSRDconst { 11545 break 11546 } 11547 if w0.AuxInt != j-16 { 11548 break 11549 } 11550 if w != w0.Args[0] { 11551 break 11552 } 11553 mem := x.Args[3] 11554 if !(x.Uses == 1 && clobber(x)) { 11555 break 11556 } 11557 v.reset(OpS390XMOVWBRstoreidx) 11558 v.AuxInt = i - 2 11559 v.Aux = s 11560 v.AddArg(p) 11561 v.AddArg(idx) 11562 v.AddArg(w0) 11563 v.AddArg(mem) 11564 return true 11565 } 11566 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 11567 // cond: x.Uses == 1 && clobber(x) 11568 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 11569 for { 11570 i := v.AuxInt 11571 s := v.Aux 11572 p := v.Args[0] 11573 idx := v.Args[1] 11574 v_2 := v.Args[2] 11575 if v_2.Op != OpS390XSRWconst { 11576 break 11577 } 11578 if v_2.AuxInt != 16 { 11579 break 11580 } 11581 w := v_2.Args[0] 11582 x := v.Args[3] 11583 if x.Op != OpS390XMOVHBRstoreidx { 11584 break 11585 } 11586 if x.AuxInt != i-2 { 11587 break 11588 } 11589 if x.Aux != s { 11590 break 11591 } 11592 if p != x.Args[0] { 11593 break 11594 } 11595 if idx != x.Args[1] { 11596 break 11597 } 11598 if w != x.Args[2] { 11599 break 11600 } 11601 mem := x.Args[3] 11602 if !(x.Uses == 1 && clobber(x)) { 11603 break 11604 } 11605 v.reset(OpS390XMOVWBRstoreidx) 11606 v.AuxInt = i - 2 11607 v.Aux = s 11608 v.AddArg(p) 11609 v.AddArg(idx) 11610 v.AddArg(w) 11611 v.AddArg(mem) 11612 return true 11613 } 11614 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRWconst [j-16] w) mem)) 11615 // cond: x.Uses == 1 && clobber(x) 11616 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 11617 for { 11618 i := v.AuxInt 11619 s := v.Aux 11620 p := v.Args[0] 11621 idx := v.Args[1] 11622 v_2 := v.Args[2] 11623 if v_2.Op != OpS390XSRWconst { 11624 break 11625 } 11626 j := v_2.AuxInt 11627 w := v_2.Args[0] 11628 x := v.Args[3] 11629 if x.Op != OpS390XMOVHBRstoreidx { 11630 break 11631 } 11632 if x.AuxInt != i-2 { 11633 break 11634 } 11635 if x.Aux != s { 11636 break 11637 } 11638 if p != x.Args[0] { 11639 break 11640 } 11641 if idx != x.Args[1] { 11642 break 11643 } 11644 w0 := x.Args[2] 11645 if w0.Op != OpS390XSRWconst { 11646 break 11647 } 11648 if w0.AuxInt != j-16 { 11649 break 11650 } 11651 if w != w0.Args[0] { 11652 break 11653 } 11654 mem := x.Args[3] 11655 if !(x.Uses == 1 && clobber(x)) { 11656 break 11657 } 11658 v.reset(OpS390XMOVWBRstoreidx) 11659 v.AuxInt = i - 2 11660 v.Aux = s 11661 v.AddArg(p) 11662 v.AddArg(idx) 11663 v.AddArg(w0) 11664 v.AddArg(mem) 11665 return true 11666 } 11667 return false 11668 } 11669 func rewriteValueS390X_OpS390XMOVHZload(v *Value, config *Config) bool { 11670 b := v.Block 11671 _ = b 11672 // match: (MOVHZload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) 11673 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 11674 // result: (MOVDreg x) 11675 for { 11676 off := v.AuxInt 11677 sym := v.Aux 11678 ptr := v.Args[0] 11679 v_1 := v.Args[1] 11680 if v_1.Op != OpS390XMOVHstore { 11681 break 11682 } 11683 off2 := v_1.AuxInt 11684 sym2 := v_1.Aux 11685 ptr2 := v_1.Args[0] 11686 x := v_1.Args[1] 11687 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 11688 break 11689 } 11690 v.reset(OpS390XMOVDreg) 11691 v.AddArg(x) 11692 return true 11693 } 11694 // match: (MOVHZload [off1] {sym} (ADDconst [off2] ptr) mem) 11695 // cond: is20Bit(off1+off2) 11696 // result: (MOVHZload [off1+off2] {sym} ptr mem) 11697 for { 11698 off1 := v.AuxInt 11699 sym := v.Aux 11700 v_0 := v.Args[0] 11701 if v_0.Op != OpS390XADDconst { 11702 break 11703 } 11704 off2 := v_0.AuxInt 11705 ptr := v_0.Args[0] 11706 mem := v.Args[1] 11707 if !(is20Bit(off1 + off2)) { 11708 break 11709 } 11710 v.reset(OpS390XMOVHZload) 11711 v.AuxInt = off1 + off2 11712 v.Aux = sym 11713 v.AddArg(ptr) 11714 v.AddArg(mem) 11715 return true 11716 } 11717 // match: (MOVHZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11718 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11719 // result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11720 for { 11721 off1 := v.AuxInt 11722 sym1 := v.Aux 11723 v_0 := v.Args[0] 11724 if v_0.Op != OpS390XMOVDaddr { 11725 break 11726 } 11727 off2 := v_0.AuxInt 11728 sym2 := v_0.Aux 11729 base := v_0.Args[0] 11730 mem := v.Args[1] 11731 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11732 break 11733 } 11734 v.reset(OpS390XMOVHZload) 11735 v.AuxInt = off1 + off2 11736 v.Aux = mergeSym(sym1, sym2) 11737 v.AddArg(base) 11738 v.AddArg(mem) 11739 return true 11740 } 11741 // match: (MOVHZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 11742 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11743 // result: (MOVHZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 11744 for { 11745 off1 := v.AuxInt 11746 sym1 := v.Aux 11747 v_0 := v.Args[0] 11748 if v_0.Op != OpS390XMOVDaddridx { 11749 break 11750 } 11751 off2 := v_0.AuxInt 11752 sym2 := v_0.Aux 11753 ptr := v_0.Args[0] 11754 idx := v_0.Args[1] 11755 mem := v.Args[1] 11756 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11757 break 11758 } 11759 v.reset(OpS390XMOVHZloadidx) 11760 v.AuxInt = off1 + off2 11761 v.Aux = mergeSym(sym1, sym2) 11762 v.AddArg(ptr) 11763 v.AddArg(idx) 11764 v.AddArg(mem) 11765 return true 11766 } 11767 // match: (MOVHZload [off] {sym} (ADD ptr idx) mem) 11768 // cond: ptr.Op != OpSB 11769 // result: (MOVHZloadidx [off] {sym} ptr idx mem) 11770 for { 11771 off := v.AuxInt 11772 sym := v.Aux 11773 v_0 := v.Args[0] 11774 if v_0.Op != OpS390XADD { 11775 break 11776 } 11777 ptr := v_0.Args[0] 11778 idx := v_0.Args[1] 11779 mem := v.Args[1] 11780 if !(ptr.Op != OpSB) { 11781 break 11782 } 11783 v.reset(OpS390XMOVHZloadidx) 11784 v.AuxInt = off 11785 v.Aux = sym 11786 v.AddArg(ptr) 11787 v.AddArg(idx) 11788 v.AddArg(mem) 11789 return true 11790 } 11791 return false 11792 } 11793 func rewriteValueS390X_OpS390XMOVHZloadidx(v *Value, config *Config) bool { 11794 b := v.Block 11795 _ = b 11796 // match: (MOVHZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 11797 // cond: 11798 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11799 for { 11800 c := v.AuxInt 11801 sym := v.Aux 11802 v_0 := v.Args[0] 11803 if v_0.Op != OpS390XADDconst { 11804 break 11805 } 11806 d := v_0.AuxInt 11807 ptr := v_0.Args[0] 11808 idx := v.Args[1] 11809 mem := v.Args[2] 11810 v.reset(OpS390XMOVHZloadidx) 11811 v.AuxInt = c + d 11812 v.Aux = sym 11813 v.AddArg(ptr) 11814 v.AddArg(idx) 11815 v.AddArg(mem) 11816 return true 11817 } 11818 // match: (MOVHZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 11819 // cond: 11820 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11821 for { 11822 c := v.AuxInt 11823 sym := v.Aux 11824 ptr := v.Args[0] 11825 v_1 := v.Args[1] 11826 if v_1.Op != OpS390XADDconst { 11827 break 11828 } 11829 d := v_1.AuxInt 11830 idx := v_1.Args[0] 11831 mem := v.Args[2] 11832 v.reset(OpS390XMOVHZloadidx) 11833 v.AuxInt = c + d 11834 v.Aux = sym 11835 v.AddArg(ptr) 11836 v.AddArg(idx) 11837 v.AddArg(mem) 11838 return true 11839 } 11840 return false 11841 } 11842 func rewriteValueS390X_OpS390XMOVHZreg(v *Value, config *Config) bool { 11843 b := v.Block 11844 _ = b 11845 // match: (MOVHZreg x:(MOVBZload _ _)) 11846 // cond: 11847 // result: (MOVDreg x) 11848 for { 11849 x := v.Args[0] 11850 if x.Op != OpS390XMOVBZload { 11851 break 11852 } 11853 v.reset(OpS390XMOVDreg) 11854 v.AddArg(x) 11855 return true 11856 } 11857 // match: (MOVHZreg x:(MOVHZload _ _)) 11858 // cond: 11859 // result: (MOVDreg x) 11860 for { 11861 x := v.Args[0] 11862 if x.Op != OpS390XMOVHZload { 11863 break 11864 } 11865 v.reset(OpS390XMOVDreg) 11866 v.AddArg(x) 11867 return true 11868 } 11869 // match: (MOVHZreg x:(Arg <t>)) 11870 // cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t) 11871 // result: (MOVDreg x) 11872 for { 11873 x := v.Args[0] 11874 if x.Op != OpArg { 11875 break 11876 } 11877 t := x.Type 11878 if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) { 11879 break 11880 } 11881 v.reset(OpS390XMOVDreg) 11882 v.AddArg(x) 11883 return true 11884 } 11885 // match: (MOVHZreg x:(MOVBZreg _)) 11886 // cond: 11887 // result: (MOVDreg x) 11888 for { 11889 x := v.Args[0] 11890 if x.Op != OpS390XMOVBZreg { 11891 break 11892 } 11893 v.reset(OpS390XMOVDreg) 11894 v.AddArg(x) 11895 return true 11896 } 11897 // match: (MOVHZreg x:(MOVHZreg _)) 11898 // cond: 11899 // result: (MOVDreg x) 11900 for { 11901 x := v.Args[0] 11902 if x.Op != OpS390XMOVHZreg { 11903 break 11904 } 11905 v.reset(OpS390XMOVDreg) 11906 v.AddArg(x) 11907 return true 11908 } 11909 // match: (MOVHZreg (MOVDconst [c])) 11910 // cond: 11911 // result: (MOVDconst [int64(uint16(c))]) 11912 for { 11913 v_0 := v.Args[0] 11914 if v_0.Op != OpS390XMOVDconst { 11915 break 11916 } 11917 c := v_0.AuxInt 11918 v.reset(OpS390XMOVDconst) 11919 v.AuxInt = int64(uint16(c)) 11920 return true 11921 } 11922 // match: (MOVHZreg x:(MOVHZload [off] {sym} ptr mem)) 11923 // cond: x.Uses == 1 && clobber(x) 11924 // result: @x.Block (MOVHZload <v.Type> [off] {sym} ptr mem) 11925 for { 11926 x := v.Args[0] 11927 if x.Op != OpS390XMOVHZload { 11928 break 11929 } 11930 off := x.AuxInt 11931 sym := x.Aux 11932 ptr := x.Args[0] 11933 mem := x.Args[1] 11934 if !(x.Uses == 1 && clobber(x)) { 11935 break 11936 } 11937 b = x.Block 11938 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, v.Type) 11939 v.reset(OpCopy) 11940 v.AddArg(v0) 11941 v0.AuxInt = off 11942 v0.Aux = sym 11943 v0.AddArg(ptr) 11944 v0.AddArg(mem) 11945 return true 11946 } 11947 // match: (MOVHZreg x:(MOVHZloadidx [off] {sym} ptr idx mem)) 11948 // cond: x.Uses == 1 && clobber(x) 11949 // result: @x.Block (MOVHZloadidx <v.Type> [off] {sym} ptr idx mem) 11950 for { 11951 x := v.Args[0] 11952 if x.Op != OpS390XMOVHZloadidx { 11953 break 11954 } 11955 off := x.AuxInt 11956 sym := x.Aux 11957 ptr := x.Args[0] 11958 idx := x.Args[1] 11959 mem := x.Args[2] 11960 if !(x.Uses == 1 && clobber(x)) { 11961 break 11962 } 11963 b = x.Block 11964 v0 := b.NewValue0(v.Pos, OpS390XMOVHZloadidx, v.Type) 11965 v.reset(OpCopy) 11966 v.AddArg(v0) 11967 v0.AuxInt = off 11968 v0.Aux = sym 11969 v0.AddArg(ptr) 11970 v0.AddArg(idx) 11971 v0.AddArg(mem) 11972 return true 11973 } 11974 return false 11975 } 11976 func rewriteValueS390X_OpS390XMOVHload(v *Value, config *Config) bool { 11977 b := v.Block 11978 _ = b 11979 // match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) 11980 // cond: is20Bit(off1+off2) 11981 // result: (MOVHload [off1+off2] {sym} ptr mem) 11982 for { 11983 off1 := v.AuxInt 11984 sym := v.Aux 11985 v_0 := v.Args[0] 11986 if v_0.Op != OpS390XADDconst { 11987 break 11988 } 11989 off2 := v_0.AuxInt 11990 ptr := v_0.Args[0] 11991 mem := v.Args[1] 11992 if !(is20Bit(off1 + off2)) { 11993 break 11994 } 11995 v.reset(OpS390XMOVHload) 11996 v.AuxInt = off1 + off2 11997 v.Aux = sym 11998 v.AddArg(ptr) 11999 v.AddArg(mem) 12000 return true 12001 } 12002 // match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12003 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12004 // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12005 for { 12006 off1 := v.AuxInt 12007 sym1 := v.Aux 12008 v_0 := v.Args[0] 12009 if v_0.Op != OpS390XMOVDaddr { 12010 break 12011 } 12012 off2 := v_0.AuxInt 12013 sym2 := v_0.Aux 12014 base := v_0.Args[0] 12015 mem := v.Args[1] 12016 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12017 break 12018 } 12019 v.reset(OpS390XMOVHload) 12020 v.AuxInt = off1 + off2 12021 v.Aux = mergeSym(sym1, sym2) 12022 v.AddArg(base) 12023 v.AddArg(mem) 12024 return true 12025 } 12026 return false 12027 } 12028 func rewriteValueS390X_OpS390XMOVHreg(v *Value, config *Config) bool { 12029 b := v.Block 12030 _ = b 12031 // match: (MOVHreg x:(MOVBload _ _)) 12032 // cond: 12033 // result: (MOVDreg x) 12034 for { 12035 x := v.Args[0] 12036 if x.Op != OpS390XMOVBload { 12037 break 12038 } 12039 v.reset(OpS390XMOVDreg) 12040 v.AddArg(x) 12041 return true 12042 } 12043 // match: (MOVHreg x:(MOVBZload _ _)) 12044 // cond: 12045 // result: (MOVDreg x) 12046 for { 12047 x := v.Args[0] 12048 if x.Op != OpS390XMOVBZload { 12049 break 12050 } 12051 v.reset(OpS390XMOVDreg) 12052 v.AddArg(x) 12053 return true 12054 } 12055 // match: (MOVHreg x:(MOVHload _ _)) 12056 // cond: 12057 // result: (MOVDreg x) 12058 for { 12059 x := v.Args[0] 12060 if x.Op != OpS390XMOVHload { 12061 break 12062 } 12063 v.reset(OpS390XMOVDreg) 12064 v.AddArg(x) 12065 return true 12066 } 12067 // match: (MOVHreg x:(Arg <t>)) 12068 // cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t) 12069 // result: (MOVDreg x) 12070 for { 12071 x := v.Args[0] 12072 if x.Op != OpArg { 12073 break 12074 } 12075 t := x.Type 12076 if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) { 12077 break 12078 } 12079 v.reset(OpS390XMOVDreg) 12080 v.AddArg(x) 12081 return true 12082 } 12083 // match: (MOVHreg x:(MOVBreg _)) 12084 // cond: 12085 // result: (MOVDreg x) 12086 for { 12087 x := v.Args[0] 12088 if x.Op != OpS390XMOVBreg { 12089 break 12090 } 12091 v.reset(OpS390XMOVDreg) 12092 v.AddArg(x) 12093 return true 12094 } 12095 // match: (MOVHreg x:(MOVBZreg _)) 12096 // cond: 12097 // result: (MOVDreg x) 12098 for { 12099 x := v.Args[0] 12100 if x.Op != OpS390XMOVBZreg { 12101 break 12102 } 12103 v.reset(OpS390XMOVDreg) 12104 v.AddArg(x) 12105 return true 12106 } 12107 // match: (MOVHreg x:(MOVHreg _)) 12108 // cond: 12109 // result: (MOVDreg x) 12110 for { 12111 x := v.Args[0] 12112 if x.Op != OpS390XMOVHreg { 12113 break 12114 } 12115 v.reset(OpS390XMOVDreg) 12116 v.AddArg(x) 12117 return true 12118 } 12119 // match: (MOVHreg (MOVDconst [c])) 12120 // cond: 12121 // result: (MOVDconst [int64(int16(c))]) 12122 for { 12123 v_0 := v.Args[0] 12124 if v_0.Op != OpS390XMOVDconst { 12125 break 12126 } 12127 c := v_0.AuxInt 12128 v.reset(OpS390XMOVDconst) 12129 v.AuxInt = int64(int16(c)) 12130 return true 12131 } 12132 // match: (MOVHreg x:(MOVHZload [off] {sym} ptr mem)) 12133 // cond: x.Uses == 1 && clobber(x) 12134 // result: @x.Block (MOVHload <v.Type> [off] {sym} ptr mem) 12135 for { 12136 x := v.Args[0] 12137 if x.Op != OpS390XMOVHZload { 12138 break 12139 } 12140 off := x.AuxInt 12141 sym := x.Aux 12142 ptr := x.Args[0] 12143 mem := x.Args[1] 12144 if !(x.Uses == 1 && clobber(x)) { 12145 break 12146 } 12147 b = x.Block 12148 v0 := b.NewValue0(v.Pos, OpS390XMOVHload, v.Type) 12149 v.reset(OpCopy) 12150 v.AddArg(v0) 12151 v0.AuxInt = off 12152 v0.Aux = sym 12153 v0.AddArg(ptr) 12154 v0.AddArg(mem) 12155 return true 12156 } 12157 return false 12158 } 12159 func rewriteValueS390X_OpS390XMOVHstore(v *Value, config *Config) bool { 12160 b := v.Block 12161 _ = b 12162 // match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem) 12163 // cond: 12164 // result: (MOVHstore [off] {sym} ptr x mem) 12165 for { 12166 off := v.AuxInt 12167 sym := v.Aux 12168 ptr := v.Args[0] 12169 v_1 := v.Args[1] 12170 if v_1.Op != OpS390XMOVHreg { 12171 break 12172 } 12173 x := v_1.Args[0] 12174 mem := v.Args[2] 12175 v.reset(OpS390XMOVHstore) 12176 v.AuxInt = off 12177 v.Aux = sym 12178 v.AddArg(ptr) 12179 v.AddArg(x) 12180 v.AddArg(mem) 12181 return true 12182 } 12183 // match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem) 12184 // cond: 12185 // result: (MOVHstore [off] {sym} ptr x mem) 12186 for { 12187 off := v.AuxInt 12188 sym := v.Aux 12189 ptr := v.Args[0] 12190 v_1 := v.Args[1] 12191 if v_1.Op != OpS390XMOVHZreg { 12192 break 12193 } 12194 x := v_1.Args[0] 12195 mem := v.Args[2] 12196 v.reset(OpS390XMOVHstore) 12197 v.AuxInt = off 12198 v.Aux = sym 12199 v.AddArg(ptr) 12200 v.AddArg(x) 12201 v.AddArg(mem) 12202 return true 12203 } 12204 // match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) 12205 // cond: is20Bit(off1+off2) 12206 // result: (MOVHstore [off1+off2] {sym} ptr val mem) 12207 for { 12208 off1 := v.AuxInt 12209 sym := v.Aux 12210 v_0 := v.Args[0] 12211 if v_0.Op != OpS390XADDconst { 12212 break 12213 } 12214 off2 := v_0.AuxInt 12215 ptr := v_0.Args[0] 12216 val := v.Args[1] 12217 mem := v.Args[2] 12218 if !(is20Bit(off1 + off2)) { 12219 break 12220 } 12221 v.reset(OpS390XMOVHstore) 12222 v.AuxInt = off1 + off2 12223 v.Aux = sym 12224 v.AddArg(ptr) 12225 v.AddArg(val) 12226 v.AddArg(mem) 12227 return true 12228 } 12229 // match: (MOVHstore [off] {sym} ptr (MOVDconst [c]) mem) 12230 // cond: validOff(off) && ptr.Op != OpSB 12231 // result: (MOVHstoreconst [makeValAndOff(int64(int16(c)),off)] {sym} ptr mem) 12232 for { 12233 off := v.AuxInt 12234 sym := v.Aux 12235 ptr := v.Args[0] 12236 v_1 := v.Args[1] 12237 if v_1.Op != OpS390XMOVDconst { 12238 break 12239 } 12240 c := v_1.AuxInt 12241 mem := v.Args[2] 12242 if !(validOff(off) && ptr.Op != OpSB) { 12243 break 12244 } 12245 v.reset(OpS390XMOVHstoreconst) 12246 v.AuxInt = makeValAndOff(int64(int16(c)), off) 12247 v.Aux = sym 12248 v.AddArg(ptr) 12249 v.AddArg(mem) 12250 return true 12251 } 12252 // match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 12253 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12254 // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 12255 for { 12256 off1 := v.AuxInt 12257 sym1 := v.Aux 12258 v_0 := v.Args[0] 12259 if v_0.Op != OpS390XMOVDaddr { 12260 break 12261 } 12262 off2 := v_0.AuxInt 12263 sym2 := v_0.Aux 12264 base := v_0.Args[0] 12265 val := v.Args[1] 12266 mem := v.Args[2] 12267 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12268 break 12269 } 12270 v.reset(OpS390XMOVHstore) 12271 v.AuxInt = off1 + off2 12272 v.Aux = mergeSym(sym1, sym2) 12273 v.AddArg(base) 12274 v.AddArg(val) 12275 v.AddArg(mem) 12276 return true 12277 } 12278 // match: (MOVHstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 12279 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12280 // result: (MOVHstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 12281 for { 12282 off1 := v.AuxInt 12283 sym1 := v.Aux 12284 v_0 := v.Args[0] 12285 if v_0.Op != OpS390XMOVDaddridx { 12286 break 12287 } 12288 off2 := v_0.AuxInt 12289 sym2 := v_0.Aux 12290 ptr := v_0.Args[0] 12291 idx := v_0.Args[1] 12292 val := v.Args[1] 12293 mem := v.Args[2] 12294 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12295 break 12296 } 12297 v.reset(OpS390XMOVHstoreidx) 12298 v.AuxInt = off1 + off2 12299 v.Aux = mergeSym(sym1, sym2) 12300 v.AddArg(ptr) 12301 v.AddArg(idx) 12302 v.AddArg(val) 12303 v.AddArg(mem) 12304 return true 12305 } 12306 // match: (MOVHstore [off] {sym} (ADD ptr idx) val mem) 12307 // cond: ptr.Op != OpSB 12308 // result: (MOVHstoreidx [off] {sym} ptr idx val mem) 12309 for { 12310 off := v.AuxInt 12311 sym := v.Aux 12312 v_0 := v.Args[0] 12313 if v_0.Op != OpS390XADD { 12314 break 12315 } 12316 ptr := v_0.Args[0] 12317 idx := v_0.Args[1] 12318 val := v.Args[1] 12319 mem := v.Args[2] 12320 if !(ptr.Op != OpSB) { 12321 break 12322 } 12323 v.reset(OpS390XMOVHstoreidx) 12324 v.AuxInt = off 12325 v.Aux = sym 12326 v.AddArg(ptr) 12327 v.AddArg(idx) 12328 v.AddArg(val) 12329 v.AddArg(mem) 12330 return true 12331 } 12332 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRDconst [16] w) mem)) 12333 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 12334 // result: (MOVWstore [i-2] {s} p w mem) 12335 for { 12336 i := v.AuxInt 12337 s := v.Aux 12338 p := v.Args[0] 12339 w := v.Args[1] 12340 x := v.Args[2] 12341 if x.Op != OpS390XMOVHstore { 12342 break 12343 } 12344 if x.AuxInt != i-2 { 12345 break 12346 } 12347 if x.Aux != s { 12348 break 12349 } 12350 if p != x.Args[0] { 12351 break 12352 } 12353 x_1 := x.Args[1] 12354 if x_1.Op != OpS390XSRDconst { 12355 break 12356 } 12357 if x_1.AuxInt != 16 { 12358 break 12359 } 12360 if w != x_1.Args[0] { 12361 break 12362 } 12363 mem := x.Args[2] 12364 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 12365 break 12366 } 12367 v.reset(OpS390XMOVWstore) 12368 v.AuxInt = i - 2 12369 v.Aux = s 12370 v.AddArg(p) 12371 v.AddArg(w) 12372 v.AddArg(mem) 12373 return true 12374 } 12375 // match: (MOVHstore [i] {s} p w0:(SRDconst [j] w) x:(MOVHstore [i-2] {s} p (SRDconst [j+16] w) mem)) 12376 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 12377 // result: (MOVWstore [i-2] {s} p w0 mem) 12378 for { 12379 i := v.AuxInt 12380 s := v.Aux 12381 p := v.Args[0] 12382 w0 := v.Args[1] 12383 if w0.Op != OpS390XSRDconst { 12384 break 12385 } 12386 j := w0.AuxInt 12387 w := w0.Args[0] 12388 x := v.Args[2] 12389 if x.Op != OpS390XMOVHstore { 12390 break 12391 } 12392 if x.AuxInt != i-2 { 12393 break 12394 } 12395 if x.Aux != s { 12396 break 12397 } 12398 if p != x.Args[0] { 12399 break 12400 } 12401 x_1 := x.Args[1] 12402 if x_1.Op != OpS390XSRDconst { 12403 break 12404 } 12405 if x_1.AuxInt != j+16 { 12406 break 12407 } 12408 if w != x_1.Args[0] { 12409 break 12410 } 12411 mem := x.Args[2] 12412 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 12413 break 12414 } 12415 v.reset(OpS390XMOVWstore) 12416 v.AuxInt = i - 2 12417 v.Aux = s 12418 v.AddArg(p) 12419 v.AddArg(w0) 12420 v.AddArg(mem) 12421 return true 12422 } 12423 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRWconst [16] w) mem)) 12424 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 12425 // result: (MOVWstore [i-2] {s} p w mem) 12426 for { 12427 i := v.AuxInt 12428 s := v.Aux 12429 p := v.Args[0] 12430 w := v.Args[1] 12431 x := v.Args[2] 12432 if x.Op != OpS390XMOVHstore { 12433 break 12434 } 12435 if x.AuxInt != i-2 { 12436 break 12437 } 12438 if x.Aux != s { 12439 break 12440 } 12441 if p != x.Args[0] { 12442 break 12443 } 12444 x_1 := x.Args[1] 12445 if x_1.Op != OpS390XSRWconst { 12446 break 12447 } 12448 if x_1.AuxInt != 16 { 12449 break 12450 } 12451 if w != x_1.Args[0] { 12452 break 12453 } 12454 mem := x.Args[2] 12455 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 12456 break 12457 } 12458 v.reset(OpS390XMOVWstore) 12459 v.AuxInt = i - 2 12460 v.Aux = s 12461 v.AddArg(p) 12462 v.AddArg(w) 12463 v.AddArg(mem) 12464 return true 12465 } 12466 // match: (MOVHstore [i] {s} p w0:(SRWconst [j] w) x:(MOVHstore [i-2] {s} p (SRWconst [j+16] w) mem)) 12467 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 12468 // result: (MOVWstore [i-2] {s} p w0 mem) 12469 for { 12470 i := v.AuxInt 12471 s := v.Aux 12472 p := v.Args[0] 12473 w0 := v.Args[1] 12474 if w0.Op != OpS390XSRWconst { 12475 break 12476 } 12477 j := w0.AuxInt 12478 w := w0.Args[0] 12479 x := v.Args[2] 12480 if x.Op != OpS390XMOVHstore { 12481 break 12482 } 12483 if x.AuxInt != i-2 { 12484 break 12485 } 12486 if x.Aux != s { 12487 break 12488 } 12489 if p != x.Args[0] { 12490 break 12491 } 12492 x_1 := x.Args[1] 12493 if x_1.Op != OpS390XSRWconst { 12494 break 12495 } 12496 if x_1.AuxInt != j+16 { 12497 break 12498 } 12499 if w != x_1.Args[0] { 12500 break 12501 } 12502 mem := x.Args[2] 12503 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 12504 break 12505 } 12506 v.reset(OpS390XMOVWstore) 12507 v.AuxInt = i - 2 12508 v.Aux = s 12509 v.AddArg(p) 12510 v.AddArg(w0) 12511 v.AddArg(mem) 12512 return true 12513 } 12514 return false 12515 } 12516 func rewriteValueS390X_OpS390XMOVHstoreconst(v *Value, config *Config) bool { 12517 b := v.Block 12518 _ = b 12519 // match: (MOVHstoreconst [sc] {s} (ADDconst [off] ptr) mem) 12520 // cond: ValAndOff(sc).canAdd(off) 12521 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 12522 for { 12523 sc := v.AuxInt 12524 s := v.Aux 12525 v_0 := v.Args[0] 12526 if v_0.Op != OpS390XADDconst { 12527 break 12528 } 12529 off := v_0.AuxInt 12530 ptr := v_0.Args[0] 12531 mem := v.Args[1] 12532 if !(ValAndOff(sc).canAdd(off)) { 12533 break 12534 } 12535 v.reset(OpS390XMOVHstoreconst) 12536 v.AuxInt = ValAndOff(sc).add(off) 12537 v.Aux = s 12538 v.AddArg(ptr) 12539 v.AddArg(mem) 12540 return true 12541 } 12542 // match: (MOVHstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 12543 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 12544 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 12545 for { 12546 sc := v.AuxInt 12547 sym1 := v.Aux 12548 v_0 := v.Args[0] 12549 if v_0.Op != OpS390XMOVDaddr { 12550 break 12551 } 12552 off := v_0.AuxInt 12553 sym2 := v_0.Aux 12554 ptr := v_0.Args[0] 12555 mem := v.Args[1] 12556 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 12557 break 12558 } 12559 v.reset(OpS390XMOVHstoreconst) 12560 v.AuxInt = ValAndOff(sc).add(off) 12561 v.Aux = mergeSym(sym1, sym2) 12562 v.AddArg(ptr) 12563 v.AddArg(mem) 12564 return true 12565 } 12566 // match: (MOVHstoreconst [c] {s} p x:(MOVHstoreconst [a] {s} p mem)) 12567 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 12568 // result: (MOVWstoreconst [makeValAndOff(ValAndOff(c).Val()&0xffff | ValAndOff(a).Val()<<16, ValAndOff(a).Off())] {s} p mem) 12569 for { 12570 c := v.AuxInt 12571 s := v.Aux 12572 p := v.Args[0] 12573 x := v.Args[1] 12574 if x.Op != OpS390XMOVHstoreconst { 12575 break 12576 } 12577 a := x.AuxInt 12578 if x.Aux != s { 12579 break 12580 } 12581 if p != x.Args[0] { 12582 break 12583 } 12584 mem := x.Args[1] 12585 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 12586 break 12587 } 12588 v.reset(OpS390XMOVWstoreconst) 12589 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xffff|ValAndOff(a).Val()<<16, ValAndOff(a).Off()) 12590 v.Aux = s 12591 v.AddArg(p) 12592 v.AddArg(mem) 12593 return true 12594 } 12595 return false 12596 } 12597 func rewriteValueS390X_OpS390XMOVHstoreidx(v *Value, config *Config) bool { 12598 b := v.Block 12599 _ = b 12600 // match: (MOVHstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 12601 // cond: 12602 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 12603 for { 12604 c := v.AuxInt 12605 sym := v.Aux 12606 v_0 := v.Args[0] 12607 if v_0.Op != OpS390XADDconst { 12608 break 12609 } 12610 d := v_0.AuxInt 12611 ptr := v_0.Args[0] 12612 idx := v.Args[1] 12613 val := v.Args[2] 12614 mem := v.Args[3] 12615 v.reset(OpS390XMOVHstoreidx) 12616 v.AuxInt = c + d 12617 v.Aux = sym 12618 v.AddArg(ptr) 12619 v.AddArg(idx) 12620 v.AddArg(val) 12621 v.AddArg(mem) 12622 return true 12623 } 12624 // match: (MOVHstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 12625 // cond: 12626 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 12627 for { 12628 c := v.AuxInt 12629 sym := v.Aux 12630 ptr := v.Args[0] 12631 v_1 := v.Args[1] 12632 if v_1.Op != OpS390XADDconst { 12633 break 12634 } 12635 d := v_1.AuxInt 12636 idx := v_1.Args[0] 12637 val := v.Args[2] 12638 mem := v.Args[3] 12639 v.reset(OpS390XMOVHstoreidx) 12640 v.AuxInt = c + d 12641 v.Aux = sym 12642 v.AddArg(ptr) 12643 v.AddArg(idx) 12644 v.AddArg(val) 12645 v.AddArg(mem) 12646 return true 12647 } 12648 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [16] w) mem)) 12649 // cond: x.Uses == 1 && clobber(x) 12650 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 12651 for { 12652 i := v.AuxInt 12653 s := v.Aux 12654 p := v.Args[0] 12655 idx := v.Args[1] 12656 w := v.Args[2] 12657 x := v.Args[3] 12658 if x.Op != OpS390XMOVHstoreidx { 12659 break 12660 } 12661 if x.AuxInt != i-2 { 12662 break 12663 } 12664 if x.Aux != s { 12665 break 12666 } 12667 if p != x.Args[0] { 12668 break 12669 } 12670 if idx != x.Args[1] { 12671 break 12672 } 12673 x_2 := x.Args[2] 12674 if x_2.Op != OpS390XSRDconst { 12675 break 12676 } 12677 if x_2.AuxInt != 16 { 12678 break 12679 } 12680 if w != x_2.Args[0] { 12681 break 12682 } 12683 mem := x.Args[3] 12684 if !(x.Uses == 1 && clobber(x)) { 12685 break 12686 } 12687 v.reset(OpS390XMOVWstoreidx) 12688 v.AuxInt = i - 2 12689 v.Aux = s 12690 v.AddArg(p) 12691 v.AddArg(idx) 12692 v.AddArg(w) 12693 v.AddArg(mem) 12694 return true 12695 } 12696 // match: (MOVHstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [j+16] w) mem)) 12697 // cond: x.Uses == 1 && clobber(x) 12698 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12699 for { 12700 i := v.AuxInt 12701 s := v.Aux 12702 p := v.Args[0] 12703 idx := v.Args[1] 12704 w0 := v.Args[2] 12705 if w0.Op != OpS390XSRDconst { 12706 break 12707 } 12708 j := w0.AuxInt 12709 w := w0.Args[0] 12710 x := v.Args[3] 12711 if x.Op != OpS390XMOVHstoreidx { 12712 break 12713 } 12714 if x.AuxInt != i-2 { 12715 break 12716 } 12717 if x.Aux != s { 12718 break 12719 } 12720 if p != x.Args[0] { 12721 break 12722 } 12723 if idx != x.Args[1] { 12724 break 12725 } 12726 x_2 := x.Args[2] 12727 if x_2.Op != OpS390XSRDconst { 12728 break 12729 } 12730 if x_2.AuxInt != j+16 { 12731 break 12732 } 12733 if w != x_2.Args[0] { 12734 break 12735 } 12736 mem := x.Args[3] 12737 if !(x.Uses == 1 && clobber(x)) { 12738 break 12739 } 12740 v.reset(OpS390XMOVWstoreidx) 12741 v.AuxInt = i - 2 12742 v.Aux = s 12743 v.AddArg(p) 12744 v.AddArg(idx) 12745 v.AddArg(w0) 12746 v.AddArg(mem) 12747 return true 12748 } 12749 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [16] w) mem)) 12750 // cond: x.Uses == 1 && clobber(x) 12751 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 12752 for { 12753 i := v.AuxInt 12754 s := v.Aux 12755 p := v.Args[0] 12756 idx := v.Args[1] 12757 w := v.Args[2] 12758 x := v.Args[3] 12759 if x.Op != OpS390XMOVHstoreidx { 12760 break 12761 } 12762 if x.AuxInt != i-2 { 12763 break 12764 } 12765 if x.Aux != s { 12766 break 12767 } 12768 if p != x.Args[0] { 12769 break 12770 } 12771 if idx != x.Args[1] { 12772 break 12773 } 12774 x_2 := x.Args[2] 12775 if x_2.Op != OpS390XSRWconst { 12776 break 12777 } 12778 if x_2.AuxInt != 16 { 12779 break 12780 } 12781 if w != x_2.Args[0] { 12782 break 12783 } 12784 mem := x.Args[3] 12785 if !(x.Uses == 1 && clobber(x)) { 12786 break 12787 } 12788 v.reset(OpS390XMOVWstoreidx) 12789 v.AuxInt = i - 2 12790 v.Aux = s 12791 v.AddArg(p) 12792 v.AddArg(idx) 12793 v.AddArg(w) 12794 v.AddArg(mem) 12795 return true 12796 } 12797 // match: (MOVHstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [j+16] w) mem)) 12798 // cond: x.Uses == 1 && clobber(x) 12799 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12800 for { 12801 i := v.AuxInt 12802 s := v.Aux 12803 p := v.Args[0] 12804 idx := v.Args[1] 12805 w0 := v.Args[2] 12806 if w0.Op != OpS390XSRWconst { 12807 break 12808 } 12809 j := w0.AuxInt 12810 w := w0.Args[0] 12811 x := v.Args[3] 12812 if x.Op != OpS390XMOVHstoreidx { 12813 break 12814 } 12815 if x.AuxInt != i-2 { 12816 break 12817 } 12818 if x.Aux != s { 12819 break 12820 } 12821 if p != x.Args[0] { 12822 break 12823 } 12824 if idx != x.Args[1] { 12825 break 12826 } 12827 x_2 := x.Args[2] 12828 if x_2.Op != OpS390XSRWconst { 12829 break 12830 } 12831 if x_2.AuxInt != j+16 { 12832 break 12833 } 12834 if w != x_2.Args[0] { 12835 break 12836 } 12837 mem := x.Args[3] 12838 if !(x.Uses == 1 && clobber(x)) { 12839 break 12840 } 12841 v.reset(OpS390XMOVWstoreidx) 12842 v.AuxInt = i - 2 12843 v.Aux = s 12844 v.AddArg(p) 12845 v.AddArg(idx) 12846 v.AddArg(w0) 12847 v.AddArg(mem) 12848 return true 12849 } 12850 return false 12851 } 12852 func rewriteValueS390X_OpS390XMOVWBRstore(v *Value, config *Config) bool { 12853 b := v.Block 12854 _ = b 12855 // match: (MOVWBRstore [i] {s} p (SRDconst [32] w) x:(MOVWBRstore [i-4] {s} p w mem)) 12856 // cond: x.Uses == 1 && clobber(x) 12857 // result: (MOVDBRstore [i-4] {s} p w mem) 12858 for { 12859 i := v.AuxInt 12860 s := v.Aux 12861 p := v.Args[0] 12862 v_1 := v.Args[1] 12863 if v_1.Op != OpS390XSRDconst { 12864 break 12865 } 12866 if v_1.AuxInt != 32 { 12867 break 12868 } 12869 w := v_1.Args[0] 12870 x := v.Args[2] 12871 if x.Op != OpS390XMOVWBRstore { 12872 break 12873 } 12874 if x.AuxInt != i-4 { 12875 break 12876 } 12877 if x.Aux != s { 12878 break 12879 } 12880 if p != x.Args[0] { 12881 break 12882 } 12883 if w != x.Args[1] { 12884 break 12885 } 12886 mem := x.Args[2] 12887 if !(x.Uses == 1 && clobber(x)) { 12888 break 12889 } 12890 v.reset(OpS390XMOVDBRstore) 12891 v.AuxInt = i - 4 12892 v.Aux = s 12893 v.AddArg(p) 12894 v.AddArg(w) 12895 v.AddArg(mem) 12896 return true 12897 } 12898 // match: (MOVWBRstore [i] {s} p (SRDconst [j] w) x:(MOVWBRstore [i-4] {s} p w0:(SRDconst [j-32] w) mem)) 12899 // cond: x.Uses == 1 && clobber(x) 12900 // result: (MOVDBRstore [i-4] {s} p w0 mem) 12901 for { 12902 i := v.AuxInt 12903 s := v.Aux 12904 p := v.Args[0] 12905 v_1 := v.Args[1] 12906 if v_1.Op != OpS390XSRDconst { 12907 break 12908 } 12909 j := v_1.AuxInt 12910 w := v_1.Args[0] 12911 x := v.Args[2] 12912 if x.Op != OpS390XMOVWBRstore { 12913 break 12914 } 12915 if x.AuxInt != i-4 { 12916 break 12917 } 12918 if x.Aux != s { 12919 break 12920 } 12921 if p != x.Args[0] { 12922 break 12923 } 12924 w0 := x.Args[1] 12925 if w0.Op != OpS390XSRDconst { 12926 break 12927 } 12928 if w0.AuxInt != j-32 { 12929 break 12930 } 12931 if w != w0.Args[0] { 12932 break 12933 } 12934 mem := x.Args[2] 12935 if !(x.Uses == 1 && clobber(x)) { 12936 break 12937 } 12938 v.reset(OpS390XMOVDBRstore) 12939 v.AuxInt = i - 4 12940 v.Aux = s 12941 v.AddArg(p) 12942 v.AddArg(w0) 12943 v.AddArg(mem) 12944 return true 12945 } 12946 return false 12947 } 12948 func rewriteValueS390X_OpS390XMOVWBRstoreidx(v *Value, config *Config) bool { 12949 b := v.Block 12950 _ = b 12951 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [32] w) x:(MOVWBRstoreidx [i-4] {s} p idx w mem)) 12952 // cond: x.Uses == 1 && clobber(x) 12953 // result: (MOVDBRstoreidx [i-4] {s} p idx w mem) 12954 for { 12955 i := v.AuxInt 12956 s := v.Aux 12957 p := v.Args[0] 12958 idx := v.Args[1] 12959 v_2 := v.Args[2] 12960 if v_2.Op != OpS390XSRDconst { 12961 break 12962 } 12963 if v_2.AuxInt != 32 { 12964 break 12965 } 12966 w := v_2.Args[0] 12967 x := v.Args[3] 12968 if x.Op != OpS390XMOVWBRstoreidx { 12969 break 12970 } 12971 if x.AuxInt != i-4 { 12972 break 12973 } 12974 if x.Aux != s { 12975 break 12976 } 12977 if p != x.Args[0] { 12978 break 12979 } 12980 if idx != x.Args[1] { 12981 break 12982 } 12983 if w != x.Args[2] { 12984 break 12985 } 12986 mem := x.Args[3] 12987 if !(x.Uses == 1 && clobber(x)) { 12988 break 12989 } 12990 v.reset(OpS390XMOVDBRstoreidx) 12991 v.AuxInt = i - 4 12992 v.Aux = s 12993 v.AddArg(p) 12994 v.AddArg(idx) 12995 v.AddArg(w) 12996 v.AddArg(mem) 12997 return true 12998 } 12999 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVWBRstoreidx [i-4] {s} p idx w0:(SRDconst [j-32] w) mem)) 13000 // cond: x.Uses == 1 && clobber(x) 13001 // result: (MOVDBRstoreidx [i-4] {s} p idx w0 mem) 13002 for { 13003 i := v.AuxInt 13004 s := v.Aux 13005 p := v.Args[0] 13006 idx := v.Args[1] 13007 v_2 := v.Args[2] 13008 if v_2.Op != OpS390XSRDconst { 13009 break 13010 } 13011 j := v_2.AuxInt 13012 w := v_2.Args[0] 13013 x := v.Args[3] 13014 if x.Op != OpS390XMOVWBRstoreidx { 13015 break 13016 } 13017 if x.AuxInt != i-4 { 13018 break 13019 } 13020 if x.Aux != s { 13021 break 13022 } 13023 if p != x.Args[0] { 13024 break 13025 } 13026 if idx != x.Args[1] { 13027 break 13028 } 13029 w0 := x.Args[2] 13030 if w0.Op != OpS390XSRDconst { 13031 break 13032 } 13033 if w0.AuxInt != j-32 { 13034 break 13035 } 13036 if w != w0.Args[0] { 13037 break 13038 } 13039 mem := x.Args[3] 13040 if !(x.Uses == 1 && clobber(x)) { 13041 break 13042 } 13043 v.reset(OpS390XMOVDBRstoreidx) 13044 v.AuxInt = i - 4 13045 v.Aux = s 13046 v.AddArg(p) 13047 v.AddArg(idx) 13048 v.AddArg(w0) 13049 v.AddArg(mem) 13050 return true 13051 } 13052 return false 13053 } 13054 func rewriteValueS390X_OpS390XMOVWZload(v *Value, config *Config) bool { 13055 b := v.Block 13056 _ = b 13057 // match: (MOVWZload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) 13058 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 13059 // result: (MOVDreg x) 13060 for { 13061 off := v.AuxInt 13062 sym := v.Aux 13063 ptr := v.Args[0] 13064 v_1 := v.Args[1] 13065 if v_1.Op != OpS390XMOVWstore { 13066 break 13067 } 13068 off2 := v_1.AuxInt 13069 sym2 := v_1.Aux 13070 ptr2 := v_1.Args[0] 13071 x := v_1.Args[1] 13072 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 13073 break 13074 } 13075 v.reset(OpS390XMOVDreg) 13076 v.AddArg(x) 13077 return true 13078 } 13079 // match: (MOVWZload [off1] {sym} (ADDconst [off2] ptr) mem) 13080 // cond: is20Bit(off1+off2) 13081 // result: (MOVWZload [off1+off2] {sym} ptr mem) 13082 for { 13083 off1 := v.AuxInt 13084 sym := v.Aux 13085 v_0 := v.Args[0] 13086 if v_0.Op != OpS390XADDconst { 13087 break 13088 } 13089 off2 := v_0.AuxInt 13090 ptr := v_0.Args[0] 13091 mem := v.Args[1] 13092 if !(is20Bit(off1 + off2)) { 13093 break 13094 } 13095 v.reset(OpS390XMOVWZload) 13096 v.AuxInt = off1 + off2 13097 v.Aux = sym 13098 v.AddArg(ptr) 13099 v.AddArg(mem) 13100 return true 13101 } 13102 // match: (MOVWZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 13103 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13104 // result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 13105 for { 13106 off1 := v.AuxInt 13107 sym1 := v.Aux 13108 v_0 := v.Args[0] 13109 if v_0.Op != OpS390XMOVDaddr { 13110 break 13111 } 13112 off2 := v_0.AuxInt 13113 sym2 := v_0.Aux 13114 base := v_0.Args[0] 13115 mem := v.Args[1] 13116 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13117 break 13118 } 13119 v.reset(OpS390XMOVWZload) 13120 v.AuxInt = off1 + off2 13121 v.Aux = mergeSym(sym1, sym2) 13122 v.AddArg(base) 13123 v.AddArg(mem) 13124 return true 13125 } 13126 // match: (MOVWZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 13127 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13128 // result: (MOVWZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 13129 for { 13130 off1 := v.AuxInt 13131 sym1 := v.Aux 13132 v_0 := v.Args[0] 13133 if v_0.Op != OpS390XMOVDaddridx { 13134 break 13135 } 13136 off2 := v_0.AuxInt 13137 sym2 := v_0.Aux 13138 ptr := v_0.Args[0] 13139 idx := v_0.Args[1] 13140 mem := v.Args[1] 13141 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13142 break 13143 } 13144 v.reset(OpS390XMOVWZloadidx) 13145 v.AuxInt = off1 + off2 13146 v.Aux = mergeSym(sym1, sym2) 13147 v.AddArg(ptr) 13148 v.AddArg(idx) 13149 v.AddArg(mem) 13150 return true 13151 } 13152 // match: (MOVWZload [off] {sym} (ADD ptr idx) mem) 13153 // cond: ptr.Op != OpSB 13154 // result: (MOVWZloadidx [off] {sym} ptr idx mem) 13155 for { 13156 off := v.AuxInt 13157 sym := v.Aux 13158 v_0 := v.Args[0] 13159 if v_0.Op != OpS390XADD { 13160 break 13161 } 13162 ptr := v_0.Args[0] 13163 idx := v_0.Args[1] 13164 mem := v.Args[1] 13165 if !(ptr.Op != OpSB) { 13166 break 13167 } 13168 v.reset(OpS390XMOVWZloadidx) 13169 v.AuxInt = off 13170 v.Aux = sym 13171 v.AddArg(ptr) 13172 v.AddArg(idx) 13173 v.AddArg(mem) 13174 return true 13175 } 13176 return false 13177 } 13178 func rewriteValueS390X_OpS390XMOVWZloadidx(v *Value, config *Config) bool { 13179 b := v.Block 13180 _ = b 13181 // match: (MOVWZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 13182 // cond: 13183 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 13184 for { 13185 c := v.AuxInt 13186 sym := v.Aux 13187 v_0 := v.Args[0] 13188 if v_0.Op != OpS390XADDconst { 13189 break 13190 } 13191 d := v_0.AuxInt 13192 ptr := v_0.Args[0] 13193 idx := v.Args[1] 13194 mem := v.Args[2] 13195 v.reset(OpS390XMOVWZloadidx) 13196 v.AuxInt = c + d 13197 v.Aux = sym 13198 v.AddArg(ptr) 13199 v.AddArg(idx) 13200 v.AddArg(mem) 13201 return true 13202 } 13203 // match: (MOVWZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 13204 // cond: 13205 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 13206 for { 13207 c := v.AuxInt 13208 sym := v.Aux 13209 ptr := v.Args[0] 13210 v_1 := v.Args[1] 13211 if v_1.Op != OpS390XADDconst { 13212 break 13213 } 13214 d := v_1.AuxInt 13215 idx := v_1.Args[0] 13216 mem := v.Args[2] 13217 v.reset(OpS390XMOVWZloadidx) 13218 v.AuxInt = c + d 13219 v.Aux = sym 13220 v.AddArg(ptr) 13221 v.AddArg(idx) 13222 v.AddArg(mem) 13223 return true 13224 } 13225 return false 13226 } 13227 func rewriteValueS390X_OpS390XMOVWZreg(v *Value, config *Config) bool { 13228 b := v.Block 13229 _ = b 13230 // match: (MOVWZreg x:(MOVBZload _ _)) 13231 // cond: 13232 // result: (MOVDreg x) 13233 for { 13234 x := v.Args[0] 13235 if x.Op != OpS390XMOVBZload { 13236 break 13237 } 13238 v.reset(OpS390XMOVDreg) 13239 v.AddArg(x) 13240 return true 13241 } 13242 // match: (MOVWZreg x:(MOVHZload _ _)) 13243 // cond: 13244 // result: (MOVDreg x) 13245 for { 13246 x := v.Args[0] 13247 if x.Op != OpS390XMOVHZload { 13248 break 13249 } 13250 v.reset(OpS390XMOVDreg) 13251 v.AddArg(x) 13252 return true 13253 } 13254 // match: (MOVWZreg x:(MOVWZload _ _)) 13255 // cond: 13256 // result: (MOVDreg x) 13257 for { 13258 x := v.Args[0] 13259 if x.Op != OpS390XMOVWZload { 13260 break 13261 } 13262 v.reset(OpS390XMOVDreg) 13263 v.AddArg(x) 13264 return true 13265 } 13266 // match: (MOVWZreg x:(Arg <t>)) 13267 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t) 13268 // result: (MOVDreg x) 13269 for { 13270 x := v.Args[0] 13271 if x.Op != OpArg { 13272 break 13273 } 13274 t := x.Type 13275 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) { 13276 break 13277 } 13278 v.reset(OpS390XMOVDreg) 13279 v.AddArg(x) 13280 return true 13281 } 13282 // match: (MOVWZreg x:(MOVBZreg _)) 13283 // cond: 13284 // result: (MOVDreg x) 13285 for { 13286 x := v.Args[0] 13287 if x.Op != OpS390XMOVBZreg { 13288 break 13289 } 13290 v.reset(OpS390XMOVDreg) 13291 v.AddArg(x) 13292 return true 13293 } 13294 // match: (MOVWZreg x:(MOVHZreg _)) 13295 // cond: 13296 // result: (MOVDreg x) 13297 for { 13298 x := v.Args[0] 13299 if x.Op != OpS390XMOVHZreg { 13300 break 13301 } 13302 v.reset(OpS390XMOVDreg) 13303 v.AddArg(x) 13304 return true 13305 } 13306 // match: (MOVWZreg x:(MOVWZreg _)) 13307 // cond: 13308 // result: (MOVDreg x) 13309 for { 13310 x := v.Args[0] 13311 if x.Op != OpS390XMOVWZreg { 13312 break 13313 } 13314 v.reset(OpS390XMOVDreg) 13315 v.AddArg(x) 13316 return true 13317 } 13318 // match: (MOVWZreg (MOVDconst [c])) 13319 // cond: 13320 // result: (MOVDconst [int64(uint32(c))]) 13321 for { 13322 v_0 := v.Args[0] 13323 if v_0.Op != OpS390XMOVDconst { 13324 break 13325 } 13326 c := v_0.AuxInt 13327 v.reset(OpS390XMOVDconst) 13328 v.AuxInt = int64(uint32(c)) 13329 return true 13330 } 13331 // match: (MOVWZreg x:(MOVWZload [off] {sym} ptr mem)) 13332 // cond: x.Uses == 1 && clobber(x) 13333 // result: @x.Block (MOVWZload <v.Type> [off] {sym} ptr mem) 13334 for { 13335 x := v.Args[0] 13336 if x.Op != OpS390XMOVWZload { 13337 break 13338 } 13339 off := x.AuxInt 13340 sym := x.Aux 13341 ptr := x.Args[0] 13342 mem := x.Args[1] 13343 if !(x.Uses == 1 && clobber(x)) { 13344 break 13345 } 13346 b = x.Block 13347 v0 := b.NewValue0(v.Pos, OpS390XMOVWZload, v.Type) 13348 v.reset(OpCopy) 13349 v.AddArg(v0) 13350 v0.AuxInt = off 13351 v0.Aux = sym 13352 v0.AddArg(ptr) 13353 v0.AddArg(mem) 13354 return true 13355 } 13356 // match: (MOVWZreg x:(MOVWZloadidx [off] {sym} ptr idx mem)) 13357 // cond: x.Uses == 1 && clobber(x) 13358 // result: @x.Block (MOVWZloadidx <v.Type> [off] {sym} ptr idx mem) 13359 for { 13360 x := v.Args[0] 13361 if x.Op != OpS390XMOVWZloadidx { 13362 break 13363 } 13364 off := x.AuxInt 13365 sym := x.Aux 13366 ptr := x.Args[0] 13367 idx := x.Args[1] 13368 mem := x.Args[2] 13369 if !(x.Uses == 1 && clobber(x)) { 13370 break 13371 } 13372 b = x.Block 13373 v0 := b.NewValue0(v.Pos, OpS390XMOVWZloadidx, v.Type) 13374 v.reset(OpCopy) 13375 v.AddArg(v0) 13376 v0.AuxInt = off 13377 v0.Aux = sym 13378 v0.AddArg(ptr) 13379 v0.AddArg(idx) 13380 v0.AddArg(mem) 13381 return true 13382 } 13383 return false 13384 } 13385 func rewriteValueS390X_OpS390XMOVWload(v *Value, config *Config) bool { 13386 b := v.Block 13387 _ = b 13388 // match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) 13389 // cond: is20Bit(off1+off2) 13390 // result: (MOVWload [off1+off2] {sym} ptr mem) 13391 for { 13392 off1 := v.AuxInt 13393 sym := v.Aux 13394 v_0 := v.Args[0] 13395 if v_0.Op != OpS390XADDconst { 13396 break 13397 } 13398 off2 := v_0.AuxInt 13399 ptr := v_0.Args[0] 13400 mem := v.Args[1] 13401 if !(is20Bit(off1 + off2)) { 13402 break 13403 } 13404 v.reset(OpS390XMOVWload) 13405 v.AuxInt = off1 + off2 13406 v.Aux = sym 13407 v.AddArg(ptr) 13408 v.AddArg(mem) 13409 return true 13410 } 13411 // match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 13412 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13413 // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} base mem) 13414 for { 13415 off1 := v.AuxInt 13416 sym1 := v.Aux 13417 v_0 := v.Args[0] 13418 if v_0.Op != OpS390XMOVDaddr { 13419 break 13420 } 13421 off2 := v_0.AuxInt 13422 sym2 := v_0.Aux 13423 base := v_0.Args[0] 13424 mem := v.Args[1] 13425 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13426 break 13427 } 13428 v.reset(OpS390XMOVWload) 13429 v.AuxInt = off1 + off2 13430 v.Aux = mergeSym(sym1, sym2) 13431 v.AddArg(base) 13432 v.AddArg(mem) 13433 return true 13434 } 13435 return false 13436 } 13437 func rewriteValueS390X_OpS390XMOVWreg(v *Value, config *Config) bool { 13438 b := v.Block 13439 _ = b 13440 // match: (MOVWreg x:(MOVBload _ _)) 13441 // cond: 13442 // result: (MOVDreg x) 13443 for { 13444 x := v.Args[0] 13445 if x.Op != OpS390XMOVBload { 13446 break 13447 } 13448 v.reset(OpS390XMOVDreg) 13449 v.AddArg(x) 13450 return true 13451 } 13452 // match: (MOVWreg x:(MOVBZload _ _)) 13453 // cond: 13454 // result: (MOVDreg x) 13455 for { 13456 x := v.Args[0] 13457 if x.Op != OpS390XMOVBZload { 13458 break 13459 } 13460 v.reset(OpS390XMOVDreg) 13461 v.AddArg(x) 13462 return true 13463 } 13464 // match: (MOVWreg x:(MOVHload _ _)) 13465 // cond: 13466 // result: (MOVDreg x) 13467 for { 13468 x := v.Args[0] 13469 if x.Op != OpS390XMOVHload { 13470 break 13471 } 13472 v.reset(OpS390XMOVDreg) 13473 v.AddArg(x) 13474 return true 13475 } 13476 // match: (MOVWreg x:(MOVHZload _ _)) 13477 // cond: 13478 // result: (MOVDreg x) 13479 for { 13480 x := v.Args[0] 13481 if x.Op != OpS390XMOVHZload { 13482 break 13483 } 13484 v.reset(OpS390XMOVDreg) 13485 v.AddArg(x) 13486 return true 13487 } 13488 // match: (MOVWreg x:(MOVWload _ _)) 13489 // cond: 13490 // result: (MOVDreg x) 13491 for { 13492 x := v.Args[0] 13493 if x.Op != OpS390XMOVWload { 13494 break 13495 } 13496 v.reset(OpS390XMOVDreg) 13497 v.AddArg(x) 13498 return true 13499 } 13500 // match: (MOVWreg x:(Arg <t>)) 13501 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t) 13502 // result: (MOVDreg x) 13503 for { 13504 x := v.Args[0] 13505 if x.Op != OpArg { 13506 break 13507 } 13508 t := x.Type 13509 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) { 13510 break 13511 } 13512 v.reset(OpS390XMOVDreg) 13513 v.AddArg(x) 13514 return true 13515 } 13516 // match: (MOVWreg x:(MOVBreg _)) 13517 // cond: 13518 // result: (MOVDreg x) 13519 for { 13520 x := v.Args[0] 13521 if x.Op != OpS390XMOVBreg { 13522 break 13523 } 13524 v.reset(OpS390XMOVDreg) 13525 v.AddArg(x) 13526 return true 13527 } 13528 // match: (MOVWreg x:(MOVBZreg _)) 13529 // cond: 13530 // result: (MOVDreg x) 13531 for { 13532 x := v.Args[0] 13533 if x.Op != OpS390XMOVBZreg { 13534 break 13535 } 13536 v.reset(OpS390XMOVDreg) 13537 v.AddArg(x) 13538 return true 13539 } 13540 // match: (MOVWreg x:(MOVHreg _)) 13541 // cond: 13542 // result: (MOVDreg x) 13543 for { 13544 x := v.Args[0] 13545 if x.Op != OpS390XMOVHreg { 13546 break 13547 } 13548 v.reset(OpS390XMOVDreg) 13549 v.AddArg(x) 13550 return true 13551 } 13552 // match: (MOVWreg x:(MOVHreg _)) 13553 // cond: 13554 // result: (MOVDreg x) 13555 for { 13556 x := v.Args[0] 13557 if x.Op != OpS390XMOVHreg { 13558 break 13559 } 13560 v.reset(OpS390XMOVDreg) 13561 v.AddArg(x) 13562 return true 13563 } 13564 // match: (MOVWreg x:(MOVWreg _)) 13565 // cond: 13566 // result: (MOVDreg x) 13567 for { 13568 x := v.Args[0] 13569 if x.Op != OpS390XMOVWreg { 13570 break 13571 } 13572 v.reset(OpS390XMOVDreg) 13573 v.AddArg(x) 13574 return true 13575 } 13576 // match: (MOVWreg (MOVDconst [c])) 13577 // cond: 13578 // result: (MOVDconst [int64(int32(c))]) 13579 for { 13580 v_0 := v.Args[0] 13581 if v_0.Op != OpS390XMOVDconst { 13582 break 13583 } 13584 c := v_0.AuxInt 13585 v.reset(OpS390XMOVDconst) 13586 v.AuxInt = int64(int32(c)) 13587 return true 13588 } 13589 // match: (MOVWreg x:(MOVWZload [off] {sym} ptr mem)) 13590 // cond: x.Uses == 1 && clobber(x) 13591 // result: @x.Block (MOVWload <v.Type> [off] {sym} ptr mem) 13592 for { 13593 x := v.Args[0] 13594 if x.Op != OpS390XMOVWZload { 13595 break 13596 } 13597 off := x.AuxInt 13598 sym := x.Aux 13599 ptr := x.Args[0] 13600 mem := x.Args[1] 13601 if !(x.Uses == 1 && clobber(x)) { 13602 break 13603 } 13604 b = x.Block 13605 v0 := b.NewValue0(v.Pos, OpS390XMOVWload, v.Type) 13606 v.reset(OpCopy) 13607 v.AddArg(v0) 13608 v0.AuxInt = off 13609 v0.Aux = sym 13610 v0.AddArg(ptr) 13611 v0.AddArg(mem) 13612 return true 13613 } 13614 return false 13615 } 13616 func rewriteValueS390X_OpS390XMOVWstore(v *Value, config *Config) bool { 13617 b := v.Block 13618 _ = b 13619 // match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem) 13620 // cond: 13621 // result: (MOVWstore [off] {sym} ptr x mem) 13622 for { 13623 off := v.AuxInt 13624 sym := v.Aux 13625 ptr := v.Args[0] 13626 v_1 := v.Args[1] 13627 if v_1.Op != OpS390XMOVWreg { 13628 break 13629 } 13630 x := v_1.Args[0] 13631 mem := v.Args[2] 13632 v.reset(OpS390XMOVWstore) 13633 v.AuxInt = off 13634 v.Aux = sym 13635 v.AddArg(ptr) 13636 v.AddArg(x) 13637 v.AddArg(mem) 13638 return true 13639 } 13640 // match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem) 13641 // cond: 13642 // result: (MOVWstore [off] {sym} ptr x mem) 13643 for { 13644 off := v.AuxInt 13645 sym := v.Aux 13646 ptr := v.Args[0] 13647 v_1 := v.Args[1] 13648 if v_1.Op != OpS390XMOVWZreg { 13649 break 13650 } 13651 x := v_1.Args[0] 13652 mem := v.Args[2] 13653 v.reset(OpS390XMOVWstore) 13654 v.AuxInt = off 13655 v.Aux = sym 13656 v.AddArg(ptr) 13657 v.AddArg(x) 13658 v.AddArg(mem) 13659 return true 13660 } 13661 // match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) 13662 // cond: is20Bit(off1+off2) 13663 // result: (MOVWstore [off1+off2] {sym} ptr val mem) 13664 for { 13665 off1 := v.AuxInt 13666 sym := v.Aux 13667 v_0 := v.Args[0] 13668 if v_0.Op != OpS390XADDconst { 13669 break 13670 } 13671 off2 := v_0.AuxInt 13672 ptr := v_0.Args[0] 13673 val := v.Args[1] 13674 mem := v.Args[2] 13675 if !(is20Bit(off1 + off2)) { 13676 break 13677 } 13678 v.reset(OpS390XMOVWstore) 13679 v.AuxInt = off1 + off2 13680 v.Aux = sym 13681 v.AddArg(ptr) 13682 v.AddArg(val) 13683 v.AddArg(mem) 13684 return true 13685 } 13686 // match: (MOVWstore [off] {sym} ptr (MOVDconst [c]) mem) 13687 // cond: validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB 13688 // result: (MOVWstoreconst [makeValAndOff(int64(int32(c)),off)] {sym} ptr mem) 13689 for { 13690 off := v.AuxInt 13691 sym := v.Aux 13692 ptr := v.Args[0] 13693 v_1 := v.Args[1] 13694 if v_1.Op != OpS390XMOVDconst { 13695 break 13696 } 13697 c := v_1.AuxInt 13698 mem := v.Args[2] 13699 if !(validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB) { 13700 break 13701 } 13702 v.reset(OpS390XMOVWstoreconst) 13703 v.AuxInt = makeValAndOff(int64(int32(c)), off) 13704 v.Aux = sym 13705 v.AddArg(ptr) 13706 v.AddArg(mem) 13707 return true 13708 } 13709 // match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 13710 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13711 // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 13712 for { 13713 off1 := v.AuxInt 13714 sym1 := v.Aux 13715 v_0 := v.Args[0] 13716 if v_0.Op != OpS390XMOVDaddr { 13717 break 13718 } 13719 off2 := v_0.AuxInt 13720 sym2 := v_0.Aux 13721 base := v_0.Args[0] 13722 val := v.Args[1] 13723 mem := v.Args[2] 13724 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13725 break 13726 } 13727 v.reset(OpS390XMOVWstore) 13728 v.AuxInt = off1 + off2 13729 v.Aux = mergeSym(sym1, sym2) 13730 v.AddArg(base) 13731 v.AddArg(val) 13732 v.AddArg(mem) 13733 return true 13734 } 13735 // match: (MOVWstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 13736 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13737 // result: (MOVWstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 13738 for { 13739 off1 := v.AuxInt 13740 sym1 := v.Aux 13741 v_0 := v.Args[0] 13742 if v_0.Op != OpS390XMOVDaddridx { 13743 break 13744 } 13745 off2 := v_0.AuxInt 13746 sym2 := v_0.Aux 13747 ptr := v_0.Args[0] 13748 idx := v_0.Args[1] 13749 val := v.Args[1] 13750 mem := v.Args[2] 13751 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13752 break 13753 } 13754 v.reset(OpS390XMOVWstoreidx) 13755 v.AuxInt = off1 + off2 13756 v.Aux = mergeSym(sym1, sym2) 13757 v.AddArg(ptr) 13758 v.AddArg(idx) 13759 v.AddArg(val) 13760 v.AddArg(mem) 13761 return true 13762 } 13763 // match: (MOVWstore [off] {sym} (ADD ptr idx) val mem) 13764 // cond: ptr.Op != OpSB 13765 // result: (MOVWstoreidx [off] {sym} ptr idx val mem) 13766 for { 13767 off := v.AuxInt 13768 sym := v.Aux 13769 v_0 := v.Args[0] 13770 if v_0.Op != OpS390XADD { 13771 break 13772 } 13773 ptr := v_0.Args[0] 13774 idx := v_0.Args[1] 13775 val := v.Args[1] 13776 mem := v.Args[2] 13777 if !(ptr.Op != OpSB) { 13778 break 13779 } 13780 v.reset(OpS390XMOVWstoreidx) 13781 v.AuxInt = off 13782 v.Aux = sym 13783 v.AddArg(ptr) 13784 v.AddArg(idx) 13785 v.AddArg(val) 13786 v.AddArg(mem) 13787 return true 13788 } 13789 // match: (MOVWstore [i] {s} p (SRDconst [32] w) x:(MOVWstore [i-4] {s} p w mem)) 13790 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13791 // result: (MOVDstore [i-4] {s} p w mem) 13792 for { 13793 i := v.AuxInt 13794 s := v.Aux 13795 p := v.Args[0] 13796 v_1 := v.Args[1] 13797 if v_1.Op != OpS390XSRDconst { 13798 break 13799 } 13800 if v_1.AuxInt != 32 { 13801 break 13802 } 13803 w := v_1.Args[0] 13804 x := v.Args[2] 13805 if x.Op != OpS390XMOVWstore { 13806 break 13807 } 13808 if x.AuxInt != i-4 { 13809 break 13810 } 13811 if x.Aux != s { 13812 break 13813 } 13814 if p != x.Args[0] { 13815 break 13816 } 13817 if w != x.Args[1] { 13818 break 13819 } 13820 mem := x.Args[2] 13821 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13822 break 13823 } 13824 v.reset(OpS390XMOVDstore) 13825 v.AuxInt = i - 4 13826 v.Aux = s 13827 v.AddArg(p) 13828 v.AddArg(w) 13829 v.AddArg(mem) 13830 return true 13831 } 13832 // match: (MOVWstore [i] {s} p w0:(SRDconst [j] w) x:(MOVWstore [i-4] {s} p (SRDconst [j+32] w) mem)) 13833 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13834 // result: (MOVDstore [i-4] {s} p w0 mem) 13835 for { 13836 i := v.AuxInt 13837 s := v.Aux 13838 p := v.Args[0] 13839 w0 := v.Args[1] 13840 if w0.Op != OpS390XSRDconst { 13841 break 13842 } 13843 j := w0.AuxInt 13844 w := w0.Args[0] 13845 x := v.Args[2] 13846 if x.Op != OpS390XMOVWstore { 13847 break 13848 } 13849 if x.AuxInt != i-4 { 13850 break 13851 } 13852 if x.Aux != s { 13853 break 13854 } 13855 if p != x.Args[0] { 13856 break 13857 } 13858 x_1 := x.Args[1] 13859 if x_1.Op != OpS390XSRDconst { 13860 break 13861 } 13862 if x_1.AuxInt != j+32 { 13863 break 13864 } 13865 if w != x_1.Args[0] { 13866 break 13867 } 13868 mem := x.Args[2] 13869 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13870 break 13871 } 13872 v.reset(OpS390XMOVDstore) 13873 v.AuxInt = i - 4 13874 v.Aux = s 13875 v.AddArg(p) 13876 v.AddArg(w0) 13877 v.AddArg(mem) 13878 return true 13879 } 13880 // match: (MOVWstore [i] {s} p w1 x:(MOVWstore [i-4] {s} p w0 mem)) 13881 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x) 13882 // result: (STM2 [i-4] {s} p w0 w1 mem) 13883 for { 13884 i := v.AuxInt 13885 s := v.Aux 13886 p := v.Args[0] 13887 w1 := v.Args[1] 13888 x := v.Args[2] 13889 if x.Op != OpS390XMOVWstore { 13890 break 13891 } 13892 if x.AuxInt != i-4 { 13893 break 13894 } 13895 if x.Aux != s { 13896 break 13897 } 13898 if p != x.Args[0] { 13899 break 13900 } 13901 w0 := x.Args[1] 13902 mem := x.Args[2] 13903 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x)) { 13904 break 13905 } 13906 v.reset(OpS390XSTM2) 13907 v.AuxInt = i - 4 13908 v.Aux = s 13909 v.AddArg(p) 13910 v.AddArg(w0) 13911 v.AddArg(w1) 13912 v.AddArg(mem) 13913 return true 13914 } 13915 // match: (MOVWstore [i] {s} p w2 x:(STM2 [i-8] {s} p w0 w1 mem)) 13916 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 13917 // result: (STM3 [i-8] {s} p w0 w1 w2 mem) 13918 for { 13919 i := v.AuxInt 13920 s := v.Aux 13921 p := v.Args[0] 13922 w2 := v.Args[1] 13923 x := v.Args[2] 13924 if x.Op != OpS390XSTM2 { 13925 break 13926 } 13927 if x.AuxInt != i-8 { 13928 break 13929 } 13930 if x.Aux != s { 13931 break 13932 } 13933 if p != x.Args[0] { 13934 break 13935 } 13936 w0 := x.Args[1] 13937 w1 := x.Args[2] 13938 mem := x.Args[3] 13939 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 13940 break 13941 } 13942 v.reset(OpS390XSTM3) 13943 v.AuxInt = i - 8 13944 v.Aux = s 13945 v.AddArg(p) 13946 v.AddArg(w0) 13947 v.AddArg(w1) 13948 v.AddArg(w2) 13949 v.AddArg(mem) 13950 return true 13951 } 13952 // match: (MOVWstore [i] {s} p w3 x:(STM3 [i-12] {s} p w0 w1 w2 mem)) 13953 // cond: x.Uses == 1 && is20Bit(i-12) && clobber(x) 13954 // result: (STM4 [i-12] {s} p w0 w1 w2 w3 mem) 13955 for { 13956 i := v.AuxInt 13957 s := v.Aux 13958 p := v.Args[0] 13959 w3 := v.Args[1] 13960 x := v.Args[2] 13961 if x.Op != OpS390XSTM3 { 13962 break 13963 } 13964 if x.AuxInt != i-12 { 13965 break 13966 } 13967 if x.Aux != s { 13968 break 13969 } 13970 if p != x.Args[0] { 13971 break 13972 } 13973 w0 := x.Args[1] 13974 w1 := x.Args[2] 13975 w2 := x.Args[3] 13976 mem := x.Args[4] 13977 if !(x.Uses == 1 && is20Bit(i-12) && clobber(x)) { 13978 break 13979 } 13980 v.reset(OpS390XSTM4) 13981 v.AuxInt = i - 12 13982 v.Aux = s 13983 v.AddArg(p) 13984 v.AddArg(w0) 13985 v.AddArg(w1) 13986 v.AddArg(w2) 13987 v.AddArg(w3) 13988 v.AddArg(mem) 13989 return true 13990 } 13991 return false 13992 } 13993 func rewriteValueS390X_OpS390XMOVWstoreconst(v *Value, config *Config) bool { 13994 b := v.Block 13995 _ = b 13996 // match: (MOVWstoreconst [sc] {s} (ADDconst [off] ptr) mem) 13997 // cond: ValAndOff(sc).canAdd(off) 13998 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 13999 for { 14000 sc := v.AuxInt 14001 s := v.Aux 14002 v_0 := v.Args[0] 14003 if v_0.Op != OpS390XADDconst { 14004 break 14005 } 14006 off := v_0.AuxInt 14007 ptr := v_0.Args[0] 14008 mem := v.Args[1] 14009 if !(ValAndOff(sc).canAdd(off)) { 14010 break 14011 } 14012 v.reset(OpS390XMOVWstoreconst) 14013 v.AuxInt = ValAndOff(sc).add(off) 14014 v.Aux = s 14015 v.AddArg(ptr) 14016 v.AddArg(mem) 14017 return true 14018 } 14019 // match: (MOVWstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 14020 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 14021 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 14022 for { 14023 sc := v.AuxInt 14024 sym1 := v.Aux 14025 v_0 := v.Args[0] 14026 if v_0.Op != OpS390XMOVDaddr { 14027 break 14028 } 14029 off := v_0.AuxInt 14030 sym2 := v_0.Aux 14031 ptr := v_0.Args[0] 14032 mem := v.Args[1] 14033 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 14034 break 14035 } 14036 v.reset(OpS390XMOVWstoreconst) 14037 v.AuxInt = ValAndOff(sc).add(off) 14038 v.Aux = mergeSym(sym1, sym2) 14039 v.AddArg(ptr) 14040 v.AddArg(mem) 14041 return true 14042 } 14043 // match: (MOVWstoreconst [c] {s} p x:(MOVWstoreconst [a] {s} p mem)) 14044 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 4 == ValAndOff(c).Off() && clobber(x) 14045 // result: (MOVDstore [ValAndOff(a).Off()] {s} p (MOVDconst [ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32]) mem) 14046 for { 14047 c := v.AuxInt 14048 s := v.Aux 14049 p := v.Args[0] 14050 x := v.Args[1] 14051 if x.Op != OpS390XMOVWstoreconst { 14052 break 14053 } 14054 a := x.AuxInt 14055 if x.Aux != s { 14056 break 14057 } 14058 if p != x.Args[0] { 14059 break 14060 } 14061 mem := x.Args[1] 14062 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) { 14063 break 14064 } 14065 v.reset(OpS390XMOVDstore) 14066 v.AuxInt = ValAndOff(a).Off() 14067 v.Aux = s 14068 v.AddArg(p) 14069 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 14070 v0.AuxInt = ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32 14071 v.AddArg(v0) 14072 v.AddArg(mem) 14073 return true 14074 } 14075 return false 14076 } 14077 func rewriteValueS390X_OpS390XMOVWstoreidx(v *Value, config *Config) bool { 14078 b := v.Block 14079 _ = b 14080 // match: (MOVWstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 14081 // cond: 14082 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 14083 for { 14084 c := v.AuxInt 14085 sym := v.Aux 14086 v_0 := v.Args[0] 14087 if v_0.Op != OpS390XADDconst { 14088 break 14089 } 14090 d := v_0.AuxInt 14091 ptr := v_0.Args[0] 14092 idx := v.Args[1] 14093 val := v.Args[2] 14094 mem := v.Args[3] 14095 v.reset(OpS390XMOVWstoreidx) 14096 v.AuxInt = c + d 14097 v.Aux = sym 14098 v.AddArg(ptr) 14099 v.AddArg(idx) 14100 v.AddArg(val) 14101 v.AddArg(mem) 14102 return true 14103 } 14104 // match: (MOVWstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 14105 // cond: 14106 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 14107 for { 14108 c := v.AuxInt 14109 sym := v.Aux 14110 ptr := v.Args[0] 14111 v_1 := v.Args[1] 14112 if v_1.Op != OpS390XADDconst { 14113 break 14114 } 14115 d := v_1.AuxInt 14116 idx := v_1.Args[0] 14117 val := v.Args[2] 14118 mem := v.Args[3] 14119 v.reset(OpS390XMOVWstoreidx) 14120 v.AuxInt = c + d 14121 v.Aux = sym 14122 v.AddArg(ptr) 14123 v.AddArg(idx) 14124 v.AddArg(val) 14125 v.AddArg(mem) 14126 return true 14127 } 14128 // match: (MOVWstoreidx [i] {s} p idx w x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [32] w) mem)) 14129 // cond: x.Uses == 1 && clobber(x) 14130 // result: (MOVDstoreidx [i-4] {s} p idx w mem) 14131 for { 14132 i := v.AuxInt 14133 s := v.Aux 14134 p := v.Args[0] 14135 idx := v.Args[1] 14136 w := v.Args[2] 14137 x := v.Args[3] 14138 if x.Op != OpS390XMOVWstoreidx { 14139 break 14140 } 14141 if x.AuxInt != i-4 { 14142 break 14143 } 14144 if x.Aux != s { 14145 break 14146 } 14147 if p != x.Args[0] { 14148 break 14149 } 14150 if idx != x.Args[1] { 14151 break 14152 } 14153 x_2 := x.Args[2] 14154 if x_2.Op != OpS390XSRDconst { 14155 break 14156 } 14157 if x_2.AuxInt != 32 { 14158 break 14159 } 14160 if w != x_2.Args[0] { 14161 break 14162 } 14163 mem := x.Args[3] 14164 if !(x.Uses == 1 && clobber(x)) { 14165 break 14166 } 14167 v.reset(OpS390XMOVDstoreidx) 14168 v.AuxInt = i - 4 14169 v.Aux = s 14170 v.AddArg(p) 14171 v.AddArg(idx) 14172 v.AddArg(w) 14173 v.AddArg(mem) 14174 return true 14175 } 14176 // match: (MOVWstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [j+32] w) mem)) 14177 // cond: x.Uses == 1 && clobber(x) 14178 // result: (MOVDstoreidx [i-4] {s} p idx w0 mem) 14179 for { 14180 i := v.AuxInt 14181 s := v.Aux 14182 p := v.Args[0] 14183 idx := v.Args[1] 14184 w0 := v.Args[2] 14185 if w0.Op != OpS390XSRDconst { 14186 break 14187 } 14188 j := w0.AuxInt 14189 w := w0.Args[0] 14190 x := v.Args[3] 14191 if x.Op != OpS390XMOVWstoreidx { 14192 break 14193 } 14194 if x.AuxInt != i-4 { 14195 break 14196 } 14197 if x.Aux != s { 14198 break 14199 } 14200 if p != x.Args[0] { 14201 break 14202 } 14203 if idx != x.Args[1] { 14204 break 14205 } 14206 x_2 := x.Args[2] 14207 if x_2.Op != OpS390XSRDconst { 14208 break 14209 } 14210 if x_2.AuxInt != j+32 { 14211 break 14212 } 14213 if w != x_2.Args[0] { 14214 break 14215 } 14216 mem := x.Args[3] 14217 if !(x.Uses == 1 && clobber(x)) { 14218 break 14219 } 14220 v.reset(OpS390XMOVDstoreidx) 14221 v.AuxInt = i - 4 14222 v.Aux = s 14223 v.AddArg(p) 14224 v.AddArg(idx) 14225 v.AddArg(w0) 14226 v.AddArg(mem) 14227 return true 14228 } 14229 return false 14230 } 14231 func rewriteValueS390X_OpS390XMULLD(v *Value, config *Config) bool { 14232 b := v.Block 14233 _ = b 14234 // match: (MULLD x (MOVDconst [c])) 14235 // cond: is32Bit(c) 14236 // result: (MULLDconst [c] x) 14237 for { 14238 x := v.Args[0] 14239 v_1 := v.Args[1] 14240 if v_1.Op != OpS390XMOVDconst { 14241 break 14242 } 14243 c := v_1.AuxInt 14244 if !(is32Bit(c)) { 14245 break 14246 } 14247 v.reset(OpS390XMULLDconst) 14248 v.AuxInt = c 14249 v.AddArg(x) 14250 return true 14251 } 14252 // match: (MULLD (MOVDconst [c]) x) 14253 // cond: is32Bit(c) 14254 // result: (MULLDconst [c] x) 14255 for { 14256 v_0 := v.Args[0] 14257 if v_0.Op != OpS390XMOVDconst { 14258 break 14259 } 14260 c := v_0.AuxInt 14261 x := v.Args[1] 14262 if !(is32Bit(c)) { 14263 break 14264 } 14265 v.reset(OpS390XMULLDconst) 14266 v.AuxInt = c 14267 v.AddArg(x) 14268 return true 14269 } 14270 // match: (MULLD <t> x g:(MOVDload [off] {sym} ptr mem)) 14271 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14272 // result: (MULLDload <t> [off] {sym} x ptr mem) 14273 for { 14274 t := v.Type 14275 x := v.Args[0] 14276 g := v.Args[1] 14277 if g.Op != OpS390XMOVDload { 14278 break 14279 } 14280 off := g.AuxInt 14281 sym := g.Aux 14282 ptr := g.Args[0] 14283 mem := g.Args[1] 14284 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14285 break 14286 } 14287 v.reset(OpS390XMULLDload) 14288 v.Type = t 14289 v.AuxInt = off 14290 v.Aux = sym 14291 v.AddArg(x) 14292 v.AddArg(ptr) 14293 v.AddArg(mem) 14294 return true 14295 } 14296 // match: (MULLD <t> g:(MOVDload [off] {sym} ptr mem) x) 14297 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14298 // result: (MULLDload <t> [off] {sym} x ptr mem) 14299 for { 14300 t := v.Type 14301 g := v.Args[0] 14302 if g.Op != OpS390XMOVDload { 14303 break 14304 } 14305 off := g.AuxInt 14306 sym := g.Aux 14307 ptr := g.Args[0] 14308 mem := g.Args[1] 14309 x := v.Args[1] 14310 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14311 break 14312 } 14313 v.reset(OpS390XMULLDload) 14314 v.Type = t 14315 v.AuxInt = off 14316 v.Aux = sym 14317 v.AddArg(x) 14318 v.AddArg(ptr) 14319 v.AddArg(mem) 14320 return true 14321 } 14322 return false 14323 } 14324 func rewriteValueS390X_OpS390XMULLDconst(v *Value, config *Config) bool { 14325 b := v.Block 14326 _ = b 14327 // match: (MULLDconst [-1] x) 14328 // cond: 14329 // result: (NEG x) 14330 for { 14331 if v.AuxInt != -1 { 14332 break 14333 } 14334 x := v.Args[0] 14335 v.reset(OpS390XNEG) 14336 v.AddArg(x) 14337 return true 14338 } 14339 // match: (MULLDconst [0] _) 14340 // cond: 14341 // result: (MOVDconst [0]) 14342 for { 14343 if v.AuxInt != 0 { 14344 break 14345 } 14346 v.reset(OpS390XMOVDconst) 14347 v.AuxInt = 0 14348 return true 14349 } 14350 // match: (MULLDconst [1] x) 14351 // cond: 14352 // result: x 14353 for { 14354 if v.AuxInt != 1 { 14355 break 14356 } 14357 x := v.Args[0] 14358 v.reset(OpCopy) 14359 v.Type = x.Type 14360 v.AddArg(x) 14361 return true 14362 } 14363 // match: (MULLDconst [c] x) 14364 // cond: isPowerOfTwo(c) 14365 // result: (SLDconst [log2(c)] x) 14366 for { 14367 c := v.AuxInt 14368 x := v.Args[0] 14369 if !(isPowerOfTwo(c)) { 14370 break 14371 } 14372 v.reset(OpS390XSLDconst) 14373 v.AuxInt = log2(c) 14374 v.AddArg(x) 14375 return true 14376 } 14377 // match: (MULLDconst [c] x) 14378 // cond: isPowerOfTwo(c+1) && c >= 15 14379 // result: (SUB (SLDconst <v.Type> [log2(c+1)] x) x) 14380 for { 14381 c := v.AuxInt 14382 x := v.Args[0] 14383 if !(isPowerOfTwo(c+1) && c >= 15) { 14384 break 14385 } 14386 v.reset(OpS390XSUB) 14387 v0 := b.NewValue0(v.Pos, OpS390XSLDconst, v.Type) 14388 v0.AuxInt = log2(c + 1) 14389 v0.AddArg(x) 14390 v.AddArg(v0) 14391 v.AddArg(x) 14392 return true 14393 } 14394 // match: (MULLDconst [c] x) 14395 // cond: isPowerOfTwo(c-1) && c >= 17 14396 // result: (ADD (SLDconst <v.Type> [log2(c-1)] x) x) 14397 for { 14398 c := v.AuxInt 14399 x := v.Args[0] 14400 if !(isPowerOfTwo(c-1) && c >= 17) { 14401 break 14402 } 14403 v.reset(OpS390XADD) 14404 v0 := b.NewValue0(v.Pos, OpS390XSLDconst, v.Type) 14405 v0.AuxInt = log2(c - 1) 14406 v0.AddArg(x) 14407 v.AddArg(v0) 14408 v.AddArg(x) 14409 return true 14410 } 14411 // match: (MULLDconst [c] (MOVDconst [d])) 14412 // cond: 14413 // result: (MOVDconst [c*d]) 14414 for { 14415 c := v.AuxInt 14416 v_0 := v.Args[0] 14417 if v_0.Op != OpS390XMOVDconst { 14418 break 14419 } 14420 d := v_0.AuxInt 14421 v.reset(OpS390XMOVDconst) 14422 v.AuxInt = c * d 14423 return true 14424 } 14425 return false 14426 } 14427 func rewriteValueS390X_OpS390XMULLW(v *Value, config *Config) bool { 14428 b := v.Block 14429 _ = b 14430 // match: (MULLW x (MOVDconst [c])) 14431 // cond: 14432 // result: (MULLWconst [c] x) 14433 for { 14434 x := v.Args[0] 14435 v_1 := v.Args[1] 14436 if v_1.Op != OpS390XMOVDconst { 14437 break 14438 } 14439 c := v_1.AuxInt 14440 v.reset(OpS390XMULLWconst) 14441 v.AuxInt = c 14442 v.AddArg(x) 14443 return true 14444 } 14445 // match: (MULLW (MOVDconst [c]) x) 14446 // cond: 14447 // result: (MULLWconst [c] x) 14448 for { 14449 v_0 := v.Args[0] 14450 if v_0.Op != OpS390XMOVDconst { 14451 break 14452 } 14453 c := v_0.AuxInt 14454 x := v.Args[1] 14455 v.reset(OpS390XMULLWconst) 14456 v.AuxInt = c 14457 v.AddArg(x) 14458 return true 14459 } 14460 // match: (MULLW <t> x g:(MOVWload [off] {sym} ptr mem)) 14461 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14462 // result: (MULLWload <t> [off] {sym} x ptr mem) 14463 for { 14464 t := v.Type 14465 x := v.Args[0] 14466 g := v.Args[1] 14467 if g.Op != OpS390XMOVWload { 14468 break 14469 } 14470 off := g.AuxInt 14471 sym := g.Aux 14472 ptr := g.Args[0] 14473 mem := g.Args[1] 14474 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14475 break 14476 } 14477 v.reset(OpS390XMULLWload) 14478 v.Type = t 14479 v.AuxInt = off 14480 v.Aux = sym 14481 v.AddArg(x) 14482 v.AddArg(ptr) 14483 v.AddArg(mem) 14484 return true 14485 } 14486 // match: (MULLW <t> g:(MOVWload [off] {sym} ptr mem) x) 14487 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14488 // result: (MULLWload <t> [off] {sym} x ptr mem) 14489 for { 14490 t := v.Type 14491 g := v.Args[0] 14492 if g.Op != OpS390XMOVWload { 14493 break 14494 } 14495 off := g.AuxInt 14496 sym := g.Aux 14497 ptr := g.Args[0] 14498 mem := g.Args[1] 14499 x := v.Args[1] 14500 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14501 break 14502 } 14503 v.reset(OpS390XMULLWload) 14504 v.Type = t 14505 v.AuxInt = off 14506 v.Aux = sym 14507 v.AddArg(x) 14508 v.AddArg(ptr) 14509 v.AddArg(mem) 14510 return true 14511 } 14512 // match: (MULLW <t> x g:(MOVWZload [off] {sym} ptr mem)) 14513 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14514 // result: (MULLWload <t> [off] {sym} x ptr mem) 14515 for { 14516 t := v.Type 14517 x := v.Args[0] 14518 g := v.Args[1] 14519 if g.Op != OpS390XMOVWZload { 14520 break 14521 } 14522 off := g.AuxInt 14523 sym := g.Aux 14524 ptr := g.Args[0] 14525 mem := g.Args[1] 14526 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14527 break 14528 } 14529 v.reset(OpS390XMULLWload) 14530 v.Type = t 14531 v.AuxInt = off 14532 v.Aux = sym 14533 v.AddArg(x) 14534 v.AddArg(ptr) 14535 v.AddArg(mem) 14536 return true 14537 } 14538 // match: (MULLW <t> g:(MOVWZload [off] {sym} ptr mem) x) 14539 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14540 // result: (MULLWload <t> [off] {sym} x ptr mem) 14541 for { 14542 t := v.Type 14543 g := v.Args[0] 14544 if g.Op != OpS390XMOVWZload { 14545 break 14546 } 14547 off := g.AuxInt 14548 sym := g.Aux 14549 ptr := g.Args[0] 14550 mem := g.Args[1] 14551 x := v.Args[1] 14552 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14553 break 14554 } 14555 v.reset(OpS390XMULLWload) 14556 v.Type = t 14557 v.AuxInt = off 14558 v.Aux = sym 14559 v.AddArg(x) 14560 v.AddArg(ptr) 14561 v.AddArg(mem) 14562 return true 14563 } 14564 return false 14565 } 14566 func rewriteValueS390X_OpS390XMULLWconst(v *Value, config *Config) bool { 14567 b := v.Block 14568 _ = b 14569 // match: (MULLWconst [-1] x) 14570 // cond: 14571 // result: (NEGW x) 14572 for { 14573 if v.AuxInt != -1 { 14574 break 14575 } 14576 x := v.Args[0] 14577 v.reset(OpS390XNEGW) 14578 v.AddArg(x) 14579 return true 14580 } 14581 // match: (MULLWconst [0] _) 14582 // cond: 14583 // result: (MOVDconst [0]) 14584 for { 14585 if v.AuxInt != 0 { 14586 break 14587 } 14588 v.reset(OpS390XMOVDconst) 14589 v.AuxInt = 0 14590 return true 14591 } 14592 // match: (MULLWconst [1] x) 14593 // cond: 14594 // result: x 14595 for { 14596 if v.AuxInt != 1 { 14597 break 14598 } 14599 x := v.Args[0] 14600 v.reset(OpCopy) 14601 v.Type = x.Type 14602 v.AddArg(x) 14603 return true 14604 } 14605 // match: (MULLWconst [c] x) 14606 // cond: isPowerOfTwo(c) 14607 // result: (SLWconst [log2(c)] x) 14608 for { 14609 c := v.AuxInt 14610 x := v.Args[0] 14611 if !(isPowerOfTwo(c)) { 14612 break 14613 } 14614 v.reset(OpS390XSLWconst) 14615 v.AuxInt = log2(c) 14616 v.AddArg(x) 14617 return true 14618 } 14619 // match: (MULLWconst [c] x) 14620 // cond: isPowerOfTwo(c+1) && c >= 15 14621 // result: (SUBW (SLWconst <v.Type> [log2(c+1)] x) x) 14622 for { 14623 c := v.AuxInt 14624 x := v.Args[0] 14625 if !(isPowerOfTwo(c+1) && c >= 15) { 14626 break 14627 } 14628 v.reset(OpS390XSUBW) 14629 v0 := b.NewValue0(v.Pos, OpS390XSLWconst, v.Type) 14630 v0.AuxInt = log2(c + 1) 14631 v0.AddArg(x) 14632 v.AddArg(v0) 14633 v.AddArg(x) 14634 return true 14635 } 14636 // match: (MULLWconst [c] x) 14637 // cond: isPowerOfTwo(c-1) && c >= 17 14638 // result: (ADDW (SLWconst <v.Type> [log2(c-1)] x) x) 14639 for { 14640 c := v.AuxInt 14641 x := v.Args[0] 14642 if !(isPowerOfTwo(c-1) && c >= 17) { 14643 break 14644 } 14645 v.reset(OpS390XADDW) 14646 v0 := b.NewValue0(v.Pos, OpS390XSLWconst, v.Type) 14647 v0.AuxInt = log2(c - 1) 14648 v0.AddArg(x) 14649 v.AddArg(v0) 14650 v.AddArg(x) 14651 return true 14652 } 14653 // match: (MULLWconst [c] (MOVDconst [d])) 14654 // cond: 14655 // result: (MOVDconst [int64(int32(c*d))]) 14656 for { 14657 c := v.AuxInt 14658 v_0 := v.Args[0] 14659 if v_0.Op != OpS390XMOVDconst { 14660 break 14661 } 14662 d := v_0.AuxInt 14663 v.reset(OpS390XMOVDconst) 14664 v.AuxInt = int64(int32(c * d)) 14665 return true 14666 } 14667 return false 14668 } 14669 func rewriteValueS390X_OpS390XNEG(v *Value, config *Config) bool { 14670 b := v.Block 14671 _ = b 14672 // match: (NEG (MOVDconst [c])) 14673 // cond: 14674 // result: (MOVDconst [-c]) 14675 for { 14676 v_0 := v.Args[0] 14677 if v_0.Op != OpS390XMOVDconst { 14678 break 14679 } 14680 c := v_0.AuxInt 14681 v.reset(OpS390XMOVDconst) 14682 v.AuxInt = -c 14683 return true 14684 } 14685 return false 14686 } 14687 func rewriteValueS390X_OpS390XNEGW(v *Value, config *Config) bool { 14688 b := v.Block 14689 _ = b 14690 // match: (NEGW (MOVDconst [c])) 14691 // cond: 14692 // result: (MOVDconst [int64(int32(-c))]) 14693 for { 14694 v_0 := v.Args[0] 14695 if v_0.Op != OpS390XMOVDconst { 14696 break 14697 } 14698 c := v_0.AuxInt 14699 v.reset(OpS390XMOVDconst) 14700 v.AuxInt = int64(int32(-c)) 14701 return true 14702 } 14703 return false 14704 } 14705 func rewriteValueS390X_OpS390XNOT(v *Value, config *Config) bool { 14706 b := v.Block 14707 _ = b 14708 // match: (NOT x) 14709 // cond: true 14710 // result: (XOR (MOVDconst [-1]) x) 14711 for { 14712 x := v.Args[0] 14713 if !(true) { 14714 break 14715 } 14716 v.reset(OpS390XXOR) 14717 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 14718 v0.AuxInt = -1 14719 v.AddArg(v0) 14720 v.AddArg(x) 14721 return true 14722 } 14723 return false 14724 } 14725 func rewriteValueS390X_OpS390XNOTW(v *Value, config *Config) bool { 14726 b := v.Block 14727 _ = b 14728 // match: (NOTW x) 14729 // cond: true 14730 // result: (XORWconst [-1] x) 14731 for { 14732 x := v.Args[0] 14733 if !(true) { 14734 break 14735 } 14736 v.reset(OpS390XXORWconst) 14737 v.AuxInt = -1 14738 v.AddArg(x) 14739 return true 14740 } 14741 return false 14742 } 14743 func rewriteValueS390X_OpS390XOR(v *Value, config *Config) bool { 14744 b := v.Block 14745 _ = b 14746 // match: (OR x (MOVDconst [c])) 14747 // cond: isU32Bit(c) 14748 // result: (ORconst [c] x) 14749 for { 14750 x := v.Args[0] 14751 v_1 := v.Args[1] 14752 if v_1.Op != OpS390XMOVDconst { 14753 break 14754 } 14755 c := v_1.AuxInt 14756 if !(isU32Bit(c)) { 14757 break 14758 } 14759 v.reset(OpS390XORconst) 14760 v.AuxInt = c 14761 v.AddArg(x) 14762 return true 14763 } 14764 // match: (OR (MOVDconst [c]) x) 14765 // cond: isU32Bit(c) 14766 // result: (ORconst [c] x) 14767 for { 14768 v_0 := v.Args[0] 14769 if v_0.Op != OpS390XMOVDconst { 14770 break 14771 } 14772 c := v_0.AuxInt 14773 x := v.Args[1] 14774 if !(isU32Bit(c)) { 14775 break 14776 } 14777 v.reset(OpS390XORconst) 14778 v.AuxInt = c 14779 v.AddArg(x) 14780 return true 14781 } 14782 // match: ( OR (SLDconst x [c]) (SRDconst x [64-c])) 14783 // cond: 14784 // result: (RLLGconst [ c] x) 14785 for { 14786 v_0 := v.Args[0] 14787 if v_0.Op != OpS390XSLDconst { 14788 break 14789 } 14790 c := v_0.AuxInt 14791 x := v_0.Args[0] 14792 v_1 := v.Args[1] 14793 if v_1.Op != OpS390XSRDconst { 14794 break 14795 } 14796 if v_1.AuxInt != 64-c { 14797 break 14798 } 14799 if x != v_1.Args[0] { 14800 break 14801 } 14802 v.reset(OpS390XRLLGconst) 14803 v.AuxInt = c 14804 v.AddArg(x) 14805 return true 14806 } 14807 // match: ( OR (SRDconst x [c]) (SLDconst x [64-c])) 14808 // cond: 14809 // result: (RLLGconst [64-c] x) 14810 for { 14811 v_0 := v.Args[0] 14812 if v_0.Op != OpS390XSRDconst { 14813 break 14814 } 14815 c := v_0.AuxInt 14816 x := v_0.Args[0] 14817 v_1 := v.Args[1] 14818 if v_1.Op != OpS390XSLDconst { 14819 break 14820 } 14821 if v_1.AuxInt != 64-c { 14822 break 14823 } 14824 if x != v_1.Args[0] { 14825 break 14826 } 14827 v.reset(OpS390XRLLGconst) 14828 v.AuxInt = 64 - c 14829 v.AddArg(x) 14830 return true 14831 } 14832 // match: (OR (MOVDconst [c]) (MOVDconst [d])) 14833 // cond: 14834 // result: (MOVDconst [c|d]) 14835 for { 14836 v_0 := v.Args[0] 14837 if v_0.Op != OpS390XMOVDconst { 14838 break 14839 } 14840 c := v_0.AuxInt 14841 v_1 := v.Args[1] 14842 if v_1.Op != OpS390XMOVDconst { 14843 break 14844 } 14845 d := v_1.AuxInt 14846 v.reset(OpS390XMOVDconst) 14847 v.AuxInt = c | d 14848 return true 14849 } 14850 // match: (OR x x) 14851 // cond: 14852 // result: x 14853 for { 14854 x := v.Args[0] 14855 if x != v.Args[1] { 14856 break 14857 } 14858 v.reset(OpCopy) 14859 v.Type = x.Type 14860 v.AddArg(x) 14861 return true 14862 } 14863 // match: (OR <t> x g:(MOVDload [off] {sym} ptr mem)) 14864 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14865 // result: (ORload <t> [off] {sym} x ptr mem) 14866 for { 14867 t := v.Type 14868 x := v.Args[0] 14869 g := v.Args[1] 14870 if g.Op != OpS390XMOVDload { 14871 break 14872 } 14873 off := g.AuxInt 14874 sym := g.Aux 14875 ptr := g.Args[0] 14876 mem := g.Args[1] 14877 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14878 break 14879 } 14880 v.reset(OpS390XORload) 14881 v.Type = t 14882 v.AuxInt = off 14883 v.Aux = sym 14884 v.AddArg(x) 14885 v.AddArg(ptr) 14886 v.AddArg(mem) 14887 return true 14888 } 14889 // match: (OR <t> g:(MOVDload [off] {sym} ptr mem) x) 14890 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14891 // result: (ORload <t> [off] {sym} x ptr mem) 14892 for { 14893 t := v.Type 14894 g := v.Args[0] 14895 if g.Op != OpS390XMOVDload { 14896 break 14897 } 14898 off := g.AuxInt 14899 sym := g.Aux 14900 ptr := g.Args[0] 14901 mem := g.Args[1] 14902 x := v.Args[1] 14903 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14904 break 14905 } 14906 v.reset(OpS390XORload) 14907 v.Type = t 14908 v.AuxInt = off 14909 v.Aux = sym 14910 v.AddArg(x) 14911 v.AddArg(ptr) 14912 v.AddArg(mem) 14913 return true 14914 } 14915 // match: (OR x:(SLDconst _) y) 14916 // cond: y.Op != OpS390XSLDconst 14917 // result: (OR y x) 14918 for { 14919 x := v.Args[0] 14920 if x.Op != OpS390XSLDconst { 14921 break 14922 } 14923 y := v.Args[1] 14924 if !(y.Op != OpS390XSLDconst) { 14925 break 14926 } 14927 v.reset(OpS390XOR) 14928 v.AddArg(y) 14929 v.AddArg(x) 14930 return true 14931 } 14932 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i+1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i+2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i+3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i+4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i+5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i+6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i+7] {s} p mem))) 14933 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14934 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRload [i] {s} p mem) 14935 for { 14936 o0 := v.Args[0] 14937 if o0.Op != OpS390XOR { 14938 break 14939 } 14940 o1 := o0.Args[0] 14941 if o1.Op != OpS390XOR { 14942 break 14943 } 14944 o2 := o1.Args[0] 14945 if o2.Op != OpS390XOR { 14946 break 14947 } 14948 o3 := o2.Args[0] 14949 if o3.Op != OpS390XOR { 14950 break 14951 } 14952 o4 := o3.Args[0] 14953 if o4.Op != OpS390XOR { 14954 break 14955 } 14956 o5 := o4.Args[0] 14957 if o5.Op != OpS390XOR { 14958 break 14959 } 14960 x0 := o5.Args[0] 14961 if x0.Op != OpS390XMOVBZload { 14962 break 14963 } 14964 i := x0.AuxInt 14965 s := x0.Aux 14966 p := x0.Args[0] 14967 mem := x0.Args[1] 14968 s0 := o5.Args[1] 14969 if s0.Op != OpS390XSLDconst { 14970 break 14971 } 14972 if s0.AuxInt != 8 { 14973 break 14974 } 14975 x1 := s0.Args[0] 14976 if x1.Op != OpS390XMOVBZload { 14977 break 14978 } 14979 if x1.AuxInt != i+1 { 14980 break 14981 } 14982 if x1.Aux != s { 14983 break 14984 } 14985 if p != x1.Args[0] { 14986 break 14987 } 14988 if mem != x1.Args[1] { 14989 break 14990 } 14991 s1 := o4.Args[1] 14992 if s1.Op != OpS390XSLDconst { 14993 break 14994 } 14995 if s1.AuxInt != 16 { 14996 break 14997 } 14998 x2 := s1.Args[0] 14999 if x2.Op != OpS390XMOVBZload { 15000 break 15001 } 15002 if x2.AuxInt != i+2 { 15003 break 15004 } 15005 if x2.Aux != s { 15006 break 15007 } 15008 if p != x2.Args[0] { 15009 break 15010 } 15011 if mem != x2.Args[1] { 15012 break 15013 } 15014 s2 := o3.Args[1] 15015 if s2.Op != OpS390XSLDconst { 15016 break 15017 } 15018 if s2.AuxInt != 24 { 15019 break 15020 } 15021 x3 := s2.Args[0] 15022 if x3.Op != OpS390XMOVBZload { 15023 break 15024 } 15025 if x3.AuxInt != i+3 { 15026 break 15027 } 15028 if x3.Aux != s { 15029 break 15030 } 15031 if p != x3.Args[0] { 15032 break 15033 } 15034 if mem != x3.Args[1] { 15035 break 15036 } 15037 s3 := o2.Args[1] 15038 if s3.Op != OpS390XSLDconst { 15039 break 15040 } 15041 if s3.AuxInt != 32 { 15042 break 15043 } 15044 x4 := s3.Args[0] 15045 if x4.Op != OpS390XMOVBZload { 15046 break 15047 } 15048 if x4.AuxInt != i+4 { 15049 break 15050 } 15051 if x4.Aux != s { 15052 break 15053 } 15054 if p != x4.Args[0] { 15055 break 15056 } 15057 if mem != x4.Args[1] { 15058 break 15059 } 15060 s4 := o1.Args[1] 15061 if s4.Op != OpS390XSLDconst { 15062 break 15063 } 15064 if s4.AuxInt != 40 { 15065 break 15066 } 15067 x5 := s4.Args[0] 15068 if x5.Op != OpS390XMOVBZload { 15069 break 15070 } 15071 if x5.AuxInt != i+5 { 15072 break 15073 } 15074 if x5.Aux != s { 15075 break 15076 } 15077 if p != x5.Args[0] { 15078 break 15079 } 15080 if mem != x5.Args[1] { 15081 break 15082 } 15083 s5 := o0.Args[1] 15084 if s5.Op != OpS390XSLDconst { 15085 break 15086 } 15087 if s5.AuxInt != 48 { 15088 break 15089 } 15090 x6 := s5.Args[0] 15091 if x6.Op != OpS390XMOVBZload { 15092 break 15093 } 15094 if x6.AuxInt != i+6 { 15095 break 15096 } 15097 if x6.Aux != s { 15098 break 15099 } 15100 if p != x6.Args[0] { 15101 break 15102 } 15103 if mem != x6.Args[1] { 15104 break 15105 } 15106 s6 := v.Args[1] 15107 if s6.Op != OpS390XSLDconst { 15108 break 15109 } 15110 if s6.AuxInt != 56 { 15111 break 15112 } 15113 x7 := s6.Args[0] 15114 if x7.Op != OpS390XMOVBZload { 15115 break 15116 } 15117 if x7.AuxInt != i+7 { 15118 break 15119 } 15120 if x7.Aux != s { 15121 break 15122 } 15123 if p != x7.Args[0] { 15124 break 15125 } 15126 if mem != x7.Args[1] { 15127 break 15128 } 15129 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 15130 break 15131 } 15132 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 15133 v0 := b.NewValue0(v.Pos, OpS390XMOVDBRload, config.fe.TypeUInt64()) 15134 v.reset(OpCopy) 15135 v.AddArg(v0) 15136 v0.AuxInt = i 15137 v0.Aux = s 15138 v0.AddArg(p) 15139 v0.AddArg(mem) 15140 return true 15141 } 15142 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i+2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i+3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i+4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i+5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i+6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i+7] {s} p idx mem))) 15143 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 15144 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRloadidx <v.Type> [i] {s} p idx mem) 15145 for { 15146 o0 := v.Args[0] 15147 if o0.Op != OpS390XOR { 15148 break 15149 } 15150 o1 := o0.Args[0] 15151 if o1.Op != OpS390XOR { 15152 break 15153 } 15154 o2 := o1.Args[0] 15155 if o2.Op != OpS390XOR { 15156 break 15157 } 15158 o3 := o2.Args[0] 15159 if o3.Op != OpS390XOR { 15160 break 15161 } 15162 o4 := o3.Args[0] 15163 if o4.Op != OpS390XOR { 15164 break 15165 } 15166 o5 := o4.Args[0] 15167 if o5.Op != OpS390XOR { 15168 break 15169 } 15170 x0 := o5.Args[0] 15171 if x0.Op != OpS390XMOVBZloadidx { 15172 break 15173 } 15174 i := x0.AuxInt 15175 s := x0.Aux 15176 p := x0.Args[0] 15177 idx := x0.Args[1] 15178 mem := x0.Args[2] 15179 s0 := o5.Args[1] 15180 if s0.Op != OpS390XSLDconst { 15181 break 15182 } 15183 if s0.AuxInt != 8 { 15184 break 15185 } 15186 x1 := s0.Args[0] 15187 if x1.Op != OpS390XMOVBZloadidx { 15188 break 15189 } 15190 if x1.AuxInt != i+1 { 15191 break 15192 } 15193 if x1.Aux != s { 15194 break 15195 } 15196 if p != x1.Args[0] { 15197 break 15198 } 15199 if idx != x1.Args[1] { 15200 break 15201 } 15202 if mem != x1.Args[2] { 15203 break 15204 } 15205 s1 := o4.Args[1] 15206 if s1.Op != OpS390XSLDconst { 15207 break 15208 } 15209 if s1.AuxInt != 16 { 15210 break 15211 } 15212 x2 := s1.Args[0] 15213 if x2.Op != OpS390XMOVBZloadidx { 15214 break 15215 } 15216 if x2.AuxInt != i+2 { 15217 break 15218 } 15219 if x2.Aux != s { 15220 break 15221 } 15222 if p != x2.Args[0] { 15223 break 15224 } 15225 if idx != x2.Args[1] { 15226 break 15227 } 15228 if mem != x2.Args[2] { 15229 break 15230 } 15231 s2 := o3.Args[1] 15232 if s2.Op != OpS390XSLDconst { 15233 break 15234 } 15235 if s2.AuxInt != 24 { 15236 break 15237 } 15238 x3 := s2.Args[0] 15239 if x3.Op != OpS390XMOVBZloadidx { 15240 break 15241 } 15242 if x3.AuxInt != i+3 { 15243 break 15244 } 15245 if x3.Aux != s { 15246 break 15247 } 15248 if p != x3.Args[0] { 15249 break 15250 } 15251 if idx != x3.Args[1] { 15252 break 15253 } 15254 if mem != x3.Args[2] { 15255 break 15256 } 15257 s3 := o2.Args[1] 15258 if s3.Op != OpS390XSLDconst { 15259 break 15260 } 15261 if s3.AuxInt != 32 { 15262 break 15263 } 15264 x4 := s3.Args[0] 15265 if x4.Op != OpS390XMOVBZloadidx { 15266 break 15267 } 15268 if x4.AuxInt != i+4 { 15269 break 15270 } 15271 if x4.Aux != s { 15272 break 15273 } 15274 if p != x4.Args[0] { 15275 break 15276 } 15277 if idx != x4.Args[1] { 15278 break 15279 } 15280 if mem != x4.Args[2] { 15281 break 15282 } 15283 s4 := o1.Args[1] 15284 if s4.Op != OpS390XSLDconst { 15285 break 15286 } 15287 if s4.AuxInt != 40 { 15288 break 15289 } 15290 x5 := s4.Args[0] 15291 if x5.Op != OpS390XMOVBZloadidx { 15292 break 15293 } 15294 if x5.AuxInt != i+5 { 15295 break 15296 } 15297 if x5.Aux != s { 15298 break 15299 } 15300 if p != x5.Args[0] { 15301 break 15302 } 15303 if idx != x5.Args[1] { 15304 break 15305 } 15306 if mem != x5.Args[2] { 15307 break 15308 } 15309 s5 := o0.Args[1] 15310 if s5.Op != OpS390XSLDconst { 15311 break 15312 } 15313 if s5.AuxInt != 48 { 15314 break 15315 } 15316 x6 := s5.Args[0] 15317 if x6.Op != OpS390XMOVBZloadidx { 15318 break 15319 } 15320 if x6.AuxInt != i+6 { 15321 break 15322 } 15323 if x6.Aux != s { 15324 break 15325 } 15326 if p != x6.Args[0] { 15327 break 15328 } 15329 if idx != x6.Args[1] { 15330 break 15331 } 15332 if mem != x6.Args[2] { 15333 break 15334 } 15335 s6 := v.Args[1] 15336 if s6.Op != OpS390XSLDconst { 15337 break 15338 } 15339 if s6.AuxInt != 56 { 15340 break 15341 } 15342 x7 := s6.Args[0] 15343 if x7.Op != OpS390XMOVBZloadidx { 15344 break 15345 } 15346 if x7.AuxInt != i+7 { 15347 break 15348 } 15349 if x7.Aux != s { 15350 break 15351 } 15352 if p != x7.Args[0] { 15353 break 15354 } 15355 if idx != x7.Args[1] { 15356 break 15357 } 15358 if mem != x7.Args[2] { 15359 break 15360 } 15361 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 15362 break 15363 } 15364 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 15365 v0 := b.NewValue0(v.Pos, OpS390XMOVDBRloadidx, v.Type) 15366 v.reset(OpCopy) 15367 v.AddArg(v0) 15368 v0.AuxInt = i 15369 v0.Aux = s 15370 v0.AddArg(p) 15371 v0.AddArg(idx) 15372 v0.AddArg(mem) 15373 return true 15374 } 15375 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i-2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i-3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i-4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i-5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i-6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i-7] {s} p mem))) 15376 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 15377 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload [i-7] {s} p mem) 15378 for { 15379 o0 := v.Args[0] 15380 if o0.Op != OpS390XOR { 15381 break 15382 } 15383 o1 := o0.Args[0] 15384 if o1.Op != OpS390XOR { 15385 break 15386 } 15387 o2 := o1.Args[0] 15388 if o2.Op != OpS390XOR { 15389 break 15390 } 15391 o3 := o2.Args[0] 15392 if o3.Op != OpS390XOR { 15393 break 15394 } 15395 o4 := o3.Args[0] 15396 if o4.Op != OpS390XOR { 15397 break 15398 } 15399 o5 := o4.Args[0] 15400 if o5.Op != OpS390XOR { 15401 break 15402 } 15403 x0 := o5.Args[0] 15404 if x0.Op != OpS390XMOVBZload { 15405 break 15406 } 15407 i := x0.AuxInt 15408 s := x0.Aux 15409 p := x0.Args[0] 15410 mem := x0.Args[1] 15411 s0 := o5.Args[1] 15412 if s0.Op != OpS390XSLDconst { 15413 break 15414 } 15415 if s0.AuxInt != 8 { 15416 break 15417 } 15418 x1 := s0.Args[0] 15419 if x1.Op != OpS390XMOVBZload { 15420 break 15421 } 15422 if x1.AuxInt != i-1 { 15423 break 15424 } 15425 if x1.Aux != s { 15426 break 15427 } 15428 if p != x1.Args[0] { 15429 break 15430 } 15431 if mem != x1.Args[1] { 15432 break 15433 } 15434 s1 := o4.Args[1] 15435 if s1.Op != OpS390XSLDconst { 15436 break 15437 } 15438 if s1.AuxInt != 16 { 15439 break 15440 } 15441 x2 := s1.Args[0] 15442 if x2.Op != OpS390XMOVBZload { 15443 break 15444 } 15445 if x2.AuxInt != i-2 { 15446 break 15447 } 15448 if x2.Aux != s { 15449 break 15450 } 15451 if p != x2.Args[0] { 15452 break 15453 } 15454 if mem != x2.Args[1] { 15455 break 15456 } 15457 s2 := o3.Args[1] 15458 if s2.Op != OpS390XSLDconst { 15459 break 15460 } 15461 if s2.AuxInt != 24 { 15462 break 15463 } 15464 x3 := s2.Args[0] 15465 if x3.Op != OpS390XMOVBZload { 15466 break 15467 } 15468 if x3.AuxInt != i-3 { 15469 break 15470 } 15471 if x3.Aux != s { 15472 break 15473 } 15474 if p != x3.Args[0] { 15475 break 15476 } 15477 if mem != x3.Args[1] { 15478 break 15479 } 15480 s3 := o2.Args[1] 15481 if s3.Op != OpS390XSLDconst { 15482 break 15483 } 15484 if s3.AuxInt != 32 { 15485 break 15486 } 15487 x4 := s3.Args[0] 15488 if x4.Op != OpS390XMOVBZload { 15489 break 15490 } 15491 if x4.AuxInt != i-4 { 15492 break 15493 } 15494 if x4.Aux != s { 15495 break 15496 } 15497 if p != x4.Args[0] { 15498 break 15499 } 15500 if mem != x4.Args[1] { 15501 break 15502 } 15503 s4 := o1.Args[1] 15504 if s4.Op != OpS390XSLDconst { 15505 break 15506 } 15507 if s4.AuxInt != 40 { 15508 break 15509 } 15510 x5 := s4.Args[0] 15511 if x5.Op != OpS390XMOVBZload { 15512 break 15513 } 15514 if x5.AuxInt != i-5 { 15515 break 15516 } 15517 if x5.Aux != s { 15518 break 15519 } 15520 if p != x5.Args[0] { 15521 break 15522 } 15523 if mem != x5.Args[1] { 15524 break 15525 } 15526 s5 := o0.Args[1] 15527 if s5.Op != OpS390XSLDconst { 15528 break 15529 } 15530 if s5.AuxInt != 48 { 15531 break 15532 } 15533 x6 := s5.Args[0] 15534 if x6.Op != OpS390XMOVBZload { 15535 break 15536 } 15537 if x6.AuxInt != i-6 { 15538 break 15539 } 15540 if x6.Aux != s { 15541 break 15542 } 15543 if p != x6.Args[0] { 15544 break 15545 } 15546 if mem != x6.Args[1] { 15547 break 15548 } 15549 s6 := v.Args[1] 15550 if s6.Op != OpS390XSLDconst { 15551 break 15552 } 15553 if s6.AuxInt != 56 { 15554 break 15555 } 15556 x7 := s6.Args[0] 15557 if x7.Op != OpS390XMOVBZload { 15558 break 15559 } 15560 if x7.AuxInt != i-7 { 15561 break 15562 } 15563 if x7.Aux != s { 15564 break 15565 } 15566 if p != x7.Args[0] { 15567 break 15568 } 15569 if mem != x7.Args[1] { 15570 break 15571 } 15572 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 15573 break 15574 } 15575 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 15576 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 15577 v.reset(OpCopy) 15578 v.AddArg(v0) 15579 v0.AuxInt = i - 7 15580 v0.Aux = s 15581 v0.AddArg(p) 15582 v0.AddArg(mem) 15583 return true 15584 } 15585 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i-2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i-3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i-4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i-5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i-6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i-7] {s} p idx mem))) 15586 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 15587 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDloadidx <v.Type> [i-7] {s} p idx mem) 15588 for { 15589 o0 := v.Args[0] 15590 if o0.Op != OpS390XOR { 15591 break 15592 } 15593 o1 := o0.Args[0] 15594 if o1.Op != OpS390XOR { 15595 break 15596 } 15597 o2 := o1.Args[0] 15598 if o2.Op != OpS390XOR { 15599 break 15600 } 15601 o3 := o2.Args[0] 15602 if o3.Op != OpS390XOR { 15603 break 15604 } 15605 o4 := o3.Args[0] 15606 if o4.Op != OpS390XOR { 15607 break 15608 } 15609 o5 := o4.Args[0] 15610 if o5.Op != OpS390XOR { 15611 break 15612 } 15613 x0 := o5.Args[0] 15614 if x0.Op != OpS390XMOVBZloadidx { 15615 break 15616 } 15617 i := x0.AuxInt 15618 s := x0.Aux 15619 p := x0.Args[0] 15620 idx := x0.Args[1] 15621 mem := x0.Args[2] 15622 s0 := o5.Args[1] 15623 if s0.Op != OpS390XSLDconst { 15624 break 15625 } 15626 if s0.AuxInt != 8 { 15627 break 15628 } 15629 x1 := s0.Args[0] 15630 if x1.Op != OpS390XMOVBZloadidx { 15631 break 15632 } 15633 if x1.AuxInt != i-1 { 15634 break 15635 } 15636 if x1.Aux != s { 15637 break 15638 } 15639 if p != x1.Args[0] { 15640 break 15641 } 15642 if idx != x1.Args[1] { 15643 break 15644 } 15645 if mem != x1.Args[2] { 15646 break 15647 } 15648 s1 := o4.Args[1] 15649 if s1.Op != OpS390XSLDconst { 15650 break 15651 } 15652 if s1.AuxInt != 16 { 15653 break 15654 } 15655 x2 := s1.Args[0] 15656 if x2.Op != OpS390XMOVBZloadidx { 15657 break 15658 } 15659 if x2.AuxInt != i-2 { 15660 break 15661 } 15662 if x2.Aux != s { 15663 break 15664 } 15665 if p != x2.Args[0] { 15666 break 15667 } 15668 if idx != x2.Args[1] { 15669 break 15670 } 15671 if mem != x2.Args[2] { 15672 break 15673 } 15674 s2 := o3.Args[1] 15675 if s2.Op != OpS390XSLDconst { 15676 break 15677 } 15678 if s2.AuxInt != 24 { 15679 break 15680 } 15681 x3 := s2.Args[0] 15682 if x3.Op != OpS390XMOVBZloadidx { 15683 break 15684 } 15685 if x3.AuxInt != i-3 { 15686 break 15687 } 15688 if x3.Aux != s { 15689 break 15690 } 15691 if p != x3.Args[0] { 15692 break 15693 } 15694 if idx != x3.Args[1] { 15695 break 15696 } 15697 if mem != x3.Args[2] { 15698 break 15699 } 15700 s3 := o2.Args[1] 15701 if s3.Op != OpS390XSLDconst { 15702 break 15703 } 15704 if s3.AuxInt != 32 { 15705 break 15706 } 15707 x4 := s3.Args[0] 15708 if x4.Op != OpS390XMOVBZloadidx { 15709 break 15710 } 15711 if x4.AuxInt != i-4 { 15712 break 15713 } 15714 if x4.Aux != s { 15715 break 15716 } 15717 if p != x4.Args[0] { 15718 break 15719 } 15720 if idx != x4.Args[1] { 15721 break 15722 } 15723 if mem != x4.Args[2] { 15724 break 15725 } 15726 s4 := o1.Args[1] 15727 if s4.Op != OpS390XSLDconst { 15728 break 15729 } 15730 if s4.AuxInt != 40 { 15731 break 15732 } 15733 x5 := s4.Args[0] 15734 if x5.Op != OpS390XMOVBZloadidx { 15735 break 15736 } 15737 if x5.AuxInt != i-5 { 15738 break 15739 } 15740 if x5.Aux != s { 15741 break 15742 } 15743 if p != x5.Args[0] { 15744 break 15745 } 15746 if idx != x5.Args[1] { 15747 break 15748 } 15749 if mem != x5.Args[2] { 15750 break 15751 } 15752 s5 := o0.Args[1] 15753 if s5.Op != OpS390XSLDconst { 15754 break 15755 } 15756 if s5.AuxInt != 48 { 15757 break 15758 } 15759 x6 := s5.Args[0] 15760 if x6.Op != OpS390XMOVBZloadidx { 15761 break 15762 } 15763 if x6.AuxInt != i-6 { 15764 break 15765 } 15766 if x6.Aux != s { 15767 break 15768 } 15769 if p != x6.Args[0] { 15770 break 15771 } 15772 if idx != x6.Args[1] { 15773 break 15774 } 15775 if mem != x6.Args[2] { 15776 break 15777 } 15778 s6 := v.Args[1] 15779 if s6.Op != OpS390XSLDconst { 15780 break 15781 } 15782 if s6.AuxInt != 56 { 15783 break 15784 } 15785 x7 := s6.Args[0] 15786 if x7.Op != OpS390XMOVBZloadidx { 15787 break 15788 } 15789 if x7.AuxInt != i-7 { 15790 break 15791 } 15792 if x7.Aux != s { 15793 break 15794 } 15795 if p != x7.Args[0] { 15796 break 15797 } 15798 if idx != x7.Args[1] { 15799 break 15800 } 15801 if mem != x7.Args[2] { 15802 break 15803 } 15804 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 15805 break 15806 } 15807 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 15808 v0 := b.NewValue0(v.Pos, OpS390XMOVDloadidx, v.Type) 15809 v.reset(OpCopy) 15810 v.AddArg(v0) 15811 v0.AuxInt = i - 7 15812 v0.Aux = s 15813 v0.AddArg(p) 15814 v0.AddArg(idx) 15815 v0.AddArg(mem) 15816 return true 15817 } 15818 return false 15819 } 15820 func rewriteValueS390X_OpS390XORW(v *Value, config *Config) bool { 15821 b := v.Block 15822 _ = b 15823 // match: (ORW x (MOVDconst [c])) 15824 // cond: 15825 // result: (ORWconst [c] x) 15826 for { 15827 x := v.Args[0] 15828 v_1 := v.Args[1] 15829 if v_1.Op != OpS390XMOVDconst { 15830 break 15831 } 15832 c := v_1.AuxInt 15833 v.reset(OpS390XORWconst) 15834 v.AuxInt = c 15835 v.AddArg(x) 15836 return true 15837 } 15838 // match: (ORW (MOVDconst [c]) x) 15839 // cond: 15840 // result: (ORWconst [c] x) 15841 for { 15842 v_0 := v.Args[0] 15843 if v_0.Op != OpS390XMOVDconst { 15844 break 15845 } 15846 c := v_0.AuxInt 15847 x := v.Args[1] 15848 v.reset(OpS390XORWconst) 15849 v.AuxInt = c 15850 v.AddArg(x) 15851 return true 15852 } 15853 // match: ( ORW (SLWconst x [c]) (SRWconst x [32-c])) 15854 // cond: 15855 // result: (RLLconst [ c] x) 15856 for { 15857 v_0 := v.Args[0] 15858 if v_0.Op != OpS390XSLWconst { 15859 break 15860 } 15861 c := v_0.AuxInt 15862 x := v_0.Args[0] 15863 v_1 := v.Args[1] 15864 if v_1.Op != OpS390XSRWconst { 15865 break 15866 } 15867 if v_1.AuxInt != 32-c { 15868 break 15869 } 15870 if x != v_1.Args[0] { 15871 break 15872 } 15873 v.reset(OpS390XRLLconst) 15874 v.AuxInt = c 15875 v.AddArg(x) 15876 return true 15877 } 15878 // match: ( ORW (SRWconst x [c]) (SLWconst x [32-c])) 15879 // cond: 15880 // result: (RLLconst [32-c] x) 15881 for { 15882 v_0 := v.Args[0] 15883 if v_0.Op != OpS390XSRWconst { 15884 break 15885 } 15886 c := v_0.AuxInt 15887 x := v_0.Args[0] 15888 v_1 := v.Args[1] 15889 if v_1.Op != OpS390XSLWconst { 15890 break 15891 } 15892 if v_1.AuxInt != 32-c { 15893 break 15894 } 15895 if x != v_1.Args[0] { 15896 break 15897 } 15898 v.reset(OpS390XRLLconst) 15899 v.AuxInt = 32 - c 15900 v.AddArg(x) 15901 return true 15902 } 15903 // match: (ORW x x) 15904 // cond: 15905 // result: x 15906 for { 15907 x := v.Args[0] 15908 if x != v.Args[1] { 15909 break 15910 } 15911 v.reset(OpCopy) 15912 v.Type = x.Type 15913 v.AddArg(x) 15914 return true 15915 } 15916 // match: (ORW <t> x g:(MOVWload [off] {sym} ptr mem)) 15917 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15918 // result: (ORWload <t> [off] {sym} x ptr mem) 15919 for { 15920 t := v.Type 15921 x := v.Args[0] 15922 g := v.Args[1] 15923 if g.Op != OpS390XMOVWload { 15924 break 15925 } 15926 off := g.AuxInt 15927 sym := g.Aux 15928 ptr := g.Args[0] 15929 mem := g.Args[1] 15930 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15931 break 15932 } 15933 v.reset(OpS390XORWload) 15934 v.Type = t 15935 v.AuxInt = off 15936 v.Aux = sym 15937 v.AddArg(x) 15938 v.AddArg(ptr) 15939 v.AddArg(mem) 15940 return true 15941 } 15942 // match: (ORW <t> g:(MOVWload [off] {sym} ptr mem) x) 15943 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15944 // result: (ORWload <t> [off] {sym} x ptr mem) 15945 for { 15946 t := v.Type 15947 g := v.Args[0] 15948 if g.Op != OpS390XMOVWload { 15949 break 15950 } 15951 off := g.AuxInt 15952 sym := g.Aux 15953 ptr := g.Args[0] 15954 mem := g.Args[1] 15955 x := v.Args[1] 15956 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15957 break 15958 } 15959 v.reset(OpS390XORWload) 15960 v.Type = t 15961 v.AuxInt = off 15962 v.Aux = sym 15963 v.AddArg(x) 15964 v.AddArg(ptr) 15965 v.AddArg(mem) 15966 return true 15967 } 15968 // match: (ORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 15969 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15970 // result: (ORWload <t> [off] {sym} x ptr mem) 15971 for { 15972 t := v.Type 15973 x := v.Args[0] 15974 g := v.Args[1] 15975 if g.Op != OpS390XMOVWZload { 15976 break 15977 } 15978 off := g.AuxInt 15979 sym := g.Aux 15980 ptr := g.Args[0] 15981 mem := g.Args[1] 15982 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15983 break 15984 } 15985 v.reset(OpS390XORWload) 15986 v.Type = t 15987 v.AuxInt = off 15988 v.Aux = sym 15989 v.AddArg(x) 15990 v.AddArg(ptr) 15991 v.AddArg(mem) 15992 return true 15993 } 15994 // match: (ORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 15995 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15996 // result: (ORWload <t> [off] {sym} x ptr mem) 15997 for { 15998 t := v.Type 15999 g := v.Args[0] 16000 if g.Op != OpS390XMOVWZload { 16001 break 16002 } 16003 off := g.AuxInt 16004 sym := g.Aux 16005 ptr := g.Args[0] 16006 mem := g.Args[1] 16007 x := v.Args[1] 16008 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16009 break 16010 } 16011 v.reset(OpS390XORWload) 16012 v.Type = t 16013 v.AuxInt = off 16014 v.Aux = sym 16015 v.AddArg(x) 16016 v.AddArg(ptr) 16017 v.AddArg(mem) 16018 return true 16019 } 16020 // match: (ORW x:(SLWconst _) y) 16021 // cond: y.Op != OpS390XSLWconst 16022 // result: (ORW y x) 16023 for { 16024 x := v.Args[0] 16025 if x.Op != OpS390XSLWconst { 16026 break 16027 } 16028 y := v.Args[1] 16029 if !(y.Op != OpS390XSLWconst) { 16030 break 16031 } 16032 v.reset(OpS390XORW) 16033 v.AddArg(y) 16034 v.AddArg(x) 16035 return true 16036 } 16037 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i+1] {s} p mem))) 16038 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 16039 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRload [i] {s} p mem)) 16040 for { 16041 x0 := v.Args[0] 16042 if x0.Op != OpS390XMOVBZload { 16043 break 16044 } 16045 i := x0.AuxInt 16046 s := x0.Aux 16047 p := x0.Args[0] 16048 mem := x0.Args[1] 16049 s0 := v.Args[1] 16050 if s0.Op != OpS390XSLWconst { 16051 break 16052 } 16053 if s0.AuxInt != 8 { 16054 break 16055 } 16056 x1 := s0.Args[0] 16057 if x1.Op != OpS390XMOVBZload { 16058 break 16059 } 16060 if x1.AuxInt != i+1 { 16061 break 16062 } 16063 if x1.Aux != s { 16064 break 16065 } 16066 if p != x1.Args[0] { 16067 break 16068 } 16069 if mem != x1.Args[1] { 16070 break 16071 } 16072 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 16073 break 16074 } 16075 b = mergePoint(b, x0, x1) 16076 v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 16077 v.reset(OpCopy) 16078 v.AddArg(v0) 16079 v1 := b.NewValue0(v.Pos, OpS390XMOVHBRload, config.fe.TypeUInt16()) 16080 v1.AuxInt = i 16081 v1.Aux = s 16082 v1.AddArg(p) 16083 v1.AddArg(mem) 16084 v0.AddArg(v1) 16085 return true 16086 } 16087 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRload [i] {s} p mem)) s0:(SLWconst [16] x1:(MOVBZload [i+2] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i+3] {s} p mem))) 16088 // cond: p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 16089 // result: @mergePoint(b,x0,x1,x2) (MOVWBRload [i] {s} p mem) 16090 for { 16091 o0 := v.Args[0] 16092 if o0.Op != OpS390XORW { 16093 break 16094 } 16095 z0 := o0.Args[0] 16096 if z0.Op != OpS390XMOVHZreg { 16097 break 16098 } 16099 x0 := z0.Args[0] 16100 if x0.Op != OpS390XMOVHBRload { 16101 break 16102 } 16103 i := x0.AuxInt 16104 s := x0.Aux 16105 p := x0.Args[0] 16106 mem := x0.Args[1] 16107 s0 := o0.Args[1] 16108 if s0.Op != OpS390XSLWconst { 16109 break 16110 } 16111 if s0.AuxInt != 16 { 16112 break 16113 } 16114 x1 := s0.Args[0] 16115 if x1.Op != OpS390XMOVBZload { 16116 break 16117 } 16118 if x1.AuxInt != i+2 { 16119 break 16120 } 16121 if x1.Aux != s { 16122 break 16123 } 16124 if p != x1.Args[0] { 16125 break 16126 } 16127 if mem != x1.Args[1] { 16128 break 16129 } 16130 s1 := v.Args[1] 16131 if s1.Op != OpS390XSLWconst { 16132 break 16133 } 16134 if s1.AuxInt != 24 { 16135 break 16136 } 16137 x2 := s1.Args[0] 16138 if x2.Op != OpS390XMOVBZload { 16139 break 16140 } 16141 if x2.AuxInt != i+3 { 16142 break 16143 } 16144 if x2.Aux != s { 16145 break 16146 } 16147 if p != x2.Args[0] { 16148 break 16149 } 16150 if mem != x2.Args[1] { 16151 break 16152 } 16153 if !(p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 16154 break 16155 } 16156 b = mergePoint(b, x0, x1, x2) 16157 v0 := b.NewValue0(v.Pos, OpS390XMOVWBRload, config.fe.TypeUInt32()) 16158 v.reset(OpCopy) 16159 v.AddArg(v0) 16160 v0.AuxInt = i 16161 v0.Aux = s 16162 v0.AddArg(p) 16163 v0.AddArg(mem) 16164 return true 16165 } 16166 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) 16167 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 16168 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRloadidx <v.Type> [i] {s} p idx mem)) 16169 for { 16170 x0 := v.Args[0] 16171 if x0.Op != OpS390XMOVBZloadidx { 16172 break 16173 } 16174 i := x0.AuxInt 16175 s := x0.Aux 16176 p := x0.Args[0] 16177 idx := x0.Args[1] 16178 mem := x0.Args[2] 16179 s0 := v.Args[1] 16180 if s0.Op != OpS390XSLWconst { 16181 break 16182 } 16183 if s0.AuxInt != 8 { 16184 break 16185 } 16186 x1 := s0.Args[0] 16187 if x1.Op != OpS390XMOVBZloadidx { 16188 break 16189 } 16190 if x1.AuxInt != i+1 { 16191 break 16192 } 16193 if x1.Aux != s { 16194 break 16195 } 16196 if p != x1.Args[0] { 16197 break 16198 } 16199 if idx != x1.Args[1] { 16200 break 16201 } 16202 if mem != x1.Args[2] { 16203 break 16204 } 16205 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 16206 break 16207 } 16208 b = mergePoint(b, x0, x1) 16209 v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 16210 v.reset(OpCopy) 16211 v.AddArg(v0) 16212 v1 := b.NewValue0(v.Pos, OpS390XMOVHBRloadidx, v.Type) 16213 v1.AuxInt = i 16214 v1.Aux = s 16215 v1.AddArg(p) 16216 v1.AddArg(idx) 16217 v1.AddArg(mem) 16218 v0.AddArg(v1) 16219 return true 16220 } 16221 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRloadidx [i] {s} p idx mem)) s0:(SLWconst [16] x1:(MOVBZloadidx [i+2] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i+3] {s} p idx mem))) 16222 // cond: z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 16223 // result: @mergePoint(b,x0,x1,x2) (MOVWZreg (MOVWBRloadidx <v.Type> [i] {s} p idx mem)) 16224 for { 16225 o0 := v.Args[0] 16226 if o0.Op != OpS390XORW { 16227 break 16228 } 16229 z0 := o0.Args[0] 16230 if z0.Op != OpS390XMOVHZreg { 16231 break 16232 } 16233 x0 := z0.Args[0] 16234 if x0.Op != OpS390XMOVHBRloadidx { 16235 break 16236 } 16237 i := x0.AuxInt 16238 s := x0.Aux 16239 p := x0.Args[0] 16240 idx := x0.Args[1] 16241 mem := x0.Args[2] 16242 s0 := o0.Args[1] 16243 if s0.Op != OpS390XSLWconst { 16244 break 16245 } 16246 if s0.AuxInt != 16 { 16247 break 16248 } 16249 x1 := s0.Args[0] 16250 if x1.Op != OpS390XMOVBZloadidx { 16251 break 16252 } 16253 if x1.AuxInt != i+2 { 16254 break 16255 } 16256 if x1.Aux != s { 16257 break 16258 } 16259 if p != x1.Args[0] { 16260 break 16261 } 16262 if idx != x1.Args[1] { 16263 break 16264 } 16265 if mem != x1.Args[2] { 16266 break 16267 } 16268 s1 := v.Args[1] 16269 if s1.Op != OpS390XSLWconst { 16270 break 16271 } 16272 if s1.AuxInt != 24 { 16273 break 16274 } 16275 x2 := s1.Args[0] 16276 if x2.Op != OpS390XMOVBZloadidx { 16277 break 16278 } 16279 if x2.AuxInt != i+3 { 16280 break 16281 } 16282 if x2.Aux != s { 16283 break 16284 } 16285 if p != x2.Args[0] { 16286 break 16287 } 16288 if idx != x2.Args[1] { 16289 break 16290 } 16291 if mem != x2.Args[2] { 16292 break 16293 } 16294 if !(z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 16295 break 16296 } 16297 b = mergePoint(b, x0, x1, x2) 16298 v0 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 16299 v.reset(OpCopy) 16300 v.AddArg(v0) 16301 v1 := b.NewValue0(v.Pos, OpS390XMOVWBRloadidx, v.Type) 16302 v1.AuxInt = i 16303 v1.Aux = s 16304 v1.AddArg(p) 16305 v1.AddArg(idx) 16306 v1.AddArg(mem) 16307 v0.AddArg(v1) 16308 return true 16309 } 16310 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i-1] {s} p mem))) 16311 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 16312 // result: @mergePoint(b,x0,x1) (MOVHZload [i-1] {s} p mem) 16313 for { 16314 x0 := v.Args[0] 16315 if x0.Op != OpS390XMOVBZload { 16316 break 16317 } 16318 i := x0.AuxInt 16319 s := x0.Aux 16320 p := x0.Args[0] 16321 mem := x0.Args[1] 16322 s0 := v.Args[1] 16323 if s0.Op != OpS390XSLWconst { 16324 break 16325 } 16326 if s0.AuxInt != 8 { 16327 break 16328 } 16329 x1 := s0.Args[0] 16330 if x1.Op != OpS390XMOVBZload { 16331 break 16332 } 16333 if x1.AuxInt != i-1 { 16334 break 16335 } 16336 if x1.Aux != s { 16337 break 16338 } 16339 if p != x1.Args[0] { 16340 break 16341 } 16342 if mem != x1.Args[1] { 16343 break 16344 } 16345 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 16346 break 16347 } 16348 b = mergePoint(b, x0, x1) 16349 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 16350 v.reset(OpCopy) 16351 v.AddArg(v0) 16352 v0.AuxInt = i - 1 16353 v0.Aux = s 16354 v0.AddArg(p) 16355 v0.AddArg(mem) 16356 return true 16357 } 16358 // match: (ORW o0:(ORW x0:(MOVHZload [i] {s} p mem) s0:(SLWconst [16] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i-2] {s} p mem))) 16359 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 16360 // result: @mergePoint(b,x0,x1,x2) (MOVWZload [i-2] {s} p mem) 16361 for { 16362 o0 := v.Args[0] 16363 if o0.Op != OpS390XORW { 16364 break 16365 } 16366 x0 := o0.Args[0] 16367 if x0.Op != OpS390XMOVHZload { 16368 break 16369 } 16370 i := x0.AuxInt 16371 s := x0.Aux 16372 p := x0.Args[0] 16373 mem := x0.Args[1] 16374 s0 := o0.Args[1] 16375 if s0.Op != OpS390XSLWconst { 16376 break 16377 } 16378 if s0.AuxInt != 16 { 16379 break 16380 } 16381 x1 := s0.Args[0] 16382 if x1.Op != OpS390XMOVBZload { 16383 break 16384 } 16385 if x1.AuxInt != i-1 { 16386 break 16387 } 16388 if x1.Aux != s { 16389 break 16390 } 16391 if p != x1.Args[0] { 16392 break 16393 } 16394 if mem != x1.Args[1] { 16395 break 16396 } 16397 s1 := v.Args[1] 16398 if s1.Op != OpS390XSLWconst { 16399 break 16400 } 16401 if s1.AuxInt != 24 { 16402 break 16403 } 16404 x2 := s1.Args[0] 16405 if x2.Op != OpS390XMOVBZload { 16406 break 16407 } 16408 if x2.AuxInt != i-2 { 16409 break 16410 } 16411 if x2.Aux != s { 16412 break 16413 } 16414 if p != x2.Args[0] { 16415 break 16416 } 16417 if mem != x2.Args[1] { 16418 break 16419 } 16420 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 16421 break 16422 } 16423 b = mergePoint(b, x0, x1, x2) 16424 v0 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 16425 v.reset(OpCopy) 16426 v.AddArg(v0) 16427 v0.AuxInt = i - 2 16428 v0.Aux = s 16429 v0.AddArg(p) 16430 v0.AddArg(mem) 16431 return true 16432 } 16433 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) 16434 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 16435 // result: @mergePoint(b,x0,x1) (MOVHZloadidx <v.Type> [i-1] {s} p idx mem) 16436 for { 16437 x0 := v.Args[0] 16438 if x0.Op != OpS390XMOVBZloadidx { 16439 break 16440 } 16441 i := x0.AuxInt 16442 s := x0.Aux 16443 p := x0.Args[0] 16444 idx := x0.Args[1] 16445 mem := x0.Args[2] 16446 s0 := v.Args[1] 16447 if s0.Op != OpS390XSLWconst { 16448 break 16449 } 16450 if s0.AuxInt != 8 { 16451 break 16452 } 16453 x1 := s0.Args[0] 16454 if x1.Op != OpS390XMOVBZloadidx { 16455 break 16456 } 16457 if x1.AuxInt != i-1 { 16458 break 16459 } 16460 if x1.Aux != s { 16461 break 16462 } 16463 if p != x1.Args[0] { 16464 break 16465 } 16466 if idx != x1.Args[1] { 16467 break 16468 } 16469 if mem != x1.Args[2] { 16470 break 16471 } 16472 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 16473 break 16474 } 16475 b = mergePoint(b, x0, x1) 16476 v0 := b.NewValue0(v.Pos, OpS390XMOVHZloadidx, v.Type) 16477 v.reset(OpCopy) 16478 v.AddArg(v0) 16479 v0.AuxInt = i - 1 16480 v0.Aux = s 16481 v0.AddArg(p) 16482 v0.AddArg(idx) 16483 v0.AddArg(mem) 16484 return true 16485 } 16486 // match: (ORW o0:(ORW x0:(MOVHZloadidx [i] {s} p idx mem) s0:(SLWconst [16] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i-2] {s} p idx mem))) 16487 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 16488 // result: @mergePoint(b,x0,x1,x2) (MOVWZloadidx <v.Type> [i-2] {s} p idx mem) 16489 for { 16490 o0 := v.Args[0] 16491 if o0.Op != OpS390XORW { 16492 break 16493 } 16494 x0 := o0.Args[0] 16495 if x0.Op != OpS390XMOVHZloadidx { 16496 break 16497 } 16498 i := x0.AuxInt 16499 s := x0.Aux 16500 p := x0.Args[0] 16501 idx := x0.Args[1] 16502 mem := x0.Args[2] 16503 s0 := o0.Args[1] 16504 if s0.Op != OpS390XSLWconst { 16505 break 16506 } 16507 if s0.AuxInt != 16 { 16508 break 16509 } 16510 x1 := s0.Args[0] 16511 if x1.Op != OpS390XMOVBZloadidx { 16512 break 16513 } 16514 if x1.AuxInt != i-1 { 16515 break 16516 } 16517 if x1.Aux != s { 16518 break 16519 } 16520 if p != x1.Args[0] { 16521 break 16522 } 16523 if idx != x1.Args[1] { 16524 break 16525 } 16526 if mem != x1.Args[2] { 16527 break 16528 } 16529 s1 := v.Args[1] 16530 if s1.Op != OpS390XSLWconst { 16531 break 16532 } 16533 if s1.AuxInt != 24 { 16534 break 16535 } 16536 x2 := s1.Args[0] 16537 if x2.Op != OpS390XMOVBZloadidx { 16538 break 16539 } 16540 if x2.AuxInt != i-2 { 16541 break 16542 } 16543 if x2.Aux != s { 16544 break 16545 } 16546 if p != x2.Args[0] { 16547 break 16548 } 16549 if idx != x2.Args[1] { 16550 break 16551 } 16552 if mem != x2.Args[2] { 16553 break 16554 } 16555 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 16556 break 16557 } 16558 b = mergePoint(b, x0, x1, x2) 16559 v0 := b.NewValue0(v.Pos, OpS390XMOVWZloadidx, v.Type) 16560 v.reset(OpCopy) 16561 v.AddArg(v0) 16562 v0.AuxInt = i - 2 16563 v0.Aux = s 16564 v0.AddArg(p) 16565 v0.AddArg(idx) 16566 v0.AddArg(mem) 16567 return true 16568 } 16569 return false 16570 } 16571 func rewriteValueS390X_OpS390XORWconst(v *Value, config *Config) bool { 16572 b := v.Block 16573 _ = b 16574 // match: (ORWconst [c] x) 16575 // cond: int32(c)==0 16576 // result: x 16577 for { 16578 c := v.AuxInt 16579 x := v.Args[0] 16580 if !(int32(c) == 0) { 16581 break 16582 } 16583 v.reset(OpCopy) 16584 v.Type = x.Type 16585 v.AddArg(x) 16586 return true 16587 } 16588 // match: (ORWconst [c] _) 16589 // cond: int32(c)==-1 16590 // result: (MOVDconst [-1]) 16591 for { 16592 c := v.AuxInt 16593 if !(int32(c) == -1) { 16594 break 16595 } 16596 v.reset(OpS390XMOVDconst) 16597 v.AuxInt = -1 16598 return true 16599 } 16600 // match: (ORWconst [c] (MOVDconst [d])) 16601 // cond: 16602 // result: (MOVDconst [c|d]) 16603 for { 16604 c := v.AuxInt 16605 v_0 := v.Args[0] 16606 if v_0.Op != OpS390XMOVDconst { 16607 break 16608 } 16609 d := v_0.AuxInt 16610 v.reset(OpS390XMOVDconst) 16611 v.AuxInt = c | d 16612 return true 16613 } 16614 return false 16615 } 16616 func rewriteValueS390X_OpS390XORconst(v *Value, config *Config) bool { 16617 b := v.Block 16618 _ = b 16619 // match: (ORconst [0] x) 16620 // cond: 16621 // result: x 16622 for { 16623 if v.AuxInt != 0 { 16624 break 16625 } 16626 x := v.Args[0] 16627 v.reset(OpCopy) 16628 v.Type = x.Type 16629 v.AddArg(x) 16630 return true 16631 } 16632 // match: (ORconst [-1] _) 16633 // cond: 16634 // result: (MOVDconst [-1]) 16635 for { 16636 if v.AuxInt != -1 { 16637 break 16638 } 16639 v.reset(OpS390XMOVDconst) 16640 v.AuxInt = -1 16641 return true 16642 } 16643 // match: (ORconst [c] (MOVDconst [d])) 16644 // cond: 16645 // result: (MOVDconst [c|d]) 16646 for { 16647 c := v.AuxInt 16648 v_0 := v.Args[0] 16649 if v_0.Op != OpS390XMOVDconst { 16650 break 16651 } 16652 d := v_0.AuxInt 16653 v.reset(OpS390XMOVDconst) 16654 v.AuxInt = c | d 16655 return true 16656 } 16657 return false 16658 } 16659 func rewriteValueS390X_OpS390XSLD(v *Value, config *Config) bool { 16660 b := v.Block 16661 _ = b 16662 // match: (SLD x (MOVDconst [c])) 16663 // cond: 16664 // result: (SLDconst [c&63] x) 16665 for { 16666 x := v.Args[0] 16667 v_1 := v.Args[1] 16668 if v_1.Op != OpS390XMOVDconst { 16669 break 16670 } 16671 c := v_1.AuxInt 16672 v.reset(OpS390XSLDconst) 16673 v.AuxInt = c & 63 16674 v.AddArg(x) 16675 return true 16676 } 16677 // match: (SLD x (ANDconst [63] y)) 16678 // cond: 16679 // result: (SLD x y) 16680 for { 16681 x := v.Args[0] 16682 v_1 := v.Args[1] 16683 if v_1.Op != OpS390XANDconst { 16684 break 16685 } 16686 if v_1.AuxInt != 63 { 16687 break 16688 } 16689 y := v_1.Args[0] 16690 v.reset(OpS390XSLD) 16691 v.AddArg(x) 16692 v.AddArg(y) 16693 return true 16694 } 16695 return false 16696 } 16697 func rewriteValueS390X_OpS390XSLW(v *Value, config *Config) bool { 16698 b := v.Block 16699 _ = b 16700 // match: (SLW x (MOVDconst [c])) 16701 // cond: 16702 // result: (SLWconst [c&63] x) 16703 for { 16704 x := v.Args[0] 16705 v_1 := v.Args[1] 16706 if v_1.Op != OpS390XMOVDconst { 16707 break 16708 } 16709 c := v_1.AuxInt 16710 v.reset(OpS390XSLWconst) 16711 v.AuxInt = c & 63 16712 v.AddArg(x) 16713 return true 16714 } 16715 // match: (SLW x (ANDWconst [63] y)) 16716 // cond: 16717 // result: (SLW x y) 16718 for { 16719 x := v.Args[0] 16720 v_1 := v.Args[1] 16721 if v_1.Op != OpS390XANDWconst { 16722 break 16723 } 16724 if v_1.AuxInt != 63 { 16725 break 16726 } 16727 y := v_1.Args[0] 16728 v.reset(OpS390XSLW) 16729 v.AddArg(x) 16730 v.AddArg(y) 16731 return true 16732 } 16733 return false 16734 } 16735 func rewriteValueS390X_OpS390XSRAD(v *Value, config *Config) bool { 16736 b := v.Block 16737 _ = b 16738 // match: (SRAD x (MOVDconst [c])) 16739 // cond: 16740 // result: (SRADconst [c&63] x) 16741 for { 16742 x := v.Args[0] 16743 v_1 := v.Args[1] 16744 if v_1.Op != OpS390XMOVDconst { 16745 break 16746 } 16747 c := v_1.AuxInt 16748 v.reset(OpS390XSRADconst) 16749 v.AuxInt = c & 63 16750 v.AddArg(x) 16751 return true 16752 } 16753 // match: (SRAD x (ANDconst [63] y)) 16754 // cond: 16755 // result: (SRAD x y) 16756 for { 16757 x := v.Args[0] 16758 v_1 := v.Args[1] 16759 if v_1.Op != OpS390XANDconst { 16760 break 16761 } 16762 if v_1.AuxInt != 63 { 16763 break 16764 } 16765 y := v_1.Args[0] 16766 v.reset(OpS390XSRAD) 16767 v.AddArg(x) 16768 v.AddArg(y) 16769 return true 16770 } 16771 return false 16772 } 16773 func rewriteValueS390X_OpS390XSRADconst(v *Value, config *Config) bool { 16774 b := v.Block 16775 _ = b 16776 // match: (SRADconst [c] (MOVDconst [d])) 16777 // cond: 16778 // result: (MOVDconst [d>>uint64(c)]) 16779 for { 16780 c := v.AuxInt 16781 v_0 := v.Args[0] 16782 if v_0.Op != OpS390XMOVDconst { 16783 break 16784 } 16785 d := v_0.AuxInt 16786 v.reset(OpS390XMOVDconst) 16787 v.AuxInt = d >> uint64(c) 16788 return true 16789 } 16790 return false 16791 } 16792 func rewriteValueS390X_OpS390XSRAW(v *Value, config *Config) bool { 16793 b := v.Block 16794 _ = b 16795 // match: (SRAW x (MOVDconst [c])) 16796 // cond: 16797 // result: (SRAWconst [c&63] x) 16798 for { 16799 x := v.Args[0] 16800 v_1 := v.Args[1] 16801 if v_1.Op != OpS390XMOVDconst { 16802 break 16803 } 16804 c := v_1.AuxInt 16805 v.reset(OpS390XSRAWconst) 16806 v.AuxInt = c & 63 16807 v.AddArg(x) 16808 return true 16809 } 16810 // match: (SRAW x (ANDWconst [63] y)) 16811 // cond: 16812 // result: (SRAW x y) 16813 for { 16814 x := v.Args[0] 16815 v_1 := v.Args[1] 16816 if v_1.Op != OpS390XANDWconst { 16817 break 16818 } 16819 if v_1.AuxInt != 63 { 16820 break 16821 } 16822 y := v_1.Args[0] 16823 v.reset(OpS390XSRAW) 16824 v.AddArg(x) 16825 v.AddArg(y) 16826 return true 16827 } 16828 return false 16829 } 16830 func rewriteValueS390X_OpS390XSRAWconst(v *Value, config *Config) bool { 16831 b := v.Block 16832 _ = b 16833 // match: (SRAWconst [c] (MOVDconst [d])) 16834 // cond: 16835 // result: (MOVDconst [d>>uint64(c)]) 16836 for { 16837 c := v.AuxInt 16838 v_0 := v.Args[0] 16839 if v_0.Op != OpS390XMOVDconst { 16840 break 16841 } 16842 d := v_0.AuxInt 16843 v.reset(OpS390XMOVDconst) 16844 v.AuxInt = d >> uint64(c) 16845 return true 16846 } 16847 return false 16848 } 16849 func rewriteValueS390X_OpS390XSRD(v *Value, config *Config) bool { 16850 b := v.Block 16851 _ = b 16852 // match: (SRD x (MOVDconst [c])) 16853 // cond: 16854 // result: (SRDconst [c&63] x) 16855 for { 16856 x := v.Args[0] 16857 v_1 := v.Args[1] 16858 if v_1.Op != OpS390XMOVDconst { 16859 break 16860 } 16861 c := v_1.AuxInt 16862 v.reset(OpS390XSRDconst) 16863 v.AuxInt = c & 63 16864 v.AddArg(x) 16865 return true 16866 } 16867 // match: (SRD x (ANDconst [63] y)) 16868 // cond: 16869 // result: (SRD x y) 16870 for { 16871 x := v.Args[0] 16872 v_1 := v.Args[1] 16873 if v_1.Op != OpS390XANDconst { 16874 break 16875 } 16876 if v_1.AuxInt != 63 { 16877 break 16878 } 16879 y := v_1.Args[0] 16880 v.reset(OpS390XSRD) 16881 v.AddArg(x) 16882 v.AddArg(y) 16883 return true 16884 } 16885 return false 16886 } 16887 func rewriteValueS390X_OpS390XSRW(v *Value, config *Config) bool { 16888 b := v.Block 16889 _ = b 16890 // match: (SRW x (MOVDconst [c])) 16891 // cond: 16892 // result: (SRWconst [c&63] x) 16893 for { 16894 x := v.Args[0] 16895 v_1 := v.Args[1] 16896 if v_1.Op != OpS390XMOVDconst { 16897 break 16898 } 16899 c := v_1.AuxInt 16900 v.reset(OpS390XSRWconst) 16901 v.AuxInt = c & 63 16902 v.AddArg(x) 16903 return true 16904 } 16905 // match: (SRW x (ANDWconst [63] y)) 16906 // cond: 16907 // result: (SRW x y) 16908 for { 16909 x := v.Args[0] 16910 v_1 := v.Args[1] 16911 if v_1.Op != OpS390XANDWconst { 16912 break 16913 } 16914 if v_1.AuxInt != 63 { 16915 break 16916 } 16917 y := v_1.Args[0] 16918 v.reset(OpS390XSRW) 16919 v.AddArg(x) 16920 v.AddArg(y) 16921 return true 16922 } 16923 return false 16924 } 16925 func rewriteValueS390X_OpS390XSTM2(v *Value, config *Config) bool { 16926 b := v.Block 16927 _ = b 16928 // match: (STM2 [i] {s} p w2 w3 x:(STM2 [i-8] {s} p w0 w1 mem)) 16929 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 16930 // result: (STM4 [i-8] {s} p w0 w1 w2 w3 mem) 16931 for { 16932 i := v.AuxInt 16933 s := v.Aux 16934 p := v.Args[0] 16935 w2 := v.Args[1] 16936 w3 := v.Args[2] 16937 x := v.Args[3] 16938 if x.Op != OpS390XSTM2 { 16939 break 16940 } 16941 if x.AuxInt != i-8 { 16942 break 16943 } 16944 if x.Aux != s { 16945 break 16946 } 16947 if p != x.Args[0] { 16948 break 16949 } 16950 w0 := x.Args[1] 16951 w1 := x.Args[2] 16952 mem := x.Args[3] 16953 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 16954 break 16955 } 16956 v.reset(OpS390XSTM4) 16957 v.AuxInt = i - 8 16958 v.Aux = s 16959 v.AddArg(p) 16960 v.AddArg(w0) 16961 v.AddArg(w1) 16962 v.AddArg(w2) 16963 v.AddArg(w3) 16964 v.AddArg(mem) 16965 return true 16966 } 16967 // match: (STM2 [i] {s} p (SRDconst [32] x) x mem) 16968 // cond: 16969 // result: (MOVDstore [i] {s} p x mem) 16970 for { 16971 i := v.AuxInt 16972 s := v.Aux 16973 p := v.Args[0] 16974 v_1 := v.Args[1] 16975 if v_1.Op != OpS390XSRDconst { 16976 break 16977 } 16978 if v_1.AuxInt != 32 { 16979 break 16980 } 16981 x := v_1.Args[0] 16982 if x != v.Args[2] { 16983 break 16984 } 16985 mem := v.Args[3] 16986 v.reset(OpS390XMOVDstore) 16987 v.AuxInt = i 16988 v.Aux = s 16989 v.AddArg(p) 16990 v.AddArg(x) 16991 v.AddArg(mem) 16992 return true 16993 } 16994 return false 16995 } 16996 func rewriteValueS390X_OpS390XSTMG2(v *Value, config *Config) bool { 16997 b := v.Block 16998 _ = b 16999 // match: (STMG2 [i] {s} p w2 w3 x:(STMG2 [i-16] {s} p w0 w1 mem)) 17000 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 17001 // result: (STMG4 [i-16] {s} p w0 w1 w2 w3 mem) 17002 for { 17003 i := v.AuxInt 17004 s := v.Aux 17005 p := v.Args[0] 17006 w2 := v.Args[1] 17007 w3 := v.Args[2] 17008 x := v.Args[3] 17009 if x.Op != OpS390XSTMG2 { 17010 break 17011 } 17012 if x.AuxInt != i-16 { 17013 break 17014 } 17015 if x.Aux != s { 17016 break 17017 } 17018 if p != x.Args[0] { 17019 break 17020 } 17021 w0 := x.Args[1] 17022 w1 := x.Args[2] 17023 mem := x.Args[3] 17024 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 17025 break 17026 } 17027 v.reset(OpS390XSTMG4) 17028 v.AuxInt = i - 16 17029 v.Aux = s 17030 v.AddArg(p) 17031 v.AddArg(w0) 17032 v.AddArg(w1) 17033 v.AddArg(w2) 17034 v.AddArg(w3) 17035 v.AddArg(mem) 17036 return true 17037 } 17038 return false 17039 } 17040 func rewriteValueS390X_OpS390XSUB(v *Value, config *Config) bool { 17041 b := v.Block 17042 _ = b 17043 // match: (SUB x (MOVDconst [c])) 17044 // cond: is32Bit(c) 17045 // result: (SUBconst x [c]) 17046 for { 17047 x := v.Args[0] 17048 v_1 := v.Args[1] 17049 if v_1.Op != OpS390XMOVDconst { 17050 break 17051 } 17052 c := v_1.AuxInt 17053 if !(is32Bit(c)) { 17054 break 17055 } 17056 v.reset(OpS390XSUBconst) 17057 v.AuxInt = c 17058 v.AddArg(x) 17059 return true 17060 } 17061 // match: (SUB (MOVDconst [c]) x) 17062 // cond: is32Bit(c) 17063 // result: (NEG (SUBconst <v.Type> x [c])) 17064 for { 17065 v_0 := v.Args[0] 17066 if v_0.Op != OpS390XMOVDconst { 17067 break 17068 } 17069 c := v_0.AuxInt 17070 x := v.Args[1] 17071 if !(is32Bit(c)) { 17072 break 17073 } 17074 v.reset(OpS390XNEG) 17075 v0 := b.NewValue0(v.Pos, OpS390XSUBconst, v.Type) 17076 v0.AuxInt = c 17077 v0.AddArg(x) 17078 v.AddArg(v0) 17079 return true 17080 } 17081 // match: (SUB x x) 17082 // cond: 17083 // result: (MOVDconst [0]) 17084 for { 17085 x := v.Args[0] 17086 if x != v.Args[1] { 17087 break 17088 } 17089 v.reset(OpS390XMOVDconst) 17090 v.AuxInt = 0 17091 return true 17092 } 17093 // match: (SUB <t> x g:(MOVDload [off] {sym} ptr mem)) 17094 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17095 // result: (SUBload <t> [off] {sym} x ptr mem) 17096 for { 17097 t := v.Type 17098 x := v.Args[0] 17099 g := v.Args[1] 17100 if g.Op != OpS390XMOVDload { 17101 break 17102 } 17103 off := g.AuxInt 17104 sym := g.Aux 17105 ptr := g.Args[0] 17106 mem := g.Args[1] 17107 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17108 break 17109 } 17110 v.reset(OpS390XSUBload) 17111 v.Type = t 17112 v.AuxInt = off 17113 v.Aux = sym 17114 v.AddArg(x) 17115 v.AddArg(ptr) 17116 v.AddArg(mem) 17117 return true 17118 } 17119 return false 17120 } 17121 func rewriteValueS390X_OpS390XSUBEWcarrymask(v *Value, config *Config) bool { 17122 b := v.Block 17123 _ = b 17124 // match: (SUBEWcarrymask (FlagEQ)) 17125 // cond: 17126 // result: (MOVDconst [-1]) 17127 for { 17128 v_0 := v.Args[0] 17129 if v_0.Op != OpS390XFlagEQ { 17130 break 17131 } 17132 v.reset(OpS390XMOVDconst) 17133 v.AuxInt = -1 17134 return true 17135 } 17136 // match: (SUBEWcarrymask (FlagLT)) 17137 // cond: 17138 // result: (MOVDconst [-1]) 17139 for { 17140 v_0 := v.Args[0] 17141 if v_0.Op != OpS390XFlagLT { 17142 break 17143 } 17144 v.reset(OpS390XMOVDconst) 17145 v.AuxInt = -1 17146 return true 17147 } 17148 // match: (SUBEWcarrymask (FlagGT)) 17149 // cond: 17150 // result: (MOVDconst [0]) 17151 for { 17152 v_0 := v.Args[0] 17153 if v_0.Op != OpS390XFlagGT { 17154 break 17155 } 17156 v.reset(OpS390XMOVDconst) 17157 v.AuxInt = 0 17158 return true 17159 } 17160 return false 17161 } 17162 func rewriteValueS390X_OpS390XSUBEcarrymask(v *Value, config *Config) bool { 17163 b := v.Block 17164 _ = b 17165 // match: (SUBEcarrymask (FlagEQ)) 17166 // cond: 17167 // result: (MOVDconst [-1]) 17168 for { 17169 v_0 := v.Args[0] 17170 if v_0.Op != OpS390XFlagEQ { 17171 break 17172 } 17173 v.reset(OpS390XMOVDconst) 17174 v.AuxInt = -1 17175 return true 17176 } 17177 // match: (SUBEcarrymask (FlagLT)) 17178 // cond: 17179 // result: (MOVDconst [-1]) 17180 for { 17181 v_0 := v.Args[0] 17182 if v_0.Op != OpS390XFlagLT { 17183 break 17184 } 17185 v.reset(OpS390XMOVDconst) 17186 v.AuxInt = -1 17187 return true 17188 } 17189 // match: (SUBEcarrymask (FlagGT)) 17190 // cond: 17191 // result: (MOVDconst [0]) 17192 for { 17193 v_0 := v.Args[0] 17194 if v_0.Op != OpS390XFlagGT { 17195 break 17196 } 17197 v.reset(OpS390XMOVDconst) 17198 v.AuxInt = 0 17199 return true 17200 } 17201 return false 17202 } 17203 func rewriteValueS390X_OpS390XSUBW(v *Value, config *Config) bool { 17204 b := v.Block 17205 _ = b 17206 // match: (SUBW x (MOVDconst [c])) 17207 // cond: 17208 // result: (SUBWconst x [c]) 17209 for { 17210 x := v.Args[0] 17211 v_1 := v.Args[1] 17212 if v_1.Op != OpS390XMOVDconst { 17213 break 17214 } 17215 c := v_1.AuxInt 17216 v.reset(OpS390XSUBWconst) 17217 v.AuxInt = c 17218 v.AddArg(x) 17219 return true 17220 } 17221 // match: (SUBW (MOVDconst [c]) x) 17222 // cond: 17223 // result: (NEGW (SUBWconst <v.Type> x [c])) 17224 for { 17225 v_0 := v.Args[0] 17226 if v_0.Op != OpS390XMOVDconst { 17227 break 17228 } 17229 c := v_0.AuxInt 17230 x := v.Args[1] 17231 v.reset(OpS390XNEGW) 17232 v0 := b.NewValue0(v.Pos, OpS390XSUBWconst, v.Type) 17233 v0.AuxInt = c 17234 v0.AddArg(x) 17235 v.AddArg(v0) 17236 return true 17237 } 17238 // match: (SUBW x x) 17239 // cond: 17240 // result: (MOVDconst [0]) 17241 for { 17242 x := v.Args[0] 17243 if x != v.Args[1] { 17244 break 17245 } 17246 v.reset(OpS390XMOVDconst) 17247 v.AuxInt = 0 17248 return true 17249 } 17250 // match: (SUBW <t> x g:(MOVWload [off] {sym} ptr mem)) 17251 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17252 // result: (SUBWload <t> [off] {sym} x ptr mem) 17253 for { 17254 t := v.Type 17255 x := v.Args[0] 17256 g := v.Args[1] 17257 if g.Op != OpS390XMOVWload { 17258 break 17259 } 17260 off := g.AuxInt 17261 sym := g.Aux 17262 ptr := g.Args[0] 17263 mem := g.Args[1] 17264 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17265 break 17266 } 17267 v.reset(OpS390XSUBWload) 17268 v.Type = t 17269 v.AuxInt = off 17270 v.Aux = sym 17271 v.AddArg(x) 17272 v.AddArg(ptr) 17273 v.AddArg(mem) 17274 return true 17275 } 17276 // match: (SUBW <t> x g:(MOVWZload [off] {sym} ptr mem)) 17277 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17278 // result: (SUBWload <t> [off] {sym} x ptr mem) 17279 for { 17280 t := v.Type 17281 x := v.Args[0] 17282 g := v.Args[1] 17283 if g.Op != OpS390XMOVWZload { 17284 break 17285 } 17286 off := g.AuxInt 17287 sym := g.Aux 17288 ptr := g.Args[0] 17289 mem := g.Args[1] 17290 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17291 break 17292 } 17293 v.reset(OpS390XSUBWload) 17294 v.Type = t 17295 v.AuxInt = off 17296 v.Aux = sym 17297 v.AddArg(x) 17298 v.AddArg(ptr) 17299 v.AddArg(mem) 17300 return true 17301 } 17302 return false 17303 } 17304 func rewriteValueS390X_OpS390XSUBWconst(v *Value, config *Config) bool { 17305 b := v.Block 17306 _ = b 17307 // match: (SUBWconst [c] x) 17308 // cond: int32(c) == 0 17309 // result: x 17310 for { 17311 c := v.AuxInt 17312 x := v.Args[0] 17313 if !(int32(c) == 0) { 17314 break 17315 } 17316 v.reset(OpCopy) 17317 v.Type = x.Type 17318 v.AddArg(x) 17319 return true 17320 } 17321 // match: (SUBWconst [c] x) 17322 // cond: 17323 // result: (ADDWconst [int64(int32(-c))] x) 17324 for { 17325 c := v.AuxInt 17326 x := v.Args[0] 17327 v.reset(OpS390XADDWconst) 17328 v.AuxInt = int64(int32(-c)) 17329 v.AddArg(x) 17330 return true 17331 } 17332 } 17333 func rewriteValueS390X_OpS390XSUBconst(v *Value, config *Config) bool { 17334 b := v.Block 17335 _ = b 17336 // match: (SUBconst [0] x) 17337 // cond: 17338 // result: x 17339 for { 17340 if v.AuxInt != 0 { 17341 break 17342 } 17343 x := v.Args[0] 17344 v.reset(OpCopy) 17345 v.Type = x.Type 17346 v.AddArg(x) 17347 return true 17348 } 17349 // match: (SUBconst [c] x) 17350 // cond: c != -(1<<31) 17351 // result: (ADDconst [-c] x) 17352 for { 17353 c := v.AuxInt 17354 x := v.Args[0] 17355 if !(c != -(1 << 31)) { 17356 break 17357 } 17358 v.reset(OpS390XADDconst) 17359 v.AuxInt = -c 17360 v.AddArg(x) 17361 return true 17362 } 17363 // match: (SUBconst (MOVDconst [d]) [c]) 17364 // cond: 17365 // result: (MOVDconst [d-c]) 17366 for { 17367 c := v.AuxInt 17368 v_0 := v.Args[0] 17369 if v_0.Op != OpS390XMOVDconst { 17370 break 17371 } 17372 d := v_0.AuxInt 17373 v.reset(OpS390XMOVDconst) 17374 v.AuxInt = d - c 17375 return true 17376 } 17377 // match: (SUBconst (SUBconst x [d]) [c]) 17378 // cond: is32Bit(-c-d) 17379 // result: (ADDconst [-c-d] x) 17380 for { 17381 c := v.AuxInt 17382 v_0 := v.Args[0] 17383 if v_0.Op != OpS390XSUBconst { 17384 break 17385 } 17386 d := v_0.AuxInt 17387 x := v_0.Args[0] 17388 if !(is32Bit(-c - d)) { 17389 break 17390 } 17391 v.reset(OpS390XADDconst) 17392 v.AuxInt = -c - d 17393 v.AddArg(x) 17394 return true 17395 } 17396 return false 17397 } 17398 func rewriteValueS390X_OpS390XXOR(v *Value, config *Config) bool { 17399 b := v.Block 17400 _ = b 17401 // match: (XOR x (MOVDconst [c])) 17402 // cond: isU32Bit(c) 17403 // result: (XORconst [c] x) 17404 for { 17405 x := v.Args[0] 17406 v_1 := v.Args[1] 17407 if v_1.Op != OpS390XMOVDconst { 17408 break 17409 } 17410 c := v_1.AuxInt 17411 if !(isU32Bit(c)) { 17412 break 17413 } 17414 v.reset(OpS390XXORconst) 17415 v.AuxInt = c 17416 v.AddArg(x) 17417 return true 17418 } 17419 // match: (XOR (MOVDconst [c]) x) 17420 // cond: isU32Bit(c) 17421 // result: (XORconst [c] x) 17422 for { 17423 v_0 := v.Args[0] 17424 if v_0.Op != OpS390XMOVDconst { 17425 break 17426 } 17427 c := v_0.AuxInt 17428 x := v.Args[1] 17429 if !(isU32Bit(c)) { 17430 break 17431 } 17432 v.reset(OpS390XXORconst) 17433 v.AuxInt = c 17434 v.AddArg(x) 17435 return true 17436 } 17437 // match: (XOR (SLDconst x [c]) (SRDconst x [64-c])) 17438 // cond: 17439 // result: (RLLGconst [ c] x) 17440 for { 17441 v_0 := v.Args[0] 17442 if v_0.Op != OpS390XSLDconst { 17443 break 17444 } 17445 c := v_0.AuxInt 17446 x := v_0.Args[0] 17447 v_1 := v.Args[1] 17448 if v_1.Op != OpS390XSRDconst { 17449 break 17450 } 17451 if v_1.AuxInt != 64-c { 17452 break 17453 } 17454 if x != v_1.Args[0] { 17455 break 17456 } 17457 v.reset(OpS390XRLLGconst) 17458 v.AuxInt = c 17459 v.AddArg(x) 17460 return true 17461 } 17462 // match: (XOR (SRDconst x [c]) (SLDconst x [64-c])) 17463 // cond: 17464 // result: (RLLGconst [64-c] x) 17465 for { 17466 v_0 := v.Args[0] 17467 if v_0.Op != OpS390XSRDconst { 17468 break 17469 } 17470 c := v_0.AuxInt 17471 x := v_0.Args[0] 17472 v_1 := v.Args[1] 17473 if v_1.Op != OpS390XSLDconst { 17474 break 17475 } 17476 if v_1.AuxInt != 64-c { 17477 break 17478 } 17479 if x != v_1.Args[0] { 17480 break 17481 } 17482 v.reset(OpS390XRLLGconst) 17483 v.AuxInt = 64 - c 17484 v.AddArg(x) 17485 return true 17486 } 17487 // match: (XOR (MOVDconst [c]) (MOVDconst [d])) 17488 // cond: 17489 // result: (MOVDconst [c^d]) 17490 for { 17491 v_0 := v.Args[0] 17492 if v_0.Op != OpS390XMOVDconst { 17493 break 17494 } 17495 c := v_0.AuxInt 17496 v_1 := v.Args[1] 17497 if v_1.Op != OpS390XMOVDconst { 17498 break 17499 } 17500 d := v_1.AuxInt 17501 v.reset(OpS390XMOVDconst) 17502 v.AuxInt = c ^ d 17503 return true 17504 } 17505 // match: (XOR x x) 17506 // cond: 17507 // result: (MOVDconst [0]) 17508 for { 17509 x := v.Args[0] 17510 if x != v.Args[1] { 17511 break 17512 } 17513 v.reset(OpS390XMOVDconst) 17514 v.AuxInt = 0 17515 return true 17516 } 17517 // match: (XOR <t> x g:(MOVDload [off] {sym} ptr mem)) 17518 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17519 // result: (XORload <t> [off] {sym} x ptr mem) 17520 for { 17521 t := v.Type 17522 x := v.Args[0] 17523 g := v.Args[1] 17524 if g.Op != OpS390XMOVDload { 17525 break 17526 } 17527 off := g.AuxInt 17528 sym := g.Aux 17529 ptr := g.Args[0] 17530 mem := g.Args[1] 17531 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17532 break 17533 } 17534 v.reset(OpS390XXORload) 17535 v.Type = t 17536 v.AuxInt = off 17537 v.Aux = sym 17538 v.AddArg(x) 17539 v.AddArg(ptr) 17540 v.AddArg(mem) 17541 return true 17542 } 17543 // match: (XOR <t> g:(MOVDload [off] {sym} ptr mem) x) 17544 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17545 // result: (XORload <t> [off] {sym} x ptr mem) 17546 for { 17547 t := v.Type 17548 g := v.Args[0] 17549 if g.Op != OpS390XMOVDload { 17550 break 17551 } 17552 off := g.AuxInt 17553 sym := g.Aux 17554 ptr := g.Args[0] 17555 mem := g.Args[1] 17556 x := v.Args[1] 17557 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17558 break 17559 } 17560 v.reset(OpS390XXORload) 17561 v.Type = t 17562 v.AuxInt = off 17563 v.Aux = sym 17564 v.AddArg(x) 17565 v.AddArg(ptr) 17566 v.AddArg(mem) 17567 return true 17568 } 17569 return false 17570 } 17571 func rewriteValueS390X_OpS390XXORW(v *Value, config *Config) bool { 17572 b := v.Block 17573 _ = b 17574 // match: (XORW x (MOVDconst [c])) 17575 // cond: 17576 // result: (XORWconst [c] x) 17577 for { 17578 x := v.Args[0] 17579 v_1 := v.Args[1] 17580 if v_1.Op != OpS390XMOVDconst { 17581 break 17582 } 17583 c := v_1.AuxInt 17584 v.reset(OpS390XXORWconst) 17585 v.AuxInt = c 17586 v.AddArg(x) 17587 return true 17588 } 17589 // match: (XORW (MOVDconst [c]) x) 17590 // cond: 17591 // result: (XORWconst [c] x) 17592 for { 17593 v_0 := v.Args[0] 17594 if v_0.Op != OpS390XMOVDconst { 17595 break 17596 } 17597 c := v_0.AuxInt 17598 x := v.Args[1] 17599 v.reset(OpS390XXORWconst) 17600 v.AuxInt = c 17601 v.AddArg(x) 17602 return true 17603 } 17604 // match: (XORW (SLWconst x [c]) (SRWconst x [32-c])) 17605 // cond: 17606 // result: (RLLconst [ c] x) 17607 for { 17608 v_0 := v.Args[0] 17609 if v_0.Op != OpS390XSLWconst { 17610 break 17611 } 17612 c := v_0.AuxInt 17613 x := v_0.Args[0] 17614 v_1 := v.Args[1] 17615 if v_1.Op != OpS390XSRWconst { 17616 break 17617 } 17618 if v_1.AuxInt != 32-c { 17619 break 17620 } 17621 if x != v_1.Args[0] { 17622 break 17623 } 17624 v.reset(OpS390XRLLconst) 17625 v.AuxInt = c 17626 v.AddArg(x) 17627 return true 17628 } 17629 // match: (XORW (SRWconst x [c]) (SLWconst x [32-c])) 17630 // cond: 17631 // result: (RLLconst [32-c] x) 17632 for { 17633 v_0 := v.Args[0] 17634 if v_0.Op != OpS390XSRWconst { 17635 break 17636 } 17637 c := v_0.AuxInt 17638 x := v_0.Args[0] 17639 v_1 := v.Args[1] 17640 if v_1.Op != OpS390XSLWconst { 17641 break 17642 } 17643 if v_1.AuxInt != 32-c { 17644 break 17645 } 17646 if x != v_1.Args[0] { 17647 break 17648 } 17649 v.reset(OpS390XRLLconst) 17650 v.AuxInt = 32 - c 17651 v.AddArg(x) 17652 return true 17653 } 17654 // match: (XORW x x) 17655 // cond: 17656 // result: (MOVDconst [0]) 17657 for { 17658 x := v.Args[0] 17659 if x != v.Args[1] { 17660 break 17661 } 17662 v.reset(OpS390XMOVDconst) 17663 v.AuxInt = 0 17664 return true 17665 } 17666 // match: (XORW <t> x g:(MOVWload [off] {sym} ptr mem)) 17667 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17668 // result: (XORWload <t> [off] {sym} x ptr mem) 17669 for { 17670 t := v.Type 17671 x := v.Args[0] 17672 g := v.Args[1] 17673 if g.Op != OpS390XMOVWload { 17674 break 17675 } 17676 off := g.AuxInt 17677 sym := g.Aux 17678 ptr := g.Args[0] 17679 mem := g.Args[1] 17680 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17681 break 17682 } 17683 v.reset(OpS390XXORWload) 17684 v.Type = t 17685 v.AuxInt = off 17686 v.Aux = sym 17687 v.AddArg(x) 17688 v.AddArg(ptr) 17689 v.AddArg(mem) 17690 return true 17691 } 17692 // match: (XORW <t> g:(MOVWload [off] {sym} ptr mem) x) 17693 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17694 // result: (XORWload <t> [off] {sym} x ptr mem) 17695 for { 17696 t := v.Type 17697 g := v.Args[0] 17698 if g.Op != OpS390XMOVWload { 17699 break 17700 } 17701 off := g.AuxInt 17702 sym := g.Aux 17703 ptr := g.Args[0] 17704 mem := g.Args[1] 17705 x := v.Args[1] 17706 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17707 break 17708 } 17709 v.reset(OpS390XXORWload) 17710 v.Type = t 17711 v.AuxInt = off 17712 v.Aux = sym 17713 v.AddArg(x) 17714 v.AddArg(ptr) 17715 v.AddArg(mem) 17716 return true 17717 } 17718 // match: (XORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 17719 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17720 // result: (XORWload <t> [off] {sym} x ptr mem) 17721 for { 17722 t := v.Type 17723 x := v.Args[0] 17724 g := v.Args[1] 17725 if g.Op != OpS390XMOVWZload { 17726 break 17727 } 17728 off := g.AuxInt 17729 sym := g.Aux 17730 ptr := g.Args[0] 17731 mem := g.Args[1] 17732 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17733 break 17734 } 17735 v.reset(OpS390XXORWload) 17736 v.Type = t 17737 v.AuxInt = off 17738 v.Aux = sym 17739 v.AddArg(x) 17740 v.AddArg(ptr) 17741 v.AddArg(mem) 17742 return true 17743 } 17744 // match: (XORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 17745 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17746 // result: (XORWload <t> [off] {sym} x ptr mem) 17747 for { 17748 t := v.Type 17749 g := v.Args[0] 17750 if g.Op != OpS390XMOVWZload { 17751 break 17752 } 17753 off := g.AuxInt 17754 sym := g.Aux 17755 ptr := g.Args[0] 17756 mem := g.Args[1] 17757 x := v.Args[1] 17758 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17759 break 17760 } 17761 v.reset(OpS390XXORWload) 17762 v.Type = t 17763 v.AuxInt = off 17764 v.Aux = sym 17765 v.AddArg(x) 17766 v.AddArg(ptr) 17767 v.AddArg(mem) 17768 return true 17769 } 17770 return false 17771 } 17772 func rewriteValueS390X_OpS390XXORWconst(v *Value, config *Config) bool { 17773 b := v.Block 17774 _ = b 17775 // match: (XORWconst [c] x) 17776 // cond: int32(c)==0 17777 // result: x 17778 for { 17779 c := v.AuxInt 17780 x := v.Args[0] 17781 if !(int32(c) == 0) { 17782 break 17783 } 17784 v.reset(OpCopy) 17785 v.Type = x.Type 17786 v.AddArg(x) 17787 return true 17788 } 17789 // match: (XORWconst [c] (MOVDconst [d])) 17790 // cond: 17791 // result: (MOVDconst [c^d]) 17792 for { 17793 c := v.AuxInt 17794 v_0 := v.Args[0] 17795 if v_0.Op != OpS390XMOVDconst { 17796 break 17797 } 17798 d := v_0.AuxInt 17799 v.reset(OpS390XMOVDconst) 17800 v.AuxInt = c ^ d 17801 return true 17802 } 17803 return false 17804 } 17805 func rewriteValueS390X_OpS390XXORconst(v *Value, config *Config) bool { 17806 b := v.Block 17807 _ = b 17808 // match: (XORconst [0] x) 17809 // cond: 17810 // result: x 17811 for { 17812 if v.AuxInt != 0 { 17813 break 17814 } 17815 x := v.Args[0] 17816 v.reset(OpCopy) 17817 v.Type = x.Type 17818 v.AddArg(x) 17819 return true 17820 } 17821 // match: (XORconst [c] (MOVDconst [d])) 17822 // cond: 17823 // result: (MOVDconst [c^d]) 17824 for { 17825 c := v.AuxInt 17826 v_0 := v.Args[0] 17827 if v_0.Op != OpS390XMOVDconst { 17828 break 17829 } 17830 d := v_0.AuxInt 17831 v.reset(OpS390XMOVDconst) 17832 v.AuxInt = c ^ d 17833 return true 17834 } 17835 return false 17836 } 17837 func rewriteValueS390X_OpSelect0(v *Value, config *Config) bool { 17838 b := v.Block 17839 _ = b 17840 // match: (Select0 <t> (AddTupleFirst32 tuple val)) 17841 // cond: 17842 // result: (ADDW val (Select0 <t> tuple)) 17843 for { 17844 t := v.Type 17845 v_0 := v.Args[0] 17846 if v_0.Op != OpS390XAddTupleFirst32 { 17847 break 17848 } 17849 tuple := v_0.Args[0] 17850 val := v_0.Args[1] 17851 v.reset(OpS390XADDW) 17852 v.AddArg(val) 17853 v0 := b.NewValue0(v.Pos, OpSelect0, t) 17854 v0.AddArg(tuple) 17855 v.AddArg(v0) 17856 return true 17857 } 17858 // match: (Select0 <t> (AddTupleFirst64 tuple val)) 17859 // cond: 17860 // result: (ADD val (Select0 <t> tuple)) 17861 for { 17862 t := v.Type 17863 v_0 := v.Args[0] 17864 if v_0.Op != OpS390XAddTupleFirst64 { 17865 break 17866 } 17867 tuple := v_0.Args[0] 17868 val := v_0.Args[1] 17869 v.reset(OpS390XADD) 17870 v.AddArg(val) 17871 v0 := b.NewValue0(v.Pos, OpSelect0, t) 17872 v0.AddArg(tuple) 17873 v.AddArg(v0) 17874 return true 17875 } 17876 return false 17877 } 17878 func rewriteValueS390X_OpSelect1(v *Value, config *Config) bool { 17879 b := v.Block 17880 _ = b 17881 // match: (Select1 (AddTupleFirst32 tuple _ )) 17882 // cond: 17883 // result: (Select1 tuple) 17884 for { 17885 v_0 := v.Args[0] 17886 if v_0.Op != OpS390XAddTupleFirst32 { 17887 break 17888 } 17889 tuple := v_0.Args[0] 17890 v.reset(OpSelect1) 17891 v.AddArg(tuple) 17892 return true 17893 } 17894 // match: (Select1 (AddTupleFirst64 tuple _ )) 17895 // cond: 17896 // result: (Select1 tuple) 17897 for { 17898 v_0 := v.Args[0] 17899 if v_0.Op != OpS390XAddTupleFirst64 { 17900 break 17901 } 17902 tuple := v_0.Args[0] 17903 v.reset(OpSelect1) 17904 v.AddArg(tuple) 17905 return true 17906 } 17907 return false 17908 } 17909 func rewriteValueS390X_OpSignExt16to32(v *Value, config *Config) bool { 17910 b := v.Block 17911 _ = b 17912 // match: (SignExt16to32 x) 17913 // cond: 17914 // result: (MOVHreg x) 17915 for { 17916 x := v.Args[0] 17917 v.reset(OpS390XMOVHreg) 17918 v.AddArg(x) 17919 return true 17920 } 17921 } 17922 func rewriteValueS390X_OpSignExt16to64(v *Value, config *Config) bool { 17923 b := v.Block 17924 _ = b 17925 // match: (SignExt16to64 x) 17926 // cond: 17927 // result: (MOVHreg x) 17928 for { 17929 x := v.Args[0] 17930 v.reset(OpS390XMOVHreg) 17931 v.AddArg(x) 17932 return true 17933 } 17934 } 17935 func rewriteValueS390X_OpSignExt32to64(v *Value, config *Config) bool { 17936 b := v.Block 17937 _ = b 17938 // match: (SignExt32to64 x) 17939 // cond: 17940 // result: (MOVWreg x) 17941 for { 17942 x := v.Args[0] 17943 v.reset(OpS390XMOVWreg) 17944 v.AddArg(x) 17945 return true 17946 } 17947 } 17948 func rewriteValueS390X_OpSignExt8to16(v *Value, config *Config) bool { 17949 b := v.Block 17950 _ = b 17951 // match: (SignExt8to16 x) 17952 // cond: 17953 // result: (MOVBreg x) 17954 for { 17955 x := v.Args[0] 17956 v.reset(OpS390XMOVBreg) 17957 v.AddArg(x) 17958 return true 17959 } 17960 } 17961 func rewriteValueS390X_OpSignExt8to32(v *Value, config *Config) bool { 17962 b := v.Block 17963 _ = b 17964 // match: (SignExt8to32 x) 17965 // cond: 17966 // result: (MOVBreg x) 17967 for { 17968 x := v.Args[0] 17969 v.reset(OpS390XMOVBreg) 17970 v.AddArg(x) 17971 return true 17972 } 17973 } 17974 func rewriteValueS390X_OpSignExt8to64(v *Value, config *Config) bool { 17975 b := v.Block 17976 _ = b 17977 // match: (SignExt8to64 x) 17978 // cond: 17979 // result: (MOVBreg x) 17980 for { 17981 x := v.Args[0] 17982 v.reset(OpS390XMOVBreg) 17983 v.AddArg(x) 17984 return true 17985 } 17986 } 17987 func rewriteValueS390X_OpSlicemask(v *Value, config *Config) bool { 17988 b := v.Block 17989 _ = b 17990 // match: (Slicemask <t> x) 17991 // cond: 17992 // result: (SRADconst (NEG <t> x) [63]) 17993 for { 17994 t := v.Type 17995 x := v.Args[0] 17996 v.reset(OpS390XSRADconst) 17997 v.AuxInt = 63 17998 v0 := b.NewValue0(v.Pos, OpS390XNEG, t) 17999 v0.AddArg(x) 18000 v.AddArg(v0) 18001 return true 18002 } 18003 } 18004 func rewriteValueS390X_OpSqrt(v *Value, config *Config) bool { 18005 b := v.Block 18006 _ = b 18007 // match: (Sqrt x) 18008 // cond: 18009 // result: (FSQRT x) 18010 for { 18011 x := v.Args[0] 18012 v.reset(OpS390XFSQRT) 18013 v.AddArg(x) 18014 return true 18015 } 18016 } 18017 func rewriteValueS390X_OpStaticCall(v *Value, config *Config) bool { 18018 b := v.Block 18019 _ = b 18020 // match: (StaticCall [argwid] {target} mem) 18021 // cond: 18022 // result: (CALLstatic [argwid] {target} mem) 18023 for { 18024 argwid := v.AuxInt 18025 target := v.Aux 18026 mem := v.Args[0] 18027 v.reset(OpS390XCALLstatic) 18028 v.AuxInt = argwid 18029 v.Aux = target 18030 v.AddArg(mem) 18031 return true 18032 } 18033 } 18034 func rewriteValueS390X_OpStore(v *Value, config *Config) bool { 18035 b := v.Block 18036 _ = b 18037 // match: (Store [8] ptr val mem) 18038 // cond: is64BitFloat(val.Type) 18039 // result: (FMOVDstore ptr val mem) 18040 for { 18041 if v.AuxInt != 8 { 18042 break 18043 } 18044 ptr := v.Args[0] 18045 val := v.Args[1] 18046 mem := v.Args[2] 18047 if !(is64BitFloat(val.Type)) { 18048 break 18049 } 18050 v.reset(OpS390XFMOVDstore) 18051 v.AddArg(ptr) 18052 v.AddArg(val) 18053 v.AddArg(mem) 18054 return true 18055 } 18056 // match: (Store [4] ptr val mem) 18057 // cond: is32BitFloat(val.Type) 18058 // result: (FMOVSstore ptr val mem) 18059 for { 18060 if v.AuxInt != 4 { 18061 break 18062 } 18063 ptr := v.Args[0] 18064 val := v.Args[1] 18065 mem := v.Args[2] 18066 if !(is32BitFloat(val.Type)) { 18067 break 18068 } 18069 v.reset(OpS390XFMOVSstore) 18070 v.AddArg(ptr) 18071 v.AddArg(val) 18072 v.AddArg(mem) 18073 return true 18074 } 18075 // match: (Store [8] ptr val mem) 18076 // cond: 18077 // result: (MOVDstore ptr val mem) 18078 for { 18079 if v.AuxInt != 8 { 18080 break 18081 } 18082 ptr := v.Args[0] 18083 val := v.Args[1] 18084 mem := v.Args[2] 18085 v.reset(OpS390XMOVDstore) 18086 v.AddArg(ptr) 18087 v.AddArg(val) 18088 v.AddArg(mem) 18089 return true 18090 } 18091 // match: (Store [4] ptr val mem) 18092 // cond: 18093 // result: (MOVWstore ptr val mem) 18094 for { 18095 if v.AuxInt != 4 { 18096 break 18097 } 18098 ptr := v.Args[0] 18099 val := v.Args[1] 18100 mem := v.Args[2] 18101 v.reset(OpS390XMOVWstore) 18102 v.AddArg(ptr) 18103 v.AddArg(val) 18104 v.AddArg(mem) 18105 return true 18106 } 18107 // match: (Store [2] ptr val mem) 18108 // cond: 18109 // result: (MOVHstore ptr val mem) 18110 for { 18111 if v.AuxInt != 2 { 18112 break 18113 } 18114 ptr := v.Args[0] 18115 val := v.Args[1] 18116 mem := v.Args[2] 18117 v.reset(OpS390XMOVHstore) 18118 v.AddArg(ptr) 18119 v.AddArg(val) 18120 v.AddArg(mem) 18121 return true 18122 } 18123 // match: (Store [1] ptr val mem) 18124 // cond: 18125 // result: (MOVBstore ptr val mem) 18126 for { 18127 if v.AuxInt != 1 { 18128 break 18129 } 18130 ptr := v.Args[0] 18131 val := v.Args[1] 18132 mem := v.Args[2] 18133 v.reset(OpS390XMOVBstore) 18134 v.AddArg(ptr) 18135 v.AddArg(val) 18136 v.AddArg(mem) 18137 return true 18138 } 18139 return false 18140 } 18141 func rewriteValueS390X_OpSub16(v *Value, config *Config) bool { 18142 b := v.Block 18143 _ = b 18144 // match: (Sub16 x y) 18145 // cond: 18146 // result: (SUBW x y) 18147 for { 18148 x := v.Args[0] 18149 y := v.Args[1] 18150 v.reset(OpS390XSUBW) 18151 v.AddArg(x) 18152 v.AddArg(y) 18153 return true 18154 } 18155 } 18156 func rewriteValueS390X_OpSub32(v *Value, config *Config) bool { 18157 b := v.Block 18158 _ = b 18159 // match: (Sub32 x y) 18160 // cond: 18161 // result: (SUBW x y) 18162 for { 18163 x := v.Args[0] 18164 y := v.Args[1] 18165 v.reset(OpS390XSUBW) 18166 v.AddArg(x) 18167 v.AddArg(y) 18168 return true 18169 } 18170 } 18171 func rewriteValueS390X_OpSub32F(v *Value, config *Config) bool { 18172 b := v.Block 18173 _ = b 18174 // match: (Sub32F x y) 18175 // cond: 18176 // result: (FSUBS x y) 18177 for { 18178 x := v.Args[0] 18179 y := v.Args[1] 18180 v.reset(OpS390XFSUBS) 18181 v.AddArg(x) 18182 v.AddArg(y) 18183 return true 18184 } 18185 } 18186 func rewriteValueS390X_OpSub64(v *Value, config *Config) bool { 18187 b := v.Block 18188 _ = b 18189 // match: (Sub64 x y) 18190 // cond: 18191 // result: (SUB x y) 18192 for { 18193 x := v.Args[0] 18194 y := v.Args[1] 18195 v.reset(OpS390XSUB) 18196 v.AddArg(x) 18197 v.AddArg(y) 18198 return true 18199 } 18200 } 18201 func rewriteValueS390X_OpSub64F(v *Value, config *Config) bool { 18202 b := v.Block 18203 _ = b 18204 // match: (Sub64F x y) 18205 // cond: 18206 // result: (FSUB x y) 18207 for { 18208 x := v.Args[0] 18209 y := v.Args[1] 18210 v.reset(OpS390XFSUB) 18211 v.AddArg(x) 18212 v.AddArg(y) 18213 return true 18214 } 18215 } 18216 func rewriteValueS390X_OpSub8(v *Value, config *Config) bool { 18217 b := v.Block 18218 _ = b 18219 // match: (Sub8 x y) 18220 // cond: 18221 // result: (SUBW x y) 18222 for { 18223 x := v.Args[0] 18224 y := v.Args[1] 18225 v.reset(OpS390XSUBW) 18226 v.AddArg(x) 18227 v.AddArg(y) 18228 return true 18229 } 18230 } 18231 func rewriteValueS390X_OpSubPtr(v *Value, config *Config) bool { 18232 b := v.Block 18233 _ = b 18234 // match: (SubPtr x y) 18235 // cond: 18236 // result: (SUB x y) 18237 for { 18238 x := v.Args[0] 18239 y := v.Args[1] 18240 v.reset(OpS390XSUB) 18241 v.AddArg(x) 18242 v.AddArg(y) 18243 return true 18244 } 18245 } 18246 func rewriteValueS390X_OpTrunc16to8(v *Value, config *Config) bool { 18247 b := v.Block 18248 _ = b 18249 // match: (Trunc16to8 x) 18250 // cond: 18251 // result: x 18252 for { 18253 x := v.Args[0] 18254 v.reset(OpCopy) 18255 v.Type = x.Type 18256 v.AddArg(x) 18257 return true 18258 } 18259 } 18260 func rewriteValueS390X_OpTrunc32to16(v *Value, config *Config) bool { 18261 b := v.Block 18262 _ = b 18263 // match: (Trunc32to16 x) 18264 // cond: 18265 // result: x 18266 for { 18267 x := v.Args[0] 18268 v.reset(OpCopy) 18269 v.Type = x.Type 18270 v.AddArg(x) 18271 return true 18272 } 18273 } 18274 func rewriteValueS390X_OpTrunc32to8(v *Value, config *Config) bool { 18275 b := v.Block 18276 _ = b 18277 // match: (Trunc32to8 x) 18278 // cond: 18279 // result: x 18280 for { 18281 x := v.Args[0] 18282 v.reset(OpCopy) 18283 v.Type = x.Type 18284 v.AddArg(x) 18285 return true 18286 } 18287 } 18288 func rewriteValueS390X_OpTrunc64to16(v *Value, config *Config) bool { 18289 b := v.Block 18290 _ = b 18291 // match: (Trunc64to16 x) 18292 // cond: 18293 // result: x 18294 for { 18295 x := v.Args[0] 18296 v.reset(OpCopy) 18297 v.Type = x.Type 18298 v.AddArg(x) 18299 return true 18300 } 18301 } 18302 func rewriteValueS390X_OpTrunc64to32(v *Value, config *Config) bool { 18303 b := v.Block 18304 _ = b 18305 // match: (Trunc64to32 x) 18306 // cond: 18307 // result: x 18308 for { 18309 x := v.Args[0] 18310 v.reset(OpCopy) 18311 v.Type = x.Type 18312 v.AddArg(x) 18313 return true 18314 } 18315 } 18316 func rewriteValueS390X_OpTrunc64to8(v *Value, config *Config) bool { 18317 b := v.Block 18318 _ = b 18319 // match: (Trunc64to8 x) 18320 // cond: 18321 // result: x 18322 for { 18323 x := v.Args[0] 18324 v.reset(OpCopy) 18325 v.Type = x.Type 18326 v.AddArg(x) 18327 return true 18328 } 18329 } 18330 func rewriteValueS390X_OpXor16(v *Value, config *Config) bool { 18331 b := v.Block 18332 _ = b 18333 // match: (Xor16 x y) 18334 // cond: 18335 // result: (XORW x y) 18336 for { 18337 x := v.Args[0] 18338 y := v.Args[1] 18339 v.reset(OpS390XXORW) 18340 v.AddArg(x) 18341 v.AddArg(y) 18342 return true 18343 } 18344 } 18345 func rewriteValueS390X_OpXor32(v *Value, config *Config) bool { 18346 b := v.Block 18347 _ = b 18348 // match: (Xor32 x y) 18349 // cond: 18350 // result: (XORW x y) 18351 for { 18352 x := v.Args[0] 18353 y := v.Args[1] 18354 v.reset(OpS390XXORW) 18355 v.AddArg(x) 18356 v.AddArg(y) 18357 return true 18358 } 18359 } 18360 func rewriteValueS390X_OpXor64(v *Value, config *Config) bool { 18361 b := v.Block 18362 _ = b 18363 // match: (Xor64 x y) 18364 // cond: 18365 // result: (XOR x y) 18366 for { 18367 x := v.Args[0] 18368 y := v.Args[1] 18369 v.reset(OpS390XXOR) 18370 v.AddArg(x) 18371 v.AddArg(y) 18372 return true 18373 } 18374 } 18375 func rewriteValueS390X_OpXor8(v *Value, config *Config) bool { 18376 b := v.Block 18377 _ = b 18378 // match: (Xor8 x y) 18379 // cond: 18380 // result: (XORW x y) 18381 for { 18382 x := v.Args[0] 18383 y := v.Args[1] 18384 v.reset(OpS390XXORW) 18385 v.AddArg(x) 18386 v.AddArg(y) 18387 return true 18388 } 18389 } 18390 func rewriteValueS390X_OpZero(v *Value, config *Config) bool { 18391 b := v.Block 18392 _ = b 18393 // match: (Zero [s] _ mem) 18394 // cond: SizeAndAlign(s).Size() == 0 18395 // result: mem 18396 for { 18397 s := v.AuxInt 18398 mem := v.Args[1] 18399 if !(SizeAndAlign(s).Size() == 0) { 18400 break 18401 } 18402 v.reset(OpCopy) 18403 v.Type = mem.Type 18404 v.AddArg(mem) 18405 return true 18406 } 18407 // match: (Zero [s] destptr mem) 18408 // cond: SizeAndAlign(s).Size() == 1 18409 // result: (MOVBstoreconst [0] destptr mem) 18410 for { 18411 s := v.AuxInt 18412 destptr := v.Args[0] 18413 mem := v.Args[1] 18414 if !(SizeAndAlign(s).Size() == 1) { 18415 break 18416 } 18417 v.reset(OpS390XMOVBstoreconst) 18418 v.AuxInt = 0 18419 v.AddArg(destptr) 18420 v.AddArg(mem) 18421 return true 18422 } 18423 // match: (Zero [s] destptr mem) 18424 // cond: SizeAndAlign(s).Size() == 2 18425 // result: (MOVHstoreconst [0] destptr mem) 18426 for { 18427 s := v.AuxInt 18428 destptr := v.Args[0] 18429 mem := v.Args[1] 18430 if !(SizeAndAlign(s).Size() == 2) { 18431 break 18432 } 18433 v.reset(OpS390XMOVHstoreconst) 18434 v.AuxInt = 0 18435 v.AddArg(destptr) 18436 v.AddArg(mem) 18437 return true 18438 } 18439 // match: (Zero [s] destptr mem) 18440 // cond: SizeAndAlign(s).Size() == 4 18441 // result: (MOVWstoreconst [0] destptr mem) 18442 for { 18443 s := v.AuxInt 18444 destptr := v.Args[0] 18445 mem := v.Args[1] 18446 if !(SizeAndAlign(s).Size() == 4) { 18447 break 18448 } 18449 v.reset(OpS390XMOVWstoreconst) 18450 v.AuxInt = 0 18451 v.AddArg(destptr) 18452 v.AddArg(mem) 18453 return true 18454 } 18455 // match: (Zero [s] destptr mem) 18456 // cond: SizeAndAlign(s).Size() == 8 18457 // result: (MOVDstoreconst [0] destptr mem) 18458 for { 18459 s := v.AuxInt 18460 destptr := v.Args[0] 18461 mem := v.Args[1] 18462 if !(SizeAndAlign(s).Size() == 8) { 18463 break 18464 } 18465 v.reset(OpS390XMOVDstoreconst) 18466 v.AuxInt = 0 18467 v.AddArg(destptr) 18468 v.AddArg(mem) 18469 return true 18470 } 18471 // match: (Zero [s] destptr mem) 18472 // cond: SizeAndAlign(s).Size() == 3 18473 // result: (MOVBstoreconst [makeValAndOff(0,2)] destptr (MOVHstoreconst [0] destptr mem)) 18474 for { 18475 s := v.AuxInt 18476 destptr := v.Args[0] 18477 mem := v.Args[1] 18478 if !(SizeAndAlign(s).Size() == 3) { 18479 break 18480 } 18481 v.reset(OpS390XMOVBstoreconst) 18482 v.AuxInt = makeValAndOff(0, 2) 18483 v.AddArg(destptr) 18484 v0 := b.NewValue0(v.Pos, OpS390XMOVHstoreconst, TypeMem) 18485 v0.AuxInt = 0 18486 v0.AddArg(destptr) 18487 v0.AddArg(mem) 18488 v.AddArg(v0) 18489 return true 18490 } 18491 // match: (Zero [s] destptr mem) 18492 // cond: SizeAndAlign(s).Size() == 5 18493 // result: (MOVBstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 18494 for { 18495 s := v.AuxInt 18496 destptr := v.Args[0] 18497 mem := v.Args[1] 18498 if !(SizeAndAlign(s).Size() == 5) { 18499 break 18500 } 18501 v.reset(OpS390XMOVBstoreconst) 18502 v.AuxInt = makeValAndOff(0, 4) 18503 v.AddArg(destptr) 18504 v0 := b.NewValue0(v.Pos, OpS390XMOVWstoreconst, TypeMem) 18505 v0.AuxInt = 0 18506 v0.AddArg(destptr) 18507 v0.AddArg(mem) 18508 v.AddArg(v0) 18509 return true 18510 } 18511 // match: (Zero [s] destptr mem) 18512 // cond: SizeAndAlign(s).Size() == 6 18513 // result: (MOVHstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 18514 for { 18515 s := v.AuxInt 18516 destptr := v.Args[0] 18517 mem := v.Args[1] 18518 if !(SizeAndAlign(s).Size() == 6) { 18519 break 18520 } 18521 v.reset(OpS390XMOVHstoreconst) 18522 v.AuxInt = makeValAndOff(0, 4) 18523 v.AddArg(destptr) 18524 v0 := b.NewValue0(v.Pos, OpS390XMOVWstoreconst, TypeMem) 18525 v0.AuxInt = 0 18526 v0.AddArg(destptr) 18527 v0.AddArg(mem) 18528 v.AddArg(v0) 18529 return true 18530 } 18531 // match: (Zero [s] destptr mem) 18532 // cond: SizeAndAlign(s).Size() == 7 18533 // result: (MOVWstoreconst [makeValAndOff(0,3)] destptr (MOVWstoreconst [0] destptr mem)) 18534 for { 18535 s := v.AuxInt 18536 destptr := v.Args[0] 18537 mem := v.Args[1] 18538 if !(SizeAndAlign(s).Size() == 7) { 18539 break 18540 } 18541 v.reset(OpS390XMOVWstoreconst) 18542 v.AuxInt = makeValAndOff(0, 3) 18543 v.AddArg(destptr) 18544 v0 := b.NewValue0(v.Pos, OpS390XMOVWstoreconst, TypeMem) 18545 v0.AuxInt = 0 18546 v0.AddArg(destptr) 18547 v0.AddArg(mem) 18548 v.AddArg(v0) 18549 return true 18550 } 18551 // match: (Zero [s] destptr mem) 18552 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024 18553 // result: (CLEAR [makeValAndOff(SizeAndAlign(s).Size(), 0)] destptr mem) 18554 for { 18555 s := v.AuxInt 18556 destptr := v.Args[0] 18557 mem := v.Args[1] 18558 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024) { 18559 break 18560 } 18561 v.reset(OpS390XCLEAR) 18562 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 18563 v.AddArg(destptr) 18564 v.AddArg(mem) 18565 return true 18566 } 18567 // match: (Zero [s] destptr mem) 18568 // cond: SizeAndAlign(s).Size() > 1024 18569 // result: (LoweredZero [SizeAndAlign(s).Size()%256] destptr (ADDconst <destptr.Type> destptr [(SizeAndAlign(s).Size()/256)*256]) mem) 18570 for { 18571 s := v.AuxInt 18572 destptr := v.Args[0] 18573 mem := v.Args[1] 18574 if !(SizeAndAlign(s).Size() > 1024) { 18575 break 18576 } 18577 v.reset(OpS390XLoweredZero) 18578 v.AuxInt = SizeAndAlign(s).Size() % 256 18579 v.AddArg(destptr) 18580 v0 := b.NewValue0(v.Pos, OpS390XADDconst, destptr.Type) 18581 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 18582 v0.AddArg(destptr) 18583 v.AddArg(v0) 18584 v.AddArg(mem) 18585 return true 18586 } 18587 return false 18588 } 18589 func rewriteValueS390X_OpZeroExt16to32(v *Value, config *Config) bool { 18590 b := v.Block 18591 _ = b 18592 // match: (ZeroExt16to32 x) 18593 // cond: 18594 // result: (MOVHZreg x) 18595 for { 18596 x := v.Args[0] 18597 v.reset(OpS390XMOVHZreg) 18598 v.AddArg(x) 18599 return true 18600 } 18601 } 18602 func rewriteValueS390X_OpZeroExt16to64(v *Value, config *Config) bool { 18603 b := v.Block 18604 _ = b 18605 // match: (ZeroExt16to64 x) 18606 // cond: 18607 // result: (MOVHZreg x) 18608 for { 18609 x := v.Args[0] 18610 v.reset(OpS390XMOVHZreg) 18611 v.AddArg(x) 18612 return true 18613 } 18614 } 18615 func rewriteValueS390X_OpZeroExt32to64(v *Value, config *Config) bool { 18616 b := v.Block 18617 _ = b 18618 // match: (ZeroExt32to64 x) 18619 // cond: 18620 // result: (MOVWZreg x) 18621 for { 18622 x := v.Args[0] 18623 v.reset(OpS390XMOVWZreg) 18624 v.AddArg(x) 18625 return true 18626 } 18627 } 18628 func rewriteValueS390X_OpZeroExt8to16(v *Value, config *Config) bool { 18629 b := v.Block 18630 _ = b 18631 // match: (ZeroExt8to16 x) 18632 // cond: 18633 // result: (MOVBZreg x) 18634 for { 18635 x := v.Args[0] 18636 v.reset(OpS390XMOVBZreg) 18637 v.AddArg(x) 18638 return true 18639 } 18640 } 18641 func rewriteValueS390X_OpZeroExt8to32(v *Value, config *Config) bool { 18642 b := v.Block 18643 _ = b 18644 // match: (ZeroExt8to32 x) 18645 // cond: 18646 // result: (MOVBZreg x) 18647 for { 18648 x := v.Args[0] 18649 v.reset(OpS390XMOVBZreg) 18650 v.AddArg(x) 18651 return true 18652 } 18653 } 18654 func rewriteValueS390X_OpZeroExt8to64(v *Value, config *Config) bool { 18655 b := v.Block 18656 _ = b 18657 // match: (ZeroExt8to64 x) 18658 // cond: 18659 // result: (MOVBZreg x) 18660 for { 18661 x := v.Args[0] 18662 v.reset(OpS390XMOVBZreg) 18663 v.AddArg(x) 18664 return true 18665 } 18666 } 18667 func rewriteBlockS390X(b *Block, config *Config) bool { 18668 switch b.Kind { 18669 case BlockS390XEQ: 18670 // match: (EQ (InvertFlags cmp) yes no) 18671 // cond: 18672 // result: (EQ cmp yes no) 18673 for { 18674 v := b.Control 18675 if v.Op != OpS390XInvertFlags { 18676 break 18677 } 18678 cmp := v.Args[0] 18679 yes := b.Succs[0] 18680 no := b.Succs[1] 18681 b.Kind = BlockS390XEQ 18682 b.SetControl(cmp) 18683 _ = yes 18684 _ = no 18685 return true 18686 } 18687 // match: (EQ (FlagEQ) yes no) 18688 // cond: 18689 // result: (First nil yes no) 18690 for { 18691 v := b.Control 18692 if v.Op != OpS390XFlagEQ { 18693 break 18694 } 18695 yes := b.Succs[0] 18696 no := b.Succs[1] 18697 b.Kind = BlockFirst 18698 b.SetControl(nil) 18699 _ = yes 18700 _ = no 18701 return true 18702 } 18703 // match: (EQ (FlagLT) yes no) 18704 // cond: 18705 // result: (First nil no yes) 18706 for { 18707 v := b.Control 18708 if v.Op != OpS390XFlagLT { 18709 break 18710 } 18711 yes := b.Succs[0] 18712 no := b.Succs[1] 18713 b.Kind = BlockFirst 18714 b.SetControl(nil) 18715 b.swapSuccessors() 18716 _ = no 18717 _ = yes 18718 return true 18719 } 18720 // match: (EQ (FlagGT) yes no) 18721 // cond: 18722 // result: (First nil no yes) 18723 for { 18724 v := b.Control 18725 if v.Op != OpS390XFlagGT { 18726 break 18727 } 18728 yes := b.Succs[0] 18729 no := b.Succs[1] 18730 b.Kind = BlockFirst 18731 b.SetControl(nil) 18732 b.swapSuccessors() 18733 _ = no 18734 _ = yes 18735 return true 18736 } 18737 case BlockS390XGE: 18738 // match: (GE (InvertFlags cmp) yes no) 18739 // cond: 18740 // result: (LE cmp yes no) 18741 for { 18742 v := b.Control 18743 if v.Op != OpS390XInvertFlags { 18744 break 18745 } 18746 cmp := v.Args[0] 18747 yes := b.Succs[0] 18748 no := b.Succs[1] 18749 b.Kind = BlockS390XLE 18750 b.SetControl(cmp) 18751 _ = yes 18752 _ = no 18753 return true 18754 } 18755 // match: (GE (FlagEQ) yes no) 18756 // cond: 18757 // result: (First nil yes no) 18758 for { 18759 v := b.Control 18760 if v.Op != OpS390XFlagEQ { 18761 break 18762 } 18763 yes := b.Succs[0] 18764 no := b.Succs[1] 18765 b.Kind = BlockFirst 18766 b.SetControl(nil) 18767 _ = yes 18768 _ = no 18769 return true 18770 } 18771 // match: (GE (FlagLT) yes no) 18772 // cond: 18773 // result: (First nil no yes) 18774 for { 18775 v := b.Control 18776 if v.Op != OpS390XFlagLT { 18777 break 18778 } 18779 yes := b.Succs[0] 18780 no := b.Succs[1] 18781 b.Kind = BlockFirst 18782 b.SetControl(nil) 18783 b.swapSuccessors() 18784 _ = no 18785 _ = yes 18786 return true 18787 } 18788 // match: (GE (FlagGT) yes no) 18789 // cond: 18790 // result: (First nil yes no) 18791 for { 18792 v := b.Control 18793 if v.Op != OpS390XFlagGT { 18794 break 18795 } 18796 yes := b.Succs[0] 18797 no := b.Succs[1] 18798 b.Kind = BlockFirst 18799 b.SetControl(nil) 18800 _ = yes 18801 _ = no 18802 return true 18803 } 18804 case BlockS390XGT: 18805 // match: (GT (InvertFlags cmp) yes no) 18806 // cond: 18807 // result: (LT cmp yes no) 18808 for { 18809 v := b.Control 18810 if v.Op != OpS390XInvertFlags { 18811 break 18812 } 18813 cmp := v.Args[0] 18814 yes := b.Succs[0] 18815 no := b.Succs[1] 18816 b.Kind = BlockS390XLT 18817 b.SetControl(cmp) 18818 _ = yes 18819 _ = no 18820 return true 18821 } 18822 // match: (GT (FlagEQ) yes no) 18823 // cond: 18824 // result: (First nil no yes) 18825 for { 18826 v := b.Control 18827 if v.Op != OpS390XFlagEQ { 18828 break 18829 } 18830 yes := b.Succs[0] 18831 no := b.Succs[1] 18832 b.Kind = BlockFirst 18833 b.SetControl(nil) 18834 b.swapSuccessors() 18835 _ = no 18836 _ = yes 18837 return true 18838 } 18839 // match: (GT (FlagLT) yes no) 18840 // cond: 18841 // result: (First nil no yes) 18842 for { 18843 v := b.Control 18844 if v.Op != OpS390XFlagLT { 18845 break 18846 } 18847 yes := b.Succs[0] 18848 no := b.Succs[1] 18849 b.Kind = BlockFirst 18850 b.SetControl(nil) 18851 b.swapSuccessors() 18852 _ = no 18853 _ = yes 18854 return true 18855 } 18856 // match: (GT (FlagGT) yes no) 18857 // cond: 18858 // result: (First nil yes no) 18859 for { 18860 v := b.Control 18861 if v.Op != OpS390XFlagGT { 18862 break 18863 } 18864 yes := b.Succs[0] 18865 no := b.Succs[1] 18866 b.Kind = BlockFirst 18867 b.SetControl(nil) 18868 _ = yes 18869 _ = no 18870 return true 18871 } 18872 case BlockIf: 18873 // match: (If (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18874 // cond: 18875 // result: (LT cmp yes no) 18876 for { 18877 v := b.Control 18878 if v.Op != OpS390XMOVDLT { 18879 break 18880 } 18881 v_0 := v.Args[0] 18882 if v_0.Op != OpS390XMOVDconst { 18883 break 18884 } 18885 if v_0.AuxInt != 0 { 18886 break 18887 } 18888 v_1 := v.Args[1] 18889 if v_1.Op != OpS390XMOVDconst { 18890 break 18891 } 18892 if v_1.AuxInt != 1 { 18893 break 18894 } 18895 cmp := v.Args[2] 18896 yes := b.Succs[0] 18897 no := b.Succs[1] 18898 b.Kind = BlockS390XLT 18899 b.SetControl(cmp) 18900 _ = yes 18901 _ = no 18902 return true 18903 } 18904 // match: (If (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18905 // cond: 18906 // result: (LE cmp yes no) 18907 for { 18908 v := b.Control 18909 if v.Op != OpS390XMOVDLE { 18910 break 18911 } 18912 v_0 := v.Args[0] 18913 if v_0.Op != OpS390XMOVDconst { 18914 break 18915 } 18916 if v_0.AuxInt != 0 { 18917 break 18918 } 18919 v_1 := v.Args[1] 18920 if v_1.Op != OpS390XMOVDconst { 18921 break 18922 } 18923 if v_1.AuxInt != 1 { 18924 break 18925 } 18926 cmp := v.Args[2] 18927 yes := b.Succs[0] 18928 no := b.Succs[1] 18929 b.Kind = BlockS390XLE 18930 b.SetControl(cmp) 18931 _ = yes 18932 _ = no 18933 return true 18934 } 18935 // match: (If (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18936 // cond: 18937 // result: (GT cmp yes no) 18938 for { 18939 v := b.Control 18940 if v.Op != OpS390XMOVDGT { 18941 break 18942 } 18943 v_0 := v.Args[0] 18944 if v_0.Op != OpS390XMOVDconst { 18945 break 18946 } 18947 if v_0.AuxInt != 0 { 18948 break 18949 } 18950 v_1 := v.Args[1] 18951 if v_1.Op != OpS390XMOVDconst { 18952 break 18953 } 18954 if v_1.AuxInt != 1 { 18955 break 18956 } 18957 cmp := v.Args[2] 18958 yes := b.Succs[0] 18959 no := b.Succs[1] 18960 b.Kind = BlockS390XGT 18961 b.SetControl(cmp) 18962 _ = yes 18963 _ = no 18964 return true 18965 } 18966 // match: (If (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18967 // cond: 18968 // result: (GE cmp yes no) 18969 for { 18970 v := b.Control 18971 if v.Op != OpS390XMOVDGE { 18972 break 18973 } 18974 v_0 := v.Args[0] 18975 if v_0.Op != OpS390XMOVDconst { 18976 break 18977 } 18978 if v_0.AuxInt != 0 { 18979 break 18980 } 18981 v_1 := v.Args[1] 18982 if v_1.Op != OpS390XMOVDconst { 18983 break 18984 } 18985 if v_1.AuxInt != 1 { 18986 break 18987 } 18988 cmp := v.Args[2] 18989 yes := b.Succs[0] 18990 no := b.Succs[1] 18991 b.Kind = BlockS390XGE 18992 b.SetControl(cmp) 18993 _ = yes 18994 _ = no 18995 return true 18996 } 18997 // match: (If (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18998 // cond: 18999 // result: (EQ cmp yes no) 19000 for { 19001 v := b.Control 19002 if v.Op != OpS390XMOVDEQ { 19003 break 19004 } 19005 v_0 := v.Args[0] 19006 if v_0.Op != OpS390XMOVDconst { 19007 break 19008 } 19009 if v_0.AuxInt != 0 { 19010 break 19011 } 19012 v_1 := v.Args[1] 19013 if v_1.Op != OpS390XMOVDconst { 19014 break 19015 } 19016 if v_1.AuxInt != 1 { 19017 break 19018 } 19019 cmp := v.Args[2] 19020 yes := b.Succs[0] 19021 no := b.Succs[1] 19022 b.Kind = BlockS390XEQ 19023 b.SetControl(cmp) 19024 _ = yes 19025 _ = no 19026 return true 19027 } 19028 // match: (If (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 19029 // cond: 19030 // result: (NE cmp yes no) 19031 for { 19032 v := b.Control 19033 if v.Op != OpS390XMOVDNE { 19034 break 19035 } 19036 v_0 := v.Args[0] 19037 if v_0.Op != OpS390XMOVDconst { 19038 break 19039 } 19040 if v_0.AuxInt != 0 { 19041 break 19042 } 19043 v_1 := v.Args[1] 19044 if v_1.Op != OpS390XMOVDconst { 19045 break 19046 } 19047 if v_1.AuxInt != 1 { 19048 break 19049 } 19050 cmp := v.Args[2] 19051 yes := b.Succs[0] 19052 no := b.Succs[1] 19053 b.Kind = BlockS390XNE 19054 b.SetControl(cmp) 19055 _ = yes 19056 _ = no 19057 return true 19058 } 19059 // match: (If (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 19060 // cond: 19061 // result: (GTF cmp yes no) 19062 for { 19063 v := b.Control 19064 if v.Op != OpS390XMOVDGTnoinv { 19065 break 19066 } 19067 v_0 := v.Args[0] 19068 if v_0.Op != OpS390XMOVDconst { 19069 break 19070 } 19071 if v_0.AuxInt != 0 { 19072 break 19073 } 19074 v_1 := v.Args[1] 19075 if v_1.Op != OpS390XMOVDconst { 19076 break 19077 } 19078 if v_1.AuxInt != 1 { 19079 break 19080 } 19081 cmp := v.Args[2] 19082 yes := b.Succs[0] 19083 no := b.Succs[1] 19084 b.Kind = BlockS390XGTF 19085 b.SetControl(cmp) 19086 _ = yes 19087 _ = no 19088 return true 19089 } 19090 // match: (If (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 19091 // cond: 19092 // result: (GEF cmp yes no) 19093 for { 19094 v := b.Control 19095 if v.Op != OpS390XMOVDGEnoinv { 19096 break 19097 } 19098 v_0 := v.Args[0] 19099 if v_0.Op != OpS390XMOVDconst { 19100 break 19101 } 19102 if v_0.AuxInt != 0 { 19103 break 19104 } 19105 v_1 := v.Args[1] 19106 if v_1.Op != OpS390XMOVDconst { 19107 break 19108 } 19109 if v_1.AuxInt != 1 { 19110 break 19111 } 19112 cmp := v.Args[2] 19113 yes := b.Succs[0] 19114 no := b.Succs[1] 19115 b.Kind = BlockS390XGEF 19116 b.SetControl(cmp) 19117 _ = yes 19118 _ = no 19119 return true 19120 } 19121 // match: (If cond yes no) 19122 // cond: 19123 // result: (NE (CMPWconst [0] (MOVBZreg cond)) yes no) 19124 for { 19125 v := b.Control 19126 _ = v 19127 cond := b.Control 19128 yes := b.Succs[0] 19129 no := b.Succs[1] 19130 b.Kind = BlockS390XNE 19131 v0 := b.NewValue0(v.Pos, OpS390XCMPWconst, TypeFlags) 19132 v0.AuxInt = 0 19133 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 19134 v1.AddArg(cond) 19135 v0.AddArg(v1) 19136 b.SetControl(v0) 19137 _ = yes 19138 _ = no 19139 return true 19140 } 19141 case BlockS390XLE: 19142 // match: (LE (InvertFlags cmp) yes no) 19143 // cond: 19144 // result: (GE cmp yes no) 19145 for { 19146 v := b.Control 19147 if v.Op != OpS390XInvertFlags { 19148 break 19149 } 19150 cmp := v.Args[0] 19151 yes := b.Succs[0] 19152 no := b.Succs[1] 19153 b.Kind = BlockS390XGE 19154 b.SetControl(cmp) 19155 _ = yes 19156 _ = no 19157 return true 19158 } 19159 // match: (LE (FlagEQ) yes no) 19160 // cond: 19161 // result: (First nil yes no) 19162 for { 19163 v := b.Control 19164 if v.Op != OpS390XFlagEQ { 19165 break 19166 } 19167 yes := b.Succs[0] 19168 no := b.Succs[1] 19169 b.Kind = BlockFirst 19170 b.SetControl(nil) 19171 _ = yes 19172 _ = no 19173 return true 19174 } 19175 // match: (LE (FlagLT) yes no) 19176 // cond: 19177 // result: (First nil yes no) 19178 for { 19179 v := b.Control 19180 if v.Op != OpS390XFlagLT { 19181 break 19182 } 19183 yes := b.Succs[0] 19184 no := b.Succs[1] 19185 b.Kind = BlockFirst 19186 b.SetControl(nil) 19187 _ = yes 19188 _ = no 19189 return true 19190 } 19191 // match: (LE (FlagGT) yes no) 19192 // cond: 19193 // result: (First nil no yes) 19194 for { 19195 v := b.Control 19196 if v.Op != OpS390XFlagGT { 19197 break 19198 } 19199 yes := b.Succs[0] 19200 no := b.Succs[1] 19201 b.Kind = BlockFirst 19202 b.SetControl(nil) 19203 b.swapSuccessors() 19204 _ = no 19205 _ = yes 19206 return true 19207 } 19208 case BlockS390XLT: 19209 // match: (LT (InvertFlags cmp) yes no) 19210 // cond: 19211 // result: (GT cmp yes no) 19212 for { 19213 v := b.Control 19214 if v.Op != OpS390XInvertFlags { 19215 break 19216 } 19217 cmp := v.Args[0] 19218 yes := b.Succs[0] 19219 no := b.Succs[1] 19220 b.Kind = BlockS390XGT 19221 b.SetControl(cmp) 19222 _ = yes 19223 _ = no 19224 return true 19225 } 19226 // match: (LT (FlagEQ) yes no) 19227 // cond: 19228 // result: (First nil no yes) 19229 for { 19230 v := b.Control 19231 if v.Op != OpS390XFlagEQ { 19232 break 19233 } 19234 yes := b.Succs[0] 19235 no := b.Succs[1] 19236 b.Kind = BlockFirst 19237 b.SetControl(nil) 19238 b.swapSuccessors() 19239 _ = no 19240 _ = yes 19241 return true 19242 } 19243 // match: (LT (FlagLT) yes no) 19244 // cond: 19245 // result: (First nil yes no) 19246 for { 19247 v := b.Control 19248 if v.Op != OpS390XFlagLT { 19249 break 19250 } 19251 yes := b.Succs[0] 19252 no := b.Succs[1] 19253 b.Kind = BlockFirst 19254 b.SetControl(nil) 19255 _ = yes 19256 _ = no 19257 return true 19258 } 19259 // match: (LT (FlagGT) yes no) 19260 // cond: 19261 // result: (First nil no yes) 19262 for { 19263 v := b.Control 19264 if v.Op != OpS390XFlagGT { 19265 break 19266 } 19267 yes := b.Succs[0] 19268 no := b.Succs[1] 19269 b.Kind = BlockFirst 19270 b.SetControl(nil) 19271 b.swapSuccessors() 19272 _ = no 19273 _ = yes 19274 return true 19275 } 19276 case BlockS390XNE: 19277 // match: (NE (CMPWconst [0] (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 19278 // cond: 19279 // result: (LT cmp yes no) 19280 for { 19281 v := b.Control 19282 if v.Op != OpS390XCMPWconst { 19283 break 19284 } 19285 if v.AuxInt != 0 { 19286 break 19287 } 19288 v_0 := v.Args[0] 19289 if v_0.Op != OpS390XMOVDLT { 19290 break 19291 } 19292 v_0_0 := v_0.Args[0] 19293 if v_0_0.Op != OpS390XMOVDconst { 19294 break 19295 } 19296 if v_0_0.AuxInt != 0 { 19297 break 19298 } 19299 v_0_1 := v_0.Args[1] 19300 if v_0_1.Op != OpS390XMOVDconst { 19301 break 19302 } 19303 if v_0_1.AuxInt != 1 { 19304 break 19305 } 19306 cmp := v_0.Args[2] 19307 yes := b.Succs[0] 19308 no := b.Succs[1] 19309 b.Kind = BlockS390XLT 19310 b.SetControl(cmp) 19311 _ = yes 19312 _ = no 19313 return true 19314 } 19315 // match: (NE (CMPWconst [0] (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 19316 // cond: 19317 // result: (LE cmp yes no) 19318 for { 19319 v := b.Control 19320 if v.Op != OpS390XCMPWconst { 19321 break 19322 } 19323 if v.AuxInt != 0 { 19324 break 19325 } 19326 v_0 := v.Args[0] 19327 if v_0.Op != OpS390XMOVDLE { 19328 break 19329 } 19330 v_0_0 := v_0.Args[0] 19331 if v_0_0.Op != OpS390XMOVDconst { 19332 break 19333 } 19334 if v_0_0.AuxInt != 0 { 19335 break 19336 } 19337 v_0_1 := v_0.Args[1] 19338 if v_0_1.Op != OpS390XMOVDconst { 19339 break 19340 } 19341 if v_0_1.AuxInt != 1 { 19342 break 19343 } 19344 cmp := v_0.Args[2] 19345 yes := b.Succs[0] 19346 no := b.Succs[1] 19347 b.Kind = BlockS390XLE 19348 b.SetControl(cmp) 19349 _ = yes 19350 _ = no 19351 return true 19352 } 19353 // match: (NE (CMPWconst [0] (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 19354 // cond: 19355 // result: (GT cmp yes no) 19356 for { 19357 v := b.Control 19358 if v.Op != OpS390XCMPWconst { 19359 break 19360 } 19361 if v.AuxInt != 0 { 19362 break 19363 } 19364 v_0 := v.Args[0] 19365 if v_0.Op != OpS390XMOVDGT { 19366 break 19367 } 19368 v_0_0 := v_0.Args[0] 19369 if v_0_0.Op != OpS390XMOVDconst { 19370 break 19371 } 19372 if v_0_0.AuxInt != 0 { 19373 break 19374 } 19375 v_0_1 := v_0.Args[1] 19376 if v_0_1.Op != OpS390XMOVDconst { 19377 break 19378 } 19379 if v_0_1.AuxInt != 1 { 19380 break 19381 } 19382 cmp := v_0.Args[2] 19383 yes := b.Succs[0] 19384 no := b.Succs[1] 19385 b.Kind = BlockS390XGT 19386 b.SetControl(cmp) 19387 _ = yes 19388 _ = no 19389 return true 19390 } 19391 // match: (NE (CMPWconst [0] (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 19392 // cond: 19393 // result: (GE cmp yes no) 19394 for { 19395 v := b.Control 19396 if v.Op != OpS390XCMPWconst { 19397 break 19398 } 19399 if v.AuxInt != 0 { 19400 break 19401 } 19402 v_0 := v.Args[0] 19403 if v_0.Op != OpS390XMOVDGE { 19404 break 19405 } 19406 v_0_0 := v_0.Args[0] 19407 if v_0_0.Op != OpS390XMOVDconst { 19408 break 19409 } 19410 if v_0_0.AuxInt != 0 { 19411 break 19412 } 19413 v_0_1 := v_0.Args[1] 19414 if v_0_1.Op != OpS390XMOVDconst { 19415 break 19416 } 19417 if v_0_1.AuxInt != 1 { 19418 break 19419 } 19420 cmp := v_0.Args[2] 19421 yes := b.Succs[0] 19422 no := b.Succs[1] 19423 b.Kind = BlockS390XGE 19424 b.SetControl(cmp) 19425 _ = yes 19426 _ = no 19427 return true 19428 } 19429 // match: (NE (CMPWconst [0] (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 19430 // cond: 19431 // result: (EQ cmp yes no) 19432 for { 19433 v := b.Control 19434 if v.Op != OpS390XCMPWconst { 19435 break 19436 } 19437 if v.AuxInt != 0 { 19438 break 19439 } 19440 v_0 := v.Args[0] 19441 if v_0.Op != OpS390XMOVDEQ { 19442 break 19443 } 19444 v_0_0 := v_0.Args[0] 19445 if v_0_0.Op != OpS390XMOVDconst { 19446 break 19447 } 19448 if v_0_0.AuxInt != 0 { 19449 break 19450 } 19451 v_0_1 := v_0.Args[1] 19452 if v_0_1.Op != OpS390XMOVDconst { 19453 break 19454 } 19455 if v_0_1.AuxInt != 1 { 19456 break 19457 } 19458 cmp := v_0.Args[2] 19459 yes := b.Succs[0] 19460 no := b.Succs[1] 19461 b.Kind = BlockS390XEQ 19462 b.SetControl(cmp) 19463 _ = yes 19464 _ = no 19465 return true 19466 } 19467 // match: (NE (CMPWconst [0] (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 19468 // cond: 19469 // result: (NE cmp yes no) 19470 for { 19471 v := b.Control 19472 if v.Op != OpS390XCMPWconst { 19473 break 19474 } 19475 if v.AuxInt != 0 { 19476 break 19477 } 19478 v_0 := v.Args[0] 19479 if v_0.Op != OpS390XMOVDNE { 19480 break 19481 } 19482 v_0_0 := v_0.Args[0] 19483 if v_0_0.Op != OpS390XMOVDconst { 19484 break 19485 } 19486 if v_0_0.AuxInt != 0 { 19487 break 19488 } 19489 v_0_1 := v_0.Args[1] 19490 if v_0_1.Op != OpS390XMOVDconst { 19491 break 19492 } 19493 if v_0_1.AuxInt != 1 { 19494 break 19495 } 19496 cmp := v_0.Args[2] 19497 yes := b.Succs[0] 19498 no := b.Succs[1] 19499 b.Kind = BlockS390XNE 19500 b.SetControl(cmp) 19501 _ = yes 19502 _ = no 19503 return true 19504 } 19505 // match: (NE (CMPWconst [0] (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 19506 // cond: 19507 // result: (GTF cmp yes no) 19508 for { 19509 v := b.Control 19510 if v.Op != OpS390XCMPWconst { 19511 break 19512 } 19513 if v.AuxInt != 0 { 19514 break 19515 } 19516 v_0 := v.Args[0] 19517 if v_0.Op != OpS390XMOVDGTnoinv { 19518 break 19519 } 19520 v_0_0 := v_0.Args[0] 19521 if v_0_0.Op != OpS390XMOVDconst { 19522 break 19523 } 19524 if v_0_0.AuxInt != 0 { 19525 break 19526 } 19527 v_0_1 := v_0.Args[1] 19528 if v_0_1.Op != OpS390XMOVDconst { 19529 break 19530 } 19531 if v_0_1.AuxInt != 1 { 19532 break 19533 } 19534 cmp := v_0.Args[2] 19535 yes := b.Succs[0] 19536 no := b.Succs[1] 19537 b.Kind = BlockS390XGTF 19538 b.SetControl(cmp) 19539 _ = yes 19540 _ = no 19541 return true 19542 } 19543 // match: (NE (CMPWconst [0] (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 19544 // cond: 19545 // result: (GEF cmp yes no) 19546 for { 19547 v := b.Control 19548 if v.Op != OpS390XCMPWconst { 19549 break 19550 } 19551 if v.AuxInt != 0 { 19552 break 19553 } 19554 v_0 := v.Args[0] 19555 if v_0.Op != OpS390XMOVDGEnoinv { 19556 break 19557 } 19558 v_0_0 := v_0.Args[0] 19559 if v_0_0.Op != OpS390XMOVDconst { 19560 break 19561 } 19562 if v_0_0.AuxInt != 0 { 19563 break 19564 } 19565 v_0_1 := v_0.Args[1] 19566 if v_0_1.Op != OpS390XMOVDconst { 19567 break 19568 } 19569 if v_0_1.AuxInt != 1 { 19570 break 19571 } 19572 cmp := v_0.Args[2] 19573 yes := b.Succs[0] 19574 no := b.Succs[1] 19575 b.Kind = BlockS390XGEF 19576 b.SetControl(cmp) 19577 _ = yes 19578 _ = no 19579 return true 19580 } 19581 // match: (NE (InvertFlags cmp) yes no) 19582 // cond: 19583 // result: (NE cmp yes no) 19584 for { 19585 v := b.Control 19586 if v.Op != OpS390XInvertFlags { 19587 break 19588 } 19589 cmp := v.Args[0] 19590 yes := b.Succs[0] 19591 no := b.Succs[1] 19592 b.Kind = BlockS390XNE 19593 b.SetControl(cmp) 19594 _ = yes 19595 _ = no 19596 return true 19597 } 19598 // match: (NE (FlagEQ) yes no) 19599 // cond: 19600 // result: (First nil no yes) 19601 for { 19602 v := b.Control 19603 if v.Op != OpS390XFlagEQ { 19604 break 19605 } 19606 yes := b.Succs[0] 19607 no := b.Succs[1] 19608 b.Kind = BlockFirst 19609 b.SetControl(nil) 19610 b.swapSuccessors() 19611 _ = no 19612 _ = yes 19613 return true 19614 } 19615 // match: (NE (FlagLT) yes no) 19616 // cond: 19617 // result: (First nil yes no) 19618 for { 19619 v := b.Control 19620 if v.Op != OpS390XFlagLT { 19621 break 19622 } 19623 yes := b.Succs[0] 19624 no := b.Succs[1] 19625 b.Kind = BlockFirst 19626 b.SetControl(nil) 19627 _ = yes 19628 _ = no 19629 return true 19630 } 19631 // match: (NE (FlagGT) yes no) 19632 // cond: 19633 // result: (First nil yes no) 19634 for { 19635 v := b.Control 19636 if v.Op != OpS390XFlagGT { 19637 break 19638 } 19639 yes := b.Succs[0] 19640 no := b.Succs[1] 19641 b.Kind = BlockFirst 19642 b.SetControl(nil) 19643 _ = yes 19644 _ = no 19645 return true 19646 } 19647 } 19648 return false 19649 }