github.com/razvanm/vanadium-go-1.3@v0.0.0-20160721203343-4a65068e5915/src/cmd/5g/opt.h (about) 1 // Inferno utils/5c/gc.h 2 // http://code.google.com/p/inferno-os/source/browse/utils/5c/gc.h 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 6 // Portions Copyright © 1997-1999 Vita Nuova Limited 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright © 2004,2006 Bruce Ellis 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright © 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 #include "../gc/popt.h" 32 33 #define Z N 34 #define Adr Addr 35 36 #define D_HI D_NONE 37 #define D_LO D_NONE 38 39 #define BLOAD(r) band(bnot(r->refbehind), r->refahead) 40 #define BSTORE(r) band(bnot(r->calbehind), r->calahead) 41 #define LOAD(r) (~r->refbehind.b[z] & r->refahead.b[z]) 42 #define STORE(r) (~r->calbehind.b[z] & r->calahead.b[z]) 43 44 #define CLOAD 5 45 #define CREF 5 46 #define CINF 1000 47 #define LOOP 3 48 49 typedef struct Reg Reg; 50 typedef struct Rgn Rgn; 51 52 /*c2go 53 extern Node *Z; 54 enum 55 { 56 D_HI = D_NONE, 57 D_LO = D_NONE, 58 CLOAD = 5, 59 CREF = 5, 60 CINF = 1000, 61 LOOP = 3, 62 }; 63 64 uint32 BLOAD(Reg*); 65 uint32 BSTORE(Reg*); 66 uint32 LOAD(Reg*); 67 uint32 STORE(Reg*); 68 */ 69 70 // A Reg is a wrapper around a single Prog (one instruction) that holds 71 // register optimization information while the optimizer runs. 72 // r->prog is the instruction. 73 // r->prog->opt points back to r. 74 struct Reg 75 { 76 Flow f; 77 78 Bits set; // variables written by this instruction. 79 Bits use1; // variables read by prog->from. 80 Bits use2; // variables read by prog->to. 81 82 Bits refbehind; 83 Bits refahead; 84 Bits calbehind; 85 Bits calahead; 86 Bits regdiff; 87 Bits act; 88 89 int32 regu; // register used bitmap 90 }; 91 #define R ((Reg*)0) 92 /*c2go extern Reg *R; */ 93 94 #define NRGN 600 95 /*c2go enum { NRGN = 600 }; */ 96 struct Rgn 97 { 98 Reg* enter; 99 short cost; 100 short varno; 101 short regno; 102 }; 103 104 EXTERN int32 exregoffset; // not set 105 EXTERN int32 exfregoffset; // not set 106 EXTERN Reg zreg; 107 EXTERN Reg* freer; 108 EXTERN Reg** rpo2r; 109 EXTERN Rgn region[NRGN]; 110 EXTERN Rgn* rgp; 111 EXTERN int nregion; 112 EXTERN int nvar; 113 EXTERN int32 regbits; 114 EXTERN int32 exregbits; 115 EXTERN Bits externs; 116 EXTERN Bits params; 117 EXTERN Bits consts; 118 EXTERN Bits addrs; 119 EXTERN Bits ivar; 120 EXTERN Bits ovar; 121 EXTERN int change; 122 EXTERN int32 maxnr; 123 EXTERN int32* idom; 124 125 EXTERN struct 126 { 127 int32 ncvtreg; 128 int32 nspill; 129 int32 nreload; 130 int32 ndelmov; 131 int32 nvar; 132 int32 naddr; 133 } ostats; 134 135 /* 136 * reg.c 137 */ 138 Reg* rega(void); 139 int rcmp(const void*, const void*); 140 void regopt(Prog*); 141 void addmove(Reg*, int, int, int); 142 Bits mkvar(Reg *r, Adr *a); 143 void prop(Reg*, Bits, Bits); 144 void synch(Reg*, Bits); 145 uint32 allreg(uint32, Rgn*); 146 void paint1(Reg*, int); 147 uint32 paint2(Reg*, int); 148 void paint3(Reg*, int, int32, int); 149 void addreg(Adr*, int); 150 void dumpit(char *str, Flow *r0, int); 151 152 /* 153 * peep.c 154 */ 155 void peep(Prog*); 156 void excise(Flow*); 157 int copyu(Prog*, Adr*, Adr*); 158 159 int32 RtoB(int); 160 int32 FtoB(int); 161 int BtoR(int32); 162 int BtoF(int32); 163 164 /* 165 * prog.c 166 */ 167 typedef struct ProgInfo ProgInfo; 168 struct ProgInfo 169 { 170 uint32 flags; // the bits below 171 }; 172 173 enum 174 { 175 // Pseudo-op, like TEXT, GLOBL, TYPE, PCDATA, FUNCDATA. 176 Pseudo = 1<<1, 177 178 // There's nothing to say about the instruction, 179 // but it's still okay to see. 180 OK = 1<<2, 181 182 // Size of right-side write, or right-side read if no write. 183 SizeB = 1<<3, 184 SizeW = 1<<4, 185 SizeL = 1<<5, 186 SizeQ = 1<<6, 187 SizeF = 1<<7, // float aka float32 188 SizeD = 1<<8, // double aka float64 189 190 // Left side: address taken, read, write. 191 LeftAddr = 1<<9, 192 LeftRead = 1<<10, 193 LeftWrite = 1<<11, 194 195 // Register in middle; never written. 196 RegRead = 1<<12, 197 CanRegRead = 1<<13, 198 199 // Right side: address taken, read, write. 200 RightAddr = 1<<14, 201 RightRead = 1<<15, 202 RightWrite = 1<<16, 203 204 // Instruction kinds 205 Move = 1<<17, // straight move 206 Conv = 1<<18, // size conversion 207 Cjmp = 1<<19, // conditional jump 208 Break = 1<<20, // breaks control flow (no fallthrough) 209 Call = 1<<21, // function call 210 Jump = 1<<22, // jump 211 Skip = 1<<23, // data instruction 212 }; 213 214 void proginfo(ProgInfo*, Prog*); 215 216 // To allow use of AJMP and ACALL in ../gc/popt.c. 217 enum 218 { 219 AJMP = AB, 220 ACALL = ABL, 221 };