github.com/riscv/riscv-go@v0.0.0-20200123204226-124ebd6fcc8e/src/cmd/compile/internal/ssa/rewriteS390X.go (about) 1 // autogenerated from gen/S390X.rules: do not edit! 2 // generated with: cd gen; go run *.go 3 4 package ssa 5 6 import "math" 7 8 var _ = math.MinInt8 // in case not otherwise used 9 func rewriteValueS390X(v *Value, config *Config) bool { 10 switch v.Op { 11 case OpAdd16: 12 return rewriteValueS390X_OpAdd16(v, config) 13 case OpAdd32: 14 return rewriteValueS390X_OpAdd32(v, config) 15 case OpAdd32F: 16 return rewriteValueS390X_OpAdd32F(v, config) 17 case OpAdd64: 18 return rewriteValueS390X_OpAdd64(v, config) 19 case OpAdd64F: 20 return rewriteValueS390X_OpAdd64F(v, config) 21 case OpAdd8: 22 return rewriteValueS390X_OpAdd8(v, config) 23 case OpAddPtr: 24 return rewriteValueS390X_OpAddPtr(v, config) 25 case OpAddr: 26 return rewriteValueS390X_OpAddr(v, config) 27 case OpAnd16: 28 return rewriteValueS390X_OpAnd16(v, config) 29 case OpAnd32: 30 return rewriteValueS390X_OpAnd32(v, config) 31 case OpAnd64: 32 return rewriteValueS390X_OpAnd64(v, config) 33 case OpAnd8: 34 return rewriteValueS390X_OpAnd8(v, config) 35 case OpAndB: 36 return rewriteValueS390X_OpAndB(v, config) 37 case OpAtomicAdd32: 38 return rewriteValueS390X_OpAtomicAdd32(v, config) 39 case OpAtomicAdd64: 40 return rewriteValueS390X_OpAtomicAdd64(v, config) 41 case OpAtomicCompareAndSwap32: 42 return rewriteValueS390X_OpAtomicCompareAndSwap32(v, config) 43 case OpAtomicCompareAndSwap64: 44 return rewriteValueS390X_OpAtomicCompareAndSwap64(v, config) 45 case OpAtomicExchange32: 46 return rewriteValueS390X_OpAtomicExchange32(v, config) 47 case OpAtomicExchange64: 48 return rewriteValueS390X_OpAtomicExchange64(v, config) 49 case OpAtomicLoad32: 50 return rewriteValueS390X_OpAtomicLoad32(v, config) 51 case OpAtomicLoad64: 52 return rewriteValueS390X_OpAtomicLoad64(v, config) 53 case OpAtomicLoadPtr: 54 return rewriteValueS390X_OpAtomicLoadPtr(v, config) 55 case OpAtomicStore32: 56 return rewriteValueS390X_OpAtomicStore32(v, config) 57 case OpAtomicStore64: 58 return rewriteValueS390X_OpAtomicStore64(v, config) 59 case OpAtomicStorePtrNoWB: 60 return rewriteValueS390X_OpAtomicStorePtrNoWB(v, config) 61 case OpAvg64u: 62 return rewriteValueS390X_OpAvg64u(v, config) 63 case OpBswap32: 64 return rewriteValueS390X_OpBswap32(v, config) 65 case OpBswap64: 66 return rewriteValueS390X_OpBswap64(v, config) 67 case OpClosureCall: 68 return rewriteValueS390X_OpClosureCall(v, config) 69 case OpCom16: 70 return rewriteValueS390X_OpCom16(v, config) 71 case OpCom32: 72 return rewriteValueS390X_OpCom32(v, config) 73 case OpCom64: 74 return rewriteValueS390X_OpCom64(v, config) 75 case OpCom8: 76 return rewriteValueS390X_OpCom8(v, config) 77 case OpConst16: 78 return rewriteValueS390X_OpConst16(v, config) 79 case OpConst32: 80 return rewriteValueS390X_OpConst32(v, config) 81 case OpConst32F: 82 return rewriteValueS390X_OpConst32F(v, config) 83 case OpConst64: 84 return rewriteValueS390X_OpConst64(v, config) 85 case OpConst64F: 86 return rewriteValueS390X_OpConst64F(v, config) 87 case OpConst8: 88 return rewriteValueS390X_OpConst8(v, config) 89 case OpConstBool: 90 return rewriteValueS390X_OpConstBool(v, config) 91 case OpConstNil: 92 return rewriteValueS390X_OpConstNil(v, config) 93 case OpConvert: 94 return rewriteValueS390X_OpConvert(v, config) 95 case OpCtz32: 96 return rewriteValueS390X_OpCtz32(v, config) 97 case OpCtz64: 98 return rewriteValueS390X_OpCtz64(v, config) 99 case OpCvt32Fto32: 100 return rewriteValueS390X_OpCvt32Fto32(v, config) 101 case OpCvt32Fto64: 102 return rewriteValueS390X_OpCvt32Fto64(v, config) 103 case OpCvt32Fto64F: 104 return rewriteValueS390X_OpCvt32Fto64F(v, config) 105 case OpCvt32to32F: 106 return rewriteValueS390X_OpCvt32to32F(v, config) 107 case OpCvt32to64F: 108 return rewriteValueS390X_OpCvt32to64F(v, config) 109 case OpCvt64Fto32: 110 return rewriteValueS390X_OpCvt64Fto32(v, config) 111 case OpCvt64Fto32F: 112 return rewriteValueS390X_OpCvt64Fto32F(v, config) 113 case OpCvt64Fto64: 114 return rewriteValueS390X_OpCvt64Fto64(v, config) 115 case OpCvt64to32F: 116 return rewriteValueS390X_OpCvt64to32F(v, config) 117 case OpCvt64to64F: 118 return rewriteValueS390X_OpCvt64to64F(v, config) 119 case OpDeferCall: 120 return rewriteValueS390X_OpDeferCall(v, config) 121 case OpDiv16: 122 return rewriteValueS390X_OpDiv16(v, config) 123 case OpDiv16u: 124 return rewriteValueS390X_OpDiv16u(v, config) 125 case OpDiv32: 126 return rewriteValueS390X_OpDiv32(v, config) 127 case OpDiv32F: 128 return rewriteValueS390X_OpDiv32F(v, config) 129 case OpDiv32u: 130 return rewriteValueS390X_OpDiv32u(v, config) 131 case OpDiv64: 132 return rewriteValueS390X_OpDiv64(v, config) 133 case OpDiv64F: 134 return rewriteValueS390X_OpDiv64F(v, config) 135 case OpDiv64u: 136 return rewriteValueS390X_OpDiv64u(v, config) 137 case OpDiv8: 138 return rewriteValueS390X_OpDiv8(v, config) 139 case OpDiv8u: 140 return rewriteValueS390X_OpDiv8u(v, config) 141 case OpEq16: 142 return rewriteValueS390X_OpEq16(v, config) 143 case OpEq32: 144 return rewriteValueS390X_OpEq32(v, config) 145 case OpEq32F: 146 return rewriteValueS390X_OpEq32F(v, config) 147 case OpEq64: 148 return rewriteValueS390X_OpEq64(v, config) 149 case OpEq64F: 150 return rewriteValueS390X_OpEq64F(v, config) 151 case OpEq8: 152 return rewriteValueS390X_OpEq8(v, config) 153 case OpEqB: 154 return rewriteValueS390X_OpEqB(v, config) 155 case OpEqPtr: 156 return rewriteValueS390X_OpEqPtr(v, config) 157 case OpGeq16: 158 return rewriteValueS390X_OpGeq16(v, config) 159 case OpGeq16U: 160 return rewriteValueS390X_OpGeq16U(v, config) 161 case OpGeq32: 162 return rewriteValueS390X_OpGeq32(v, config) 163 case OpGeq32F: 164 return rewriteValueS390X_OpGeq32F(v, config) 165 case OpGeq32U: 166 return rewriteValueS390X_OpGeq32U(v, config) 167 case OpGeq64: 168 return rewriteValueS390X_OpGeq64(v, config) 169 case OpGeq64F: 170 return rewriteValueS390X_OpGeq64F(v, config) 171 case OpGeq64U: 172 return rewriteValueS390X_OpGeq64U(v, config) 173 case OpGeq8: 174 return rewriteValueS390X_OpGeq8(v, config) 175 case OpGeq8U: 176 return rewriteValueS390X_OpGeq8U(v, config) 177 case OpGetClosurePtr: 178 return rewriteValueS390X_OpGetClosurePtr(v, config) 179 case OpGetG: 180 return rewriteValueS390X_OpGetG(v, config) 181 case OpGoCall: 182 return rewriteValueS390X_OpGoCall(v, config) 183 case OpGreater16: 184 return rewriteValueS390X_OpGreater16(v, config) 185 case OpGreater16U: 186 return rewriteValueS390X_OpGreater16U(v, config) 187 case OpGreater32: 188 return rewriteValueS390X_OpGreater32(v, config) 189 case OpGreater32F: 190 return rewriteValueS390X_OpGreater32F(v, config) 191 case OpGreater32U: 192 return rewriteValueS390X_OpGreater32U(v, config) 193 case OpGreater64: 194 return rewriteValueS390X_OpGreater64(v, config) 195 case OpGreater64F: 196 return rewriteValueS390X_OpGreater64F(v, config) 197 case OpGreater64U: 198 return rewriteValueS390X_OpGreater64U(v, config) 199 case OpGreater8: 200 return rewriteValueS390X_OpGreater8(v, config) 201 case OpGreater8U: 202 return rewriteValueS390X_OpGreater8U(v, config) 203 case OpHmul16: 204 return rewriteValueS390X_OpHmul16(v, config) 205 case OpHmul16u: 206 return rewriteValueS390X_OpHmul16u(v, config) 207 case OpHmul32: 208 return rewriteValueS390X_OpHmul32(v, config) 209 case OpHmul32u: 210 return rewriteValueS390X_OpHmul32u(v, config) 211 case OpHmul64: 212 return rewriteValueS390X_OpHmul64(v, config) 213 case OpHmul64u: 214 return rewriteValueS390X_OpHmul64u(v, config) 215 case OpHmul8: 216 return rewriteValueS390X_OpHmul8(v, config) 217 case OpHmul8u: 218 return rewriteValueS390X_OpHmul8u(v, config) 219 case OpITab: 220 return rewriteValueS390X_OpITab(v, config) 221 case OpInterCall: 222 return rewriteValueS390X_OpInterCall(v, config) 223 case OpIsInBounds: 224 return rewriteValueS390X_OpIsInBounds(v, config) 225 case OpIsNonNil: 226 return rewriteValueS390X_OpIsNonNil(v, config) 227 case OpIsSliceInBounds: 228 return rewriteValueS390X_OpIsSliceInBounds(v, config) 229 case OpLeq16: 230 return rewriteValueS390X_OpLeq16(v, config) 231 case OpLeq16U: 232 return rewriteValueS390X_OpLeq16U(v, config) 233 case OpLeq32: 234 return rewriteValueS390X_OpLeq32(v, config) 235 case OpLeq32F: 236 return rewriteValueS390X_OpLeq32F(v, config) 237 case OpLeq32U: 238 return rewriteValueS390X_OpLeq32U(v, config) 239 case OpLeq64: 240 return rewriteValueS390X_OpLeq64(v, config) 241 case OpLeq64F: 242 return rewriteValueS390X_OpLeq64F(v, config) 243 case OpLeq64U: 244 return rewriteValueS390X_OpLeq64U(v, config) 245 case OpLeq8: 246 return rewriteValueS390X_OpLeq8(v, config) 247 case OpLeq8U: 248 return rewriteValueS390X_OpLeq8U(v, config) 249 case OpLess16: 250 return rewriteValueS390X_OpLess16(v, config) 251 case OpLess16U: 252 return rewriteValueS390X_OpLess16U(v, config) 253 case OpLess32: 254 return rewriteValueS390X_OpLess32(v, config) 255 case OpLess32F: 256 return rewriteValueS390X_OpLess32F(v, config) 257 case OpLess32U: 258 return rewriteValueS390X_OpLess32U(v, config) 259 case OpLess64: 260 return rewriteValueS390X_OpLess64(v, config) 261 case OpLess64F: 262 return rewriteValueS390X_OpLess64F(v, config) 263 case OpLess64U: 264 return rewriteValueS390X_OpLess64U(v, config) 265 case OpLess8: 266 return rewriteValueS390X_OpLess8(v, config) 267 case OpLess8U: 268 return rewriteValueS390X_OpLess8U(v, config) 269 case OpLoad: 270 return rewriteValueS390X_OpLoad(v, config) 271 case OpLsh16x16: 272 return rewriteValueS390X_OpLsh16x16(v, config) 273 case OpLsh16x32: 274 return rewriteValueS390X_OpLsh16x32(v, config) 275 case OpLsh16x64: 276 return rewriteValueS390X_OpLsh16x64(v, config) 277 case OpLsh16x8: 278 return rewriteValueS390X_OpLsh16x8(v, config) 279 case OpLsh32x16: 280 return rewriteValueS390X_OpLsh32x16(v, config) 281 case OpLsh32x32: 282 return rewriteValueS390X_OpLsh32x32(v, config) 283 case OpLsh32x64: 284 return rewriteValueS390X_OpLsh32x64(v, config) 285 case OpLsh32x8: 286 return rewriteValueS390X_OpLsh32x8(v, config) 287 case OpLsh64x16: 288 return rewriteValueS390X_OpLsh64x16(v, config) 289 case OpLsh64x32: 290 return rewriteValueS390X_OpLsh64x32(v, config) 291 case OpLsh64x64: 292 return rewriteValueS390X_OpLsh64x64(v, config) 293 case OpLsh64x8: 294 return rewriteValueS390X_OpLsh64x8(v, config) 295 case OpLsh8x16: 296 return rewriteValueS390X_OpLsh8x16(v, config) 297 case OpLsh8x32: 298 return rewriteValueS390X_OpLsh8x32(v, config) 299 case OpLsh8x64: 300 return rewriteValueS390X_OpLsh8x64(v, config) 301 case OpLsh8x8: 302 return rewriteValueS390X_OpLsh8x8(v, config) 303 case OpMod16: 304 return rewriteValueS390X_OpMod16(v, config) 305 case OpMod16u: 306 return rewriteValueS390X_OpMod16u(v, config) 307 case OpMod32: 308 return rewriteValueS390X_OpMod32(v, config) 309 case OpMod32u: 310 return rewriteValueS390X_OpMod32u(v, config) 311 case OpMod64: 312 return rewriteValueS390X_OpMod64(v, config) 313 case OpMod64u: 314 return rewriteValueS390X_OpMod64u(v, config) 315 case OpMod8: 316 return rewriteValueS390X_OpMod8(v, config) 317 case OpMod8u: 318 return rewriteValueS390X_OpMod8u(v, config) 319 case OpMove: 320 return rewriteValueS390X_OpMove(v, config) 321 case OpMul16: 322 return rewriteValueS390X_OpMul16(v, config) 323 case OpMul32: 324 return rewriteValueS390X_OpMul32(v, config) 325 case OpMul32F: 326 return rewriteValueS390X_OpMul32F(v, config) 327 case OpMul64: 328 return rewriteValueS390X_OpMul64(v, config) 329 case OpMul64F: 330 return rewriteValueS390X_OpMul64F(v, config) 331 case OpMul8: 332 return rewriteValueS390X_OpMul8(v, config) 333 case OpNeg16: 334 return rewriteValueS390X_OpNeg16(v, config) 335 case OpNeg32: 336 return rewriteValueS390X_OpNeg32(v, config) 337 case OpNeg32F: 338 return rewriteValueS390X_OpNeg32F(v, config) 339 case OpNeg64: 340 return rewriteValueS390X_OpNeg64(v, config) 341 case OpNeg64F: 342 return rewriteValueS390X_OpNeg64F(v, config) 343 case OpNeg8: 344 return rewriteValueS390X_OpNeg8(v, config) 345 case OpNeq16: 346 return rewriteValueS390X_OpNeq16(v, config) 347 case OpNeq32: 348 return rewriteValueS390X_OpNeq32(v, config) 349 case OpNeq32F: 350 return rewriteValueS390X_OpNeq32F(v, config) 351 case OpNeq64: 352 return rewriteValueS390X_OpNeq64(v, config) 353 case OpNeq64F: 354 return rewriteValueS390X_OpNeq64F(v, config) 355 case OpNeq8: 356 return rewriteValueS390X_OpNeq8(v, config) 357 case OpNeqB: 358 return rewriteValueS390X_OpNeqB(v, config) 359 case OpNeqPtr: 360 return rewriteValueS390X_OpNeqPtr(v, config) 361 case OpNilCheck: 362 return rewriteValueS390X_OpNilCheck(v, config) 363 case OpNot: 364 return rewriteValueS390X_OpNot(v, config) 365 case OpOffPtr: 366 return rewriteValueS390X_OpOffPtr(v, config) 367 case OpOr16: 368 return rewriteValueS390X_OpOr16(v, config) 369 case OpOr32: 370 return rewriteValueS390X_OpOr32(v, config) 371 case OpOr64: 372 return rewriteValueS390X_OpOr64(v, config) 373 case OpOr8: 374 return rewriteValueS390X_OpOr8(v, config) 375 case OpOrB: 376 return rewriteValueS390X_OpOrB(v, config) 377 case OpRsh16Ux16: 378 return rewriteValueS390X_OpRsh16Ux16(v, config) 379 case OpRsh16Ux32: 380 return rewriteValueS390X_OpRsh16Ux32(v, config) 381 case OpRsh16Ux64: 382 return rewriteValueS390X_OpRsh16Ux64(v, config) 383 case OpRsh16Ux8: 384 return rewriteValueS390X_OpRsh16Ux8(v, config) 385 case OpRsh16x16: 386 return rewriteValueS390X_OpRsh16x16(v, config) 387 case OpRsh16x32: 388 return rewriteValueS390X_OpRsh16x32(v, config) 389 case OpRsh16x64: 390 return rewriteValueS390X_OpRsh16x64(v, config) 391 case OpRsh16x8: 392 return rewriteValueS390X_OpRsh16x8(v, config) 393 case OpRsh32Ux16: 394 return rewriteValueS390X_OpRsh32Ux16(v, config) 395 case OpRsh32Ux32: 396 return rewriteValueS390X_OpRsh32Ux32(v, config) 397 case OpRsh32Ux64: 398 return rewriteValueS390X_OpRsh32Ux64(v, config) 399 case OpRsh32Ux8: 400 return rewriteValueS390X_OpRsh32Ux8(v, config) 401 case OpRsh32x16: 402 return rewriteValueS390X_OpRsh32x16(v, config) 403 case OpRsh32x32: 404 return rewriteValueS390X_OpRsh32x32(v, config) 405 case OpRsh32x64: 406 return rewriteValueS390X_OpRsh32x64(v, config) 407 case OpRsh32x8: 408 return rewriteValueS390X_OpRsh32x8(v, config) 409 case OpRsh64Ux16: 410 return rewriteValueS390X_OpRsh64Ux16(v, config) 411 case OpRsh64Ux32: 412 return rewriteValueS390X_OpRsh64Ux32(v, config) 413 case OpRsh64Ux64: 414 return rewriteValueS390X_OpRsh64Ux64(v, config) 415 case OpRsh64Ux8: 416 return rewriteValueS390X_OpRsh64Ux8(v, config) 417 case OpRsh64x16: 418 return rewriteValueS390X_OpRsh64x16(v, config) 419 case OpRsh64x32: 420 return rewriteValueS390X_OpRsh64x32(v, config) 421 case OpRsh64x64: 422 return rewriteValueS390X_OpRsh64x64(v, config) 423 case OpRsh64x8: 424 return rewriteValueS390X_OpRsh64x8(v, config) 425 case OpRsh8Ux16: 426 return rewriteValueS390X_OpRsh8Ux16(v, config) 427 case OpRsh8Ux32: 428 return rewriteValueS390X_OpRsh8Ux32(v, config) 429 case OpRsh8Ux64: 430 return rewriteValueS390X_OpRsh8Ux64(v, config) 431 case OpRsh8Ux8: 432 return rewriteValueS390X_OpRsh8Ux8(v, config) 433 case OpRsh8x16: 434 return rewriteValueS390X_OpRsh8x16(v, config) 435 case OpRsh8x32: 436 return rewriteValueS390X_OpRsh8x32(v, config) 437 case OpRsh8x64: 438 return rewriteValueS390X_OpRsh8x64(v, config) 439 case OpRsh8x8: 440 return rewriteValueS390X_OpRsh8x8(v, config) 441 case OpS390XADD: 442 return rewriteValueS390X_OpS390XADD(v, config) 443 case OpS390XADDW: 444 return rewriteValueS390X_OpS390XADDW(v, config) 445 case OpS390XADDWconst: 446 return rewriteValueS390X_OpS390XADDWconst(v, config) 447 case OpS390XADDconst: 448 return rewriteValueS390X_OpS390XADDconst(v, config) 449 case OpS390XAND: 450 return rewriteValueS390X_OpS390XAND(v, config) 451 case OpS390XANDW: 452 return rewriteValueS390X_OpS390XANDW(v, config) 453 case OpS390XANDWconst: 454 return rewriteValueS390X_OpS390XANDWconst(v, config) 455 case OpS390XANDconst: 456 return rewriteValueS390X_OpS390XANDconst(v, config) 457 case OpS390XCMP: 458 return rewriteValueS390X_OpS390XCMP(v, config) 459 case OpS390XCMPU: 460 return rewriteValueS390X_OpS390XCMPU(v, config) 461 case OpS390XCMPUconst: 462 return rewriteValueS390X_OpS390XCMPUconst(v, config) 463 case OpS390XCMPW: 464 return rewriteValueS390X_OpS390XCMPW(v, config) 465 case OpS390XCMPWU: 466 return rewriteValueS390X_OpS390XCMPWU(v, config) 467 case OpS390XCMPWUconst: 468 return rewriteValueS390X_OpS390XCMPWUconst(v, config) 469 case OpS390XCMPWconst: 470 return rewriteValueS390X_OpS390XCMPWconst(v, config) 471 case OpS390XCMPconst: 472 return rewriteValueS390X_OpS390XCMPconst(v, config) 473 case OpS390XFMOVDload: 474 return rewriteValueS390X_OpS390XFMOVDload(v, config) 475 case OpS390XFMOVDloadidx: 476 return rewriteValueS390X_OpS390XFMOVDloadidx(v, config) 477 case OpS390XFMOVDstore: 478 return rewriteValueS390X_OpS390XFMOVDstore(v, config) 479 case OpS390XFMOVDstoreidx: 480 return rewriteValueS390X_OpS390XFMOVDstoreidx(v, config) 481 case OpS390XFMOVSload: 482 return rewriteValueS390X_OpS390XFMOVSload(v, config) 483 case OpS390XFMOVSloadidx: 484 return rewriteValueS390X_OpS390XFMOVSloadidx(v, config) 485 case OpS390XFMOVSstore: 486 return rewriteValueS390X_OpS390XFMOVSstore(v, config) 487 case OpS390XFMOVSstoreidx: 488 return rewriteValueS390X_OpS390XFMOVSstoreidx(v, config) 489 case OpS390XMOVBZload: 490 return rewriteValueS390X_OpS390XMOVBZload(v, config) 491 case OpS390XMOVBZloadidx: 492 return rewriteValueS390X_OpS390XMOVBZloadidx(v, config) 493 case OpS390XMOVBZreg: 494 return rewriteValueS390X_OpS390XMOVBZreg(v, config) 495 case OpS390XMOVBload: 496 return rewriteValueS390X_OpS390XMOVBload(v, config) 497 case OpS390XMOVBreg: 498 return rewriteValueS390X_OpS390XMOVBreg(v, config) 499 case OpS390XMOVBstore: 500 return rewriteValueS390X_OpS390XMOVBstore(v, config) 501 case OpS390XMOVBstoreconst: 502 return rewriteValueS390X_OpS390XMOVBstoreconst(v, config) 503 case OpS390XMOVBstoreidx: 504 return rewriteValueS390X_OpS390XMOVBstoreidx(v, config) 505 case OpS390XMOVDEQ: 506 return rewriteValueS390X_OpS390XMOVDEQ(v, config) 507 case OpS390XMOVDGE: 508 return rewriteValueS390X_OpS390XMOVDGE(v, config) 509 case OpS390XMOVDGT: 510 return rewriteValueS390X_OpS390XMOVDGT(v, config) 511 case OpS390XMOVDLE: 512 return rewriteValueS390X_OpS390XMOVDLE(v, config) 513 case OpS390XMOVDLT: 514 return rewriteValueS390X_OpS390XMOVDLT(v, config) 515 case OpS390XMOVDNE: 516 return rewriteValueS390X_OpS390XMOVDNE(v, config) 517 case OpS390XMOVDaddridx: 518 return rewriteValueS390X_OpS390XMOVDaddridx(v, config) 519 case OpS390XMOVDload: 520 return rewriteValueS390X_OpS390XMOVDload(v, config) 521 case OpS390XMOVDloadidx: 522 return rewriteValueS390X_OpS390XMOVDloadidx(v, config) 523 case OpS390XMOVDreg: 524 return rewriteValueS390X_OpS390XMOVDreg(v, config) 525 case OpS390XMOVDstore: 526 return rewriteValueS390X_OpS390XMOVDstore(v, config) 527 case OpS390XMOVDstoreconst: 528 return rewriteValueS390X_OpS390XMOVDstoreconst(v, config) 529 case OpS390XMOVDstoreidx: 530 return rewriteValueS390X_OpS390XMOVDstoreidx(v, config) 531 case OpS390XMOVHBRstore: 532 return rewriteValueS390X_OpS390XMOVHBRstore(v, config) 533 case OpS390XMOVHBRstoreidx: 534 return rewriteValueS390X_OpS390XMOVHBRstoreidx(v, config) 535 case OpS390XMOVHZload: 536 return rewriteValueS390X_OpS390XMOVHZload(v, config) 537 case OpS390XMOVHZloadidx: 538 return rewriteValueS390X_OpS390XMOVHZloadidx(v, config) 539 case OpS390XMOVHZreg: 540 return rewriteValueS390X_OpS390XMOVHZreg(v, config) 541 case OpS390XMOVHload: 542 return rewriteValueS390X_OpS390XMOVHload(v, config) 543 case OpS390XMOVHreg: 544 return rewriteValueS390X_OpS390XMOVHreg(v, config) 545 case OpS390XMOVHstore: 546 return rewriteValueS390X_OpS390XMOVHstore(v, config) 547 case OpS390XMOVHstoreconst: 548 return rewriteValueS390X_OpS390XMOVHstoreconst(v, config) 549 case OpS390XMOVHstoreidx: 550 return rewriteValueS390X_OpS390XMOVHstoreidx(v, config) 551 case OpS390XMOVWBRstore: 552 return rewriteValueS390X_OpS390XMOVWBRstore(v, config) 553 case OpS390XMOVWBRstoreidx: 554 return rewriteValueS390X_OpS390XMOVWBRstoreidx(v, config) 555 case OpS390XMOVWZload: 556 return rewriteValueS390X_OpS390XMOVWZload(v, config) 557 case OpS390XMOVWZloadidx: 558 return rewriteValueS390X_OpS390XMOVWZloadidx(v, config) 559 case OpS390XMOVWZreg: 560 return rewriteValueS390X_OpS390XMOVWZreg(v, config) 561 case OpS390XMOVWload: 562 return rewriteValueS390X_OpS390XMOVWload(v, config) 563 case OpS390XMOVWreg: 564 return rewriteValueS390X_OpS390XMOVWreg(v, config) 565 case OpS390XMOVWstore: 566 return rewriteValueS390X_OpS390XMOVWstore(v, config) 567 case OpS390XMOVWstoreconst: 568 return rewriteValueS390X_OpS390XMOVWstoreconst(v, config) 569 case OpS390XMOVWstoreidx: 570 return rewriteValueS390X_OpS390XMOVWstoreidx(v, config) 571 case OpS390XMULLD: 572 return rewriteValueS390X_OpS390XMULLD(v, config) 573 case OpS390XMULLDconst: 574 return rewriteValueS390X_OpS390XMULLDconst(v, config) 575 case OpS390XMULLW: 576 return rewriteValueS390X_OpS390XMULLW(v, config) 577 case OpS390XMULLWconst: 578 return rewriteValueS390X_OpS390XMULLWconst(v, config) 579 case OpS390XNEG: 580 return rewriteValueS390X_OpS390XNEG(v, config) 581 case OpS390XNEGW: 582 return rewriteValueS390X_OpS390XNEGW(v, config) 583 case OpS390XNOT: 584 return rewriteValueS390X_OpS390XNOT(v, config) 585 case OpS390XNOTW: 586 return rewriteValueS390X_OpS390XNOTW(v, config) 587 case OpS390XOR: 588 return rewriteValueS390X_OpS390XOR(v, config) 589 case OpS390XORW: 590 return rewriteValueS390X_OpS390XORW(v, config) 591 case OpS390XORWconst: 592 return rewriteValueS390X_OpS390XORWconst(v, config) 593 case OpS390XORconst: 594 return rewriteValueS390X_OpS390XORconst(v, config) 595 case OpS390XSLD: 596 return rewriteValueS390X_OpS390XSLD(v, config) 597 case OpS390XSLW: 598 return rewriteValueS390X_OpS390XSLW(v, config) 599 case OpS390XSRAD: 600 return rewriteValueS390X_OpS390XSRAD(v, config) 601 case OpS390XSRADconst: 602 return rewriteValueS390X_OpS390XSRADconst(v, config) 603 case OpS390XSRAW: 604 return rewriteValueS390X_OpS390XSRAW(v, config) 605 case OpS390XSRAWconst: 606 return rewriteValueS390X_OpS390XSRAWconst(v, config) 607 case OpS390XSRD: 608 return rewriteValueS390X_OpS390XSRD(v, config) 609 case OpS390XSRW: 610 return rewriteValueS390X_OpS390XSRW(v, config) 611 case OpS390XSTM2: 612 return rewriteValueS390X_OpS390XSTM2(v, config) 613 case OpS390XSTMG2: 614 return rewriteValueS390X_OpS390XSTMG2(v, config) 615 case OpS390XSUB: 616 return rewriteValueS390X_OpS390XSUB(v, config) 617 case OpS390XSUBEWcarrymask: 618 return rewriteValueS390X_OpS390XSUBEWcarrymask(v, config) 619 case OpS390XSUBEcarrymask: 620 return rewriteValueS390X_OpS390XSUBEcarrymask(v, config) 621 case OpS390XSUBW: 622 return rewriteValueS390X_OpS390XSUBW(v, config) 623 case OpS390XSUBWconst: 624 return rewriteValueS390X_OpS390XSUBWconst(v, config) 625 case OpS390XSUBconst: 626 return rewriteValueS390X_OpS390XSUBconst(v, config) 627 case OpS390XXOR: 628 return rewriteValueS390X_OpS390XXOR(v, config) 629 case OpS390XXORW: 630 return rewriteValueS390X_OpS390XXORW(v, config) 631 case OpS390XXORWconst: 632 return rewriteValueS390X_OpS390XXORWconst(v, config) 633 case OpS390XXORconst: 634 return rewriteValueS390X_OpS390XXORconst(v, config) 635 case OpSelect0: 636 return rewriteValueS390X_OpSelect0(v, config) 637 case OpSelect1: 638 return rewriteValueS390X_OpSelect1(v, config) 639 case OpSignExt16to32: 640 return rewriteValueS390X_OpSignExt16to32(v, config) 641 case OpSignExt16to64: 642 return rewriteValueS390X_OpSignExt16to64(v, config) 643 case OpSignExt32to64: 644 return rewriteValueS390X_OpSignExt32to64(v, config) 645 case OpSignExt8to16: 646 return rewriteValueS390X_OpSignExt8to16(v, config) 647 case OpSignExt8to32: 648 return rewriteValueS390X_OpSignExt8to32(v, config) 649 case OpSignExt8to64: 650 return rewriteValueS390X_OpSignExt8to64(v, config) 651 case OpSlicemask: 652 return rewriteValueS390X_OpSlicemask(v, config) 653 case OpSqrt: 654 return rewriteValueS390X_OpSqrt(v, config) 655 case OpStaticCall: 656 return rewriteValueS390X_OpStaticCall(v, config) 657 case OpStore: 658 return rewriteValueS390X_OpStore(v, config) 659 case OpSub16: 660 return rewriteValueS390X_OpSub16(v, config) 661 case OpSub32: 662 return rewriteValueS390X_OpSub32(v, config) 663 case OpSub32F: 664 return rewriteValueS390X_OpSub32F(v, config) 665 case OpSub64: 666 return rewriteValueS390X_OpSub64(v, config) 667 case OpSub64F: 668 return rewriteValueS390X_OpSub64F(v, config) 669 case OpSub8: 670 return rewriteValueS390X_OpSub8(v, config) 671 case OpSubPtr: 672 return rewriteValueS390X_OpSubPtr(v, config) 673 case OpTrunc16to8: 674 return rewriteValueS390X_OpTrunc16to8(v, config) 675 case OpTrunc32to16: 676 return rewriteValueS390X_OpTrunc32to16(v, config) 677 case OpTrunc32to8: 678 return rewriteValueS390X_OpTrunc32to8(v, config) 679 case OpTrunc64to16: 680 return rewriteValueS390X_OpTrunc64to16(v, config) 681 case OpTrunc64to32: 682 return rewriteValueS390X_OpTrunc64to32(v, config) 683 case OpTrunc64to8: 684 return rewriteValueS390X_OpTrunc64to8(v, config) 685 case OpXor16: 686 return rewriteValueS390X_OpXor16(v, config) 687 case OpXor32: 688 return rewriteValueS390X_OpXor32(v, config) 689 case OpXor64: 690 return rewriteValueS390X_OpXor64(v, config) 691 case OpXor8: 692 return rewriteValueS390X_OpXor8(v, config) 693 case OpZero: 694 return rewriteValueS390X_OpZero(v, config) 695 case OpZeroExt16to32: 696 return rewriteValueS390X_OpZeroExt16to32(v, config) 697 case OpZeroExt16to64: 698 return rewriteValueS390X_OpZeroExt16to64(v, config) 699 case OpZeroExt32to64: 700 return rewriteValueS390X_OpZeroExt32to64(v, config) 701 case OpZeroExt8to16: 702 return rewriteValueS390X_OpZeroExt8to16(v, config) 703 case OpZeroExt8to32: 704 return rewriteValueS390X_OpZeroExt8to32(v, config) 705 case OpZeroExt8to64: 706 return rewriteValueS390X_OpZeroExt8to64(v, config) 707 } 708 return false 709 } 710 func rewriteValueS390X_OpAdd16(v *Value, config *Config) bool { 711 b := v.Block 712 _ = b 713 // match: (Add16 x y) 714 // cond: 715 // result: (ADDW x y) 716 for { 717 x := v.Args[0] 718 y := v.Args[1] 719 v.reset(OpS390XADDW) 720 v.AddArg(x) 721 v.AddArg(y) 722 return true 723 } 724 } 725 func rewriteValueS390X_OpAdd32(v *Value, config *Config) bool { 726 b := v.Block 727 _ = b 728 // match: (Add32 x y) 729 // cond: 730 // result: (ADDW x y) 731 for { 732 x := v.Args[0] 733 y := v.Args[1] 734 v.reset(OpS390XADDW) 735 v.AddArg(x) 736 v.AddArg(y) 737 return true 738 } 739 } 740 func rewriteValueS390X_OpAdd32F(v *Value, config *Config) bool { 741 b := v.Block 742 _ = b 743 // match: (Add32F x y) 744 // cond: 745 // result: (FADDS x y) 746 for { 747 x := v.Args[0] 748 y := v.Args[1] 749 v.reset(OpS390XFADDS) 750 v.AddArg(x) 751 v.AddArg(y) 752 return true 753 } 754 } 755 func rewriteValueS390X_OpAdd64(v *Value, config *Config) bool { 756 b := v.Block 757 _ = b 758 // match: (Add64 x y) 759 // cond: 760 // result: (ADD x y) 761 for { 762 x := v.Args[0] 763 y := v.Args[1] 764 v.reset(OpS390XADD) 765 v.AddArg(x) 766 v.AddArg(y) 767 return true 768 } 769 } 770 func rewriteValueS390X_OpAdd64F(v *Value, config *Config) bool { 771 b := v.Block 772 _ = b 773 // match: (Add64F x y) 774 // cond: 775 // result: (FADD x y) 776 for { 777 x := v.Args[0] 778 y := v.Args[1] 779 v.reset(OpS390XFADD) 780 v.AddArg(x) 781 v.AddArg(y) 782 return true 783 } 784 } 785 func rewriteValueS390X_OpAdd8(v *Value, config *Config) bool { 786 b := v.Block 787 _ = b 788 // match: (Add8 x y) 789 // cond: 790 // result: (ADDW x y) 791 for { 792 x := v.Args[0] 793 y := v.Args[1] 794 v.reset(OpS390XADDW) 795 v.AddArg(x) 796 v.AddArg(y) 797 return true 798 } 799 } 800 func rewriteValueS390X_OpAddPtr(v *Value, config *Config) bool { 801 b := v.Block 802 _ = b 803 // match: (AddPtr x y) 804 // cond: 805 // result: (ADD x y) 806 for { 807 x := v.Args[0] 808 y := v.Args[1] 809 v.reset(OpS390XADD) 810 v.AddArg(x) 811 v.AddArg(y) 812 return true 813 } 814 } 815 func rewriteValueS390X_OpAddr(v *Value, config *Config) bool { 816 b := v.Block 817 _ = b 818 // match: (Addr {sym} base) 819 // cond: 820 // result: (MOVDaddr {sym} base) 821 for { 822 sym := v.Aux 823 base := v.Args[0] 824 v.reset(OpS390XMOVDaddr) 825 v.Aux = sym 826 v.AddArg(base) 827 return true 828 } 829 } 830 func rewriteValueS390X_OpAnd16(v *Value, config *Config) bool { 831 b := v.Block 832 _ = b 833 // match: (And16 x y) 834 // cond: 835 // result: (ANDW x y) 836 for { 837 x := v.Args[0] 838 y := v.Args[1] 839 v.reset(OpS390XANDW) 840 v.AddArg(x) 841 v.AddArg(y) 842 return true 843 } 844 } 845 func rewriteValueS390X_OpAnd32(v *Value, config *Config) bool { 846 b := v.Block 847 _ = b 848 // match: (And32 x y) 849 // cond: 850 // result: (ANDW x y) 851 for { 852 x := v.Args[0] 853 y := v.Args[1] 854 v.reset(OpS390XANDW) 855 v.AddArg(x) 856 v.AddArg(y) 857 return true 858 } 859 } 860 func rewriteValueS390X_OpAnd64(v *Value, config *Config) bool { 861 b := v.Block 862 _ = b 863 // match: (And64 x y) 864 // cond: 865 // result: (AND x y) 866 for { 867 x := v.Args[0] 868 y := v.Args[1] 869 v.reset(OpS390XAND) 870 v.AddArg(x) 871 v.AddArg(y) 872 return true 873 } 874 } 875 func rewriteValueS390X_OpAnd8(v *Value, config *Config) bool { 876 b := v.Block 877 _ = b 878 // match: (And8 x y) 879 // cond: 880 // result: (ANDW x y) 881 for { 882 x := v.Args[0] 883 y := v.Args[1] 884 v.reset(OpS390XANDW) 885 v.AddArg(x) 886 v.AddArg(y) 887 return true 888 } 889 } 890 func rewriteValueS390X_OpAndB(v *Value, config *Config) bool { 891 b := v.Block 892 _ = b 893 // match: (AndB x y) 894 // cond: 895 // result: (ANDW x y) 896 for { 897 x := v.Args[0] 898 y := v.Args[1] 899 v.reset(OpS390XANDW) 900 v.AddArg(x) 901 v.AddArg(y) 902 return true 903 } 904 } 905 func rewriteValueS390X_OpAtomicAdd32(v *Value, config *Config) bool { 906 b := v.Block 907 _ = b 908 // match: (AtomicAdd32 ptr val mem) 909 // cond: 910 // result: (AddTupleFirst32 (LAA ptr val mem) val) 911 for { 912 ptr := v.Args[0] 913 val := v.Args[1] 914 mem := v.Args[2] 915 v.reset(OpS390XAddTupleFirst32) 916 v0 := b.NewValue0(v.Pos, OpS390XLAA, MakeTuple(config.fe.TypeUInt32(), TypeMem)) 917 v0.AddArg(ptr) 918 v0.AddArg(val) 919 v0.AddArg(mem) 920 v.AddArg(v0) 921 v.AddArg(val) 922 return true 923 } 924 } 925 func rewriteValueS390X_OpAtomicAdd64(v *Value, config *Config) bool { 926 b := v.Block 927 _ = b 928 // match: (AtomicAdd64 ptr val mem) 929 // cond: 930 // result: (AddTupleFirst64 (LAAG ptr val mem) val) 931 for { 932 ptr := v.Args[0] 933 val := v.Args[1] 934 mem := v.Args[2] 935 v.reset(OpS390XAddTupleFirst64) 936 v0 := b.NewValue0(v.Pos, OpS390XLAAG, MakeTuple(config.fe.TypeUInt64(), TypeMem)) 937 v0.AddArg(ptr) 938 v0.AddArg(val) 939 v0.AddArg(mem) 940 v.AddArg(v0) 941 v.AddArg(val) 942 return true 943 } 944 } 945 func rewriteValueS390X_OpAtomicCompareAndSwap32(v *Value, config *Config) bool { 946 b := v.Block 947 _ = b 948 // match: (AtomicCompareAndSwap32 ptr old new_ mem) 949 // cond: 950 // result: (LoweredAtomicCas32 ptr old new_ mem) 951 for { 952 ptr := v.Args[0] 953 old := v.Args[1] 954 new_ := v.Args[2] 955 mem := v.Args[3] 956 v.reset(OpS390XLoweredAtomicCas32) 957 v.AddArg(ptr) 958 v.AddArg(old) 959 v.AddArg(new_) 960 v.AddArg(mem) 961 return true 962 } 963 } 964 func rewriteValueS390X_OpAtomicCompareAndSwap64(v *Value, config *Config) bool { 965 b := v.Block 966 _ = b 967 // match: (AtomicCompareAndSwap64 ptr old new_ mem) 968 // cond: 969 // result: (LoweredAtomicCas64 ptr old new_ mem) 970 for { 971 ptr := v.Args[0] 972 old := v.Args[1] 973 new_ := v.Args[2] 974 mem := v.Args[3] 975 v.reset(OpS390XLoweredAtomicCas64) 976 v.AddArg(ptr) 977 v.AddArg(old) 978 v.AddArg(new_) 979 v.AddArg(mem) 980 return true 981 } 982 } 983 func rewriteValueS390X_OpAtomicExchange32(v *Value, config *Config) bool { 984 b := v.Block 985 _ = b 986 // match: (AtomicExchange32 ptr val mem) 987 // cond: 988 // result: (LoweredAtomicExchange32 ptr val mem) 989 for { 990 ptr := v.Args[0] 991 val := v.Args[1] 992 mem := v.Args[2] 993 v.reset(OpS390XLoweredAtomicExchange32) 994 v.AddArg(ptr) 995 v.AddArg(val) 996 v.AddArg(mem) 997 return true 998 } 999 } 1000 func rewriteValueS390X_OpAtomicExchange64(v *Value, config *Config) bool { 1001 b := v.Block 1002 _ = b 1003 // match: (AtomicExchange64 ptr val mem) 1004 // cond: 1005 // result: (LoweredAtomicExchange64 ptr val mem) 1006 for { 1007 ptr := v.Args[0] 1008 val := v.Args[1] 1009 mem := v.Args[2] 1010 v.reset(OpS390XLoweredAtomicExchange64) 1011 v.AddArg(ptr) 1012 v.AddArg(val) 1013 v.AddArg(mem) 1014 return true 1015 } 1016 } 1017 func rewriteValueS390X_OpAtomicLoad32(v *Value, config *Config) bool { 1018 b := v.Block 1019 _ = b 1020 // match: (AtomicLoad32 ptr mem) 1021 // cond: 1022 // result: (MOVWZatomicload ptr mem) 1023 for { 1024 ptr := v.Args[0] 1025 mem := v.Args[1] 1026 v.reset(OpS390XMOVWZatomicload) 1027 v.AddArg(ptr) 1028 v.AddArg(mem) 1029 return true 1030 } 1031 } 1032 func rewriteValueS390X_OpAtomicLoad64(v *Value, config *Config) bool { 1033 b := v.Block 1034 _ = b 1035 // match: (AtomicLoad64 ptr mem) 1036 // cond: 1037 // result: (MOVDatomicload ptr mem) 1038 for { 1039 ptr := v.Args[0] 1040 mem := v.Args[1] 1041 v.reset(OpS390XMOVDatomicload) 1042 v.AddArg(ptr) 1043 v.AddArg(mem) 1044 return true 1045 } 1046 } 1047 func rewriteValueS390X_OpAtomicLoadPtr(v *Value, config *Config) bool { 1048 b := v.Block 1049 _ = b 1050 // match: (AtomicLoadPtr ptr mem) 1051 // cond: 1052 // result: (MOVDatomicload ptr mem) 1053 for { 1054 ptr := v.Args[0] 1055 mem := v.Args[1] 1056 v.reset(OpS390XMOVDatomicload) 1057 v.AddArg(ptr) 1058 v.AddArg(mem) 1059 return true 1060 } 1061 } 1062 func rewriteValueS390X_OpAtomicStore32(v *Value, config *Config) bool { 1063 b := v.Block 1064 _ = b 1065 // match: (AtomicStore32 ptr val mem) 1066 // cond: 1067 // result: (MOVWatomicstore ptr val mem) 1068 for { 1069 ptr := v.Args[0] 1070 val := v.Args[1] 1071 mem := v.Args[2] 1072 v.reset(OpS390XMOVWatomicstore) 1073 v.AddArg(ptr) 1074 v.AddArg(val) 1075 v.AddArg(mem) 1076 return true 1077 } 1078 } 1079 func rewriteValueS390X_OpAtomicStore64(v *Value, config *Config) bool { 1080 b := v.Block 1081 _ = b 1082 // match: (AtomicStore64 ptr val mem) 1083 // cond: 1084 // result: (MOVDatomicstore ptr val mem) 1085 for { 1086 ptr := v.Args[0] 1087 val := v.Args[1] 1088 mem := v.Args[2] 1089 v.reset(OpS390XMOVDatomicstore) 1090 v.AddArg(ptr) 1091 v.AddArg(val) 1092 v.AddArg(mem) 1093 return true 1094 } 1095 } 1096 func rewriteValueS390X_OpAtomicStorePtrNoWB(v *Value, config *Config) bool { 1097 b := v.Block 1098 _ = b 1099 // match: (AtomicStorePtrNoWB ptr val mem) 1100 // cond: 1101 // result: (MOVDatomicstore ptr val mem) 1102 for { 1103 ptr := v.Args[0] 1104 val := v.Args[1] 1105 mem := v.Args[2] 1106 v.reset(OpS390XMOVDatomicstore) 1107 v.AddArg(ptr) 1108 v.AddArg(val) 1109 v.AddArg(mem) 1110 return true 1111 } 1112 } 1113 func rewriteValueS390X_OpAvg64u(v *Value, config *Config) bool { 1114 b := v.Block 1115 _ = b 1116 // match: (Avg64u <t> x y) 1117 // cond: 1118 // result: (ADD (ADD <t> (SRDconst <t> x [1]) (SRDconst <t> y [1])) (ANDconst <t> (AND <t> x y) [1])) 1119 for { 1120 t := v.Type 1121 x := v.Args[0] 1122 y := v.Args[1] 1123 v.reset(OpS390XADD) 1124 v0 := b.NewValue0(v.Pos, OpS390XADD, t) 1125 v1 := b.NewValue0(v.Pos, OpS390XSRDconst, t) 1126 v1.AuxInt = 1 1127 v1.AddArg(x) 1128 v0.AddArg(v1) 1129 v2 := b.NewValue0(v.Pos, OpS390XSRDconst, t) 1130 v2.AuxInt = 1 1131 v2.AddArg(y) 1132 v0.AddArg(v2) 1133 v.AddArg(v0) 1134 v3 := b.NewValue0(v.Pos, OpS390XANDconst, t) 1135 v3.AuxInt = 1 1136 v4 := b.NewValue0(v.Pos, OpS390XAND, t) 1137 v4.AddArg(x) 1138 v4.AddArg(y) 1139 v3.AddArg(v4) 1140 v.AddArg(v3) 1141 return true 1142 } 1143 } 1144 func rewriteValueS390X_OpBswap32(v *Value, config *Config) bool { 1145 b := v.Block 1146 _ = b 1147 // match: (Bswap32 x) 1148 // cond: 1149 // result: (MOVWBR x) 1150 for { 1151 x := v.Args[0] 1152 v.reset(OpS390XMOVWBR) 1153 v.AddArg(x) 1154 return true 1155 } 1156 } 1157 func rewriteValueS390X_OpBswap64(v *Value, config *Config) bool { 1158 b := v.Block 1159 _ = b 1160 // match: (Bswap64 x) 1161 // cond: 1162 // result: (MOVDBR x) 1163 for { 1164 x := v.Args[0] 1165 v.reset(OpS390XMOVDBR) 1166 v.AddArg(x) 1167 return true 1168 } 1169 } 1170 func rewriteValueS390X_OpClosureCall(v *Value, config *Config) bool { 1171 b := v.Block 1172 _ = b 1173 // match: (ClosureCall [argwid] entry closure mem) 1174 // cond: 1175 // result: (CALLclosure [argwid] entry closure mem) 1176 for { 1177 argwid := v.AuxInt 1178 entry := v.Args[0] 1179 closure := v.Args[1] 1180 mem := v.Args[2] 1181 v.reset(OpS390XCALLclosure) 1182 v.AuxInt = argwid 1183 v.AddArg(entry) 1184 v.AddArg(closure) 1185 v.AddArg(mem) 1186 return true 1187 } 1188 } 1189 func rewriteValueS390X_OpCom16(v *Value, config *Config) bool { 1190 b := v.Block 1191 _ = b 1192 // match: (Com16 x) 1193 // cond: 1194 // result: (NOTW x) 1195 for { 1196 x := v.Args[0] 1197 v.reset(OpS390XNOTW) 1198 v.AddArg(x) 1199 return true 1200 } 1201 } 1202 func rewriteValueS390X_OpCom32(v *Value, config *Config) bool { 1203 b := v.Block 1204 _ = b 1205 // match: (Com32 x) 1206 // cond: 1207 // result: (NOTW x) 1208 for { 1209 x := v.Args[0] 1210 v.reset(OpS390XNOTW) 1211 v.AddArg(x) 1212 return true 1213 } 1214 } 1215 func rewriteValueS390X_OpCom64(v *Value, config *Config) bool { 1216 b := v.Block 1217 _ = b 1218 // match: (Com64 x) 1219 // cond: 1220 // result: (NOT x) 1221 for { 1222 x := v.Args[0] 1223 v.reset(OpS390XNOT) 1224 v.AddArg(x) 1225 return true 1226 } 1227 } 1228 func rewriteValueS390X_OpCom8(v *Value, config *Config) bool { 1229 b := v.Block 1230 _ = b 1231 // match: (Com8 x) 1232 // cond: 1233 // result: (NOTW x) 1234 for { 1235 x := v.Args[0] 1236 v.reset(OpS390XNOTW) 1237 v.AddArg(x) 1238 return true 1239 } 1240 } 1241 func rewriteValueS390X_OpConst16(v *Value, config *Config) bool { 1242 b := v.Block 1243 _ = b 1244 // match: (Const16 [val]) 1245 // cond: 1246 // result: (MOVDconst [val]) 1247 for { 1248 val := v.AuxInt 1249 v.reset(OpS390XMOVDconst) 1250 v.AuxInt = val 1251 return true 1252 } 1253 } 1254 func rewriteValueS390X_OpConst32(v *Value, config *Config) bool { 1255 b := v.Block 1256 _ = b 1257 // match: (Const32 [val]) 1258 // cond: 1259 // result: (MOVDconst [val]) 1260 for { 1261 val := v.AuxInt 1262 v.reset(OpS390XMOVDconst) 1263 v.AuxInt = val 1264 return true 1265 } 1266 } 1267 func rewriteValueS390X_OpConst32F(v *Value, config *Config) bool { 1268 b := v.Block 1269 _ = b 1270 // match: (Const32F [val]) 1271 // cond: 1272 // result: (FMOVSconst [val]) 1273 for { 1274 val := v.AuxInt 1275 v.reset(OpS390XFMOVSconst) 1276 v.AuxInt = val 1277 return true 1278 } 1279 } 1280 func rewriteValueS390X_OpConst64(v *Value, config *Config) bool { 1281 b := v.Block 1282 _ = b 1283 // match: (Const64 [val]) 1284 // cond: 1285 // result: (MOVDconst [val]) 1286 for { 1287 val := v.AuxInt 1288 v.reset(OpS390XMOVDconst) 1289 v.AuxInt = val 1290 return true 1291 } 1292 } 1293 func rewriteValueS390X_OpConst64F(v *Value, config *Config) bool { 1294 b := v.Block 1295 _ = b 1296 // match: (Const64F [val]) 1297 // cond: 1298 // result: (FMOVDconst [val]) 1299 for { 1300 val := v.AuxInt 1301 v.reset(OpS390XFMOVDconst) 1302 v.AuxInt = val 1303 return true 1304 } 1305 } 1306 func rewriteValueS390X_OpConst8(v *Value, config *Config) bool { 1307 b := v.Block 1308 _ = b 1309 // match: (Const8 [val]) 1310 // cond: 1311 // result: (MOVDconst [val]) 1312 for { 1313 val := v.AuxInt 1314 v.reset(OpS390XMOVDconst) 1315 v.AuxInt = val 1316 return true 1317 } 1318 } 1319 func rewriteValueS390X_OpConstBool(v *Value, config *Config) bool { 1320 b := v.Block 1321 _ = b 1322 // match: (ConstBool [b]) 1323 // cond: 1324 // result: (MOVDconst [b]) 1325 for { 1326 b := v.AuxInt 1327 v.reset(OpS390XMOVDconst) 1328 v.AuxInt = b 1329 return true 1330 } 1331 } 1332 func rewriteValueS390X_OpConstNil(v *Value, config *Config) bool { 1333 b := v.Block 1334 _ = b 1335 // match: (ConstNil) 1336 // cond: 1337 // result: (MOVDconst [0]) 1338 for { 1339 v.reset(OpS390XMOVDconst) 1340 v.AuxInt = 0 1341 return true 1342 } 1343 } 1344 func rewriteValueS390X_OpConvert(v *Value, config *Config) bool { 1345 b := v.Block 1346 _ = b 1347 // match: (Convert <t> x mem) 1348 // cond: 1349 // result: (MOVDconvert <t> x mem) 1350 for { 1351 t := v.Type 1352 x := v.Args[0] 1353 mem := v.Args[1] 1354 v.reset(OpS390XMOVDconvert) 1355 v.Type = t 1356 v.AddArg(x) 1357 v.AddArg(mem) 1358 return true 1359 } 1360 } 1361 func rewriteValueS390X_OpCtz32(v *Value, config *Config) bool { 1362 b := v.Block 1363 _ = b 1364 // match: (Ctz32 <t> x) 1365 // cond: 1366 // result: (SUB (MOVDconst [64]) (FLOGR (MOVWZreg (ANDW <t> (SUBWconst <t> [1] x) (NOTW <t> x))))) 1367 for { 1368 t := v.Type 1369 x := v.Args[0] 1370 v.reset(OpS390XSUB) 1371 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1372 v0.AuxInt = 64 1373 v.AddArg(v0) 1374 v1 := b.NewValue0(v.Pos, OpS390XFLOGR, config.fe.TypeUInt64()) 1375 v2 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1376 v3 := b.NewValue0(v.Pos, OpS390XANDW, t) 1377 v4 := b.NewValue0(v.Pos, OpS390XSUBWconst, t) 1378 v4.AuxInt = 1 1379 v4.AddArg(x) 1380 v3.AddArg(v4) 1381 v5 := b.NewValue0(v.Pos, OpS390XNOTW, t) 1382 v5.AddArg(x) 1383 v3.AddArg(v5) 1384 v2.AddArg(v3) 1385 v1.AddArg(v2) 1386 v.AddArg(v1) 1387 return true 1388 } 1389 } 1390 func rewriteValueS390X_OpCtz64(v *Value, config *Config) bool { 1391 b := v.Block 1392 _ = b 1393 // match: (Ctz64 <t> x) 1394 // cond: 1395 // result: (SUB (MOVDconst [64]) (FLOGR (AND <t> (SUBconst <t> [1] x) (NOT <t> x)))) 1396 for { 1397 t := v.Type 1398 x := v.Args[0] 1399 v.reset(OpS390XSUB) 1400 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1401 v0.AuxInt = 64 1402 v.AddArg(v0) 1403 v1 := b.NewValue0(v.Pos, OpS390XFLOGR, config.fe.TypeUInt64()) 1404 v2 := b.NewValue0(v.Pos, OpS390XAND, t) 1405 v3 := b.NewValue0(v.Pos, OpS390XSUBconst, t) 1406 v3.AuxInt = 1 1407 v3.AddArg(x) 1408 v2.AddArg(v3) 1409 v4 := b.NewValue0(v.Pos, OpS390XNOT, t) 1410 v4.AddArg(x) 1411 v2.AddArg(v4) 1412 v1.AddArg(v2) 1413 v.AddArg(v1) 1414 return true 1415 } 1416 } 1417 func rewriteValueS390X_OpCvt32Fto32(v *Value, config *Config) bool { 1418 b := v.Block 1419 _ = b 1420 // match: (Cvt32Fto32 x) 1421 // cond: 1422 // result: (CFEBRA x) 1423 for { 1424 x := v.Args[0] 1425 v.reset(OpS390XCFEBRA) 1426 v.AddArg(x) 1427 return true 1428 } 1429 } 1430 func rewriteValueS390X_OpCvt32Fto64(v *Value, config *Config) bool { 1431 b := v.Block 1432 _ = b 1433 // match: (Cvt32Fto64 x) 1434 // cond: 1435 // result: (CGEBRA x) 1436 for { 1437 x := v.Args[0] 1438 v.reset(OpS390XCGEBRA) 1439 v.AddArg(x) 1440 return true 1441 } 1442 } 1443 func rewriteValueS390X_OpCvt32Fto64F(v *Value, config *Config) bool { 1444 b := v.Block 1445 _ = b 1446 // match: (Cvt32Fto64F x) 1447 // cond: 1448 // result: (LDEBR x) 1449 for { 1450 x := v.Args[0] 1451 v.reset(OpS390XLDEBR) 1452 v.AddArg(x) 1453 return true 1454 } 1455 } 1456 func rewriteValueS390X_OpCvt32to32F(v *Value, config *Config) bool { 1457 b := v.Block 1458 _ = b 1459 // match: (Cvt32to32F x) 1460 // cond: 1461 // result: (CEFBRA x) 1462 for { 1463 x := v.Args[0] 1464 v.reset(OpS390XCEFBRA) 1465 v.AddArg(x) 1466 return true 1467 } 1468 } 1469 func rewriteValueS390X_OpCvt32to64F(v *Value, config *Config) bool { 1470 b := v.Block 1471 _ = b 1472 // match: (Cvt32to64F x) 1473 // cond: 1474 // result: (CDFBRA x) 1475 for { 1476 x := v.Args[0] 1477 v.reset(OpS390XCDFBRA) 1478 v.AddArg(x) 1479 return true 1480 } 1481 } 1482 func rewriteValueS390X_OpCvt64Fto32(v *Value, config *Config) bool { 1483 b := v.Block 1484 _ = b 1485 // match: (Cvt64Fto32 x) 1486 // cond: 1487 // result: (CFDBRA x) 1488 for { 1489 x := v.Args[0] 1490 v.reset(OpS390XCFDBRA) 1491 v.AddArg(x) 1492 return true 1493 } 1494 } 1495 func rewriteValueS390X_OpCvt64Fto32F(v *Value, config *Config) bool { 1496 b := v.Block 1497 _ = b 1498 // match: (Cvt64Fto32F x) 1499 // cond: 1500 // result: (LEDBR x) 1501 for { 1502 x := v.Args[0] 1503 v.reset(OpS390XLEDBR) 1504 v.AddArg(x) 1505 return true 1506 } 1507 } 1508 func rewriteValueS390X_OpCvt64Fto64(v *Value, config *Config) bool { 1509 b := v.Block 1510 _ = b 1511 // match: (Cvt64Fto64 x) 1512 // cond: 1513 // result: (CGDBRA x) 1514 for { 1515 x := v.Args[0] 1516 v.reset(OpS390XCGDBRA) 1517 v.AddArg(x) 1518 return true 1519 } 1520 } 1521 func rewriteValueS390X_OpCvt64to32F(v *Value, config *Config) bool { 1522 b := v.Block 1523 _ = b 1524 // match: (Cvt64to32F x) 1525 // cond: 1526 // result: (CEGBRA x) 1527 for { 1528 x := v.Args[0] 1529 v.reset(OpS390XCEGBRA) 1530 v.AddArg(x) 1531 return true 1532 } 1533 } 1534 func rewriteValueS390X_OpCvt64to64F(v *Value, config *Config) bool { 1535 b := v.Block 1536 _ = b 1537 // match: (Cvt64to64F x) 1538 // cond: 1539 // result: (CDGBRA x) 1540 for { 1541 x := v.Args[0] 1542 v.reset(OpS390XCDGBRA) 1543 v.AddArg(x) 1544 return true 1545 } 1546 } 1547 func rewriteValueS390X_OpDeferCall(v *Value, config *Config) bool { 1548 b := v.Block 1549 _ = b 1550 // match: (DeferCall [argwid] mem) 1551 // cond: 1552 // result: (CALLdefer [argwid] mem) 1553 for { 1554 argwid := v.AuxInt 1555 mem := v.Args[0] 1556 v.reset(OpS390XCALLdefer) 1557 v.AuxInt = argwid 1558 v.AddArg(mem) 1559 return true 1560 } 1561 } 1562 func rewriteValueS390X_OpDiv16(v *Value, config *Config) bool { 1563 b := v.Block 1564 _ = b 1565 // match: (Div16 x y) 1566 // cond: 1567 // result: (DIVW (MOVHreg x) (MOVHreg y)) 1568 for { 1569 x := v.Args[0] 1570 y := v.Args[1] 1571 v.reset(OpS390XDIVW) 1572 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1573 v0.AddArg(x) 1574 v.AddArg(v0) 1575 v1 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1576 v1.AddArg(y) 1577 v.AddArg(v1) 1578 return true 1579 } 1580 } 1581 func rewriteValueS390X_OpDiv16u(v *Value, config *Config) bool { 1582 b := v.Block 1583 _ = b 1584 // match: (Div16u x y) 1585 // cond: 1586 // result: (DIVWU (MOVHZreg x) (MOVHZreg y)) 1587 for { 1588 x := v.Args[0] 1589 y := v.Args[1] 1590 v.reset(OpS390XDIVWU) 1591 v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1592 v0.AddArg(x) 1593 v.AddArg(v0) 1594 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1595 v1.AddArg(y) 1596 v.AddArg(v1) 1597 return true 1598 } 1599 } 1600 func rewriteValueS390X_OpDiv32(v *Value, config *Config) bool { 1601 b := v.Block 1602 _ = b 1603 // match: (Div32 x y) 1604 // cond: 1605 // result: (DIVW (MOVWreg x) y) 1606 for { 1607 x := v.Args[0] 1608 y := v.Args[1] 1609 v.reset(OpS390XDIVW) 1610 v0 := b.NewValue0(v.Pos, OpS390XMOVWreg, config.fe.TypeInt64()) 1611 v0.AddArg(x) 1612 v.AddArg(v0) 1613 v.AddArg(y) 1614 return true 1615 } 1616 } 1617 func rewriteValueS390X_OpDiv32F(v *Value, config *Config) bool { 1618 b := v.Block 1619 _ = b 1620 // match: (Div32F x y) 1621 // cond: 1622 // result: (FDIVS x y) 1623 for { 1624 x := v.Args[0] 1625 y := v.Args[1] 1626 v.reset(OpS390XFDIVS) 1627 v.AddArg(x) 1628 v.AddArg(y) 1629 return true 1630 } 1631 } 1632 func rewriteValueS390X_OpDiv32u(v *Value, config *Config) bool { 1633 b := v.Block 1634 _ = b 1635 // match: (Div32u x y) 1636 // cond: 1637 // result: (DIVWU (MOVWZreg x) y) 1638 for { 1639 x := v.Args[0] 1640 y := v.Args[1] 1641 v.reset(OpS390XDIVWU) 1642 v0 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1643 v0.AddArg(x) 1644 v.AddArg(v0) 1645 v.AddArg(y) 1646 return true 1647 } 1648 } 1649 func rewriteValueS390X_OpDiv64(v *Value, config *Config) bool { 1650 b := v.Block 1651 _ = b 1652 // match: (Div64 x y) 1653 // cond: 1654 // result: (DIVD x y) 1655 for { 1656 x := v.Args[0] 1657 y := v.Args[1] 1658 v.reset(OpS390XDIVD) 1659 v.AddArg(x) 1660 v.AddArg(y) 1661 return true 1662 } 1663 } 1664 func rewriteValueS390X_OpDiv64F(v *Value, config *Config) bool { 1665 b := v.Block 1666 _ = b 1667 // match: (Div64F x y) 1668 // cond: 1669 // result: (FDIV x y) 1670 for { 1671 x := v.Args[0] 1672 y := v.Args[1] 1673 v.reset(OpS390XFDIV) 1674 v.AddArg(x) 1675 v.AddArg(y) 1676 return true 1677 } 1678 } 1679 func rewriteValueS390X_OpDiv64u(v *Value, config *Config) bool { 1680 b := v.Block 1681 _ = b 1682 // match: (Div64u x y) 1683 // cond: 1684 // result: (DIVDU x y) 1685 for { 1686 x := v.Args[0] 1687 y := v.Args[1] 1688 v.reset(OpS390XDIVDU) 1689 v.AddArg(x) 1690 v.AddArg(y) 1691 return true 1692 } 1693 } 1694 func rewriteValueS390X_OpDiv8(v *Value, config *Config) bool { 1695 b := v.Block 1696 _ = b 1697 // match: (Div8 x y) 1698 // cond: 1699 // result: (DIVW (MOVBreg x) (MOVBreg y)) 1700 for { 1701 x := v.Args[0] 1702 y := v.Args[1] 1703 v.reset(OpS390XDIVW) 1704 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1705 v0.AddArg(x) 1706 v.AddArg(v0) 1707 v1 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1708 v1.AddArg(y) 1709 v.AddArg(v1) 1710 return true 1711 } 1712 } 1713 func rewriteValueS390X_OpDiv8u(v *Value, config *Config) bool { 1714 b := v.Block 1715 _ = b 1716 // match: (Div8u x y) 1717 // cond: 1718 // result: (DIVWU (MOVBZreg x) (MOVBZreg y)) 1719 for { 1720 x := v.Args[0] 1721 y := v.Args[1] 1722 v.reset(OpS390XDIVWU) 1723 v0 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1724 v0.AddArg(x) 1725 v.AddArg(v0) 1726 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1727 v1.AddArg(y) 1728 v.AddArg(v1) 1729 return true 1730 } 1731 } 1732 func rewriteValueS390X_OpEq16(v *Value, config *Config) bool { 1733 b := v.Block 1734 _ = b 1735 // match: (Eq16 x y) 1736 // cond: 1737 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1738 for { 1739 x := v.Args[0] 1740 y := v.Args[1] 1741 v.reset(OpS390XMOVDEQ) 1742 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1743 v0.AuxInt = 0 1744 v.AddArg(v0) 1745 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1746 v1.AuxInt = 1 1747 v.AddArg(v1) 1748 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1749 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1750 v3.AddArg(x) 1751 v2.AddArg(v3) 1752 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1753 v4.AddArg(y) 1754 v2.AddArg(v4) 1755 v.AddArg(v2) 1756 return true 1757 } 1758 } 1759 func rewriteValueS390X_OpEq32(v *Value, config *Config) bool { 1760 b := v.Block 1761 _ = b 1762 // match: (Eq32 x y) 1763 // cond: 1764 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1765 for { 1766 x := v.Args[0] 1767 y := v.Args[1] 1768 v.reset(OpS390XMOVDEQ) 1769 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1770 v0.AuxInt = 0 1771 v.AddArg(v0) 1772 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1773 v1.AuxInt = 1 1774 v.AddArg(v1) 1775 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 1776 v2.AddArg(x) 1777 v2.AddArg(y) 1778 v.AddArg(v2) 1779 return true 1780 } 1781 } 1782 func rewriteValueS390X_OpEq32F(v *Value, config *Config) bool { 1783 b := v.Block 1784 _ = b 1785 // match: (Eq32F x y) 1786 // cond: 1787 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 1788 for { 1789 x := v.Args[0] 1790 y := v.Args[1] 1791 v.reset(OpS390XMOVDEQ) 1792 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1793 v0.AuxInt = 0 1794 v.AddArg(v0) 1795 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1796 v1.AuxInt = 1 1797 v.AddArg(v1) 1798 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 1799 v2.AddArg(x) 1800 v2.AddArg(y) 1801 v.AddArg(v2) 1802 return true 1803 } 1804 } 1805 func rewriteValueS390X_OpEq64(v *Value, config *Config) bool { 1806 b := v.Block 1807 _ = b 1808 // match: (Eq64 x y) 1809 // cond: 1810 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1811 for { 1812 x := v.Args[0] 1813 y := v.Args[1] 1814 v.reset(OpS390XMOVDEQ) 1815 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1816 v0.AuxInt = 0 1817 v.AddArg(v0) 1818 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1819 v1.AuxInt = 1 1820 v.AddArg(v1) 1821 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1822 v2.AddArg(x) 1823 v2.AddArg(y) 1824 v.AddArg(v2) 1825 return true 1826 } 1827 } 1828 func rewriteValueS390X_OpEq64F(v *Value, config *Config) bool { 1829 b := v.Block 1830 _ = b 1831 // match: (Eq64F x y) 1832 // cond: 1833 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 1834 for { 1835 x := v.Args[0] 1836 y := v.Args[1] 1837 v.reset(OpS390XMOVDEQ) 1838 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1839 v0.AuxInt = 0 1840 v.AddArg(v0) 1841 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1842 v1.AuxInt = 1 1843 v.AddArg(v1) 1844 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 1845 v2.AddArg(x) 1846 v2.AddArg(y) 1847 v.AddArg(v2) 1848 return true 1849 } 1850 } 1851 func rewriteValueS390X_OpEq8(v *Value, config *Config) bool { 1852 b := v.Block 1853 _ = b 1854 // match: (Eq8 x y) 1855 // cond: 1856 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1857 for { 1858 x := v.Args[0] 1859 y := v.Args[1] 1860 v.reset(OpS390XMOVDEQ) 1861 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1862 v0.AuxInt = 0 1863 v.AddArg(v0) 1864 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1865 v1.AuxInt = 1 1866 v.AddArg(v1) 1867 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1868 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1869 v3.AddArg(x) 1870 v2.AddArg(v3) 1871 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1872 v4.AddArg(y) 1873 v2.AddArg(v4) 1874 v.AddArg(v2) 1875 return true 1876 } 1877 } 1878 func rewriteValueS390X_OpEqB(v *Value, config *Config) bool { 1879 b := v.Block 1880 _ = b 1881 // match: (EqB x y) 1882 // cond: 1883 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1884 for { 1885 x := v.Args[0] 1886 y := v.Args[1] 1887 v.reset(OpS390XMOVDEQ) 1888 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1889 v0.AuxInt = 0 1890 v.AddArg(v0) 1891 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1892 v1.AuxInt = 1 1893 v.AddArg(v1) 1894 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1895 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1896 v3.AddArg(x) 1897 v2.AddArg(v3) 1898 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 1899 v4.AddArg(y) 1900 v2.AddArg(v4) 1901 v.AddArg(v2) 1902 return true 1903 } 1904 } 1905 func rewriteValueS390X_OpEqPtr(v *Value, config *Config) bool { 1906 b := v.Block 1907 _ = b 1908 // match: (EqPtr x y) 1909 // cond: 1910 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1911 for { 1912 x := v.Args[0] 1913 y := v.Args[1] 1914 v.reset(OpS390XMOVDEQ) 1915 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1916 v0.AuxInt = 0 1917 v.AddArg(v0) 1918 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1919 v1.AuxInt = 1 1920 v.AddArg(v1) 1921 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1922 v2.AddArg(x) 1923 v2.AddArg(y) 1924 v.AddArg(v2) 1925 return true 1926 } 1927 } 1928 func rewriteValueS390X_OpGeq16(v *Value, config *Config) bool { 1929 b := v.Block 1930 _ = b 1931 // match: (Geq16 x y) 1932 // cond: 1933 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1934 for { 1935 x := v.Args[0] 1936 y := v.Args[1] 1937 v.reset(OpS390XMOVDGE) 1938 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1939 v0.AuxInt = 0 1940 v.AddArg(v0) 1941 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1942 v1.AuxInt = 1 1943 v.AddArg(v1) 1944 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 1945 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1946 v3.AddArg(x) 1947 v2.AddArg(v3) 1948 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 1949 v4.AddArg(y) 1950 v2.AddArg(v4) 1951 v.AddArg(v2) 1952 return true 1953 } 1954 } 1955 func rewriteValueS390X_OpGeq16U(v *Value, config *Config) bool { 1956 b := v.Block 1957 _ = b 1958 // match: (Geq16U x y) 1959 // cond: 1960 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 1961 for { 1962 x := v.Args[0] 1963 y := v.Args[1] 1964 v.reset(OpS390XMOVDGE) 1965 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1966 v0.AuxInt = 0 1967 v.AddArg(v0) 1968 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1969 v1.AuxInt = 1 1970 v.AddArg(v1) 1971 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 1972 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1973 v3.AddArg(x) 1974 v2.AddArg(v3) 1975 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1976 v4.AddArg(y) 1977 v2.AddArg(v4) 1978 v.AddArg(v2) 1979 return true 1980 } 1981 } 1982 func rewriteValueS390X_OpGeq32(v *Value, config *Config) bool { 1983 b := v.Block 1984 _ = b 1985 // match: (Geq32 x y) 1986 // cond: 1987 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1988 for { 1989 x := v.Args[0] 1990 y := v.Args[1] 1991 v.reset(OpS390XMOVDGE) 1992 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1993 v0.AuxInt = 0 1994 v.AddArg(v0) 1995 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 1996 v1.AuxInt = 1 1997 v.AddArg(v1) 1998 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 1999 v2.AddArg(x) 2000 v2.AddArg(y) 2001 v.AddArg(v2) 2002 return true 2003 } 2004 } 2005 func rewriteValueS390X_OpGeq32F(v *Value, config *Config) bool { 2006 b := v.Block 2007 _ = b 2008 // match: (Geq32F x y) 2009 // cond: 2010 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2011 for { 2012 x := v.Args[0] 2013 y := v.Args[1] 2014 v.reset(OpS390XMOVDGEnoinv) 2015 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2016 v0.AuxInt = 0 2017 v.AddArg(v0) 2018 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2019 v1.AuxInt = 1 2020 v.AddArg(v1) 2021 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 2022 v2.AddArg(x) 2023 v2.AddArg(y) 2024 v.AddArg(v2) 2025 return true 2026 } 2027 } 2028 func rewriteValueS390X_OpGeq32U(v *Value, config *Config) bool { 2029 b := v.Block 2030 _ = b 2031 // match: (Geq32U x y) 2032 // cond: 2033 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2034 for { 2035 x := v.Args[0] 2036 y := v.Args[1] 2037 v.reset(OpS390XMOVDGE) 2038 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2039 v0.AuxInt = 0 2040 v.AddArg(v0) 2041 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2042 v1.AuxInt = 1 2043 v.AddArg(v1) 2044 v2 := b.NewValue0(v.Pos, OpS390XCMPWU, TypeFlags) 2045 v2.AddArg(x) 2046 v2.AddArg(y) 2047 v.AddArg(v2) 2048 return true 2049 } 2050 } 2051 func rewriteValueS390X_OpGeq64(v *Value, config *Config) bool { 2052 b := v.Block 2053 _ = b 2054 // match: (Geq64 x y) 2055 // cond: 2056 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2057 for { 2058 x := v.Args[0] 2059 y := v.Args[1] 2060 v.reset(OpS390XMOVDGE) 2061 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2062 v0.AuxInt = 0 2063 v.AddArg(v0) 2064 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2065 v1.AuxInt = 1 2066 v.AddArg(v1) 2067 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2068 v2.AddArg(x) 2069 v2.AddArg(y) 2070 v.AddArg(v2) 2071 return true 2072 } 2073 } 2074 func rewriteValueS390X_OpGeq64F(v *Value, config *Config) bool { 2075 b := v.Block 2076 _ = b 2077 // match: (Geq64F x y) 2078 // cond: 2079 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2080 for { 2081 x := v.Args[0] 2082 y := v.Args[1] 2083 v.reset(OpS390XMOVDGEnoinv) 2084 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2085 v0.AuxInt = 0 2086 v.AddArg(v0) 2087 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2088 v1.AuxInt = 1 2089 v.AddArg(v1) 2090 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 2091 v2.AddArg(x) 2092 v2.AddArg(y) 2093 v.AddArg(v2) 2094 return true 2095 } 2096 } 2097 func rewriteValueS390X_OpGeq64U(v *Value, config *Config) bool { 2098 b := v.Block 2099 _ = b 2100 // match: (Geq64U x y) 2101 // cond: 2102 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2103 for { 2104 x := v.Args[0] 2105 y := v.Args[1] 2106 v.reset(OpS390XMOVDGE) 2107 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2108 v0.AuxInt = 0 2109 v.AddArg(v0) 2110 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2111 v1.AuxInt = 1 2112 v.AddArg(v1) 2113 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2114 v2.AddArg(x) 2115 v2.AddArg(y) 2116 v.AddArg(v2) 2117 return true 2118 } 2119 } 2120 func rewriteValueS390X_OpGeq8(v *Value, config *Config) bool { 2121 b := v.Block 2122 _ = b 2123 // match: (Geq8 x y) 2124 // cond: 2125 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2126 for { 2127 x := v.Args[0] 2128 y := v.Args[1] 2129 v.reset(OpS390XMOVDGE) 2130 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2131 v0.AuxInt = 0 2132 v.AddArg(v0) 2133 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2134 v1.AuxInt = 1 2135 v.AddArg(v1) 2136 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2137 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2138 v3.AddArg(x) 2139 v2.AddArg(v3) 2140 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2141 v4.AddArg(y) 2142 v2.AddArg(v4) 2143 v.AddArg(v2) 2144 return true 2145 } 2146 } 2147 func rewriteValueS390X_OpGeq8U(v *Value, config *Config) bool { 2148 b := v.Block 2149 _ = b 2150 // match: (Geq8U x y) 2151 // cond: 2152 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2153 for { 2154 x := v.Args[0] 2155 y := v.Args[1] 2156 v.reset(OpS390XMOVDGE) 2157 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2158 v0.AuxInt = 0 2159 v.AddArg(v0) 2160 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2161 v1.AuxInt = 1 2162 v.AddArg(v1) 2163 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2164 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2165 v3.AddArg(x) 2166 v2.AddArg(v3) 2167 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2168 v4.AddArg(y) 2169 v2.AddArg(v4) 2170 v.AddArg(v2) 2171 return true 2172 } 2173 } 2174 func rewriteValueS390X_OpGetClosurePtr(v *Value, config *Config) bool { 2175 b := v.Block 2176 _ = b 2177 // match: (GetClosurePtr) 2178 // cond: 2179 // result: (LoweredGetClosurePtr) 2180 for { 2181 v.reset(OpS390XLoweredGetClosurePtr) 2182 return true 2183 } 2184 } 2185 func rewriteValueS390X_OpGetG(v *Value, config *Config) bool { 2186 b := v.Block 2187 _ = b 2188 // match: (GetG mem) 2189 // cond: 2190 // result: (LoweredGetG mem) 2191 for { 2192 mem := v.Args[0] 2193 v.reset(OpS390XLoweredGetG) 2194 v.AddArg(mem) 2195 return true 2196 } 2197 } 2198 func rewriteValueS390X_OpGoCall(v *Value, config *Config) bool { 2199 b := v.Block 2200 _ = b 2201 // match: (GoCall [argwid] mem) 2202 // cond: 2203 // result: (CALLgo [argwid] mem) 2204 for { 2205 argwid := v.AuxInt 2206 mem := v.Args[0] 2207 v.reset(OpS390XCALLgo) 2208 v.AuxInt = argwid 2209 v.AddArg(mem) 2210 return true 2211 } 2212 } 2213 func rewriteValueS390X_OpGreater16(v *Value, config *Config) bool { 2214 b := v.Block 2215 _ = b 2216 // match: (Greater16 x y) 2217 // cond: 2218 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2219 for { 2220 x := v.Args[0] 2221 y := v.Args[1] 2222 v.reset(OpS390XMOVDGT) 2223 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2224 v0.AuxInt = 0 2225 v.AddArg(v0) 2226 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2227 v1.AuxInt = 1 2228 v.AddArg(v1) 2229 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2230 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2231 v3.AddArg(x) 2232 v2.AddArg(v3) 2233 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2234 v4.AddArg(y) 2235 v2.AddArg(v4) 2236 v.AddArg(v2) 2237 return true 2238 } 2239 } 2240 func rewriteValueS390X_OpGreater16U(v *Value, config *Config) bool { 2241 b := v.Block 2242 _ = b 2243 // match: (Greater16U x y) 2244 // cond: 2245 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2246 for { 2247 x := v.Args[0] 2248 y := v.Args[1] 2249 v.reset(OpS390XMOVDGT) 2250 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2251 v0.AuxInt = 0 2252 v.AddArg(v0) 2253 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2254 v1.AuxInt = 1 2255 v.AddArg(v1) 2256 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2257 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2258 v3.AddArg(x) 2259 v2.AddArg(v3) 2260 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2261 v4.AddArg(y) 2262 v2.AddArg(v4) 2263 v.AddArg(v2) 2264 return true 2265 } 2266 } 2267 func rewriteValueS390X_OpGreater32(v *Value, config *Config) bool { 2268 b := v.Block 2269 _ = b 2270 // match: (Greater32 x y) 2271 // cond: 2272 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2273 for { 2274 x := v.Args[0] 2275 y := v.Args[1] 2276 v.reset(OpS390XMOVDGT) 2277 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2278 v0.AuxInt = 0 2279 v.AddArg(v0) 2280 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2281 v1.AuxInt = 1 2282 v.AddArg(v1) 2283 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 2284 v2.AddArg(x) 2285 v2.AddArg(y) 2286 v.AddArg(v2) 2287 return true 2288 } 2289 } 2290 func rewriteValueS390X_OpGreater32F(v *Value, config *Config) bool { 2291 b := v.Block 2292 _ = b 2293 // match: (Greater32F x y) 2294 // cond: 2295 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2296 for { 2297 x := v.Args[0] 2298 y := v.Args[1] 2299 v.reset(OpS390XMOVDGTnoinv) 2300 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2301 v0.AuxInt = 0 2302 v.AddArg(v0) 2303 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2304 v1.AuxInt = 1 2305 v.AddArg(v1) 2306 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 2307 v2.AddArg(x) 2308 v2.AddArg(y) 2309 v.AddArg(v2) 2310 return true 2311 } 2312 } 2313 func rewriteValueS390X_OpGreater32U(v *Value, config *Config) bool { 2314 b := v.Block 2315 _ = b 2316 // match: (Greater32U x y) 2317 // cond: 2318 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2319 for { 2320 x := v.Args[0] 2321 y := v.Args[1] 2322 v.reset(OpS390XMOVDGT) 2323 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2324 v0.AuxInt = 0 2325 v.AddArg(v0) 2326 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2327 v1.AuxInt = 1 2328 v.AddArg(v1) 2329 v2 := b.NewValue0(v.Pos, OpS390XCMPWU, TypeFlags) 2330 v2.AddArg(x) 2331 v2.AddArg(y) 2332 v.AddArg(v2) 2333 return true 2334 } 2335 } 2336 func rewriteValueS390X_OpGreater64(v *Value, config *Config) bool { 2337 b := v.Block 2338 _ = b 2339 // match: (Greater64 x y) 2340 // cond: 2341 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2342 for { 2343 x := v.Args[0] 2344 y := v.Args[1] 2345 v.reset(OpS390XMOVDGT) 2346 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2347 v0.AuxInt = 0 2348 v.AddArg(v0) 2349 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2350 v1.AuxInt = 1 2351 v.AddArg(v1) 2352 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2353 v2.AddArg(x) 2354 v2.AddArg(y) 2355 v.AddArg(v2) 2356 return true 2357 } 2358 } 2359 func rewriteValueS390X_OpGreater64F(v *Value, config *Config) bool { 2360 b := v.Block 2361 _ = b 2362 // match: (Greater64F x y) 2363 // cond: 2364 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2365 for { 2366 x := v.Args[0] 2367 y := v.Args[1] 2368 v.reset(OpS390XMOVDGTnoinv) 2369 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2370 v0.AuxInt = 0 2371 v.AddArg(v0) 2372 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2373 v1.AuxInt = 1 2374 v.AddArg(v1) 2375 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 2376 v2.AddArg(x) 2377 v2.AddArg(y) 2378 v.AddArg(v2) 2379 return true 2380 } 2381 } 2382 func rewriteValueS390X_OpGreater64U(v *Value, config *Config) bool { 2383 b := v.Block 2384 _ = b 2385 // match: (Greater64U x y) 2386 // cond: 2387 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2388 for { 2389 x := v.Args[0] 2390 y := v.Args[1] 2391 v.reset(OpS390XMOVDGT) 2392 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2393 v0.AuxInt = 0 2394 v.AddArg(v0) 2395 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2396 v1.AuxInt = 1 2397 v.AddArg(v1) 2398 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2399 v2.AddArg(x) 2400 v2.AddArg(y) 2401 v.AddArg(v2) 2402 return true 2403 } 2404 } 2405 func rewriteValueS390X_OpGreater8(v *Value, config *Config) bool { 2406 b := v.Block 2407 _ = b 2408 // match: (Greater8 x y) 2409 // cond: 2410 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2411 for { 2412 x := v.Args[0] 2413 y := v.Args[1] 2414 v.reset(OpS390XMOVDGT) 2415 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2416 v0.AuxInt = 0 2417 v.AddArg(v0) 2418 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2419 v1.AuxInt = 1 2420 v.AddArg(v1) 2421 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2422 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2423 v3.AddArg(x) 2424 v2.AddArg(v3) 2425 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2426 v4.AddArg(y) 2427 v2.AddArg(v4) 2428 v.AddArg(v2) 2429 return true 2430 } 2431 } 2432 func rewriteValueS390X_OpGreater8U(v *Value, config *Config) bool { 2433 b := v.Block 2434 _ = b 2435 // match: (Greater8U x y) 2436 // cond: 2437 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2438 for { 2439 x := v.Args[0] 2440 y := v.Args[1] 2441 v.reset(OpS390XMOVDGT) 2442 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2443 v0.AuxInt = 0 2444 v.AddArg(v0) 2445 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2446 v1.AuxInt = 1 2447 v.AddArg(v1) 2448 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2449 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2450 v3.AddArg(x) 2451 v2.AddArg(v3) 2452 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2453 v4.AddArg(y) 2454 v2.AddArg(v4) 2455 v.AddArg(v2) 2456 return true 2457 } 2458 } 2459 func rewriteValueS390X_OpHmul16(v *Value, config *Config) bool { 2460 b := v.Block 2461 _ = b 2462 // match: (Hmul16 x y) 2463 // cond: 2464 // result: (SRDconst [16] (MULLW (MOVHreg x) (MOVHreg y))) 2465 for { 2466 x := v.Args[0] 2467 y := v.Args[1] 2468 v.reset(OpS390XSRDconst) 2469 v.AuxInt = 16 2470 v0 := b.NewValue0(v.Pos, OpS390XMULLW, config.fe.TypeInt32()) 2471 v1 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2472 v1.AddArg(x) 2473 v0.AddArg(v1) 2474 v2 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2475 v2.AddArg(y) 2476 v0.AddArg(v2) 2477 v.AddArg(v0) 2478 return true 2479 } 2480 } 2481 func rewriteValueS390X_OpHmul16u(v *Value, config *Config) bool { 2482 b := v.Block 2483 _ = b 2484 // match: (Hmul16u x y) 2485 // cond: 2486 // result: (SRDconst [16] (MULLW (MOVHZreg x) (MOVHZreg y))) 2487 for { 2488 x := v.Args[0] 2489 y := v.Args[1] 2490 v.reset(OpS390XSRDconst) 2491 v.AuxInt = 16 2492 v0 := b.NewValue0(v.Pos, OpS390XMULLW, config.fe.TypeInt32()) 2493 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2494 v1.AddArg(x) 2495 v0.AddArg(v1) 2496 v2 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2497 v2.AddArg(y) 2498 v0.AddArg(v2) 2499 v.AddArg(v0) 2500 return true 2501 } 2502 } 2503 func rewriteValueS390X_OpHmul32(v *Value, config *Config) bool { 2504 b := v.Block 2505 _ = b 2506 // match: (Hmul32 x y) 2507 // cond: 2508 // result: (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y))) 2509 for { 2510 x := v.Args[0] 2511 y := v.Args[1] 2512 v.reset(OpS390XSRDconst) 2513 v.AuxInt = 32 2514 v0 := b.NewValue0(v.Pos, OpS390XMULLD, config.fe.TypeInt64()) 2515 v1 := b.NewValue0(v.Pos, OpS390XMOVWreg, config.fe.TypeInt64()) 2516 v1.AddArg(x) 2517 v0.AddArg(v1) 2518 v2 := b.NewValue0(v.Pos, OpS390XMOVWreg, config.fe.TypeInt64()) 2519 v2.AddArg(y) 2520 v0.AddArg(v2) 2521 v.AddArg(v0) 2522 return true 2523 } 2524 } 2525 func rewriteValueS390X_OpHmul32u(v *Value, config *Config) bool { 2526 b := v.Block 2527 _ = b 2528 // match: (Hmul32u x y) 2529 // cond: 2530 // result: (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y))) 2531 for { 2532 x := v.Args[0] 2533 y := v.Args[1] 2534 v.reset(OpS390XSRDconst) 2535 v.AuxInt = 32 2536 v0 := b.NewValue0(v.Pos, OpS390XMULLD, config.fe.TypeInt64()) 2537 v1 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2538 v1.AddArg(x) 2539 v0.AddArg(v1) 2540 v2 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2541 v2.AddArg(y) 2542 v0.AddArg(v2) 2543 v.AddArg(v0) 2544 return true 2545 } 2546 } 2547 func rewriteValueS390X_OpHmul64(v *Value, config *Config) bool { 2548 b := v.Block 2549 _ = b 2550 // match: (Hmul64 x y) 2551 // cond: 2552 // result: (MULHD x y) 2553 for { 2554 x := v.Args[0] 2555 y := v.Args[1] 2556 v.reset(OpS390XMULHD) 2557 v.AddArg(x) 2558 v.AddArg(y) 2559 return true 2560 } 2561 } 2562 func rewriteValueS390X_OpHmul64u(v *Value, config *Config) bool { 2563 b := v.Block 2564 _ = b 2565 // match: (Hmul64u x y) 2566 // cond: 2567 // result: (MULHDU x y) 2568 for { 2569 x := v.Args[0] 2570 y := v.Args[1] 2571 v.reset(OpS390XMULHDU) 2572 v.AddArg(x) 2573 v.AddArg(y) 2574 return true 2575 } 2576 } 2577 func rewriteValueS390X_OpHmul8(v *Value, config *Config) bool { 2578 b := v.Block 2579 _ = b 2580 // match: (Hmul8 x y) 2581 // cond: 2582 // result: (SRDconst [8] (MULLW (MOVBreg x) (MOVBreg y))) 2583 for { 2584 x := v.Args[0] 2585 y := v.Args[1] 2586 v.reset(OpS390XSRDconst) 2587 v.AuxInt = 8 2588 v0 := b.NewValue0(v.Pos, OpS390XMULLW, config.fe.TypeInt32()) 2589 v1 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2590 v1.AddArg(x) 2591 v0.AddArg(v1) 2592 v2 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2593 v2.AddArg(y) 2594 v0.AddArg(v2) 2595 v.AddArg(v0) 2596 return true 2597 } 2598 } 2599 func rewriteValueS390X_OpHmul8u(v *Value, config *Config) bool { 2600 b := v.Block 2601 _ = b 2602 // match: (Hmul8u x y) 2603 // cond: 2604 // result: (SRDconst [8] (MULLW (MOVBZreg x) (MOVBZreg y))) 2605 for { 2606 x := v.Args[0] 2607 y := v.Args[1] 2608 v.reset(OpS390XSRDconst) 2609 v.AuxInt = 8 2610 v0 := b.NewValue0(v.Pos, OpS390XMULLW, config.fe.TypeInt32()) 2611 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2612 v1.AddArg(x) 2613 v0.AddArg(v1) 2614 v2 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2615 v2.AddArg(y) 2616 v0.AddArg(v2) 2617 v.AddArg(v0) 2618 return true 2619 } 2620 } 2621 func rewriteValueS390X_OpITab(v *Value, config *Config) bool { 2622 b := v.Block 2623 _ = b 2624 // match: (ITab (Load ptr mem)) 2625 // cond: 2626 // result: (MOVDload ptr mem) 2627 for { 2628 v_0 := v.Args[0] 2629 if v_0.Op != OpLoad { 2630 break 2631 } 2632 ptr := v_0.Args[0] 2633 mem := v_0.Args[1] 2634 v.reset(OpS390XMOVDload) 2635 v.AddArg(ptr) 2636 v.AddArg(mem) 2637 return true 2638 } 2639 return false 2640 } 2641 func rewriteValueS390X_OpInterCall(v *Value, config *Config) bool { 2642 b := v.Block 2643 _ = b 2644 // match: (InterCall [argwid] entry mem) 2645 // cond: 2646 // result: (CALLinter [argwid] entry mem) 2647 for { 2648 argwid := v.AuxInt 2649 entry := v.Args[0] 2650 mem := v.Args[1] 2651 v.reset(OpS390XCALLinter) 2652 v.AuxInt = argwid 2653 v.AddArg(entry) 2654 v.AddArg(mem) 2655 return true 2656 } 2657 } 2658 func rewriteValueS390X_OpIsInBounds(v *Value, config *Config) bool { 2659 b := v.Block 2660 _ = b 2661 // match: (IsInBounds idx len) 2662 // cond: 2663 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2664 for { 2665 idx := v.Args[0] 2666 len := v.Args[1] 2667 v.reset(OpS390XMOVDLT) 2668 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2669 v0.AuxInt = 0 2670 v.AddArg(v0) 2671 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2672 v1.AuxInt = 1 2673 v.AddArg(v1) 2674 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2675 v2.AddArg(idx) 2676 v2.AddArg(len) 2677 v.AddArg(v2) 2678 return true 2679 } 2680 } 2681 func rewriteValueS390X_OpIsNonNil(v *Value, config *Config) bool { 2682 b := v.Block 2683 _ = b 2684 // match: (IsNonNil p) 2685 // cond: 2686 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPconst p [0])) 2687 for { 2688 p := v.Args[0] 2689 v.reset(OpS390XMOVDNE) 2690 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2691 v0.AuxInt = 0 2692 v.AddArg(v0) 2693 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2694 v1.AuxInt = 1 2695 v.AddArg(v1) 2696 v2 := b.NewValue0(v.Pos, OpS390XCMPconst, TypeFlags) 2697 v2.AuxInt = 0 2698 v2.AddArg(p) 2699 v.AddArg(v2) 2700 return true 2701 } 2702 } 2703 func rewriteValueS390X_OpIsSliceInBounds(v *Value, config *Config) bool { 2704 b := v.Block 2705 _ = b 2706 // match: (IsSliceInBounds idx len) 2707 // cond: 2708 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2709 for { 2710 idx := v.Args[0] 2711 len := v.Args[1] 2712 v.reset(OpS390XMOVDLE) 2713 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2714 v0.AuxInt = 0 2715 v.AddArg(v0) 2716 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2717 v1.AuxInt = 1 2718 v.AddArg(v1) 2719 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2720 v2.AddArg(idx) 2721 v2.AddArg(len) 2722 v.AddArg(v2) 2723 return true 2724 } 2725 } 2726 func rewriteValueS390X_OpLeq16(v *Value, config *Config) bool { 2727 b := v.Block 2728 _ = b 2729 // match: (Leq16 x y) 2730 // cond: 2731 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2732 for { 2733 x := v.Args[0] 2734 y := v.Args[1] 2735 v.reset(OpS390XMOVDLE) 2736 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2737 v0.AuxInt = 0 2738 v.AddArg(v0) 2739 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2740 v1.AuxInt = 1 2741 v.AddArg(v1) 2742 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2743 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2744 v3.AddArg(x) 2745 v2.AddArg(v3) 2746 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2747 v4.AddArg(y) 2748 v2.AddArg(v4) 2749 v.AddArg(v2) 2750 return true 2751 } 2752 } 2753 func rewriteValueS390X_OpLeq16U(v *Value, config *Config) bool { 2754 b := v.Block 2755 _ = b 2756 // match: (Leq16U x y) 2757 // cond: 2758 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2759 for { 2760 x := v.Args[0] 2761 y := v.Args[1] 2762 v.reset(OpS390XMOVDLE) 2763 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2764 v0.AuxInt = 0 2765 v.AddArg(v0) 2766 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2767 v1.AuxInt = 1 2768 v.AddArg(v1) 2769 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2770 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2771 v3.AddArg(x) 2772 v2.AddArg(v3) 2773 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2774 v4.AddArg(y) 2775 v2.AddArg(v4) 2776 v.AddArg(v2) 2777 return true 2778 } 2779 } 2780 func rewriteValueS390X_OpLeq32(v *Value, config *Config) bool { 2781 b := v.Block 2782 _ = b 2783 // match: (Leq32 x y) 2784 // cond: 2785 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2786 for { 2787 x := v.Args[0] 2788 y := v.Args[1] 2789 v.reset(OpS390XMOVDLE) 2790 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2791 v0.AuxInt = 0 2792 v.AddArg(v0) 2793 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2794 v1.AuxInt = 1 2795 v.AddArg(v1) 2796 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 2797 v2.AddArg(x) 2798 v2.AddArg(y) 2799 v.AddArg(v2) 2800 return true 2801 } 2802 } 2803 func rewriteValueS390X_OpLeq32F(v *Value, config *Config) bool { 2804 b := v.Block 2805 _ = b 2806 // match: (Leq32F x y) 2807 // cond: 2808 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 2809 for { 2810 x := v.Args[0] 2811 y := v.Args[1] 2812 v.reset(OpS390XMOVDGEnoinv) 2813 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2814 v0.AuxInt = 0 2815 v.AddArg(v0) 2816 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2817 v1.AuxInt = 1 2818 v.AddArg(v1) 2819 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 2820 v2.AddArg(y) 2821 v2.AddArg(x) 2822 v.AddArg(v2) 2823 return true 2824 } 2825 } 2826 func rewriteValueS390X_OpLeq32U(v *Value, config *Config) bool { 2827 b := v.Block 2828 _ = b 2829 // match: (Leq32U x y) 2830 // cond: 2831 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2832 for { 2833 x := v.Args[0] 2834 y := v.Args[1] 2835 v.reset(OpS390XMOVDLE) 2836 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2837 v0.AuxInt = 0 2838 v.AddArg(v0) 2839 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2840 v1.AuxInt = 1 2841 v.AddArg(v1) 2842 v2 := b.NewValue0(v.Pos, OpS390XCMPWU, TypeFlags) 2843 v2.AddArg(x) 2844 v2.AddArg(y) 2845 v.AddArg(v2) 2846 return true 2847 } 2848 } 2849 func rewriteValueS390X_OpLeq64(v *Value, config *Config) bool { 2850 b := v.Block 2851 _ = b 2852 // match: (Leq64 x y) 2853 // cond: 2854 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2855 for { 2856 x := v.Args[0] 2857 y := v.Args[1] 2858 v.reset(OpS390XMOVDLE) 2859 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2860 v0.AuxInt = 0 2861 v.AddArg(v0) 2862 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2863 v1.AuxInt = 1 2864 v.AddArg(v1) 2865 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2866 v2.AddArg(x) 2867 v2.AddArg(y) 2868 v.AddArg(v2) 2869 return true 2870 } 2871 } 2872 func rewriteValueS390X_OpLeq64F(v *Value, config *Config) bool { 2873 b := v.Block 2874 _ = b 2875 // match: (Leq64F x y) 2876 // cond: 2877 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 2878 for { 2879 x := v.Args[0] 2880 y := v.Args[1] 2881 v.reset(OpS390XMOVDGEnoinv) 2882 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2883 v0.AuxInt = 0 2884 v.AddArg(v0) 2885 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2886 v1.AuxInt = 1 2887 v.AddArg(v1) 2888 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 2889 v2.AddArg(y) 2890 v2.AddArg(x) 2891 v.AddArg(v2) 2892 return true 2893 } 2894 } 2895 func rewriteValueS390X_OpLeq64U(v *Value, config *Config) bool { 2896 b := v.Block 2897 _ = b 2898 // match: (Leq64U x y) 2899 // cond: 2900 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2901 for { 2902 x := v.Args[0] 2903 y := v.Args[1] 2904 v.reset(OpS390XMOVDLE) 2905 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2906 v0.AuxInt = 0 2907 v.AddArg(v0) 2908 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2909 v1.AuxInt = 1 2910 v.AddArg(v1) 2911 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2912 v2.AddArg(x) 2913 v2.AddArg(y) 2914 v.AddArg(v2) 2915 return true 2916 } 2917 } 2918 func rewriteValueS390X_OpLeq8(v *Value, config *Config) bool { 2919 b := v.Block 2920 _ = b 2921 // match: (Leq8 x y) 2922 // cond: 2923 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2924 for { 2925 x := v.Args[0] 2926 y := v.Args[1] 2927 v.reset(OpS390XMOVDLE) 2928 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2929 v0.AuxInt = 0 2930 v.AddArg(v0) 2931 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2932 v1.AuxInt = 1 2933 v.AddArg(v1) 2934 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2935 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2936 v3.AddArg(x) 2937 v2.AddArg(v3) 2938 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 2939 v4.AddArg(y) 2940 v2.AddArg(v4) 2941 v.AddArg(v2) 2942 return true 2943 } 2944 } 2945 func rewriteValueS390X_OpLeq8U(v *Value, config *Config) bool { 2946 b := v.Block 2947 _ = b 2948 // match: (Leq8U x y) 2949 // cond: 2950 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2951 for { 2952 x := v.Args[0] 2953 y := v.Args[1] 2954 v.reset(OpS390XMOVDLE) 2955 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2956 v0.AuxInt = 0 2957 v.AddArg(v0) 2958 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2959 v1.AuxInt = 1 2960 v.AddArg(v1) 2961 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 2962 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2963 v3.AddArg(x) 2964 v2.AddArg(v3) 2965 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2966 v4.AddArg(y) 2967 v2.AddArg(v4) 2968 v.AddArg(v2) 2969 return true 2970 } 2971 } 2972 func rewriteValueS390X_OpLess16(v *Value, config *Config) bool { 2973 b := v.Block 2974 _ = b 2975 // match: (Less16 x y) 2976 // cond: 2977 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2978 for { 2979 x := v.Args[0] 2980 y := v.Args[1] 2981 v.reset(OpS390XMOVDLT) 2982 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2983 v0.AuxInt = 0 2984 v.AddArg(v0) 2985 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 2986 v1.AuxInt = 1 2987 v.AddArg(v1) 2988 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 2989 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2990 v3.AddArg(x) 2991 v2.AddArg(v3) 2992 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 2993 v4.AddArg(y) 2994 v2.AddArg(v4) 2995 v.AddArg(v2) 2996 return true 2997 } 2998 } 2999 func rewriteValueS390X_OpLess16U(v *Value, config *Config) bool { 3000 b := v.Block 3001 _ = b 3002 // match: (Less16U x y) 3003 // cond: 3004 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 3005 for { 3006 x := v.Args[0] 3007 y := v.Args[1] 3008 v.reset(OpS390XMOVDLT) 3009 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3010 v0.AuxInt = 0 3011 v.AddArg(v0) 3012 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3013 v1.AuxInt = 1 3014 v.AddArg(v1) 3015 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 3016 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3017 v3.AddArg(x) 3018 v2.AddArg(v3) 3019 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3020 v4.AddArg(y) 3021 v2.AddArg(v4) 3022 v.AddArg(v2) 3023 return true 3024 } 3025 } 3026 func rewriteValueS390X_OpLess32(v *Value, config *Config) bool { 3027 b := v.Block 3028 _ = b 3029 // match: (Less32 x y) 3030 // cond: 3031 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 3032 for { 3033 x := v.Args[0] 3034 y := v.Args[1] 3035 v.reset(OpS390XMOVDLT) 3036 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3037 v0.AuxInt = 0 3038 v.AddArg(v0) 3039 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3040 v1.AuxInt = 1 3041 v.AddArg(v1) 3042 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 3043 v2.AddArg(x) 3044 v2.AddArg(y) 3045 v.AddArg(v2) 3046 return true 3047 } 3048 } 3049 func rewriteValueS390X_OpLess32F(v *Value, config *Config) bool { 3050 b := v.Block 3051 _ = b 3052 // match: (Less32F x y) 3053 // cond: 3054 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 3055 for { 3056 x := v.Args[0] 3057 y := v.Args[1] 3058 v.reset(OpS390XMOVDGTnoinv) 3059 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3060 v0.AuxInt = 0 3061 v.AddArg(v0) 3062 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3063 v1.AuxInt = 1 3064 v.AddArg(v1) 3065 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 3066 v2.AddArg(y) 3067 v2.AddArg(x) 3068 v.AddArg(v2) 3069 return true 3070 } 3071 } 3072 func rewriteValueS390X_OpLess32U(v *Value, config *Config) bool { 3073 b := v.Block 3074 _ = b 3075 // match: (Less32U x y) 3076 // cond: 3077 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 3078 for { 3079 x := v.Args[0] 3080 y := v.Args[1] 3081 v.reset(OpS390XMOVDLT) 3082 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3083 v0.AuxInt = 0 3084 v.AddArg(v0) 3085 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3086 v1.AuxInt = 1 3087 v.AddArg(v1) 3088 v2 := b.NewValue0(v.Pos, OpS390XCMPWU, TypeFlags) 3089 v2.AddArg(x) 3090 v2.AddArg(y) 3091 v.AddArg(v2) 3092 return true 3093 } 3094 } 3095 func rewriteValueS390X_OpLess64(v *Value, config *Config) bool { 3096 b := v.Block 3097 _ = b 3098 // match: (Less64 x y) 3099 // cond: 3100 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 3101 for { 3102 x := v.Args[0] 3103 y := v.Args[1] 3104 v.reset(OpS390XMOVDLT) 3105 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3106 v0.AuxInt = 0 3107 v.AddArg(v0) 3108 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3109 v1.AuxInt = 1 3110 v.AddArg(v1) 3111 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 3112 v2.AddArg(x) 3113 v2.AddArg(y) 3114 v.AddArg(v2) 3115 return true 3116 } 3117 } 3118 func rewriteValueS390X_OpLess64F(v *Value, config *Config) bool { 3119 b := v.Block 3120 _ = b 3121 // match: (Less64F x y) 3122 // cond: 3123 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 3124 for { 3125 x := v.Args[0] 3126 y := v.Args[1] 3127 v.reset(OpS390XMOVDGTnoinv) 3128 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3129 v0.AuxInt = 0 3130 v.AddArg(v0) 3131 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3132 v1.AuxInt = 1 3133 v.AddArg(v1) 3134 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 3135 v2.AddArg(y) 3136 v2.AddArg(x) 3137 v.AddArg(v2) 3138 return true 3139 } 3140 } 3141 func rewriteValueS390X_OpLess64U(v *Value, config *Config) bool { 3142 b := v.Block 3143 _ = b 3144 // match: (Less64U x y) 3145 // cond: 3146 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 3147 for { 3148 x := v.Args[0] 3149 y := v.Args[1] 3150 v.reset(OpS390XMOVDLT) 3151 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3152 v0.AuxInt = 0 3153 v.AddArg(v0) 3154 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3155 v1.AuxInt = 1 3156 v.AddArg(v1) 3157 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 3158 v2.AddArg(x) 3159 v2.AddArg(y) 3160 v.AddArg(v2) 3161 return true 3162 } 3163 } 3164 func rewriteValueS390X_OpLess8(v *Value, config *Config) bool { 3165 b := v.Block 3166 _ = b 3167 // match: (Less8 x y) 3168 // cond: 3169 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 3170 for { 3171 x := v.Args[0] 3172 y := v.Args[1] 3173 v.reset(OpS390XMOVDLT) 3174 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3175 v0.AuxInt = 0 3176 v.AddArg(v0) 3177 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3178 v1.AuxInt = 1 3179 v.AddArg(v1) 3180 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 3181 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 3182 v3.AddArg(x) 3183 v2.AddArg(v3) 3184 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 3185 v4.AddArg(y) 3186 v2.AddArg(v4) 3187 v.AddArg(v2) 3188 return true 3189 } 3190 } 3191 func rewriteValueS390X_OpLess8U(v *Value, config *Config) bool { 3192 b := v.Block 3193 _ = b 3194 // match: (Less8U x y) 3195 // cond: 3196 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 3197 for { 3198 x := v.Args[0] 3199 y := v.Args[1] 3200 v.reset(OpS390XMOVDLT) 3201 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3202 v0.AuxInt = 0 3203 v.AddArg(v0) 3204 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 3205 v1.AuxInt = 1 3206 v.AddArg(v1) 3207 v2 := b.NewValue0(v.Pos, OpS390XCMPU, TypeFlags) 3208 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3209 v3.AddArg(x) 3210 v2.AddArg(v3) 3211 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3212 v4.AddArg(y) 3213 v2.AddArg(v4) 3214 v.AddArg(v2) 3215 return true 3216 } 3217 } 3218 func rewriteValueS390X_OpLoad(v *Value, config *Config) bool { 3219 b := v.Block 3220 _ = b 3221 // match: (Load <t> ptr mem) 3222 // cond: (is64BitInt(t) || isPtr(t)) 3223 // result: (MOVDload ptr mem) 3224 for { 3225 t := v.Type 3226 ptr := v.Args[0] 3227 mem := v.Args[1] 3228 if !(is64BitInt(t) || isPtr(t)) { 3229 break 3230 } 3231 v.reset(OpS390XMOVDload) 3232 v.AddArg(ptr) 3233 v.AddArg(mem) 3234 return true 3235 } 3236 // match: (Load <t> ptr mem) 3237 // cond: is32BitInt(t) && isSigned(t) 3238 // result: (MOVWload ptr mem) 3239 for { 3240 t := v.Type 3241 ptr := v.Args[0] 3242 mem := v.Args[1] 3243 if !(is32BitInt(t) && isSigned(t)) { 3244 break 3245 } 3246 v.reset(OpS390XMOVWload) 3247 v.AddArg(ptr) 3248 v.AddArg(mem) 3249 return true 3250 } 3251 // match: (Load <t> ptr mem) 3252 // cond: is32BitInt(t) && !isSigned(t) 3253 // result: (MOVWZload ptr mem) 3254 for { 3255 t := v.Type 3256 ptr := v.Args[0] 3257 mem := v.Args[1] 3258 if !(is32BitInt(t) && !isSigned(t)) { 3259 break 3260 } 3261 v.reset(OpS390XMOVWZload) 3262 v.AddArg(ptr) 3263 v.AddArg(mem) 3264 return true 3265 } 3266 // match: (Load <t> ptr mem) 3267 // cond: is16BitInt(t) && isSigned(t) 3268 // result: (MOVHload ptr mem) 3269 for { 3270 t := v.Type 3271 ptr := v.Args[0] 3272 mem := v.Args[1] 3273 if !(is16BitInt(t) && isSigned(t)) { 3274 break 3275 } 3276 v.reset(OpS390XMOVHload) 3277 v.AddArg(ptr) 3278 v.AddArg(mem) 3279 return true 3280 } 3281 // match: (Load <t> ptr mem) 3282 // cond: is16BitInt(t) && !isSigned(t) 3283 // result: (MOVHZload ptr mem) 3284 for { 3285 t := v.Type 3286 ptr := v.Args[0] 3287 mem := v.Args[1] 3288 if !(is16BitInt(t) && !isSigned(t)) { 3289 break 3290 } 3291 v.reset(OpS390XMOVHZload) 3292 v.AddArg(ptr) 3293 v.AddArg(mem) 3294 return true 3295 } 3296 // match: (Load <t> ptr mem) 3297 // cond: is8BitInt(t) && isSigned(t) 3298 // result: (MOVBload ptr mem) 3299 for { 3300 t := v.Type 3301 ptr := v.Args[0] 3302 mem := v.Args[1] 3303 if !(is8BitInt(t) && isSigned(t)) { 3304 break 3305 } 3306 v.reset(OpS390XMOVBload) 3307 v.AddArg(ptr) 3308 v.AddArg(mem) 3309 return true 3310 } 3311 // match: (Load <t> ptr mem) 3312 // cond: (t.IsBoolean() || (is8BitInt(t) && !isSigned(t))) 3313 // result: (MOVBZload ptr mem) 3314 for { 3315 t := v.Type 3316 ptr := v.Args[0] 3317 mem := v.Args[1] 3318 if !(t.IsBoolean() || (is8BitInt(t) && !isSigned(t))) { 3319 break 3320 } 3321 v.reset(OpS390XMOVBZload) 3322 v.AddArg(ptr) 3323 v.AddArg(mem) 3324 return true 3325 } 3326 // match: (Load <t> ptr mem) 3327 // cond: is32BitFloat(t) 3328 // result: (FMOVSload ptr mem) 3329 for { 3330 t := v.Type 3331 ptr := v.Args[0] 3332 mem := v.Args[1] 3333 if !(is32BitFloat(t)) { 3334 break 3335 } 3336 v.reset(OpS390XFMOVSload) 3337 v.AddArg(ptr) 3338 v.AddArg(mem) 3339 return true 3340 } 3341 // match: (Load <t> ptr mem) 3342 // cond: is64BitFloat(t) 3343 // result: (FMOVDload ptr mem) 3344 for { 3345 t := v.Type 3346 ptr := v.Args[0] 3347 mem := v.Args[1] 3348 if !(is64BitFloat(t)) { 3349 break 3350 } 3351 v.reset(OpS390XFMOVDload) 3352 v.AddArg(ptr) 3353 v.AddArg(mem) 3354 return true 3355 } 3356 return false 3357 } 3358 func rewriteValueS390X_OpLsh16x16(v *Value, config *Config) bool { 3359 b := v.Block 3360 _ = b 3361 // match: (Lsh16x16 <t> x y) 3362 // cond: 3363 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3364 for { 3365 t := v.Type 3366 x := v.Args[0] 3367 y := v.Args[1] 3368 v.reset(OpS390XANDW) 3369 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3370 v0.AddArg(x) 3371 v0.AddArg(y) 3372 v.AddArg(v0) 3373 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3374 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3375 v2.AuxInt = 31 3376 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3377 v3.AddArg(y) 3378 v2.AddArg(v3) 3379 v1.AddArg(v2) 3380 v.AddArg(v1) 3381 return true 3382 } 3383 } 3384 func rewriteValueS390X_OpLsh16x32(v *Value, config *Config) bool { 3385 b := v.Block 3386 _ = b 3387 // match: (Lsh16x32 <t> x y) 3388 // cond: 3389 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3390 for { 3391 t := v.Type 3392 x := v.Args[0] 3393 y := v.Args[1] 3394 v.reset(OpS390XANDW) 3395 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3396 v0.AddArg(x) 3397 v0.AddArg(y) 3398 v.AddArg(v0) 3399 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3400 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3401 v2.AuxInt = 31 3402 v2.AddArg(y) 3403 v1.AddArg(v2) 3404 v.AddArg(v1) 3405 return true 3406 } 3407 } 3408 func rewriteValueS390X_OpLsh16x64(v *Value, config *Config) bool { 3409 b := v.Block 3410 _ = b 3411 // match: (Lsh16x64 <t> x y) 3412 // cond: 3413 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3414 for { 3415 t := v.Type 3416 x := v.Args[0] 3417 y := v.Args[1] 3418 v.reset(OpS390XANDW) 3419 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3420 v0.AddArg(x) 3421 v0.AddArg(y) 3422 v.AddArg(v0) 3423 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3424 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 3425 v2.AuxInt = 31 3426 v2.AddArg(y) 3427 v1.AddArg(v2) 3428 v.AddArg(v1) 3429 return true 3430 } 3431 } 3432 func rewriteValueS390X_OpLsh16x8(v *Value, config *Config) bool { 3433 b := v.Block 3434 _ = b 3435 // match: (Lsh16x8 <t> x y) 3436 // cond: 3437 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3438 for { 3439 t := v.Type 3440 x := v.Args[0] 3441 y := v.Args[1] 3442 v.reset(OpS390XANDW) 3443 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3444 v0.AddArg(x) 3445 v0.AddArg(y) 3446 v.AddArg(v0) 3447 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3448 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3449 v2.AuxInt = 31 3450 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3451 v3.AddArg(y) 3452 v2.AddArg(v3) 3453 v1.AddArg(v2) 3454 v.AddArg(v1) 3455 return true 3456 } 3457 } 3458 func rewriteValueS390X_OpLsh32x16(v *Value, config *Config) bool { 3459 b := v.Block 3460 _ = b 3461 // match: (Lsh32x16 <t> x y) 3462 // cond: 3463 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3464 for { 3465 t := v.Type 3466 x := v.Args[0] 3467 y := v.Args[1] 3468 v.reset(OpS390XANDW) 3469 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3470 v0.AddArg(x) 3471 v0.AddArg(y) 3472 v.AddArg(v0) 3473 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3474 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3475 v2.AuxInt = 31 3476 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3477 v3.AddArg(y) 3478 v2.AddArg(v3) 3479 v1.AddArg(v2) 3480 v.AddArg(v1) 3481 return true 3482 } 3483 } 3484 func rewriteValueS390X_OpLsh32x32(v *Value, config *Config) bool { 3485 b := v.Block 3486 _ = b 3487 // match: (Lsh32x32 <t> x y) 3488 // cond: 3489 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3490 for { 3491 t := v.Type 3492 x := v.Args[0] 3493 y := v.Args[1] 3494 v.reset(OpS390XANDW) 3495 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3496 v0.AddArg(x) 3497 v0.AddArg(y) 3498 v.AddArg(v0) 3499 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3500 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3501 v2.AuxInt = 31 3502 v2.AddArg(y) 3503 v1.AddArg(v2) 3504 v.AddArg(v1) 3505 return true 3506 } 3507 } 3508 func rewriteValueS390X_OpLsh32x64(v *Value, config *Config) bool { 3509 b := v.Block 3510 _ = b 3511 // match: (Lsh32x64 <t> x y) 3512 // cond: 3513 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3514 for { 3515 t := v.Type 3516 x := v.Args[0] 3517 y := v.Args[1] 3518 v.reset(OpS390XANDW) 3519 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3520 v0.AddArg(x) 3521 v0.AddArg(y) 3522 v.AddArg(v0) 3523 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3524 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 3525 v2.AuxInt = 31 3526 v2.AddArg(y) 3527 v1.AddArg(v2) 3528 v.AddArg(v1) 3529 return true 3530 } 3531 } 3532 func rewriteValueS390X_OpLsh32x8(v *Value, config *Config) bool { 3533 b := v.Block 3534 _ = b 3535 // match: (Lsh32x8 <t> x y) 3536 // cond: 3537 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3538 for { 3539 t := v.Type 3540 x := v.Args[0] 3541 y := v.Args[1] 3542 v.reset(OpS390XANDW) 3543 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3544 v0.AddArg(x) 3545 v0.AddArg(y) 3546 v.AddArg(v0) 3547 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3548 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3549 v2.AuxInt = 31 3550 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3551 v3.AddArg(y) 3552 v2.AddArg(v3) 3553 v1.AddArg(v2) 3554 v.AddArg(v1) 3555 return true 3556 } 3557 } 3558 func rewriteValueS390X_OpLsh64x16(v *Value, config *Config) bool { 3559 b := v.Block 3560 _ = b 3561 // match: (Lsh64x16 <t> x y) 3562 // cond: 3563 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 3564 for { 3565 t := v.Type 3566 x := v.Args[0] 3567 y := v.Args[1] 3568 v.reset(OpS390XAND) 3569 v0 := b.NewValue0(v.Pos, OpS390XSLD, t) 3570 v0.AddArg(x) 3571 v0.AddArg(y) 3572 v.AddArg(v0) 3573 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 3574 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3575 v2.AuxInt = 63 3576 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3577 v3.AddArg(y) 3578 v2.AddArg(v3) 3579 v1.AddArg(v2) 3580 v.AddArg(v1) 3581 return true 3582 } 3583 } 3584 func rewriteValueS390X_OpLsh64x32(v *Value, config *Config) bool { 3585 b := v.Block 3586 _ = b 3587 // match: (Lsh64x32 <t> x y) 3588 // cond: 3589 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 3590 for { 3591 t := v.Type 3592 x := v.Args[0] 3593 y := v.Args[1] 3594 v.reset(OpS390XAND) 3595 v0 := b.NewValue0(v.Pos, OpS390XSLD, t) 3596 v0.AddArg(x) 3597 v0.AddArg(y) 3598 v.AddArg(v0) 3599 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 3600 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3601 v2.AuxInt = 63 3602 v2.AddArg(y) 3603 v1.AddArg(v2) 3604 v.AddArg(v1) 3605 return true 3606 } 3607 } 3608 func rewriteValueS390X_OpLsh64x64(v *Value, config *Config) bool { 3609 b := v.Block 3610 _ = b 3611 // match: (Lsh64x64 <t> x y) 3612 // cond: 3613 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 3614 for { 3615 t := v.Type 3616 x := v.Args[0] 3617 y := v.Args[1] 3618 v.reset(OpS390XAND) 3619 v0 := b.NewValue0(v.Pos, OpS390XSLD, t) 3620 v0.AddArg(x) 3621 v0.AddArg(y) 3622 v.AddArg(v0) 3623 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 3624 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 3625 v2.AuxInt = 63 3626 v2.AddArg(y) 3627 v1.AddArg(v2) 3628 v.AddArg(v1) 3629 return true 3630 } 3631 } 3632 func rewriteValueS390X_OpLsh64x8(v *Value, config *Config) bool { 3633 b := v.Block 3634 _ = b 3635 // match: (Lsh64x8 <t> x y) 3636 // cond: 3637 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 3638 for { 3639 t := v.Type 3640 x := v.Args[0] 3641 y := v.Args[1] 3642 v.reset(OpS390XAND) 3643 v0 := b.NewValue0(v.Pos, OpS390XSLD, t) 3644 v0.AddArg(x) 3645 v0.AddArg(y) 3646 v.AddArg(v0) 3647 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 3648 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3649 v2.AuxInt = 63 3650 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3651 v3.AddArg(y) 3652 v2.AddArg(v3) 3653 v1.AddArg(v2) 3654 v.AddArg(v1) 3655 return true 3656 } 3657 } 3658 func rewriteValueS390X_OpLsh8x16(v *Value, config *Config) bool { 3659 b := v.Block 3660 _ = b 3661 // match: (Lsh8x16 <t> x y) 3662 // cond: 3663 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3664 for { 3665 t := v.Type 3666 x := v.Args[0] 3667 y := v.Args[1] 3668 v.reset(OpS390XANDW) 3669 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3670 v0.AddArg(x) 3671 v0.AddArg(y) 3672 v.AddArg(v0) 3673 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3674 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3675 v2.AuxInt = 31 3676 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3677 v3.AddArg(y) 3678 v2.AddArg(v3) 3679 v1.AddArg(v2) 3680 v.AddArg(v1) 3681 return true 3682 } 3683 } 3684 func rewriteValueS390X_OpLsh8x32(v *Value, config *Config) bool { 3685 b := v.Block 3686 _ = b 3687 // match: (Lsh8x32 <t> x y) 3688 // cond: 3689 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3690 for { 3691 t := v.Type 3692 x := v.Args[0] 3693 y := v.Args[1] 3694 v.reset(OpS390XANDW) 3695 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3696 v0.AddArg(x) 3697 v0.AddArg(y) 3698 v.AddArg(v0) 3699 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3700 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3701 v2.AuxInt = 31 3702 v2.AddArg(y) 3703 v1.AddArg(v2) 3704 v.AddArg(v1) 3705 return true 3706 } 3707 } 3708 func rewriteValueS390X_OpLsh8x64(v *Value, config *Config) bool { 3709 b := v.Block 3710 _ = b 3711 // match: (Lsh8x64 <t> x y) 3712 // cond: 3713 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3714 for { 3715 t := v.Type 3716 x := v.Args[0] 3717 y := v.Args[1] 3718 v.reset(OpS390XANDW) 3719 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3720 v0.AddArg(x) 3721 v0.AddArg(y) 3722 v.AddArg(v0) 3723 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3724 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 3725 v2.AuxInt = 31 3726 v2.AddArg(y) 3727 v1.AddArg(v2) 3728 v.AddArg(v1) 3729 return true 3730 } 3731 } 3732 func rewriteValueS390X_OpLsh8x8(v *Value, config *Config) bool { 3733 b := v.Block 3734 _ = b 3735 // match: (Lsh8x8 <t> x y) 3736 // cond: 3737 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3738 for { 3739 t := v.Type 3740 x := v.Args[0] 3741 y := v.Args[1] 3742 v.reset(OpS390XANDW) 3743 v0 := b.NewValue0(v.Pos, OpS390XSLW, t) 3744 v0.AddArg(x) 3745 v0.AddArg(y) 3746 v.AddArg(v0) 3747 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 3748 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 3749 v2.AuxInt = 31 3750 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3751 v3.AddArg(y) 3752 v2.AddArg(v3) 3753 v1.AddArg(v2) 3754 v.AddArg(v1) 3755 return true 3756 } 3757 } 3758 func rewriteValueS390X_OpMod16(v *Value, config *Config) bool { 3759 b := v.Block 3760 _ = b 3761 // match: (Mod16 x y) 3762 // cond: 3763 // result: (MODW (MOVHreg x) (MOVHreg y)) 3764 for { 3765 x := v.Args[0] 3766 y := v.Args[1] 3767 v.reset(OpS390XMODW) 3768 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 3769 v0.AddArg(x) 3770 v.AddArg(v0) 3771 v1 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 3772 v1.AddArg(y) 3773 v.AddArg(v1) 3774 return true 3775 } 3776 } 3777 func rewriteValueS390X_OpMod16u(v *Value, config *Config) bool { 3778 b := v.Block 3779 _ = b 3780 // match: (Mod16u x y) 3781 // cond: 3782 // result: (MODWU (MOVHZreg x) (MOVHZreg y)) 3783 for { 3784 x := v.Args[0] 3785 y := v.Args[1] 3786 v.reset(OpS390XMODWU) 3787 v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3788 v0.AddArg(x) 3789 v.AddArg(v0) 3790 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3791 v1.AddArg(y) 3792 v.AddArg(v1) 3793 return true 3794 } 3795 } 3796 func rewriteValueS390X_OpMod32(v *Value, config *Config) bool { 3797 b := v.Block 3798 _ = b 3799 // match: (Mod32 x y) 3800 // cond: 3801 // result: (MODW (MOVWreg x) y) 3802 for { 3803 x := v.Args[0] 3804 y := v.Args[1] 3805 v.reset(OpS390XMODW) 3806 v0 := b.NewValue0(v.Pos, OpS390XMOVWreg, config.fe.TypeInt64()) 3807 v0.AddArg(x) 3808 v.AddArg(v0) 3809 v.AddArg(y) 3810 return true 3811 } 3812 } 3813 func rewriteValueS390X_OpMod32u(v *Value, config *Config) bool { 3814 b := v.Block 3815 _ = b 3816 // match: (Mod32u x y) 3817 // cond: 3818 // result: (MODWU (MOVWZreg x) y) 3819 for { 3820 x := v.Args[0] 3821 y := v.Args[1] 3822 v.reset(OpS390XMODWU) 3823 v0 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 3824 v0.AddArg(x) 3825 v.AddArg(v0) 3826 v.AddArg(y) 3827 return true 3828 } 3829 } 3830 func rewriteValueS390X_OpMod64(v *Value, config *Config) bool { 3831 b := v.Block 3832 _ = b 3833 // match: (Mod64 x y) 3834 // cond: 3835 // result: (MODD x y) 3836 for { 3837 x := v.Args[0] 3838 y := v.Args[1] 3839 v.reset(OpS390XMODD) 3840 v.AddArg(x) 3841 v.AddArg(y) 3842 return true 3843 } 3844 } 3845 func rewriteValueS390X_OpMod64u(v *Value, config *Config) bool { 3846 b := v.Block 3847 _ = b 3848 // match: (Mod64u x y) 3849 // cond: 3850 // result: (MODDU x y) 3851 for { 3852 x := v.Args[0] 3853 y := v.Args[1] 3854 v.reset(OpS390XMODDU) 3855 v.AddArg(x) 3856 v.AddArg(y) 3857 return true 3858 } 3859 } 3860 func rewriteValueS390X_OpMod8(v *Value, config *Config) bool { 3861 b := v.Block 3862 _ = b 3863 // match: (Mod8 x y) 3864 // cond: 3865 // result: (MODW (MOVBreg x) (MOVBreg y)) 3866 for { 3867 x := v.Args[0] 3868 y := v.Args[1] 3869 v.reset(OpS390XMODW) 3870 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 3871 v0.AddArg(x) 3872 v.AddArg(v0) 3873 v1 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 3874 v1.AddArg(y) 3875 v.AddArg(v1) 3876 return true 3877 } 3878 } 3879 func rewriteValueS390X_OpMod8u(v *Value, config *Config) bool { 3880 b := v.Block 3881 _ = b 3882 // match: (Mod8u x y) 3883 // cond: 3884 // result: (MODWU (MOVBZreg x) (MOVBZreg y)) 3885 for { 3886 x := v.Args[0] 3887 y := v.Args[1] 3888 v.reset(OpS390XMODWU) 3889 v0 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3890 v0.AddArg(x) 3891 v.AddArg(v0) 3892 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3893 v1.AddArg(y) 3894 v.AddArg(v1) 3895 return true 3896 } 3897 } 3898 func rewriteValueS390X_OpMove(v *Value, config *Config) bool { 3899 b := v.Block 3900 _ = b 3901 // match: (Move [s] _ _ mem) 3902 // cond: SizeAndAlign(s).Size() == 0 3903 // result: mem 3904 for { 3905 s := v.AuxInt 3906 mem := v.Args[2] 3907 if !(SizeAndAlign(s).Size() == 0) { 3908 break 3909 } 3910 v.reset(OpCopy) 3911 v.Type = mem.Type 3912 v.AddArg(mem) 3913 return true 3914 } 3915 // match: (Move [s] dst src mem) 3916 // cond: SizeAndAlign(s).Size() == 1 3917 // result: (MOVBstore dst (MOVBZload src mem) mem) 3918 for { 3919 s := v.AuxInt 3920 dst := v.Args[0] 3921 src := v.Args[1] 3922 mem := v.Args[2] 3923 if !(SizeAndAlign(s).Size() == 1) { 3924 break 3925 } 3926 v.reset(OpS390XMOVBstore) 3927 v.AddArg(dst) 3928 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, config.fe.TypeUInt8()) 3929 v0.AddArg(src) 3930 v0.AddArg(mem) 3931 v.AddArg(v0) 3932 v.AddArg(mem) 3933 return true 3934 } 3935 // match: (Move [s] dst src mem) 3936 // cond: SizeAndAlign(s).Size() == 2 3937 // result: (MOVHstore dst (MOVHZload src mem) mem) 3938 for { 3939 s := v.AuxInt 3940 dst := v.Args[0] 3941 src := v.Args[1] 3942 mem := v.Args[2] 3943 if !(SizeAndAlign(s).Size() == 2) { 3944 break 3945 } 3946 v.reset(OpS390XMOVHstore) 3947 v.AddArg(dst) 3948 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 3949 v0.AddArg(src) 3950 v0.AddArg(mem) 3951 v.AddArg(v0) 3952 v.AddArg(mem) 3953 return true 3954 } 3955 // match: (Move [s] dst src mem) 3956 // cond: SizeAndAlign(s).Size() == 4 3957 // result: (MOVWstore dst (MOVWZload src mem) mem) 3958 for { 3959 s := v.AuxInt 3960 dst := v.Args[0] 3961 src := v.Args[1] 3962 mem := v.Args[2] 3963 if !(SizeAndAlign(s).Size() == 4) { 3964 break 3965 } 3966 v.reset(OpS390XMOVWstore) 3967 v.AddArg(dst) 3968 v0 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 3969 v0.AddArg(src) 3970 v0.AddArg(mem) 3971 v.AddArg(v0) 3972 v.AddArg(mem) 3973 return true 3974 } 3975 // match: (Move [s] dst src mem) 3976 // cond: SizeAndAlign(s).Size() == 8 3977 // result: (MOVDstore dst (MOVDload src mem) mem) 3978 for { 3979 s := v.AuxInt 3980 dst := v.Args[0] 3981 src := v.Args[1] 3982 mem := v.Args[2] 3983 if !(SizeAndAlign(s).Size() == 8) { 3984 break 3985 } 3986 v.reset(OpS390XMOVDstore) 3987 v.AddArg(dst) 3988 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 3989 v0.AddArg(src) 3990 v0.AddArg(mem) 3991 v.AddArg(v0) 3992 v.AddArg(mem) 3993 return true 3994 } 3995 // match: (Move [s] dst src mem) 3996 // cond: SizeAndAlign(s).Size() == 16 3997 // result: (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem)) 3998 for { 3999 s := v.AuxInt 4000 dst := v.Args[0] 4001 src := v.Args[1] 4002 mem := v.Args[2] 4003 if !(SizeAndAlign(s).Size() == 16) { 4004 break 4005 } 4006 v.reset(OpS390XMOVDstore) 4007 v.AuxInt = 8 4008 v.AddArg(dst) 4009 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4010 v0.AuxInt = 8 4011 v0.AddArg(src) 4012 v0.AddArg(mem) 4013 v.AddArg(v0) 4014 v1 := b.NewValue0(v.Pos, OpS390XMOVDstore, TypeMem) 4015 v1.AddArg(dst) 4016 v2 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4017 v2.AddArg(src) 4018 v2.AddArg(mem) 4019 v1.AddArg(v2) 4020 v1.AddArg(mem) 4021 v.AddArg(v1) 4022 return true 4023 } 4024 // match: (Move [s] dst src mem) 4025 // cond: SizeAndAlign(s).Size() == 24 4026 // result: (MOVDstore [16] dst (MOVDload [16] src mem) (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))) 4027 for { 4028 s := v.AuxInt 4029 dst := v.Args[0] 4030 src := v.Args[1] 4031 mem := v.Args[2] 4032 if !(SizeAndAlign(s).Size() == 24) { 4033 break 4034 } 4035 v.reset(OpS390XMOVDstore) 4036 v.AuxInt = 16 4037 v.AddArg(dst) 4038 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4039 v0.AuxInt = 16 4040 v0.AddArg(src) 4041 v0.AddArg(mem) 4042 v.AddArg(v0) 4043 v1 := b.NewValue0(v.Pos, OpS390XMOVDstore, TypeMem) 4044 v1.AuxInt = 8 4045 v1.AddArg(dst) 4046 v2 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4047 v2.AuxInt = 8 4048 v2.AddArg(src) 4049 v2.AddArg(mem) 4050 v1.AddArg(v2) 4051 v3 := b.NewValue0(v.Pos, OpS390XMOVDstore, TypeMem) 4052 v3.AddArg(dst) 4053 v4 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 4054 v4.AddArg(src) 4055 v4.AddArg(mem) 4056 v3.AddArg(v4) 4057 v3.AddArg(mem) 4058 v1.AddArg(v3) 4059 v.AddArg(v1) 4060 return true 4061 } 4062 // match: (Move [s] dst src mem) 4063 // cond: SizeAndAlign(s).Size() == 3 4064 // result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHZload src mem) mem)) 4065 for { 4066 s := v.AuxInt 4067 dst := v.Args[0] 4068 src := v.Args[1] 4069 mem := v.Args[2] 4070 if !(SizeAndAlign(s).Size() == 3) { 4071 break 4072 } 4073 v.reset(OpS390XMOVBstore) 4074 v.AuxInt = 2 4075 v.AddArg(dst) 4076 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, config.fe.TypeUInt8()) 4077 v0.AuxInt = 2 4078 v0.AddArg(src) 4079 v0.AddArg(mem) 4080 v.AddArg(v0) 4081 v1 := b.NewValue0(v.Pos, OpS390XMOVHstore, TypeMem) 4082 v1.AddArg(dst) 4083 v2 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 4084 v2.AddArg(src) 4085 v2.AddArg(mem) 4086 v1.AddArg(v2) 4087 v1.AddArg(mem) 4088 v.AddArg(v1) 4089 return true 4090 } 4091 // match: (Move [s] dst src mem) 4092 // cond: SizeAndAlign(s).Size() == 5 4093 // result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4094 for { 4095 s := v.AuxInt 4096 dst := v.Args[0] 4097 src := v.Args[1] 4098 mem := v.Args[2] 4099 if !(SizeAndAlign(s).Size() == 5) { 4100 break 4101 } 4102 v.reset(OpS390XMOVBstore) 4103 v.AuxInt = 4 4104 v.AddArg(dst) 4105 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, config.fe.TypeUInt8()) 4106 v0.AuxInt = 4 4107 v0.AddArg(src) 4108 v0.AddArg(mem) 4109 v.AddArg(v0) 4110 v1 := b.NewValue0(v.Pos, OpS390XMOVWstore, TypeMem) 4111 v1.AddArg(dst) 4112 v2 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 4113 v2.AddArg(src) 4114 v2.AddArg(mem) 4115 v1.AddArg(v2) 4116 v1.AddArg(mem) 4117 v.AddArg(v1) 4118 return true 4119 } 4120 // match: (Move [s] dst src mem) 4121 // cond: SizeAndAlign(s).Size() == 6 4122 // result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4123 for { 4124 s := v.AuxInt 4125 dst := v.Args[0] 4126 src := v.Args[1] 4127 mem := v.Args[2] 4128 if !(SizeAndAlign(s).Size() == 6) { 4129 break 4130 } 4131 v.reset(OpS390XMOVHstore) 4132 v.AuxInt = 4 4133 v.AddArg(dst) 4134 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 4135 v0.AuxInt = 4 4136 v0.AddArg(src) 4137 v0.AddArg(mem) 4138 v.AddArg(v0) 4139 v1 := b.NewValue0(v.Pos, OpS390XMOVWstore, TypeMem) 4140 v1.AddArg(dst) 4141 v2 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 4142 v2.AddArg(src) 4143 v2.AddArg(mem) 4144 v1.AddArg(v2) 4145 v1.AddArg(mem) 4146 v.AddArg(v1) 4147 return true 4148 } 4149 // match: (Move [s] dst src mem) 4150 // cond: SizeAndAlign(s).Size() == 7 4151 // result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))) 4152 for { 4153 s := v.AuxInt 4154 dst := v.Args[0] 4155 src := v.Args[1] 4156 mem := v.Args[2] 4157 if !(SizeAndAlign(s).Size() == 7) { 4158 break 4159 } 4160 v.reset(OpS390XMOVBstore) 4161 v.AuxInt = 6 4162 v.AddArg(dst) 4163 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, config.fe.TypeUInt8()) 4164 v0.AuxInt = 6 4165 v0.AddArg(src) 4166 v0.AddArg(mem) 4167 v.AddArg(v0) 4168 v1 := b.NewValue0(v.Pos, OpS390XMOVHstore, TypeMem) 4169 v1.AuxInt = 4 4170 v1.AddArg(dst) 4171 v2 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 4172 v2.AuxInt = 4 4173 v2.AddArg(src) 4174 v2.AddArg(mem) 4175 v1.AddArg(v2) 4176 v3 := b.NewValue0(v.Pos, OpS390XMOVWstore, TypeMem) 4177 v3.AddArg(dst) 4178 v4 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 4179 v4.AddArg(src) 4180 v4.AddArg(mem) 4181 v3.AddArg(v4) 4182 v3.AddArg(mem) 4183 v1.AddArg(v3) 4184 v.AddArg(v1) 4185 return true 4186 } 4187 // match: (Move [s] dst src mem) 4188 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256 4189 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size(), 0)] dst src mem) 4190 for { 4191 s := v.AuxInt 4192 dst := v.Args[0] 4193 src := v.Args[1] 4194 mem := v.Args[2] 4195 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256) { 4196 break 4197 } 4198 v.reset(OpS390XMVC) 4199 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 4200 v.AddArg(dst) 4201 v.AddArg(src) 4202 v.AddArg(mem) 4203 return true 4204 } 4205 // match: (Move [s] dst src mem) 4206 // cond: SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512 4207 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)) 4208 for { 4209 s := v.AuxInt 4210 dst := v.Args[0] 4211 src := v.Args[1] 4212 mem := v.Args[2] 4213 if !(SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512) { 4214 break 4215 } 4216 v.reset(OpS390XMVC) 4217 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-256, 256) 4218 v.AddArg(dst) 4219 v.AddArg(src) 4220 v0 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4221 v0.AuxInt = makeValAndOff(256, 0) 4222 v0.AddArg(dst) 4223 v0.AddArg(src) 4224 v0.AddArg(mem) 4225 v.AddArg(v0) 4226 return true 4227 } 4228 // match: (Move [s] dst src mem) 4229 // cond: SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768 4230 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-512, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem))) 4231 for { 4232 s := v.AuxInt 4233 dst := v.Args[0] 4234 src := v.Args[1] 4235 mem := v.Args[2] 4236 if !(SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768) { 4237 break 4238 } 4239 v.reset(OpS390XMVC) 4240 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-512, 512) 4241 v.AddArg(dst) 4242 v.AddArg(src) 4243 v0 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4244 v0.AuxInt = makeValAndOff(256, 256) 4245 v0.AddArg(dst) 4246 v0.AddArg(src) 4247 v1 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4248 v1.AuxInt = makeValAndOff(256, 0) 4249 v1.AddArg(dst) 4250 v1.AddArg(src) 4251 v1.AddArg(mem) 4252 v0.AddArg(v1) 4253 v.AddArg(v0) 4254 return true 4255 } 4256 // match: (Move [s] dst src mem) 4257 // cond: SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024 4258 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-768, 768)] dst src (MVC [makeValAndOff(256, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)))) 4259 for { 4260 s := v.AuxInt 4261 dst := v.Args[0] 4262 src := v.Args[1] 4263 mem := v.Args[2] 4264 if !(SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024) { 4265 break 4266 } 4267 v.reset(OpS390XMVC) 4268 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-768, 768) 4269 v.AddArg(dst) 4270 v.AddArg(src) 4271 v0 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4272 v0.AuxInt = makeValAndOff(256, 512) 4273 v0.AddArg(dst) 4274 v0.AddArg(src) 4275 v1 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4276 v1.AuxInt = makeValAndOff(256, 256) 4277 v1.AddArg(dst) 4278 v1.AddArg(src) 4279 v2 := b.NewValue0(v.Pos, OpS390XMVC, TypeMem) 4280 v2.AuxInt = makeValAndOff(256, 0) 4281 v2.AddArg(dst) 4282 v2.AddArg(src) 4283 v2.AddArg(mem) 4284 v1.AddArg(v2) 4285 v0.AddArg(v1) 4286 v.AddArg(v0) 4287 return true 4288 } 4289 // match: (Move [s] dst src mem) 4290 // cond: SizeAndAlign(s).Size() > 1024 4291 // result: (LoweredMove [SizeAndAlign(s).Size()%256] dst src (ADDconst <src.Type> src [(SizeAndAlign(s).Size()/256)*256]) mem) 4292 for { 4293 s := v.AuxInt 4294 dst := v.Args[0] 4295 src := v.Args[1] 4296 mem := v.Args[2] 4297 if !(SizeAndAlign(s).Size() > 1024) { 4298 break 4299 } 4300 v.reset(OpS390XLoweredMove) 4301 v.AuxInt = SizeAndAlign(s).Size() % 256 4302 v.AddArg(dst) 4303 v.AddArg(src) 4304 v0 := b.NewValue0(v.Pos, OpS390XADDconst, src.Type) 4305 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 4306 v0.AddArg(src) 4307 v.AddArg(v0) 4308 v.AddArg(mem) 4309 return true 4310 } 4311 return false 4312 } 4313 func rewriteValueS390X_OpMul16(v *Value, config *Config) bool { 4314 b := v.Block 4315 _ = b 4316 // match: (Mul16 x y) 4317 // cond: 4318 // result: (MULLW x y) 4319 for { 4320 x := v.Args[0] 4321 y := v.Args[1] 4322 v.reset(OpS390XMULLW) 4323 v.AddArg(x) 4324 v.AddArg(y) 4325 return true 4326 } 4327 } 4328 func rewriteValueS390X_OpMul32(v *Value, config *Config) bool { 4329 b := v.Block 4330 _ = b 4331 // match: (Mul32 x y) 4332 // cond: 4333 // result: (MULLW x y) 4334 for { 4335 x := v.Args[0] 4336 y := v.Args[1] 4337 v.reset(OpS390XMULLW) 4338 v.AddArg(x) 4339 v.AddArg(y) 4340 return true 4341 } 4342 } 4343 func rewriteValueS390X_OpMul32F(v *Value, config *Config) bool { 4344 b := v.Block 4345 _ = b 4346 // match: (Mul32F x y) 4347 // cond: 4348 // result: (FMULS x y) 4349 for { 4350 x := v.Args[0] 4351 y := v.Args[1] 4352 v.reset(OpS390XFMULS) 4353 v.AddArg(x) 4354 v.AddArg(y) 4355 return true 4356 } 4357 } 4358 func rewriteValueS390X_OpMul64(v *Value, config *Config) bool { 4359 b := v.Block 4360 _ = b 4361 // match: (Mul64 x y) 4362 // cond: 4363 // result: (MULLD x y) 4364 for { 4365 x := v.Args[0] 4366 y := v.Args[1] 4367 v.reset(OpS390XMULLD) 4368 v.AddArg(x) 4369 v.AddArg(y) 4370 return true 4371 } 4372 } 4373 func rewriteValueS390X_OpMul64F(v *Value, config *Config) bool { 4374 b := v.Block 4375 _ = b 4376 // match: (Mul64F x y) 4377 // cond: 4378 // result: (FMUL x y) 4379 for { 4380 x := v.Args[0] 4381 y := v.Args[1] 4382 v.reset(OpS390XFMUL) 4383 v.AddArg(x) 4384 v.AddArg(y) 4385 return true 4386 } 4387 } 4388 func rewriteValueS390X_OpMul8(v *Value, config *Config) bool { 4389 b := v.Block 4390 _ = b 4391 // match: (Mul8 x y) 4392 // cond: 4393 // result: (MULLW x y) 4394 for { 4395 x := v.Args[0] 4396 y := v.Args[1] 4397 v.reset(OpS390XMULLW) 4398 v.AddArg(x) 4399 v.AddArg(y) 4400 return true 4401 } 4402 } 4403 func rewriteValueS390X_OpNeg16(v *Value, config *Config) bool { 4404 b := v.Block 4405 _ = b 4406 // match: (Neg16 x) 4407 // cond: 4408 // result: (NEGW (MOVHreg x)) 4409 for { 4410 x := v.Args[0] 4411 v.reset(OpS390XNEGW) 4412 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4413 v0.AddArg(x) 4414 v.AddArg(v0) 4415 return true 4416 } 4417 } 4418 func rewriteValueS390X_OpNeg32(v *Value, config *Config) bool { 4419 b := v.Block 4420 _ = b 4421 // match: (Neg32 x) 4422 // cond: 4423 // result: (NEGW x) 4424 for { 4425 x := v.Args[0] 4426 v.reset(OpS390XNEGW) 4427 v.AddArg(x) 4428 return true 4429 } 4430 } 4431 func rewriteValueS390X_OpNeg32F(v *Value, config *Config) bool { 4432 b := v.Block 4433 _ = b 4434 // match: (Neg32F x) 4435 // cond: 4436 // result: (FNEGS x) 4437 for { 4438 x := v.Args[0] 4439 v.reset(OpS390XFNEGS) 4440 v.AddArg(x) 4441 return true 4442 } 4443 } 4444 func rewriteValueS390X_OpNeg64(v *Value, config *Config) bool { 4445 b := v.Block 4446 _ = b 4447 // match: (Neg64 x) 4448 // cond: 4449 // result: (NEG x) 4450 for { 4451 x := v.Args[0] 4452 v.reset(OpS390XNEG) 4453 v.AddArg(x) 4454 return true 4455 } 4456 } 4457 func rewriteValueS390X_OpNeg64F(v *Value, config *Config) bool { 4458 b := v.Block 4459 _ = b 4460 // match: (Neg64F x) 4461 // cond: 4462 // result: (FNEG x) 4463 for { 4464 x := v.Args[0] 4465 v.reset(OpS390XFNEG) 4466 v.AddArg(x) 4467 return true 4468 } 4469 } 4470 func rewriteValueS390X_OpNeg8(v *Value, config *Config) bool { 4471 b := v.Block 4472 _ = b 4473 // match: (Neg8 x) 4474 // cond: 4475 // result: (NEGW (MOVBreg x)) 4476 for { 4477 x := v.Args[0] 4478 v.reset(OpS390XNEGW) 4479 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4480 v0.AddArg(x) 4481 v.AddArg(v0) 4482 return true 4483 } 4484 } 4485 func rewriteValueS390X_OpNeq16(v *Value, config *Config) bool { 4486 b := v.Block 4487 _ = b 4488 // match: (Neq16 x y) 4489 // cond: 4490 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 4491 for { 4492 x := v.Args[0] 4493 y := v.Args[1] 4494 v.reset(OpS390XMOVDNE) 4495 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4496 v0.AuxInt = 0 4497 v.AddArg(v0) 4498 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4499 v1.AuxInt = 1 4500 v.AddArg(v1) 4501 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4502 v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4503 v3.AddArg(x) 4504 v2.AddArg(v3) 4505 v4 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4506 v4.AddArg(y) 4507 v2.AddArg(v4) 4508 v.AddArg(v2) 4509 return true 4510 } 4511 } 4512 func rewriteValueS390X_OpNeq32(v *Value, config *Config) bool { 4513 b := v.Block 4514 _ = b 4515 // match: (Neq32 x y) 4516 // cond: 4517 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 4518 for { 4519 x := v.Args[0] 4520 y := v.Args[1] 4521 v.reset(OpS390XMOVDNE) 4522 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4523 v0.AuxInt = 0 4524 v.AddArg(v0) 4525 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4526 v1.AuxInt = 1 4527 v.AddArg(v1) 4528 v2 := b.NewValue0(v.Pos, OpS390XCMPW, TypeFlags) 4529 v2.AddArg(x) 4530 v2.AddArg(y) 4531 v.AddArg(v2) 4532 return true 4533 } 4534 } 4535 func rewriteValueS390X_OpNeq32F(v *Value, config *Config) bool { 4536 b := v.Block 4537 _ = b 4538 // match: (Neq32F x y) 4539 // cond: 4540 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 4541 for { 4542 x := v.Args[0] 4543 y := v.Args[1] 4544 v.reset(OpS390XMOVDNE) 4545 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4546 v0.AuxInt = 0 4547 v.AddArg(v0) 4548 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4549 v1.AuxInt = 1 4550 v.AddArg(v1) 4551 v2 := b.NewValue0(v.Pos, OpS390XFCMPS, TypeFlags) 4552 v2.AddArg(x) 4553 v2.AddArg(y) 4554 v.AddArg(v2) 4555 return true 4556 } 4557 } 4558 func rewriteValueS390X_OpNeq64(v *Value, config *Config) bool { 4559 b := v.Block 4560 _ = b 4561 // match: (Neq64 x y) 4562 // cond: 4563 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4564 for { 4565 x := v.Args[0] 4566 y := v.Args[1] 4567 v.reset(OpS390XMOVDNE) 4568 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4569 v0.AuxInt = 0 4570 v.AddArg(v0) 4571 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4572 v1.AuxInt = 1 4573 v.AddArg(v1) 4574 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4575 v2.AddArg(x) 4576 v2.AddArg(y) 4577 v.AddArg(v2) 4578 return true 4579 } 4580 } 4581 func rewriteValueS390X_OpNeq64F(v *Value, config *Config) bool { 4582 b := v.Block 4583 _ = b 4584 // match: (Neq64F x y) 4585 // cond: 4586 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 4587 for { 4588 x := v.Args[0] 4589 y := v.Args[1] 4590 v.reset(OpS390XMOVDNE) 4591 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4592 v0.AuxInt = 0 4593 v.AddArg(v0) 4594 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4595 v1.AuxInt = 1 4596 v.AddArg(v1) 4597 v2 := b.NewValue0(v.Pos, OpS390XFCMP, TypeFlags) 4598 v2.AddArg(x) 4599 v2.AddArg(y) 4600 v.AddArg(v2) 4601 return true 4602 } 4603 } 4604 func rewriteValueS390X_OpNeq8(v *Value, config *Config) bool { 4605 b := v.Block 4606 _ = b 4607 // match: (Neq8 x y) 4608 // cond: 4609 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4610 for { 4611 x := v.Args[0] 4612 y := v.Args[1] 4613 v.reset(OpS390XMOVDNE) 4614 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4615 v0.AuxInt = 0 4616 v.AddArg(v0) 4617 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4618 v1.AuxInt = 1 4619 v.AddArg(v1) 4620 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4621 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4622 v3.AddArg(x) 4623 v2.AddArg(v3) 4624 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4625 v4.AddArg(y) 4626 v2.AddArg(v4) 4627 v.AddArg(v2) 4628 return true 4629 } 4630 } 4631 func rewriteValueS390X_OpNeqB(v *Value, config *Config) bool { 4632 b := v.Block 4633 _ = b 4634 // match: (NeqB x y) 4635 // cond: 4636 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4637 for { 4638 x := v.Args[0] 4639 y := v.Args[1] 4640 v.reset(OpS390XMOVDNE) 4641 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4642 v0.AuxInt = 0 4643 v.AddArg(v0) 4644 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4645 v1.AuxInt = 1 4646 v.AddArg(v1) 4647 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4648 v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4649 v3.AddArg(x) 4650 v2.AddArg(v3) 4651 v4 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 4652 v4.AddArg(y) 4653 v2.AddArg(v4) 4654 v.AddArg(v2) 4655 return true 4656 } 4657 } 4658 func rewriteValueS390X_OpNeqPtr(v *Value, config *Config) bool { 4659 b := v.Block 4660 _ = b 4661 // match: (NeqPtr x y) 4662 // cond: 4663 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4664 for { 4665 x := v.Args[0] 4666 y := v.Args[1] 4667 v.reset(OpS390XMOVDNE) 4668 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4669 v0.AuxInt = 0 4670 v.AddArg(v0) 4671 v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4672 v1.AuxInt = 1 4673 v.AddArg(v1) 4674 v2 := b.NewValue0(v.Pos, OpS390XCMP, TypeFlags) 4675 v2.AddArg(x) 4676 v2.AddArg(y) 4677 v.AddArg(v2) 4678 return true 4679 } 4680 } 4681 func rewriteValueS390X_OpNilCheck(v *Value, config *Config) bool { 4682 b := v.Block 4683 _ = b 4684 // match: (NilCheck ptr mem) 4685 // cond: 4686 // result: (LoweredNilCheck ptr mem) 4687 for { 4688 ptr := v.Args[0] 4689 mem := v.Args[1] 4690 v.reset(OpS390XLoweredNilCheck) 4691 v.AddArg(ptr) 4692 v.AddArg(mem) 4693 return true 4694 } 4695 } 4696 func rewriteValueS390X_OpNot(v *Value, config *Config) bool { 4697 b := v.Block 4698 _ = b 4699 // match: (Not x) 4700 // cond: 4701 // result: (XORWconst [1] x) 4702 for { 4703 x := v.Args[0] 4704 v.reset(OpS390XXORWconst) 4705 v.AuxInt = 1 4706 v.AddArg(x) 4707 return true 4708 } 4709 } 4710 func rewriteValueS390X_OpOffPtr(v *Value, config *Config) bool { 4711 b := v.Block 4712 _ = b 4713 // match: (OffPtr [off] ptr:(SP)) 4714 // cond: 4715 // result: (MOVDaddr [off] ptr) 4716 for { 4717 off := v.AuxInt 4718 ptr := v.Args[0] 4719 if ptr.Op != OpSP { 4720 break 4721 } 4722 v.reset(OpS390XMOVDaddr) 4723 v.AuxInt = off 4724 v.AddArg(ptr) 4725 return true 4726 } 4727 // match: (OffPtr [off] ptr) 4728 // cond: is32Bit(off) 4729 // result: (ADDconst [off] ptr) 4730 for { 4731 off := v.AuxInt 4732 ptr := v.Args[0] 4733 if !(is32Bit(off)) { 4734 break 4735 } 4736 v.reset(OpS390XADDconst) 4737 v.AuxInt = off 4738 v.AddArg(ptr) 4739 return true 4740 } 4741 // match: (OffPtr [off] ptr) 4742 // cond: 4743 // result: (ADD (MOVDconst [off]) ptr) 4744 for { 4745 off := v.AuxInt 4746 ptr := v.Args[0] 4747 v.reset(OpS390XADD) 4748 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 4749 v0.AuxInt = off 4750 v.AddArg(v0) 4751 v.AddArg(ptr) 4752 return true 4753 } 4754 } 4755 func rewriteValueS390X_OpOr16(v *Value, config *Config) bool { 4756 b := v.Block 4757 _ = b 4758 // match: (Or16 x y) 4759 // cond: 4760 // result: (ORW x y) 4761 for { 4762 x := v.Args[0] 4763 y := v.Args[1] 4764 v.reset(OpS390XORW) 4765 v.AddArg(x) 4766 v.AddArg(y) 4767 return true 4768 } 4769 } 4770 func rewriteValueS390X_OpOr32(v *Value, config *Config) bool { 4771 b := v.Block 4772 _ = b 4773 // match: (Or32 x y) 4774 // cond: 4775 // result: (ORW x y) 4776 for { 4777 x := v.Args[0] 4778 y := v.Args[1] 4779 v.reset(OpS390XORW) 4780 v.AddArg(x) 4781 v.AddArg(y) 4782 return true 4783 } 4784 } 4785 func rewriteValueS390X_OpOr64(v *Value, config *Config) bool { 4786 b := v.Block 4787 _ = b 4788 // match: (Or64 x y) 4789 // cond: 4790 // result: (OR x y) 4791 for { 4792 x := v.Args[0] 4793 y := v.Args[1] 4794 v.reset(OpS390XOR) 4795 v.AddArg(x) 4796 v.AddArg(y) 4797 return true 4798 } 4799 } 4800 func rewriteValueS390X_OpOr8(v *Value, config *Config) bool { 4801 b := v.Block 4802 _ = b 4803 // match: (Or8 x y) 4804 // cond: 4805 // result: (ORW x y) 4806 for { 4807 x := v.Args[0] 4808 y := v.Args[1] 4809 v.reset(OpS390XORW) 4810 v.AddArg(x) 4811 v.AddArg(y) 4812 return true 4813 } 4814 } 4815 func rewriteValueS390X_OpOrB(v *Value, config *Config) bool { 4816 b := v.Block 4817 _ = b 4818 // match: (OrB x y) 4819 // cond: 4820 // result: (ORW x y) 4821 for { 4822 x := v.Args[0] 4823 y := v.Args[1] 4824 v.reset(OpS390XORW) 4825 v.AddArg(x) 4826 v.AddArg(y) 4827 return true 4828 } 4829 } 4830 func rewriteValueS390X_OpRsh16Ux16(v *Value, config *Config) bool { 4831 b := v.Block 4832 _ = b 4833 // match: (Rsh16Ux16 <t> x y) 4834 // cond: 4835 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [15]))) 4836 for { 4837 t := v.Type 4838 x := v.Args[0] 4839 y := v.Args[1] 4840 v.reset(OpS390XANDW) 4841 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 4842 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4843 v1.AddArg(x) 4844 v0.AddArg(v1) 4845 v0.AddArg(y) 4846 v.AddArg(v0) 4847 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 4848 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4849 v3.AuxInt = 15 4850 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4851 v4.AddArg(y) 4852 v3.AddArg(v4) 4853 v2.AddArg(v3) 4854 v.AddArg(v2) 4855 return true 4856 } 4857 } 4858 func rewriteValueS390X_OpRsh16Ux32(v *Value, config *Config) bool { 4859 b := v.Block 4860 _ = b 4861 // match: (Rsh16Ux32 <t> x y) 4862 // cond: 4863 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [15]))) 4864 for { 4865 t := v.Type 4866 x := v.Args[0] 4867 y := v.Args[1] 4868 v.reset(OpS390XANDW) 4869 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 4870 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4871 v1.AddArg(x) 4872 v0.AddArg(v1) 4873 v0.AddArg(y) 4874 v.AddArg(v0) 4875 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 4876 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4877 v3.AuxInt = 15 4878 v3.AddArg(y) 4879 v2.AddArg(v3) 4880 v.AddArg(v2) 4881 return true 4882 } 4883 } 4884 func rewriteValueS390X_OpRsh16Ux64(v *Value, config *Config) bool { 4885 b := v.Block 4886 _ = b 4887 // match: (Rsh16Ux64 <t> x y) 4888 // cond: 4889 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [15]))) 4890 for { 4891 t := v.Type 4892 x := v.Args[0] 4893 y := v.Args[1] 4894 v.reset(OpS390XANDW) 4895 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 4896 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4897 v1.AddArg(x) 4898 v0.AddArg(v1) 4899 v0.AddArg(y) 4900 v.AddArg(v0) 4901 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 4902 v3 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 4903 v3.AuxInt = 15 4904 v3.AddArg(y) 4905 v2.AddArg(v3) 4906 v.AddArg(v2) 4907 return true 4908 } 4909 } 4910 func rewriteValueS390X_OpRsh16Ux8(v *Value, config *Config) bool { 4911 b := v.Block 4912 _ = b 4913 // match: (Rsh16Ux8 <t> x y) 4914 // cond: 4915 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [15]))) 4916 for { 4917 t := v.Type 4918 x := v.Args[0] 4919 y := v.Args[1] 4920 v.reset(OpS390XANDW) 4921 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 4922 v1 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4923 v1.AddArg(x) 4924 v0.AddArg(v1) 4925 v0.AddArg(y) 4926 v.AddArg(v0) 4927 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 4928 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4929 v3.AuxInt = 15 4930 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 4931 v4.AddArg(y) 4932 v3.AddArg(v4) 4933 v2.AddArg(v3) 4934 v.AddArg(v2) 4935 return true 4936 } 4937 } 4938 func rewriteValueS390X_OpRsh16x16(v *Value, config *Config) bool { 4939 b := v.Block 4940 _ = b 4941 // match: (Rsh16x16 <t> x y) 4942 // cond: 4943 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [15]))))) 4944 for { 4945 t := v.Type 4946 x := v.Args[0] 4947 y := v.Args[1] 4948 v.reset(OpS390XSRAW) 4949 v.Type = t 4950 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4951 v0.AddArg(x) 4952 v.AddArg(v0) 4953 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 4954 v1.AddArg(y) 4955 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 4956 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 4957 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4958 v4.AuxInt = 15 4959 v5 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4960 v5.AddArg(y) 4961 v4.AddArg(v5) 4962 v3.AddArg(v4) 4963 v2.AddArg(v3) 4964 v1.AddArg(v2) 4965 v.AddArg(v1) 4966 return true 4967 } 4968 } 4969 func rewriteValueS390X_OpRsh16x32(v *Value, config *Config) bool { 4970 b := v.Block 4971 _ = b 4972 // match: (Rsh16x32 <t> x y) 4973 // cond: 4974 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [15]))))) 4975 for { 4976 t := v.Type 4977 x := v.Args[0] 4978 y := v.Args[1] 4979 v.reset(OpS390XSRAW) 4980 v.Type = t 4981 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 4982 v0.AddArg(x) 4983 v.AddArg(v0) 4984 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 4985 v1.AddArg(y) 4986 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 4987 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 4988 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 4989 v4.AuxInt = 15 4990 v4.AddArg(y) 4991 v3.AddArg(v4) 4992 v2.AddArg(v3) 4993 v1.AddArg(v2) 4994 v.AddArg(v1) 4995 return true 4996 } 4997 } 4998 func rewriteValueS390X_OpRsh16x64(v *Value, config *Config) bool { 4999 b := v.Block 5000 _ = b 5001 // match: (Rsh16x64 <t> x y) 5002 // cond: 5003 // result: (SRAW <t> (MOVHreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [15]))))) 5004 for { 5005 t := v.Type 5006 x := v.Args[0] 5007 y := v.Args[1] 5008 v.reset(OpS390XSRAW) 5009 v.Type = t 5010 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 5011 v0.AddArg(x) 5012 v.AddArg(v0) 5013 v1 := b.NewValue0(v.Pos, OpS390XOR, y.Type) 5014 v1.AddArg(y) 5015 v2 := b.NewValue0(v.Pos, OpS390XNOT, y.Type) 5016 v3 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, y.Type) 5017 v4 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5018 v4.AuxInt = 15 5019 v4.AddArg(y) 5020 v3.AddArg(v4) 5021 v2.AddArg(v3) 5022 v1.AddArg(v2) 5023 v.AddArg(v1) 5024 return true 5025 } 5026 } 5027 func rewriteValueS390X_OpRsh16x8(v *Value, config *Config) bool { 5028 b := v.Block 5029 _ = b 5030 // match: (Rsh16x8 <t> x y) 5031 // cond: 5032 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [15]))))) 5033 for { 5034 t := v.Type 5035 x := v.Args[0] 5036 y := v.Args[1] 5037 v.reset(OpS390XSRAW) 5038 v.Type = t 5039 v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, config.fe.TypeInt64()) 5040 v0.AddArg(x) 5041 v.AddArg(v0) 5042 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5043 v1.AddArg(y) 5044 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5045 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5046 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5047 v4.AuxInt = 15 5048 v5 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5049 v5.AddArg(y) 5050 v4.AddArg(v5) 5051 v3.AddArg(v4) 5052 v2.AddArg(v3) 5053 v1.AddArg(v2) 5054 v.AddArg(v1) 5055 return true 5056 } 5057 } 5058 func rewriteValueS390X_OpRsh32Ux16(v *Value, config *Config) bool { 5059 b := v.Block 5060 _ = b 5061 // match: (Rsh32Ux16 <t> x y) 5062 // cond: 5063 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 5064 for { 5065 t := v.Type 5066 x := v.Args[0] 5067 y := v.Args[1] 5068 v.reset(OpS390XANDW) 5069 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5070 v0.AddArg(x) 5071 v0.AddArg(y) 5072 v.AddArg(v0) 5073 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5074 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5075 v2.AuxInt = 31 5076 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5077 v3.AddArg(y) 5078 v2.AddArg(v3) 5079 v1.AddArg(v2) 5080 v.AddArg(v1) 5081 return true 5082 } 5083 } 5084 func rewriteValueS390X_OpRsh32Ux32(v *Value, config *Config) bool { 5085 b := v.Block 5086 _ = b 5087 // match: (Rsh32Ux32 <t> x y) 5088 // cond: 5089 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 5090 for { 5091 t := v.Type 5092 x := v.Args[0] 5093 y := v.Args[1] 5094 v.reset(OpS390XANDW) 5095 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5096 v0.AddArg(x) 5097 v0.AddArg(y) 5098 v.AddArg(v0) 5099 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5100 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5101 v2.AuxInt = 31 5102 v2.AddArg(y) 5103 v1.AddArg(v2) 5104 v.AddArg(v1) 5105 return true 5106 } 5107 } 5108 func rewriteValueS390X_OpRsh32Ux64(v *Value, config *Config) bool { 5109 b := v.Block 5110 _ = b 5111 // match: (Rsh32Ux64 <t> x y) 5112 // cond: 5113 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 5114 for { 5115 t := v.Type 5116 x := v.Args[0] 5117 y := v.Args[1] 5118 v.reset(OpS390XANDW) 5119 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5120 v0.AddArg(x) 5121 v0.AddArg(y) 5122 v.AddArg(v0) 5123 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5124 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5125 v2.AuxInt = 31 5126 v2.AddArg(y) 5127 v1.AddArg(v2) 5128 v.AddArg(v1) 5129 return true 5130 } 5131 } 5132 func rewriteValueS390X_OpRsh32Ux8(v *Value, config *Config) bool { 5133 b := v.Block 5134 _ = b 5135 // match: (Rsh32Ux8 <t> x y) 5136 // cond: 5137 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 5138 for { 5139 t := v.Type 5140 x := v.Args[0] 5141 y := v.Args[1] 5142 v.reset(OpS390XANDW) 5143 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5144 v0.AddArg(x) 5145 v0.AddArg(y) 5146 v.AddArg(v0) 5147 v1 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5148 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5149 v2.AuxInt = 31 5150 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5151 v3.AddArg(y) 5152 v2.AddArg(v3) 5153 v1.AddArg(v2) 5154 v.AddArg(v1) 5155 return true 5156 } 5157 } 5158 func rewriteValueS390X_OpRsh32x16(v *Value, config *Config) bool { 5159 b := v.Block 5160 _ = b 5161 // match: (Rsh32x16 <t> x y) 5162 // cond: 5163 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [31]))))) 5164 for { 5165 t := v.Type 5166 x := v.Args[0] 5167 y := v.Args[1] 5168 v.reset(OpS390XSRAW) 5169 v.Type = t 5170 v.AddArg(x) 5171 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5172 v0.AddArg(y) 5173 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5174 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5175 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5176 v3.AuxInt = 31 5177 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5178 v4.AddArg(y) 5179 v3.AddArg(v4) 5180 v2.AddArg(v3) 5181 v1.AddArg(v2) 5182 v0.AddArg(v1) 5183 v.AddArg(v0) 5184 return true 5185 } 5186 } 5187 func rewriteValueS390X_OpRsh32x32(v *Value, config *Config) bool { 5188 b := v.Block 5189 _ = b 5190 // match: (Rsh32x32 <t> x y) 5191 // cond: 5192 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [31]))))) 5193 for { 5194 t := v.Type 5195 x := v.Args[0] 5196 y := v.Args[1] 5197 v.reset(OpS390XSRAW) 5198 v.Type = t 5199 v.AddArg(x) 5200 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5201 v0.AddArg(y) 5202 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5203 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5204 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5205 v3.AuxInt = 31 5206 v3.AddArg(y) 5207 v2.AddArg(v3) 5208 v1.AddArg(v2) 5209 v0.AddArg(v1) 5210 v.AddArg(v0) 5211 return true 5212 } 5213 } 5214 func rewriteValueS390X_OpRsh32x64(v *Value, config *Config) bool { 5215 b := v.Block 5216 _ = b 5217 // match: (Rsh32x64 <t> x y) 5218 // cond: 5219 // result: (SRAW <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [31]))))) 5220 for { 5221 t := v.Type 5222 x := v.Args[0] 5223 y := v.Args[1] 5224 v.reset(OpS390XSRAW) 5225 v.Type = t 5226 v.AddArg(x) 5227 v0 := b.NewValue0(v.Pos, OpS390XOR, y.Type) 5228 v0.AddArg(y) 5229 v1 := b.NewValue0(v.Pos, OpS390XNOT, y.Type) 5230 v2 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, y.Type) 5231 v3 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5232 v3.AuxInt = 31 5233 v3.AddArg(y) 5234 v2.AddArg(v3) 5235 v1.AddArg(v2) 5236 v0.AddArg(v1) 5237 v.AddArg(v0) 5238 return true 5239 } 5240 } 5241 func rewriteValueS390X_OpRsh32x8(v *Value, config *Config) bool { 5242 b := v.Block 5243 _ = b 5244 // match: (Rsh32x8 <t> x y) 5245 // cond: 5246 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [31]))))) 5247 for { 5248 t := v.Type 5249 x := v.Args[0] 5250 y := v.Args[1] 5251 v.reset(OpS390XSRAW) 5252 v.Type = t 5253 v.AddArg(x) 5254 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5255 v0.AddArg(y) 5256 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5257 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5258 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5259 v3.AuxInt = 31 5260 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5261 v4.AddArg(y) 5262 v3.AddArg(v4) 5263 v2.AddArg(v3) 5264 v1.AddArg(v2) 5265 v0.AddArg(v1) 5266 v.AddArg(v0) 5267 return true 5268 } 5269 } 5270 func rewriteValueS390X_OpRsh64Ux16(v *Value, config *Config) bool { 5271 b := v.Block 5272 _ = b 5273 // match: (Rsh64Ux16 <t> x y) 5274 // cond: 5275 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 5276 for { 5277 t := v.Type 5278 x := v.Args[0] 5279 y := v.Args[1] 5280 v.reset(OpS390XAND) 5281 v0 := b.NewValue0(v.Pos, OpS390XSRD, t) 5282 v0.AddArg(x) 5283 v0.AddArg(y) 5284 v.AddArg(v0) 5285 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 5286 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5287 v2.AuxInt = 63 5288 v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5289 v3.AddArg(y) 5290 v2.AddArg(v3) 5291 v1.AddArg(v2) 5292 v.AddArg(v1) 5293 return true 5294 } 5295 } 5296 func rewriteValueS390X_OpRsh64Ux32(v *Value, config *Config) bool { 5297 b := v.Block 5298 _ = b 5299 // match: (Rsh64Ux32 <t> x y) 5300 // cond: 5301 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 5302 for { 5303 t := v.Type 5304 x := v.Args[0] 5305 y := v.Args[1] 5306 v.reset(OpS390XAND) 5307 v0 := b.NewValue0(v.Pos, OpS390XSRD, t) 5308 v0.AddArg(x) 5309 v0.AddArg(y) 5310 v.AddArg(v0) 5311 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 5312 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5313 v2.AuxInt = 63 5314 v2.AddArg(y) 5315 v1.AddArg(v2) 5316 v.AddArg(v1) 5317 return true 5318 } 5319 } 5320 func rewriteValueS390X_OpRsh64Ux64(v *Value, config *Config) bool { 5321 b := v.Block 5322 _ = b 5323 // match: (Rsh64Ux64 <t> x y) 5324 // cond: 5325 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 5326 for { 5327 t := v.Type 5328 x := v.Args[0] 5329 y := v.Args[1] 5330 v.reset(OpS390XAND) 5331 v0 := b.NewValue0(v.Pos, OpS390XSRD, t) 5332 v0.AddArg(x) 5333 v0.AddArg(y) 5334 v.AddArg(v0) 5335 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 5336 v2 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5337 v2.AuxInt = 63 5338 v2.AddArg(y) 5339 v1.AddArg(v2) 5340 v.AddArg(v1) 5341 return true 5342 } 5343 } 5344 func rewriteValueS390X_OpRsh64Ux8(v *Value, config *Config) bool { 5345 b := v.Block 5346 _ = b 5347 // match: (Rsh64Ux8 <t> x y) 5348 // cond: 5349 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 5350 for { 5351 t := v.Type 5352 x := v.Args[0] 5353 y := v.Args[1] 5354 v.reset(OpS390XAND) 5355 v0 := b.NewValue0(v.Pos, OpS390XSRD, t) 5356 v0.AddArg(x) 5357 v0.AddArg(y) 5358 v.AddArg(v0) 5359 v1 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, t) 5360 v2 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5361 v2.AuxInt = 63 5362 v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5363 v3.AddArg(y) 5364 v2.AddArg(v3) 5365 v1.AddArg(v2) 5366 v.AddArg(v1) 5367 return true 5368 } 5369 } 5370 func rewriteValueS390X_OpRsh64x16(v *Value, config *Config) bool { 5371 b := v.Block 5372 _ = b 5373 // match: (Rsh64x16 <t> x y) 5374 // cond: 5375 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [63]))))) 5376 for { 5377 t := v.Type 5378 x := v.Args[0] 5379 y := v.Args[1] 5380 v.reset(OpS390XSRAD) 5381 v.Type = t 5382 v.AddArg(x) 5383 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5384 v0.AddArg(y) 5385 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5386 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5387 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5388 v3.AuxInt = 63 5389 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5390 v4.AddArg(y) 5391 v3.AddArg(v4) 5392 v2.AddArg(v3) 5393 v1.AddArg(v2) 5394 v0.AddArg(v1) 5395 v.AddArg(v0) 5396 return true 5397 } 5398 } 5399 func rewriteValueS390X_OpRsh64x32(v *Value, config *Config) bool { 5400 b := v.Block 5401 _ = b 5402 // match: (Rsh64x32 <t> x y) 5403 // cond: 5404 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [63]))))) 5405 for { 5406 t := v.Type 5407 x := v.Args[0] 5408 y := v.Args[1] 5409 v.reset(OpS390XSRAD) 5410 v.Type = t 5411 v.AddArg(x) 5412 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5413 v0.AddArg(y) 5414 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5415 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5416 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5417 v3.AuxInt = 63 5418 v3.AddArg(y) 5419 v2.AddArg(v3) 5420 v1.AddArg(v2) 5421 v0.AddArg(v1) 5422 v.AddArg(v0) 5423 return true 5424 } 5425 } 5426 func rewriteValueS390X_OpRsh64x64(v *Value, config *Config) bool { 5427 b := v.Block 5428 _ = b 5429 // match: (Rsh64x64 <t> x y) 5430 // cond: 5431 // result: (SRAD <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [63]))))) 5432 for { 5433 t := v.Type 5434 x := v.Args[0] 5435 y := v.Args[1] 5436 v.reset(OpS390XSRAD) 5437 v.Type = t 5438 v.AddArg(x) 5439 v0 := b.NewValue0(v.Pos, OpS390XOR, y.Type) 5440 v0.AddArg(y) 5441 v1 := b.NewValue0(v.Pos, OpS390XNOT, y.Type) 5442 v2 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, y.Type) 5443 v3 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5444 v3.AuxInt = 63 5445 v3.AddArg(y) 5446 v2.AddArg(v3) 5447 v1.AddArg(v2) 5448 v0.AddArg(v1) 5449 v.AddArg(v0) 5450 return true 5451 } 5452 } 5453 func rewriteValueS390X_OpRsh64x8(v *Value, config *Config) bool { 5454 b := v.Block 5455 _ = b 5456 // match: (Rsh64x8 <t> x y) 5457 // cond: 5458 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [63]))))) 5459 for { 5460 t := v.Type 5461 x := v.Args[0] 5462 y := v.Args[1] 5463 v.reset(OpS390XSRAD) 5464 v.Type = t 5465 v.AddArg(x) 5466 v0 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5467 v0.AddArg(y) 5468 v1 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5469 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5470 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5471 v3.AuxInt = 63 5472 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5473 v4.AddArg(y) 5474 v3.AddArg(v4) 5475 v2.AddArg(v3) 5476 v1.AddArg(v2) 5477 v0.AddArg(v1) 5478 v.AddArg(v0) 5479 return true 5480 } 5481 } 5482 func rewriteValueS390X_OpRsh8Ux16(v *Value, config *Config) bool { 5483 b := v.Block 5484 _ = b 5485 // match: (Rsh8Ux16 <t> x y) 5486 // cond: 5487 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [7]))) 5488 for { 5489 t := v.Type 5490 x := v.Args[0] 5491 y := v.Args[1] 5492 v.reset(OpS390XANDW) 5493 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5494 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5495 v1.AddArg(x) 5496 v0.AddArg(v1) 5497 v0.AddArg(y) 5498 v.AddArg(v0) 5499 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5500 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5501 v3.AuxInt = 7 5502 v4 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5503 v4.AddArg(y) 5504 v3.AddArg(v4) 5505 v2.AddArg(v3) 5506 v.AddArg(v2) 5507 return true 5508 } 5509 } 5510 func rewriteValueS390X_OpRsh8Ux32(v *Value, config *Config) bool { 5511 b := v.Block 5512 _ = b 5513 // match: (Rsh8Ux32 <t> x y) 5514 // cond: 5515 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [7]))) 5516 for { 5517 t := v.Type 5518 x := v.Args[0] 5519 y := v.Args[1] 5520 v.reset(OpS390XANDW) 5521 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5522 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5523 v1.AddArg(x) 5524 v0.AddArg(v1) 5525 v0.AddArg(y) 5526 v.AddArg(v0) 5527 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5528 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5529 v3.AuxInt = 7 5530 v3.AddArg(y) 5531 v2.AddArg(v3) 5532 v.AddArg(v2) 5533 return true 5534 } 5535 } 5536 func rewriteValueS390X_OpRsh8Ux64(v *Value, config *Config) bool { 5537 b := v.Block 5538 _ = b 5539 // match: (Rsh8Ux64 <t> x y) 5540 // cond: 5541 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [7]))) 5542 for { 5543 t := v.Type 5544 x := v.Args[0] 5545 y := v.Args[1] 5546 v.reset(OpS390XANDW) 5547 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5548 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5549 v1.AddArg(x) 5550 v0.AddArg(v1) 5551 v0.AddArg(y) 5552 v.AddArg(v0) 5553 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5554 v3 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5555 v3.AuxInt = 7 5556 v3.AddArg(y) 5557 v2.AddArg(v3) 5558 v.AddArg(v2) 5559 return true 5560 } 5561 } 5562 func rewriteValueS390X_OpRsh8Ux8(v *Value, config *Config) bool { 5563 b := v.Block 5564 _ = b 5565 // match: (Rsh8Ux8 <t> x y) 5566 // cond: 5567 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [7]))) 5568 for { 5569 t := v.Type 5570 x := v.Args[0] 5571 y := v.Args[1] 5572 v.reset(OpS390XANDW) 5573 v0 := b.NewValue0(v.Pos, OpS390XSRW, t) 5574 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5575 v1.AddArg(x) 5576 v0.AddArg(v1) 5577 v0.AddArg(y) 5578 v.AddArg(v0) 5579 v2 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, t) 5580 v3 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5581 v3.AuxInt = 7 5582 v4 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5583 v4.AddArg(y) 5584 v3.AddArg(v4) 5585 v2.AddArg(v3) 5586 v.AddArg(v2) 5587 return true 5588 } 5589 } 5590 func rewriteValueS390X_OpRsh8x16(v *Value, config *Config) bool { 5591 b := v.Block 5592 _ = b 5593 // match: (Rsh8x16 <t> x y) 5594 // cond: 5595 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [7]))))) 5596 for { 5597 t := v.Type 5598 x := v.Args[0] 5599 y := v.Args[1] 5600 v.reset(OpS390XSRAW) 5601 v.Type = t 5602 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 5603 v0.AddArg(x) 5604 v.AddArg(v0) 5605 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5606 v1.AddArg(y) 5607 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5608 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5609 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5610 v4.AuxInt = 7 5611 v5 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5612 v5.AddArg(y) 5613 v4.AddArg(v5) 5614 v3.AddArg(v4) 5615 v2.AddArg(v3) 5616 v1.AddArg(v2) 5617 v.AddArg(v1) 5618 return true 5619 } 5620 } 5621 func rewriteValueS390X_OpRsh8x32(v *Value, config *Config) bool { 5622 b := v.Block 5623 _ = b 5624 // match: (Rsh8x32 <t> x y) 5625 // cond: 5626 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [7]))))) 5627 for { 5628 t := v.Type 5629 x := v.Args[0] 5630 y := v.Args[1] 5631 v.reset(OpS390XSRAW) 5632 v.Type = t 5633 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 5634 v0.AddArg(x) 5635 v.AddArg(v0) 5636 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5637 v1.AddArg(y) 5638 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5639 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5640 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5641 v4.AuxInt = 7 5642 v4.AddArg(y) 5643 v3.AddArg(v4) 5644 v2.AddArg(v3) 5645 v1.AddArg(v2) 5646 v.AddArg(v1) 5647 return true 5648 } 5649 } 5650 func rewriteValueS390X_OpRsh8x64(v *Value, config *Config) bool { 5651 b := v.Block 5652 _ = b 5653 // match: (Rsh8x64 <t> x y) 5654 // cond: 5655 // result: (SRAW <t> (MOVBreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [7]))))) 5656 for { 5657 t := v.Type 5658 x := v.Args[0] 5659 y := v.Args[1] 5660 v.reset(OpS390XSRAW) 5661 v.Type = t 5662 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 5663 v0.AddArg(x) 5664 v.AddArg(v0) 5665 v1 := b.NewValue0(v.Pos, OpS390XOR, y.Type) 5666 v1.AddArg(y) 5667 v2 := b.NewValue0(v.Pos, OpS390XNOT, y.Type) 5668 v3 := b.NewValue0(v.Pos, OpS390XSUBEcarrymask, y.Type) 5669 v4 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 5670 v4.AuxInt = 7 5671 v4.AddArg(y) 5672 v3.AddArg(v4) 5673 v2.AddArg(v3) 5674 v1.AddArg(v2) 5675 v.AddArg(v1) 5676 return true 5677 } 5678 } 5679 func rewriteValueS390X_OpRsh8x8(v *Value, config *Config) bool { 5680 b := v.Block 5681 _ = b 5682 // match: (Rsh8x8 <t> x y) 5683 // cond: 5684 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [7]))))) 5685 for { 5686 t := v.Type 5687 x := v.Args[0] 5688 y := v.Args[1] 5689 v.reset(OpS390XSRAW) 5690 v.Type = t 5691 v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, config.fe.TypeInt64()) 5692 v0.AddArg(x) 5693 v.AddArg(v0) 5694 v1 := b.NewValue0(v.Pos, OpS390XORW, y.Type) 5695 v1.AddArg(y) 5696 v2 := b.NewValue0(v.Pos, OpS390XNOTW, y.Type) 5697 v3 := b.NewValue0(v.Pos, OpS390XSUBEWcarrymask, y.Type) 5698 v4 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 5699 v4.AuxInt = 7 5700 v5 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5701 v5.AddArg(y) 5702 v4.AddArg(v5) 5703 v3.AddArg(v4) 5704 v2.AddArg(v3) 5705 v1.AddArg(v2) 5706 v.AddArg(v1) 5707 return true 5708 } 5709 } 5710 func rewriteValueS390X_OpS390XADD(v *Value, config *Config) bool { 5711 b := v.Block 5712 _ = b 5713 // match: (ADD x (MOVDconst [c])) 5714 // cond: is32Bit(c) 5715 // result: (ADDconst [c] x) 5716 for { 5717 x := v.Args[0] 5718 v_1 := v.Args[1] 5719 if v_1.Op != OpS390XMOVDconst { 5720 break 5721 } 5722 c := v_1.AuxInt 5723 if !(is32Bit(c)) { 5724 break 5725 } 5726 v.reset(OpS390XADDconst) 5727 v.AuxInt = c 5728 v.AddArg(x) 5729 return true 5730 } 5731 // match: (ADD (MOVDconst [c]) x) 5732 // cond: is32Bit(c) 5733 // result: (ADDconst [c] x) 5734 for { 5735 v_0 := v.Args[0] 5736 if v_0.Op != OpS390XMOVDconst { 5737 break 5738 } 5739 c := v_0.AuxInt 5740 x := v.Args[1] 5741 if !(is32Bit(c)) { 5742 break 5743 } 5744 v.reset(OpS390XADDconst) 5745 v.AuxInt = c 5746 v.AddArg(x) 5747 return true 5748 } 5749 // match: (ADD (SLDconst x [c]) (SRDconst x [64-c])) 5750 // cond: 5751 // result: (RLLGconst [ c] x) 5752 for { 5753 v_0 := v.Args[0] 5754 if v_0.Op != OpS390XSLDconst { 5755 break 5756 } 5757 c := v_0.AuxInt 5758 x := v_0.Args[0] 5759 v_1 := v.Args[1] 5760 if v_1.Op != OpS390XSRDconst { 5761 break 5762 } 5763 if v_1.AuxInt != 64-c { 5764 break 5765 } 5766 if x != v_1.Args[0] { 5767 break 5768 } 5769 v.reset(OpS390XRLLGconst) 5770 v.AuxInt = c 5771 v.AddArg(x) 5772 return true 5773 } 5774 // match: (ADD (SRDconst x [c]) (SLDconst x [64-c])) 5775 // cond: 5776 // result: (RLLGconst [64-c] x) 5777 for { 5778 v_0 := v.Args[0] 5779 if v_0.Op != OpS390XSRDconst { 5780 break 5781 } 5782 c := v_0.AuxInt 5783 x := v_0.Args[0] 5784 v_1 := v.Args[1] 5785 if v_1.Op != OpS390XSLDconst { 5786 break 5787 } 5788 if v_1.AuxInt != 64-c { 5789 break 5790 } 5791 if x != v_1.Args[0] { 5792 break 5793 } 5794 v.reset(OpS390XRLLGconst) 5795 v.AuxInt = 64 - c 5796 v.AddArg(x) 5797 return true 5798 } 5799 // match: (ADD x (MOVDaddr [c] {s} y)) 5800 // cond: x.Op != OpSB && y.Op != OpSB 5801 // result: (MOVDaddridx [c] {s} x y) 5802 for { 5803 x := v.Args[0] 5804 v_1 := v.Args[1] 5805 if v_1.Op != OpS390XMOVDaddr { 5806 break 5807 } 5808 c := v_1.AuxInt 5809 s := v_1.Aux 5810 y := v_1.Args[0] 5811 if !(x.Op != OpSB && y.Op != OpSB) { 5812 break 5813 } 5814 v.reset(OpS390XMOVDaddridx) 5815 v.AuxInt = c 5816 v.Aux = s 5817 v.AddArg(x) 5818 v.AddArg(y) 5819 return true 5820 } 5821 // match: (ADD (MOVDaddr [c] {s} x) y) 5822 // cond: x.Op != OpSB && y.Op != OpSB 5823 // result: (MOVDaddridx [c] {s} x y) 5824 for { 5825 v_0 := v.Args[0] 5826 if v_0.Op != OpS390XMOVDaddr { 5827 break 5828 } 5829 c := v_0.AuxInt 5830 s := v_0.Aux 5831 x := v_0.Args[0] 5832 y := v.Args[1] 5833 if !(x.Op != OpSB && y.Op != OpSB) { 5834 break 5835 } 5836 v.reset(OpS390XMOVDaddridx) 5837 v.AuxInt = c 5838 v.Aux = s 5839 v.AddArg(x) 5840 v.AddArg(y) 5841 return true 5842 } 5843 // match: (ADD x (NEG y)) 5844 // cond: 5845 // result: (SUB x y) 5846 for { 5847 x := v.Args[0] 5848 v_1 := v.Args[1] 5849 if v_1.Op != OpS390XNEG { 5850 break 5851 } 5852 y := v_1.Args[0] 5853 v.reset(OpS390XSUB) 5854 v.AddArg(x) 5855 v.AddArg(y) 5856 return true 5857 } 5858 // match: (ADD <t> x g:(MOVDload [off] {sym} ptr mem)) 5859 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5860 // result: (ADDload <t> [off] {sym} x ptr mem) 5861 for { 5862 t := v.Type 5863 x := v.Args[0] 5864 g := v.Args[1] 5865 if g.Op != OpS390XMOVDload { 5866 break 5867 } 5868 off := g.AuxInt 5869 sym := g.Aux 5870 ptr := g.Args[0] 5871 mem := g.Args[1] 5872 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5873 break 5874 } 5875 v.reset(OpS390XADDload) 5876 v.Type = t 5877 v.AuxInt = off 5878 v.Aux = sym 5879 v.AddArg(x) 5880 v.AddArg(ptr) 5881 v.AddArg(mem) 5882 return true 5883 } 5884 // match: (ADD <t> g:(MOVDload [off] {sym} ptr mem) x) 5885 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5886 // result: (ADDload <t> [off] {sym} x ptr mem) 5887 for { 5888 t := v.Type 5889 g := v.Args[0] 5890 if g.Op != OpS390XMOVDload { 5891 break 5892 } 5893 off := g.AuxInt 5894 sym := g.Aux 5895 ptr := g.Args[0] 5896 mem := g.Args[1] 5897 x := v.Args[1] 5898 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5899 break 5900 } 5901 v.reset(OpS390XADDload) 5902 v.Type = t 5903 v.AuxInt = off 5904 v.Aux = sym 5905 v.AddArg(x) 5906 v.AddArg(ptr) 5907 v.AddArg(mem) 5908 return true 5909 } 5910 return false 5911 } 5912 func rewriteValueS390X_OpS390XADDW(v *Value, config *Config) bool { 5913 b := v.Block 5914 _ = b 5915 // match: (ADDW x (MOVDconst [c])) 5916 // cond: 5917 // result: (ADDWconst [c] x) 5918 for { 5919 x := v.Args[0] 5920 v_1 := v.Args[1] 5921 if v_1.Op != OpS390XMOVDconst { 5922 break 5923 } 5924 c := v_1.AuxInt 5925 v.reset(OpS390XADDWconst) 5926 v.AuxInt = c 5927 v.AddArg(x) 5928 return true 5929 } 5930 // match: (ADDW (MOVDconst [c]) x) 5931 // cond: 5932 // result: (ADDWconst [c] x) 5933 for { 5934 v_0 := v.Args[0] 5935 if v_0.Op != OpS390XMOVDconst { 5936 break 5937 } 5938 c := v_0.AuxInt 5939 x := v.Args[1] 5940 v.reset(OpS390XADDWconst) 5941 v.AuxInt = c 5942 v.AddArg(x) 5943 return true 5944 } 5945 // match: (ADDW (SLWconst x [c]) (SRWconst x [32-c])) 5946 // cond: 5947 // result: (RLLconst [ c] x) 5948 for { 5949 v_0 := v.Args[0] 5950 if v_0.Op != OpS390XSLWconst { 5951 break 5952 } 5953 c := v_0.AuxInt 5954 x := v_0.Args[0] 5955 v_1 := v.Args[1] 5956 if v_1.Op != OpS390XSRWconst { 5957 break 5958 } 5959 if v_1.AuxInt != 32-c { 5960 break 5961 } 5962 if x != v_1.Args[0] { 5963 break 5964 } 5965 v.reset(OpS390XRLLconst) 5966 v.AuxInt = c 5967 v.AddArg(x) 5968 return true 5969 } 5970 // match: (ADDW (SRWconst x [c]) (SLWconst x [32-c])) 5971 // cond: 5972 // result: (RLLconst [32-c] x) 5973 for { 5974 v_0 := v.Args[0] 5975 if v_0.Op != OpS390XSRWconst { 5976 break 5977 } 5978 c := v_0.AuxInt 5979 x := v_0.Args[0] 5980 v_1 := v.Args[1] 5981 if v_1.Op != OpS390XSLWconst { 5982 break 5983 } 5984 if v_1.AuxInt != 32-c { 5985 break 5986 } 5987 if x != v_1.Args[0] { 5988 break 5989 } 5990 v.reset(OpS390XRLLconst) 5991 v.AuxInt = 32 - c 5992 v.AddArg(x) 5993 return true 5994 } 5995 // match: (ADDW x (NEGW y)) 5996 // cond: 5997 // result: (SUBW x y) 5998 for { 5999 x := v.Args[0] 6000 v_1 := v.Args[1] 6001 if v_1.Op != OpS390XNEGW { 6002 break 6003 } 6004 y := v_1.Args[0] 6005 v.reset(OpS390XSUBW) 6006 v.AddArg(x) 6007 v.AddArg(y) 6008 return true 6009 } 6010 // match: (ADDW <t> x g:(MOVWload [off] {sym} ptr mem)) 6011 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6012 // result: (ADDWload <t> [off] {sym} x ptr mem) 6013 for { 6014 t := v.Type 6015 x := v.Args[0] 6016 g := v.Args[1] 6017 if g.Op != OpS390XMOVWload { 6018 break 6019 } 6020 off := g.AuxInt 6021 sym := g.Aux 6022 ptr := g.Args[0] 6023 mem := g.Args[1] 6024 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6025 break 6026 } 6027 v.reset(OpS390XADDWload) 6028 v.Type = t 6029 v.AuxInt = off 6030 v.Aux = sym 6031 v.AddArg(x) 6032 v.AddArg(ptr) 6033 v.AddArg(mem) 6034 return true 6035 } 6036 // match: (ADDW <t> g:(MOVWload [off] {sym} ptr mem) x) 6037 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6038 // result: (ADDWload <t> [off] {sym} x ptr mem) 6039 for { 6040 t := v.Type 6041 g := v.Args[0] 6042 if g.Op != OpS390XMOVWload { 6043 break 6044 } 6045 off := g.AuxInt 6046 sym := g.Aux 6047 ptr := g.Args[0] 6048 mem := g.Args[1] 6049 x := v.Args[1] 6050 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6051 break 6052 } 6053 v.reset(OpS390XADDWload) 6054 v.Type = t 6055 v.AuxInt = off 6056 v.Aux = sym 6057 v.AddArg(x) 6058 v.AddArg(ptr) 6059 v.AddArg(mem) 6060 return true 6061 } 6062 // match: (ADDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6063 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6064 // result: (ADDWload <t> [off] {sym} x ptr mem) 6065 for { 6066 t := v.Type 6067 x := v.Args[0] 6068 g := v.Args[1] 6069 if g.Op != OpS390XMOVWZload { 6070 break 6071 } 6072 off := g.AuxInt 6073 sym := g.Aux 6074 ptr := g.Args[0] 6075 mem := g.Args[1] 6076 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6077 break 6078 } 6079 v.reset(OpS390XADDWload) 6080 v.Type = t 6081 v.AuxInt = off 6082 v.Aux = sym 6083 v.AddArg(x) 6084 v.AddArg(ptr) 6085 v.AddArg(mem) 6086 return true 6087 } 6088 // match: (ADDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6089 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6090 // result: (ADDWload <t> [off] {sym} x ptr mem) 6091 for { 6092 t := v.Type 6093 g := v.Args[0] 6094 if g.Op != OpS390XMOVWZload { 6095 break 6096 } 6097 off := g.AuxInt 6098 sym := g.Aux 6099 ptr := g.Args[0] 6100 mem := g.Args[1] 6101 x := v.Args[1] 6102 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6103 break 6104 } 6105 v.reset(OpS390XADDWload) 6106 v.Type = t 6107 v.AuxInt = off 6108 v.Aux = sym 6109 v.AddArg(x) 6110 v.AddArg(ptr) 6111 v.AddArg(mem) 6112 return true 6113 } 6114 return false 6115 } 6116 func rewriteValueS390X_OpS390XADDWconst(v *Value, config *Config) bool { 6117 b := v.Block 6118 _ = b 6119 // match: (ADDWconst [c] x) 6120 // cond: int32(c)==0 6121 // result: x 6122 for { 6123 c := v.AuxInt 6124 x := v.Args[0] 6125 if !(int32(c) == 0) { 6126 break 6127 } 6128 v.reset(OpCopy) 6129 v.Type = x.Type 6130 v.AddArg(x) 6131 return true 6132 } 6133 // match: (ADDWconst [c] (MOVDconst [d])) 6134 // cond: 6135 // result: (MOVDconst [int64(int32(c+d))]) 6136 for { 6137 c := v.AuxInt 6138 v_0 := v.Args[0] 6139 if v_0.Op != OpS390XMOVDconst { 6140 break 6141 } 6142 d := v_0.AuxInt 6143 v.reset(OpS390XMOVDconst) 6144 v.AuxInt = int64(int32(c + d)) 6145 return true 6146 } 6147 // match: (ADDWconst [c] (ADDWconst [d] x)) 6148 // cond: 6149 // result: (ADDWconst [int64(int32(c+d))] x) 6150 for { 6151 c := v.AuxInt 6152 v_0 := v.Args[0] 6153 if v_0.Op != OpS390XADDWconst { 6154 break 6155 } 6156 d := v_0.AuxInt 6157 x := v_0.Args[0] 6158 v.reset(OpS390XADDWconst) 6159 v.AuxInt = int64(int32(c + d)) 6160 v.AddArg(x) 6161 return true 6162 } 6163 return false 6164 } 6165 func rewriteValueS390X_OpS390XADDconst(v *Value, config *Config) bool { 6166 b := v.Block 6167 _ = b 6168 // match: (ADDconst [c] (MOVDaddr [d] {s} x:(SB))) 6169 // cond: ((c+d)&1 == 0) && is32Bit(c+d) 6170 // result: (MOVDaddr [c+d] {s} x) 6171 for { 6172 c := v.AuxInt 6173 v_0 := v.Args[0] 6174 if v_0.Op != OpS390XMOVDaddr { 6175 break 6176 } 6177 d := v_0.AuxInt 6178 s := v_0.Aux 6179 x := v_0.Args[0] 6180 if x.Op != OpSB { 6181 break 6182 } 6183 if !(((c+d)&1 == 0) && is32Bit(c+d)) { 6184 break 6185 } 6186 v.reset(OpS390XMOVDaddr) 6187 v.AuxInt = c + d 6188 v.Aux = s 6189 v.AddArg(x) 6190 return true 6191 } 6192 // match: (ADDconst [c] (MOVDaddr [d] {s} x)) 6193 // cond: x.Op != OpSB && is20Bit(c+d) 6194 // result: (MOVDaddr [c+d] {s} x) 6195 for { 6196 c := v.AuxInt 6197 v_0 := v.Args[0] 6198 if v_0.Op != OpS390XMOVDaddr { 6199 break 6200 } 6201 d := v_0.AuxInt 6202 s := v_0.Aux 6203 x := v_0.Args[0] 6204 if !(x.Op != OpSB && is20Bit(c+d)) { 6205 break 6206 } 6207 v.reset(OpS390XMOVDaddr) 6208 v.AuxInt = c + d 6209 v.Aux = s 6210 v.AddArg(x) 6211 return true 6212 } 6213 // match: (ADDconst [c] (MOVDaddridx [d] {s} x y)) 6214 // cond: is20Bit(c+d) 6215 // result: (MOVDaddridx [c+d] {s} x y) 6216 for { 6217 c := v.AuxInt 6218 v_0 := v.Args[0] 6219 if v_0.Op != OpS390XMOVDaddridx { 6220 break 6221 } 6222 d := v_0.AuxInt 6223 s := v_0.Aux 6224 x := v_0.Args[0] 6225 y := v_0.Args[1] 6226 if !(is20Bit(c + d)) { 6227 break 6228 } 6229 v.reset(OpS390XMOVDaddridx) 6230 v.AuxInt = c + d 6231 v.Aux = s 6232 v.AddArg(x) 6233 v.AddArg(y) 6234 return true 6235 } 6236 // match: (ADDconst [0] x) 6237 // cond: 6238 // result: x 6239 for { 6240 if v.AuxInt != 0 { 6241 break 6242 } 6243 x := v.Args[0] 6244 v.reset(OpCopy) 6245 v.Type = x.Type 6246 v.AddArg(x) 6247 return true 6248 } 6249 // match: (ADDconst [c] (MOVDconst [d])) 6250 // cond: 6251 // result: (MOVDconst [c+d]) 6252 for { 6253 c := v.AuxInt 6254 v_0 := v.Args[0] 6255 if v_0.Op != OpS390XMOVDconst { 6256 break 6257 } 6258 d := v_0.AuxInt 6259 v.reset(OpS390XMOVDconst) 6260 v.AuxInt = c + d 6261 return true 6262 } 6263 // match: (ADDconst [c] (ADDconst [d] x)) 6264 // cond: is32Bit(c+d) 6265 // result: (ADDconst [c+d] x) 6266 for { 6267 c := v.AuxInt 6268 v_0 := v.Args[0] 6269 if v_0.Op != OpS390XADDconst { 6270 break 6271 } 6272 d := v_0.AuxInt 6273 x := v_0.Args[0] 6274 if !(is32Bit(c + d)) { 6275 break 6276 } 6277 v.reset(OpS390XADDconst) 6278 v.AuxInt = c + d 6279 v.AddArg(x) 6280 return true 6281 } 6282 return false 6283 } 6284 func rewriteValueS390X_OpS390XAND(v *Value, config *Config) bool { 6285 b := v.Block 6286 _ = b 6287 // match: (AND x (MOVDconst [c])) 6288 // cond: is32Bit(c) && c < 0 6289 // result: (ANDconst [c] x) 6290 for { 6291 x := v.Args[0] 6292 v_1 := v.Args[1] 6293 if v_1.Op != OpS390XMOVDconst { 6294 break 6295 } 6296 c := v_1.AuxInt 6297 if !(is32Bit(c) && c < 0) { 6298 break 6299 } 6300 v.reset(OpS390XANDconst) 6301 v.AuxInt = c 6302 v.AddArg(x) 6303 return true 6304 } 6305 // match: (AND (MOVDconst [c]) x) 6306 // cond: is32Bit(c) && c < 0 6307 // result: (ANDconst [c] x) 6308 for { 6309 v_0 := v.Args[0] 6310 if v_0.Op != OpS390XMOVDconst { 6311 break 6312 } 6313 c := v_0.AuxInt 6314 x := v.Args[1] 6315 if !(is32Bit(c) && c < 0) { 6316 break 6317 } 6318 v.reset(OpS390XANDconst) 6319 v.AuxInt = c 6320 v.AddArg(x) 6321 return true 6322 } 6323 // match: (AND (MOVDconst [0xFF]) x) 6324 // cond: 6325 // result: (MOVBZreg x) 6326 for { 6327 v_0 := v.Args[0] 6328 if v_0.Op != OpS390XMOVDconst { 6329 break 6330 } 6331 if v_0.AuxInt != 0xFF { 6332 break 6333 } 6334 x := v.Args[1] 6335 v.reset(OpS390XMOVBZreg) 6336 v.AddArg(x) 6337 return true 6338 } 6339 // match: (AND x (MOVDconst [0xFF])) 6340 // cond: 6341 // result: (MOVBZreg x) 6342 for { 6343 x := v.Args[0] 6344 v_1 := v.Args[1] 6345 if v_1.Op != OpS390XMOVDconst { 6346 break 6347 } 6348 if v_1.AuxInt != 0xFF { 6349 break 6350 } 6351 v.reset(OpS390XMOVBZreg) 6352 v.AddArg(x) 6353 return true 6354 } 6355 // match: (AND (MOVDconst [0xFFFF]) x) 6356 // cond: 6357 // result: (MOVHZreg x) 6358 for { 6359 v_0 := v.Args[0] 6360 if v_0.Op != OpS390XMOVDconst { 6361 break 6362 } 6363 if v_0.AuxInt != 0xFFFF { 6364 break 6365 } 6366 x := v.Args[1] 6367 v.reset(OpS390XMOVHZreg) 6368 v.AddArg(x) 6369 return true 6370 } 6371 // match: (AND x (MOVDconst [0xFFFF])) 6372 // cond: 6373 // result: (MOVHZreg x) 6374 for { 6375 x := v.Args[0] 6376 v_1 := v.Args[1] 6377 if v_1.Op != OpS390XMOVDconst { 6378 break 6379 } 6380 if v_1.AuxInt != 0xFFFF { 6381 break 6382 } 6383 v.reset(OpS390XMOVHZreg) 6384 v.AddArg(x) 6385 return true 6386 } 6387 // match: (AND (MOVDconst [0xFFFFFFFF]) x) 6388 // cond: 6389 // result: (MOVWZreg x) 6390 for { 6391 v_0 := v.Args[0] 6392 if v_0.Op != OpS390XMOVDconst { 6393 break 6394 } 6395 if v_0.AuxInt != 0xFFFFFFFF { 6396 break 6397 } 6398 x := v.Args[1] 6399 v.reset(OpS390XMOVWZreg) 6400 v.AddArg(x) 6401 return true 6402 } 6403 // match: (AND x (MOVDconst [0xFFFFFFFF])) 6404 // cond: 6405 // result: (MOVWZreg x) 6406 for { 6407 x := v.Args[0] 6408 v_1 := v.Args[1] 6409 if v_1.Op != OpS390XMOVDconst { 6410 break 6411 } 6412 if v_1.AuxInt != 0xFFFFFFFF { 6413 break 6414 } 6415 v.reset(OpS390XMOVWZreg) 6416 v.AddArg(x) 6417 return true 6418 } 6419 // match: (AND (MOVDconst [c]) (MOVDconst [d])) 6420 // cond: 6421 // result: (MOVDconst [c&d]) 6422 for { 6423 v_0 := v.Args[0] 6424 if v_0.Op != OpS390XMOVDconst { 6425 break 6426 } 6427 c := v_0.AuxInt 6428 v_1 := v.Args[1] 6429 if v_1.Op != OpS390XMOVDconst { 6430 break 6431 } 6432 d := v_1.AuxInt 6433 v.reset(OpS390XMOVDconst) 6434 v.AuxInt = c & d 6435 return true 6436 } 6437 // match: (AND x x) 6438 // cond: 6439 // result: x 6440 for { 6441 x := v.Args[0] 6442 if x != v.Args[1] { 6443 break 6444 } 6445 v.reset(OpCopy) 6446 v.Type = x.Type 6447 v.AddArg(x) 6448 return true 6449 } 6450 // match: (AND <t> x g:(MOVDload [off] {sym} ptr mem)) 6451 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6452 // result: (ANDload <t> [off] {sym} x ptr mem) 6453 for { 6454 t := v.Type 6455 x := v.Args[0] 6456 g := v.Args[1] 6457 if g.Op != OpS390XMOVDload { 6458 break 6459 } 6460 off := g.AuxInt 6461 sym := g.Aux 6462 ptr := g.Args[0] 6463 mem := g.Args[1] 6464 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6465 break 6466 } 6467 v.reset(OpS390XANDload) 6468 v.Type = t 6469 v.AuxInt = off 6470 v.Aux = sym 6471 v.AddArg(x) 6472 v.AddArg(ptr) 6473 v.AddArg(mem) 6474 return true 6475 } 6476 // match: (AND <t> g:(MOVDload [off] {sym} ptr mem) x) 6477 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6478 // result: (ANDload <t> [off] {sym} x ptr mem) 6479 for { 6480 t := v.Type 6481 g := v.Args[0] 6482 if g.Op != OpS390XMOVDload { 6483 break 6484 } 6485 off := g.AuxInt 6486 sym := g.Aux 6487 ptr := g.Args[0] 6488 mem := g.Args[1] 6489 x := v.Args[1] 6490 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6491 break 6492 } 6493 v.reset(OpS390XANDload) 6494 v.Type = t 6495 v.AuxInt = off 6496 v.Aux = sym 6497 v.AddArg(x) 6498 v.AddArg(ptr) 6499 v.AddArg(mem) 6500 return true 6501 } 6502 return false 6503 } 6504 func rewriteValueS390X_OpS390XANDW(v *Value, config *Config) bool { 6505 b := v.Block 6506 _ = b 6507 // match: (ANDW x (MOVDconst [c])) 6508 // cond: 6509 // result: (ANDWconst [c] x) 6510 for { 6511 x := v.Args[0] 6512 v_1 := v.Args[1] 6513 if v_1.Op != OpS390XMOVDconst { 6514 break 6515 } 6516 c := v_1.AuxInt 6517 v.reset(OpS390XANDWconst) 6518 v.AuxInt = c 6519 v.AddArg(x) 6520 return true 6521 } 6522 // match: (ANDW (MOVDconst [c]) x) 6523 // cond: 6524 // result: (ANDWconst [c] x) 6525 for { 6526 v_0 := v.Args[0] 6527 if v_0.Op != OpS390XMOVDconst { 6528 break 6529 } 6530 c := v_0.AuxInt 6531 x := v.Args[1] 6532 v.reset(OpS390XANDWconst) 6533 v.AuxInt = c 6534 v.AddArg(x) 6535 return true 6536 } 6537 // match: (ANDW x x) 6538 // cond: 6539 // result: x 6540 for { 6541 x := v.Args[0] 6542 if x != v.Args[1] { 6543 break 6544 } 6545 v.reset(OpCopy) 6546 v.Type = x.Type 6547 v.AddArg(x) 6548 return true 6549 } 6550 // match: (ANDW <t> x g:(MOVWload [off] {sym} ptr mem)) 6551 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6552 // result: (ANDWload <t> [off] {sym} x ptr mem) 6553 for { 6554 t := v.Type 6555 x := v.Args[0] 6556 g := v.Args[1] 6557 if g.Op != OpS390XMOVWload { 6558 break 6559 } 6560 off := g.AuxInt 6561 sym := g.Aux 6562 ptr := g.Args[0] 6563 mem := g.Args[1] 6564 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6565 break 6566 } 6567 v.reset(OpS390XANDWload) 6568 v.Type = t 6569 v.AuxInt = off 6570 v.Aux = sym 6571 v.AddArg(x) 6572 v.AddArg(ptr) 6573 v.AddArg(mem) 6574 return true 6575 } 6576 // match: (ANDW <t> g:(MOVWload [off] {sym} ptr mem) x) 6577 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6578 // result: (ANDWload <t> [off] {sym} x ptr mem) 6579 for { 6580 t := v.Type 6581 g := v.Args[0] 6582 if g.Op != OpS390XMOVWload { 6583 break 6584 } 6585 off := g.AuxInt 6586 sym := g.Aux 6587 ptr := g.Args[0] 6588 mem := g.Args[1] 6589 x := v.Args[1] 6590 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6591 break 6592 } 6593 v.reset(OpS390XANDWload) 6594 v.Type = t 6595 v.AuxInt = off 6596 v.Aux = sym 6597 v.AddArg(x) 6598 v.AddArg(ptr) 6599 v.AddArg(mem) 6600 return true 6601 } 6602 // match: (ANDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6603 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6604 // result: (ANDWload <t> [off] {sym} x ptr mem) 6605 for { 6606 t := v.Type 6607 x := v.Args[0] 6608 g := v.Args[1] 6609 if g.Op != OpS390XMOVWZload { 6610 break 6611 } 6612 off := g.AuxInt 6613 sym := g.Aux 6614 ptr := g.Args[0] 6615 mem := g.Args[1] 6616 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6617 break 6618 } 6619 v.reset(OpS390XANDWload) 6620 v.Type = t 6621 v.AuxInt = off 6622 v.Aux = sym 6623 v.AddArg(x) 6624 v.AddArg(ptr) 6625 v.AddArg(mem) 6626 return true 6627 } 6628 // match: (ANDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6629 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6630 // result: (ANDWload <t> [off] {sym} x ptr mem) 6631 for { 6632 t := v.Type 6633 g := v.Args[0] 6634 if g.Op != OpS390XMOVWZload { 6635 break 6636 } 6637 off := g.AuxInt 6638 sym := g.Aux 6639 ptr := g.Args[0] 6640 mem := g.Args[1] 6641 x := v.Args[1] 6642 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6643 break 6644 } 6645 v.reset(OpS390XANDWload) 6646 v.Type = t 6647 v.AuxInt = off 6648 v.Aux = sym 6649 v.AddArg(x) 6650 v.AddArg(ptr) 6651 v.AddArg(mem) 6652 return true 6653 } 6654 return false 6655 } 6656 func rewriteValueS390X_OpS390XANDWconst(v *Value, config *Config) bool { 6657 b := v.Block 6658 _ = b 6659 // match: (ANDWconst [c] (ANDWconst [d] x)) 6660 // cond: 6661 // result: (ANDWconst [c & d] x) 6662 for { 6663 c := v.AuxInt 6664 v_0 := v.Args[0] 6665 if v_0.Op != OpS390XANDWconst { 6666 break 6667 } 6668 d := v_0.AuxInt 6669 x := v_0.Args[0] 6670 v.reset(OpS390XANDWconst) 6671 v.AuxInt = c & d 6672 v.AddArg(x) 6673 return true 6674 } 6675 // match: (ANDWconst [0xFF] x) 6676 // cond: 6677 // result: (MOVBZreg x) 6678 for { 6679 if v.AuxInt != 0xFF { 6680 break 6681 } 6682 x := v.Args[0] 6683 v.reset(OpS390XMOVBZreg) 6684 v.AddArg(x) 6685 return true 6686 } 6687 // match: (ANDWconst [0xFFFF] x) 6688 // cond: 6689 // result: (MOVHZreg x) 6690 for { 6691 if v.AuxInt != 0xFFFF { 6692 break 6693 } 6694 x := v.Args[0] 6695 v.reset(OpS390XMOVHZreg) 6696 v.AddArg(x) 6697 return true 6698 } 6699 // match: (ANDWconst [c] _) 6700 // cond: int32(c)==0 6701 // result: (MOVDconst [0]) 6702 for { 6703 c := v.AuxInt 6704 if !(int32(c) == 0) { 6705 break 6706 } 6707 v.reset(OpS390XMOVDconst) 6708 v.AuxInt = 0 6709 return true 6710 } 6711 // match: (ANDWconst [c] x) 6712 // cond: int32(c)==-1 6713 // result: x 6714 for { 6715 c := v.AuxInt 6716 x := v.Args[0] 6717 if !(int32(c) == -1) { 6718 break 6719 } 6720 v.reset(OpCopy) 6721 v.Type = x.Type 6722 v.AddArg(x) 6723 return true 6724 } 6725 // match: (ANDWconst [c] (MOVDconst [d])) 6726 // cond: 6727 // result: (MOVDconst [c&d]) 6728 for { 6729 c := v.AuxInt 6730 v_0 := v.Args[0] 6731 if v_0.Op != OpS390XMOVDconst { 6732 break 6733 } 6734 d := v_0.AuxInt 6735 v.reset(OpS390XMOVDconst) 6736 v.AuxInt = c & d 6737 return true 6738 } 6739 return false 6740 } 6741 func rewriteValueS390X_OpS390XANDconst(v *Value, config *Config) bool { 6742 b := v.Block 6743 _ = b 6744 // match: (ANDconst [c] (ANDconst [d] x)) 6745 // cond: 6746 // result: (ANDconst [c & d] x) 6747 for { 6748 c := v.AuxInt 6749 v_0 := v.Args[0] 6750 if v_0.Op != OpS390XANDconst { 6751 break 6752 } 6753 d := v_0.AuxInt 6754 x := v_0.Args[0] 6755 v.reset(OpS390XANDconst) 6756 v.AuxInt = c & d 6757 v.AddArg(x) 6758 return true 6759 } 6760 // match: (ANDconst [0] _) 6761 // cond: 6762 // result: (MOVDconst [0]) 6763 for { 6764 if v.AuxInt != 0 { 6765 break 6766 } 6767 v.reset(OpS390XMOVDconst) 6768 v.AuxInt = 0 6769 return true 6770 } 6771 // match: (ANDconst [-1] x) 6772 // cond: 6773 // result: x 6774 for { 6775 if v.AuxInt != -1 { 6776 break 6777 } 6778 x := v.Args[0] 6779 v.reset(OpCopy) 6780 v.Type = x.Type 6781 v.AddArg(x) 6782 return true 6783 } 6784 // match: (ANDconst [c] (MOVDconst [d])) 6785 // cond: 6786 // result: (MOVDconst [c&d]) 6787 for { 6788 c := v.AuxInt 6789 v_0 := v.Args[0] 6790 if v_0.Op != OpS390XMOVDconst { 6791 break 6792 } 6793 d := v_0.AuxInt 6794 v.reset(OpS390XMOVDconst) 6795 v.AuxInt = c & d 6796 return true 6797 } 6798 return false 6799 } 6800 func rewriteValueS390X_OpS390XCMP(v *Value, config *Config) bool { 6801 b := v.Block 6802 _ = b 6803 // match: (CMP x (MOVDconst [c])) 6804 // cond: is32Bit(c) 6805 // result: (CMPconst x [c]) 6806 for { 6807 x := v.Args[0] 6808 v_1 := v.Args[1] 6809 if v_1.Op != OpS390XMOVDconst { 6810 break 6811 } 6812 c := v_1.AuxInt 6813 if !(is32Bit(c)) { 6814 break 6815 } 6816 v.reset(OpS390XCMPconst) 6817 v.AuxInt = c 6818 v.AddArg(x) 6819 return true 6820 } 6821 // match: (CMP (MOVDconst [c]) x) 6822 // cond: is32Bit(c) 6823 // result: (InvertFlags (CMPconst x [c])) 6824 for { 6825 v_0 := v.Args[0] 6826 if v_0.Op != OpS390XMOVDconst { 6827 break 6828 } 6829 c := v_0.AuxInt 6830 x := v.Args[1] 6831 if !(is32Bit(c)) { 6832 break 6833 } 6834 v.reset(OpS390XInvertFlags) 6835 v0 := b.NewValue0(v.Pos, OpS390XCMPconst, TypeFlags) 6836 v0.AuxInt = c 6837 v0.AddArg(x) 6838 v.AddArg(v0) 6839 return true 6840 } 6841 return false 6842 } 6843 func rewriteValueS390X_OpS390XCMPU(v *Value, config *Config) bool { 6844 b := v.Block 6845 _ = b 6846 // match: (CMPU x (MOVDconst [c])) 6847 // cond: is32Bit(c) 6848 // result: (CMPUconst x [int64(uint32(c))]) 6849 for { 6850 x := v.Args[0] 6851 v_1 := v.Args[1] 6852 if v_1.Op != OpS390XMOVDconst { 6853 break 6854 } 6855 c := v_1.AuxInt 6856 if !(is32Bit(c)) { 6857 break 6858 } 6859 v.reset(OpS390XCMPUconst) 6860 v.AuxInt = int64(uint32(c)) 6861 v.AddArg(x) 6862 return true 6863 } 6864 // match: (CMPU (MOVDconst [c]) x) 6865 // cond: is32Bit(c) 6866 // result: (InvertFlags (CMPUconst x [int64(uint32(c))])) 6867 for { 6868 v_0 := v.Args[0] 6869 if v_0.Op != OpS390XMOVDconst { 6870 break 6871 } 6872 c := v_0.AuxInt 6873 x := v.Args[1] 6874 if !(is32Bit(c)) { 6875 break 6876 } 6877 v.reset(OpS390XInvertFlags) 6878 v0 := b.NewValue0(v.Pos, OpS390XCMPUconst, TypeFlags) 6879 v0.AuxInt = int64(uint32(c)) 6880 v0.AddArg(x) 6881 v.AddArg(v0) 6882 return true 6883 } 6884 return false 6885 } 6886 func rewriteValueS390X_OpS390XCMPUconst(v *Value, config *Config) bool { 6887 b := v.Block 6888 _ = b 6889 // match: (CMPUconst (MOVDconst [x]) [y]) 6890 // cond: uint64(x)==uint64(y) 6891 // result: (FlagEQ) 6892 for { 6893 y := v.AuxInt 6894 v_0 := v.Args[0] 6895 if v_0.Op != OpS390XMOVDconst { 6896 break 6897 } 6898 x := v_0.AuxInt 6899 if !(uint64(x) == uint64(y)) { 6900 break 6901 } 6902 v.reset(OpS390XFlagEQ) 6903 return true 6904 } 6905 // match: (CMPUconst (MOVDconst [x]) [y]) 6906 // cond: uint64(x)<uint64(y) 6907 // result: (FlagLT) 6908 for { 6909 y := v.AuxInt 6910 v_0 := v.Args[0] 6911 if v_0.Op != OpS390XMOVDconst { 6912 break 6913 } 6914 x := v_0.AuxInt 6915 if !(uint64(x) < uint64(y)) { 6916 break 6917 } 6918 v.reset(OpS390XFlagLT) 6919 return true 6920 } 6921 // match: (CMPUconst (MOVDconst [x]) [y]) 6922 // cond: uint64(x)>uint64(y) 6923 // result: (FlagGT) 6924 for { 6925 y := v.AuxInt 6926 v_0 := v.Args[0] 6927 if v_0.Op != OpS390XMOVDconst { 6928 break 6929 } 6930 x := v_0.AuxInt 6931 if !(uint64(x) > uint64(y)) { 6932 break 6933 } 6934 v.reset(OpS390XFlagGT) 6935 return true 6936 } 6937 return false 6938 } 6939 func rewriteValueS390X_OpS390XCMPW(v *Value, config *Config) bool { 6940 b := v.Block 6941 _ = b 6942 // match: (CMPW x (MOVDconst [c])) 6943 // cond: 6944 // result: (CMPWconst x [c]) 6945 for { 6946 x := v.Args[0] 6947 v_1 := v.Args[1] 6948 if v_1.Op != OpS390XMOVDconst { 6949 break 6950 } 6951 c := v_1.AuxInt 6952 v.reset(OpS390XCMPWconst) 6953 v.AuxInt = c 6954 v.AddArg(x) 6955 return true 6956 } 6957 // match: (CMPW (MOVDconst [c]) x) 6958 // cond: 6959 // result: (InvertFlags (CMPWconst x [c])) 6960 for { 6961 v_0 := v.Args[0] 6962 if v_0.Op != OpS390XMOVDconst { 6963 break 6964 } 6965 c := v_0.AuxInt 6966 x := v.Args[1] 6967 v.reset(OpS390XInvertFlags) 6968 v0 := b.NewValue0(v.Pos, OpS390XCMPWconst, TypeFlags) 6969 v0.AuxInt = c 6970 v0.AddArg(x) 6971 v.AddArg(v0) 6972 return true 6973 } 6974 return false 6975 } 6976 func rewriteValueS390X_OpS390XCMPWU(v *Value, config *Config) bool { 6977 b := v.Block 6978 _ = b 6979 // match: (CMPWU x (MOVDconst [c])) 6980 // cond: 6981 // result: (CMPWUconst x [int64(uint32(c))]) 6982 for { 6983 x := v.Args[0] 6984 v_1 := v.Args[1] 6985 if v_1.Op != OpS390XMOVDconst { 6986 break 6987 } 6988 c := v_1.AuxInt 6989 v.reset(OpS390XCMPWUconst) 6990 v.AuxInt = int64(uint32(c)) 6991 v.AddArg(x) 6992 return true 6993 } 6994 // match: (CMPWU (MOVDconst [c]) x) 6995 // cond: 6996 // result: (InvertFlags (CMPWUconst x [int64(uint32(c))])) 6997 for { 6998 v_0 := v.Args[0] 6999 if v_0.Op != OpS390XMOVDconst { 7000 break 7001 } 7002 c := v_0.AuxInt 7003 x := v.Args[1] 7004 v.reset(OpS390XInvertFlags) 7005 v0 := b.NewValue0(v.Pos, OpS390XCMPWUconst, TypeFlags) 7006 v0.AuxInt = int64(uint32(c)) 7007 v0.AddArg(x) 7008 v.AddArg(v0) 7009 return true 7010 } 7011 return false 7012 } 7013 func rewriteValueS390X_OpS390XCMPWUconst(v *Value, config *Config) bool { 7014 b := v.Block 7015 _ = b 7016 // match: (CMPWUconst (MOVDconst [x]) [y]) 7017 // cond: uint32(x)==uint32(y) 7018 // result: (FlagEQ) 7019 for { 7020 y := v.AuxInt 7021 v_0 := v.Args[0] 7022 if v_0.Op != OpS390XMOVDconst { 7023 break 7024 } 7025 x := v_0.AuxInt 7026 if !(uint32(x) == uint32(y)) { 7027 break 7028 } 7029 v.reset(OpS390XFlagEQ) 7030 return true 7031 } 7032 // match: (CMPWUconst (MOVDconst [x]) [y]) 7033 // cond: uint32(x)<uint32(y) 7034 // result: (FlagLT) 7035 for { 7036 y := v.AuxInt 7037 v_0 := v.Args[0] 7038 if v_0.Op != OpS390XMOVDconst { 7039 break 7040 } 7041 x := v_0.AuxInt 7042 if !(uint32(x) < uint32(y)) { 7043 break 7044 } 7045 v.reset(OpS390XFlagLT) 7046 return true 7047 } 7048 // match: (CMPWUconst (MOVDconst [x]) [y]) 7049 // cond: uint32(x)>uint32(y) 7050 // result: (FlagGT) 7051 for { 7052 y := v.AuxInt 7053 v_0 := v.Args[0] 7054 if v_0.Op != OpS390XMOVDconst { 7055 break 7056 } 7057 x := v_0.AuxInt 7058 if !(uint32(x) > uint32(y)) { 7059 break 7060 } 7061 v.reset(OpS390XFlagGT) 7062 return true 7063 } 7064 return false 7065 } 7066 func rewriteValueS390X_OpS390XCMPWconst(v *Value, config *Config) bool { 7067 b := v.Block 7068 _ = b 7069 // match: (CMPWconst (MOVDconst [x]) [y]) 7070 // cond: int32(x)==int32(y) 7071 // result: (FlagEQ) 7072 for { 7073 y := v.AuxInt 7074 v_0 := v.Args[0] 7075 if v_0.Op != OpS390XMOVDconst { 7076 break 7077 } 7078 x := v_0.AuxInt 7079 if !(int32(x) == int32(y)) { 7080 break 7081 } 7082 v.reset(OpS390XFlagEQ) 7083 return true 7084 } 7085 // match: (CMPWconst (MOVDconst [x]) [y]) 7086 // cond: int32(x)<int32(y) 7087 // result: (FlagLT) 7088 for { 7089 y := v.AuxInt 7090 v_0 := v.Args[0] 7091 if v_0.Op != OpS390XMOVDconst { 7092 break 7093 } 7094 x := v_0.AuxInt 7095 if !(int32(x) < int32(y)) { 7096 break 7097 } 7098 v.reset(OpS390XFlagLT) 7099 return true 7100 } 7101 // match: (CMPWconst (MOVDconst [x]) [y]) 7102 // cond: int32(x)>int32(y) 7103 // result: (FlagGT) 7104 for { 7105 y := v.AuxInt 7106 v_0 := v.Args[0] 7107 if v_0.Op != OpS390XMOVDconst { 7108 break 7109 } 7110 x := v_0.AuxInt 7111 if !(int32(x) > int32(y)) { 7112 break 7113 } 7114 v.reset(OpS390XFlagGT) 7115 return true 7116 } 7117 // match: (CMPWconst (SRWconst _ [c]) [n]) 7118 // cond: 0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n) 7119 // result: (FlagLT) 7120 for { 7121 n := v.AuxInt 7122 v_0 := v.Args[0] 7123 if v_0.Op != OpS390XSRWconst { 7124 break 7125 } 7126 c := v_0.AuxInt 7127 if !(0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)) { 7128 break 7129 } 7130 v.reset(OpS390XFlagLT) 7131 return true 7132 } 7133 // match: (CMPWconst (ANDWconst _ [m]) [n]) 7134 // cond: 0 <= int32(m) && int32(m) < int32(n) 7135 // result: (FlagLT) 7136 for { 7137 n := v.AuxInt 7138 v_0 := v.Args[0] 7139 if v_0.Op != OpS390XANDWconst { 7140 break 7141 } 7142 m := v_0.AuxInt 7143 if !(0 <= int32(m) && int32(m) < int32(n)) { 7144 break 7145 } 7146 v.reset(OpS390XFlagLT) 7147 return true 7148 } 7149 return false 7150 } 7151 func rewriteValueS390X_OpS390XCMPconst(v *Value, config *Config) bool { 7152 b := v.Block 7153 _ = b 7154 // match: (CMPconst (MOVDconst [x]) [y]) 7155 // cond: x==y 7156 // result: (FlagEQ) 7157 for { 7158 y := v.AuxInt 7159 v_0 := v.Args[0] 7160 if v_0.Op != OpS390XMOVDconst { 7161 break 7162 } 7163 x := v_0.AuxInt 7164 if !(x == y) { 7165 break 7166 } 7167 v.reset(OpS390XFlagEQ) 7168 return true 7169 } 7170 // match: (CMPconst (MOVDconst [x]) [y]) 7171 // cond: x<y 7172 // result: (FlagLT) 7173 for { 7174 y := v.AuxInt 7175 v_0 := v.Args[0] 7176 if v_0.Op != OpS390XMOVDconst { 7177 break 7178 } 7179 x := v_0.AuxInt 7180 if !(x < y) { 7181 break 7182 } 7183 v.reset(OpS390XFlagLT) 7184 return true 7185 } 7186 // match: (CMPconst (MOVDconst [x]) [y]) 7187 // cond: x>y 7188 // result: (FlagGT) 7189 for { 7190 y := v.AuxInt 7191 v_0 := v.Args[0] 7192 if v_0.Op != OpS390XMOVDconst { 7193 break 7194 } 7195 x := v_0.AuxInt 7196 if !(x > y) { 7197 break 7198 } 7199 v.reset(OpS390XFlagGT) 7200 return true 7201 } 7202 // match: (CMPconst (MOVBZreg _) [c]) 7203 // cond: 0xFF < c 7204 // result: (FlagLT) 7205 for { 7206 c := v.AuxInt 7207 v_0 := v.Args[0] 7208 if v_0.Op != OpS390XMOVBZreg { 7209 break 7210 } 7211 if !(0xFF < c) { 7212 break 7213 } 7214 v.reset(OpS390XFlagLT) 7215 return true 7216 } 7217 // match: (CMPconst (MOVHZreg _) [c]) 7218 // cond: 0xFFFF < c 7219 // result: (FlagLT) 7220 for { 7221 c := v.AuxInt 7222 v_0 := v.Args[0] 7223 if v_0.Op != OpS390XMOVHZreg { 7224 break 7225 } 7226 if !(0xFFFF < c) { 7227 break 7228 } 7229 v.reset(OpS390XFlagLT) 7230 return true 7231 } 7232 // match: (CMPconst (MOVWZreg _) [c]) 7233 // cond: 0xFFFFFFFF < c 7234 // result: (FlagLT) 7235 for { 7236 c := v.AuxInt 7237 v_0 := v.Args[0] 7238 if v_0.Op != OpS390XMOVWZreg { 7239 break 7240 } 7241 if !(0xFFFFFFFF < c) { 7242 break 7243 } 7244 v.reset(OpS390XFlagLT) 7245 return true 7246 } 7247 // match: (CMPconst (SRDconst _ [c]) [n]) 7248 // cond: 0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n) 7249 // result: (FlagLT) 7250 for { 7251 n := v.AuxInt 7252 v_0 := v.Args[0] 7253 if v_0.Op != OpS390XSRDconst { 7254 break 7255 } 7256 c := v_0.AuxInt 7257 if !(0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n)) { 7258 break 7259 } 7260 v.reset(OpS390XFlagLT) 7261 return true 7262 } 7263 // match: (CMPconst (ANDconst _ [m]) [n]) 7264 // cond: 0 <= m && m < n 7265 // result: (FlagLT) 7266 for { 7267 n := v.AuxInt 7268 v_0 := v.Args[0] 7269 if v_0.Op != OpS390XANDconst { 7270 break 7271 } 7272 m := v_0.AuxInt 7273 if !(0 <= m && m < n) { 7274 break 7275 } 7276 v.reset(OpS390XFlagLT) 7277 return true 7278 } 7279 return false 7280 } 7281 func rewriteValueS390X_OpS390XFMOVDload(v *Value, config *Config) bool { 7282 b := v.Block 7283 _ = b 7284 // match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 7285 // cond: is20Bit(off1+off2) 7286 // result: (FMOVDload [off1+off2] {sym} ptr mem) 7287 for { 7288 off1 := v.AuxInt 7289 sym := v.Aux 7290 v_0 := v.Args[0] 7291 if v_0.Op != OpS390XADDconst { 7292 break 7293 } 7294 off2 := v_0.AuxInt 7295 ptr := v_0.Args[0] 7296 mem := v.Args[1] 7297 if !(is20Bit(off1 + off2)) { 7298 break 7299 } 7300 v.reset(OpS390XFMOVDload) 7301 v.AuxInt = off1 + off2 7302 v.Aux = sym 7303 v.AddArg(ptr) 7304 v.AddArg(mem) 7305 return true 7306 } 7307 // match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7308 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7309 // result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7310 for { 7311 off1 := v.AuxInt 7312 sym1 := v.Aux 7313 v_0 := v.Args[0] 7314 if v_0.Op != OpS390XMOVDaddr { 7315 break 7316 } 7317 off2 := v_0.AuxInt 7318 sym2 := v_0.Aux 7319 base := v_0.Args[0] 7320 mem := v.Args[1] 7321 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7322 break 7323 } 7324 v.reset(OpS390XFMOVDload) 7325 v.AuxInt = off1 + off2 7326 v.Aux = mergeSym(sym1, sym2) 7327 v.AddArg(base) 7328 v.AddArg(mem) 7329 return true 7330 } 7331 // match: (FMOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7332 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7333 // result: (FMOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7334 for { 7335 off1 := v.AuxInt 7336 sym1 := v.Aux 7337 v_0 := v.Args[0] 7338 if v_0.Op != OpS390XMOVDaddridx { 7339 break 7340 } 7341 off2 := v_0.AuxInt 7342 sym2 := v_0.Aux 7343 ptr := v_0.Args[0] 7344 idx := v_0.Args[1] 7345 mem := v.Args[1] 7346 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7347 break 7348 } 7349 v.reset(OpS390XFMOVDloadidx) 7350 v.AuxInt = off1 + off2 7351 v.Aux = mergeSym(sym1, sym2) 7352 v.AddArg(ptr) 7353 v.AddArg(idx) 7354 v.AddArg(mem) 7355 return true 7356 } 7357 // match: (FMOVDload [off] {sym} (ADD ptr idx) mem) 7358 // cond: ptr.Op != OpSB 7359 // result: (FMOVDloadidx [off] {sym} ptr idx mem) 7360 for { 7361 off := v.AuxInt 7362 sym := v.Aux 7363 v_0 := v.Args[0] 7364 if v_0.Op != OpS390XADD { 7365 break 7366 } 7367 ptr := v_0.Args[0] 7368 idx := v_0.Args[1] 7369 mem := v.Args[1] 7370 if !(ptr.Op != OpSB) { 7371 break 7372 } 7373 v.reset(OpS390XFMOVDloadidx) 7374 v.AuxInt = off 7375 v.Aux = sym 7376 v.AddArg(ptr) 7377 v.AddArg(idx) 7378 v.AddArg(mem) 7379 return true 7380 } 7381 return false 7382 } 7383 func rewriteValueS390X_OpS390XFMOVDloadidx(v *Value, config *Config) bool { 7384 b := v.Block 7385 _ = b 7386 // match: (FMOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7387 // cond: 7388 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7389 for { 7390 c := v.AuxInt 7391 sym := v.Aux 7392 v_0 := v.Args[0] 7393 if v_0.Op != OpS390XADDconst { 7394 break 7395 } 7396 d := v_0.AuxInt 7397 ptr := v_0.Args[0] 7398 idx := v.Args[1] 7399 mem := v.Args[2] 7400 v.reset(OpS390XFMOVDloadidx) 7401 v.AuxInt = c + d 7402 v.Aux = sym 7403 v.AddArg(ptr) 7404 v.AddArg(idx) 7405 v.AddArg(mem) 7406 return true 7407 } 7408 // match: (FMOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7409 // cond: 7410 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7411 for { 7412 c := v.AuxInt 7413 sym := v.Aux 7414 ptr := v.Args[0] 7415 v_1 := v.Args[1] 7416 if v_1.Op != OpS390XADDconst { 7417 break 7418 } 7419 d := v_1.AuxInt 7420 idx := v_1.Args[0] 7421 mem := v.Args[2] 7422 v.reset(OpS390XFMOVDloadidx) 7423 v.AuxInt = c + d 7424 v.Aux = sym 7425 v.AddArg(ptr) 7426 v.AddArg(idx) 7427 v.AddArg(mem) 7428 return true 7429 } 7430 return false 7431 } 7432 func rewriteValueS390X_OpS390XFMOVDstore(v *Value, config *Config) bool { 7433 b := v.Block 7434 _ = b 7435 // match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7436 // cond: is20Bit(off1+off2) 7437 // result: (FMOVDstore [off1+off2] {sym} ptr val mem) 7438 for { 7439 off1 := v.AuxInt 7440 sym := v.Aux 7441 v_0 := v.Args[0] 7442 if v_0.Op != OpS390XADDconst { 7443 break 7444 } 7445 off2 := v_0.AuxInt 7446 ptr := v_0.Args[0] 7447 val := v.Args[1] 7448 mem := v.Args[2] 7449 if !(is20Bit(off1 + off2)) { 7450 break 7451 } 7452 v.reset(OpS390XFMOVDstore) 7453 v.AuxInt = off1 + off2 7454 v.Aux = sym 7455 v.AddArg(ptr) 7456 v.AddArg(val) 7457 v.AddArg(mem) 7458 return true 7459 } 7460 // match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7461 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7462 // result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7463 for { 7464 off1 := v.AuxInt 7465 sym1 := v.Aux 7466 v_0 := v.Args[0] 7467 if v_0.Op != OpS390XMOVDaddr { 7468 break 7469 } 7470 off2 := v_0.AuxInt 7471 sym2 := v_0.Aux 7472 base := v_0.Args[0] 7473 val := v.Args[1] 7474 mem := v.Args[2] 7475 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7476 break 7477 } 7478 v.reset(OpS390XFMOVDstore) 7479 v.AuxInt = off1 + off2 7480 v.Aux = mergeSym(sym1, sym2) 7481 v.AddArg(base) 7482 v.AddArg(val) 7483 v.AddArg(mem) 7484 return true 7485 } 7486 // match: (FMOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7487 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7488 // result: (FMOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7489 for { 7490 off1 := v.AuxInt 7491 sym1 := v.Aux 7492 v_0 := v.Args[0] 7493 if v_0.Op != OpS390XMOVDaddridx { 7494 break 7495 } 7496 off2 := v_0.AuxInt 7497 sym2 := v_0.Aux 7498 ptr := v_0.Args[0] 7499 idx := v_0.Args[1] 7500 val := v.Args[1] 7501 mem := v.Args[2] 7502 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7503 break 7504 } 7505 v.reset(OpS390XFMOVDstoreidx) 7506 v.AuxInt = off1 + off2 7507 v.Aux = mergeSym(sym1, sym2) 7508 v.AddArg(ptr) 7509 v.AddArg(idx) 7510 v.AddArg(val) 7511 v.AddArg(mem) 7512 return true 7513 } 7514 // match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem) 7515 // cond: ptr.Op != OpSB 7516 // result: (FMOVDstoreidx [off] {sym} ptr idx val mem) 7517 for { 7518 off := v.AuxInt 7519 sym := v.Aux 7520 v_0 := v.Args[0] 7521 if v_0.Op != OpS390XADD { 7522 break 7523 } 7524 ptr := v_0.Args[0] 7525 idx := v_0.Args[1] 7526 val := v.Args[1] 7527 mem := v.Args[2] 7528 if !(ptr.Op != OpSB) { 7529 break 7530 } 7531 v.reset(OpS390XFMOVDstoreidx) 7532 v.AuxInt = off 7533 v.Aux = sym 7534 v.AddArg(ptr) 7535 v.AddArg(idx) 7536 v.AddArg(val) 7537 v.AddArg(mem) 7538 return true 7539 } 7540 return false 7541 } 7542 func rewriteValueS390X_OpS390XFMOVDstoreidx(v *Value, config *Config) bool { 7543 b := v.Block 7544 _ = b 7545 // match: (FMOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7546 // cond: 7547 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7548 for { 7549 c := v.AuxInt 7550 sym := v.Aux 7551 v_0 := v.Args[0] 7552 if v_0.Op != OpS390XADDconst { 7553 break 7554 } 7555 d := v_0.AuxInt 7556 ptr := v_0.Args[0] 7557 idx := v.Args[1] 7558 val := v.Args[2] 7559 mem := v.Args[3] 7560 v.reset(OpS390XFMOVDstoreidx) 7561 v.AuxInt = c + d 7562 v.Aux = sym 7563 v.AddArg(ptr) 7564 v.AddArg(idx) 7565 v.AddArg(val) 7566 v.AddArg(mem) 7567 return true 7568 } 7569 // match: (FMOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7570 // cond: 7571 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7572 for { 7573 c := v.AuxInt 7574 sym := v.Aux 7575 ptr := v.Args[0] 7576 v_1 := v.Args[1] 7577 if v_1.Op != OpS390XADDconst { 7578 break 7579 } 7580 d := v_1.AuxInt 7581 idx := v_1.Args[0] 7582 val := v.Args[2] 7583 mem := v.Args[3] 7584 v.reset(OpS390XFMOVDstoreidx) 7585 v.AuxInt = c + d 7586 v.Aux = sym 7587 v.AddArg(ptr) 7588 v.AddArg(idx) 7589 v.AddArg(val) 7590 v.AddArg(mem) 7591 return true 7592 } 7593 return false 7594 } 7595 func rewriteValueS390X_OpS390XFMOVSload(v *Value, config *Config) bool { 7596 b := v.Block 7597 _ = b 7598 // match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem) 7599 // cond: is20Bit(off1+off2) 7600 // result: (FMOVSload [off1+off2] {sym} ptr mem) 7601 for { 7602 off1 := v.AuxInt 7603 sym := v.Aux 7604 v_0 := v.Args[0] 7605 if v_0.Op != OpS390XADDconst { 7606 break 7607 } 7608 off2 := v_0.AuxInt 7609 ptr := v_0.Args[0] 7610 mem := v.Args[1] 7611 if !(is20Bit(off1 + off2)) { 7612 break 7613 } 7614 v.reset(OpS390XFMOVSload) 7615 v.AuxInt = off1 + off2 7616 v.Aux = sym 7617 v.AddArg(ptr) 7618 v.AddArg(mem) 7619 return true 7620 } 7621 // match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7622 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7623 // result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7624 for { 7625 off1 := v.AuxInt 7626 sym1 := v.Aux 7627 v_0 := v.Args[0] 7628 if v_0.Op != OpS390XMOVDaddr { 7629 break 7630 } 7631 off2 := v_0.AuxInt 7632 sym2 := v_0.Aux 7633 base := v_0.Args[0] 7634 mem := v.Args[1] 7635 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7636 break 7637 } 7638 v.reset(OpS390XFMOVSload) 7639 v.AuxInt = off1 + off2 7640 v.Aux = mergeSym(sym1, sym2) 7641 v.AddArg(base) 7642 v.AddArg(mem) 7643 return true 7644 } 7645 // match: (FMOVSload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7646 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7647 // result: (FMOVSloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7648 for { 7649 off1 := v.AuxInt 7650 sym1 := v.Aux 7651 v_0 := v.Args[0] 7652 if v_0.Op != OpS390XMOVDaddridx { 7653 break 7654 } 7655 off2 := v_0.AuxInt 7656 sym2 := v_0.Aux 7657 ptr := v_0.Args[0] 7658 idx := v_0.Args[1] 7659 mem := v.Args[1] 7660 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7661 break 7662 } 7663 v.reset(OpS390XFMOVSloadidx) 7664 v.AuxInt = off1 + off2 7665 v.Aux = mergeSym(sym1, sym2) 7666 v.AddArg(ptr) 7667 v.AddArg(idx) 7668 v.AddArg(mem) 7669 return true 7670 } 7671 // match: (FMOVSload [off] {sym} (ADD ptr idx) mem) 7672 // cond: ptr.Op != OpSB 7673 // result: (FMOVSloadidx [off] {sym} ptr idx mem) 7674 for { 7675 off := v.AuxInt 7676 sym := v.Aux 7677 v_0 := v.Args[0] 7678 if v_0.Op != OpS390XADD { 7679 break 7680 } 7681 ptr := v_0.Args[0] 7682 idx := v_0.Args[1] 7683 mem := v.Args[1] 7684 if !(ptr.Op != OpSB) { 7685 break 7686 } 7687 v.reset(OpS390XFMOVSloadidx) 7688 v.AuxInt = off 7689 v.Aux = sym 7690 v.AddArg(ptr) 7691 v.AddArg(idx) 7692 v.AddArg(mem) 7693 return true 7694 } 7695 return false 7696 } 7697 func rewriteValueS390X_OpS390XFMOVSloadidx(v *Value, config *Config) bool { 7698 b := v.Block 7699 _ = b 7700 // match: (FMOVSloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7701 // cond: 7702 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7703 for { 7704 c := v.AuxInt 7705 sym := v.Aux 7706 v_0 := v.Args[0] 7707 if v_0.Op != OpS390XADDconst { 7708 break 7709 } 7710 d := v_0.AuxInt 7711 ptr := v_0.Args[0] 7712 idx := v.Args[1] 7713 mem := v.Args[2] 7714 v.reset(OpS390XFMOVSloadidx) 7715 v.AuxInt = c + d 7716 v.Aux = sym 7717 v.AddArg(ptr) 7718 v.AddArg(idx) 7719 v.AddArg(mem) 7720 return true 7721 } 7722 // match: (FMOVSloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7723 // cond: 7724 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7725 for { 7726 c := v.AuxInt 7727 sym := v.Aux 7728 ptr := v.Args[0] 7729 v_1 := v.Args[1] 7730 if v_1.Op != OpS390XADDconst { 7731 break 7732 } 7733 d := v_1.AuxInt 7734 idx := v_1.Args[0] 7735 mem := v.Args[2] 7736 v.reset(OpS390XFMOVSloadidx) 7737 v.AuxInt = c + d 7738 v.Aux = sym 7739 v.AddArg(ptr) 7740 v.AddArg(idx) 7741 v.AddArg(mem) 7742 return true 7743 } 7744 return false 7745 } 7746 func rewriteValueS390X_OpS390XFMOVSstore(v *Value, config *Config) bool { 7747 b := v.Block 7748 _ = b 7749 // match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7750 // cond: is20Bit(off1+off2) 7751 // result: (FMOVSstore [off1+off2] {sym} ptr val mem) 7752 for { 7753 off1 := v.AuxInt 7754 sym := v.Aux 7755 v_0 := v.Args[0] 7756 if v_0.Op != OpS390XADDconst { 7757 break 7758 } 7759 off2 := v_0.AuxInt 7760 ptr := v_0.Args[0] 7761 val := v.Args[1] 7762 mem := v.Args[2] 7763 if !(is20Bit(off1 + off2)) { 7764 break 7765 } 7766 v.reset(OpS390XFMOVSstore) 7767 v.AuxInt = off1 + off2 7768 v.Aux = sym 7769 v.AddArg(ptr) 7770 v.AddArg(val) 7771 v.AddArg(mem) 7772 return true 7773 } 7774 // match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7775 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7776 // result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7777 for { 7778 off1 := v.AuxInt 7779 sym1 := v.Aux 7780 v_0 := v.Args[0] 7781 if v_0.Op != OpS390XMOVDaddr { 7782 break 7783 } 7784 off2 := v_0.AuxInt 7785 sym2 := v_0.Aux 7786 base := v_0.Args[0] 7787 val := v.Args[1] 7788 mem := v.Args[2] 7789 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7790 break 7791 } 7792 v.reset(OpS390XFMOVSstore) 7793 v.AuxInt = off1 + off2 7794 v.Aux = mergeSym(sym1, sym2) 7795 v.AddArg(base) 7796 v.AddArg(val) 7797 v.AddArg(mem) 7798 return true 7799 } 7800 // match: (FMOVSstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7801 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7802 // result: (FMOVSstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7803 for { 7804 off1 := v.AuxInt 7805 sym1 := v.Aux 7806 v_0 := v.Args[0] 7807 if v_0.Op != OpS390XMOVDaddridx { 7808 break 7809 } 7810 off2 := v_0.AuxInt 7811 sym2 := v_0.Aux 7812 ptr := v_0.Args[0] 7813 idx := v_0.Args[1] 7814 val := v.Args[1] 7815 mem := v.Args[2] 7816 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7817 break 7818 } 7819 v.reset(OpS390XFMOVSstoreidx) 7820 v.AuxInt = off1 + off2 7821 v.Aux = mergeSym(sym1, sym2) 7822 v.AddArg(ptr) 7823 v.AddArg(idx) 7824 v.AddArg(val) 7825 v.AddArg(mem) 7826 return true 7827 } 7828 // match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem) 7829 // cond: ptr.Op != OpSB 7830 // result: (FMOVSstoreidx [off] {sym} ptr idx val mem) 7831 for { 7832 off := v.AuxInt 7833 sym := v.Aux 7834 v_0 := v.Args[0] 7835 if v_0.Op != OpS390XADD { 7836 break 7837 } 7838 ptr := v_0.Args[0] 7839 idx := v_0.Args[1] 7840 val := v.Args[1] 7841 mem := v.Args[2] 7842 if !(ptr.Op != OpSB) { 7843 break 7844 } 7845 v.reset(OpS390XFMOVSstoreidx) 7846 v.AuxInt = off 7847 v.Aux = sym 7848 v.AddArg(ptr) 7849 v.AddArg(idx) 7850 v.AddArg(val) 7851 v.AddArg(mem) 7852 return true 7853 } 7854 return false 7855 } 7856 func rewriteValueS390X_OpS390XFMOVSstoreidx(v *Value, config *Config) bool { 7857 b := v.Block 7858 _ = b 7859 // match: (FMOVSstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7860 // cond: 7861 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7862 for { 7863 c := v.AuxInt 7864 sym := v.Aux 7865 v_0 := v.Args[0] 7866 if v_0.Op != OpS390XADDconst { 7867 break 7868 } 7869 d := v_0.AuxInt 7870 ptr := v_0.Args[0] 7871 idx := v.Args[1] 7872 val := v.Args[2] 7873 mem := v.Args[3] 7874 v.reset(OpS390XFMOVSstoreidx) 7875 v.AuxInt = c + d 7876 v.Aux = sym 7877 v.AddArg(ptr) 7878 v.AddArg(idx) 7879 v.AddArg(val) 7880 v.AddArg(mem) 7881 return true 7882 } 7883 // match: (FMOVSstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7884 // cond: 7885 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7886 for { 7887 c := v.AuxInt 7888 sym := v.Aux 7889 ptr := v.Args[0] 7890 v_1 := v.Args[1] 7891 if v_1.Op != OpS390XADDconst { 7892 break 7893 } 7894 d := v_1.AuxInt 7895 idx := v_1.Args[0] 7896 val := v.Args[2] 7897 mem := v.Args[3] 7898 v.reset(OpS390XFMOVSstoreidx) 7899 v.AuxInt = c + d 7900 v.Aux = sym 7901 v.AddArg(ptr) 7902 v.AddArg(idx) 7903 v.AddArg(val) 7904 v.AddArg(mem) 7905 return true 7906 } 7907 return false 7908 } 7909 func rewriteValueS390X_OpS390XMOVBZload(v *Value, config *Config) bool { 7910 b := v.Block 7911 _ = b 7912 // match: (MOVBZload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) 7913 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 7914 // result: (MOVDreg x) 7915 for { 7916 off := v.AuxInt 7917 sym := v.Aux 7918 ptr := v.Args[0] 7919 v_1 := v.Args[1] 7920 if v_1.Op != OpS390XMOVBstore { 7921 break 7922 } 7923 off2 := v_1.AuxInt 7924 sym2 := v_1.Aux 7925 ptr2 := v_1.Args[0] 7926 x := v_1.Args[1] 7927 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 7928 break 7929 } 7930 v.reset(OpS390XMOVDreg) 7931 v.AddArg(x) 7932 return true 7933 } 7934 // match: (MOVBZload [off1] {sym} (ADDconst [off2] ptr) mem) 7935 // cond: is20Bit(off1+off2) 7936 // result: (MOVBZload [off1+off2] {sym} ptr mem) 7937 for { 7938 off1 := v.AuxInt 7939 sym := v.Aux 7940 v_0 := v.Args[0] 7941 if v_0.Op != OpS390XADDconst { 7942 break 7943 } 7944 off2 := v_0.AuxInt 7945 ptr := v_0.Args[0] 7946 mem := v.Args[1] 7947 if !(is20Bit(off1 + off2)) { 7948 break 7949 } 7950 v.reset(OpS390XMOVBZload) 7951 v.AuxInt = off1 + off2 7952 v.Aux = sym 7953 v.AddArg(ptr) 7954 v.AddArg(mem) 7955 return true 7956 } 7957 // match: (MOVBZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7958 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7959 // result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7960 for { 7961 off1 := v.AuxInt 7962 sym1 := v.Aux 7963 v_0 := v.Args[0] 7964 if v_0.Op != OpS390XMOVDaddr { 7965 break 7966 } 7967 off2 := v_0.AuxInt 7968 sym2 := v_0.Aux 7969 base := v_0.Args[0] 7970 mem := v.Args[1] 7971 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7972 break 7973 } 7974 v.reset(OpS390XMOVBZload) 7975 v.AuxInt = off1 + off2 7976 v.Aux = mergeSym(sym1, sym2) 7977 v.AddArg(base) 7978 v.AddArg(mem) 7979 return true 7980 } 7981 // match: (MOVBZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7982 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7983 // result: (MOVBZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7984 for { 7985 off1 := v.AuxInt 7986 sym1 := v.Aux 7987 v_0 := v.Args[0] 7988 if v_0.Op != OpS390XMOVDaddridx { 7989 break 7990 } 7991 off2 := v_0.AuxInt 7992 sym2 := v_0.Aux 7993 ptr := v_0.Args[0] 7994 idx := v_0.Args[1] 7995 mem := v.Args[1] 7996 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7997 break 7998 } 7999 v.reset(OpS390XMOVBZloadidx) 8000 v.AuxInt = off1 + off2 8001 v.Aux = mergeSym(sym1, sym2) 8002 v.AddArg(ptr) 8003 v.AddArg(idx) 8004 v.AddArg(mem) 8005 return true 8006 } 8007 // match: (MOVBZload [off] {sym} (ADD ptr idx) mem) 8008 // cond: ptr.Op != OpSB 8009 // result: (MOVBZloadidx [off] {sym} ptr idx mem) 8010 for { 8011 off := v.AuxInt 8012 sym := v.Aux 8013 v_0 := v.Args[0] 8014 if v_0.Op != OpS390XADD { 8015 break 8016 } 8017 ptr := v_0.Args[0] 8018 idx := v_0.Args[1] 8019 mem := v.Args[1] 8020 if !(ptr.Op != OpSB) { 8021 break 8022 } 8023 v.reset(OpS390XMOVBZloadidx) 8024 v.AuxInt = off 8025 v.Aux = sym 8026 v.AddArg(ptr) 8027 v.AddArg(idx) 8028 v.AddArg(mem) 8029 return true 8030 } 8031 return false 8032 } 8033 func rewriteValueS390X_OpS390XMOVBZloadidx(v *Value, config *Config) bool { 8034 b := v.Block 8035 _ = b 8036 // match: (MOVBZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 8037 // cond: 8038 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 8039 for { 8040 c := v.AuxInt 8041 sym := v.Aux 8042 v_0 := v.Args[0] 8043 if v_0.Op != OpS390XADDconst { 8044 break 8045 } 8046 d := v_0.AuxInt 8047 ptr := v_0.Args[0] 8048 idx := v.Args[1] 8049 mem := v.Args[2] 8050 v.reset(OpS390XMOVBZloadidx) 8051 v.AuxInt = c + d 8052 v.Aux = sym 8053 v.AddArg(ptr) 8054 v.AddArg(idx) 8055 v.AddArg(mem) 8056 return true 8057 } 8058 // match: (MOVBZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 8059 // cond: 8060 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 8061 for { 8062 c := v.AuxInt 8063 sym := v.Aux 8064 ptr := v.Args[0] 8065 v_1 := v.Args[1] 8066 if v_1.Op != OpS390XADDconst { 8067 break 8068 } 8069 d := v_1.AuxInt 8070 idx := v_1.Args[0] 8071 mem := v.Args[2] 8072 v.reset(OpS390XMOVBZloadidx) 8073 v.AuxInt = c + d 8074 v.Aux = sym 8075 v.AddArg(ptr) 8076 v.AddArg(idx) 8077 v.AddArg(mem) 8078 return true 8079 } 8080 return false 8081 } 8082 func rewriteValueS390X_OpS390XMOVBZreg(v *Value, config *Config) bool { 8083 b := v.Block 8084 _ = b 8085 // match: (MOVBZreg x:(MOVDLT (MOVDconst [c]) (MOVDconst [d]) _)) 8086 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8087 // result: (MOVDreg x) 8088 for { 8089 x := v.Args[0] 8090 if x.Op != OpS390XMOVDLT { 8091 break 8092 } 8093 x_0 := x.Args[0] 8094 if x_0.Op != OpS390XMOVDconst { 8095 break 8096 } 8097 c := x_0.AuxInt 8098 x_1 := x.Args[1] 8099 if x_1.Op != OpS390XMOVDconst { 8100 break 8101 } 8102 d := x_1.AuxInt 8103 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8104 break 8105 } 8106 v.reset(OpS390XMOVDreg) 8107 v.AddArg(x) 8108 return true 8109 } 8110 // match: (MOVBZreg x:(MOVDLE (MOVDconst [c]) (MOVDconst [d]) _)) 8111 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8112 // result: (MOVDreg x) 8113 for { 8114 x := v.Args[0] 8115 if x.Op != OpS390XMOVDLE { 8116 break 8117 } 8118 x_0 := x.Args[0] 8119 if x_0.Op != OpS390XMOVDconst { 8120 break 8121 } 8122 c := x_0.AuxInt 8123 x_1 := x.Args[1] 8124 if x_1.Op != OpS390XMOVDconst { 8125 break 8126 } 8127 d := x_1.AuxInt 8128 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8129 break 8130 } 8131 v.reset(OpS390XMOVDreg) 8132 v.AddArg(x) 8133 return true 8134 } 8135 // match: (MOVBZreg x:(MOVDGT (MOVDconst [c]) (MOVDconst [d]) _)) 8136 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8137 // result: (MOVDreg x) 8138 for { 8139 x := v.Args[0] 8140 if x.Op != OpS390XMOVDGT { 8141 break 8142 } 8143 x_0 := x.Args[0] 8144 if x_0.Op != OpS390XMOVDconst { 8145 break 8146 } 8147 c := x_0.AuxInt 8148 x_1 := x.Args[1] 8149 if x_1.Op != OpS390XMOVDconst { 8150 break 8151 } 8152 d := x_1.AuxInt 8153 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8154 break 8155 } 8156 v.reset(OpS390XMOVDreg) 8157 v.AddArg(x) 8158 return true 8159 } 8160 // match: (MOVBZreg x:(MOVDGE (MOVDconst [c]) (MOVDconst [d]) _)) 8161 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8162 // result: (MOVDreg x) 8163 for { 8164 x := v.Args[0] 8165 if x.Op != OpS390XMOVDGE { 8166 break 8167 } 8168 x_0 := x.Args[0] 8169 if x_0.Op != OpS390XMOVDconst { 8170 break 8171 } 8172 c := x_0.AuxInt 8173 x_1 := x.Args[1] 8174 if x_1.Op != OpS390XMOVDconst { 8175 break 8176 } 8177 d := x_1.AuxInt 8178 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8179 break 8180 } 8181 v.reset(OpS390XMOVDreg) 8182 v.AddArg(x) 8183 return true 8184 } 8185 // match: (MOVBZreg x:(MOVDEQ (MOVDconst [c]) (MOVDconst [d]) _)) 8186 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8187 // result: (MOVDreg x) 8188 for { 8189 x := v.Args[0] 8190 if x.Op != OpS390XMOVDEQ { 8191 break 8192 } 8193 x_0 := x.Args[0] 8194 if x_0.Op != OpS390XMOVDconst { 8195 break 8196 } 8197 c := x_0.AuxInt 8198 x_1 := x.Args[1] 8199 if x_1.Op != OpS390XMOVDconst { 8200 break 8201 } 8202 d := x_1.AuxInt 8203 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8204 break 8205 } 8206 v.reset(OpS390XMOVDreg) 8207 v.AddArg(x) 8208 return true 8209 } 8210 // match: (MOVBZreg x:(MOVDNE (MOVDconst [c]) (MOVDconst [d]) _)) 8211 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8212 // result: (MOVDreg x) 8213 for { 8214 x := v.Args[0] 8215 if x.Op != OpS390XMOVDNE { 8216 break 8217 } 8218 x_0 := x.Args[0] 8219 if x_0.Op != OpS390XMOVDconst { 8220 break 8221 } 8222 c := x_0.AuxInt 8223 x_1 := x.Args[1] 8224 if x_1.Op != OpS390XMOVDconst { 8225 break 8226 } 8227 d := x_1.AuxInt 8228 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8229 break 8230 } 8231 v.reset(OpS390XMOVDreg) 8232 v.AddArg(x) 8233 return true 8234 } 8235 // match: (MOVBZreg x:(MOVDGTnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8236 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8237 // result: (MOVDreg x) 8238 for { 8239 x := v.Args[0] 8240 if x.Op != OpS390XMOVDGTnoinv { 8241 break 8242 } 8243 x_0 := x.Args[0] 8244 if x_0.Op != OpS390XMOVDconst { 8245 break 8246 } 8247 c := x_0.AuxInt 8248 x_1 := x.Args[1] 8249 if x_1.Op != OpS390XMOVDconst { 8250 break 8251 } 8252 d := x_1.AuxInt 8253 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8254 break 8255 } 8256 v.reset(OpS390XMOVDreg) 8257 v.AddArg(x) 8258 return true 8259 } 8260 // match: (MOVBZreg x:(MOVDGEnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8261 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8262 // result: (MOVDreg x) 8263 for { 8264 x := v.Args[0] 8265 if x.Op != OpS390XMOVDGEnoinv { 8266 break 8267 } 8268 x_0 := x.Args[0] 8269 if x_0.Op != OpS390XMOVDconst { 8270 break 8271 } 8272 c := x_0.AuxInt 8273 x_1 := x.Args[1] 8274 if x_1.Op != OpS390XMOVDconst { 8275 break 8276 } 8277 d := x_1.AuxInt 8278 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8279 break 8280 } 8281 v.reset(OpS390XMOVDreg) 8282 v.AddArg(x) 8283 return true 8284 } 8285 // match: (MOVBZreg x:(MOVBZload _ _)) 8286 // cond: 8287 // result: (MOVDreg x) 8288 for { 8289 x := v.Args[0] 8290 if x.Op != OpS390XMOVBZload { 8291 break 8292 } 8293 v.reset(OpS390XMOVDreg) 8294 v.AddArg(x) 8295 return true 8296 } 8297 // match: (MOVBZreg x:(Arg <t>)) 8298 // cond: is8BitInt(t) && !isSigned(t) 8299 // result: (MOVDreg x) 8300 for { 8301 x := v.Args[0] 8302 if x.Op != OpArg { 8303 break 8304 } 8305 t := x.Type 8306 if !(is8BitInt(t) && !isSigned(t)) { 8307 break 8308 } 8309 v.reset(OpS390XMOVDreg) 8310 v.AddArg(x) 8311 return true 8312 } 8313 // match: (MOVBZreg x:(MOVBZreg _)) 8314 // cond: 8315 // result: (MOVDreg x) 8316 for { 8317 x := v.Args[0] 8318 if x.Op != OpS390XMOVBZreg { 8319 break 8320 } 8321 v.reset(OpS390XMOVDreg) 8322 v.AddArg(x) 8323 return true 8324 } 8325 // match: (MOVBZreg (MOVDconst [c])) 8326 // cond: 8327 // result: (MOVDconst [int64(uint8(c))]) 8328 for { 8329 v_0 := v.Args[0] 8330 if v_0.Op != OpS390XMOVDconst { 8331 break 8332 } 8333 c := v_0.AuxInt 8334 v.reset(OpS390XMOVDconst) 8335 v.AuxInt = int64(uint8(c)) 8336 return true 8337 } 8338 // match: (MOVBZreg x:(MOVBZload [off] {sym} ptr mem)) 8339 // cond: x.Uses == 1 && clobber(x) 8340 // result: @x.Block (MOVBZload <v.Type> [off] {sym} ptr mem) 8341 for { 8342 x := v.Args[0] 8343 if x.Op != OpS390XMOVBZload { 8344 break 8345 } 8346 off := x.AuxInt 8347 sym := x.Aux 8348 ptr := x.Args[0] 8349 mem := x.Args[1] 8350 if !(x.Uses == 1 && clobber(x)) { 8351 break 8352 } 8353 b = x.Block 8354 v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, v.Type) 8355 v.reset(OpCopy) 8356 v.AddArg(v0) 8357 v0.AuxInt = off 8358 v0.Aux = sym 8359 v0.AddArg(ptr) 8360 v0.AddArg(mem) 8361 return true 8362 } 8363 // match: (MOVBZreg x:(MOVBZloadidx [off] {sym} ptr idx mem)) 8364 // cond: x.Uses == 1 && clobber(x) 8365 // result: @x.Block (MOVBZloadidx <v.Type> [off] {sym} ptr idx mem) 8366 for { 8367 x := v.Args[0] 8368 if x.Op != OpS390XMOVBZloadidx { 8369 break 8370 } 8371 off := x.AuxInt 8372 sym := x.Aux 8373 ptr := x.Args[0] 8374 idx := x.Args[1] 8375 mem := x.Args[2] 8376 if !(x.Uses == 1 && clobber(x)) { 8377 break 8378 } 8379 b = x.Block 8380 v0 := b.NewValue0(v.Pos, OpS390XMOVBZloadidx, v.Type) 8381 v.reset(OpCopy) 8382 v.AddArg(v0) 8383 v0.AuxInt = off 8384 v0.Aux = sym 8385 v0.AddArg(ptr) 8386 v0.AddArg(idx) 8387 v0.AddArg(mem) 8388 return true 8389 } 8390 return false 8391 } 8392 func rewriteValueS390X_OpS390XMOVBload(v *Value, config *Config) bool { 8393 b := v.Block 8394 _ = b 8395 // match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) 8396 // cond: is20Bit(off1+off2) 8397 // result: (MOVBload [off1+off2] {sym} ptr mem) 8398 for { 8399 off1 := v.AuxInt 8400 sym := v.Aux 8401 v_0 := v.Args[0] 8402 if v_0.Op != OpS390XADDconst { 8403 break 8404 } 8405 off2 := v_0.AuxInt 8406 ptr := v_0.Args[0] 8407 mem := v.Args[1] 8408 if !(is20Bit(off1 + off2)) { 8409 break 8410 } 8411 v.reset(OpS390XMOVBload) 8412 v.AuxInt = off1 + off2 8413 v.Aux = sym 8414 v.AddArg(ptr) 8415 v.AddArg(mem) 8416 return true 8417 } 8418 // match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 8419 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8420 // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem) 8421 for { 8422 off1 := v.AuxInt 8423 sym1 := v.Aux 8424 v_0 := v.Args[0] 8425 if v_0.Op != OpS390XMOVDaddr { 8426 break 8427 } 8428 off2 := v_0.AuxInt 8429 sym2 := v_0.Aux 8430 base := v_0.Args[0] 8431 mem := v.Args[1] 8432 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8433 break 8434 } 8435 v.reset(OpS390XMOVBload) 8436 v.AuxInt = off1 + off2 8437 v.Aux = mergeSym(sym1, sym2) 8438 v.AddArg(base) 8439 v.AddArg(mem) 8440 return true 8441 } 8442 return false 8443 } 8444 func rewriteValueS390X_OpS390XMOVBreg(v *Value, config *Config) bool { 8445 b := v.Block 8446 _ = b 8447 // match: (MOVBreg x:(MOVBload _ _)) 8448 // cond: 8449 // result: (MOVDreg x) 8450 for { 8451 x := v.Args[0] 8452 if x.Op != OpS390XMOVBload { 8453 break 8454 } 8455 v.reset(OpS390XMOVDreg) 8456 v.AddArg(x) 8457 return true 8458 } 8459 // match: (MOVBreg x:(Arg <t>)) 8460 // cond: is8BitInt(t) && isSigned(t) 8461 // result: (MOVDreg x) 8462 for { 8463 x := v.Args[0] 8464 if x.Op != OpArg { 8465 break 8466 } 8467 t := x.Type 8468 if !(is8BitInt(t) && isSigned(t)) { 8469 break 8470 } 8471 v.reset(OpS390XMOVDreg) 8472 v.AddArg(x) 8473 return true 8474 } 8475 // match: (MOVBreg x:(MOVBreg _)) 8476 // cond: 8477 // result: (MOVDreg x) 8478 for { 8479 x := v.Args[0] 8480 if x.Op != OpS390XMOVBreg { 8481 break 8482 } 8483 v.reset(OpS390XMOVDreg) 8484 v.AddArg(x) 8485 return true 8486 } 8487 // match: (MOVBreg (MOVDconst [c])) 8488 // cond: 8489 // result: (MOVDconst [int64(int8(c))]) 8490 for { 8491 v_0 := v.Args[0] 8492 if v_0.Op != OpS390XMOVDconst { 8493 break 8494 } 8495 c := v_0.AuxInt 8496 v.reset(OpS390XMOVDconst) 8497 v.AuxInt = int64(int8(c)) 8498 return true 8499 } 8500 // match: (MOVBreg x:(MOVBZload [off] {sym} ptr mem)) 8501 // cond: x.Uses == 1 && clobber(x) 8502 // result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem) 8503 for { 8504 x := v.Args[0] 8505 if x.Op != OpS390XMOVBZload { 8506 break 8507 } 8508 off := x.AuxInt 8509 sym := x.Aux 8510 ptr := x.Args[0] 8511 mem := x.Args[1] 8512 if !(x.Uses == 1 && clobber(x)) { 8513 break 8514 } 8515 b = x.Block 8516 v0 := b.NewValue0(v.Pos, OpS390XMOVBload, v.Type) 8517 v.reset(OpCopy) 8518 v.AddArg(v0) 8519 v0.AuxInt = off 8520 v0.Aux = sym 8521 v0.AddArg(ptr) 8522 v0.AddArg(mem) 8523 return true 8524 } 8525 return false 8526 } 8527 func rewriteValueS390X_OpS390XMOVBstore(v *Value, config *Config) bool { 8528 b := v.Block 8529 _ = b 8530 // match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem) 8531 // cond: 8532 // result: (MOVBstore [off] {sym} ptr x mem) 8533 for { 8534 off := v.AuxInt 8535 sym := v.Aux 8536 ptr := v.Args[0] 8537 v_1 := v.Args[1] 8538 if v_1.Op != OpS390XMOVBreg { 8539 break 8540 } 8541 x := v_1.Args[0] 8542 mem := v.Args[2] 8543 v.reset(OpS390XMOVBstore) 8544 v.AuxInt = off 8545 v.Aux = sym 8546 v.AddArg(ptr) 8547 v.AddArg(x) 8548 v.AddArg(mem) 8549 return true 8550 } 8551 // match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem) 8552 // cond: 8553 // result: (MOVBstore [off] {sym} ptr x mem) 8554 for { 8555 off := v.AuxInt 8556 sym := v.Aux 8557 ptr := v.Args[0] 8558 v_1 := v.Args[1] 8559 if v_1.Op != OpS390XMOVBZreg { 8560 break 8561 } 8562 x := v_1.Args[0] 8563 mem := v.Args[2] 8564 v.reset(OpS390XMOVBstore) 8565 v.AuxInt = off 8566 v.Aux = sym 8567 v.AddArg(ptr) 8568 v.AddArg(x) 8569 v.AddArg(mem) 8570 return true 8571 } 8572 // match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) 8573 // cond: is20Bit(off1+off2) 8574 // result: (MOVBstore [off1+off2] {sym} ptr val mem) 8575 for { 8576 off1 := v.AuxInt 8577 sym := v.Aux 8578 v_0 := v.Args[0] 8579 if v_0.Op != OpS390XADDconst { 8580 break 8581 } 8582 off2 := v_0.AuxInt 8583 ptr := v_0.Args[0] 8584 val := v.Args[1] 8585 mem := v.Args[2] 8586 if !(is20Bit(off1 + off2)) { 8587 break 8588 } 8589 v.reset(OpS390XMOVBstore) 8590 v.AuxInt = off1 + off2 8591 v.Aux = sym 8592 v.AddArg(ptr) 8593 v.AddArg(val) 8594 v.AddArg(mem) 8595 return true 8596 } 8597 // match: (MOVBstore [off] {sym} ptr (MOVDconst [c]) mem) 8598 // cond: validOff(off) && ptr.Op != OpSB 8599 // result: (MOVBstoreconst [makeValAndOff(int64(int8(c)),off)] {sym} ptr mem) 8600 for { 8601 off := v.AuxInt 8602 sym := v.Aux 8603 ptr := v.Args[0] 8604 v_1 := v.Args[1] 8605 if v_1.Op != OpS390XMOVDconst { 8606 break 8607 } 8608 c := v_1.AuxInt 8609 mem := v.Args[2] 8610 if !(validOff(off) && ptr.Op != OpSB) { 8611 break 8612 } 8613 v.reset(OpS390XMOVBstoreconst) 8614 v.AuxInt = makeValAndOff(int64(int8(c)), off) 8615 v.Aux = sym 8616 v.AddArg(ptr) 8617 v.AddArg(mem) 8618 return true 8619 } 8620 // match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 8621 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8622 // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 8623 for { 8624 off1 := v.AuxInt 8625 sym1 := v.Aux 8626 v_0 := v.Args[0] 8627 if v_0.Op != OpS390XMOVDaddr { 8628 break 8629 } 8630 off2 := v_0.AuxInt 8631 sym2 := v_0.Aux 8632 base := v_0.Args[0] 8633 val := v.Args[1] 8634 mem := v.Args[2] 8635 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8636 break 8637 } 8638 v.reset(OpS390XMOVBstore) 8639 v.AuxInt = off1 + off2 8640 v.Aux = mergeSym(sym1, sym2) 8641 v.AddArg(base) 8642 v.AddArg(val) 8643 v.AddArg(mem) 8644 return true 8645 } 8646 // match: (MOVBstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 8647 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8648 // result: (MOVBstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 8649 for { 8650 off1 := v.AuxInt 8651 sym1 := v.Aux 8652 v_0 := v.Args[0] 8653 if v_0.Op != OpS390XMOVDaddridx { 8654 break 8655 } 8656 off2 := v_0.AuxInt 8657 sym2 := v_0.Aux 8658 ptr := v_0.Args[0] 8659 idx := v_0.Args[1] 8660 val := v.Args[1] 8661 mem := v.Args[2] 8662 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8663 break 8664 } 8665 v.reset(OpS390XMOVBstoreidx) 8666 v.AuxInt = off1 + off2 8667 v.Aux = mergeSym(sym1, sym2) 8668 v.AddArg(ptr) 8669 v.AddArg(idx) 8670 v.AddArg(val) 8671 v.AddArg(mem) 8672 return true 8673 } 8674 // match: (MOVBstore [off] {sym} (ADD ptr idx) val mem) 8675 // cond: ptr.Op != OpSB 8676 // result: (MOVBstoreidx [off] {sym} ptr idx val mem) 8677 for { 8678 off := v.AuxInt 8679 sym := v.Aux 8680 v_0 := v.Args[0] 8681 if v_0.Op != OpS390XADD { 8682 break 8683 } 8684 ptr := v_0.Args[0] 8685 idx := v_0.Args[1] 8686 val := v.Args[1] 8687 mem := v.Args[2] 8688 if !(ptr.Op != OpSB) { 8689 break 8690 } 8691 v.reset(OpS390XMOVBstoreidx) 8692 v.AuxInt = off 8693 v.Aux = sym 8694 v.AddArg(ptr) 8695 v.AddArg(idx) 8696 v.AddArg(val) 8697 v.AddArg(mem) 8698 return true 8699 } 8700 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRDconst [8] w) mem)) 8701 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8702 // result: (MOVHstore [i-1] {s} p w mem) 8703 for { 8704 i := v.AuxInt 8705 s := v.Aux 8706 p := v.Args[0] 8707 w := v.Args[1] 8708 x := v.Args[2] 8709 if x.Op != OpS390XMOVBstore { 8710 break 8711 } 8712 if x.AuxInt != i-1 { 8713 break 8714 } 8715 if x.Aux != s { 8716 break 8717 } 8718 if p != x.Args[0] { 8719 break 8720 } 8721 x_1 := x.Args[1] 8722 if x_1.Op != OpS390XSRDconst { 8723 break 8724 } 8725 if x_1.AuxInt != 8 { 8726 break 8727 } 8728 if w != x_1.Args[0] { 8729 break 8730 } 8731 mem := x.Args[2] 8732 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8733 break 8734 } 8735 v.reset(OpS390XMOVHstore) 8736 v.AuxInt = i - 1 8737 v.Aux = s 8738 v.AddArg(p) 8739 v.AddArg(w) 8740 v.AddArg(mem) 8741 return true 8742 } 8743 // match: (MOVBstore [i] {s} p w0:(SRDconst [j] w) x:(MOVBstore [i-1] {s} p (SRDconst [j+8] w) mem)) 8744 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8745 // result: (MOVHstore [i-1] {s} p w0 mem) 8746 for { 8747 i := v.AuxInt 8748 s := v.Aux 8749 p := v.Args[0] 8750 w0 := v.Args[1] 8751 if w0.Op != OpS390XSRDconst { 8752 break 8753 } 8754 j := w0.AuxInt 8755 w := w0.Args[0] 8756 x := v.Args[2] 8757 if x.Op != OpS390XMOVBstore { 8758 break 8759 } 8760 if x.AuxInt != i-1 { 8761 break 8762 } 8763 if x.Aux != s { 8764 break 8765 } 8766 if p != x.Args[0] { 8767 break 8768 } 8769 x_1 := x.Args[1] 8770 if x_1.Op != OpS390XSRDconst { 8771 break 8772 } 8773 if x_1.AuxInt != j+8 { 8774 break 8775 } 8776 if w != x_1.Args[0] { 8777 break 8778 } 8779 mem := x.Args[2] 8780 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8781 break 8782 } 8783 v.reset(OpS390XMOVHstore) 8784 v.AuxInt = i - 1 8785 v.Aux = s 8786 v.AddArg(p) 8787 v.AddArg(w0) 8788 v.AddArg(mem) 8789 return true 8790 } 8791 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRWconst [8] w) mem)) 8792 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8793 // result: (MOVHstore [i-1] {s} p w mem) 8794 for { 8795 i := v.AuxInt 8796 s := v.Aux 8797 p := v.Args[0] 8798 w := v.Args[1] 8799 x := v.Args[2] 8800 if x.Op != OpS390XMOVBstore { 8801 break 8802 } 8803 if x.AuxInt != i-1 { 8804 break 8805 } 8806 if x.Aux != s { 8807 break 8808 } 8809 if p != x.Args[0] { 8810 break 8811 } 8812 x_1 := x.Args[1] 8813 if x_1.Op != OpS390XSRWconst { 8814 break 8815 } 8816 if x_1.AuxInt != 8 { 8817 break 8818 } 8819 if w != x_1.Args[0] { 8820 break 8821 } 8822 mem := x.Args[2] 8823 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8824 break 8825 } 8826 v.reset(OpS390XMOVHstore) 8827 v.AuxInt = i - 1 8828 v.Aux = s 8829 v.AddArg(p) 8830 v.AddArg(w) 8831 v.AddArg(mem) 8832 return true 8833 } 8834 // match: (MOVBstore [i] {s} p w0:(SRWconst [j] w) x:(MOVBstore [i-1] {s} p (SRWconst [j+8] w) mem)) 8835 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8836 // result: (MOVHstore [i-1] {s} p w0 mem) 8837 for { 8838 i := v.AuxInt 8839 s := v.Aux 8840 p := v.Args[0] 8841 w0 := v.Args[1] 8842 if w0.Op != OpS390XSRWconst { 8843 break 8844 } 8845 j := w0.AuxInt 8846 w := w0.Args[0] 8847 x := v.Args[2] 8848 if x.Op != OpS390XMOVBstore { 8849 break 8850 } 8851 if x.AuxInt != i-1 { 8852 break 8853 } 8854 if x.Aux != s { 8855 break 8856 } 8857 if p != x.Args[0] { 8858 break 8859 } 8860 x_1 := x.Args[1] 8861 if x_1.Op != OpS390XSRWconst { 8862 break 8863 } 8864 if x_1.AuxInt != j+8 { 8865 break 8866 } 8867 if w != x_1.Args[0] { 8868 break 8869 } 8870 mem := x.Args[2] 8871 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8872 break 8873 } 8874 v.reset(OpS390XMOVHstore) 8875 v.AuxInt = i - 1 8876 v.Aux = s 8877 v.AddArg(p) 8878 v.AddArg(w0) 8879 v.AddArg(mem) 8880 return true 8881 } 8882 // match: (MOVBstore [i] {s} p (SRDconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8883 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8884 // result: (MOVHBRstore [i-1] {s} p w mem) 8885 for { 8886 i := v.AuxInt 8887 s := v.Aux 8888 p := v.Args[0] 8889 v_1 := v.Args[1] 8890 if v_1.Op != OpS390XSRDconst { 8891 break 8892 } 8893 if v_1.AuxInt != 8 { 8894 break 8895 } 8896 w := v_1.Args[0] 8897 x := v.Args[2] 8898 if x.Op != OpS390XMOVBstore { 8899 break 8900 } 8901 if x.AuxInt != i-1 { 8902 break 8903 } 8904 if x.Aux != s { 8905 break 8906 } 8907 if p != x.Args[0] { 8908 break 8909 } 8910 if w != x.Args[1] { 8911 break 8912 } 8913 mem := x.Args[2] 8914 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8915 break 8916 } 8917 v.reset(OpS390XMOVHBRstore) 8918 v.AuxInt = i - 1 8919 v.Aux = s 8920 v.AddArg(p) 8921 v.AddArg(w) 8922 v.AddArg(mem) 8923 return true 8924 } 8925 // match: (MOVBstore [i] {s} p (SRDconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRDconst [j-8] w) mem)) 8926 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8927 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8928 for { 8929 i := v.AuxInt 8930 s := v.Aux 8931 p := v.Args[0] 8932 v_1 := v.Args[1] 8933 if v_1.Op != OpS390XSRDconst { 8934 break 8935 } 8936 j := v_1.AuxInt 8937 w := v_1.Args[0] 8938 x := v.Args[2] 8939 if x.Op != OpS390XMOVBstore { 8940 break 8941 } 8942 if x.AuxInt != i-1 { 8943 break 8944 } 8945 if x.Aux != s { 8946 break 8947 } 8948 if p != x.Args[0] { 8949 break 8950 } 8951 w0 := x.Args[1] 8952 if w0.Op != OpS390XSRDconst { 8953 break 8954 } 8955 if w0.AuxInt != j-8 { 8956 break 8957 } 8958 if w != w0.Args[0] { 8959 break 8960 } 8961 mem := x.Args[2] 8962 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8963 break 8964 } 8965 v.reset(OpS390XMOVHBRstore) 8966 v.AuxInt = i - 1 8967 v.Aux = s 8968 v.AddArg(p) 8969 v.AddArg(w0) 8970 v.AddArg(mem) 8971 return true 8972 } 8973 // match: (MOVBstore [i] {s} p (SRWconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8974 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8975 // result: (MOVHBRstore [i-1] {s} p w mem) 8976 for { 8977 i := v.AuxInt 8978 s := v.Aux 8979 p := v.Args[0] 8980 v_1 := v.Args[1] 8981 if v_1.Op != OpS390XSRWconst { 8982 break 8983 } 8984 if v_1.AuxInt != 8 { 8985 break 8986 } 8987 w := v_1.Args[0] 8988 x := v.Args[2] 8989 if x.Op != OpS390XMOVBstore { 8990 break 8991 } 8992 if x.AuxInt != i-1 { 8993 break 8994 } 8995 if x.Aux != s { 8996 break 8997 } 8998 if p != x.Args[0] { 8999 break 9000 } 9001 if w != x.Args[1] { 9002 break 9003 } 9004 mem := x.Args[2] 9005 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 9006 break 9007 } 9008 v.reset(OpS390XMOVHBRstore) 9009 v.AuxInt = i - 1 9010 v.Aux = s 9011 v.AddArg(p) 9012 v.AddArg(w) 9013 v.AddArg(mem) 9014 return true 9015 } 9016 // match: (MOVBstore [i] {s} p (SRWconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRWconst [j-8] w) mem)) 9017 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 9018 // result: (MOVHBRstore [i-1] {s} p w0 mem) 9019 for { 9020 i := v.AuxInt 9021 s := v.Aux 9022 p := v.Args[0] 9023 v_1 := v.Args[1] 9024 if v_1.Op != OpS390XSRWconst { 9025 break 9026 } 9027 j := v_1.AuxInt 9028 w := v_1.Args[0] 9029 x := v.Args[2] 9030 if x.Op != OpS390XMOVBstore { 9031 break 9032 } 9033 if x.AuxInt != i-1 { 9034 break 9035 } 9036 if x.Aux != s { 9037 break 9038 } 9039 if p != x.Args[0] { 9040 break 9041 } 9042 w0 := x.Args[1] 9043 if w0.Op != OpS390XSRWconst { 9044 break 9045 } 9046 if w0.AuxInt != j-8 { 9047 break 9048 } 9049 if w != w0.Args[0] { 9050 break 9051 } 9052 mem := x.Args[2] 9053 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 9054 break 9055 } 9056 v.reset(OpS390XMOVHBRstore) 9057 v.AuxInt = i - 1 9058 v.Aux = s 9059 v.AddArg(p) 9060 v.AddArg(w0) 9061 v.AddArg(mem) 9062 return true 9063 } 9064 return false 9065 } 9066 func rewriteValueS390X_OpS390XMOVBstoreconst(v *Value, config *Config) bool { 9067 b := v.Block 9068 _ = b 9069 // match: (MOVBstoreconst [sc] {s} (ADDconst [off] ptr) mem) 9070 // cond: ValAndOff(sc).canAdd(off) 9071 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 9072 for { 9073 sc := v.AuxInt 9074 s := v.Aux 9075 v_0 := v.Args[0] 9076 if v_0.Op != OpS390XADDconst { 9077 break 9078 } 9079 off := v_0.AuxInt 9080 ptr := v_0.Args[0] 9081 mem := v.Args[1] 9082 if !(ValAndOff(sc).canAdd(off)) { 9083 break 9084 } 9085 v.reset(OpS390XMOVBstoreconst) 9086 v.AuxInt = ValAndOff(sc).add(off) 9087 v.Aux = s 9088 v.AddArg(ptr) 9089 v.AddArg(mem) 9090 return true 9091 } 9092 // match: (MOVBstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 9093 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 9094 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 9095 for { 9096 sc := v.AuxInt 9097 sym1 := v.Aux 9098 v_0 := v.Args[0] 9099 if v_0.Op != OpS390XMOVDaddr { 9100 break 9101 } 9102 off := v_0.AuxInt 9103 sym2 := v_0.Aux 9104 ptr := v_0.Args[0] 9105 mem := v.Args[1] 9106 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 9107 break 9108 } 9109 v.reset(OpS390XMOVBstoreconst) 9110 v.AuxInt = ValAndOff(sc).add(off) 9111 v.Aux = mergeSym(sym1, sym2) 9112 v.AddArg(ptr) 9113 v.AddArg(mem) 9114 return true 9115 } 9116 // match: (MOVBstoreconst [c] {s} p x:(MOVBstoreconst [a] {s} p mem)) 9117 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 1 == ValAndOff(c).Off() && clobber(x) 9118 // result: (MOVHstoreconst [makeValAndOff(ValAndOff(c).Val()&0xff | ValAndOff(a).Val()<<8, ValAndOff(a).Off())] {s} p mem) 9119 for { 9120 c := v.AuxInt 9121 s := v.Aux 9122 p := v.Args[0] 9123 x := v.Args[1] 9124 if x.Op != OpS390XMOVBstoreconst { 9125 break 9126 } 9127 a := x.AuxInt 9128 if x.Aux != s { 9129 break 9130 } 9131 if p != x.Args[0] { 9132 break 9133 } 9134 mem := x.Args[1] 9135 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) { 9136 break 9137 } 9138 v.reset(OpS390XMOVHstoreconst) 9139 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xff|ValAndOff(a).Val()<<8, ValAndOff(a).Off()) 9140 v.Aux = s 9141 v.AddArg(p) 9142 v.AddArg(mem) 9143 return true 9144 } 9145 return false 9146 } 9147 func rewriteValueS390X_OpS390XMOVBstoreidx(v *Value, config *Config) bool { 9148 b := v.Block 9149 _ = b 9150 // match: (MOVBstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 9151 // cond: 9152 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9153 for { 9154 c := v.AuxInt 9155 sym := v.Aux 9156 v_0 := v.Args[0] 9157 if v_0.Op != OpS390XADDconst { 9158 break 9159 } 9160 d := v_0.AuxInt 9161 ptr := v_0.Args[0] 9162 idx := v.Args[1] 9163 val := v.Args[2] 9164 mem := v.Args[3] 9165 v.reset(OpS390XMOVBstoreidx) 9166 v.AuxInt = c + d 9167 v.Aux = sym 9168 v.AddArg(ptr) 9169 v.AddArg(idx) 9170 v.AddArg(val) 9171 v.AddArg(mem) 9172 return true 9173 } 9174 // match: (MOVBstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 9175 // cond: 9176 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9177 for { 9178 c := v.AuxInt 9179 sym := v.Aux 9180 ptr := v.Args[0] 9181 v_1 := v.Args[1] 9182 if v_1.Op != OpS390XADDconst { 9183 break 9184 } 9185 d := v_1.AuxInt 9186 idx := v_1.Args[0] 9187 val := v.Args[2] 9188 mem := v.Args[3] 9189 v.reset(OpS390XMOVBstoreidx) 9190 v.AuxInt = c + d 9191 v.Aux = sym 9192 v.AddArg(ptr) 9193 v.AddArg(idx) 9194 v.AddArg(val) 9195 v.AddArg(mem) 9196 return true 9197 } 9198 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [8] w) mem)) 9199 // cond: x.Uses == 1 && clobber(x) 9200 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9201 for { 9202 i := v.AuxInt 9203 s := v.Aux 9204 p := v.Args[0] 9205 idx := v.Args[1] 9206 w := v.Args[2] 9207 x := v.Args[3] 9208 if x.Op != OpS390XMOVBstoreidx { 9209 break 9210 } 9211 if x.AuxInt != i-1 { 9212 break 9213 } 9214 if x.Aux != s { 9215 break 9216 } 9217 if p != x.Args[0] { 9218 break 9219 } 9220 if idx != x.Args[1] { 9221 break 9222 } 9223 x_2 := x.Args[2] 9224 if x_2.Op != OpS390XSRDconst { 9225 break 9226 } 9227 if x_2.AuxInt != 8 { 9228 break 9229 } 9230 if w != x_2.Args[0] { 9231 break 9232 } 9233 mem := x.Args[3] 9234 if !(x.Uses == 1 && clobber(x)) { 9235 break 9236 } 9237 v.reset(OpS390XMOVHstoreidx) 9238 v.AuxInt = i - 1 9239 v.Aux = s 9240 v.AddArg(p) 9241 v.AddArg(idx) 9242 v.AddArg(w) 9243 v.AddArg(mem) 9244 return true 9245 } 9246 // match: (MOVBstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [j+8] w) mem)) 9247 // cond: x.Uses == 1 && clobber(x) 9248 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9249 for { 9250 i := v.AuxInt 9251 s := v.Aux 9252 p := v.Args[0] 9253 idx := v.Args[1] 9254 w0 := v.Args[2] 9255 if w0.Op != OpS390XSRDconst { 9256 break 9257 } 9258 j := w0.AuxInt 9259 w := w0.Args[0] 9260 x := v.Args[3] 9261 if x.Op != OpS390XMOVBstoreidx { 9262 break 9263 } 9264 if x.AuxInt != i-1 { 9265 break 9266 } 9267 if x.Aux != s { 9268 break 9269 } 9270 if p != x.Args[0] { 9271 break 9272 } 9273 if idx != x.Args[1] { 9274 break 9275 } 9276 x_2 := x.Args[2] 9277 if x_2.Op != OpS390XSRDconst { 9278 break 9279 } 9280 if x_2.AuxInt != j+8 { 9281 break 9282 } 9283 if w != x_2.Args[0] { 9284 break 9285 } 9286 mem := x.Args[3] 9287 if !(x.Uses == 1 && clobber(x)) { 9288 break 9289 } 9290 v.reset(OpS390XMOVHstoreidx) 9291 v.AuxInt = i - 1 9292 v.Aux = s 9293 v.AddArg(p) 9294 v.AddArg(idx) 9295 v.AddArg(w0) 9296 v.AddArg(mem) 9297 return true 9298 } 9299 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [8] w) mem)) 9300 // cond: x.Uses == 1 && clobber(x) 9301 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9302 for { 9303 i := v.AuxInt 9304 s := v.Aux 9305 p := v.Args[0] 9306 idx := v.Args[1] 9307 w := v.Args[2] 9308 x := v.Args[3] 9309 if x.Op != OpS390XMOVBstoreidx { 9310 break 9311 } 9312 if x.AuxInt != i-1 { 9313 break 9314 } 9315 if x.Aux != s { 9316 break 9317 } 9318 if p != x.Args[0] { 9319 break 9320 } 9321 if idx != x.Args[1] { 9322 break 9323 } 9324 x_2 := x.Args[2] 9325 if x_2.Op != OpS390XSRWconst { 9326 break 9327 } 9328 if x_2.AuxInt != 8 { 9329 break 9330 } 9331 if w != x_2.Args[0] { 9332 break 9333 } 9334 mem := x.Args[3] 9335 if !(x.Uses == 1 && clobber(x)) { 9336 break 9337 } 9338 v.reset(OpS390XMOVHstoreidx) 9339 v.AuxInt = i - 1 9340 v.Aux = s 9341 v.AddArg(p) 9342 v.AddArg(idx) 9343 v.AddArg(w) 9344 v.AddArg(mem) 9345 return true 9346 } 9347 // match: (MOVBstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [j+8] w) mem)) 9348 // cond: x.Uses == 1 && clobber(x) 9349 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9350 for { 9351 i := v.AuxInt 9352 s := v.Aux 9353 p := v.Args[0] 9354 idx := v.Args[1] 9355 w0 := v.Args[2] 9356 if w0.Op != OpS390XSRWconst { 9357 break 9358 } 9359 j := w0.AuxInt 9360 w := w0.Args[0] 9361 x := v.Args[3] 9362 if x.Op != OpS390XMOVBstoreidx { 9363 break 9364 } 9365 if x.AuxInt != i-1 { 9366 break 9367 } 9368 if x.Aux != s { 9369 break 9370 } 9371 if p != x.Args[0] { 9372 break 9373 } 9374 if idx != x.Args[1] { 9375 break 9376 } 9377 x_2 := x.Args[2] 9378 if x_2.Op != OpS390XSRWconst { 9379 break 9380 } 9381 if x_2.AuxInt != j+8 { 9382 break 9383 } 9384 if w != x_2.Args[0] { 9385 break 9386 } 9387 mem := x.Args[3] 9388 if !(x.Uses == 1 && clobber(x)) { 9389 break 9390 } 9391 v.reset(OpS390XMOVHstoreidx) 9392 v.AuxInt = i - 1 9393 v.Aux = s 9394 v.AddArg(p) 9395 v.AddArg(idx) 9396 v.AddArg(w0) 9397 v.AddArg(mem) 9398 return true 9399 } 9400 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9401 // cond: x.Uses == 1 && clobber(x) 9402 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9403 for { 9404 i := v.AuxInt 9405 s := v.Aux 9406 p := v.Args[0] 9407 idx := v.Args[1] 9408 v_2 := v.Args[2] 9409 if v_2.Op != OpS390XSRDconst { 9410 break 9411 } 9412 if v_2.AuxInt != 8 { 9413 break 9414 } 9415 w := v_2.Args[0] 9416 x := v.Args[3] 9417 if x.Op != OpS390XMOVBstoreidx { 9418 break 9419 } 9420 if x.AuxInt != i-1 { 9421 break 9422 } 9423 if x.Aux != s { 9424 break 9425 } 9426 if p != x.Args[0] { 9427 break 9428 } 9429 if idx != x.Args[1] { 9430 break 9431 } 9432 if w != x.Args[2] { 9433 break 9434 } 9435 mem := x.Args[3] 9436 if !(x.Uses == 1 && clobber(x)) { 9437 break 9438 } 9439 v.reset(OpS390XMOVHBRstoreidx) 9440 v.AuxInt = i - 1 9441 v.Aux = s 9442 v.AddArg(p) 9443 v.AddArg(idx) 9444 v.AddArg(w) 9445 v.AddArg(mem) 9446 return true 9447 } 9448 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRDconst [j-8] w) mem)) 9449 // cond: x.Uses == 1 && clobber(x) 9450 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9451 for { 9452 i := v.AuxInt 9453 s := v.Aux 9454 p := v.Args[0] 9455 idx := v.Args[1] 9456 v_2 := v.Args[2] 9457 if v_2.Op != OpS390XSRDconst { 9458 break 9459 } 9460 j := v_2.AuxInt 9461 w := v_2.Args[0] 9462 x := v.Args[3] 9463 if x.Op != OpS390XMOVBstoreidx { 9464 break 9465 } 9466 if x.AuxInt != i-1 { 9467 break 9468 } 9469 if x.Aux != s { 9470 break 9471 } 9472 if p != x.Args[0] { 9473 break 9474 } 9475 if idx != x.Args[1] { 9476 break 9477 } 9478 w0 := x.Args[2] 9479 if w0.Op != OpS390XSRDconst { 9480 break 9481 } 9482 if w0.AuxInt != j-8 { 9483 break 9484 } 9485 if w != w0.Args[0] { 9486 break 9487 } 9488 mem := x.Args[3] 9489 if !(x.Uses == 1 && clobber(x)) { 9490 break 9491 } 9492 v.reset(OpS390XMOVHBRstoreidx) 9493 v.AuxInt = i - 1 9494 v.Aux = s 9495 v.AddArg(p) 9496 v.AddArg(idx) 9497 v.AddArg(w0) 9498 v.AddArg(mem) 9499 return true 9500 } 9501 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9502 // cond: x.Uses == 1 && clobber(x) 9503 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9504 for { 9505 i := v.AuxInt 9506 s := v.Aux 9507 p := v.Args[0] 9508 idx := v.Args[1] 9509 v_2 := v.Args[2] 9510 if v_2.Op != OpS390XSRWconst { 9511 break 9512 } 9513 if v_2.AuxInt != 8 { 9514 break 9515 } 9516 w := v_2.Args[0] 9517 x := v.Args[3] 9518 if x.Op != OpS390XMOVBstoreidx { 9519 break 9520 } 9521 if x.AuxInt != i-1 { 9522 break 9523 } 9524 if x.Aux != s { 9525 break 9526 } 9527 if p != x.Args[0] { 9528 break 9529 } 9530 if idx != x.Args[1] { 9531 break 9532 } 9533 if w != x.Args[2] { 9534 break 9535 } 9536 mem := x.Args[3] 9537 if !(x.Uses == 1 && clobber(x)) { 9538 break 9539 } 9540 v.reset(OpS390XMOVHBRstoreidx) 9541 v.AuxInt = i - 1 9542 v.Aux = s 9543 v.AddArg(p) 9544 v.AddArg(idx) 9545 v.AddArg(w) 9546 v.AddArg(mem) 9547 return true 9548 } 9549 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRWconst [j-8] w) mem)) 9550 // cond: x.Uses == 1 && clobber(x) 9551 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9552 for { 9553 i := v.AuxInt 9554 s := v.Aux 9555 p := v.Args[0] 9556 idx := v.Args[1] 9557 v_2 := v.Args[2] 9558 if v_2.Op != OpS390XSRWconst { 9559 break 9560 } 9561 j := v_2.AuxInt 9562 w := v_2.Args[0] 9563 x := v.Args[3] 9564 if x.Op != OpS390XMOVBstoreidx { 9565 break 9566 } 9567 if x.AuxInt != i-1 { 9568 break 9569 } 9570 if x.Aux != s { 9571 break 9572 } 9573 if p != x.Args[0] { 9574 break 9575 } 9576 if idx != x.Args[1] { 9577 break 9578 } 9579 w0 := x.Args[2] 9580 if w0.Op != OpS390XSRWconst { 9581 break 9582 } 9583 if w0.AuxInt != j-8 { 9584 break 9585 } 9586 if w != w0.Args[0] { 9587 break 9588 } 9589 mem := x.Args[3] 9590 if !(x.Uses == 1 && clobber(x)) { 9591 break 9592 } 9593 v.reset(OpS390XMOVHBRstoreidx) 9594 v.AuxInt = i - 1 9595 v.Aux = s 9596 v.AddArg(p) 9597 v.AddArg(idx) 9598 v.AddArg(w0) 9599 v.AddArg(mem) 9600 return true 9601 } 9602 return false 9603 } 9604 func rewriteValueS390X_OpS390XMOVDEQ(v *Value, config *Config) bool { 9605 b := v.Block 9606 _ = b 9607 // match: (MOVDEQ x y (InvertFlags cmp)) 9608 // cond: 9609 // result: (MOVDEQ x y cmp) 9610 for { 9611 x := v.Args[0] 9612 y := v.Args[1] 9613 v_2 := v.Args[2] 9614 if v_2.Op != OpS390XInvertFlags { 9615 break 9616 } 9617 cmp := v_2.Args[0] 9618 v.reset(OpS390XMOVDEQ) 9619 v.AddArg(x) 9620 v.AddArg(y) 9621 v.AddArg(cmp) 9622 return true 9623 } 9624 // match: (MOVDEQ _ x (FlagEQ)) 9625 // cond: 9626 // result: x 9627 for { 9628 x := v.Args[1] 9629 v_2 := v.Args[2] 9630 if v_2.Op != OpS390XFlagEQ { 9631 break 9632 } 9633 v.reset(OpCopy) 9634 v.Type = x.Type 9635 v.AddArg(x) 9636 return true 9637 } 9638 // match: (MOVDEQ y _ (FlagLT)) 9639 // cond: 9640 // result: y 9641 for { 9642 y := v.Args[0] 9643 v_2 := v.Args[2] 9644 if v_2.Op != OpS390XFlagLT { 9645 break 9646 } 9647 v.reset(OpCopy) 9648 v.Type = y.Type 9649 v.AddArg(y) 9650 return true 9651 } 9652 // match: (MOVDEQ y _ (FlagGT)) 9653 // cond: 9654 // result: y 9655 for { 9656 y := v.Args[0] 9657 v_2 := v.Args[2] 9658 if v_2.Op != OpS390XFlagGT { 9659 break 9660 } 9661 v.reset(OpCopy) 9662 v.Type = y.Type 9663 v.AddArg(y) 9664 return true 9665 } 9666 return false 9667 } 9668 func rewriteValueS390X_OpS390XMOVDGE(v *Value, config *Config) bool { 9669 b := v.Block 9670 _ = b 9671 // match: (MOVDGE x y (InvertFlags cmp)) 9672 // cond: 9673 // result: (MOVDLE x y cmp) 9674 for { 9675 x := v.Args[0] 9676 y := v.Args[1] 9677 v_2 := v.Args[2] 9678 if v_2.Op != OpS390XInvertFlags { 9679 break 9680 } 9681 cmp := v_2.Args[0] 9682 v.reset(OpS390XMOVDLE) 9683 v.AddArg(x) 9684 v.AddArg(y) 9685 v.AddArg(cmp) 9686 return true 9687 } 9688 // match: (MOVDGE _ x (FlagEQ)) 9689 // cond: 9690 // result: x 9691 for { 9692 x := v.Args[1] 9693 v_2 := v.Args[2] 9694 if v_2.Op != OpS390XFlagEQ { 9695 break 9696 } 9697 v.reset(OpCopy) 9698 v.Type = x.Type 9699 v.AddArg(x) 9700 return true 9701 } 9702 // match: (MOVDGE y _ (FlagLT)) 9703 // cond: 9704 // result: y 9705 for { 9706 y := v.Args[0] 9707 v_2 := v.Args[2] 9708 if v_2.Op != OpS390XFlagLT { 9709 break 9710 } 9711 v.reset(OpCopy) 9712 v.Type = y.Type 9713 v.AddArg(y) 9714 return true 9715 } 9716 // match: (MOVDGE _ x (FlagGT)) 9717 // cond: 9718 // result: x 9719 for { 9720 x := v.Args[1] 9721 v_2 := v.Args[2] 9722 if v_2.Op != OpS390XFlagGT { 9723 break 9724 } 9725 v.reset(OpCopy) 9726 v.Type = x.Type 9727 v.AddArg(x) 9728 return true 9729 } 9730 return false 9731 } 9732 func rewriteValueS390X_OpS390XMOVDGT(v *Value, config *Config) bool { 9733 b := v.Block 9734 _ = b 9735 // match: (MOVDGT x y (InvertFlags cmp)) 9736 // cond: 9737 // result: (MOVDLT x y cmp) 9738 for { 9739 x := v.Args[0] 9740 y := v.Args[1] 9741 v_2 := v.Args[2] 9742 if v_2.Op != OpS390XInvertFlags { 9743 break 9744 } 9745 cmp := v_2.Args[0] 9746 v.reset(OpS390XMOVDLT) 9747 v.AddArg(x) 9748 v.AddArg(y) 9749 v.AddArg(cmp) 9750 return true 9751 } 9752 // match: (MOVDGT y _ (FlagEQ)) 9753 // cond: 9754 // result: y 9755 for { 9756 y := v.Args[0] 9757 v_2 := v.Args[2] 9758 if v_2.Op != OpS390XFlagEQ { 9759 break 9760 } 9761 v.reset(OpCopy) 9762 v.Type = y.Type 9763 v.AddArg(y) 9764 return true 9765 } 9766 // match: (MOVDGT y _ (FlagLT)) 9767 // cond: 9768 // result: y 9769 for { 9770 y := v.Args[0] 9771 v_2 := v.Args[2] 9772 if v_2.Op != OpS390XFlagLT { 9773 break 9774 } 9775 v.reset(OpCopy) 9776 v.Type = y.Type 9777 v.AddArg(y) 9778 return true 9779 } 9780 // match: (MOVDGT _ x (FlagGT)) 9781 // cond: 9782 // result: x 9783 for { 9784 x := v.Args[1] 9785 v_2 := v.Args[2] 9786 if v_2.Op != OpS390XFlagGT { 9787 break 9788 } 9789 v.reset(OpCopy) 9790 v.Type = x.Type 9791 v.AddArg(x) 9792 return true 9793 } 9794 return false 9795 } 9796 func rewriteValueS390X_OpS390XMOVDLE(v *Value, config *Config) bool { 9797 b := v.Block 9798 _ = b 9799 // match: (MOVDLE x y (InvertFlags cmp)) 9800 // cond: 9801 // result: (MOVDGE x y cmp) 9802 for { 9803 x := v.Args[0] 9804 y := v.Args[1] 9805 v_2 := v.Args[2] 9806 if v_2.Op != OpS390XInvertFlags { 9807 break 9808 } 9809 cmp := v_2.Args[0] 9810 v.reset(OpS390XMOVDGE) 9811 v.AddArg(x) 9812 v.AddArg(y) 9813 v.AddArg(cmp) 9814 return true 9815 } 9816 // match: (MOVDLE _ x (FlagEQ)) 9817 // cond: 9818 // result: x 9819 for { 9820 x := v.Args[1] 9821 v_2 := v.Args[2] 9822 if v_2.Op != OpS390XFlagEQ { 9823 break 9824 } 9825 v.reset(OpCopy) 9826 v.Type = x.Type 9827 v.AddArg(x) 9828 return true 9829 } 9830 // match: (MOVDLE _ x (FlagLT)) 9831 // cond: 9832 // result: x 9833 for { 9834 x := v.Args[1] 9835 v_2 := v.Args[2] 9836 if v_2.Op != OpS390XFlagLT { 9837 break 9838 } 9839 v.reset(OpCopy) 9840 v.Type = x.Type 9841 v.AddArg(x) 9842 return true 9843 } 9844 // match: (MOVDLE y _ (FlagGT)) 9845 // cond: 9846 // result: y 9847 for { 9848 y := v.Args[0] 9849 v_2 := v.Args[2] 9850 if v_2.Op != OpS390XFlagGT { 9851 break 9852 } 9853 v.reset(OpCopy) 9854 v.Type = y.Type 9855 v.AddArg(y) 9856 return true 9857 } 9858 return false 9859 } 9860 func rewriteValueS390X_OpS390XMOVDLT(v *Value, config *Config) bool { 9861 b := v.Block 9862 _ = b 9863 // match: (MOVDLT x y (InvertFlags cmp)) 9864 // cond: 9865 // result: (MOVDGT x y cmp) 9866 for { 9867 x := v.Args[0] 9868 y := v.Args[1] 9869 v_2 := v.Args[2] 9870 if v_2.Op != OpS390XInvertFlags { 9871 break 9872 } 9873 cmp := v_2.Args[0] 9874 v.reset(OpS390XMOVDGT) 9875 v.AddArg(x) 9876 v.AddArg(y) 9877 v.AddArg(cmp) 9878 return true 9879 } 9880 // match: (MOVDLT y _ (FlagEQ)) 9881 // cond: 9882 // result: y 9883 for { 9884 y := v.Args[0] 9885 v_2 := v.Args[2] 9886 if v_2.Op != OpS390XFlagEQ { 9887 break 9888 } 9889 v.reset(OpCopy) 9890 v.Type = y.Type 9891 v.AddArg(y) 9892 return true 9893 } 9894 // match: (MOVDLT _ x (FlagLT)) 9895 // cond: 9896 // result: x 9897 for { 9898 x := v.Args[1] 9899 v_2 := v.Args[2] 9900 if v_2.Op != OpS390XFlagLT { 9901 break 9902 } 9903 v.reset(OpCopy) 9904 v.Type = x.Type 9905 v.AddArg(x) 9906 return true 9907 } 9908 // match: (MOVDLT y _ (FlagGT)) 9909 // cond: 9910 // result: y 9911 for { 9912 y := v.Args[0] 9913 v_2 := v.Args[2] 9914 if v_2.Op != OpS390XFlagGT { 9915 break 9916 } 9917 v.reset(OpCopy) 9918 v.Type = y.Type 9919 v.AddArg(y) 9920 return true 9921 } 9922 return false 9923 } 9924 func rewriteValueS390X_OpS390XMOVDNE(v *Value, config *Config) bool { 9925 b := v.Block 9926 _ = b 9927 // match: (MOVDNE x y (InvertFlags cmp)) 9928 // cond: 9929 // result: (MOVDNE x y cmp) 9930 for { 9931 x := v.Args[0] 9932 y := v.Args[1] 9933 v_2 := v.Args[2] 9934 if v_2.Op != OpS390XInvertFlags { 9935 break 9936 } 9937 cmp := v_2.Args[0] 9938 v.reset(OpS390XMOVDNE) 9939 v.AddArg(x) 9940 v.AddArg(y) 9941 v.AddArg(cmp) 9942 return true 9943 } 9944 // match: (MOVDNE y _ (FlagEQ)) 9945 // cond: 9946 // result: y 9947 for { 9948 y := v.Args[0] 9949 v_2 := v.Args[2] 9950 if v_2.Op != OpS390XFlagEQ { 9951 break 9952 } 9953 v.reset(OpCopy) 9954 v.Type = y.Type 9955 v.AddArg(y) 9956 return true 9957 } 9958 // match: (MOVDNE _ x (FlagLT)) 9959 // cond: 9960 // result: x 9961 for { 9962 x := v.Args[1] 9963 v_2 := v.Args[2] 9964 if v_2.Op != OpS390XFlagLT { 9965 break 9966 } 9967 v.reset(OpCopy) 9968 v.Type = x.Type 9969 v.AddArg(x) 9970 return true 9971 } 9972 // match: (MOVDNE _ x (FlagGT)) 9973 // cond: 9974 // result: x 9975 for { 9976 x := v.Args[1] 9977 v_2 := v.Args[2] 9978 if v_2.Op != OpS390XFlagGT { 9979 break 9980 } 9981 v.reset(OpCopy) 9982 v.Type = x.Type 9983 v.AddArg(x) 9984 return true 9985 } 9986 return false 9987 } 9988 func rewriteValueS390X_OpS390XMOVDaddridx(v *Value, config *Config) bool { 9989 b := v.Block 9990 _ = b 9991 // match: (MOVDaddridx [c] {s} (ADDconst [d] x) y) 9992 // cond: is20Bit(c+d) && x.Op != OpSB 9993 // result: (MOVDaddridx [c+d] {s} x y) 9994 for { 9995 c := v.AuxInt 9996 s := v.Aux 9997 v_0 := v.Args[0] 9998 if v_0.Op != OpS390XADDconst { 9999 break 10000 } 10001 d := v_0.AuxInt 10002 x := v_0.Args[0] 10003 y := v.Args[1] 10004 if !(is20Bit(c+d) && x.Op != OpSB) { 10005 break 10006 } 10007 v.reset(OpS390XMOVDaddridx) 10008 v.AuxInt = c + d 10009 v.Aux = s 10010 v.AddArg(x) 10011 v.AddArg(y) 10012 return true 10013 } 10014 // match: (MOVDaddridx [c] {s} x (ADDconst [d] y)) 10015 // cond: is20Bit(c+d) && y.Op != OpSB 10016 // result: (MOVDaddridx [c+d] {s} x y) 10017 for { 10018 c := v.AuxInt 10019 s := v.Aux 10020 x := v.Args[0] 10021 v_1 := v.Args[1] 10022 if v_1.Op != OpS390XADDconst { 10023 break 10024 } 10025 d := v_1.AuxInt 10026 y := v_1.Args[0] 10027 if !(is20Bit(c+d) && y.Op != OpSB) { 10028 break 10029 } 10030 v.reset(OpS390XMOVDaddridx) 10031 v.AuxInt = c + d 10032 v.Aux = s 10033 v.AddArg(x) 10034 v.AddArg(y) 10035 return true 10036 } 10037 // match: (MOVDaddridx [off1] {sym1} (MOVDaddr [off2] {sym2} x) y) 10038 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 10039 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 10040 for { 10041 off1 := v.AuxInt 10042 sym1 := v.Aux 10043 v_0 := v.Args[0] 10044 if v_0.Op != OpS390XMOVDaddr { 10045 break 10046 } 10047 off2 := v_0.AuxInt 10048 sym2 := v_0.Aux 10049 x := v_0.Args[0] 10050 y := v.Args[1] 10051 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 10052 break 10053 } 10054 v.reset(OpS390XMOVDaddridx) 10055 v.AuxInt = off1 + off2 10056 v.Aux = mergeSym(sym1, sym2) 10057 v.AddArg(x) 10058 v.AddArg(y) 10059 return true 10060 } 10061 // match: (MOVDaddridx [off1] {sym1} x (MOVDaddr [off2] {sym2} y)) 10062 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB 10063 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 10064 for { 10065 off1 := v.AuxInt 10066 sym1 := v.Aux 10067 x := v.Args[0] 10068 v_1 := v.Args[1] 10069 if v_1.Op != OpS390XMOVDaddr { 10070 break 10071 } 10072 off2 := v_1.AuxInt 10073 sym2 := v_1.Aux 10074 y := v_1.Args[0] 10075 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB) { 10076 break 10077 } 10078 v.reset(OpS390XMOVDaddridx) 10079 v.AuxInt = off1 + off2 10080 v.Aux = mergeSym(sym1, sym2) 10081 v.AddArg(x) 10082 v.AddArg(y) 10083 return true 10084 } 10085 return false 10086 } 10087 func rewriteValueS390X_OpS390XMOVDload(v *Value, config *Config) bool { 10088 b := v.Block 10089 _ = b 10090 // match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) 10091 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 10092 // result: (MOVDreg x) 10093 for { 10094 off := v.AuxInt 10095 sym := v.Aux 10096 ptr := v.Args[0] 10097 v_1 := v.Args[1] 10098 if v_1.Op != OpS390XMOVDstore { 10099 break 10100 } 10101 off2 := v_1.AuxInt 10102 sym2 := v_1.Aux 10103 ptr2 := v_1.Args[0] 10104 x := v_1.Args[1] 10105 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 10106 break 10107 } 10108 v.reset(OpS390XMOVDreg) 10109 v.AddArg(x) 10110 return true 10111 } 10112 // match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 10113 // cond: is20Bit(off1+off2) 10114 // result: (MOVDload [off1+off2] {sym} ptr mem) 10115 for { 10116 off1 := v.AuxInt 10117 sym := v.Aux 10118 v_0 := v.Args[0] 10119 if v_0.Op != OpS390XADDconst { 10120 break 10121 } 10122 off2 := v_0.AuxInt 10123 ptr := v_0.Args[0] 10124 mem := v.Args[1] 10125 if !(is20Bit(off1 + off2)) { 10126 break 10127 } 10128 v.reset(OpS390XMOVDload) 10129 v.AuxInt = off1 + off2 10130 v.Aux = sym 10131 v.AddArg(ptr) 10132 v.AddArg(mem) 10133 return true 10134 } 10135 // match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 10136 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10137 // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 10138 for { 10139 off1 := v.AuxInt 10140 sym1 := v.Aux 10141 v_0 := v.Args[0] 10142 if v_0.Op != OpS390XMOVDaddr { 10143 break 10144 } 10145 off2 := v_0.AuxInt 10146 sym2 := v_0.Aux 10147 base := v_0.Args[0] 10148 mem := v.Args[1] 10149 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10150 break 10151 } 10152 v.reset(OpS390XMOVDload) 10153 v.AuxInt = off1 + off2 10154 v.Aux = mergeSym(sym1, sym2) 10155 v.AddArg(base) 10156 v.AddArg(mem) 10157 return true 10158 } 10159 // match: (MOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 10160 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10161 // result: (MOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 10162 for { 10163 off1 := v.AuxInt 10164 sym1 := v.Aux 10165 v_0 := v.Args[0] 10166 if v_0.Op != OpS390XMOVDaddridx { 10167 break 10168 } 10169 off2 := v_0.AuxInt 10170 sym2 := v_0.Aux 10171 ptr := v_0.Args[0] 10172 idx := v_0.Args[1] 10173 mem := v.Args[1] 10174 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10175 break 10176 } 10177 v.reset(OpS390XMOVDloadidx) 10178 v.AuxInt = off1 + off2 10179 v.Aux = mergeSym(sym1, sym2) 10180 v.AddArg(ptr) 10181 v.AddArg(idx) 10182 v.AddArg(mem) 10183 return true 10184 } 10185 // match: (MOVDload [off] {sym} (ADD ptr idx) mem) 10186 // cond: ptr.Op != OpSB 10187 // result: (MOVDloadidx [off] {sym} ptr idx mem) 10188 for { 10189 off := v.AuxInt 10190 sym := v.Aux 10191 v_0 := v.Args[0] 10192 if v_0.Op != OpS390XADD { 10193 break 10194 } 10195 ptr := v_0.Args[0] 10196 idx := v_0.Args[1] 10197 mem := v.Args[1] 10198 if !(ptr.Op != OpSB) { 10199 break 10200 } 10201 v.reset(OpS390XMOVDloadidx) 10202 v.AuxInt = off 10203 v.Aux = sym 10204 v.AddArg(ptr) 10205 v.AddArg(idx) 10206 v.AddArg(mem) 10207 return true 10208 } 10209 return false 10210 } 10211 func rewriteValueS390X_OpS390XMOVDloadidx(v *Value, config *Config) bool { 10212 b := v.Block 10213 _ = b 10214 // match: (MOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 10215 // cond: 10216 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10217 for { 10218 c := v.AuxInt 10219 sym := v.Aux 10220 v_0 := v.Args[0] 10221 if v_0.Op != OpS390XADDconst { 10222 break 10223 } 10224 d := v_0.AuxInt 10225 ptr := v_0.Args[0] 10226 idx := v.Args[1] 10227 mem := v.Args[2] 10228 v.reset(OpS390XMOVDloadidx) 10229 v.AuxInt = c + d 10230 v.Aux = sym 10231 v.AddArg(ptr) 10232 v.AddArg(idx) 10233 v.AddArg(mem) 10234 return true 10235 } 10236 // match: (MOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 10237 // cond: 10238 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10239 for { 10240 c := v.AuxInt 10241 sym := v.Aux 10242 ptr := v.Args[0] 10243 v_1 := v.Args[1] 10244 if v_1.Op != OpS390XADDconst { 10245 break 10246 } 10247 d := v_1.AuxInt 10248 idx := v_1.Args[0] 10249 mem := v.Args[2] 10250 v.reset(OpS390XMOVDloadidx) 10251 v.AuxInt = c + d 10252 v.Aux = sym 10253 v.AddArg(ptr) 10254 v.AddArg(idx) 10255 v.AddArg(mem) 10256 return true 10257 } 10258 return false 10259 } 10260 func rewriteValueS390X_OpS390XMOVDreg(v *Value, config *Config) bool { 10261 b := v.Block 10262 _ = b 10263 // match: (MOVDreg x) 10264 // cond: x.Uses == 1 10265 // result: (MOVDnop x) 10266 for { 10267 x := v.Args[0] 10268 if !(x.Uses == 1) { 10269 break 10270 } 10271 v.reset(OpS390XMOVDnop) 10272 v.AddArg(x) 10273 return true 10274 } 10275 return false 10276 } 10277 func rewriteValueS390X_OpS390XMOVDstore(v *Value, config *Config) bool { 10278 b := v.Block 10279 _ = b 10280 // match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 10281 // cond: is20Bit(off1+off2) 10282 // result: (MOVDstore [off1+off2] {sym} ptr val mem) 10283 for { 10284 off1 := v.AuxInt 10285 sym := v.Aux 10286 v_0 := v.Args[0] 10287 if v_0.Op != OpS390XADDconst { 10288 break 10289 } 10290 off2 := v_0.AuxInt 10291 ptr := v_0.Args[0] 10292 val := v.Args[1] 10293 mem := v.Args[2] 10294 if !(is20Bit(off1 + off2)) { 10295 break 10296 } 10297 v.reset(OpS390XMOVDstore) 10298 v.AuxInt = off1 + off2 10299 v.Aux = sym 10300 v.AddArg(ptr) 10301 v.AddArg(val) 10302 v.AddArg(mem) 10303 return true 10304 } 10305 // match: (MOVDstore [off] {sym} ptr (MOVDconst [c]) mem) 10306 // cond: validValAndOff(c,off) && int64(int16(c)) == c && ptr.Op != OpSB 10307 // result: (MOVDstoreconst [makeValAndOff(c,off)] {sym} ptr mem) 10308 for { 10309 off := v.AuxInt 10310 sym := v.Aux 10311 ptr := v.Args[0] 10312 v_1 := v.Args[1] 10313 if v_1.Op != OpS390XMOVDconst { 10314 break 10315 } 10316 c := v_1.AuxInt 10317 mem := v.Args[2] 10318 if !(validValAndOff(c, off) && int64(int16(c)) == c && ptr.Op != OpSB) { 10319 break 10320 } 10321 v.reset(OpS390XMOVDstoreconst) 10322 v.AuxInt = makeValAndOff(c, off) 10323 v.Aux = sym 10324 v.AddArg(ptr) 10325 v.AddArg(mem) 10326 return true 10327 } 10328 // match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 10329 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10330 // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 10331 for { 10332 off1 := v.AuxInt 10333 sym1 := v.Aux 10334 v_0 := v.Args[0] 10335 if v_0.Op != OpS390XMOVDaddr { 10336 break 10337 } 10338 off2 := v_0.AuxInt 10339 sym2 := v_0.Aux 10340 base := v_0.Args[0] 10341 val := v.Args[1] 10342 mem := v.Args[2] 10343 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10344 break 10345 } 10346 v.reset(OpS390XMOVDstore) 10347 v.AuxInt = off1 + off2 10348 v.Aux = mergeSym(sym1, sym2) 10349 v.AddArg(base) 10350 v.AddArg(val) 10351 v.AddArg(mem) 10352 return true 10353 } 10354 // match: (MOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 10355 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10356 // result: (MOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 10357 for { 10358 off1 := v.AuxInt 10359 sym1 := v.Aux 10360 v_0 := v.Args[0] 10361 if v_0.Op != OpS390XMOVDaddridx { 10362 break 10363 } 10364 off2 := v_0.AuxInt 10365 sym2 := v_0.Aux 10366 ptr := v_0.Args[0] 10367 idx := v_0.Args[1] 10368 val := v.Args[1] 10369 mem := v.Args[2] 10370 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10371 break 10372 } 10373 v.reset(OpS390XMOVDstoreidx) 10374 v.AuxInt = off1 + off2 10375 v.Aux = mergeSym(sym1, sym2) 10376 v.AddArg(ptr) 10377 v.AddArg(idx) 10378 v.AddArg(val) 10379 v.AddArg(mem) 10380 return true 10381 } 10382 // match: (MOVDstore [off] {sym} (ADD ptr idx) val mem) 10383 // cond: ptr.Op != OpSB 10384 // result: (MOVDstoreidx [off] {sym} ptr idx val mem) 10385 for { 10386 off := v.AuxInt 10387 sym := v.Aux 10388 v_0 := v.Args[0] 10389 if v_0.Op != OpS390XADD { 10390 break 10391 } 10392 ptr := v_0.Args[0] 10393 idx := v_0.Args[1] 10394 val := v.Args[1] 10395 mem := v.Args[2] 10396 if !(ptr.Op != OpSB) { 10397 break 10398 } 10399 v.reset(OpS390XMOVDstoreidx) 10400 v.AuxInt = off 10401 v.Aux = sym 10402 v.AddArg(ptr) 10403 v.AddArg(idx) 10404 v.AddArg(val) 10405 v.AddArg(mem) 10406 return true 10407 } 10408 // match: (MOVDstore [i] {s} p w1 x:(MOVDstore [i-8] {s} p w0 mem)) 10409 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x) 10410 // result: (STMG2 [i-8] {s} p w0 w1 mem) 10411 for { 10412 i := v.AuxInt 10413 s := v.Aux 10414 p := v.Args[0] 10415 w1 := v.Args[1] 10416 x := v.Args[2] 10417 if x.Op != OpS390XMOVDstore { 10418 break 10419 } 10420 if x.AuxInt != i-8 { 10421 break 10422 } 10423 if x.Aux != s { 10424 break 10425 } 10426 if p != x.Args[0] { 10427 break 10428 } 10429 w0 := x.Args[1] 10430 mem := x.Args[2] 10431 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 10432 break 10433 } 10434 v.reset(OpS390XSTMG2) 10435 v.AuxInt = i - 8 10436 v.Aux = s 10437 v.AddArg(p) 10438 v.AddArg(w0) 10439 v.AddArg(w1) 10440 v.AddArg(mem) 10441 return true 10442 } 10443 // match: (MOVDstore [i] {s} p w2 x:(STMG2 [i-16] {s} p w0 w1 mem)) 10444 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 10445 // result: (STMG3 [i-16] {s} p w0 w1 w2 mem) 10446 for { 10447 i := v.AuxInt 10448 s := v.Aux 10449 p := v.Args[0] 10450 w2 := v.Args[1] 10451 x := v.Args[2] 10452 if x.Op != OpS390XSTMG2 { 10453 break 10454 } 10455 if x.AuxInt != i-16 { 10456 break 10457 } 10458 if x.Aux != s { 10459 break 10460 } 10461 if p != x.Args[0] { 10462 break 10463 } 10464 w0 := x.Args[1] 10465 w1 := x.Args[2] 10466 mem := x.Args[3] 10467 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 10468 break 10469 } 10470 v.reset(OpS390XSTMG3) 10471 v.AuxInt = i - 16 10472 v.Aux = s 10473 v.AddArg(p) 10474 v.AddArg(w0) 10475 v.AddArg(w1) 10476 v.AddArg(w2) 10477 v.AddArg(mem) 10478 return true 10479 } 10480 // match: (MOVDstore [i] {s} p w3 x:(STMG3 [i-24] {s} p w0 w1 w2 mem)) 10481 // cond: x.Uses == 1 && is20Bit(i-24) && clobber(x) 10482 // result: (STMG4 [i-24] {s} p w0 w1 w2 w3 mem) 10483 for { 10484 i := v.AuxInt 10485 s := v.Aux 10486 p := v.Args[0] 10487 w3 := v.Args[1] 10488 x := v.Args[2] 10489 if x.Op != OpS390XSTMG3 { 10490 break 10491 } 10492 if x.AuxInt != i-24 { 10493 break 10494 } 10495 if x.Aux != s { 10496 break 10497 } 10498 if p != x.Args[0] { 10499 break 10500 } 10501 w0 := x.Args[1] 10502 w1 := x.Args[2] 10503 w2 := x.Args[3] 10504 mem := x.Args[4] 10505 if !(x.Uses == 1 && is20Bit(i-24) && clobber(x)) { 10506 break 10507 } 10508 v.reset(OpS390XSTMG4) 10509 v.AuxInt = i - 24 10510 v.Aux = s 10511 v.AddArg(p) 10512 v.AddArg(w0) 10513 v.AddArg(w1) 10514 v.AddArg(w2) 10515 v.AddArg(w3) 10516 v.AddArg(mem) 10517 return true 10518 } 10519 return false 10520 } 10521 func rewriteValueS390X_OpS390XMOVDstoreconst(v *Value, config *Config) bool { 10522 b := v.Block 10523 _ = b 10524 // match: (MOVDstoreconst [sc] {s} (ADDconst [off] ptr) mem) 10525 // cond: ValAndOff(sc).canAdd(off) 10526 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 10527 for { 10528 sc := v.AuxInt 10529 s := v.Aux 10530 v_0 := v.Args[0] 10531 if v_0.Op != OpS390XADDconst { 10532 break 10533 } 10534 off := v_0.AuxInt 10535 ptr := v_0.Args[0] 10536 mem := v.Args[1] 10537 if !(ValAndOff(sc).canAdd(off)) { 10538 break 10539 } 10540 v.reset(OpS390XMOVDstoreconst) 10541 v.AuxInt = ValAndOff(sc).add(off) 10542 v.Aux = s 10543 v.AddArg(ptr) 10544 v.AddArg(mem) 10545 return true 10546 } 10547 // match: (MOVDstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 10548 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 10549 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 10550 for { 10551 sc := v.AuxInt 10552 sym1 := v.Aux 10553 v_0 := v.Args[0] 10554 if v_0.Op != OpS390XMOVDaddr { 10555 break 10556 } 10557 off := v_0.AuxInt 10558 sym2 := v_0.Aux 10559 ptr := v_0.Args[0] 10560 mem := v.Args[1] 10561 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 10562 break 10563 } 10564 v.reset(OpS390XMOVDstoreconst) 10565 v.AuxInt = ValAndOff(sc).add(off) 10566 v.Aux = mergeSym(sym1, sym2) 10567 v.AddArg(ptr) 10568 v.AddArg(mem) 10569 return true 10570 } 10571 return false 10572 } 10573 func rewriteValueS390X_OpS390XMOVDstoreidx(v *Value, config *Config) bool { 10574 b := v.Block 10575 _ = b 10576 // match: (MOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 10577 // cond: 10578 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10579 for { 10580 c := v.AuxInt 10581 sym := v.Aux 10582 v_0 := v.Args[0] 10583 if v_0.Op != OpS390XADDconst { 10584 break 10585 } 10586 d := v_0.AuxInt 10587 ptr := v_0.Args[0] 10588 idx := v.Args[1] 10589 val := v.Args[2] 10590 mem := v.Args[3] 10591 v.reset(OpS390XMOVDstoreidx) 10592 v.AuxInt = c + d 10593 v.Aux = sym 10594 v.AddArg(ptr) 10595 v.AddArg(idx) 10596 v.AddArg(val) 10597 v.AddArg(mem) 10598 return true 10599 } 10600 // match: (MOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 10601 // cond: 10602 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10603 for { 10604 c := v.AuxInt 10605 sym := v.Aux 10606 ptr := v.Args[0] 10607 v_1 := v.Args[1] 10608 if v_1.Op != OpS390XADDconst { 10609 break 10610 } 10611 d := v_1.AuxInt 10612 idx := v_1.Args[0] 10613 val := v.Args[2] 10614 mem := v.Args[3] 10615 v.reset(OpS390XMOVDstoreidx) 10616 v.AuxInt = c + d 10617 v.Aux = sym 10618 v.AddArg(ptr) 10619 v.AddArg(idx) 10620 v.AddArg(val) 10621 v.AddArg(mem) 10622 return true 10623 } 10624 return false 10625 } 10626 func rewriteValueS390X_OpS390XMOVHBRstore(v *Value, config *Config) bool { 10627 b := v.Block 10628 _ = b 10629 // match: (MOVHBRstore [i] {s} p (SRDconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10630 // cond: x.Uses == 1 && clobber(x) 10631 // result: (MOVWBRstore [i-2] {s} p w mem) 10632 for { 10633 i := v.AuxInt 10634 s := v.Aux 10635 p := v.Args[0] 10636 v_1 := v.Args[1] 10637 if v_1.Op != OpS390XSRDconst { 10638 break 10639 } 10640 if v_1.AuxInt != 16 { 10641 break 10642 } 10643 w := v_1.Args[0] 10644 x := v.Args[2] 10645 if x.Op != OpS390XMOVHBRstore { 10646 break 10647 } 10648 if x.AuxInt != i-2 { 10649 break 10650 } 10651 if x.Aux != s { 10652 break 10653 } 10654 if p != x.Args[0] { 10655 break 10656 } 10657 if w != x.Args[1] { 10658 break 10659 } 10660 mem := x.Args[2] 10661 if !(x.Uses == 1 && clobber(x)) { 10662 break 10663 } 10664 v.reset(OpS390XMOVWBRstore) 10665 v.AuxInt = i - 2 10666 v.Aux = s 10667 v.AddArg(p) 10668 v.AddArg(w) 10669 v.AddArg(mem) 10670 return true 10671 } 10672 // match: (MOVHBRstore [i] {s} p (SRDconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRDconst [j-16] w) mem)) 10673 // cond: x.Uses == 1 && clobber(x) 10674 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10675 for { 10676 i := v.AuxInt 10677 s := v.Aux 10678 p := v.Args[0] 10679 v_1 := v.Args[1] 10680 if v_1.Op != OpS390XSRDconst { 10681 break 10682 } 10683 j := v_1.AuxInt 10684 w := v_1.Args[0] 10685 x := v.Args[2] 10686 if x.Op != OpS390XMOVHBRstore { 10687 break 10688 } 10689 if x.AuxInt != i-2 { 10690 break 10691 } 10692 if x.Aux != s { 10693 break 10694 } 10695 if p != x.Args[0] { 10696 break 10697 } 10698 w0 := x.Args[1] 10699 if w0.Op != OpS390XSRDconst { 10700 break 10701 } 10702 if w0.AuxInt != j-16 { 10703 break 10704 } 10705 if w != w0.Args[0] { 10706 break 10707 } 10708 mem := x.Args[2] 10709 if !(x.Uses == 1 && clobber(x)) { 10710 break 10711 } 10712 v.reset(OpS390XMOVWBRstore) 10713 v.AuxInt = i - 2 10714 v.Aux = s 10715 v.AddArg(p) 10716 v.AddArg(w0) 10717 v.AddArg(mem) 10718 return true 10719 } 10720 // match: (MOVHBRstore [i] {s} p (SRWconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10721 // cond: x.Uses == 1 && clobber(x) 10722 // result: (MOVWBRstore [i-2] {s} p w mem) 10723 for { 10724 i := v.AuxInt 10725 s := v.Aux 10726 p := v.Args[0] 10727 v_1 := v.Args[1] 10728 if v_1.Op != OpS390XSRWconst { 10729 break 10730 } 10731 if v_1.AuxInt != 16 { 10732 break 10733 } 10734 w := v_1.Args[0] 10735 x := v.Args[2] 10736 if x.Op != OpS390XMOVHBRstore { 10737 break 10738 } 10739 if x.AuxInt != i-2 { 10740 break 10741 } 10742 if x.Aux != s { 10743 break 10744 } 10745 if p != x.Args[0] { 10746 break 10747 } 10748 if w != x.Args[1] { 10749 break 10750 } 10751 mem := x.Args[2] 10752 if !(x.Uses == 1 && clobber(x)) { 10753 break 10754 } 10755 v.reset(OpS390XMOVWBRstore) 10756 v.AuxInt = i - 2 10757 v.Aux = s 10758 v.AddArg(p) 10759 v.AddArg(w) 10760 v.AddArg(mem) 10761 return true 10762 } 10763 // match: (MOVHBRstore [i] {s} p (SRWconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRWconst [j-16] w) mem)) 10764 // cond: x.Uses == 1 && clobber(x) 10765 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10766 for { 10767 i := v.AuxInt 10768 s := v.Aux 10769 p := v.Args[0] 10770 v_1 := v.Args[1] 10771 if v_1.Op != OpS390XSRWconst { 10772 break 10773 } 10774 j := v_1.AuxInt 10775 w := v_1.Args[0] 10776 x := v.Args[2] 10777 if x.Op != OpS390XMOVHBRstore { 10778 break 10779 } 10780 if x.AuxInt != i-2 { 10781 break 10782 } 10783 if x.Aux != s { 10784 break 10785 } 10786 if p != x.Args[0] { 10787 break 10788 } 10789 w0 := x.Args[1] 10790 if w0.Op != OpS390XSRWconst { 10791 break 10792 } 10793 if w0.AuxInt != j-16 { 10794 break 10795 } 10796 if w != w0.Args[0] { 10797 break 10798 } 10799 mem := x.Args[2] 10800 if !(x.Uses == 1 && clobber(x)) { 10801 break 10802 } 10803 v.reset(OpS390XMOVWBRstore) 10804 v.AuxInt = i - 2 10805 v.Aux = s 10806 v.AddArg(p) 10807 v.AddArg(w0) 10808 v.AddArg(mem) 10809 return true 10810 } 10811 return false 10812 } 10813 func rewriteValueS390X_OpS390XMOVHBRstoreidx(v *Value, config *Config) bool { 10814 b := v.Block 10815 _ = b 10816 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10817 // cond: x.Uses == 1 && clobber(x) 10818 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10819 for { 10820 i := v.AuxInt 10821 s := v.Aux 10822 p := v.Args[0] 10823 idx := v.Args[1] 10824 v_2 := v.Args[2] 10825 if v_2.Op != OpS390XSRDconst { 10826 break 10827 } 10828 if v_2.AuxInt != 16 { 10829 break 10830 } 10831 w := v_2.Args[0] 10832 x := v.Args[3] 10833 if x.Op != OpS390XMOVHBRstoreidx { 10834 break 10835 } 10836 if x.AuxInt != i-2 { 10837 break 10838 } 10839 if x.Aux != s { 10840 break 10841 } 10842 if p != x.Args[0] { 10843 break 10844 } 10845 if idx != x.Args[1] { 10846 break 10847 } 10848 if w != x.Args[2] { 10849 break 10850 } 10851 mem := x.Args[3] 10852 if !(x.Uses == 1 && clobber(x)) { 10853 break 10854 } 10855 v.reset(OpS390XMOVWBRstoreidx) 10856 v.AuxInt = i - 2 10857 v.Aux = s 10858 v.AddArg(p) 10859 v.AddArg(idx) 10860 v.AddArg(w) 10861 v.AddArg(mem) 10862 return true 10863 } 10864 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRDconst [j-16] w) mem)) 10865 // cond: x.Uses == 1 && clobber(x) 10866 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10867 for { 10868 i := v.AuxInt 10869 s := v.Aux 10870 p := v.Args[0] 10871 idx := v.Args[1] 10872 v_2 := v.Args[2] 10873 if v_2.Op != OpS390XSRDconst { 10874 break 10875 } 10876 j := v_2.AuxInt 10877 w := v_2.Args[0] 10878 x := v.Args[3] 10879 if x.Op != OpS390XMOVHBRstoreidx { 10880 break 10881 } 10882 if x.AuxInt != i-2 { 10883 break 10884 } 10885 if x.Aux != s { 10886 break 10887 } 10888 if p != x.Args[0] { 10889 break 10890 } 10891 if idx != x.Args[1] { 10892 break 10893 } 10894 w0 := x.Args[2] 10895 if w0.Op != OpS390XSRDconst { 10896 break 10897 } 10898 if w0.AuxInt != j-16 { 10899 break 10900 } 10901 if w != w0.Args[0] { 10902 break 10903 } 10904 mem := x.Args[3] 10905 if !(x.Uses == 1 && clobber(x)) { 10906 break 10907 } 10908 v.reset(OpS390XMOVWBRstoreidx) 10909 v.AuxInt = i - 2 10910 v.Aux = s 10911 v.AddArg(p) 10912 v.AddArg(idx) 10913 v.AddArg(w0) 10914 v.AddArg(mem) 10915 return true 10916 } 10917 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10918 // cond: x.Uses == 1 && clobber(x) 10919 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10920 for { 10921 i := v.AuxInt 10922 s := v.Aux 10923 p := v.Args[0] 10924 idx := v.Args[1] 10925 v_2 := v.Args[2] 10926 if v_2.Op != OpS390XSRWconst { 10927 break 10928 } 10929 if v_2.AuxInt != 16 { 10930 break 10931 } 10932 w := v_2.Args[0] 10933 x := v.Args[3] 10934 if x.Op != OpS390XMOVHBRstoreidx { 10935 break 10936 } 10937 if x.AuxInt != i-2 { 10938 break 10939 } 10940 if x.Aux != s { 10941 break 10942 } 10943 if p != x.Args[0] { 10944 break 10945 } 10946 if idx != x.Args[1] { 10947 break 10948 } 10949 if w != x.Args[2] { 10950 break 10951 } 10952 mem := x.Args[3] 10953 if !(x.Uses == 1 && clobber(x)) { 10954 break 10955 } 10956 v.reset(OpS390XMOVWBRstoreidx) 10957 v.AuxInt = i - 2 10958 v.Aux = s 10959 v.AddArg(p) 10960 v.AddArg(idx) 10961 v.AddArg(w) 10962 v.AddArg(mem) 10963 return true 10964 } 10965 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRWconst [j-16] w) mem)) 10966 // cond: x.Uses == 1 && clobber(x) 10967 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10968 for { 10969 i := v.AuxInt 10970 s := v.Aux 10971 p := v.Args[0] 10972 idx := v.Args[1] 10973 v_2 := v.Args[2] 10974 if v_2.Op != OpS390XSRWconst { 10975 break 10976 } 10977 j := v_2.AuxInt 10978 w := v_2.Args[0] 10979 x := v.Args[3] 10980 if x.Op != OpS390XMOVHBRstoreidx { 10981 break 10982 } 10983 if x.AuxInt != i-2 { 10984 break 10985 } 10986 if x.Aux != s { 10987 break 10988 } 10989 if p != x.Args[0] { 10990 break 10991 } 10992 if idx != x.Args[1] { 10993 break 10994 } 10995 w0 := x.Args[2] 10996 if w0.Op != OpS390XSRWconst { 10997 break 10998 } 10999 if w0.AuxInt != j-16 { 11000 break 11001 } 11002 if w != w0.Args[0] { 11003 break 11004 } 11005 mem := x.Args[3] 11006 if !(x.Uses == 1 && clobber(x)) { 11007 break 11008 } 11009 v.reset(OpS390XMOVWBRstoreidx) 11010 v.AuxInt = i - 2 11011 v.Aux = s 11012 v.AddArg(p) 11013 v.AddArg(idx) 11014 v.AddArg(w0) 11015 v.AddArg(mem) 11016 return true 11017 } 11018 return false 11019 } 11020 func rewriteValueS390X_OpS390XMOVHZload(v *Value, config *Config) bool { 11021 b := v.Block 11022 _ = b 11023 // match: (MOVHZload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) 11024 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 11025 // result: (MOVDreg x) 11026 for { 11027 off := v.AuxInt 11028 sym := v.Aux 11029 ptr := v.Args[0] 11030 v_1 := v.Args[1] 11031 if v_1.Op != OpS390XMOVHstore { 11032 break 11033 } 11034 off2 := v_1.AuxInt 11035 sym2 := v_1.Aux 11036 ptr2 := v_1.Args[0] 11037 x := v_1.Args[1] 11038 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 11039 break 11040 } 11041 v.reset(OpS390XMOVDreg) 11042 v.AddArg(x) 11043 return true 11044 } 11045 // match: (MOVHZload [off1] {sym} (ADDconst [off2] ptr) mem) 11046 // cond: is20Bit(off1+off2) 11047 // result: (MOVHZload [off1+off2] {sym} ptr mem) 11048 for { 11049 off1 := v.AuxInt 11050 sym := v.Aux 11051 v_0 := v.Args[0] 11052 if v_0.Op != OpS390XADDconst { 11053 break 11054 } 11055 off2 := v_0.AuxInt 11056 ptr := v_0.Args[0] 11057 mem := v.Args[1] 11058 if !(is20Bit(off1 + off2)) { 11059 break 11060 } 11061 v.reset(OpS390XMOVHZload) 11062 v.AuxInt = off1 + off2 11063 v.Aux = sym 11064 v.AddArg(ptr) 11065 v.AddArg(mem) 11066 return true 11067 } 11068 // match: (MOVHZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11069 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11070 // result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11071 for { 11072 off1 := v.AuxInt 11073 sym1 := v.Aux 11074 v_0 := v.Args[0] 11075 if v_0.Op != OpS390XMOVDaddr { 11076 break 11077 } 11078 off2 := v_0.AuxInt 11079 sym2 := v_0.Aux 11080 base := v_0.Args[0] 11081 mem := v.Args[1] 11082 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11083 break 11084 } 11085 v.reset(OpS390XMOVHZload) 11086 v.AuxInt = off1 + off2 11087 v.Aux = mergeSym(sym1, sym2) 11088 v.AddArg(base) 11089 v.AddArg(mem) 11090 return true 11091 } 11092 // match: (MOVHZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 11093 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11094 // result: (MOVHZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 11095 for { 11096 off1 := v.AuxInt 11097 sym1 := v.Aux 11098 v_0 := v.Args[0] 11099 if v_0.Op != OpS390XMOVDaddridx { 11100 break 11101 } 11102 off2 := v_0.AuxInt 11103 sym2 := v_0.Aux 11104 ptr := v_0.Args[0] 11105 idx := v_0.Args[1] 11106 mem := v.Args[1] 11107 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11108 break 11109 } 11110 v.reset(OpS390XMOVHZloadidx) 11111 v.AuxInt = off1 + off2 11112 v.Aux = mergeSym(sym1, sym2) 11113 v.AddArg(ptr) 11114 v.AddArg(idx) 11115 v.AddArg(mem) 11116 return true 11117 } 11118 // match: (MOVHZload [off] {sym} (ADD ptr idx) mem) 11119 // cond: ptr.Op != OpSB 11120 // result: (MOVHZloadidx [off] {sym} ptr idx mem) 11121 for { 11122 off := v.AuxInt 11123 sym := v.Aux 11124 v_0 := v.Args[0] 11125 if v_0.Op != OpS390XADD { 11126 break 11127 } 11128 ptr := v_0.Args[0] 11129 idx := v_0.Args[1] 11130 mem := v.Args[1] 11131 if !(ptr.Op != OpSB) { 11132 break 11133 } 11134 v.reset(OpS390XMOVHZloadidx) 11135 v.AuxInt = off 11136 v.Aux = sym 11137 v.AddArg(ptr) 11138 v.AddArg(idx) 11139 v.AddArg(mem) 11140 return true 11141 } 11142 return false 11143 } 11144 func rewriteValueS390X_OpS390XMOVHZloadidx(v *Value, config *Config) bool { 11145 b := v.Block 11146 _ = b 11147 // match: (MOVHZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 11148 // cond: 11149 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11150 for { 11151 c := v.AuxInt 11152 sym := v.Aux 11153 v_0 := v.Args[0] 11154 if v_0.Op != OpS390XADDconst { 11155 break 11156 } 11157 d := v_0.AuxInt 11158 ptr := v_0.Args[0] 11159 idx := v.Args[1] 11160 mem := v.Args[2] 11161 v.reset(OpS390XMOVHZloadidx) 11162 v.AuxInt = c + d 11163 v.Aux = sym 11164 v.AddArg(ptr) 11165 v.AddArg(idx) 11166 v.AddArg(mem) 11167 return true 11168 } 11169 // match: (MOVHZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 11170 // cond: 11171 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11172 for { 11173 c := v.AuxInt 11174 sym := v.Aux 11175 ptr := v.Args[0] 11176 v_1 := v.Args[1] 11177 if v_1.Op != OpS390XADDconst { 11178 break 11179 } 11180 d := v_1.AuxInt 11181 idx := v_1.Args[0] 11182 mem := v.Args[2] 11183 v.reset(OpS390XMOVHZloadidx) 11184 v.AuxInt = c + d 11185 v.Aux = sym 11186 v.AddArg(ptr) 11187 v.AddArg(idx) 11188 v.AddArg(mem) 11189 return true 11190 } 11191 return false 11192 } 11193 func rewriteValueS390X_OpS390XMOVHZreg(v *Value, config *Config) bool { 11194 b := v.Block 11195 _ = b 11196 // match: (MOVHZreg x:(MOVBZload _ _)) 11197 // cond: 11198 // result: (MOVDreg x) 11199 for { 11200 x := v.Args[0] 11201 if x.Op != OpS390XMOVBZload { 11202 break 11203 } 11204 v.reset(OpS390XMOVDreg) 11205 v.AddArg(x) 11206 return true 11207 } 11208 // match: (MOVHZreg x:(MOVHZload _ _)) 11209 // cond: 11210 // result: (MOVDreg x) 11211 for { 11212 x := v.Args[0] 11213 if x.Op != OpS390XMOVHZload { 11214 break 11215 } 11216 v.reset(OpS390XMOVDreg) 11217 v.AddArg(x) 11218 return true 11219 } 11220 // match: (MOVHZreg x:(Arg <t>)) 11221 // cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t) 11222 // result: (MOVDreg x) 11223 for { 11224 x := v.Args[0] 11225 if x.Op != OpArg { 11226 break 11227 } 11228 t := x.Type 11229 if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) { 11230 break 11231 } 11232 v.reset(OpS390XMOVDreg) 11233 v.AddArg(x) 11234 return true 11235 } 11236 // match: (MOVHZreg x:(MOVBZreg _)) 11237 // cond: 11238 // result: (MOVDreg x) 11239 for { 11240 x := v.Args[0] 11241 if x.Op != OpS390XMOVBZreg { 11242 break 11243 } 11244 v.reset(OpS390XMOVDreg) 11245 v.AddArg(x) 11246 return true 11247 } 11248 // match: (MOVHZreg x:(MOVHZreg _)) 11249 // cond: 11250 // result: (MOVDreg x) 11251 for { 11252 x := v.Args[0] 11253 if x.Op != OpS390XMOVHZreg { 11254 break 11255 } 11256 v.reset(OpS390XMOVDreg) 11257 v.AddArg(x) 11258 return true 11259 } 11260 // match: (MOVHZreg (MOVDconst [c])) 11261 // cond: 11262 // result: (MOVDconst [int64(uint16(c))]) 11263 for { 11264 v_0 := v.Args[0] 11265 if v_0.Op != OpS390XMOVDconst { 11266 break 11267 } 11268 c := v_0.AuxInt 11269 v.reset(OpS390XMOVDconst) 11270 v.AuxInt = int64(uint16(c)) 11271 return true 11272 } 11273 // match: (MOVHZreg x:(MOVHZload [off] {sym} ptr mem)) 11274 // cond: x.Uses == 1 && clobber(x) 11275 // result: @x.Block (MOVHZload <v.Type> [off] {sym} ptr mem) 11276 for { 11277 x := v.Args[0] 11278 if x.Op != OpS390XMOVHZload { 11279 break 11280 } 11281 off := x.AuxInt 11282 sym := x.Aux 11283 ptr := x.Args[0] 11284 mem := x.Args[1] 11285 if !(x.Uses == 1 && clobber(x)) { 11286 break 11287 } 11288 b = x.Block 11289 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, v.Type) 11290 v.reset(OpCopy) 11291 v.AddArg(v0) 11292 v0.AuxInt = off 11293 v0.Aux = sym 11294 v0.AddArg(ptr) 11295 v0.AddArg(mem) 11296 return true 11297 } 11298 // match: (MOVHZreg x:(MOVHZloadidx [off] {sym} ptr idx mem)) 11299 // cond: x.Uses == 1 && clobber(x) 11300 // result: @x.Block (MOVHZloadidx <v.Type> [off] {sym} ptr idx mem) 11301 for { 11302 x := v.Args[0] 11303 if x.Op != OpS390XMOVHZloadidx { 11304 break 11305 } 11306 off := x.AuxInt 11307 sym := x.Aux 11308 ptr := x.Args[0] 11309 idx := x.Args[1] 11310 mem := x.Args[2] 11311 if !(x.Uses == 1 && clobber(x)) { 11312 break 11313 } 11314 b = x.Block 11315 v0 := b.NewValue0(v.Pos, OpS390XMOVHZloadidx, v.Type) 11316 v.reset(OpCopy) 11317 v.AddArg(v0) 11318 v0.AuxInt = off 11319 v0.Aux = sym 11320 v0.AddArg(ptr) 11321 v0.AddArg(idx) 11322 v0.AddArg(mem) 11323 return true 11324 } 11325 return false 11326 } 11327 func rewriteValueS390X_OpS390XMOVHload(v *Value, config *Config) bool { 11328 b := v.Block 11329 _ = b 11330 // match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) 11331 // cond: is20Bit(off1+off2) 11332 // result: (MOVHload [off1+off2] {sym} ptr mem) 11333 for { 11334 off1 := v.AuxInt 11335 sym := v.Aux 11336 v_0 := v.Args[0] 11337 if v_0.Op != OpS390XADDconst { 11338 break 11339 } 11340 off2 := v_0.AuxInt 11341 ptr := v_0.Args[0] 11342 mem := v.Args[1] 11343 if !(is20Bit(off1 + off2)) { 11344 break 11345 } 11346 v.reset(OpS390XMOVHload) 11347 v.AuxInt = off1 + off2 11348 v.Aux = sym 11349 v.AddArg(ptr) 11350 v.AddArg(mem) 11351 return true 11352 } 11353 // match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11354 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11355 // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11356 for { 11357 off1 := v.AuxInt 11358 sym1 := v.Aux 11359 v_0 := v.Args[0] 11360 if v_0.Op != OpS390XMOVDaddr { 11361 break 11362 } 11363 off2 := v_0.AuxInt 11364 sym2 := v_0.Aux 11365 base := v_0.Args[0] 11366 mem := v.Args[1] 11367 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11368 break 11369 } 11370 v.reset(OpS390XMOVHload) 11371 v.AuxInt = off1 + off2 11372 v.Aux = mergeSym(sym1, sym2) 11373 v.AddArg(base) 11374 v.AddArg(mem) 11375 return true 11376 } 11377 return false 11378 } 11379 func rewriteValueS390X_OpS390XMOVHreg(v *Value, config *Config) bool { 11380 b := v.Block 11381 _ = b 11382 // match: (MOVHreg x:(MOVBload _ _)) 11383 // cond: 11384 // result: (MOVDreg x) 11385 for { 11386 x := v.Args[0] 11387 if x.Op != OpS390XMOVBload { 11388 break 11389 } 11390 v.reset(OpS390XMOVDreg) 11391 v.AddArg(x) 11392 return true 11393 } 11394 // match: (MOVHreg x:(MOVBZload _ _)) 11395 // cond: 11396 // result: (MOVDreg x) 11397 for { 11398 x := v.Args[0] 11399 if x.Op != OpS390XMOVBZload { 11400 break 11401 } 11402 v.reset(OpS390XMOVDreg) 11403 v.AddArg(x) 11404 return true 11405 } 11406 // match: (MOVHreg x:(MOVHload _ _)) 11407 // cond: 11408 // result: (MOVDreg x) 11409 for { 11410 x := v.Args[0] 11411 if x.Op != OpS390XMOVHload { 11412 break 11413 } 11414 v.reset(OpS390XMOVDreg) 11415 v.AddArg(x) 11416 return true 11417 } 11418 // match: (MOVHreg x:(Arg <t>)) 11419 // cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t) 11420 // result: (MOVDreg x) 11421 for { 11422 x := v.Args[0] 11423 if x.Op != OpArg { 11424 break 11425 } 11426 t := x.Type 11427 if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) { 11428 break 11429 } 11430 v.reset(OpS390XMOVDreg) 11431 v.AddArg(x) 11432 return true 11433 } 11434 // match: (MOVHreg x:(MOVBreg _)) 11435 // cond: 11436 // result: (MOVDreg x) 11437 for { 11438 x := v.Args[0] 11439 if x.Op != OpS390XMOVBreg { 11440 break 11441 } 11442 v.reset(OpS390XMOVDreg) 11443 v.AddArg(x) 11444 return true 11445 } 11446 // match: (MOVHreg x:(MOVBZreg _)) 11447 // cond: 11448 // result: (MOVDreg x) 11449 for { 11450 x := v.Args[0] 11451 if x.Op != OpS390XMOVBZreg { 11452 break 11453 } 11454 v.reset(OpS390XMOVDreg) 11455 v.AddArg(x) 11456 return true 11457 } 11458 // match: (MOVHreg x:(MOVHreg _)) 11459 // cond: 11460 // result: (MOVDreg x) 11461 for { 11462 x := v.Args[0] 11463 if x.Op != OpS390XMOVHreg { 11464 break 11465 } 11466 v.reset(OpS390XMOVDreg) 11467 v.AddArg(x) 11468 return true 11469 } 11470 // match: (MOVHreg (MOVDconst [c])) 11471 // cond: 11472 // result: (MOVDconst [int64(int16(c))]) 11473 for { 11474 v_0 := v.Args[0] 11475 if v_0.Op != OpS390XMOVDconst { 11476 break 11477 } 11478 c := v_0.AuxInt 11479 v.reset(OpS390XMOVDconst) 11480 v.AuxInt = int64(int16(c)) 11481 return true 11482 } 11483 // match: (MOVHreg x:(MOVHZload [off] {sym} ptr mem)) 11484 // cond: x.Uses == 1 && clobber(x) 11485 // result: @x.Block (MOVHload <v.Type> [off] {sym} ptr mem) 11486 for { 11487 x := v.Args[0] 11488 if x.Op != OpS390XMOVHZload { 11489 break 11490 } 11491 off := x.AuxInt 11492 sym := x.Aux 11493 ptr := x.Args[0] 11494 mem := x.Args[1] 11495 if !(x.Uses == 1 && clobber(x)) { 11496 break 11497 } 11498 b = x.Block 11499 v0 := b.NewValue0(v.Pos, OpS390XMOVHload, v.Type) 11500 v.reset(OpCopy) 11501 v.AddArg(v0) 11502 v0.AuxInt = off 11503 v0.Aux = sym 11504 v0.AddArg(ptr) 11505 v0.AddArg(mem) 11506 return true 11507 } 11508 return false 11509 } 11510 func rewriteValueS390X_OpS390XMOVHstore(v *Value, config *Config) bool { 11511 b := v.Block 11512 _ = b 11513 // match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem) 11514 // cond: 11515 // result: (MOVHstore [off] {sym} ptr x mem) 11516 for { 11517 off := v.AuxInt 11518 sym := v.Aux 11519 ptr := v.Args[0] 11520 v_1 := v.Args[1] 11521 if v_1.Op != OpS390XMOVHreg { 11522 break 11523 } 11524 x := v_1.Args[0] 11525 mem := v.Args[2] 11526 v.reset(OpS390XMOVHstore) 11527 v.AuxInt = off 11528 v.Aux = sym 11529 v.AddArg(ptr) 11530 v.AddArg(x) 11531 v.AddArg(mem) 11532 return true 11533 } 11534 // match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem) 11535 // cond: 11536 // result: (MOVHstore [off] {sym} ptr x mem) 11537 for { 11538 off := v.AuxInt 11539 sym := v.Aux 11540 ptr := v.Args[0] 11541 v_1 := v.Args[1] 11542 if v_1.Op != OpS390XMOVHZreg { 11543 break 11544 } 11545 x := v_1.Args[0] 11546 mem := v.Args[2] 11547 v.reset(OpS390XMOVHstore) 11548 v.AuxInt = off 11549 v.Aux = sym 11550 v.AddArg(ptr) 11551 v.AddArg(x) 11552 v.AddArg(mem) 11553 return true 11554 } 11555 // match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) 11556 // cond: is20Bit(off1+off2) 11557 // result: (MOVHstore [off1+off2] {sym} ptr val mem) 11558 for { 11559 off1 := v.AuxInt 11560 sym := v.Aux 11561 v_0 := v.Args[0] 11562 if v_0.Op != OpS390XADDconst { 11563 break 11564 } 11565 off2 := v_0.AuxInt 11566 ptr := v_0.Args[0] 11567 val := v.Args[1] 11568 mem := v.Args[2] 11569 if !(is20Bit(off1 + off2)) { 11570 break 11571 } 11572 v.reset(OpS390XMOVHstore) 11573 v.AuxInt = off1 + off2 11574 v.Aux = sym 11575 v.AddArg(ptr) 11576 v.AddArg(val) 11577 v.AddArg(mem) 11578 return true 11579 } 11580 // match: (MOVHstore [off] {sym} ptr (MOVDconst [c]) mem) 11581 // cond: validOff(off) && ptr.Op != OpSB 11582 // result: (MOVHstoreconst [makeValAndOff(int64(int16(c)),off)] {sym} ptr mem) 11583 for { 11584 off := v.AuxInt 11585 sym := v.Aux 11586 ptr := v.Args[0] 11587 v_1 := v.Args[1] 11588 if v_1.Op != OpS390XMOVDconst { 11589 break 11590 } 11591 c := v_1.AuxInt 11592 mem := v.Args[2] 11593 if !(validOff(off) && ptr.Op != OpSB) { 11594 break 11595 } 11596 v.reset(OpS390XMOVHstoreconst) 11597 v.AuxInt = makeValAndOff(int64(int16(c)), off) 11598 v.Aux = sym 11599 v.AddArg(ptr) 11600 v.AddArg(mem) 11601 return true 11602 } 11603 // match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 11604 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11605 // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 11606 for { 11607 off1 := v.AuxInt 11608 sym1 := v.Aux 11609 v_0 := v.Args[0] 11610 if v_0.Op != OpS390XMOVDaddr { 11611 break 11612 } 11613 off2 := v_0.AuxInt 11614 sym2 := v_0.Aux 11615 base := v_0.Args[0] 11616 val := v.Args[1] 11617 mem := v.Args[2] 11618 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11619 break 11620 } 11621 v.reset(OpS390XMOVHstore) 11622 v.AuxInt = off1 + off2 11623 v.Aux = mergeSym(sym1, sym2) 11624 v.AddArg(base) 11625 v.AddArg(val) 11626 v.AddArg(mem) 11627 return true 11628 } 11629 // match: (MOVHstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 11630 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11631 // result: (MOVHstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 11632 for { 11633 off1 := v.AuxInt 11634 sym1 := v.Aux 11635 v_0 := v.Args[0] 11636 if v_0.Op != OpS390XMOVDaddridx { 11637 break 11638 } 11639 off2 := v_0.AuxInt 11640 sym2 := v_0.Aux 11641 ptr := v_0.Args[0] 11642 idx := v_0.Args[1] 11643 val := v.Args[1] 11644 mem := v.Args[2] 11645 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11646 break 11647 } 11648 v.reset(OpS390XMOVHstoreidx) 11649 v.AuxInt = off1 + off2 11650 v.Aux = mergeSym(sym1, sym2) 11651 v.AddArg(ptr) 11652 v.AddArg(idx) 11653 v.AddArg(val) 11654 v.AddArg(mem) 11655 return true 11656 } 11657 // match: (MOVHstore [off] {sym} (ADD ptr idx) val mem) 11658 // cond: ptr.Op != OpSB 11659 // result: (MOVHstoreidx [off] {sym} ptr idx val mem) 11660 for { 11661 off := v.AuxInt 11662 sym := v.Aux 11663 v_0 := v.Args[0] 11664 if v_0.Op != OpS390XADD { 11665 break 11666 } 11667 ptr := v_0.Args[0] 11668 idx := v_0.Args[1] 11669 val := v.Args[1] 11670 mem := v.Args[2] 11671 if !(ptr.Op != OpSB) { 11672 break 11673 } 11674 v.reset(OpS390XMOVHstoreidx) 11675 v.AuxInt = off 11676 v.Aux = sym 11677 v.AddArg(ptr) 11678 v.AddArg(idx) 11679 v.AddArg(val) 11680 v.AddArg(mem) 11681 return true 11682 } 11683 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRDconst [16] w) mem)) 11684 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11685 // result: (MOVWstore [i-2] {s} p w mem) 11686 for { 11687 i := v.AuxInt 11688 s := v.Aux 11689 p := v.Args[0] 11690 w := v.Args[1] 11691 x := v.Args[2] 11692 if x.Op != OpS390XMOVHstore { 11693 break 11694 } 11695 if x.AuxInt != i-2 { 11696 break 11697 } 11698 if x.Aux != s { 11699 break 11700 } 11701 if p != x.Args[0] { 11702 break 11703 } 11704 x_1 := x.Args[1] 11705 if x_1.Op != OpS390XSRDconst { 11706 break 11707 } 11708 if x_1.AuxInt != 16 { 11709 break 11710 } 11711 if w != x_1.Args[0] { 11712 break 11713 } 11714 mem := x.Args[2] 11715 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11716 break 11717 } 11718 v.reset(OpS390XMOVWstore) 11719 v.AuxInt = i - 2 11720 v.Aux = s 11721 v.AddArg(p) 11722 v.AddArg(w) 11723 v.AddArg(mem) 11724 return true 11725 } 11726 // match: (MOVHstore [i] {s} p w0:(SRDconst [j] w) x:(MOVHstore [i-2] {s} p (SRDconst [j+16] w) mem)) 11727 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11728 // result: (MOVWstore [i-2] {s} p w0 mem) 11729 for { 11730 i := v.AuxInt 11731 s := v.Aux 11732 p := v.Args[0] 11733 w0 := v.Args[1] 11734 if w0.Op != OpS390XSRDconst { 11735 break 11736 } 11737 j := w0.AuxInt 11738 w := w0.Args[0] 11739 x := v.Args[2] 11740 if x.Op != OpS390XMOVHstore { 11741 break 11742 } 11743 if x.AuxInt != i-2 { 11744 break 11745 } 11746 if x.Aux != s { 11747 break 11748 } 11749 if p != x.Args[0] { 11750 break 11751 } 11752 x_1 := x.Args[1] 11753 if x_1.Op != OpS390XSRDconst { 11754 break 11755 } 11756 if x_1.AuxInt != j+16 { 11757 break 11758 } 11759 if w != x_1.Args[0] { 11760 break 11761 } 11762 mem := x.Args[2] 11763 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11764 break 11765 } 11766 v.reset(OpS390XMOVWstore) 11767 v.AuxInt = i - 2 11768 v.Aux = s 11769 v.AddArg(p) 11770 v.AddArg(w0) 11771 v.AddArg(mem) 11772 return true 11773 } 11774 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRWconst [16] w) mem)) 11775 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11776 // result: (MOVWstore [i-2] {s} p w mem) 11777 for { 11778 i := v.AuxInt 11779 s := v.Aux 11780 p := v.Args[0] 11781 w := v.Args[1] 11782 x := v.Args[2] 11783 if x.Op != OpS390XMOVHstore { 11784 break 11785 } 11786 if x.AuxInt != i-2 { 11787 break 11788 } 11789 if x.Aux != s { 11790 break 11791 } 11792 if p != x.Args[0] { 11793 break 11794 } 11795 x_1 := x.Args[1] 11796 if x_1.Op != OpS390XSRWconst { 11797 break 11798 } 11799 if x_1.AuxInt != 16 { 11800 break 11801 } 11802 if w != x_1.Args[0] { 11803 break 11804 } 11805 mem := x.Args[2] 11806 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11807 break 11808 } 11809 v.reset(OpS390XMOVWstore) 11810 v.AuxInt = i - 2 11811 v.Aux = s 11812 v.AddArg(p) 11813 v.AddArg(w) 11814 v.AddArg(mem) 11815 return true 11816 } 11817 // match: (MOVHstore [i] {s} p w0:(SRWconst [j] w) x:(MOVHstore [i-2] {s} p (SRWconst [j+16] w) mem)) 11818 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11819 // result: (MOVWstore [i-2] {s} p w0 mem) 11820 for { 11821 i := v.AuxInt 11822 s := v.Aux 11823 p := v.Args[0] 11824 w0 := v.Args[1] 11825 if w0.Op != OpS390XSRWconst { 11826 break 11827 } 11828 j := w0.AuxInt 11829 w := w0.Args[0] 11830 x := v.Args[2] 11831 if x.Op != OpS390XMOVHstore { 11832 break 11833 } 11834 if x.AuxInt != i-2 { 11835 break 11836 } 11837 if x.Aux != s { 11838 break 11839 } 11840 if p != x.Args[0] { 11841 break 11842 } 11843 x_1 := x.Args[1] 11844 if x_1.Op != OpS390XSRWconst { 11845 break 11846 } 11847 if x_1.AuxInt != j+16 { 11848 break 11849 } 11850 if w != x_1.Args[0] { 11851 break 11852 } 11853 mem := x.Args[2] 11854 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11855 break 11856 } 11857 v.reset(OpS390XMOVWstore) 11858 v.AuxInt = i - 2 11859 v.Aux = s 11860 v.AddArg(p) 11861 v.AddArg(w0) 11862 v.AddArg(mem) 11863 return true 11864 } 11865 return false 11866 } 11867 func rewriteValueS390X_OpS390XMOVHstoreconst(v *Value, config *Config) bool { 11868 b := v.Block 11869 _ = b 11870 // match: (MOVHstoreconst [sc] {s} (ADDconst [off] ptr) mem) 11871 // cond: ValAndOff(sc).canAdd(off) 11872 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 11873 for { 11874 sc := v.AuxInt 11875 s := v.Aux 11876 v_0 := v.Args[0] 11877 if v_0.Op != OpS390XADDconst { 11878 break 11879 } 11880 off := v_0.AuxInt 11881 ptr := v_0.Args[0] 11882 mem := v.Args[1] 11883 if !(ValAndOff(sc).canAdd(off)) { 11884 break 11885 } 11886 v.reset(OpS390XMOVHstoreconst) 11887 v.AuxInt = ValAndOff(sc).add(off) 11888 v.Aux = s 11889 v.AddArg(ptr) 11890 v.AddArg(mem) 11891 return true 11892 } 11893 // match: (MOVHstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 11894 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 11895 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 11896 for { 11897 sc := v.AuxInt 11898 sym1 := v.Aux 11899 v_0 := v.Args[0] 11900 if v_0.Op != OpS390XMOVDaddr { 11901 break 11902 } 11903 off := v_0.AuxInt 11904 sym2 := v_0.Aux 11905 ptr := v_0.Args[0] 11906 mem := v.Args[1] 11907 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 11908 break 11909 } 11910 v.reset(OpS390XMOVHstoreconst) 11911 v.AuxInt = ValAndOff(sc).add(off) 11912 v.Aux = mergeSym(sym1, sym2) 11913 v.AddArg(ptr) 11914 v.AddArg(mem) 11915 return true 11916 } 11917 // match: (MOVHstoreconst [c] {s} p x:(MOVHstoreconst [a] {s} p mem)) 11918 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 11919 // result: (MOVWstoreconst [makeValAndOff(ValAndOff(c).Val()&0xffff | ValAndOff(a).Val()<<16, ValAndOff(a).Off())] {s} p mem) 11920 for { 11921 c := v.AuxInt 11922 s := v.Aux 11923 p := v.Args[0] 11924 x := v.Args[1] 11925 if x.Op != OpS390XMOVHstoreconst { 11926 break 11927 } 11928 a := x.AuxInt 11929 if x.Aux != s { 11930 break 11931 } 11932 if p != x.Args[0] { 11933 break 11934 } 11935 mem := x.Args[1] 11936 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 11937 break 11938 } 11939 v.reset(OpS390XMOVWstoreconst) 11940 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xffff|ValAndOff(a).Val()<<16, ValAndOff(a).Off()) 11941 v.Aux = s 11942 v.AddArg(p) 11943 v.AddArg(mem) 11944 return true 11945 } 11946 return false 11947 } 11948 func rewriteValueS390X_OpS390XMOVHstoreidx(v *Value, config *Config) bool { 11949 b := v.Block 11950 _ = b 11951 // match: (MOVHstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 11952 // cond: 11953 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11954 for { 11955 c := v.AuxInt 11956 sym := v.Aux 11957 v_0 := v.Args[0] 11958 if v_0.Op != OpS390XADDconst { 11959 break 11960 } 11961 d := v_0.AuxInt 11962 ptr := v_0.Args[0] 11963 idx := v.Args[1] 11964 val := v.Args[2] 11965 mem := v.Args[3] 11966 v.reset(OpS390XMOVHstoreidx) 11967 v.AuxInt = c + d 11968 v.Aux = sym 11969 v.AddArg(ptr) 11970 v.AddArg(idx) 11971 v.AddArg(val) 11972 v.AddArg(mem) 11973 return true 11974 } 11975 // match: (MOVHstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 11976 // cond: 11977 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11978 for { 11979 c := v.AuxInt 11980 sym := v.Aux 11981 ptr := v.Args[0] 11982 v_1 := v.Args[1] 11983 if v_1.Op != OpS390XADDconst { 11984 break 11985 } 11986 d := v_1.AuxInt 11987 idx := v_1.Args[0] 11988 val := v.Args[2] 11989 mem := v.Args[3] 11990 v.reset(OpS390XMOVHstoreidx) 11991 v.AuxInt = c + d 11992 v.Aux = sym 11993 v.AddArg(ptr) 11994 v.AddArg(idx) 11995 v.AddArg(val) 11996 v.AddArg(mem) 11997 return true 11998 } 11999 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [16] w) mem)) 12000 // cond: x.Uses == 1 && clobber(x) 12001 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 12002 for { 12003 i := v.AuxInt 12004 s := v.Aux 12005 p := v.Args[0] 12006 idx := v.Args[1] 12007 w := v.Args[2] 12008 x := v.Args[3] 12009 if x.Op != OpS390XMOVHstoreidx { 12010 break 12011 } 12012 if x.AuxInt != i-2 { 12013 break 12014 } 12015 if x.Aux != s { 12016 break 12017 } 12018 if p != x.Args[0] { 12019 break 12020 } 12021 if idx != x.Args[1] { 12022 break 12023 } 12024 x_2 := x.Args[2] 12025 if x_2.Op != OpS390XSRDconst { 12026 break 12027 } 12028 if x_2.AuxInt != 16 { 12029 break 12030 } 12031 if w != x_2.Args[0] { 12032 break 12033 } 12034 mem := x.Args[3] 12035 if !(x.Uses == 1 && clobber(x)) { 12036 break 12037 } 12038 v.reset(OpS390XMOVWstoreidx) 12039 v.AuxInt = i - 2 12040 v.Aux = s 12041 v.AddArg(p) 12042 v.AddArg(idx) 12043 v.AddArg(w) 12044 v.AddArg(mem) 12045 return true 12046 } 12047 // match: (MOVHstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [j+16] w) mem)) 12048 // cond: x.Uses == 1 && clobber(x) 12049 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12050 for { 12051 i := v.AuxInt 12052 s := v.Aux 12053 p := v.Args[0] 12054 idx := v.Args[1] 12055 w0 := v.Args[2] 12056 if w0.Op != OpS390XSRDconst { 12057 break 12058 } 12059 j := w0.AuxInt 12060 w := w0.Args[0] 12061 x := v.Args[3] 12062 if x.Op != OpS390XMOVHstoreidx { 12063 break 12064 } 12065 if x.AuxInt != i-2 { 12066 break 12067 } 12068 if x.Aux != s { 12069 break 12070 } 12071 if p != x.Args[0] { 12072 break 12073 } 12074 if idx != x.Args[1] { 12075 break 12076 } 12077 x_2 := x.Args[2] 12078 if x_2.Op != OpS390XSRDconst { 12079 break 12080 } 12081 if x_2.AuxInt != j+16 { 12082 break 12083 } 12084 if w != x_2.Args[0] { 12085 break 12086 } 12087 mem := x.Args[3] 12088 if !(x.Uses == 1 && clobber(x)) { 12089 break 12090 } 12091 v.reset(OpS390XMOVWstoreidx) 12092 v.AuxInt = i - 2 12093 v.Aux = s 12094 v.AddArg(p) 12095 v.AddArg(idx) 12096 v.AddArg(w0) 12097 v.AddArg(mem) 12098 return true 12099 } 12100 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [16] w) mem)) 12101 // cond: x.Uses == 1 && clobber(x) 12102 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 12103 for { 12104 i := v.AuxInt 12105 s := v.Aux 12106 p := v.Args[0] 12107 idx := v.Args[1] 12108 w := v.Args[2] 12109 x := v.Args[3] 12110 if x.Op != OpS390XMOVHstoreidx { 12111 break 12112 } 12113 if x.AuxInt != i-2 { 12114 break 12115 } 12116 if x.Aux != s { 12117 break 12118 } 12119 if p != x.Args[0] { 12120 break 12121 } 12122 if idx != x.Args[1] { 12123 break 12124 } 12125 x_2 := x.Args[2] 12126 if x_2.Op != OpS390XSRWconst { 12127 break 12128 } 12129 if x_2.AuxInt != 16 { 12130 break 12131 } 12132 if w != x_2.Args[0] { 12133 break 12134 } 12135 mem := x.Args[3] 12136 if !(x.Uses == 1 && clobber(x)) { 12137 break 12138 } 12139 v.reset(OpS390XMOVWstoreidx) 12140 v.AuxInt = i - 2 12141 v.Aux = s 12142 v.AddArg(p) 12143 v.AddArg(idx) 12144 v.AddArg(w) 12145 v.AddArg(mem) 12146 return true 12147 } 12148 // match: (MOVHstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [j+16] w) mem)) 12149 // cond: x.Uses == 1 && clobber(x) 12150 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12151 for { 12152 i := v.AuxInt 12153 s := v.Aux 12154 p := v.Args[0] 12155 idx := v.Args[1] 12156 w0 := v.Args[2] 12157 if w0.Op != OpS390XSRWconst { 12158 break 12159 } 12160 j := w0.AuxInt 12161 w := w0.Args[0] 12162 x := v.Args[3] 12163 if x.Op != OpS390XMOVHstoreidx { 12164 break 12165 } 12166 if x.AuxInt != i-2 { 12167 break 12168 } 12169 if x.Aux != s { 12170 break 12171 } 12172 if p != x.Args[0] { 12173 break 12174 } 12175 if idx != x.Args[1] { 12176 break 12177 } 12178 x_2 := x.Args[2] 12179 if x_2.Op != OpS390XSRWconst { 12180 break 12181 } 12182 if x_2.AuxInt != j+16 { 12183 break 12184 } 12185 if w != x_2.Args[0] { 12186 break 12187 } 12188 mem := x.Args[3] 12189 if !(x.Uses == 1 && clobber(x)) { 12190 break 12191 } 12192 v.reset(OpS390XMOVWstoreidx) 12193 v.AuxInt = i - 2 12194 v.Aux = s 12195 v.AddArg(p) 12196 v.AddArg(idx) 12197 v.AddArg(w0) 12198 v.AddArg(mem) 12199 return true 12200 } 12201 return false 12202 } 12203 func rewriteValueS390X_OpS390XMOVWBRstore(v *Value, config *Config) bool { 12204 b := v.Block 12205 _ = b 12206 // match: (MOVWBRstore [i] {s} p (SRDconst [32] w) x:(MOVWBRstore [i-4] {s} p w mem)) 12207 // cond: x.Uses == 1 && clobber(x) 12208 // result: (MOVDBRstore [i-4] {s} p w mem) 12209 for { 12210 i := v.AuxInt 12211 s := v.Aux 12212 p := v.Args[0] 12213 v_1 := v.Args[1] 12214 if v_1.Op != OpS390XSRDconst { 12215 break 12216 } 12217 if v_1.AuxInt != 32 { 12218 break 12219 } 12220 w := v_1.Args[0] 12221 x := v.Args[2] 12222 if x.Op != OpS390XMOVWBRstore { 12223 break 12224 } 12225 if x.AuxInt != i-4 { 12226 break 12227 } 12228 if x.Aux != s { 12229 break 12230 } 12231 if p != x.Args[0] { 12232 break 12233 } 12234 if w != x.Args[1] { 12235 break 12236 } 12237 mem := x.Args[2] 12238 if !(x.Uses == 1 && clobber(x)) { 12239 break 12240 } 12241 v.reset(OpS390XMOVDBRstore) 12242 v.AuxInt = i - 4 12243 v.Aux = s 12244 v.AddArg(p) 12245 v.AddArg(w) 12246 v.AddArg(mem) 12247 return true 12248 } 12249 // match: (MOVWBRstore [i] {s} p (SRDconst [j] w) x:(MOVWBRstore [i-4] {s} p w0:(SRDconst [j-32] w) mem)) 12250 // cond: x.Uses == 1 && clobber(x) 12251 // result: (MOVDBRstore [i-4] {s} p w0 mem) 12252 for { 12253 i := v.AuxInt 12254 s := v.Aux 12255 p := v.Args[0] 12256 v_1 := v.Args[1] 12257 if v_1.Op != OpS390XSRDconst { 12258 break 12259 } 12260 j := v_1.AuxInt 12261 w := v_1.Args[0] 12262 x := v.Args[2] 12263 if x.Op != OpS390XMOVWBRstore { 12264 break 12265 } 12266 if x.AuxInt != i-4 { 12267 break 12268 } 12269 if x.Aux != s { 12270 break 12271 } 12272 if p != x.Args[0] { 12273 break 12274 } 12275 w0 := x.Args[1] 12276 if w0.Op != OpS390XSRDconst { 12277 break 12278 } 12279 if w0.AuxInt != j-32 { 12280 break 12281 } 12282 if w != w0.Args[0] { 12283 break 12284 } 12285 mem := x.Args[2] 12286 if !(x.Uses == 1 && clobber(x)) { 12287 break 12288 } 12289 v.reset(OpS390XMOVDBRstore) 12290 v.AuxInt = i - 4 12291 v.Aux = s 12292 v.AddArg(p) 12293 v.AddArg(w0) 12294 v.AddArg(mem) 12295 return true 12296 } 12297 return false 12298 } 12299 func rewriteValueS390X_OpS390XMOVWBRstoreidx(v *Value, config *Config) bool { 12300 b := v.Block 12301 _ = b 12302 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [32] w) x:(MOVWBRstoreidx [i-4] {s} p idx w mem)) 12303 // cond: x.Uses == 1 && clobber(x) 12304 // result: (MOVDBRstoreidx [i-4] {s} p idx w mem) 12305 for { 12306 i := v.AuxInt 12307 s := v.Aux 12308 p := v.Args[0] 12309 idx := v.Args[1] 12310 v_2 := v.Args[2] 12311 if v_2.Op != OpS390XSRDconst { 12312 break 12313 } 12314 if v_2.AuxInt != 32 { 12315 break 12316 } 12317 w := v_2.Args[0] 12318 x := v.Args[3] 12319 if x.Op != OpS390XMOVWBRstoreidx { 12320 break 12321 } 12322 if x.AuxInt != i-4 { 12323 break 12324 } 12325 if x.Aux != s { 12326 break 12327 } 12328 if p != x.Args[0] { 12329 break 12330 } 12331 if idx != x.Args[1] { 12332 break 12333 } 12334 if w != x.Args[2] { 12335 break 12336 } 12337 mem := x.Args[3] 12338 if !(x.Uses == 1 && clobber(x)) { 12339 break 12340 } 12341 v.reset(OpS390XMOVDBRstoreidx) 12342 v.AuxInt = i - 4 12343 v.Aux = s 12344 v.AddArg(p) 12345 v.AddArg(idx) 12346 v.AddArg(w) 12347 v.AddArg(mem) 12348 return true 12349 } 12350 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVWBRstoreidx [i-4] {s} p idx w0:(SRDconst [j-32] w) mem)) 12351 // cond: x.Uses == 1 && clobber(x) 12352 // result: (MOVDBRstoreidx [i-4] {s} p idx w0 mem) 12353 for { 12354 i := v.AuxInt 12355 s := v.Aux 12356 p := v.Args[0] 12357 idx := v.Args[1] 12358 v_2 := v.Args[2] 12359 if v_2.Op != OpS390XSRDconst { 12360 break 12361 } 12362 j := v_2.AuxInt 12363 w := v_2.Args[0] 12364 x := v.Args[3] 12365 if x.Op != OpS390XMOVWBRstoreidx { 12366 break 12367 } 12368 if x.AuxInt != i-4 { 12369 break 12370 } 12371 if x.Aux != s { 12372 break 12373 } 12374 if p != x.Args[0] { 12375 break 12376 } 12377 if idx != x.Args[1] { 12378 break 12379 } 12380 w0 := x.Args[2] 12381 if w0.Op != OpS390XSRDconst { 12382 break 12383 } 12384 if w0.AuxInt != j-32 { 12385 break 12386 } 12387 if w != w0.Args[0] { 12388 break 12389 } 12390 mem := x.Args[3] 12391 if !(x.Uses == 1 && clobber(x)) { 12392 break 12393 } 12394 v.reset(OpS390XMOVDBRstoreidx) 12395 v.AuxInt = i - 4 12396 v.Aux = s 12397 v.AddArg(p) 12398 v.AddArg(idx) 12399 v.AddArg(w0) 12400 v.AddArg(mem) 12401 return true 12402 } 12403 return false 12404 } 12405 func rewriteValueS390X_OpS390XMOVWZload(v *Value, config *Config) bool { 12406 b := v.Block 12407 _ = b 12408 // match: (MOVWZload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) 12409 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 12410 // result: (MOVDreg x) 12411 for { 12412 off := v.AuxInt 12413 sym := v.Aux 12414 ptr := v.Args[0] 12415 v_1 := v.Args[1] 12416 if v_1.Op != OpS390XMOVWstore { 12417 break 12418 } 12419 off2 := v_1.AuxInt 12420 sym2 := v_1.Aux 12421 ptr2 := v_1.Args[0] 12422 x := v_1.Args[1] 12423 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 12424 break 12425 } 12426 v.reset(OpS390XMOVDreg) 12427 v.AddArg(x) 12428 return true 12429 } 12430 // match: (MOVWZload [off1] {sym} (ADDconst [off2] ptr) mem) 12431 // cond: is20Bit(off1+off2) 12432 // result: (MOVWZload [off1+off2] {sym} ptr mem) 12433 for { 12434 off1 := v.AuxInt 12435 sym := v.Aux 12436 v_0 := v.Args[0] 12437 if v_0.Op != OpS390XADDconst { 12438 break 12439 } 12440 off2 := v_0.AuxInt 12441 ptr := v_0.Args[0] 12442 mem := v.Args[1] 12443 if !(is20Bit(off1 + off2)) { 12444 break 12445 } 12446 v.reset(OpS390XMOVWZload) 12447 v.AuxInt = off1 + off2 12448 v.Aux = sym 12449 v.AddArg(ptr) 12450 v.AddArg(mem) 12451 return true 12452 } 12453 // match: (MOVWZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12454 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12455 // result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12456 for { 12457 off1 := v.AuxInt 12458 sym1 := v.Aux 12459 v_0 := v.Args[0] 12460 if v_0.Op != OpS390XMOVDaddr { 12461 break 12462 } 12463 off2 := v_0.AuxInt 12464 sym2 := v_0.Aux 12465 base := v_0.Args[0] 12466 mem := v.Args[1] 12467 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12468 break 12469 } 12470 v.reset(OpS390XMOVWZload) 12471 v.AuxInt = off1 + off2 12472 v.Aux = mergeSym(sym1, sym2) 12473 v.AddArg(base) 12474 v.AddArg(mem) 12475 return true 12476 } 12477 // match: (MOVWZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 12478 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12479 // result: (MOVWZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 12480 for { 12481 off1 := v.AuxInt 12482 sym1 := v.Aux 12483 v_0 := v.Args[0] 12484 if v_0.Op != OpS390XMOVDaddridx { 12485 break 12486 } 12487 off2 := v_0.AuxInt 12488 sym2 := v_0.Aux 12489 ptr := v_0.Args[0] 12490 idx := v_0.Args[1] 12491 mem := v.Args[1] 12492 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12493 break 12494 } 12495 v.reset(OpS390XMOVWZloadidx) 12496 v.AuxInt = off1 + off2 12497 v.Aux = mergeSym(sym1, sym2) 12498 v.AddArg(ptr) 12499 v.AddArg(idx) 12500 v.AddArg(mem) 12501 return true 12502 } 12503 // match: (MOVWZload [off] {sym} (ADD ptr idx) mem) 12504 // cond: ptr.Op != OpSB 12505 // result: (MOVWZloadidx [off] {sym} ptr idx mem) 12506 for { 12507 off := v.AuxInt 12508 sym := v.Aux 12509 v_0 := v.Args[0] 12510 if v_0.Op != OpS390XADD { 12511 break 12512 } 12513 ptr := v_0.Args[0] 12514 idx := v_0.Args[1] 12515 mem := v.Args[1] 12516 if !(ptr.Op != OpSB) { 12517 break 12518 } 12519 v.reset(OpS390XMOVWZloadidx) 12520 v.AuxInt = off 12521 v.Aux = sym 12522 v.AddArg(ptr) 12523 v.AddArg(idx) 12524 v.AddArg(mem) 12525 return true 12526 } 12527 return false 12528 } 12529 func rewriteValueS390X_OpS390XMOVWZloadidx(v *Value, config *Config) bool { 12530 b := v.Block 12531 _ = b 12532 // match: (MOVWZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 12533 // cond: 12534 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12535 for { 12536 c := v.AuxInt 12537 sym := v.Aux 12538 v_0 := v.Args[0] 12539 if v_0.Op != OpS390XADDconst { 12540 break 12541 } 12542 d := v_0.AuxInt 12543 ptr := v_0.Args[0] 12544 idx := v.Args[1] 12545 mem := v.Args[2] 12546 v.reset(OpS390XMOVWZloadidx) 12547 v.AuxInt = c + d 12548 v.Aux = sym 12549 v.AddArg(ptr) 12550 v.AddArg(idx) 12551 v.AddArg(mem) 12552 return true 12553 } 12554 // match: (MOVWZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 12555 // cond: 12556 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12557 for { 12558 c := v.AuxInt 12559 sym := v.Aux 12560 ptr := v.Args[0] 12561 v_1 := v.Args[1] 12562 if v_1.Op != OpS390XADDconst { 12563 break 12564 } 12565 d := v_1.AuxInt 12566 idx := v_1.Args[0] 12567 mem := v.Args[2] 12568 v.reset(OpS390XMOVWZloadidx) 12569 v.AuxInt = c + d 12570 v.Aux = sym 12571 v.AddArg(ptr) 12572 v.AddArg(idx) 12573 v.AddArg(mem) 12574 return true 12575 } 12576 return false 12577 } 12578 func rewriteValueS390X_OpS390XMOVWZreg(v *Value, config *Config) bool { 12579 b := v.Block 12580 _ = b 12581 // match: (MOVWZreg x:(MOVBZload _ _)) 12582 // cond: 12583 // result: (MOVDreg x) 12584 for { 12585 x := v.Args[0] 12586 if x.Op != OpS390XMOVBZload { 12587 break 12588 } 12589 v.reset(OpS390XMOVDreg) 12590 v.AddArg(x) 12591 return true 12592 } 12593 // match: (MOVWZreg x:(MOVHZload _ _)) 12594 // cond: 12595 // result: (MOVDreg x) 12596 for { 12597 x := v.Args[0] 12598 if x.Op != OpS390XMOVHZload { 12599 break 12600 } 12601 v.reset(OpS390XMOVDreg) 12602 v.AddArg(x) 12603 return true 12604 } 12605 // match: (MOVWZreg x:(MOVWZload _ _)) 12606 // cond: 12607 // result: (MOVDreg x) 12608 for { 12609 x := v.Args[0] 12610 if x.Op != OpS390XMOVWZload { 12611 break 12612 } 12613 v.reset(OpS390XMOVDreg) 12614 v.AddArg(x) 12615 return true 12616 } 12617 // match: (MOVWZreg x:(Arg <t>)) 12618 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t) 12619 // result: (MOVDreg x) 12620 for { 12621 x := v.Args[0] 12622 if x.Op != OpArg { 12623 break 12624 } 12625 t := x.Type 12626 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) { 12627 break 12628 } 12629 v.reset(OpS390XMOVDreg) 12630 v.AddArg(x) 12631 return true 12632 } 12633 // match: (MOVWZreg x:(MOVBZreg _)) 12634 // cond: 12635 // result: (MOVDreg x) 12636 for { 12637 x := v.Args[0] 12638 if x.Op != OpS390XMOVBZreg { 12639 break 12640 } 12641 v.reset(OpS390XMOVDreg) 12642 v.AddArg(x) 12643 return true 12644 } 12645 // match: (MOVWZreg x:(MOVHZreg _)) 12646 // cond: 12647 // result: (MOVDreg x) 12648 for { 12649 x := v.Args[0] 12650 if x.Op != OpS390XMOVHZreg { 12651 break 12652 } 12653 v.reset(OpS390XMOVDreg) 12654 v.AddArg(x) 12655 return true 12656 } 12657 // match: (MOVWZreg x:(MOVWZreg _)) 12658 // cond: 12659 // result: (MOVDreg x) 12660 for { 12661 x := v.Args[0] 12662 if x.Op != OpS390XMOVWZreg { 12663 break 12664 } 12665 v.reset(OpS390XMOVDreg) 12666 v.AddArg(x) 12667 return true 12668 } 12669 // match: (MOVWZreg (MOVDconst [c])) 12670 // cond: 12671 // result: (MOVDconst [int64(uint32(c))]) 12672 for { 12673 v_0 := v.Args[0] 12674 if v_0.Op != OpS390XMOVDconst { 12675 break 12676 } 12677 c := v_0.AuxInt 12678 v.reset(OpS390XMOVDconst) 12679 v.AuxInt = int64(uint32(c)) 12680 return true 12681 } 12682 // match: (MOVWZreg x:(MOVWZload [off] {sym} ptr mem)) 12683 // cond: x.Uses == 1 && clobber(x) 12684 // result: @x.Block (MOVWZload <v.Type> [off] {sym} ptr mem) 12685 for { 12686 x := v.Args[0] 12687 if x.Op != OpS390XMOVWZload { 12688 break 12689 } 12690 off := x.AuxInt 12691 sym := x.Aux 12692 ptr := x.Args[0] 12693 mem := x.Args[1] 12694 if !(x.Uses == 1 && clobber(x)) { 12695 break 12696 } 12697 b = x.Block 12698 v0 := b.NewValue0(v.Pos, OpS390XMOVWZload, v.Type) 12699 v.reset(OpCopy) 12700 v.AddArg(v0) 12701 v0.AuxInt = off 12702 v0.Aux = sym 12703 v0.AddArg(ptr) 12704 v0.AddArg(mem) 12705 return true 12706 } 12707 // match: (MOVWZreg x:(MOVWZloadidx [off] {sym} ptr idx mem)) 12708 // cond: x.Uses == 1 && clobber(x) 12709 // result: @x.Block (MOVWZloadidx <v.Type> [off] {sym} ptr idx mem) 12710 for { 12711 x := v.Args[0] 12712 if x.Op != OpS390XMOVWZloadidx { 12713 break 12714 } 12715 off := x.AuxInt 12716 sym := x.Aux 12717 ptr := x.Args[0] 12718 idx := x.Args[1] 12719 mem := x.Args[2] 12720 if !(x.Uses == 1 && clobber(x)) { 12721 break 12722 } 12723 b = x.Block 12724 v0 := b.NewValue0(v.Pos, OpS390XMOVWZloadidx, v.Type) 12725 v.reset(OpCopy) 12726 v.AddArg(v0) 12727 v0.AuxInt = off 12728 v0.Aux = sym 12729 v0.AddArg(ptr) 12730 v0.AddArg(idx) 12731 v0.AddArg(mem) 12732 return true 12733 } 12734 return false 12735 } 12736 func rewriteValueS390X_OpS390XMOVWload(v *Value, config *Config) bool { 12737 b := v.Block 12738 _ = b 12739 // match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) 12740 // cond: is20Bit(off1+off2) 12741 // result: (MOVWload [off1+off2] {sym} ptr mem) 12742 for { 12743 off1 := v.AuxInt 12744 sym := v.Aux 12745 v_0 := v.Args[0] 12746 if v_0.Op != OpS390XADDconst { 12747 break 12748 } 12749 off2 := v_0.AuxInt 12750 ptr := v_0.Args[0] 12751 mem := v.Args[1] 12752 if !(is20Bit(off1 + off2)) { 12753 break 12754 } 12755 v.reset(OpS390XMOVWload) 12756 v.AuxInt = off1 + off2 12757 v.Aux = sym 12758 v.AddArg(ptr) 12759 v.AddArg(mem) 12760 return true 12761 } 12762 // match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12763 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12764 // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12765 for { 12766 off1 := v.AuxInt 12767 sym1 := v.Aux 12768 v_0 := v.Args[0] 12769 if v_0.Op != OpS390XMOVDaddr { 12770 break 12771 } 12772 off2 := v_0.AuxInt 12773 sym2 := v_0.Aux 12774 base := v_0.Args[0] 12775 mem := v.Args[1] 12776 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12777 break 12778 } 12779 v.reset(OpS390XMOVWload) 12780 v.AuxInt = off1 + off2 12781 v.Aux = mergeSym(sym1, sym2) 12782 v.AddArg(base) 12783 v.AddArg(mem) 12784 return true 12785 } 12786 return false 12787 } 12788 func rewriteValueS390X_OpS390XMOVWreg(v *Value, config *Config) bool { 12789 b := v.Block 12790 _ = b 12791 // match: (MOVWreg x:(MOVBload _ _)) 12792 // cond: 12793 // result: (MOVDreg x) 12794 for { 12795 x := v.Args[0] 12796 if x.Op != OpS390XMOVBload { 12797 break 12798 } 12799 v.reset(OpS390XMOVDreg) 12800 v.AddArg(x) 12801 return true 12802 } 12803 // match: (MOVWreg x:(MOVBZload _ _)) 12804 // cond: 12805 // result: (MOVDreg x) 12806 for { 12807 x := v.Args[0] 12808 if x.Op != OpS390XMOVBZload { 12809 break 12810 } 12811 v.reset(OpS390XMOVDreg) 12812 v.AddArg(x) 12813 return true 12814 } 12815 // match: (MOVWreg x:(MOVHload _ _)) 12816 // cond: 12817 // result: (MOVDreg x) 12818 for { 12819 x := v.Args[0] 12820 if x.Op != OpS390XMOVHload { 12821 break 12822 } 12823 v.reset(OpS390XMOVDreg) 12824 v.AddArg(x) 12825 return true 12826 } 12827 // match: (MOVWreg x:(MOVHZload _ _)) 12828 // cond: 12829 // result: (MOVDreg x) 12830 for { 12831 x := v.Args[0] 12832 if x.Op != OpS390XMOVHZload { 12833 break 12834 } 12835 v.reset(OpS390XMOVDreg) 12836 v.AddArg(x) 12837 return true 12838 } 12839 // match: (MOVWreg x:(MOVWload _ _)) 12840 // cond: 12841 // result: (MOVDreg x) 12842 for { 12843 x := v.Args[0] 12844 if x.Op != OpS390XMOVWload { 12845 break 12846 } 12847 v.reset(OpS390XMOVDreg) 12848 v.AddArg(x) 12849 return true 12850 } 12851 // match: (MOVWreg x:(Arg <t>)) 12852 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t) 12853 // result: (MOVDreg x) 12854 for { 12855 x := v.Args[0] 12856 if x.Op != OpArg { 12857 break 12858 } 12859 t := x.Type 12860 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) { 12861 break 12862 } 12863 v.reset(OpS390XMOVDreg) 12864 v.AddArg(x) 12865 return true 12866 } 12867 // match: (MOVWreg x:(MOVBreg _)) 12868 // cond: 12869 // result: (MOVDreg x) 12870 for { 12871 x := v.Args[0] 12872 if x.Op != OpS390XMOVBreg { 12873 break 12874 } 12875 v.reset(OpS390XMOVDreg) 12876 v.AddArg(x) 12877 return true 12878 } 12879 // match: (MOVWreg x:(MOVBZreg _)) 12880 // cond: 12881 // result: (MOVDreg x) 12882 for { 12883 x := v.Args[0] 12884 if x.Op != OpS390XMOVBZreg { 12885 break 12886 } 12887 v.reset(OpS390XMOVDreg) 12888 v.AddArg(x) 12889 return true 12890 } 12891 // match: (MOVWreg x:(MOVHreg _)) 12892 // cond: 12893 // result: (MOVDreg x) 12894 for { 12895 x := v.Args[0] 12896 if x.Op != OpS390XMOVHreg { 12897 break 12898 } 12899 v.reset(OpS390XMOVDreg) 12900 v.AddArg(x) 12901 return true 12902 } 12903 // match: (MOVWreg x:(MOVHreg _)) 12904 // cond: 12905 // result: (MOVDreg x) 12906 for { 12907 x := v.Args[0] 12908 if x.Op != OpS390XMOVHreg { 12909 break 12910 } 12911 v.reset(OpS390XMOVDreg) 12912 v.AddArg(x) 12913 return true 12914 } 12915 // match: (MOVWreg x:(MOVWreg _)) 12916 // cond: 12917 // result: (MOVDreg x) 12918 for { 12919 x := v.Args[0] 12920 if x.Op != OpS390XMOVWreg { 12921 break 12922 } 12923 v.reset(OpS390XMOVDreg) 12924 v.AddArg(x) 12925 return true 12926 } 12927 // match: (MOVWreg (MOVDconst [c])) 12928 // cond: 12929 // result: (MOVDconst [int64(int32(c))]) 12930 for { 12931 v_0 := v.Args[0] 12932 if v_0.Op != OpS390XMOVDconst { 12933 break 12934 } 12935 c := v_0.AuxInt 12936 v.reset(OpS390XMOVDconst) 12937 v.AuxInt = int64(int32(c)) 12938 return true 12939 } 12940 // match: (MOVWreg x:(MOVWZload [off] {sym} ptr mem)) 12941 // cond: x.Uses == 1 && clobber(x) 12942 // result: @x.Block (MOVWload <v.Type> [off] {sym} ptr mem) 12943 for { 12944 x := v.Args[0] 12945 if x.Op != OpS390XMOVWZload { 12946 break 12947 } 12948 off := x.AuxInt 12949 sym := x.Aux 12950 ptr := x.Args[0] 12951 mem := x.Args[1] 12952 if !(x.Uses == 1 && clobber(x)) { 12953 break 12954 } 12955 b = x.Block 12956 v0 := b.NewValue0(v.Pos, OpS390XMOVWload, v.Type) 12957 v.reset(OpCopy) 12958 v.AddArg(v0) 12959 v0.AuxInt = off 12960 v0.Aux = sym 12961 v0.AddArg(ptr) 12962 v0.AddArg(mem) 12963 return true 12964 } 12965 return false 12966 } 12967 func rewriteValueS390X_OpS390XMOVWstore(v *Value, config *Config) bool { 12968 b := v.Block 12969 _ = b 12970 // match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem) 12971 // cond: 12972 // result: (MOVWstore [off] {sym} ptr x mem) 12973 for { 12974 off := v.AuxInt 12975 sym := v.Aux 12976 ptr := v.Args[0] 12977 v_1 := v.Args[1] 12978 if v_1.Op != OpS390XMOVWreg { 12979 break 12980 } 12981 x := v_1.Args[0] 12982 mem := v.Args[2] 12983 v.reset(OpS390XMOVWstore) 12984 v.AuxInt = off 12985 v.Aux = sym 12986 v.AddArg(ptr) 12987 v.AddArg(x) 12988 v.AddArg(mem) 12989 return true 12990 } 12991 // match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem) 12992 // cond: 12993 // result: (MOVWstore [off] {sym} ptr x mem) 12994 for { 12995 off := v.AuxInt 12996 sym := v.Aux 12997 ptr := v.Args[0] 12998 v_1 := v.Args[1] 12999 if v_1.Op != OpS390XMOVWZreg { 13000 break 13001 } 13002 x := v_1.Args[0] 13003 mem := v.Args[2] 13004 v.reset(OpS390XMOVWstore) 13005 v.AuxInt = off 13006 v.Aux = sym 13007 v.AddArg(ptr) 13008 v.AddArg(x) 13009 v.AddArg(mem) 13010 return true 13011 } 13012 // match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) 13013 // cond: is20Bit(off1+off2) 13014 // result: (MOVWstore [off1+off2] {sym} ptr val mem) 13015 for { 13016 off1 := v.AuxInt 13017 sym := v.Aux 13018 v_0 := v.Args[0] 13019 if v_0.Op != OpS390XADDconst { 13020 break 13021 } 13022 off2 := v_0.AuxInt 13023 ptr := v_0.Args[0] 13024 val := v.Args[1] 13025 mem := v.Args[2] 13026 if !(is20Bit(off1 + off2)) { 13027 break 13028 } 13029 v.reset(OpS390XMOVWstore) 13030 v.AuxInt = off1 + off2 13031 v.Aux = sym 13032 v.AddArg(ptr) 13033 v.AddArg(val) 13034 v.AddArg(mem) 13035 return true 13036 } 13037 // match: (MOVWstore [off] {sym} ptr (MOVDconst [c]) mem) 13038 // cond: validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB 13039 // result: (MOVWstoreconst [makeValAndOff(int64(int32(c)),off)] {sym} ptr mem) 13040 for { 13041 off := v.AuxInt 13042 sym := v.Aux 13043 ptr := v.Args[0] 13044 v_1 := v.Args[1] 13045 if v_1.Op != OpS390XMOVDconst { 13046 break 13047 } 13048 c := v_1.AuxInt 13049 mem := v.Args[2] 13050 if !(validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB) { 13051 break 13052 } 13053 v.reset(OpS390XMOVWstoreconst) 13054 v.AuxInt = makeValAndOff(int64(int32(c)), off) 13055 v.Aux = sym 13056 v.AddArg(ptr) 13057 v.AddArg(mem) 13058 return true 13059 } 13060 // match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 13061 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13062 // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 13063 for { 13064 off1 := v.AuxInt 13065 sym1 := v.Aux 13066 v_0 := v.Args[0] 13067 if v_0.Op != OpS390XMOVDaddr { 13068 break 13069 } 13070 off2 := v_0.AuxInt 13071 sym2 := v_0.Aux 13072 base := v_0.Args[0] 13073 val := v.Args[1] 13074 mem := v.Args[2] 13075 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13076 break 13077 } 13078 v.reset(OpS390XMOVWstore) 13079 v.AuxInt = off1 + off2 13080 v.Aux = mergeSym(sym1, sym2) 13081 v.AddArg(base) 13082 v.AddArg(val) 13083 v.AddArg(mem) 13084 return true 13085 } 13086 // match: (MOVWstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 13087 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13088 // result: (MOVWstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 13089 for { 13090 off1 := v.AuxInt 13091 sym1 := v.Aux 13092 v_0 := v.Args[0] 13093 if v_0.Op != OpS390XMOVDaddridx { 13094 break 13095 } 13096 off2 := v_0.AuxInt 13097 sym2 := v_0.Aux 13098 ptr := v_0.Args[0] 13099 idx := v_0.Args[1] 13100 val := v.Args[1] 13101 mem := v.Args[2] 13102 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13103 break 13104 } 13105 v.reset(OpS390XMOVWstoreidx) 13106 v.AuxInt = off1 + off2 13107 v.Aux = mergeSym(sym1, sym2) 13108 v.AddArg(ptr) 13109 v.AddArg(idx) 13110 v.AddArg(val) 13111 v.AddArg(mem) 13112 return true 13113 } 13114 // match: (MOVWstore [off] {sym} (ADD ptr idx) val mem) 13115 // cond: ptr.Op != OpSB 13116 // result: (MOVWstoreidx [off] {sym} ptr idx val mem) 13117 for { 13118 off := v.AuxInt 13119 sym := v.Aux 13120 v_0 := v.Args[0] 13121 if v_0.Op != OpS390XADD { 13122 break 13123 } 13124 ptr := v_0.Args[0] 13125 idx := v_0.Args[1] 13126 val := v.Args[1] 13127 mem := v.Args[2] 13128 if !(ptr.Op != OpSB) { 13129 break 13130 } 13131 v.reset(OpS390XMOVWstoreidx) 13132 v.AuxInt = off 13133 v.Aux = sym 13134 v.AddArg(ptr) 13135 v.AddArg(idx) 13136 v.AddArg(val) 13137 v.AddArg(mem) 13138 return true 13139 } 13140 // match: (MOVWstore [i] {s} p (SRDconst [32] w) x:(MOVWstore [i-4] {s} p w mem)) 13141 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13142 // result: (MOVDstore [i-4] {s} p w mem) 13143 for { 13144 i := v.AuxInt 13145 s := v.Aux 13146 p := v.Args[0] 13147 v_1 := v.Args[1] 13148 if v_1.Op != OpS390XSRDconst { 13149 break 13150 } 13151 if v_1.AuxInt != 32 { 13152 break 13153 } 13154 w := v_1.Args[0] 13155 x := v.Args[2] 13156 if x.Op != OpS390XMOVWstore { 13157 break 13158 } 13159 if x.AuxInt != i-4 { 13160 break 13161 } 13162 if x.Aux != s { 13163 break 13164 } 13165 if p != x.Args[0] { 13166 break 13167 } 13168 if w != x.Args[1] { 13169 break 13170 } 13171 mem := x.Args[2] 13172 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13173 break 13174 } 13175 v.reset(OpS390XMOVDstore) 13176 v.AuxInt = i - 4 13177 v.Aux = s 13178 v.AddArg(p) 13179 v.AddArg(w) 13180 v.AddArg(mem) 13181 return true 13182 } 13183 // match: (MOVWstore [i] {s} p w0:(SRDconst [j] w) x:(MOVWstore [i-4] {s} p (SRDconst [j+32] w) mem)) 13184 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13185 // result: (MOVDstore [i-4] {s} p w0 mem) 13186 for { 13187 i := v.AuxInt 13188 s := v.Aux 13189 p := v.Args[0] 13190 w0 := v.Args[1] 13191 if w0.Op != OpS390XSRDconst { 13192 break 13193 } 13194 j := w0.AuxInt 13195 w := w0.Args[0] 13196 x := v.Args[2] 13197 if x.Op != OpS390XMOVWstore { 13198 break 13199 } 13200 if x.AuxInt != i-4 { 13201 break 13202 } 13203 if x.Aux != s { 13204 break 13205 } 13206 if p != x.Args[0] { 13207 break 13208 } 13209 x_1 := x.Args[1] 13210 if x_1.Op != OpS390XSRDconst { 13211 break 13212 } 13213 if x_1.AuxInt != j+32 { 13214 break 13215 } 13216 if w != x_1.Args[0] { 13217 break 13218 } 13219 mem := x.Args[2] 13220 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13221 break 13222 } 13223 v.reset(OpS390XMOVDstore) 13224 v.AuxInt = i - 4 13225 v.Aux = s 13226 v.AddArg(p) 13227 v.AddArg(w0) 13228 v.AddArg(mem) 13229 return true 13230 } 13231 // match: (MOVWstore [i] {s} p w1 x:(MOVWstore [i-4] {s} p w0 mem)) 13232 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x) 13233 // result: (STM2 [i-4] {s} p w0 w1 mem) 13234 for { 13235 i := v.AuxInt 13236 s := v.Aux 13237 p := v.Args[0] 13238 w1 := v.Args[1] 13239 x := v.Args[2] 13240 if x.Op != OpS390XMOVWstore { 13241 break 13242 } 13243 if x.AuxInt != i-4 { 13244 break 13245 } 13246 if x.Aux != s { 13247 break 13248 } 13249 if p != x.Args[0] { 13250 break 13251 } 13252 w0 := x.Args[1] 13253 mem := x.Args[2] 13254 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x)) { 13255 break 13256 } 13257 v.reset(OpS390XSTM2) 13258 v.AuxInt = i - 4 13259 v.Aux = s 13260 v.AddArg(p) 13261 v.AddArg(w0) 13262 v.AddArg(w1) 13263 v.AddArg(mem) 13264 return true 13265 } 13266 // match: (MOVWstore [i] {s} p w2 x:(STM2 [i-8] {s} p w0 w1 mem)) 13267 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 13268 // result: (STM3 [i-8] {s} p w0 w1 w2 mem) 13269 for { 13270 i := v.AuxInt 13271 s := v.Aux 13272 p := v.Args[0] 13273 w2 := v.Args[1] 13274 x := v.Args[2] 13275 if x.Op != OpS390XSTM2 { 13276 break 13277 } 13278 if x.AuxInt != i-8 { 13279 break 13280 } 13281 if x.Aux != s { 13282 break 13283 } 13284 if p != x.Args[0] { 13285 break 13286 } 13287 w0 := x.Args[1] 13288 w1 := x.Args[2] 13289 mem := x.Args[3] 13290 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 13291 break 13292 } 13293 v.reset(OpS390XSTM3) 13294 v.AuxInt = i - 8 13295 v.Aux = s 13296 v.AddArg(p) 13297 v.AddArg(w0) 13298 v.AddArg(w1) 13299 v.AddArg(w2) 13300 v.AddArg(mem) 13301 return true 13302 } 13303 // match: (MOVWstore [i] {s} p w3 x:(STM3 [i-12] {s} p w0 w1 w2 mem)) 13304 // cond: x.Uses == 1 && is20Bit(i-12) && clobber(x) 13305 // result: (STM4 [i-12] {s} p w0 w1 w2 w3 mem) 13306 for { 13307 i := v.AuxInt 13308 s := v.Aux 13309 p := v.Args[0] 13310 w3 := v.Args[1] 13311 x := v.Args[2] 13312 if x.Op != OpS390XSTM3 { 13313 break 13314 } 13315 if x.AuxInt != i-12 { 13316 break 13317 } 13318 if x.Aux != s { 13319 break 13320 } 13321 if p != x.Args[0] { 13322 break 13323 } 13324 w0 := x.Args[1] 13325 w1 := x.Args[2] 13326 w2 := x.Args[3] 13327 mem := x.Args[4] 13328 if !(x.Uses == 1 && is20Bit(i-12) && clobber(x)) { 13329 break 13330 } 13331 v.reset(OpS390XSTM4) 13332 v.AuxInt = i - 12 13333 v.Aux = s 13334 v.AddArg(p) 13335 v.AddArg(w0) 13336 v.AddArg(w1) 13337 v.AddArg(w2) 13338 v.AddArg(w3) 13339 v.AddArg(mem) 13340 return true 13341 } 13342 return false 13343 } 13344 func rewriteValueS390X_OpS390XMOVWstoreconst(v *Value, config *Config) bool { 13345 b := v.Block 13346 _ = b 13347 // match: (MOVWstoreconst [sc] {s} (ADDconst [off] ptr) mem) 13348 // cond: ValAndOff(sc).canAdd(off) 13349 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 13350 for { 13351 sc := v.AuxInt 13352 s := v.Aux 13353 v_0 := v.Args[0] 13354 if v_0.Op != OpS390XADDconst { 13355 break 13356 } 13357 off := v_0.AuxInt 13358 ptr := v_0.Args[0] 13359 mem := v.Args[1] 13360 if !(ValAndOff(sc).canAdd(off)) { 13361 break 13362 } 13363 v.reset(OpS390XMOVWstoreconst) 13364 v.AuxInt = ValAndOff(sc).add(off) 13365 v.Aux = s 13366 v.AddArg(ptr) 13367 v.AddArg(mem) 13368 return true 13369 } 13370 // match: (MOVWstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 13371 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 13372 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 13373 for { 13374 sc := v.AuxInt 13375 sym1 := v.Aux 13376 v_0 := v.Args[0] 13377 if v_0.Op != OpS390XMOVDaddr { 13378 break 13379 } 13380 off := v_0.AuxInt 13381 sym2 := v_0.Aux 13382 ptr := v_0.Args[0] 13383 mem := v.Args[1] 13384 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 13385 break 13386 } 13387 v.reset(OpS390XMOVWstoreconst) 13388 v.AuxInt = ValAndOff(sc).add(off) 13389 v.Aux = mergeSym(sym1, sym2) 13390 v.AddArg(ptr) 13391 v.AddArg(mem) 13392 return true 13393 } 13394 // match: (MOVWstoreconst [c] {s} p x:(MOVWstoreconst [a] {s} p mem)) 13395 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 4 == ValAndOff(c).Off() && clobber(x) 13396 // result: (MOVDstore [ValAndOff(a).Off()] {s} p (MOVDconst [ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32]) mem) 13397 for { 13398 c := v.AuxInt 13399 s := v.Aux 13400 p := v.Args[0] 13401 x := v.Args[1] 13402 if x.Op != OpS390XMOVWstoreconst { 13403 break 13404 } 13405 a := x.AuxInt 13406 if x.Aux != s { 13407 break 13408 } 13409 if p != x.Args[0] { 13410 break 13411 } 13412 mem := x.Args[1] 13413 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) { 13414 break 13415 } 13416 v.reset(OpS390XMOVDstore) 13417 v.AuxInt = ValAndOff(a).Off() 13418 v.Aux = s 13419 v.AddArg(p) 13420 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 13421 v0.AuxInt = ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32 13422 v.AddArg(v0) 13423 v.AddArg(mem) 13424 return true 13425 } 13426 return false 13427 } 13428 func rewriteValueS390X_OpS390XMOVWstoreidx(v *Value, config *Config) bool { 13429 b := v.Block 13430 _ = b 13431 // match: (MOVWstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 13432 // cond: 13433 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13434 for { 13435 c := v.AuxInt 13436 sym := v.Aux 13437 v_0 := v.Args[0] 13438 if v_0.Op != OpS390XADDconst { 13439 break 13440 } 13441 d := v_0.AuxInt 13442 ptr := v_0.Args[0] 13443 idx := v.Args[1] 13444 val := v.Args[2] 13445 mem := v.Args[3] 13446 v.reset(OpS390XMOVWstoreidx) 13447 v.AuxInt = c + d 13448 v.Aux = sym 13449 v.AddArg(ptr) 13450 v.AddArg(idx) 13451 v.AddArg(val) 13452 v.AddArg(mem) 13453 return true 13454 } 13455 // match: (MOVWstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 13456 // cond: 13457 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13458 for { 13459 c := v.AuxInt 13460 sym := v.Aux 13461 ptr := v.Args[0] 13462 v_1 := v.Args[1] 13463 if v_1.Op != OpS390XADDconst { 13464 break 13465 } 13466 d := v_1.AuxInt 13467 idx := v_1.Args[0] 13468 val := v.Args[2] 13469 mem := v.Args[3] 13470 v.reset(OpS390XMOVWstoreidx) 13471 v.AuxInt = c + d 13472 v.Aux = sym 13473 v.AddArg(ptr) 13474 v.AddArg(idx) 13475 v.AddArg(val) 13476 v.AddArg(mem) 13477 return true 13478 } 13479 // match: (MOVWstoreidx [i] {s} p idx w x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [32] w) mem)) 13480 // cond: x.Uses == 1 && clobber(x) 13481 // result: (MOVDstoreidx [i-4] {s} p idx w mem) 13482 for { 13483 i := v.AuxInt 13484 s := v.Aux 13485 p := v.Args[0] 13486 idx := v.Args[1] 13487 w := v.Args[2] 13488 x := v.Args[3] 13489 if x.Op != OpS390XMOVWstoreidx { 13490 break 13491 } 13492 if x.AuxInt != i-4 { 13493 break 13494 } 13495 if x.Aux != s { 13496 break 13497 } 13498 if p != x.Args[0] { 13499 break 13500 } 13501 if idx != x.Args[1] { 13502 break 13503 } 13504 x_2 := x.Args[2] 13505 if x_2.Op != OpS390XSRDconst { 13506 break 13507 } 13508 if x_2.AuxInt != 32 { 13509 break 13510 } 13511 if w != x_2.Args[0] { 13512 break 13513 } 13514 mem := x.Args[3] 13515 if !(x.Uses == 1 && clobber(x)) { 13516 break 13517 } 13518 v.reset(OpS390XMOVDstoreidx) 13519 v.AuxInt = i - 4 13520 v.Aux = s 13521 v.AddArg(p) 13522 v.AddArg(idx) 13523 v.AddArg(w) 13524 v.AddArg(mem) 13525 return true 13526 } 13527 // match: (MOVWstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [j+32] w) mem)) 13528 // cond: x.Uses == 1 && clobber(x) 13529 // result: (MOVDstoreidx [i-4] {s} p idx w0 mem) 13530 for { 13531 i := v.AuxInt 13532 s := v.Aux 13533 p := v.Args[0] 13534 idx := v.Args[1] 13535 w0 := v.Args[2] 13536 if w0.Op != OpS390XSRDconst { 13537 break 13538 } 13539 j := w0.AuxInt 13540 w := w0.Args[0] 13541 x := v.Args[3] 13542 if x.Op != OpS390XMOVWstoreidx { 13543 break 13544 } 13545 if x.AuxInt != i-4 { 13546 break 13547 } 13548 if x.Aux != s { 13549 break 13550 } 13551 if p != x.Args[0] { 13552 break 13553 } 13554 if idx != x.Args[1] { 13555 break 13556 } 13557 x_2 := x.Args[2] 13558 if x_2.Op != OpS390XSRDconst { 13559 break 13560 } 13561 if x_2.AuxInt != j+32 { 13562 break 13563 } 13564 if w != x_2.Args[0] { 13565 break 13566 } 13567 mem := x.Args[3] 13568 if !(x.Uses == 1 && clobber(x)) { 13569 break 13570 } 13571 v.reset(OpS390XMOVDstoreidx) 13572 v.AuxInt = i - 4 13573 v.Aux = s 13574 v.AddArg(p) 13575 v.AddArg(idx) 13576 v.AddArg(w0) 13577 v.AddArg(mem) 13578 return true 13579 } 13580 return false 13581 } 13582 func rewriteValueS390X_OpS390XMULLD(v *Value, config *Config) bool { 13583 b := v.Block 13584 _ = b 13585 // match: (MULLD x (MOVDconst [c])) 13586 // cond: is32Bit(c) 13587 // result: (MULLDconst [c] x) 13588 for { 13589 x := v.Args[0] 13590 v_1 := v.Args[1] 13591 if v_1.Op != OpS390XMOVDconst { 13592 break 13593 } 13594 c := v_1.AuxInt 13595 if !(is32Bit(c)) { 13596 break 13597 } 13598 v.reset(OpS390XMULLDconst) 13599 v.AuxInt = c 13600 v.AddArg(x) 13601 return true 13602 } 13603 // match: (MULLD (MOVDconst [c]) x) 13604 // cond: is32Bit(c) 13605 // result: (MULLDconst [c] x) 13606 for { 13607 v_0 := v.Args[0] 13608 if v_0.Op != OpS390XMOVDconst { 13609 break 13610 } 13611 c := v_0.AuxInt 13612 x := v.Args[1] 13613 if !(is32Bit(c)) { 13614 break 13615 } 13616 v.reset(OpS390XMULLDconst) 13617 v.AuxInt = c 13618 v.AddArg(x) 13619 return true 13620 } 13621 // match: (MULLD <t> x g:(MOVDload [off] {sym} ptr mem)) 13622 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13623 // result: (MULLDload <t> [off] {sym} x ptr mem) 13624 for { 13625 t := v.Type 13626 x := v.Args[0] 13627 g := v.Args[1] 13628 if g.Op != OpS390XMOVDload { 13629 break 13630 } 13631 off := g.AuxInt 13632 sym := g.Aux 13633 ptr := g.Args[0] 13634 mem := g.Args[1] 13635 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13636 break 13637 } 13638 v.reset(OpS390XMULLDload) 13639 v.Type = t 13640 v.AuxInt = off 13641 v.Aux = sym 13642 v.AddArg(x) 13643 v.AddArg(ptr) 13644 v.AddArg(mem) 13645 return true 13646 } 13647 // match: (MULLD <t> g:(MOVDload [off] {sym} ptr mem) x) 13648 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13649 // result: (MULLDload <t> [off] {sym} x ptr mem) 13650 for { 13651 t := v.Type 13652 g := v.Args[0] 13653 if g.Op != OpS390XMOVDload { 13654 break 13655 } 13656 off := g.AuxInt 13657 sym := g.Aux 13658 ptr := g.Args[0] 13659 mem := g.Args[1] 13660 x := v.Args[1] 13661 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13662 break 13663 } 13664 v.reset(OpS390XMULLDload) 13665 v.Type = t 13666 v.AuxInt = off 13667 v.Aux = sym 13668 v.AddArg(x) 13669 v.AddArg(ptr) 13670 v.AddArg(mem) 13671 return true 13672 } 13673 return false 13674 } 13675 func rewriteValueS390X_OpS390XMULLDconst(v *Value, config *Config) bool { 13676 b := v.Block 13677 _ = b 13678 // match: (MULLDconst [-1] x) 13679 // cond: 13680 // result: (NEG x) 13681 for { 13682 if v.AuxInt != -1 { 13683 break 13684 } 13685 x := v.Args[0] 13686 v.reset(OpS390XNEG) 13687 v.AddArg(x) 13688 return true 13689 } 13690 // match: (MULLDconst [0] _) 13691 // cond: 13692 // result: (MOVDconst [0]) 13693 for { 13694 if v.AuxInt != 0 { 13695 break 13696 } 13697 v.reset(OpS390XMOVDconst) 13698 v.AuxInt = 0 13699 return true 13700 } 13701 // match: (MULLDconst [1] x) 13702 // cond: 13703 // result: x 13704 for { 13705 if v.AuxInt != 1 { 13706 break 13707 } 13708 x := v.Args[0] 13709 v.reset(OpCopy) 13710 v.Type = x.Type 13711 v.AddArg(x) 13712 return true 13713 } 13714 // match: (MULLDconst [c] x) 13715 // cond: isPowerOfTwo(c) 13716 // result: (SLDconst [log2(c)] x) 13717 for { 13718 c := v.AuxInt 13719 x := v.Args[0] 13720 if !(isPowerOfTwo(c)) { 13721 break 13722 } 13723 v.reset(OpS390XSLDconst) 13724 v.AuxInt = log2(c) 13725 v.AddArg(x) 13726 return true 13727 } 13728 // match: (MULLDconst [c] x) 13729 // cond: isPowerOfTwo(c+1) && c >= 15 13730 // result: (SUB (SLDconst <v.Type> [log2(c+1)] x) x) 13731 for { 13732 c := v.AuxInt 13733 x := v.Args[0] 13734 if !(isPowerOfTwo(c+1) && c >= 15) { 13735 break 13736 } 13737 v.reset(OpS390XSUB) 13738 v0 := b.NewValue0(v.Pos, OpS390XSLDconst, v.Type) 13739 v0.AuxInt = log2(c + 1) 13740 v0.AddArg(x) 13741 v.AddArg(v0) 13742 v.AddArg(x) 13743 return true 13744 } 13745 // match: (MULLDconst [c] x) 13746 // cond: isPowerOfTwo(c-1) && c >= 17 13747 // result: (ADD (SLDconst <v.Type> [log2(c-1)] x) x) 13748 for { 13749 c := v.AuxInt 13750 x := v.Args[0] 13751 if !(isPowerOfTwo(c-1) && c >= 17) { 13752 break 13753 } 13754 v.reset(OpS390XADD) 13755 v0 := b.NewValue0(v.Pos, OpS390XSLDconst, v.Type) 13756 v0.AuxInt = log2(c - 1) 13757 v0.AddArg(x) 13758 v.AddArg(v0) 13759 v.AddArg(x) 13760 return true 13761 } 13762 // match: (MULLDconst [c] (MOVDconst [d])) 13763 // cond: 13764 // result: (MOVDconst [c*d]) 13765 for { 13766 c := v.AuxInt 13767 v_0 := v.Args[0] 13768 if v_0.Op != OpS390XMOVDconst { 13769 break 13770 } 13771 d := v_0.AuxInt 13772 v.reset(OpS390XMOVDconst) 13773 v.AuxInt = c * d 13774 return true 13775 } 13776 return false 13777 } 13778 func rewriteValueS390X_OpS390XMULLW(v *Value, config *Config) bool { 13779 b := v.Block 13780 _ = b 13781 // match: (MULLW x (MOVDconst [c])) 13782 // cond: 13783 // result: (MULLWconst [c] x) 13784 for { 13785 x := v.Args[0] 13786 v_1 := v.Args[1] 13787 if v_1.Op != OpS390XMOVDconst { 13788 break 13789 } 13790 c := v_1.AuxInt 13791 v.reset(OpS390XMULLWconst) 13792 v.AuxInt = c 13793 v.AddArg(x) 13794 return true 13795 } 13796 // match: (MULLW (MOVDconst [c]) x) 13797 // cond: 13798 // result: (MULLWconst [c] x) 13799 for { 13800 v_0 := v.Args[0] 13801 if v_0.Op != OpS390XMOVDconst { 13802 break 13803 } 13804 c := v_0.AuxInt 13805 x := v.Args[1] 13806 v.reset(OpS390XMULLWconst) 13807 v.AuxInt = c 13808 v.AddArg(x) 13809 return true 13810 } 13811 // match: (MULLW <t> x g:(MOVWload [off] {sym} ptr mem)) 13812 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13813 // result: (MULLWload <t> [off] {sym} x ptr mem) 13814 for { 13815 t := v.Type 13816 x := v.Args[0] 13817 g := v.Args[1] 13818 if g.Op != OpS390XMOVWload { 13819 break 13820 } 13821 off := g.AuxInt 13822 sym := g.Aux 13823 ptr := g.Args[0] 13824 mem := g.Args[1] 13825 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13826 break 13827 } 13828 v.reset(OpS390XMULLWload) 13829 v.Type = t 13830 v.AuxInt = off 13831 v.Aux = sym 13832 v.AddArg(x) 13833 v.AddArg(ptr) 13834 v.AddArg(mem) 13835 return true 13836 } 13837 // match: (MULLW <t> g:(MOVWload [off] {sym} ptr mem) x) 13838 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13839 // result: (MULLWload <t> [off] {sym} x ptr mem) 13840 for { 13841 t := v.Type 13842 g := v.Args[0] 13843 if g.Op != OpS390XMOVWload { 13844 break 13845 } 13846 off := g.AuxInt 13847 sym := g.Aux 13848 ptr := g.Args[0] 13849 mem := g.Args[1] 13850 x := v.Args[1] 13851 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13852 break 13853 } 13854 v.reset(OpS390XMULLWload) 13855 v.Type = t 13856 v.AuxInt = off 13857 v.Aux = sym 13858 v.AddArg(x) 13859 v.AddArg(ptr) 13860 v.AddArg(mem) 13861 return true 13862 } 13863 // match: (MULLW <t> x g:(MOVWZload [off] {sym} ptr mem)) 13864 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13865 // result: (MULLWload <t> [off] {sym} x ptr mem) 13866 for { 13867 t := v.Type 13868 x := v.Args[0] 13869 g := v.Args[1] 13870 if g.Op != OpS390XMOVWZload { 13871 break 13872 } 13873 off := g.AuxInt 13874 sym := g.Aux 13875 ptr := g.Args[0] 13876 mem := g.Args[1] 13877 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13878 break 13879 } 13880 v.reset(OpS390XMULLWload) 13881 v.Type = t 13882 v.AuxInt = off 13883 v.Aux = sym 13884 v.AddArg(x) 13885 v.AddArg(ptr) 13886 v.AddArg(mem) 13887 return true 13888 } 13889 // match: (MULLW <t> g:(MOVWZload [off] {sym} ptr mem) x) 13890 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13891 // result: (MULLWload <t> [off] {sym} x ptr mem) 13892 for { 13893 t := v.Type 13894 g := v.Args[0] 13895 if g.Op != OpS390XMOVWZload { 13896 break 13897 } 13898 off := g.AuxInt 13899 sym := g.Aux 13900 ptr := g.Args[0] 13901 mem := g.Args[1] 13902 x := v.Args[1] 13903 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13904 break 13905 } 13906 v.reset(OpS390XMULLWload) 13907 v.Type = t 13908 v.AuxInt = off 13909 v.Aux = sym 13910 v.AddArg(x) 13911 v.AddArg(ptr) 13912 v.AddArg(mem) 13913 return true 13914 } 13915 return false 13916 } 13917 func rewriteValueS390X_OpS390XMULLWconst(v *Value, config *Config) bool { 13918 b := v.Block 13919 _ = b 13920 // match: (MULLWconst [-1] x) 13921 // cond: 13922 // result: (NEGW x) 13923 for { 13924 if v.AuxInt != -1 { 13925 break 13926 } 13927 x := v.Args[0] 13928 v.reset(OpS390XNEGW) 13929 v.AddArg(x) 13930 return true 13931 } 13932 // match: (MULLWconst [0] _) 13933 // cond: 13934 // result: (MOVDconst [0]) 13935 for { 13936 if v.AuxInt != 0 { 13937 break 13938 } 13939 v.reset(OpS390XMOVDconst) 13940 v.AuxInt = 0 13941 return true 13942 } 13943 // match: (MULLWconst [1] x) 13944 // cond: 13945 // result: x 13946 for { 13947 if v.AuxInt != 1 { 13948 break 13949 } 13950 x := v.Args[0] 13951 v.reset(OpCopy) 13952 v.Type = x.Type 13953 v.AddArg(x) 13954 return true 13955 } 13956 // match: (MULLWconst [c] x) 13957 // cond: isPowerOfTwo(c) 13958 // result: (SLWconst [log2(c)] x) 13959 for { 13960 c := v.AuxInt 13961 x := v.Args[0] 13962 if !(isPowerOfTwo(c)) { 13963 break 13964 } 13965 v.reset(OpS390XSLWconst) 13966 v.AuxInt = log2(c) 13967 v.AddArg(x) 13968 return true 13969 } 13970 // match: (MULLWconst [c] x) 13971 // cond: isPowerOfTwo(c+1) && c >= 15 13972 // result: (SUBW (SLWconst <v.Type> [log2(c+1)] x) x) 13973 for { 13974 c := v.AuxInt 13975 x := v.Args[0] 13976 if !(isPowerOfTwo(c+1) && c >= 15) { 13977 break 13978 } 13979 v.reset(OpS390XSUBW) 13980 v0 := b.NewValue0(v.Pos, OpS390XSLWconst, v.Type) 13981 v0.AuxInt = log2(c + 1) 13982 v0.AddArg(x) 13983 v.AddArg(v0) 13984 v.AddArg(x) 13985 return true 13986 } 13987 // match: (MULLWconst [c] x) 13988 // cond: isPowerOfTwo(c-1) && c >= 17 13989 // result: (ADDW (SLWconst <v.Type> [log2(c-1)] x) x) 13990 for { 13991 c := v.AuxInt 13992 x := v.Args[0] 13993 if !(isPowerOfTwo(c-1) && c >= 17) { 13994 break 13995 } 13996 v.reset(OpS390XADDW) 13997 v0 := b.NewValue0(v.Pos, OpS390XSLWconst, v.Type) 13998 v0.AuxInt = log2(c - 1) 13999 v0.AddArg(x) 14000 v.AddArg(v0) 14001 v.AddArg(x) 14002 return true 14003 } 14004 // match: (MULLWconst [c] (MOVDconst [d])) 14005 // cond: 14006 // result: (MOVDconst [int64(int32(c*d))]) 14007 for { 14008 c := v.AuxInt 14009 v_0 := v.Args[0] 14010 if v_0.Op != OpS390XMOVDconst { 14011 break 14012 } 14013 d := v_0.AuxInt 14014 v.reset(OpS390XMOVDconst) 14015 v.AuxInt = int64(int32(c * d)) 14016 return true 14017 } 14018 return false 14019 } 14020 func rewriteValueS390X_OpS390XNEG(v *Value, config *Config) bool { 14021 b := v.Block 14022 _ = b 14023 // match: (NEG (MOVDconst [c])) 14024 // cond: 14025 // result: (MOVDconst [-c]) 14026 for { 14027 v_0 := v.Args[0] 14028 if v_0.Op != OpS390XMOVDconst { 14029 break 14030 } 14031 c := v_0.AuxInt 14032 v.reset(OpS390XMOVDconst) 14033 v.AuxInt = -c 14034 return true 14035 } 14036 return false 14037 } 14038 func rewriteValueS390X_OpS390XNEGW(v *Value, config *Config) bool { 14039 b := v.Block 14040 _ = b 14041 // match: (NEGW (MOVDconst [c])) 14042 // cond: 14043 // result: (MOVDconst [int64(int32(-c))]) 14044 for { 14045 v_0 := v.Args[0] 14046 if v_0.Op != OpS390XMOVDconst { 14047 break 14048 } 14049 c := v_0.AuxInt 14050 v.reset(OpS390XMOVDconst) 14051 v.AuxInt = int64(int32(-c)) 14052 return true 14053 } 14054 return false 14055 } 14056 func rewriteValueS390X_OpS390XNOT(v *Value, config *Config) bool { 14057 b := v.Block 14058 _ = b 14059 // match: (NOT x) 14060 // cond: true 14061 // result: (XOR (MOVDconst [-1]) x) 14062 for { 14063 x := v.Args[0] 14064 if !(true) { 14065 break 14066 } 14067 v.reset(OpS390XXOR) 14068 v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, config.fe.TypeUInt64()) 14069 v0.AuxInt = -1 14070 v.AddArg(v0) 14071 v.AddArg(x) 14072 return true 14073 } 14074 return false 14075 } 14076 func rewriteValueS390X_OpS390XNOTW(v *Value, config *Config) bool { 14077 b := v.Block 14078 _ = b 14079 // match: (NOTW x) 14080 // cond: true 14081 // result: (XORWconst [-1] x) 14082 for { 14083 x := v.Args[0] 14084 if !(true) { 14085 break 14086 } 14087 v.reset(OpS390XXORWconst) 14088 v.AuxInt = -1 14089 v.AddArg(x) 14090 return true 14091 } 14092 return false 14093 } 14094 func rewriteValueS390X_OpS390XOR(v *Value, config *Config) bool { 14095 b := v.Block 14096 _ = b 14097 // match: (OR x (MOVDconst [c])) 14098 // cond: isU32Bit(c) 14099 // result: (ORconst [c] x) 14100 for { 14101 x := v.Args[0] 14102 v_1 := v.Args[1] 14103 if v_1.Op != OpS390XMOVDconst { 14104 break 14105 } 14106 c := v_1.AuxInt 14107 if !(isU32Bit(c)) { 14108 break 14109 } 14110 v.reset(OpS390XORconst) 14111 v.AuxInt = c 14112 v.AddArg(x) 14113 return true 14114 } 14115 // match: (OR (MOVDconst [c]) x) 14116 // cond: isU32Bit(c) 14117 // result: (ORconst [c] x) 14118 for { 14119 v_0 := v.Args[0] 14120 if v_0.Op != OpS390XMOVDconst { 14121 break 14122 } 14123 c := v_0.AuxInt 14124 x := v.Args[1] 14125 if !(isU32Bit(c)) { 14126 break 14127 } 14128 v.reset(OpS390XORconst) 14129 v.AuxInt = c 14130 v.AddArg(x) 14131 return true 14132 } 14133 // match: ( OR (SLDconst x [c]) (SRDconst x [64-c])) 14134 // cond: 14135 // result: (RLLGconst [ c] x) 14136 for { 14137 v_0 := v.Args[0] 14138 if v_0.Op != OpS390XSLDconst { 14139 break 14140 } 14141 c := v_0.AuxInt 14142 x := v_0.Args[0] 14143 v_1 := v.Args[1] 14144 if v_1.Op != OpS390XSRDconst { 14145 break 14146 } 14147 if v_1.AuxInt != 64-c { 14148 break 14149 } 14150 if x != v_1.Args[0] { 14151 break 14152 } 14153 v.reset(OpS390XRLLGconst) 14154 v.AuxInt = c 14155 v.AddArg(x) 14156 return true 14157 } 14158 // match: ( OR (SRDconst x [c]) (SLDconst x [64-c])) 14159 // cond: 14160 // result: (RLLGconst [64-c] x) 14161 for { 14162 v_0 := v.Args[0] 14163 if v_0.Op != OpS390XSRDconst { 14164 break 14165 } 14166 c := v_0.AuxInt 14167 x := v_0.Args[0] 14168 v_1 := v.Args[1] 14169 if v_1.Op != OpS390XSLDconst { 14170 break 14171 } 14172 if v_1.AuxInt != 64-c { 14173 break 14174 } 14175 if x != v_1.Args[0] { 14176 break 14177 } 14178 v.reset(OpS390XRLLGconst) 14179 v.AuxInt = 64 - c 14180 v.AddArg(x) 14181 return true 14182 } 14183 // match: (OR (MOVDconst [c]) (MOVDconst [d])) 14184 // cond: 14185 // result: (MOVDconst [c|d]) 14186 for { 14187 v_0 := v.Args[0] 14188 if v_0.Op != OpS390XMOVDconst { 14189 break 14190 } 14191 c := v_0.AuxInt 14192 v_1 := v.Args[1] 14193 if v_1.Op != OpS390XMOVDconst { 14194 break 14195 } 14196 d := v_1.AuxInt 14197 v.reset(OpS390XMOVDconst) 14198 v.AuxInt = c | d 14199 return true 14200 } 14201 // match: (OR x x) 14202 // cond: 14203 // result: x 14204 for { 14205 x := v.Args[0] 14206 if x != v.Args[1] { 14207 break 14208 } 14209 v.reset(OpCopy) 14210 v.Type = x.Type 14211 v.AddArg(x) 14212 return true 14213 } 14214 // match: (OR <t> x g:(MOVDload [off] {sym} ptr mem)) 14215 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14216 // result: (ORload <t> [off] {sym} x ptr mem) 14217 for { 14218 t := v.Type 14219 x := v.Args[0] 14220 g := v.Args[1] 14221 if g.Op != OpS390XMOVDload { 14222 break 14223 } 14224 off := g.AuxInt 14225 sym := g.Aux 14226 ptr := g.Args[0] 14227 mem := g.Args[1] 14228 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14229 break 14230 } 14231 v.reset(OpS390XORload) 14232 v.Type = t 14233 v.AuxInt = off 14234 v.Aux = sym 14235 v.AddArg(x) 14236 v.AddArg(ptr) 14237 v.AddArg(mem) 14238 return true 14239 } 14240 // match: (OR <t> g:(MOVDload [off] {sym} ptr mem) x) 14241 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14242 // result: (ORload <t> [off] {sym} x ptr mem) 14243 for { 14244 t := v.Type 14245 g := v.Args[0] 14246 if g.Op != OpS390XMOVDload { 14247 break 14248 } 14249 off := g.AuxInt 14250 sym := g.Aux 14251 ptr := g.Args[0] 14252 mem := g.Args[1] 14253 x := v.Args[1] 14254 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14255 break 14256 } 14257 v.reset(OpS390XORload) 14258 v.Type = t 14259 v.AuxInt = off 14260 v.Aux = sym 14261 v.AddArg(x) 14262 v.AddArg(ptr) 14263 v.AddArg(mem) 14264 return true 14265 } 14266 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i+1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i+2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i+3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i+4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i+5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i+6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i+7] {s} p mem))) 14267 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14268 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRload [i] {s} p mem) 14269 for { 14270 o0 := v.Args[0] 14271 if o0.Op != OpS390XOR { 14272 break 14273 } 14274 o1 := o0.Args[0] 14275 if o1.Op != OpS390XOR { 14276 break 14277 } 14278 o2 := o1.Args[0] 14279 if o2.Op != OpS390XOR { 14280 break 14281 } 14282 o3 := o2.Args[0] 14283 if o3.Op != OpS390XOR { 14284 break 14285 } 14286 o4 := o3.Args[0] 14287 if o4.Op != OpS390XOR { 14288 break 14289 } 14290 o5 := o4.Args[0] 14291 if o5.Op != OpS390XOR { 14292 break 14293 } 14294 x0 := o5.Args[0] 14295 if x0.Op != OpS390XMOVBZload { 14296 break 14297 } 14298 i := x0.AuxInt 14299 s := x0.Aux 14300 p := x0.Args[0] 14301 mem := x0.Args[1] 14302 s0 := o5.Args[1] 14303 if s0.Op != OpS390XSLDconst { 14304 break 14305 } 14306 if s0.AuxInt != 8 { 14307 break 14308 } 14309 x1 := s0.Args[0] 14310 if x1.Op != OpS390XMOVBZload { 14311 break 14312 } 14313 if x1.AuxInt != i+1 { 14314 break 14315 } 14316 if x1.Aux != s { 14317 break 14318 } 14319 if p != x1.Args[0] { 14320 break 14321 } 14322 if mem != x1.Args[1] { 14323 break 14324 } 14325 s1 := o4.Args[1] 14326 if s1.Op != OpS390XSLDconst { 14327 break 14328 } 14329 if s1.AuxInt != 16 { 14330 break 14331 } 14332 x2 := s1.Args[0] 14333 if x2.Op != OpS390XMOVBZload { 14334 break 14335 } 14336 if x2.AuxInt != i+2 { 14337 break 14338 } 14339 if x2.Aux != s { 14340 break 14341 } 14342 if p != x2.Args[0] { 14343 break 14344 } 14345 if mem != x2.Args[1] { 14346 break 14347 } 14348 s2 := o3.Args[1] 14349 if s2.Op != OpS390XSLDconst { 14350 break 14351 } 14352 if s2.AuxInt != 24 { 14353 break 14354 } 14355 x3 := s2.Args[0] 14356 if x3.Op != OpS390XMOVBZload { 14357 break 14358 } 14359 if x3.AuxInt != i+3 { 14360 break 14361 } 14362 if x3.Aux != s { 14363 break 14364 } 14365 if p != x3.Args[0] { 14366 break 14367 } 14368 if mem != x3.Args[1] { 14369 break 14370 } 14371 s3 := o2.Args[1] 14372 if s3.Op != OpS390XSLDconst { 14373 break 14374 } 14375 if s3.AuxInt != 32 { 14376 break 14377 } 14378 x4 := s3.Args[0] 14379 if x4.Op != OpS390XMOVBZload { 14380 break 14381 } 14382 if x4.AuxInt != i+4 { 14383 break 14384 } 14385 if x4.Aux != s { 14386 break 14387 } 14388 if p != x4.Args[0] { 14389 break 14390 } 14391 if mem != x4.Args[1] { 14392 break 14393 } 14394 s4 := o1.Args[1] 14395 if s4.Op != OpS390XSLDconst { 14396 break 14397 } 14398 if s4.AuxInt != 40 { 14399 break 14400 } 14401 x5 := s4.Args[0] 14402 if x5.Op != OpS390XMOVBZload { 14403 break 14404 } 14405 if x5.AuxInt != i+5 { 14406 break 14407 } 14408 if x5.Aux != s { 14409 break 14410 } 14411 if p != x5.Args[0] { 14412 break 14413 } 14414 if mem != x5.Args[1] { 14415 break 14416 } 14417 s5 := o0.Args[1] 14418 if s5.Op != OpS390XSLDconst { 14419 break 14420 } 14421 if s5.AuxInt != 48 { 14422 break 14423 } 14424 x6 := s5.Args[0] 14425 if x6.Op != OpS390XMOVBZload { 14426 break 14427 } 14428 if x6.AuxInt != i+6 { 14429 break 14430 } 14431 if x6.Aux != s { 14432 break 14433 } 14434 if p != x6.Args[0] { 14435 break 14436 } 14437 if mem != x6.Args[1] { 14438 break 14439 } 14440 s6 := v.Args[1] 14441 if s6.Op != OpS390XSLDconst { 14442 break 14443 } 14444 if s6.AuxInt != 56 { 14445 break 14446 } 14447 x7 := s6.Args[0] 14448 if x7.Op != OpS390XMOVBZload { 14449 break 14450 } 14451 if x7.AuxInt != i+7 { 14452 break 14453 } 14454 if x7.Aux != s { 14455 break 14456 } 14457 if p != x7.Args[0] { 14458 break 14459 } 14460 if mem != x7.Args[1] { 14461 break 14462 } 14463 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14464 break 14465 } 14466 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14467 v0 := b.NewValue0(v.Pos, OpS390XMOVDBRload, config.fe.TypeUInt64()) 14468 v.reset(OpCopy) 14469 v.AddArg(v0) 14470 v0.AuxInt = i 14471 v0.Aux = s 14472 v0.AddArg(p) 14473 v0.AddArg(mem) 14474 return true 14475 } 14476 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i+2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i+3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i+4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i+5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i+6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i+7] {s} p idx mem))) 14477 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14478 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRloadidx <v.Type> [i] {s} p idx mem) 14479 for { 14480 o0 := v.Args[0] 14481 if o0.Op != OpS390XOR { 14482 break 14483 } 14484 o1 := o0.Args[0] 14485 if o1.Op != OpS390XOR { 14486 break 14487 } 14488 o2 := o1.Args[0] 14489 if o2.Op != OpS390XOR { 14490 break 14491 } 14492 o3 := o2.Args[0] 14493 if o3.Op != OpS390XOR { 14494 break 14495 } 14496 o4 := o3.Args[0] 14497 if o4.Op != OpS390XOR { 14498 break 14499 } 14500 o5 := o4.Args[0] 14501 if o5.Op != OpS390XOR { 14502 break 14503 } 14504 x0 := o5.Args[0] 14505 if x0.Op != OpS390XMOVBZloadidx { 14506 break 14507 } 14508 i := x0.AuxInt 14509 s := x0.Aux 14510 p := x0.Args[0] 14511 idx := x0.Args[1] 14512 mem := x0.Args[2] 14513 s0 := o5.Args[1] 14514 if s0.Op != OpS390XSLDconst { 14515 break 14516 } 14517 if s0.AuxInt != 8 { 14518 break 14519 } 14520 x1 := s0.Args[0] 14521 if x1.Op != OpS390XMOVBZloadidx { 14522 break 14523 } 14524 if x1.AuxInt != i+1 { 14525 break 14526 } 14527 if x1.Aux != s { 14528 break 14529 } 14530 if p != x1.Args[0] { 14531 break 14532 } 14533 if idx != x1.Args[1] { 14534 break 14535 } 14536 if mem != x1.Args[2] { 14537 break 14538 } 14539 s1 := o4.Args[1] 14540 if s1.Op != OpS390XSLDconst { 14541 break 14542 } 14543 if s1.AuxInt != 16 { 14544 break 14545 } 14546 x2 := s1.Args[0] 14547 if x2.Op != OpS390XMOVBZloadidx { 14548 break 14549 } 14550 if x2.AuxInt != i+2 { 14551 break 14552 } 14553 if x2.Aux != s { 14554 break 14555 } 14556 if p != x2.Args[0] { 14557 break 14558 } 14559 if idx != x2.Args[1] { 14560 break 14561 } 14562 if mem != x2.Args[2] { 14563 break 14564 } 14565 s2 := o3.Args[1] 14566 if s2.Op != OpS390XSLDconst { 14567 break 14568 } 14569 if s2.AuxInt != 24 { 14570 break 14571 } 14572 x3 := s2.Args[0] 14573 if x3.Op != OpS390XMOVBZloadidx { 14574 break 14575 } 14576 if x3.AuxInt != i+3 { 14577 break 14578 } 14579 if x3.Aux != s { 14580 break 14581 } 14582 if p != x3.Args[0] { 14583 break 14584 } 14585 if idx != x3.Args[1] { 14586 break 14587 } 14588 if mem != x3.Args[2] { 14589 break 14590 } 14591 s3 := o2.Args[1] 14592 if s3.Op != OpS390XSLDconst { 14593 break 14594 } 14595 if s3.AuxInt != 32 { 14596 break 14597 } 14598 x4 := s3.Args[0] 14599 if x4.Op != OpS390XMOVBZloadidx { 14600 break 14601 } 14602 if x4.AuxInt != i+4 { 14603 break 14604 } 14605 if x4.Aux != s { 14606 break 14607 } 14608 if p != x4.Args[0] { 14609 break 14610 } 14611 if idx != x4.Args[1] { 14612 break 14613 } 14614 if mem != x4.Args[2] { 14615 break 14616 } 14617 s4 := o1.Args[1] 14618 if s4.Op != OpS390XSLDconst { 14619 break 14620 } 14621 if s4.AuxInt != 40 { 14622 break 14623 } 14624 x5 := s4.Args[0] 14625 if x5.Op != OpS390XMOVBZloadidx { 14626 break 14627 } 14628 if x5.AuxInt != i+5 { 14629 break 14630 } 14631 if x5.Aux != s { 14632 break 14633 } 14634 if p != x5.Args[0] { 14635 break 14636 } 14637 if idx != x5.Args[1] { 14638 break 14639 } 14640 if mem != x5.Args[2] { 14641 break 14642 } 14643 s5 := o0.Args[1] 14644 if s5.Op != OpS390XSLDconst { 14645 break 14646 } 14647 if s5.AuxInt != 48 { 14648 break 14649 } 14650 x6 := s5.Args[0] 14651 if x6.Op != OpS390XMOVBZloadidx { 14652 break 14653 } 14654 if x6.AuxInt != i+6 { 14655 break 14656 } 14657 if x6.Aux != s { 14658 break 14659 } 14660 if p != x6.Args[0] { 14661 break 14662 } 14663 if idx != x6.Args[1] { 14664 break 14665 } 14666 if mem != x6.Args[2] { 14667 break 14668 } 14669 s6 := v.Args[1] 14670 if s6.Op != OpS390XSLDconst { 14671 break 14672 } 14673 if s6.AuxInt != 56 { 14674 break 14675 } 14676 x7 := s6.Args[0] 14677 if x7.Op != OpS390XMOVBZloadidx { 14678 break 14679 } 14680 if x7.AuxInt != i+7 { 14681 break 14682 } 14683 if x7.Aux != s { 14684 break 14685 } 14686 if p != x7.Args[0] { 14687 break 14688 } 14689 if idx != x7.Args[1] { 14690 break 14691 } 14692 if mem != x7.Args[2] { 14693 break 14694 } 14695 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14696 break 14697 } 14698 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14699 v0 := b.NewValue0(v.Pos, OpS390XMOVDBRloadidx, v.Type) 14700 v.reset(OpCopy) 14701 v.AddArg(v0) 14702 v0.AuxInt = i 14703 v0.Aux = s 14704 v0.AddArg(p) 14705 v0.AddArg(idx) 14706 v0.AddArg(mem) 14707 return true 14708 } 14709 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i-2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i-3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i-4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i-5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i-6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i-7] {s} p mem))) 14710 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14711 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload [i-7] {s} p mem) 14712 for { 14713 o0 := v.Args[0] 14714 if o0.Op != OpS390XOR { 14715 break 14716 } 14717 o1 := o0.Args[0] 14718 if o1.Op != OpS390XOR { 14719 break 14720 } 14721 o2 := o1.Args[0] 14722 if o2.Op != OpS390XOR { 14723 break 14724 } 14725 o3 := o2.Args[0] 14726 if o3.Op != OpS390XOR { 14727 break 14728 } 14729 o4 := o3.Args[0] 14730 if o4.Op != OpS390XOR { 14731 break 14732 } 14733 o5 := o4.Args[0] 14734 if o5.Op != OpS390XOR { 14735 break 14736 } 14737 x0 := o5.Args[0] 14738 if x0.Op != OpS390XMOVBZload { 14739 break 14740 } 14741 i := x0.AuxInt 14742 s := x0.Aux 14743 p := x0.Args[0] 14744 mem := x0.Args[1] 14745 s0 := o5.Args[1] 14746 if s0.Op != OpS390XSLDconst { 14747 break 14748 } 14749 if s0.AuxInt != 8 { 14750 break 14751 } 14752 x1 := s0.Args[0] 14753 if x1.Op != OpS390XMOVBZload { 14754 break 14755 } 14756 if x1.AuxInt != i-1 { 14757 break 14758 } 14759 if x1.Aux != s { 14760 break 14761 } 14762 if p != x1.Args[0] { 14763 break 14764 } 14765 if mem != x1.Args[1] { 14766 break 14767 } 14768 s1 := o4.Args[1] 14769 if s1.Op != OpS390XSLDconst { 14770 break 14771 } 14772 if s1.AuxInt != 16 { 14773 break 14774 } 14775 x2 := s1.Args[0] 14776 if x2.Op != OpS390XMOVBZload { 14777 break 14778 } 14779 if x2.AuxInt != i-2 { 14780 break 14781 } 14782 if x2.Aux != s { 14783 break 14784 } 14785 if p != x2.Args[0] { 14786 break 14787 } 14788 if mem != x2.Args[1] { 14789 break 14790 } 14791 s2 := o3.Args[1] 14792 if s2.Op != OpS390XSLDconst { 14793 break 14794 } 14795 if s2.AuxInt != 24 { 14796 break 14797 } 14798 x3 := s2.Args[0] 14799 if x3.Op != OpS390XMOVBZload { 14800 break 14801 } 14802 if x3.AuxInt != i-3 { 14803 break 14804 } 14805 if x3.Aux != s { 14806 break 14807 } 14808 if p != x3.Args[0] { 14809 break 14810 } 14811 if mem != x3.Args[1] { 14812 break 14813 } 14814 s3 := o2.Args[1] 14815 if s3.Op != OpS390XSLDconst { 14816 break 14817 } 14818 if s3.AuxInt != 32 { 14819 break 14820 } 14821 x4 := s3.Args[0] 14822 if x4.Op != OpS390XMOVBZload { 14823 break 14824 } 14825 if x4.AuxInt != i-4 { 14826 break 14827 } 14828 if x4.Aux != s { 14829 break 14830 } 14831 if p != x4.Args[0] { 14832 break 14833 } 14834 if mem != x4.Args[1] { 14835 break 14836 } 14837 s4 := o1.Args[1] 14838 if s4.Op != OpS390XSLDconst { 14839 break 14840 } 14841 if s4.AuxInt != 40 { 14842 break 14843 } 14844 x5 := s4.Args[0] 14845 if x5.Op != OpS390XMOVBZload { 14846 break 14847 } 14848 if x5.AuxInt != i-5 { 14849 break 14850 } 14851 if x5.Aux != s { 14852 break 14853 } 14854 if p != x5.Args[0] { 14855 break 14856 } 14857 if mem != x5.Args[1] { 14858 break 14859 } 14860 s5 := o0.Args[1] 14861 if s5.Op != OpS390XSLDconst { 14862 break 14863 } 14864 if s5.AuxInt != 48 { 14865 break 14866 } 14867 x6 := s5.Args[0] 14868 if x6.Op != OpS390XMOVBZload { 14869 break 14870 } 14871 if x6.AuxInt != i-6 { 14872 break 14873 } 14874 if x6.Aux != s { 14875 break 14876 } 14877 if p != x6.Args[0] { 14878 break 14879 } 14880 if mem != x6.Args[1] { 14881 break 14882 } 14883 s6 := v.Args[1] 14884 if s6.Op != OpS390XSLDconst { 14885 break 14886 } 14887 if s6.AuxInt != 56 { 14888 break 14889 } 14890 x7 := s6.Args[0] 14891 if x7.Op != OpS390XMOVBZload { 14892 break 14893 } 14894 if x7.AuxInt != i-7 { 14895 break 14896 } 14897 if x7.Aux != s { 14898 break 14899 } 14900 if p != x7.Args[0] { 14901 break 14902 } 14903 if mem != x7.Args[1] { 14904 break 14905 } 14906 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14907 break 14908 } 14909 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14910 v0 := b.NewValue0(v.Pos, OpS390XMOVDload, config.fe.TypeUInt64()) 14911 v.reset(OpCopy) 14912 v.AddArg(v0) 14913 v0.AuxInt = i - 7 14914 v0.Aux = s 14915 v0.AddArg(p) 14916 v0.AddArg(mem) 14917 return true 14918 } 14919 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i-2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i-3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i-4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i-5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i-6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i-7] {s} p idx mem))) 14920 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14921 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDloadidx <v.Type> [i-7] {s} p idx mem) 14922 for { 14923 o0 := v.Args[0] 14924 if o0.Op != OpS390XOR { 14925 break 14926 } 14927 o1 := o0.Args[0] 14928 if o1.Op != OpS390XOR { 14929 break 14930 } 14931 o2 := o1.Args[0] 14932 if o2.Op != OpS390XOR { 14933 break 14934 } 14935 o3 := o2.Args[0] 14936 if o3.Op != OpS390XOR { 14937 break 14938 } 14939 o4 := o3.Args[0] 14940 if o4.Op != OpS390XOR { 14941 break 14942 } 14943 o5 := o4.Args[0] 14944 if o5.Op != OpS390XOR { 14945 break 14946 } 14947 x0 := o5.Args[0] 14948 if x0.Op != OpS390XMOVBZloadidx { 14949 break 14950 } 14951 i := x0.AuxInt 14952 s := x0.Aux 14953 p := x0.Args[0] 14954 idx := x0.Args[1] 14955 mem := x0.Args[2] 14956 s0 := o5.Args[1] 14957 if s0.Op != OpS390XSLDconst { 14958 break 14959 } 14960 if s0.AuxInt != 8 { 14961 break 14962 } 14963 x1 := s0.Args[0] 14964 if x1.Op != OpS390XMOVBZloadidx { 14965 break 14966 } 14967 if x1.AuxInt != i-1 { 14968 break 14969 } 14970 if x1.Aux != s { 14971 break 14972 } 14973 if p != x1.Args[0] { 14974 break 14975 } 14976 if idx != x1.Args[1] { 14977 break 14978 } 14979 if mem != x1.Args[2] { 14980 break 14981 } 14982 s1 := o4.Args[1] 14983 if s1.Op != OpS390XSLDconst { 14984 break 14985 } 14986 if s1.AuxInt != 16 { 14987 break 14988 } 14989 x2 := s1.Args[0] 14990 if x2.Op != OpS390XMOVBZloadidx { 14991 break 14992 } 14993 if x2.AuxInt != i-2 { 14994 break 14995 } 14996 if x2.Aux != s { 14997 break 14998 } 14999 if p != x2.Args[0] { 15000 break 15001 } 15002 if idx != x2.Args[1] { 15003 break 15004 } 15005 if mem != x2.Args[2] { 15006 break 15007 } 15008 s2 := o3.Args[1] 15009 if s2.Op != OpS390XSLDconst { 15010 break 15011 } 15012 if s2.AuxInt != 24 { 15013 break 15014 } 15015 x3 := s2.Args[0] 15016 if x3.Op != OpS390XMOVBZloadidx { 15017 break 15018 } 15019 if x3.AuxInt != i-3 { 15020 break 15021 } 15022 if x3.Aux != s { 15023 break 15024 } 15025 if p != x3.Args[0] { 15026 break 15027 } 15028 if idx != x3.Args[1] { 15029 break 15030 } 15031 if mem != x3.Args[2] { 15032 break 15033 } 15034 s3 := o2.Args[1] 15035 if s3.Op != OpS390XSLDconst { 15036 break 15037 } 15038 if s3.AuxInt != 32 { 15039 break 15040 } 15041 x4 := s3.Args[0] 15042 if x4.Op != OpS390XMOVBZloadidx { 15043 break 15044 } 15045 if x4.AuxInt != i-4 { 15046 break 15047 } 15048 if x4.Aux != s { 15049 break 15050 } 15051 if p != x4.Args[0] { 15052 break 15053 } 15054 if idx != x4.Args[1] { 15055 break 15056 } 15057 if mem != x4.Args[2] { 15058 break 15059 } 15060 s4 := o1.Args[1] 15061 if s4.Op != OpS390XSLDconst { 15062 break 15063 } 15064 if s4.AuxInt != 40 { 15065 break 15066 } 15067 x5 := s4.Args[0] 15068 if x5.Op != OpS390XMOVBZloadidx { 15069 break 15070 } 15071 if x5.AuxInt != i-5 { 15072 break 15073 } 15074 if x5.Aux != s { 15075 break 15076 } 15077 if p != x5.Args[0] { 15078 break 15079 } 15080 if idx != x5.Args[1] { 15081 break 15082 } 15083 if mem != x5.Args[2] { 15084 break 15085 } 15086 s5 := o0.Args[1] 15087 if s5.Op != OpS390XSLDconst { 15088 break 15089 } 15090 if s5.AuxInt != 48 { 15091 break 15092 } 15093 x6 := s5.Args[0] 15094 if x6.Op != OpS390XMOVBZloadidx { 15095 break 15096 } 15097 if x6.AuxInt != i-6 { 15098 break 15099 } 15100 if x6.Aux != s { 15101 break 15102 } 15103 if p != x6.Args[0] { 15104 break 15105 } 15106 if idx != x6.Args[1] { 15107 break 15108 } 15109 if mem != x6.Args[2] { 15110 break 15111 } 15112 s6 := v.Args[1] 15113 if s6.Op != OpS390XSLDconst { 15114 break 15115 } 15116 if s6.AuxInt != 56 { 15117 break 15118 } 15119 x7 := s6.Args[0] 15120 if x7.Op != OpS390XMOVBZloadidx { 15121 break 15122 } 15123 if x7.AuxInt != i-7 { 15124 break 15125 } 15126 if x7.Aux != s { 15127 break 15128 } 15129 if p != x7.Args[0] { 15130 break 15131 } 15132 if idx != x7.Args[1] { 15133 break 15134 } 15135 if mem != x7.Args[2] { 15136 break 15137 } 15138 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 15139 break 15140 } 15141 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 15142 v0 := b.NewValue0(v.Pos, OpS390XMOVDloadidx, v.Type) 15143 v.reset(OpCopy) 15144 v.AddArg(v0) 15145 v0.AuxInt = i - 7 15146 v0.Aux = s 15147 v0.AddArg(p) 15148 v0.AddArg(idx) 15149 v0.AddArg(mem) 15150 return true 15151 } 15152 return false 15153 } 15154 func rewriteValueS390X_OpS390XORW(v *Value, config *Config) bool { 15155 b := v.Block 15156 _ = b 15157 // match: (ORW x (MOVDconst [c])) 15158 // cond: 15159 // result: (ORWconst [c] x) 15160 for { 15161 x := v.Args[0] 15162 v_1 := v.Args[1] 15163 if v_1.Op != OpS390XMOVDconst { 15164 break 15165 } 15166 c := v_1.AuxInt 15167 v.reset(OpS390XORWconst) 15168 v.AuxInt = c 15169 v.AddArg(x) 15170 return true 15171 } 15172 // match: (ORW (MOVDconst [c]) x) 15173 // cond: 15174 // result: (ORWconst [c] x) 15175 for { 15176 v_0 := v.Args[0] 15177 if v_0.Op != OpS390XMOVDconst { 15178 break 15179 } 15180 c := v_0.AuxInt 15181 x := v.Args[1] 15182 v.reset(OpS390XORWconst) 15183 v.AuxInt = c 15184 v.AddArg(x) 15185 return true 15186 } 15187 // match: ( ORW (SLWconst x [c]) (SRWconst x [32-c])) 15188 // cond: 15189 // result: (RLLconst [ c] x) 15190 for { 15191 v_0 := v.Args[0] 15192 if v_0.Op != OpS390XSLWconst { 15193 break 15194 } 15195 c := v_0.AuxInt 15196 x := v_0.Args[0] 15197 v_1 := v.Args[1] 15198 if v_1.Op != OpS390XSRWconst { 15199 break 15200 } 15201 if v_1.AuxInt != 32-c { 15202 break 15203 } 15204 if x != v_1.Args[0] { 15205 break 15206 } 15207 v.reset(OpS390XRLLconst) 15208 v.AuxInt = c 15209 v.AddArg(x) 15210 return true 15211 } 15212 // match: ( ORW (SRWconst x [c]) (SLWconst x [32-c])) 15213 // cond: 15214 // result: (RLLconst [32-c] x) 15215 for { 15216 v_0 := v.Args[0] 15217 if v_0.Op != OpS390XSRWconst { 15218 break 15219 } 15220 c := v_0.AuxInt 15221 x := v_0.Args[0] 15222 v_1 := v.Args[1] 15223 if v_1.Op != OpS390XSLWconst { 15224 break 15225 } 15226 if v_1.AuxInt != 32-c { 15227 break 15228 } 15229 if x != v_1.Args[0] { 15230 break 15231 } 15232 v.reset(OpS390XRLLconst) 15233 v.AuxInt = 32 - c 15234 v.AddArg(x) 15235 return true 15236 } 15237 // match: (ORW x x) 15238 // cond: 15239 // result: x 15240 for { 15241 x := v.Args[0] 15242 if x != v.Args[1] { 15243 break 15244 } 15245 v.reset(OpCopy) 15246 v.Type = x.Type 15247 v.AddArg(x) 15248 return true 15249 } 15250 // match: (ORW <t> x g:(MOVWload [off] {sym} ptr mem)) 15251 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15252 // result: (ORWload <t> [off] {sym} x ptr mem) 15253 for { 15254 t := v.Type 15255 x := v.Args[0] 15256 g := v.Args[1] 15257 if g.Op != OpS390XMOVWload { 15258 break 15259 } 15260 off := g.AuxInt 15261 sym := g.Aux 15262 ptr := g.Args[0] 15263 mem := g.Args[1] 15264 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15265 break 15266 } 15267 v.reset(OpS390XORWload) 15268 v.Type = t 15269 v.AuxInt = off 15270 v.Aux = sym 15271 v.AddArg(x) 15272 v.AddArg(ptr) 15273 v.AddArg(mem) 15274 return true 15275 } 15276 // match: (ORW <t> g:(MOVWload [off] {sym} ptr mem) x) 15277 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15278 // result: (ORWload <t> [off] {sym} x ptr mem) 15279 for { 15280 t := v.Type 15281 g := v.Args[0] 15282 if g.Op != OpS390XMOVWload { 15283 break 15284 } 15285 off := g.AuxInt 15286 sym := g.Aux 15287 ptr := g.Args[0] 15288 mem := g.Args[1] 15289 x := v.Args[1] 15290 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15291 break 15292 } 15293 v.reset(OpS390XORWload) 15294 v.Type = t 15295 v.AuxInt = off 15296 v.Aux = sym 15297 v.AddArg(x) 15298 v.AddArg(ptr) 15299 v.AddArg(mem) 15300 return true 15301 } 15302 // match: (ORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 15303 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15304 // result: (ORWload <t> [off] {sym} x ptr mem) 15305 for { 15306 t := v.Type 15307 x := v.Args[0] 15308 g := v.Args[1] 15309 if g.Op != OpS390XMOVWZload { 15310 break 15311 } 15312 off := g.AuxInt 15313 sym := g.Aux 15314 ptr := g.Args[0] 15315 mem := g.Args[1] 15316 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15317 break 15318 } 15319 v.reset(OpS390XORWload) 15320 v.Type = t 15321 v.AuxInt = off 15322 v.Aux = sym 15323 v.AddArg(x) 15324 v.AddArg(ptr) 15325 v.AddArg(mem) 15326 return true 15327 } 15328 // match: (ORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 15329 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15330 // result: (ORWload <t> [off] {sym} x ptr mem) 15331 for { 15332 t := v.Type 15333 g := v.Args[0] 15334 if g.Op != OpS390XMOVWZload { 15335 break 15336 } 15337 off := g.AuxInt 15338 sym := g.Aux 15339 ptr := g.Args[0] 15340 mem := g.Args[1] 15341 x := v.Args[1] 15342 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15343 break 15344 } 15345 v.reset(OpS390XORWload) 15346 v.Type = t 15347 v.AuxInt = off 15348 v.Aux = sym 15349 v.AddArg(x) 15350 v.AddArg(ptr) 15351 v.AddArg(mem) 15352 return true 15353 } 15354 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i+1] {s} p mem))) 15355 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15356 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRload [i] {s} p mem)) 15357 for { 15358 x0 := v.Args[0] 15359 if x0.Op != OpS390XMOVBZload { 15360 break 15361 } 15362 i := x0.AuxInt 15363 s := x0.Aux 15364 p := x0.Args[0] 15365 mem := x0.Args[1] 15366 s0 := v.Args[1] 15367 if s0.Op != OpS390XSLWconst { 15368 break 15369 } 15370 if s0.AuxInt != 8 { 15371 break 15372 } 15373 x1 := s0.Args[0] 15374 if x1.Op != OpS390XMOVBZload { 15375 break 15376 } 15377 if x1.AuxInt != i+1 { 15378 break 15379 } 15380 if x1.Aux != s { 15381 break 15382 } 15383 if p != x1.Args[0] { 15384 break 15385 } 15386 if mem != x1.Args[1] { 15387 break 15388 } 15389 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15390 break 15391 } 15392 b = mergePoint(b, x0, x1) 15393 v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15394 v.reset(OpCopy) 15395 v.AddArg(v0) 15396 v1 := b.NewValue0(v.Pos, OpS390XMOVHBRload, config.fe.TypeUInt16()) 15397 v1.AuxInt = i 15398 v1.Aux = s 15399 v1.AddArg(p) 15400 v1.AddArg(mem) 15401 v0.AddArg(v1) 15402 return true 15403 } 15404 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRload [i] {s} p mem)) s0:(SLWconst [16] x1:(MOVBZload [i+2] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i+3] {s} p mem))) 15405 // cond: p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15406 // result: @mergePoint(b,x0,x1,x2) (MOVWBRload [i] {s} p mem) 15407 for { 15408 o0 := v.Args[0] 15409 if o0.Op != OpS390XORW { 15410 break 15411 } 15412 z0 := o0.Args[0] 15413 if z0.Op != OpS390XMOVHZreg { 15414 break 15415 } 15416 x0 := z0.Args[0] 15417 if x0.Op != OpS390XMOVHBRload { 15418 break 15419 } 15420 i := x0.AuxInt 15421 s := x0.Aux 15422 p := x0.Args[0] 15423 mem := x0.Args[1] 15424 s0 := o0.Args[1] 15425 if s0.Op != OpS390XSLWconst { 15426 break 15427 } 15428 if s0.AuxInt != 16 { 15429 break 15430 } 15431 x1 := s0.Args[0] 15432 if x1.Op != OpS390XMOVBZload { 15433 break 15434 } 15435 if x1.AuxInt != i+2 { 15436 break 15437 } 15438 if x1.Aux != s { 15439 break 15440 } 15441 if p != x1.Args[0] { 15442 break 15443 } 15444 if mem != x1.Args[1] { 15445 break 15446 } 15447 s1 := v.Args[1] 15448 if s1.Op != OpS390XSLWconst { 15449 break 15450 } 15451 if s1.AuxInt != 24 { 15452 break 15453 } 15454 x2 := s1.Args[0] 15455 if x2.Op != OpS390XMOVBZload { 15456 break 15457 } 15458 if x2.AuxInt != i+3 { 15459 break 15460 } 15461 if x2.Aux != s { 15462 break 15463 } 15464 if p != x2.Args[0] { 15465 break 15466 } 15467 if mem != x2.Args[1] { 15468 break 15469 } 15470 if !(p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15471 break 15472 } 15473 b = mergePoint(b, x0, x1, x2) 15474 v0 := b.NewValue0(v.Pos, OpS390XMOVWBRload, config.fe.TypeUInt32()) 15475 v.reset(OpCopy) 15476 v.AddArg(v0) 15477 v0.AuxInt = i 15478 v0.Aux = s 15479 v0.AddArg(p) 15480 v0.AddArg(mem) 15481 return true 15482 } 15483 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) 15484 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15485 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRloadidx <v.Type> [i] {s} p idx mem)) 15486 for { 15487 x0 := v.Args[0] 15488 if x0.Op != OpS390XMOVBZloadidx { 15489 break 15490 } 15491 i := x0.AuxInt 15492 s := x0.Aux 15493 p := x0.Args[0] 15494 idx := x0.Args[1] 15495 mem := x0.Args[2] 15496 s0 := v.Args[1] 15497 if s0.Op != OpS390XSLWconst { 15498 break 15499 } 15500 if s0.AuxInt != 8 { 15501 break 15502 } 15503 x1 := s0.Args[0] 15504 if x1.Op != OpS390XMOVBZloadidx { 15505 break 15506 } 15507 if x1.AuxInt != i+1 { 15508 break 15509 } 15510 if x1.Aux != s { 15511 break 15512 } 15513 if p != x1.Args[0] { 15514 break 15515 } 15516 if idx != x1.Args[1] { 15517 break 15518 } 15519 if mem != x1.Args[2] { 15520 break 15521 } 15522 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15523 break 15524 } 15525 b = mergePoint(b, x0, x1) 15526 v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15527 v.reset(OpCopy) 15528 v.AddArg(v0) 15529 v1 := b.NewValue0(v.Pos, OpS390XMOVHBRloadidx, v.Type) 15530 v1.AuxInt = i 15531 v1.Aux = s 15532 v1.AddArg(p) 15533 v1.AddArg(idx) 15534 v1.AddArg(mem) 15535 v0.AddArg(v1) 15536 return true 15537 } 15538 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRloadidx [i] {s} p idx mem)) s0:(SLWconst [16] x1:(MOVBZloadidx [i+2] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i+3] {s} p idx mem))) 15539 // cond: z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15540 // result: @mergePoint(b,x0,x1,x2) (MOVWZreg (MOVWBRloadidx <v.Type> [i] {s} p idx mem)) 15541 for { 15542 o0 := v.Args[0] 15543 if o0.Op != OpS390XORW { 15544 break 15545 } 15546 z0 := o0.Args[0] 15547 if z0.Op != OpS390XMOVHZreg { 15548 break 15549 } 15550 x0 := z0.Args[0] 15551 if x0.Op != OpS390XMOVHBRloadidx { 15552 break 15553 } 15554 i := x0.AuxInt 15555 s := x0.Aux 15556 p := x0.Args[0] 15557 idx := x0.Args[1] 15558 mem := x0.Args[2] 15559 s0 := o0.Args[1] 15560 if s0.Op != OpS390XSLWconst { 15561 break 15562 } 15563 if s0.AuxInt != 16 { 15564 break 15565 } 15566 x1 := s0.Args[0] 15567 if x1.Op != OpS390XMOVBZloadidx { 15568 break 15569 } 15570 if x1.AuxInt != i+2 { 15571 break 15572 } 15573 if x1.Aux != s { 15574 break 15575 } 15576 if p != x1.Args[0] { 15577 break 15578 } 15579 if idx != x1.Args[1] { 15580 break 15581 } 15582 if mem != x1.Args[2] { 15583 break 15584 } 15585 s1 := v.Args[1] 15586 if s1.Op != OpS390XSLWconst { 15587 break 15588 } 15589 if s1.AuxInt != 24 { 15590 break 15591 } 15592 x2 := s1.Args[0] 15593 if x2.Op != OpS390XMOVBZloadidx { 15594 break 15595 } 15596 if x2.AuxInt != i+3 { 15597 break 15598 } 15599 if x2.Aux != s { 15600 break 15601 } 15602 if p != x2.Args[0] { 15603 break 15604 } 15605 if idx != x2.Args[1] { 15606 break 15607 } 15608 if mem != x2.Args[2] { 15609 break 15610 } 15611 if !(z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15612 break 15613 } 15614 b = mergePoint(b, x0, x1, x2) 15615 v0 := b.NewValue0(v.Pos, OpS390XMOVWZreg, config.fe.TypeUInt64()) 15616 v.reset(OpCopy) 15617 v.AddArg(v0) 15618 v1 := b.NewValue0(v.Pos, OpS390XMOVWBRloadidx, v.Type) 15619 v1.AuxInt = i 15620 v1.Aux = s 15621 v1.AddArg(p) 15622 v1.AddArg(idx) 15623 v1.AddArg(mem) 15624 v0.AddArg(v1) 15625 return true 15626 } 15627 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i-1] {s} p mem))) 15628 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15629 // result: @mergePoint(b,x0,x1) (MOVHZload [i-1] {s} p mem) 15630 for { 15631 x0 := v.Args[0] 15632 if x0.Op != OpS390XMOVBZload { 15633 break 15634 } 15635 i := x0.AuxInt 15636 s := x0.Aux 15637 p := x0.Args[0] 15638 mem := x0.Args[1] 15639 s0 := v.Args[1] 15640 if s0.Op != OpS390XSLWconst { 15641 break 15642 } 15643 if s0.AuxInt != 8 { 15644 break 15645 } 15646 x1 := s0.Args[0] 15647 if x1.Op != OpS390XMOVBZload { 15648 break 15649 } 15650 if x1.AuxInt != i-1 { 15651 break 15652 } 15653 if x1.Aux != s { 15654 break 15655 } 15656 if p != x1.Args[0] { 15657 break 15658 } 15659 if mem != x1.Args[1] { 15660 break 15661 } 15662 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15663 break 15664 } 15665 b = mergePoint(b, x0, x1) 15666 v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, config.fe.TypeUInt16()) 15667 v.reset(OpCopy) 15668 v.AddArg(v0) 15669 v0.AuxInt = i - 1 15670 v0.Aux = s 15671 v0.AddArg(p) 15672 v0.AddArg(mem) 15673 return true 15674 } 15675 // match: (ORW o0:(ORW x0:(MOVHZload [i] {s} p mem) s0:(SLWconst [16] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i-2] {s} p mem))) 15676 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15677 // result: @mergePoint(b,x0,x1,x2) (MOVWZload [i-2] {s} p mem) 15678 for { 15679 o0 := v.Args[0] 15680 if o0.Op != OpS390XORW { 15681 break 15682 } 15683 x0 := o0.Args[0] 15684 if x0.Op != OpS390XMOVHZload { 15685 break 15686 } 15687 i := x0.AuxInt 15688 s := x0.Aux 15689 p := x0.Args[0] 15690 mem := x0.Args[1] 15691 s0 := o0.Args[1] 15692 if s0.Op != OpS390XSLWconst { 15693 break 15694 } 15695 if s0.AuxInt != 16 { 15696 break 15697 } 15698 x1 := s0.Args[0] 15699 if x1.Op != OpS390XMOVBZload { 15700 break 15701 } 15702 if x1.AuxInt != i-1 { 15703 break 15704 } 15705 if x1.Aux != s { 15706 break 15707 } 15708 if p != x1.Args[0] { 15709 break 15710 } 15711 if mem != x1.Args[1] { 15712 break 15713 } 15714 s1 := v.Args[1] 15715 if s1.Op != OpS390XSLWconst { 15716 break 15717 } 15718 if s1.AuxInt != 24 { 15719 break 15720 } 15721 x2 := s1.Args[0] 15722 if x2.Op != OpS390XMOVBZload { 15723 break 15724 } 15725 if x2.AuxInt != i-2 { 15726 break 15727 } 15728 if x2.Aux != s { 15729 break 15730 } 15731 if p != x2.Args[0] { 15732 break 15733 } 15734 if mem != x2.Args[1] { 15735 break 15736 } 15737 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15738 break 15739 } 15740 b = mergePoint(b, x0, x1, x2) 15741 v0 := b.NewValue0(v.Pos, OpS390XMOVWZload, config.fe.TypeUInt32()) 15742 v.reset(OpCopy) 15743 v.AddArg(v0) 15744 v0.AuxInt = i - 2 15745 v0.Aux = s 15746 v0.AddArg(p) 15747 v0.AddArg(mem) 15748 return true 15749 } 15750 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) 15751 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15752 // result: @mergePoint(b,x0,x1) (MOVHZloadidx <v.Type> [i-1] {s} p idx mem) 15753 for { 15754 x0 := v.Args[0] 15755 if x0.Op != OpS390XMOVBZloadidx { 15756 break 15757 } 15758 i := x0.AuxInt 15759 s := x0.Aux 15760 p := x0.Args[0] 15761 idx := x0.Args[1] 15762 mem := x0.Args[2] 15763 s0 := v.Args[1] 15764 if s0.Op != OpS390XSLWconst { 15765 break 15766 } 15767 if s0.AuxInt != 8 { 15768 break 15769 } 15770 x1 := s0.Args[0] 15771 if x1.Op != OpS390XMOVBZloadidx { 15772 break 15773 } 15774 if x1.AuxInt != i-1 { 15775 break 15776 } 15777 if x1.Aux != s { 15778 break 15779 } 15780 if p != x1.Args[0] { 15781 break 15782 } 15783 if idx != x1.Args[1] { 15784 break 15785 } 15786 if mem != x1.Args[2] { 15787 break 15788 } 15789 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15790 break 15791 } 15792 b = mergePoint(b, x0, x1) 15793 v0 := b.NewValue0(v.Pos, OpS390XMOVHZloadidx, v.Type) 15794 v.reset(OpCopy) 15795 v.AddArg(v0) 15796 v0.AuxInt = i - 1 15797 v0.Aux = s 15798 v0.AddArg(p) 15799 v0.AddArg(idx) 15800 v0.AddArg(mem) 15801 return true 15802 } 15803 // match: (ORW o0:(ORW x0:(MOVHZloadidx [i] {s} p idx mem) s0:(SLWconst [16] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i-2] {s} p idx mem))) 15804 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15805 // result: @mergePoint(b,x0,x1,x2) (MOVWZloadidx <v.Type> [i-2] {s} p idx mem) 15806 for { 15807 o0 := v.Args[0] 15808 if o0.Op != OpS390XORW { 15809 break 15810 } 15811 x0 := o0.Args[0] 15812 if x0.Op != OpS390XMOVHZloadidx { 15813 break 15814 } 15815 i := x0.AuxInt 15816 s := x0.Aux 15817 p := x0.Args[0] 15818 idx := x0.Args[1] 15819 mem := x0.Args[2] 15820 s0 := o0.Args[1] 15821 if s0.Op != OpS390XSLWconst { 15822 break 15823 } 15824 if s0.AuxInt != 16 { 15825 break 15826 } 15827 x1 := s0.Args[0] 15828 if x1.Op != OpS390XMOVBZloadidx { 15829 break 15830 } 15831 if x1.AuxInt != i-1 { 15832 break 15833 } 15834 if x1.Aux != s { 15835 break 15836 } 15837 if p != x1.Args[0] { 15838 break 15839 } 15840 if idx != x1.Args[1] { 15841 break 15842 } 15843 if mem != x1.Args[2] { 15844 break 15845 } 15846 s1 := v.Args[1] 15847 if s1.Op != OpS390XSLWconst { 15848 break 15849 } 15850 if s1.AuxInt != 24 { 15851 break 15852 } 15853 x2 := s1.Args[0] 15854 if x2.Op != OpS390XMOVBZloadidx { 15855 break 15856 } 15857 if x2.AuxInt != i-2 { 15858 break 15859 } 15860 if x2.Aux != s { 15861 break 15862 } 15863 if p != x2.Args[0] { 15864 break 15865 } 15866 if idx != x2.Args[1] { 15867 break 15868 } 15869 if mem != x2.Args[2] { 15870 break 15871 } 15872 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15873 break 15874 } 15875 b = mergePoint(b, x0, x1, x2) 15876 v0 := b.NewValue0(v.Pos, OpS390XMOVWZloadidx, v.Type) 15877 v.reset(OpCopy) 15878 v.AddArg(v0) 15879 v0.AuxInt = i - 2 15880 v0.Aux = s 15881 v0.AddArg(p) 15882 v0.AddArg(idx) 15883 v0.AddArg(mem) 15884 return true 15885 } 15886 return false 15887 } 15888 func rewriteValueS390X_OpS390XORWconst(v *Value, config *Config) bool { 15889 b := v.Block 15890 _ = b 15891 // match: (ORWconst [c] x) 15892 // cond: int32(c)==0 15893 // result: x 15894 for { 15895 c := v.AuxInt 15896 x := v.Args[0] 15897 if !(int32(c) == 0) { 15898 break 15899 } 15900 v.reset(OpCopy) 15901 v.Type = x.Type 15902 v.AddArg(x) 15903 return true 15904 } 15905 // match: (ORWconst [c] _) 15906 // cond: int32(c)==-1 15907 // result: (MOVDconst [-1]) 15908 for { 15909 c := v.AuxInt 15910 if !(int32(c) == -1) { 15911 break 15912 } 15913 v.reset(OpS390XMOVDconst) 15914 v.AuxInt = -1 15915 return true 15916 } 15917 // match: (ORWconst [c] (MOVDconst [d])) 15918 // cond: 15919 // result: (MOVDconst [c|d]) 15920 for { 15921 c := v.AuxInt 15922 v_0 := v.Args[0] 15923 if v_0.Op != OpS390XMOVDconst { 15924 break 15925 } 15926 d := v_0.AuxInt 15927 v.reset(OpS390XMOVDconst) 15928 v.AuxInt = c | d 15929 return true 15930 } 15931 return false 15932 } 15933 func rewriteValueS390X_OpS390XORconst(v *Value, config *Config) bool { 15934 b := v.Block 15935 _ = b 15936 // match: (ORconst [0] x) 15937 // cond: 15938 // result: x 15939 for { 15940 if v.AuxInt != 0 { 15941 break 15942 } 15943 x := v.Args[0] 15944 v.reset(OpCopy) 15945 v.Type = x.Type 15946 v.AddArg(x) 15947 return true 15948 } 15949 // match: (ORconst [-1] _) 15950 // cond: 15951 // result: (MOVDconst [-1]) 15952 for { 15953 if v.AuxInt != -1 { 15954 break 15955 } 15956 v.reset(OpS390XMOVDconst) 15957 v.AuxInt = -1 15958 return true 15959 } 15960 // match: (ORconst [c] (MOVDconst [d])) 15961 // cond: 15962 // result: (MOVDconst [c|d]) 15963 for { 15964 c := v.AuxInt 15965 v_0 := v.Args[0] 15966 if v_0.Op != OpS390XMOVDconst { 15967 break 15968 } 15969 d := v_0.AuxInt 15970 v.reset(OpS390XMOVDconst) 15971 v.AuxInt = c | d 15972 return true 15973 } 15974 return false 15975 } 15976 func rewriteValueS390X_OpS390XSLD(v *Value, config *Config) bool { 15977 b := v.Block 15978 _ = b 15979 // match: (SLD x (MOVDconst [c])) 15980 // cond: 15981 // result: (SLDconst [c&63] x) 15982 for { 15983 x := v.Args[0] 15984 v_1 := v.Args[1] 15985 if v_1.Op != OpS390XMOVDconst { 15986 break 15987 } 15988 c := v_1.AuxInt 15989 v.reset(OpS390XSLDconst) 15990 v.AuxInt = c & 63 15991 v.AddArg(x) 15992 return true 15993 } 15994 // match: (SLD x (ANDconst [63] y)) 15995 // cond: 15996 // result: (SLD x y) 15997 for { 15998 x := v.Args[0] 15999 v_1 := v.Args[1] 16000 if v_1.Op != OpS390XANDconst { 16001 break 16002 } 16003 if v_1.AuxInt != 63 { 16004 break 16005 } 16006 y := v_1.Args[0] 16007 v.reset(OpS390XSLD) 16008 v.AddArg(x) 16009 v.AddArg(y) 16010 return true 16011 } 16012 return false 16013 } 16014 func rewriteValueS390X_OpS390XSLW(v *Value, config *Config) bool { 16015 b := v.Block 16016 _ = b 16017 // match: (SLW x (MOVDconst [c])) 16018 // cond: 16019 // result: (SLWconst [c&63] x) 16020 for { 16021 x := v.Args[0] 16022 v_1 := v.Args[1] 16023 if v_1.Op != OpS390XMOVDconst { 16024 break 16025 } 16026 c := v_1.AuxInt 16027 v.reset(OpS390XSLWconst) 16028 v.AuxInt = c & 63 16029 v.AddArg(x) 16030 return true 16031 } 16032 // match: (SLW x (ANDWconst [63] y)) 16033 // cond: 16034 // result: (SLW x y) 16035 for { 16036 x := v.Args[0] 16037 v_1 := v.Args[1] 16038 if v_1.Op != OpS390XANDWconst { 16039 break 16040 } 16041 if v_1.AuxInt != 63 { 16042 break 16043 } 16044 y := v_1.Args[0] 16045 v.reset(OpS390XSLW) 16046 v.AddArg(x) 16047 v.AddArg(y) 16048 return true 16049 } 16050 return false 16051 } 16052 func rewriteValueS390X_OpS390XSRAD(v *Value, config *Config) bool { 16053 b := v.Block 16054 _ = b 16055 // match: (SRAD x (MOVDconst [c])) 16056 // cond: 16057 // result: (SRADconst [c&63] x) 16058 for { 16059 x := v.Args[0] 16060 v_1 := v.Args[1] 16061 if v_1.Op != OpS390XMOVDconst { 16062 break 16063 } 16064 c := v_1.AuxInt 16065 v.reset(OpS390XSRADconst) 16066 v.AuxInt = c & 63 16067 v.AddArg(x) 16068 return true 16069 } 16070 // match: (SRAD x (ANDconst [63] y)) 16071 // cond: 16072 // result: (SRAD x y) 16073 for { 16074 x := v.Args[0] 16075 v_1 := v.Args[1] 16076 if v_1.Op != OpS390XANDconst { 16077 break 16078 } 16079 if v_1.AuxInt != 63 { 16080 break 16081 } 16082 y := v_1.Args[0] 16083 v.reset(OpS390XSRAD) 16084 v.AddArg(x) 16085 v.AddArg(y) 16086 return true 16087 } 16088 return false 16089 } 16090 func rewriteValueS390X_OpS390XSRADconst(v *Value, config *Config) bool { 16091 b := v.Block 16092 _ = b 16093 // match: (SRADconst [c] (MOVDconst [d])) 16094 // cond: 16095 // result: (MOVDconst [d>>uint64(c)]) 16096 for { 16097 c := v.AuxInt 16098 v_0 := v.Args[0] 16099 if v_0.Op != OpS390XMOVDconst { 16100 break 16101 } 16102 d := v_0.AuxInt 16103 v.reset(OpS390XMOVDconst) 16104 v.AuxInt = d >> uint64(c) 16105 return true 16106 } 16107 return false 16108 } 16109 func rewriteValueS390X_OpS390XSRAW(v *Value, config *Config) bool { 16110 b := v.Block 16111 _ = b 16112 // match: (SRAW x (MOVDconst [c])) 16113 // cond: 16114 // result: (SRAWconst [c&63] x) 16115 for { 16116 x := v.Args[0] 16117 v_1 := v.Args[1] 16118 if v_1.Op != OpS390XMOVDconst { 16119 break 16120 } 16121 c := v_1.AuxInt 16122 v.reset(OpS390XSRAWconst) 16123 v.AuxInt = c & 63 16124 v.AddArg(x) 16125 return true 16126 } 16127 // match: (SRAW x (ANDWconst [63] y)) 16128 // cond: 16129 // result: (SRAW x y) 16130 for { 16131 x := v.Args[0] 16132 v_1 := v.Args[1] 16133 if v_1.Op != OpS390XANDWconst { 16134 break 16135 } 16136 if v_1.AuxInt != 63 { 16137 break 16138 } 16139 y := v_1.Args[0] 16140 v.reset(OpS390XSRAW) 16141 v.AddArg(x) 16142 v.AddArg(y) 16143 return true 16144 } 16145 return false 16146 } 16147 func rewriteValueS390X_OpS390XSRAWconst(v *Value, config *Config) bool { 16148 b := v.Block 16149 _ = b 16150 // match: (SRAWconst [c] (MOVDconst [d])) 16151 // cond: 16152 // result: (MOVDconst [d>>uint64(c)]) 16153 for { 16154 c := v.AuxInt 16155 v_0 := v.Args[0] 16156 if v_0.Op != OpS390XMOVDconst { 16157 break 16158 } 16159 d := v_0.AuxInt 16160 v.reset(OpS390XMOVDconst) 16161 v.AuxInt = d >> uint64(c) 16162 return true 16163 } 16164 return false 16165 } 16166 func rewriteValueS390X_OpS390XSRD(v *Value, config *Config) bool { 16167 b := v.Block 16168 _ = b 16169 // match: (SRD x (MOVDconst [c])) 16170 // cond: 16171 // result: (SRDconst [c&63] x) 16172 for { 16173 x := v.Args[0] 16174 v_1 := v.Args[1] 16175 if v_1.Op != OpS390XMOVDconst { 16176 break 16177 } 16178 c := v_1.AuxInt 16179 v.reset(OpS390XSRDconst) 16180 v.AuxInt = c & 63 16181 v.AddArg(x) 16182 return true 16183 } 16184 // match: (SRD x (ANDconst [63] y)) 16185 // cond: 16186 // result: (SRD x y) 16187 for { 16188 x := v.Args[0] 16189 v_1 := v.Args[1] 16190 if v_1.Op != OpS390XANDconst { 16191 break 16192 } 16193 if v_1.AuxInt != 63 { 16194 break 16195 } 16196 y := v_1.Args[0] 16197 v.reset(OpS390XSRD) 16198 v.AddArg(x) 16199 v.AddArg(y) 16200 return true 16201 } 16202 return false 16203 } 16204 func rewriteValueS390X_OpS390XSRW(v *Value, config *Config) bool { 16205 b := v.Block 16206 _ = b 16207 // match: (SRW x (MOVDconst [c])) 16208 // cond: 16209 // result: (SRWconst [c&63] x) 16210 for { 16211 x := v.Args[0] 16212 v_1 := v.Args[1] 16213 if v_1.Op != OpS390XMOVDconst { 16214 break 16215 } 16216 c := v_1.AuxInt 16217 v.reset(OpS390XSRWconst) 16218 v.AuxInt = c & 63 16219 v.AddArg(x) 16220 return true 16221 } 16222 // match: (SRW x (ANDWconst [63] y)) 16223 // cond: 16224 // result: (SRW x y) 16225 for { 16226 x := v.Args[0] 16227 v_1 := v.Args[1] 16228 if v_1.Op != OpS390XANDWconst { 16229 break 16230 } 16231 if v_1.AuxInt != 63 { 16232 break 16233 } 16234 y := v_1.Args[0] 16235 v.reset(OpS390XSRW) 16236 v.AddArg(x) 16237 v.AddArg(y) 16238 return true 16239 } 16240 return false 16241 } 16242 func rewriteValueS390X_OpS390XSTM2(v *Value, config *Config) bool { 16243 b := v.Block 16244 _ = b 16245 // match: (STM2 [i] {s} p w2 w3 x:(STM2 [i-8] {s} p w0 w1 mem)) 16246 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 16247 // result: (STM4 [i-8] {s} p w0 w1 w2 w3 mem) 16248 for { 16249 i := v.AuxInt 16250 s := v.Aux 16251 p := v.Args[0] 16252 w2 := v.Args[1] 16253 w3 := v.Args[2] 16254 x := v.Args[3] 16255 if x.Op != OpS390XSTM2 { 16256 break 16257 } 16258 if x.AuxInt != i-8 { 16259 break 16260 } 16261 if x.Aux != s { 16262 break 16263 } 16264 if p != x.Args[0] { 16265 break 16266 } 16267 w0 := x.Args[1] 16268 w1 := x.Args[2] 16269 mem := x.Args[3] 16270 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 16271 break 16272 } 16273 v.reset(OpS390XSTM4) 16274 v.AuxInt = i - 8 16275 v.Aux = s 16276 v.AddArg(p) 16277 v.AddArg(w0) 16278 v.AddArg(w1) 16279 v.AddArg(w2) 16280 v.AddArg(w3) 16281 v.AddArg(mem) 16282 return true 16283 } 16284 // match: (STM2 [i] {s} p (SRDconst [32] x) x mem) 16285 // cond: 16286 // result: (MOVDstore [i] {s} p x mem) 16287 for { 16288 i := v.AuxInt 16289 s := v.Aux 16290 p := v.Args[0] 16291 v_1 := v.Args[1] 16292 if v_1.Op != OpS390XSRDconst { 16293 break 16294 } 16295 if v_1.AuxInt != 32 { 16296 break 16297 } 16298 x := v_1.Args[0] 16299 if x != v.Args[2] { 16300 break 16301 } 16302 mem := v.Args[3] 16303 v.reset(OpS390XMOVDstore) 16304 v.AuxInt = i 16305 v.Aux = s 16306 v.AddArg(p) 16307 v.AddArg(x) 16308 v.AddArg(mem) 16309 return true 16310 } 16311 return false 16312 } 16313 func rewriteValueS390X_OpS390XSTMG2(v *Value, config *Config) bool { 16314 b := v.Block 16315 _ = b 16316 // match: (STMG2 [i] {s} p w2 w3 x:(STMG2 [i-16] {s} p w0 w1 mem)) 16317 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 16318 // result: (STMG4 [i-16] {s} p w0 w1 w2 w3 mem) 16319 for { 16320 i := v.AuxInt 16321 s := v.Aux 16322 p := v.Args[0] 16323 w2 := v.Args[1] 16324 w3 := v.Args[2] 16325 x := v.Args[3] 16326 if x.Op != OpS390XSTMG2 { 16327 break 16328 } 16329 if x.AuxInt != i-16 { 16330 break 16331 } 16332 if x.Aux != s { 16333 break 16334 } 16335 if p != x.Args[0] { 16336 break 16337 } 16338 w0 := x.Args[1] 16339 w1 := x.Args[2] 16340 mem := x.Args[3] 16341 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 16342 break 16343 } 16344 v.reset(OpS390XSTMG4) 16345 v.AuxInt = i - 16 16346 v.Aux = s 16347 v.AddArg(p) 16348 v.AddArg(w0) 16349 v.AddArg(w1) 16350 v.AddArg(w2) 16351 v.AddArg(w3) 16352 v.AddArg(mem) 16353 return true 16354 } 16355 return false 16356 } 16357 func rewriteValueS390X_OpS390XSUB(v *Value, config *Config) bool { 16358 b := v.Block 16359 _ = b 16360 // match: (SUB x (MOVDconst [c])) 16361 // cond: is32Bit(c) 16362 // result: (SUBconst x [c]) 16363 for { 16364 x := v.Args[0] 16365 v_1 := v.Args[1] 16366 if v_1.Op != OpS390XMOVDconst { 16367 break 16368 } 16369 c := v_1.AuxInt 16370 if !(is32Bit(c)) { 16371 break 16372 } 16373 v.reset(OpS390XSUBconst) 16374 v.AuxInt = c 16375 v.AddArg(x) 16376 return true 16377 } 16378 // match: (SUB (MOVDconst [c]) x) 16379 // cond: is32Bit(c) 16380 // result: (NEG (SUBconst <v.Type> x [c])) 16381 for { 16382 v_0 := v.Args[0] 16383 if v_0.Op != OpS390XMOVDconst { 16384 break 16385 } 16386 c := v_0.AuxInt 16387 x := v.Args[1] 16388 if !(is32Bit(c)) { 16389 break 16390 } 16391 v.reset(OpS390XNEG) 16392 v0 := b.NewValue0(v.Pos, OpS390XSUBconst, v.Type) 16393 v0.AuxInt = c 16394 v0.AddArg(x) 16395 v.AddArg(v0) 16396 return true 16397 } 16398 // match: (SUB x x) 16399 // cond: 16400 // result: (MOVDconst [0]) 16401 for { 16402 x := v.Args[0] 16403 if x != v.Args[1] { 16404 break 16405 } 16406 v.reset(OpS390XMOVDconst) 16407 v.AuxInt = 0 16408 return true 16409 } 16410 // match: (SUB <t> x g:(MOVDload [off] {sym} ptr mem)) 16411 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16412 // result: (SUBload <t> [off] {sym} x ptr mem) 16413 for { 16414 t := v.Type 16415 x := v.Args[0] 16416 g := v.Args[1] 16417 if g.Op != OpS390XMOVDload { 16418 break 16419 } 16420 off := g.AuxInt 16421 sym := g.Aux 16422 ptr := g.Args[0] 16423 mem := g.Args[1] 16424 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16425 break 16426 } 16427 v.reset(OpS390XSUBload) 16428 v.Type = t 16429 v.AuxInt = off 16430 v.Aux = sym 16431 v.AddArg(x) 16432 v.AddArg(ptr) 16433 v.AddArg(mem) 16434 return true 16435 } 16436 return false 16437 } 16438 func rewriteValueS390X_OpS390XSUBEWcarrymask(v *Value, config *Config) bool { 16439 b := v.Block 16440 _ = b 16441 // match: (SUBEWcarrymask (FlagEQ)) 16442 // cond: 16443 // result: (MOVDconst [-1]) 16444 for { 16445 v_0 := v.Args[0] 16446 if v_0.Op != OpS390XFlagEQ { 16447 break 16448 } 16449 v.reset(OpS390XMOVDconst) 16450 v.AuxInt = -1 16451 return true 16452 } 16453 // match: (SUBEWcarrymask (FlagLT)) 16454 // cond: 16455 // result: (MOVDconst [-1]) 16456 for { 16457 v_0 := v.Args[0] 16458 if v_0.Op != OpS390XFlagLT { 16459 break 16460 } 16461 v.reset(OpS390XMOVDconst) 16462 v.AuxInt = -1 16463 return true 16464 } 16465 // match: (SUBEWcarrymask (FlagGT)) 16466 // cond: 16467 // result: (MOVDconst [0]) 16468 for { 16469 v_0 := v.Args[0] 16470 if v_0.Op != OpS390XFlagGT { 16471 break 16472 } 16473 v.reset(OpS390XMOVDconst) 16474 v.AuxInt = 0 16475 return true 16476 } 16477 return false 16478 } 16479 func rewriteValueS390X_OpS390XSUBEcarrymask(v *Value, config *Config) bool { 16480 b := v.Block 16481 _ = b 16482 // match: (SUBEcarrymask (FlagEQ)) 16483 // cond: 16484 // result: (MOVDconst [-1]) 16485 for { 16486 v_0 := v.Args[0] 16487 if v_0.Op != OpS390XFlagEQ { 16488 break 16489 } 16490 v.reset(OpS390XMOVDconst) 16491 v.AuxInt = -1 16492 return true 16493 } 16494 // match: (SUBEcarrymask (FlagLT)) 16495 // cond: 16496 // result: (MOVDconst [-1]) 16497 for { 16498 v_0 := v.Args[0] 16499 if v_0.Op != OpS390XFlagLT { 16500 break 16501 } 16502 v.reset(OpS390XMOVDconst) 16503 v.AuxInt = -1 16504 return true 16505 } 16506 // match: (SUBEcarrymask (FlagGT)) 16507 // cond: 16508 // result: (MOVDconst [0]) 16509 for { 16510 v_0 := v.Args[0] 16511 if v_0.Op != OpS390XFlagGT { 16512 break 16513 } 16514 v.reset(OpS390XMOVDconst) 16515 v.AuxInt = 0 16516 return true 16517 } 16518 return false 16519 } 16520 func rewriteValueS390X_OpS390XSUBW(v *Value, config *Config) bool { 16521 b := v.Block 16522 _ = b 16523 // match: (SUBW x (MOVDconst [c])) 16524 // cond: 16525 // result: (SUBWconst x [c]) 16526 for { 16527 x := v.Args[0] 16528 v_1 := v.Args[1] 16529 if v_1.Op != OpS390XMOVDconst { 16530 break 16531 } 16532 c := v_1.AuxInt 16533 v.reset(OpS390XSUBWconst) 16534 v.AuxInt = c 16535 v.AddArg(x) 16536 return true 16537 } 16538 // match: (SUBW (MOVDconst [c]) x) 16539 // cond: 16540 // result: (NEGW (SUBWconst <v.Type> x [c])) 16541 for { 16542 v_0 := v.Args[0] 16543 if v_0.Op != OpS390XMOVDconst { 16544 break 16545 } 16546 c := v_0.AuxInt 16547 x := v.Args[1] 16548 v.reset(OpS390XNEGW) 16549 v0 := b.NewValue0(v.Pos, OpS390XSUBWconst, v.Type) 16550 v0.AuxInt = c 16551 v0.AddArg(x) 16552 v.AddArg(v0) 16553 return true 16554 } 16555 // match: (SUBW x x) 16556 // cond: 16557 // result: (MOVDconst [0]) 16558 for { 16559 x := v.Args[0] 16560 if x != v.Args[1] { 16561 break 16562 } 16563 v.reset(OpS390XMOVDconst) 16564 v.AuxInt = 0 16565 return true 16566 } 16567 // match: (SUBW <t> x g:(MOVWload [off] {sym} ptr mem)) 16568 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16569 // result: (SUBWload <t> [off] {sym} x ptr mem) 16570 for { 16571 t := v.Type 16572 x := v.Args[0] 16573 g := v.Args[1] 16574 if g.Op != OpS390XMOVWload { 16575 break 16576 } 16577 off := g.AuxInt 16578 sym := g.Aux 16579 ptr := g.Args[0] 16580 mem := g.Args[1] 16581 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16582 break 16583 } 16584 v.reset(OpS390XSUBWload) 16585 v.Type = t 16586 v.AuxInt = off 16587 v.Aux = sym 16588 v.AddArg(x) 16589 v.AddArg(ptr) 16590 v.AddArg(mem) 16591 return true 16592 } 16593 // match: (SUBW <t> x g:(MOVWZload [off] {sym} ptr mem)) 16594 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16595 // result: (SUBWload <t> [off] {sym} x ptr mem) 16596 for { 16597 t := v.Type 16598 x := v.Args[0] 16599 g := v.Args[1] 16600 if g.Op != OpS390XMOVWZload { 16601 break 16602 } 16603 off := g.AuxInt 16604 sym := g.Aux 16605 ptr := g.Args[0] 16606 mem := g.Args[1] 16607 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16608 break 16609 } 16610 v.reset(OpS390XSUBWload) 16611 v.Type = t 16612 v.AuxInt = off 16613 v.Aux = sym 16614 v.AddArg(x) 16615 v.AddArg(ptr) 16616 v.AddArg(mem) 16617 return true 16618 } 16619 return false 16620 } 16621 func rewriteValueS390X_OpS390XSUBWconst(v *Value, config *Config) bool { 16622 b := v.Block 16623 _ = b 16624 // match: (SUBWconst [c] x) 16625 // cond: int32(c) == 0 16626 // result: x 16627 for { 16628 c := v.AuxInt 16629 x := v.Args[0] 16630 if !(int32(c) == 0) { 16631 break 16632 } 16633 v.reset(OpCopy) 16634 v.Type = x.Type 16635 v.AddArg(x) 16636 return true 16637 } 16638 // match: (SUBWconst [c] x) 16639 // cond: 16640 // result: (ADDWconst [int64(int32(-c))] x) 16641 for { 16642 c := v.AuxInt 16643 x := v.Args[0] 16644 v.reset(OpS390XADDWconst) 16645 v.AuxInt = int64(int32(-c)) 16646 v.AddArg(x) 16647 return true 16648 } 16649 } 16650 func rewriteValueS390X_OpS390XSUBconst(v *Value, config *Config) bool { 16651 b := v.Block 16652 _ = b 16653 // match: (SUBconst [0] x) 16654 // cond: 16655 // result: x 16656 for { 16657 if v.AuxInt != 0 { 16658 break 16659 } 16660 x := v.Args[0] 16661 v.reset(OpCopy) 16662 v.Type = x.Type 16663 v.AddArg(x) 16664 return true 16665 } 16666 // match: (SUBconst [c] x) 16667 // cond: c != -(1<<31) 16668 // result: (ADDconst [-c] x) 16669 for { 16670 c := v.AuxInt 16671 x := v.Args[0] 16672 if !(c != -(1 << 31)) { 16673 break 16674 } 16675 v.reset(OpS390XADDconst) 16676 v.AuxInt = -c 16677 v.AddArg(x) 16678 return true 16679 } 16680 // match: (SUBconst (MOVDconst [d]) [c]) 16681 // cond: 16682 // result: (MOVDconst [d-c]) 16683 for { 16684 c := v.AuxInt 16685 v_0 := v.Args[0] 16686 if v_0.Op != OpS390XMOVDconst { 16687 break 16688 } 16689 d := v_0.AuxInt 16690 v.reset(OpS390XMOVDconst) 16691 v.AuxInt = d - c 16692 return true 16693 } 16694 // match: (SUBconst (SUBconst x [d]) [c]) 16695 // cond: is32Bit(-c-d) 16696 // result: (ADDconst [-c-d] x) 16697 for { 16698 c := v.AuxInt 16699 v_0 := v.Args[0] 16700 if v_0.Op != OpS390XSUBconst { 16701 break 16702 } 16703 d := v_0.AuxInt 16704 x := v_0.Args[0] 16705 if !(is32Bit(-c - d)) { 16706 break 16707 } 16708 v.reset(OpS390XADDconst) 16709 v.AuxInt = -c - d 16710 v.AddArg(x) 16711 return true 16712 } 16713 return false 16714 } 16715 func rewriteValueS390X_OpS390XXOR(v *Value, config *Config) bool { 16716 b := v.Block 16717 _ = b 16718 // match: (XOR x (MOVDconst [c])) 16719 // cond: isU32Bit(c) 16720 // result: (XORconst [c] x) 16721 for { 16722 x := v.Args[0] 16723 v_1 := v.Args[1] 16724 if v_1.Op != OpS390XMOVDconst { 16725 break 16726 } 16727 c := v_1.AuxInt 16728 if !(isU32Bit(c)) { 16729 break 16730 } 16731 v.reset(OpS390XXORconst) 16732 v.AuxInt = c 16733 v.AddArg(x) 16734 return true 16735 } 16736 // match: (XOR (MOVDconst [c]) x) 16737 // cond: isU32Bit(c) 16738 // result: (XORconst [c] x) 16739 for { 16740 v_0 := v.Args[0] 16741 if v_0.Op != OpS390XMOVDconst { 16742 break 16743 } 16744 c := v_0.AuxInt 16745 x := v.Args[1] 16746 if !(isU32Bit(c)) { 16747 break 16748 } 16749 v.reset(OpS390XXORconst) 16750 v.AuxInt = c 16751 v.AddArg(x) 16752 return true 16753 } 16754 // match: (XOR (SLDconst x [c]) (SRDconst x [64-c])) 16755 // cond: 16756 // result: (RLLGconst [ c] x) 16757 for { 16758 v_0 := v.Args[0] 16759 if v_0.Op != OpS390XSLDconst { 16760 break 16761 } 16762 c := v_0.AuxInt 16763 x := v_0.Args[0] 16764 v_1 := v.Args[1] 16765 if v_1.Op != OpS390XSRDconst { 16766 break 16767 } 16768 if v_1.AuxInt != 64-c { 16769 break 16770 } 16771 if x != v_1.Args[0] { 16772 break 16773 } 16774 v.reset(OpS390XRLLGconst) 16775 v.AuxInt = c 16776 v.AddArg(x) 16777 return true 16778 } 16779 // match: (XOR (SRDconst x [c]) (SLDconst x [64-c])) 16780 // cond: 16781 // result: (RLLGconst [64-c] x) 16782 for { 16783 v_0 := v.Args[0] 16784 if v_0.Op != OpS390XSRDconst { 16785 break 16786 } 16787 c := v_0.AuxInt 16788 x := v_0.Args[0] 16789 v_1 := v.Args[1] 16790 if v_1.Op != OpS390XSLDconst { 16791 break 16792 } 16793 if v_1.AuxInt != 64-c { 16794 break 16795 } 16796 if x != v_1.Args[0] { 16797 break 16798 } 16799 v.reset(OpS390XRLLGconst) 16800 v.AuxInt = 64 - c 16801 v.AddArg(x) 16802 return true 16803 } 16804 // match: (XOR (MOVDconst [c]) (MOVDconst [d])) 16805 // cond: 16806 // result: (MOVDconst [c^d]) 16807 for { 16808 v_0 := v.Args[0] 16809 if v_0.Op != OpS390XMOVDconst { 16810 break 16811 } 16812 c := v_0.AuxInt 16813 v_1 := v.Args[1] 16814 if v_1.Op != OpS390XMOVDconst { 16815 break 16816 } 16817 d := v_1.AuxInt 16818 v.reset(OpS390XMOVDconst) 16819 v.AuxInt = c ^ d 16820 return true 16821 } 16822 // match: (XOR x x) 16823 // cond: 16824 // result: (MOVDconst [0]) 16825 for { 16826 x := v.Args[0] 16827 if x != v.Args[1] { 16828 break 16829 } 16830 v.reset(OpS390XMOVDconst) 16831 v.AuxInt = 0 16832 return true 16833 } 16834 // match: (XOR <t> x g:(MOVDload [off] {sym} ptr mem)) 16835 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16836 // result: (XORload <t> [off] {sym} x ptr mem) 16837 for { 16838 t := v.Type 16839 x := v.Args[0] 16840 g := v.Args[1] 16841 if g.Op != OpS390XMOVDload { 16842 break 16843 } 16844 off := g.AuxInt 16845 sym := g.Aux 16846 ptr := g.Args[0] 16847 mem := g.Args[1] 16848 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16849 break 16850 } 16851 v.reset(OpS390XXORload) 16852 v.Type = t 16853 v.AuxInt = off 16854 v.Aux = sym 16855 v.AddArg(x) 16856 v.AddArg(ptr) 16857 v.AddArg(mem) 16858 return true 16859 } 16860 // match: (XOR <t> g:(MOVDload [off] {sym} ptr mem) x) 16861 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16862 // result: (XORload <t> [off] {sym} x ptr mem) 16863 for { 16864 t := v.Type 16865 g := v.Args[0] 16866 if g.Op != OpS390XMOVDload { 16867 break 16868 } 16869 off := g.AuxInt 16870 sym := g.Aux 16871 ptr := g.Args[0] 16872 mem := g.Args[1] 16873 x := v.Args[1] 16874 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16875 break 16876 } 16877 v.reset(OpS390XXORload) 16878 v.Type = t 16879 v.AuxInt = off 16880 v.Aux = sym 16881 v.AddArg(x) 16882 v.AddArg(ptr) 16883 v.AddArg(mem) 16884 return true 16885 } 16886 return false 16887 } 16888 func rewriteValueS390X_OpS390XXORW(v *Value, config *Config) bool { 16889 b := v.Block 16890 _ = b 16891 // match: (XORW x (MOVDconst [c])) 16892 // cond: 16893 // result: (XORWconst [c] x) 16894 for { 16895 x := v.Args[0] 16896 v_1 := v.Args[1] 16897 if v_1.Op != OpS390XMOVDconst { 16898 break 16899 } 16900 c := v_1.AuxInt 16901 v.reset(OpS390XXORWconst) 16902 v.AuxInt = c 16903 v.AddArg(x) 16904 return true 16905 } 16906 // match: (XORW (MOVDconst [c]) x) 16907 // cond: 16908 // result: (XORWconst [c] x) 16909 for { 16910 v_0 := v.Args[0] 16911 if v_0.Op != OpS390XMOVDconst { 16912 break 16913 } 16914 c := v_0.AuxInt 16915 x := v.Args[1] 16916 v.reset(OpS390XXORWconst) 16917 v.AuxInt = c 16918 v.AddArg(x) 16919 return true 16920 } 16921 // match: (XORW (SLWconst x [c]) (SRWconst x [32-c])) 16922 // cond: 16923 // result: (RLLconst [ c] x) 16924 for { 16925 v_0 := v.Args[0] 16926 if v_0.Op != OpS390XSLWconst { 16927 break 16928 } 16929 c := v_0.AuxInt 16930 x := v_0.Args[0] 16931 v_1 := v.Args[1] 16932 if v_1.Op != OpS390XSRWconst { 16933 break 16934 } 16935 if v_1.AuxInt != 32-c { 16936 break 16937 } 16938 if x != v_1.Args[0] { 16939 break 16940 } 16941 v.reset(OpS390XRLLconst) 16942 v.AuxInt = c 16943 v.AddArg(x) 16944 return true 16945 } 16946 // match: (XORW (SRWconst x [c]) (SLWconst x [32-c])) 16947 // cond: 16948 // result: (RLLconst [32-c] x) 16949 for { 16950 v_0 := v.Args[0] 16951 if v_0.Op != OpS390XSRWconst { 16952 break 16953 } 16954 c := v_0.AuxInt 16955 x := v_0.Args[0] 16956 v_1 := v.Args[1] 16957 if v_1.Op != OpS390XSLWconst { 16958 break 16959 } 16960 if v_1.AuxInt != 32-c { 16961 break 16962 } 16963 if x != v_1.Args[0] { 16964 break 16965 } 16966 v.reset(OpS390XRLLconst) 16967 v.AuxInt = 32 - c 16968 v.AddArg(x) 16969 return true 16970 } 16971 // match: (XORW x x) 16972 // cond: 16973 // result: (MOVDconst [0]) 16974 for { 16975 x := v.Args[0] 16976 if x != v.Args[1] { 16977 break 16978 } 16979 v.reset(OpS390XMOVDconst) 16980 v.AuxInt = 0 16981 return true 16982 } 16983 // match: (XORW <t> x g:(MOVWload [off] {sym} ptr mem)) 16984 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16985 // result: (XORWload <t> [off] {sym} x ptr mem) 16986 for { 16987 t := v.Type 16988 x := v.Args[0] 16989 g := v.Args[1] 16990 if g.Op != OpS390XMOVWload { 16991 break 16992 } 16993 off := g.AuxInt 16994 sym := g.Aux 16995 ptr := g.Args[0] 16996 mem := g.Args[1] 16997 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16998 break 16999 } 17000 v.reset(OpS390XXORWload) 17001 v.Type = t 17002 v.AuxInt = off 17003 v.Aux = sym 17004 v.AddArg(x) 17005 v.AddArg(ptr) 17006 v.AddArg(mem) 17007 return true 17008 } 17009 // match: (XORW <t> g:(MOVWload [off] {sym} ptr mem) x) 17010 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17011 // result: (XORWload <t> [off] {sym} x ptr mem) 17012 for { 17013 t := v.Type 17014 g := v.Args[0] 17015 if g.Op != OpS390XMOVWload { 17016 break 17017 } 17018 off := g.AuxInt 17019 sym := g.Aux 17020 ptr := g.Args[0] 17021 mem := g.Args[1] 17022 x := v.Args[1] 17023 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17024 break 17025 } 17026 v.reset(OpS390XXORWload) 17027 v.Type = t 17028 v.AuxInt = off 17029 v.Aux = sym 17030 v.AddArg(x) 17031 v.AddArg(ptr) 17032 v.AddArg(mem) 17033 return true 17034 } 17035 // match: (XORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 17036 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17037 // result: (XORWload <t> [off] {sym} x ptr mem) 17038 for { 17039 t := v.Type 17040 x := v.Args[0] 17041 g := v.Args[1] 17042 if g.Op != OpS390XMOVWZload { 17043 break 17044 } 17045 off := g.AuxInt 17046 sym := g.Aux 17047 ptr := g.Args[0] 17048 mem := g.Args[1] 17049 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17050 break 17051 } 17052 v.reset(OpS390XXORWload) 17053 v.Type = t 17054 v.AuxInt = off 17055 v.Aux = sym 17056 v.AddArg(x) 17057 v.AddArg(ptr) 17058 v.AddArg(mem) 17059 return true 17060 } 17061 // match: (XORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 17062 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 17063 // result: (XORWload <t> [off] {sym} x ptr mem) 17064 for { 17065 t := v.Type 17066 g := v.Args[0] 17067 if g.Op != OpS390XMOVWZload { 17068 break 17069 } 17070 off := g.AuxInt 17071 sym := g.Aux 17072 ptr := g.Args[0] 17073 mem := g.Args[1] 17074 x := v.Args[1] 17075 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 17076 break 17077 } 17078 v.reset(OpS390XXORWload) 17079 v.Type = t 17080 v.AuxInt = off 17081 v.Aux = sym 17082 v.AddArg(x) 17083 v.AddArg(ptr) 17084 v.AddArg(mem) 17085 return true 17086 } 17087 return false 17088 } 17089 func rewriteValueS390X_OpS390XXORWconst(v *Value, config *Config) bool { 17090 b := v.Block 17091 _ = b 17092 // match: (XORWconst [c] x) 17093 // cond: int32(c)==0 17094 // result: x 17095 for { 17096 c := v.AuxInt 17097 x := v.Args[0] 17098 if !(int32(c) == 0) { 17099 break 17100 } 17101 v.reset(OpCopy) 17102 v.Type = x.Type 17103 v.AddArg(x) 17104 return true 17105 } 17106 // match: (XORWconst [c] (MOVDconst [d])) 17107 // cond: 17108 // result: (MOVDconst [c^d]) 17109 for { 17110 c := v.AuxInt 17111 v_0 := v.Args[0] 17112 if v_0.Op != OpS390XMOVDconst { 17113 break 17114 } 17115 d := v_0.AuxInt 17116 v.reset(OpS390XMOVDconst) 17117 v.AuxInt = c ^ d 17118 return true 17119 } 17120 return false 17121 } 17122 func rewriteValueS390X_OpS390XXORconst(v *Value, config *Config) bool { 17123 b := v.Block 17124 _ = b 17125 // match: (XORconst [0] x) 17126 // cond: 17127 // result: x 17128 for { 17129 if v.AuxInt != 0 { 17130 break 17131 } 17132 x := v.Args[0] 17133 v.reset(OpCopy) 17134 v.Type = x.Type 17135 v.AddArg(x) 17136 return true 17137 } 17138 // match: (XORconst [c] (MOVDconst [d])) 17139 // cond: 17140 // result: (MOVDconst [c^d]) 17141 for { 17142 c := v.AuxInt 17143 v_0 := v.Args[0] 17144 if v_0.Op != OpS390XMOVDconst { 17145 break 17146 } 17147 d := v_0.AuxInt 17148 v.reset(OpS390XMOVDconst) 17149 v.AuxInt = c ^ d 17150 return true 17151 } 17152 return false 17153 } 17154 func rewriteValueS390X_OpSelect0(v *Value, config *Config) bool { 17155 b := v.Block 17156 _ = b 17157 // match: (Select0 <t> (AddTupleFirst32 tuple val)) 17158 // cond: 17159 // result: (ADDW val (Select0 <t> tuple)) 17160 for { 17161 t := v.Type 17162 v_0 := v.Args[0] 17163 if v_0.Op != OpS390XAddTupleFirst32 { 17164 break 17165 } 17166 tuple := v_0.Args[0] 17167 val := v_0.Args[1] 17168 v.reset(OpS390XADDW) 17169 v.AddArg(val) 17170 v0 := b.NewValue0(v.Pos, OpSelect0, t) 17171 v0.AddArg(tuple) 17172 v.AddArg(v0) 17173 return true 17174 } 17175 // match: (Select0 <t> (AddTupleFirst64 tuple val)) 17176 // cond: 17177 // result: (ADD val (Select0 <t> tuple)) 17178 for { 17179 t := v.Type 17180 v_0 := v.Args[0] 17181 if v_0.Op != OpS390XAddTupleFirst64 { 17182 break 17183 } 17184 tuple := v_0.Args[0] 17185 val := v_0.Args[1] 17186 v.reset(OpS390XADD) 17187 v.AddArg(val) 17188 v0 := b.NewValue0(v.Pos, OpSelect0, t) 17189 v0.AddArg(tuple) 17190 v.AddArg(v0) 17191 return true 17192 } 17193 return false 17194 } 17195 func rewriteValueS390X_OpSelect1(v *Value, config *Config) bool { 17196 b := v.Block 17197 _ = b 17198 // match: (Select1 (AddTupleFirst32 tuple _ )) 17199 // cond: 17200 // result: (Select1 tuple) 17201 for { 17202 v_0 := v.Args[0] 17203 if v_0.Op != OpS390XAddTupleFirst32 { 17204 break 17205 } 17206 tuple := v_0.Args[0] 17207 v.reset(OpSelect1) 17208 v.AddArg(tuple) 17209 return true 17210 } 17211 // match: (Select1 (AddTupleFirst64 tuple _ )) 17212 // cond: 17213 // result: (Select1 tuple) 17214 for { 17215 v_0 := v.Args[0] 17216 if v_0.Op != OpS390XAddTupleFirst64 { 17217 break 17218 } 17219 tuple := v_0.Args[0] 17220 v.reset(OpSelect1) 17221 v.AddArg(tuple) 17222 return true 17223 } 17224 return false 17225 } 17226 func rewriteValueS390X_OpSignExt16to32(v *Value, config *Config) bool { 17227 b := v.Block 17228 _ = b 17229 // match: (SignExt16to32 x) 17230 // cond: 17231 // result: (MOVHreg x) 17232 for { 17233 x := v.Args[0] 17234 v.reset(OpS390XMOVHreg) 17235 v.AddArg(x) 17236 return true 17237 } 17238 } 17239 func rewriteValueS390X_OpSignExt16to64(v *Value, config *Config) bool { 17240 b := v.Block 17241 _ = b 17242 // match: (SignExt16to64 x) 17243 // cond: 17244 // result: (MOVHreg x) 17245 for { 17246 x := v.Args[0] 17247 v.reset(OpS390XMOVHreg) 17248 v.AddArg(x) 17249 return true 17250 } 17251 } 17252 func rewriteValueS390X_OpSignExt32to64(v *Value, config *Config) bool { 17253 b := v.Block 17254 _ = b 17255 // match: (SignExt32to64 x) 17256 // cond: 17257 // result: (MOVWreg x) 17258 for { 17259 x := v.Args[0] 17260 v.reset(OpS390XMOVWreg) 17261 v.AddArg(x) 17262 return true 17263 } 17264 } 17265 func rewriteValueS390X_OpSignExt8to16(v *Value, config *Config) bool { 17266 b := v.Block 17267 _ = b 17268 // match: (SignExt8to16 x) 17269 // cond: 17270 // result: (MOVBreg x) 17271 for { 17272 x := v.Args[0] 17273 v.reset(OpS390XMOVBreg) 17274 v.AddArg(x) 17275 return true 17276 } 17277 } 17278 func rewriteValueS390X_OpSignExt8to32(v *Value, config *Config) bool { 17279 b := v.Block 17280 _ = b 17281 // match: (SignExt8to32 x) 17282 // cond: 17283 // result: (MOVBreg x) 17284 for { 17285 x := v.Args[0] 17286 v.reset(OpS390XMOVBreg) 17287 v.AddArg(x) 17288 return true 17289 } 17290 } 17291 func rewriteValueS390X_OpSignExt8to64(v *Value, config *Config) bool { 17292 b := v.Block 17293 _ = b 17294 // match: (SignExt8to64 x) 17295 // cond: 17296 // result: (MOVBreg x) 17297 for { 17298 x := v.Args[0] 17299 v.reset(OpS390XMOVBreg) 17300 v.AddArg(x) 17301 return true 17302 } 17303 } 17304 func rewriteValueS390X_OpSlicemask(v *Value, config *Config) bool { 17305 b := v.Block 17306 _ = b 17307 // match: (Slicemask <t> x) 17308 // cond: 17309 // result: (SRADconst (NEG <t> x) [63]) 17310 for { 17311 t := v.Type 17312 x := v.Args[0] 17313 v.reset(OpS390XSRADconst) 17314 v.AuxInt = 63 17315 v0 := b.NewValue0(v.Pos, OpS390XNEG, t) 17316 v0.AddArg(x) 17317 v.AddArg(v0) 17318 return true 17319 } 17320 } 17321 func rewriteValueS390X_OpSqrt(v *Value, config *Config) bool { 17322 b := v.Block 17323 _ = b 17324 // match: (Sqrt x) 17325 // cond: 17326 // result: (FSQRT x) 17327 for { 17328 x := v.Args[0] 17329 v.reset(OpS390XFSQRT) 17330 v.AddArg(x) 17331 return true 17332 } 17333 } 17334 func rewriteValueS390X_OpStaticCall(v *Value, config *Config) bool { 17335 b := v.Block 17336 _ = b 17337 // match: (StaticCall [argwid] {target} mem) 17338 // cond: 17339 // result: (CALLstatic [argwid] {target} mem) 17340 for { 17341 argwid := v.AuxInt 17342 target := v.Aux 17343 mem := v.Args[0] 17344 v.reset(OpS390XCALLstatic) 17345 v.AuxInt = argwid 17346 v.Aux = target 17347 v.AddArg(mem) 17348 return true 17349 } 17350 } 17351 func rewriteValueS390X_OpStore(v *Value, config *Config) bool { 17352 b := v.Block 17353 _ = b 17354 // match: (Store [8] ptr val mem) 17355 // cond: is64BitFloat(val.Type) 17356 // result: (FMOVDstore ptr val mem) 17357 for { 17358 if v.AuxInt != 8 { 17359 break 17360 } 17361 ptr := v.Args[0] 17362 val := v.Args[1] 17363 mem := v.Args[2] 17364 if !(is64BitFloat(val.Type)) { 17365 break 17366 } 17367 v.reset(OpS390XFMOVDstore) 17368 v.AddArg(ptr) 17369 v.AddArg(val) 17370 v.AddArg(mem) 17371 return true 17372 } 17373 // match: (Store [4] ptr val mem) 17374 // cond: is32BitFloat(val.Type) 17375 // result: (FMOVSstore ptr val mem) 17376 for { 17377 if v.AuxInt != 4 { 17378 break 17379 } 17380 ptr := v.Args[0] 17381 val := v.Args[1] 17382 mem := v.Args[2] 17383 if !(is32BitFloat(val.Type)) { 17384 break 17385 } 17386 v.reset(OpS390XFMOVSstore) 17387 v.AddArg(ptr) 17388 v.AddArg(val) 17389 v.AddArg(mem) 17390 return true 17391 } 17392 // match: (Store [8] ptr val mem) 17393 // cond: 17394 // result: (MOVDstore ptr val mem) 17395 for { 17396 if v.AuxInt != 8 { 17397 break 17398 } 17399 ptr := v.Args[0] 17400 val := v.Args[1] 17401 mem := v.Args[2] 17402 v.reset(OpS390XMOVDstore) 17403 v.AddArg(ptr) 17404 v.AddArg(val) 17405 v.AddArg(mem) 17406 return true 17407 } 17408 // match: (Store [4] ptr val mem) 17409 // cond: 17410 // result: (MOVWstore ptr val mem) 17411 for { 17412 if v.AuxInt != 4 { 17413 break 17414 } 17415 ptr := v.Args[0] 17416 val := v.Args[1] 17417 mem := v.Args[2] 17418 v.reset(OpS390XMOVWstore) 17419 v.AddArg(ptr) 17420 v.AddArg(val) 17421 v.AddArg(mem) 17422 return true 17423 } 17424 // match: (Store [2] ptr val mem) 17425 // cond: 17426 // result: (MOVHstore ptr val mem) 17427 for { 17428 if v.AuxInt != 2 { 17429 break 17430 } 17431 ptr := v.Args[0] 17432 val := v.Args[1] 17433 mem := v.Args[2] 17434 v.reset(OpS390XMOVHstore) 17435 v.AddArg(ptr) 17436 v.AddArg(val) 17437 v.AddArg(mem) 17438 return true 17439 } 17440 // match: (Store [1] ptr val mem) 17441 // cond: 17442 // result: (MOVBstore ptr val mem) 17443 for { 17444 if v.AuxInt != 1 { 17445 break 17446 } 17447 ptr := v.Args[0] 17448 val := v.Args[1] 17449 mem := v.Args[2] 17450 v.reset(OpS390XMOVBstore) 17451 v.AddArg(ptr) 17452 v.AddArg(val) 17453 v.AddArg(mem) 17454 return true 17455 } 17456 return false 17457 } 17458 func rewriteValueS390X_OpSub16(v *Value, config *Config) bool { 17459 b := v.Block 17460 _ = b 17461 // match: (Sub16 x y) 17462 // cond: 17463 // result: (SUBW x y) 17464 for { 17465 x := v.Args[0] 17466 y := v.Args[1] 17467 v.reset(OpS390XSUBW) 17468 v.AddArg(x) 17469 v.AddArg(y) 17470 return true 17471 } 17472 } 17473 func rewriteValueS390X_OpSub32(v *Value, config *Config) bool { 17474 b := v.Block 17475 _ = b 17476 // match: (Sub32 x y) 17477 // cond: 17478 // result: (SUBW x y) 17479 for { 17480 x := v.Args[0] 17481 y := v.Args[1] 17482 v.reset(OpS390XSUBW) 17483 v.AddArg(x) 17484 v.AddArg(y) 17485 return true 17486 } 17487 } 17488 func rewriteValueS390X_OpSub32F(v *Value, config *Config) bool { 17489 b := v.Block 17490 _ = b 17491 // match: (Sub32F x y) 17492 // cond: 17493 // result: (FSUBS x y) 17494 for { 17495 x := v.Args[0] 17496 y := v.Args[1] 17497 v.reset(OpS390XFSUBS) 17498 v.AddArg(x) 17499 v.AddArg(y) 17500 return true 17501 } 17502 } 17503 func rewriteValueS390X_OpSub64(v *Value, config *Config) bool { 17504 b := v.Block 17505 _ = b 17506 // match: (Sub64 x y) 17507 // cond: 17508 // result: (SUB x y) 17509 for { 17510 x := v.Args[0] 17511 y := v.Args[1] 17512 v.reset(OpS390XSUB) 17513 v.AddArg(x) 17514 v.AddArg(y) 17515 return true 17516 } 17517 } 17518 func rewriteValueS390X_OpSub64F(v *Value, config *Config) bool { 17519 b := v.Block 17520 _ = b 17521 // match: (Sub64F x y) 17522 // cond: 17523 // result: (FSUB x y) 17524 for { 17525 x := v.Args[0] 17526 y := v.Args[1] 17527 v.reset(OpS390XFSUB) 17528 v.AddArg(x) 17529 v.AddArg(y) 17530 return true 17531 } 17532 } 17533 func rewriteValueS390X_OpSub8(v *Value, config *Config) bool { 17534 b := v.Block 17535 _ = b 17536 // match: (Sub8 x y) 17537 // cond: 17538 // result: (SUBW x y) 17539 for { 17540 x := v.Args[0] 17541 y := v.Args[1] 17542 v.reset(OpS390XSUBW) 17543 v.AddArg(x) 17544 v.AddArg(y) 17545 return true 17546 } 17547 } 17548 func rewriteValueS390X_OpSubPtr(v *Value, config *Config) bool { 17549 b := v.Block 17550 _ = b 17551 // match: (SubPtr x y) 17552 // cond: 17553 // result: (SUB x y) 17554 for { 17555 x := v.Args[0] 17556 y := v.Args[1] 17557 v.reset(OpS390XSUB) 17558 v.AddArg(x) 17559 v.AddArg(y) 17560 return true 17561 } 17562 } 17563 func rewriteValueS390X_OpTrunc16to8(v *Value, config *Config) bool { 17564 b := v.Block 17565 _ = b 17566 // match: (Trunc16to8 x) 17567 // cond: 17568 // result: x 17569 for { 17570 x := v.Args[0] 17571 v.reset(OpCopy) 17572 v.Type = x.Type 17573 v.AddArg(x) 17574 return true 17575 } 17576 } 17577 func rewriteValueS390X_OpTrunc32to16(v *Value, config *Config) bool { 17578 b := v.Block 17579 _ = b 17580 // match: (Trunc32to16 x) 17581 // cond: 17582 // result: x 17583 for { 17584 x := v.Args[0] 17585 v.reset(OpCopy) 17586 v.Type = x.Type 17587 v.AddArg(x) 17588 return true 17589 } 17590 } 17591 func rewriteValueS390X_OpTrunc32to8(v *Value, config *Config) bool { 17592 b := v.Block 17593 _ = b 17594 // match: (Trunc32to8 x) 17595 // cond: 17596 // result: x 17597 for { 17598 x := v.Args[0] 17599 v.reset(OpCopy) 17600 v.Type = x.Type 17601 v.AddArg(x) 17602 return true 17603 } 17604 } 17605 func rewriteValueS390X_OpTrunc64to16(v *Value, config *Config) bool { 17606 b := v.Block 17607 _ = b 17608 // match: (Trunc64to16 x) 17609 // cond: 17610 // result: x 17611 for { 17612 x := v.Args[0] 17613 v.reset(OpCopy) 17614 v.Type = x.Type 17615 v.AddArg(x) 17616 return true 17617 } 17618 } 17619 func rewriteValueS390X_OpTrunc64to32(v *Value, config *Config) bool { 17620 b := v.Block 17621 _ = b 17622 // match: (Trunc64to32 x) 17623 // cond: 17624 // result: x 17625 for { 17626 x := v.Args[0] 17627 v.reset(OpCopy) 17628 v.Type = x.Type 17629 v.AddArg(x) 17630 return true 17631 } 17632 } 17633 func rewriteValueS390X_OpTrunc64to8(v *Value, config *Config) bool { 17634 b := v.Block 17635 _ = b 17636 // match: (Trunc64to8 x) 17637 // cond: 17638 // result: x 17639 for { 17640 x := v.Args[0] 17641 v.reset(OpCopy) 17642 v.Type = x.Type 17643 v.AddArg(x) 17644 return true 17645 } 17646 } 17647 func rewriteValueS390X_OpXor16(v *Value, config *Config) bool { 17648 b := v.Block 17649 _ = b 17650 // match: (Xor16 x y) 17651 // cond: 17652 // result: (XORW x y) 17653 for { 17654 x := v.Args[0] 17655 y := v.Args[1] 17656 v.reset(OpS390XXORW) 17657 v.AddArg(x) 17658 v.AddArg(y) 17659 return true 17660 } 17661 } 17662 func rewriteValueS390X_OpXor32(v *Value, config *Config) bool { 17663 b := v.Block 17664 _ = b 17665 // match: (Xor32 x y) 17666 // cond: 17667 // result: (XORW x y) 17668 for { 17669 x := v.Args[0] 17670 y := v.Args[1] 17671 v.reset(OpS390XXORW) 17672 v.AddArg(x) 17673 v.AddArg(y) 17674 return true 17675 } 17676 } 17677 func rewriteValueS390X_OpXor64(v *Value, config *Config) bool { 17678 b := v.Block 17679 _ = b 17680 // match: (Xor64 x y) 17681 // cond: 17682 // result: (XOR x y) 17683 for { 17684 x := v.Args[0] 17685 y := v.Args[1] 17686 v.reset(OpS390XXOR) 17687 v.AddArg(x) 17688 v.AddArg(y) 17689 return true 17690 } 17691 } 17692 func rewriteValueS390X_OpXor8(v *Value, config *Config) bool { 17693 b := v.Block 17694 _ = b 17695 // match: (Xor8 x y) 17696 // cond: 17697 // result: (XORW x y) 17698 for { 17699 x := v.Args[0] 17700 y := v.Args[1] 17701 v.reset(OpS390XXORW) 17702 v.AddArg(x) 17703 v.AddArg(y) 17704 return true 17705 } 17706 } 17707 func rewriteValueS390X_OpZero(v *Value, config *Config) bool { 17708 b := v.Block 17709 _ = b 17710 // match: (Zero [s] _ mem) 17711 // cond: SizeAndAlign(s).Size() == 0 17712 // result: mem 17713 for { 17714 s := v.AuxInt 17715 mem := v.Args[1] 17716 if !(SizeAndAlign(s).Size() == 0) { 17717 break 17718 } 17719 v.reset(OpCopy) 17720 v.Type = mem.Type 17721 v.AddArg(mem) 17722 return true 17723 } 17724 // match: (Zero [s] destptr mem) 17725 // cond: SizeAndAlign(s).Size() == 1 17726 // result: (MOVBstoreconst [0] destptr mem) 17727 for { 17728 s := v.AuxInt 17729 destptr := v.Args[0] 17730 mem := v.Args[1] 17731 if !(SizeAndAlign(s).Size() == 1) { 17732 break 17733 } 17734 v.reset(OpS390XMOVBstoreconst) 17735 v.AuxInt = 0 17736 v.AddArg(destptr) 17737 v.AddArg(mem) 17738 return true 17739 } 17740 // match: (Zero [s] destptr mem) 17741 // cond: SizeAndAlign(s).Size() == 2 17742 // result: (MOVHstoreconst [0] destptr mem) 17743 for { 17744 s := v.AuxInt 17745 destptr := v.Args[0] 17746 mem := v.Args[1] 17747 if !(SizeAndAlign(s).Size() == 2) { 17748 break 17749 } 17750 v.reset(OpS390XMOVHstoreconst) 17751 v.AuxInt = 0 17752 v.AddArg(destptr) 17753 v.AddArg(mem) 17754 return true 17755 } 17756 // match: (Zero [s] destptr mem) 17757 // cond: SizeAndAlign(s).Size() == 4 17758 // result: (MOVWstoreconst [0] destptr mem) 17759 for { 17760 s := v.AuxInt 17761 destptr := v.Args[0] 17762 mem := v.Args[1] 17763 if !(SizeAndAlign(s).Size() == 4) { 17764 break 17765 } 17766 v.reset(OpS390XMOVWstoreconst) 17767 v.AuxInt = 0 17768 v.AddArg(destptr) 17769 v.AddArg(mem) 17770 return true 17771 } 17772 // match: (Zero [s] destptr mem) 17773 // cond: SizeAndAlign(s).Size() == 8 17774 // result: (MOVDstoreconst [0] destptr mem) 17775 for { 17776 s := v.AuxInt 17777 destptr := v.Args[0] 17778 mem := v.Args[1] 17779 if !(SizeAndAlign(s).Size() == 8) { 17780 break 17781 } 17782 v.reset(OpS390XMOVDstoreconst) 17783 v.AuxInt = 0 17784 v.AddArg(destptr) 17785 v.AddArg(mem) 17786 return true 17787 } 17788 // match: (Zero [s] destptr mem) 17789 // cond: SizeAndAlign(s).Size() == 3 17790 // result: (MOVBstoreconst [makeValAndOff(0,2)] destptr (MOVHstoreconst [0] destptr mem)) 17791 for { 17792 s := v.AuxInt 17793 destptr := v.Args[0] 17794 mem := v.Args[1] 17795 if !(SizeAndAlign(s).Size() == 3) { 17796 break 17797 } 17798 v.reset(OpS390XMOVBstoreconst) 17799 v.AuxInt = makeValAndOff(0, 2) 17800 v.AddArg(destptr) 17801 v0 := b.NewValue0(v.Pos, OpS390XMOVHstoreconst, TypeMem) 17802 v0.AuxInt = 0 17803 v0.AddArg(destptr) 17804 v0.AddArg(mem) 17805 v.AddArg(v0) 17806 return true 17807 } 17808 // match: (Zero [s] destptr mem) 17809 // cond: SizeAndAlign(s).Size() == 5 17810 // result: (MOVBstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17811 for { 17812 s := v.AuxInt 17813 destptr := v.Args[0] 17814 mem := v.Args[1] 17815 if !(SizeAndAlign(s).Size() == 5) { 17816 break 17817 } 17818 v.reset(OpS390XMOVBstoreconst) 17819 v.AuxInt = makeValAndOff(0, 4) 17820 v.AddArg(destptr) 17821 v0 := b.NewValue0(v.Pos, OpS390XMOVWstoreconst, TypeMem) 17822 v0.AuxInt = 0 17823 v0.AddArg(destptr) 17824 v0.AddArg(mem) 17825 v.AddArg(v0) 17826 return true 17827 } 17828 // match: (Zero [s] destptr mem) 17829 // cond: SizeAndAlign(s).Size() == 6 17830 // result: (MOVHstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17831 for { 17832 s := v.AuxInt 17833 destptr := v.Args[0] 17834 mem := v.Args[1] 17835 if !(SizeAndAlign(s).Size() == 6) { 17836 break 17837 } 17838 v.reset(OpS390XMOVHstoreconst) 17839 v.AuxInt = makeValAndOff(0, 4) 17840 v.AddArg(destptr) 17841 v0 := b.NewValue0(v.Pos, OpS390XMOVWstoreconst, TypeMem) 17842 v0.AuxInt = 0 17843 v0.AddArg(destptr) 17844 v0.AddArg(mem) 17845 v.AddArg(v0) 17846 return true 17847 } 17848 // match: (Zero [s] destptr mem) 17849 // cond: SizeAndAlign(s).Size() == 7 17850 // result: (MOVWstoreconst [makeValAndOff(0,3)] destptr (MOVWstoreconst [0] destptr mem)) 17851 for { 17852 s := v.AuxInt 17853 destptr := v.Args[0] 17854 mem := v.Args[1] 17855 if !(SizeAndAlign(s).Size() == 7) { 17856 break 17857 } 17858 v.reset(OpS390XMOVWstoreconst) 17859 v.AuxInt = makeValAndOff(0, 3) 17860 v.AddArg(destptr) 17861 v0 := b.NewValue0(v.Pos, OpS390XMOVWstoreconst, TypeMem) 17862 v0.AuxInt = 0 17863 v0.AddArg(destptr) 17864 v0.AddArg(mem) 17865 v.AddArg(v0) 17866 return true 17867 } 17868 // match: (Zero [s] destptr mem) 17869 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024 17870 // result: (CLEAR [makeValAndOff(SizeAndAlign(s).Size(), 0)] destptr mem) 17871 for { 17872 s := v.AuxInt 17873 destptr := v.Args[0] 17874 mem := v.Args[1] 17875 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024) { 17876 break 17877 } 17878 v.reset(OpS390XCLEAR) 17879 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 17880 v.AddArg(destptr) 17881 v.AddArg(mem) 17882 return true 17883 } 17884 // match: (Zero [s] destptr mem) 17885 // cond: SizeAndAlign(s).Size() > 1024 17886 // result: (LoweredZero [SizeAndAlign(s).Size()%256] destptr (ADDconst <destptr.Type> destptr [(SizeAndAlign(s).Size()/256)*256]) mem) 17887 for { 17888 s := v.AuxInt 17889 destptr := v.Args[0] 17890 mem := v.Args[1] 17891 if !(SizeAndAlign(s).Size() > 1024) { 17892 break 17893 } 17894 v.reset(OpS390XLoweredZero) 17895 v.AuxInt = SizeAndAlign(s).Size() % 256 17896 v.AddArg(destptr) 17897 v0 := b.NewValue0(v.Pos, OpS390XADDconst, destptr.Type) 17898 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 17899 v0.AddArg(destptr) 17900 v.AddArg(v0) 17901 v.AddArg(mem) 17902 return true 17903 } 17904 return false 17905 } 17906 func rewriteValueS390X_OpZeroExt16to32(v *Value, config *Config) bool { 17907 b := v.Block 17908 _ = b 17909 // match: (ZeroExt16to32 x) 17910 // cond: 17911 // result: (MOVHZreg x) 17912 for { 17913 x := v.Args[0] 17914 v.reset(OpS390XMOVHZreg) 17915 v.AddArg(x) 17916 return true 17917 } 17918 } 17919 func rewriteValueS390X_OpZeroExt16to64(v *Value, config *Config) bool { 17920 b := v.Block 17921 _ = b 17922 // match: (ZeroExt16to64 x) 17923 // cond: 17924 // result: (MOVHZreg x) 17925 for { 17926 x := v.Args[0] 17927 v.reset(OpS390XMOVHZreg) 17928 v.AddArg(x) 17929 return true 17930 } 17931 } 17932 func rewriteValueS390X_OpZeroExt32to64(v *Value, config *Config) bool { 17933 b := v.Block 17934 _ = b 17935 // match: (ZeroExt32to64 x) 17936 // cond: 17937 // result: (MOVWZreg x) 17938 for { 17939 x := v.Args[0] 17940 v.reset(OpS390XMOVWZreg) 17941 v.AddArg(x) 17942 return true 17943 } 17944 } 17945 func rewriteValueS390X_OpZeroExt8to16(v *Value, config *Config) bool { 17946 b := v.Block 17947 _ = b 17948 // match: (ZeroExt8to16 x) 17949 // cond: 17950 // result: (MOVBZreg x) 17951 for { 17952 x := v.Args[0] 17953 v.reset(OpS390XMOVBZreg) 17954 v.AddArg(x) 17955 return true 17956 } 17957 } 17958 func rewriteValueS390X_OpZeroExt8to32(v *Value, config *Config) bool { 17959 b := v.Block 17960 _ = b 17961 // match: (ZeroExt8to32 x) 17962 // cond: 17963 // result: (MOVBZreg x) 17964 for { 17965 x := v.Args[0] 17966 v.reset(OpS390XMOVBZreg) 17967 v.AddArg(x) 17968 return true 17969 } 17970 } 17971 func rewriteValueS390X_OpZeroExt8to64(v *Value, config *Config) bool { 17972 b := v.Block 17973 _ = b 17974 // match: (ZeroExt8to64 x) 17975 // cond: 17976 // result: (MOVBZreg x) 17977 for { 17978 x := v.Args[0] 17979 v.reset(OpS390XMOVBZreg) 17980 v.AddArg(x) 17981 return true 17982 } 17983 } 17984 func rewriteBlockS390X(b *Block, config *Config) bool { 17985 switch b.Kind { 17986 case BlockS390XEQ: 17987 // match: (EQ (InvertFlags cmp) yes no) 17988 // cond: 17989 // result: (EQ cmp yes no) 17990 for { 17991 v := b.Control 17992 if v.Op != OpS390XInvertFlags { 17993 break 17994 } 17995 cmp := v.Args[0] 17996 yes := b.Succs[0] 17997 no := b.Succs[1] 17998 b.Kind = BlockS390XEQ 17999 b.SetControl(cmp) 18000 _ = yes 18001 _ = no 18002 return true 18003 } 18004 // match: (EQ (FlagEQ) yes no) 18005 // cond: 18006 // result: (First nil yes no) 18007 for { 18008 v := b.Control 18009 if v.Op != OpS390XFlagEQ { 18010 break 18011 } 18012 yes := b.Succs[0] 18013 no := b.Succs[1] 18014 b.Kind = BlockFirst 18015 b.SetControl(nil) 18016 _ = yes 18017 _ = no 18018 return true 18019 } 18020 // match: (EQ (FlagLT) yes no) 18021 // cond: 18022 // result: (First nil no yes) 18023 for { 18024 v := b.Control 18025 if v.Op != OpS390XFlagLT { 18026 break 18027 } 18028 yes := b.Succs[0] 18029 no := b.Succs[1] 18030 b.Kind = BlockFirst 18031 b.SetControl(nil) 18032 b.swapSuccessors() 18033 _ = no 18034 _ = yes 18035 return true 18036 } 18037 // match: (EQ (FlagGT) yes no) 18038 // cond: 18039 // result: (First nil no yes) 18040 for { 18041 v := b.Control 18042 if v.Op != OpS390XFlagGT { 18043 break 18044 } 18045 yes := b.Succs[0] 18046 no := b.Succs[1] 18047 b.Kind = BlockFirst 18048 b.SetControl(nil) 18049 b.swapSuccessors() 18050 _ = no 18051 _ = yes 18052 return true 18053 } 18054 case BlockS390XGE: 18055 // match: (GE (InvertFlags cmp) yes no) 18056 // cond: 18057 // result: (LE cmp yes no) 18058 for { 18059 v := b.Control 18060 if v.Op != OpS390XInvertFlags { 18061 break 18062 } 18063 cmp := v.Args[0] 18064 yes := b.Succs[0] 18065 no := b.Succs[1] 18066 b.Kind = BlockS390XLE 18067 b.SetControl(cmp) 18068 _ = yes 18069 _ = no 18070 return true 18071 } 18072 // match: (GE (FlagEQ) yes no) 18073 // cond: 18074 // result: (First nil yes no) 18075 for { 18076 v := b.Control 18077 if v.Op != OpS390XFlagEQ { 18078 break 18079 } 18080 yes := b.Succs[0] 18081 no := b.Succs[1] 18082 b.Kind = BlockFirst 18083 b.SetControl(nil) 18084 _ = yes 18085 _ = no 18086 return true 18087 } 18088 // match: (GE (FlagLT) yes no) 18089 // cond: 18090 // result: (First nil no yes) 18091 for { 18092 v := b.Control 18093 if v.Op != OpS390XFlagLT { 18094 break 18095 } 18096 yes := b.Succs[0] 18097 no := b.Succs[1] 18098 b.Kind = BlockFirst 18099 b.SetControl(nil) 18100 b.swapSuccessors() 18101 _ = no 18102 _ = yes 18103 return true 18104 } 18105 // match: (GE (FlagGT) yes no) 18106 // cond: 18107 // result: (First nil yes no) 18108 for { 18109 v := b.Control 18110 if v.Op != OpS390XFlagGT { 18111 break 18112 } 18113 yes := b.Succs[0] 18114 no := b.Succs[1] 18115 b.Kind = BlockFirst 18116 b.SetControl(nil) 18117 _ = yes 18118 _ = no 18119 return true 18120 } 18121 case BlockS390XGT: 18122 // match: (GT (InvertFlags cmp) yes no) 18123 // cond: 18124 // result: (LT cmp yes no) 18125 for { 18126 v := b.Control 18127 if v.Op != OpS390XInvertFlags { 18128 break 18129 } 18130 cmp := v.Args[0] 18131 yes := b.Succs[0] 18132 no := b.Succs[1] 18133 b.Kind = BlockS390XLT 18134 b.SetControl(cmp) 18135 _ = yes 18136 _ = no 18137 return true 18138 } 18139 // match: (GT (FlagEQ) yes no) 18140 // cond: 18141 // result: (First nil no yes) 18142 for { 18143 v := b.Control 18144 if v.Op != OpS390XFlagEQ { 18145 break 18146 } 18147 yes := b.Succs[0] 18148 no := b.Succs[1] 18149 b.Kind = BlockFirst 18150 b.SetControl(nil) 18151 b.swapSuccessors() 18152 _ = no 18153 _ = yes 18154 return true 18155 } 18156 // match: (GT (FlagLT) yes no) 18157 // cond: 18158 // result: (First nil no yes) 18159 for { 18160 v := b.Control 18161 if v.Op != OpS390XFlagLT { 18162 break 18163 } 18164 yes := b.Succs[0] 18165 no := b.Succs[1] 18166 b.Kind = BlockFirst 18167 b.SetControl(nil) 18168 b.swapSuccessors() 18169 _ = no 18170 _ = yes 18171 return true 18172 } 18173 // match: (GT (FlagGT) yes no) 18174 // cond: 18175 // result: (First nil yes no) 18176 for { 18177 v := b.Control 18178 if v.Op != OpS390XFlagGT { 18179 break 18180 } 18181 yes := b.Succs[0] 18182 no := b.Succs[1] 18183 b.Kind = BlockFirst 18184 b.SetControl(nil) 18185 _ = yes 18186 _ = no 18187 return true 18188 } 18189 case BlockIf: 18190 // match: (If (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18191 // cond: 18192 // result: (LT cmp yes no) 18193 for { 18194 v := b.Control 18195 if v.Op != OpS390XMOVDLT { 18196 break 18197 } 18198 v_0 := v.Args[0] 18199 if v_0.Op != OpS390XMOVDconst { 18200 break 18201 } 18202 if v_0.AuxInt != 0 { 18203 break 18204 } 18205 v_1 := v.Args[1] 18206 if v_1.Op != OpS390XMOVDconst { 18207 break 18208 } 18209 if v_1.AuxInt != 1 { 18210 break 18211 } 18212 cmp := v.Args[2] 18213 yes := b.Succs[0] 18214 no := b.Succs[1] 18215 b.Kind = BlockS390XLT 18216 b.SetControl(cmp) 18217 _ = yes 18218 _ = no 18219 return true 18220 } 18221 // match: (If (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18222 // cond: 18223 // result: (LE cmp yes no) 18224 for { 18225 v := b.Control 18226 if v.Op != OpS390XMOVDLE { 18227 break 18228 } 18229 v_0 := v.Args[0] 18230 if v_0.Op != OpS390XMOVDconst { 18231 break 18232 } 18233 if v_0.AuxInt != 0 { 18234 break 18235 } 18236 v_1 := v.Args[1] 18237 if v_1.Op != OpS390XMOVDconst { 18238 break 18239 } 18240 if v_1.AuxInt != 1 { 18241 break 18242 } 18243 cmp := v.Args[2] 18244 yes := b.Succs[0] 18245 no := b.Succs[1] 18246 b.Kind = BlockS390XLE 18247 b.SetControl(cmp) 18248 _ = yes 18249 _ = no 18250 return true 18251 } 18252 // match: (If (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18253 // cond: 18254 // result: (GT cmp yes no) 18255 for { 18256 v := b.Control 18257 if v.Op != OpS390XMOVDGT { 18258 break 18259 } 18260 v_0 := v.Args[0] 18261 if v_0.Op != OpS390XMOVDconst { 18262 break 18263 } 18264 if v_0.AuxInt != 0 { 18265 break 18266 } 18267 v_1 := v.Args[1] 18268 if v_1.Op != OpS390XMOVDconst { 18269 break 18270 } 18271 if v_1.AuxInt != 1 { 18272 break 18273 } 18274 cmp := v.Args[2] 18275 yes := b.Succs[0] 18276 no := b.Succs[1] 18277 b.Kind = BlockS390XGT 18278 b.SetControl(cmp) 18279 _ = yes 18280 _ = no 18281 return true 18282 } 18283 // match: (If (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18284 // cond: 18285 // result: (GE cmp yes no) 18286 for { 18287 v := b.Control 18288 if v.Op != OpS390XMOVDGE { 18289 break 18290 } 18291 v_0 := v.Args[0] 18292 if v_0.Op != OpS390XMOVDconst { 18293 break 18294 } 18295 if v_0.AuxInt != 0 { 18296 break 18297 } 18298 v_1 := v.Args[1] 18299 if v_1.Op != OpS390XMOVDconst { 18300 break 18301 } 18302 if v_1.AuxInt != 1 { 18303 break 18304 } 18305 cmp := v.Args[2] 18306 yes := b.Succs[0] 18307 no := b.Succs[1] 18308 b.Kind = BlockS390XGE 18309 b.SetControl(cmp) 18310 _ = yes 18311 _ = no 18312 return true 18313 } 18314 // match: (If (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18315 // cond: 18316 // result: (EQ cmp yes no) 18317 for { 18318 v := b.Control 18319 if v.Op != OpS390XMOVDEQ { 18320 break 18321 } 18322 v_0 := v.Args[0] 18323 if v_0.Op != OpS390XMOVDconst { 18324 break 18325 } 18326 if v_0.AuxInt != 0 { 18327 break 18328 } 18329 v_1 := v.Args[1] 18330 if v_1.Op != OpS390XMOVDconst { 18331 break 18332 } 18333 if v_1.AuxInt != 1 { 18334 break 18335 } 18336 cmp := v.Args[2] 18337 yes := b.Succs[0] 18338 no := b.Succs[1] 18339 b.Kind = BlockS390XEQ 18340 b.SetControl(cmp) 18341 _ = yes 18342 _ = no 18343 return true 18344 } 18345 // match: (If (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18346 // cond: 18347 // result: (NE cmp yes no) 18348 for { 18349 v := b.Control 18350 if v.Op != OpS390XMOVDNE { 18351 break 18352 } 18353 v_0 := v.Args[0] 18354 if v_0.Op != OpS390XMOVDconst { 18355 break 18356 } 18357 if v_0.AuxInt != 0 { 18358 break 18359 } 18360 v_1 := v.Args[1] 18361 if v_1.Op != OpS390XMOVDconst { 18362 break 18363 } 18364 if v_1.AuxInt != 1 { 18365 break 18366 } 18367 cmp := v.Args[2] 18368 yes := b.Succs[0] 18369 no := b.Succs[1] 18370 b.Kind = BlockS390XNE 18371 b.SetControl(cmp) 18372 _ = yes 18373 _ = no 18374 return true 18375 } 18376 // match: (If (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18377 // cond: 18378 // result: (GTF cmp yes no) 18379 for { 18380 v := b.Control 18381 if v.Op != OpS390XMOVDGTnoinv { 18382 break 18383 } 18384 v_0 := v.Args[0] 18385 if v_0.Op != OpS390XMOVDconst { 18386 break 18387 } 18388 if v_0.AuxInt != 0 { 18389 break 18390 } 18391 v_1 := v.Args[1] 18392 if v_1.Op != OpS390XMOVDconst { 18393 break 18394 } 18395 if v_1.AuxInt != 1 { 18396 break 18397 } 18398 cmp := v.Args[2] 18399 yes := b.Succs[0] 18400 no := b.Succs[1] 18401 b.Kind = BlockS390XGTF 18402 b.SetControl(cmp) 18403 _ = yes 18404 _ = no 18405 return true 18406 } 18407 // match: (If (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18408 // cond: 18409 // result: (GEF cmp yes no) 18410 for { 18411 v := b.Control 18412 if v.Op != OpS390XMOVDGEnoinv { 18413 break 18414 } 18415 v_0 := v.Args[0] 18416 if v_0.Op != OpS390XMOVDconst { 18417 break 18418 } 18419 if v_0.AuxInt != 0 { 18420 break 18421 } 18422 v_1 := v.Args[1] 18423 if v_1.Op != OpS390XMOVDconst { 18424 break 18425 } 18426 if v_1.AuxInt != 1 { 18427 break 18428 } 18429 cmp := v.Args[2] 18430 yes := b.Succs[0] 18431 no := b.Succs[1] 18432 b.Kind = BlockS390XGEF 18433 b.SetControl(cmp) 18434 _ = yes 18435 _ = no 18436 return true 18437 } 18438 // match: (If cond yes no) 18439 // cond: 18440 // result: (NE (CMPWconst [0] (MOVBZreg cond)) yes no) 18441 for { 18442 v := b.Control 18443 _ = v 18444 cond := b.Control 18445 yes := b.Succs[0] 18446 no := b.Succs[1] 18447 b.Kind = BlockS390XNE 18448 v0 := b.NewValue0(v.Pos, OpS390XCMPWconst, TypeFlags) 18449 v0.AuxInt = 0 18450 v1 := b.NewValue0(v.Pos, OpS390XMOVBZreg, config.fe.TypeUInt64()) 18451 v1.AddArg(cond) 18452 v0.AddArg(v1) 18453 b.SetControl(v0) 18454 _ = yes 18455 _ = no 18456 return true 18457 } 18458 case BlockS390XLE: 18459 // match: (LE (InvertFlags cmp) yes no) 18460 // cond: 18461 // result: (GE cmp yes no) 18462 for { 18463 v := b.Control 18464 if v.Op != OpS390XInvertFlags { 18465 break 18466 } 18467 cmp := v.Args[0] 18468 yes := b.Succs[0] 18469 no := b.Succs[1] 18470 b.Kind = BlockS390XGE 18471 b.SetControl(cmp) 18472 _ = yes 18473 _ = no 18474 return true 18475 } 18476 // match: (LE (FlagEQ) yes no) 18477 // cond: 18478 // result: (First nil yes no) 18479 for { 18480 v := b.Control 18481 if v.Op != OpS390XFlagEQ { 18482 break 18483 } 18484 yes := b.Succs[0] 18485 no := b.Succs[1] 18486 b.Kind = BlockFirst 18487 b.SetControl(nil) 18488 _ = yes 18489 _ = no 18490 return true 18491 } 18492 // match: (LE (FlagLT) yes no) 18493 // cond: 18494 // result: (First nil yes no) 18495 for { 18496 v := b.Control 18497 if v.Op != OpS390XFlagLT { 18498 break 18499 } 18500 yes := b.Succs[0] 18501 no := b.Succs[1] 18502 b.Kind = BlockFirst 18503 b.SetControl(nil) 18504 _ = yes 18505 _ = no 18506 return true 18507 } 18508 // match: (LE (FlagGT) yes no) 18509 // cond: 18510 // result: (First nil no yes) 18511 for { 18512 v := b.Control 18513 if v.Op != OpS390XFlagGT { 18514 break 18515 } 18516 yes := b.Succs[0] 18517 no := b.Succs[1] 18518 b.Kind = BlockFirst 18519 b.SetControl(nil) 18520 b.swapSuccessors() 18521 _ = no 18522 _ = yes 18523 return true 18524 } 18525 case BlockS390XLT: 18526 // match: (LT (InvertFlags cmp) yes no) 18527 // cond: 18528 // result: (GT cmp yes no) 18529 for { 18530 v := b.Control 18531 if v.Op != OpS390XInvertFlags { 18532 break 18533 } 18534 cmp := v.Args[0] 18535 yes := b.Succs[0] 18536 no := b.Succs[1] 18537 b.Kind = BlockS390XGT 18538 b.SetControl(cmp) 18539 _ = yes 18540 _ = no 18541 return true 18542 } 18543 // match: (LT (FlagEQ) yes no) 18544 // cond: 18545 // result: (First nil no yes) 18546 for { 18547 v := b.Control 18548 if v.Op != OpS390XFlagEQ { 18549 break 18550 } 18551 yes := b.Succs[0] 18552 no := b.Succs[1] 18553 b.Kind = BlockFirst 18554 b.SetControl(nil) 18555 b.swapSuccessors() 18556 _ = no 18557 _ = yes 18558 return true 18559 } 18560 // match: (LT (FlagLT) yes no) 18561 // cond: 18562 // result: (First nil yes no) 18563 for { 18564 v := b.Control 18565 if v.Op != OpS390XFlagLT { 18566 break 18567 } 18568 yes := b.Succs[0] 18569 no := b.Succs[1] 18570 b.Kind = BlockFirst 18571 b.SetControl(nil) 18572 _ = yes 18573 _ = no 18574 return true 18575 } 18576 // match: (LT (FlagGT) yes no) 18577 // cond: 18578 // result: (First nil no yes) 18579 for { 18580 v := b.Control 18581 if v.Op != OpS390XFlagGT { 18582 break 18583 } 18584 yes := b.Succs[0] 18585 no := b.Succs[1] 18586 b.Kind = BlockFirst 18587 b.SetControl(nil) 18588 b.swapSuccessors() 18589 _ = no 18590 _ = yes 18591 return true 18592 } 18593 case BlockS390XNE: 18594 // match: (NE (CMPWconst [0] (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18595 // cond: 18596 // result: (LT cmp yes no) 18597 for { 18598 v := b.Control 18599 if v.Op != OpS390XCMPWconst { 18600 break 18601 } 18602 if v.AuxInt != 0 { 18603 break 18604 } 18605 v_0 := v.Args[0] 18606 if v_0.Op != OpS390XMOVDLT { 18607 break 18608 } 18609 v_0_0 := v_0.Args[0] 18610 if v_0_0.Op != OpS390XMOVDconst { 18611 break 18612 } 18613 if v_0_0.AuxInt != 0 { 18614 break 18615 } 18616 v_0_1 := v_0.Args[1] 18617 if v_0_1.Op != OpS390XMOVDconst { 18618 break 18619 } 18620 if v_0_1.AuxInt != 1 { 18621 break 18622 } 18623 cmp := v_0.Args[2] 18624 yes := b.Succs[0] 18625 no := b.Succs[1] 18626 b.Kind = BlockS390XLT 18627 b.SetControl(cmp) 18628 _ = yes 18629 _ = no 18630 return true 18631 } 18632 // match: (NE (CMPWconst [0] (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18633 // cond: 18634 // result: (LE cmp yes no) 18635 for { 18636 v := b.Control 18637 if v.Op != OpS390XCMPWconst { 18638 break 18639 } 18640 if v.AuxInt != 0 { 18641 break 18642 } 18643 v_0 := v.Args[0] 18644 if v_0.Op != OpS390XMOVDLE { 18645 break 18646 } 18647 v_0_0 := v_0.Args[0] 18648 if v_0_0.Op != OpS390XMOVDconst { 18649 break 18650 } 18651 if v_0_0.AuxInt != 0 { 18652 break 18653 } 18654 v_0_1 := v_0.Args[1] 18655 if v_0_1.Op != OpS390XMOVDconst { 18656 break 18657 } 18658 if v_0_1.AuxInt != 1 { 18659 break 18660 } 18661 cmp := v_0.Args[2] 18662 yes := b.Succs[0] 18663 no := b.Succs[1] 18664 b.Kind = BlockS390XLE 18665 b.SetControl(cmp) 18666 _ = yes 18667 _ = no 18668 return true 18669 } 18670 // match: (NE (CMPWconst [0] (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18671 // cond: 18672 // result: (GT cmp yes no) 18673 for { 18674 v := b.Control 18675 if v.Op != OpS390XCMPWconst { 18676 break 18677 } 18678 if v.AuxInt != 0 { 18679 break 18680 } 18681 v_0 := v.Args[0] 18682 if v_0.Op != OpS390XMOVDGT { 18683 break 18684 } 18685 v_0_0 := v_0.Args[0] 18686 if v_0_0.Op != OpS390XMOVDconst { 18687 break 18688 } 18689 if v_0_0.AuxInt != 0 { 18690 break 18691 } 18692 v_0_1 := v_0.Args[1] 18693 if v_0_1.Op != OpS390XMOVDconst { 18694 break 18695 } 18696 if v_0_1.AuxInt != 1 { 18697 break 18698 } 18699 cmp := v_0.Args[2] 18700 yes := b.Succs[0] 18701 no := b.Succs[1] 18702 b.Kind = BlockS390XGT 18703 b.SetControl(cmp) 18704 _ = yes 18705 _ = no 18706 return true 18707 } 18708 // match: (NE (CMPWconst [0] (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18709 // cond: 18710 // result: (GE cmp yes no) 18711 for { 18712 v := b.Control 18713 if v.Op != OpS390XCMPWconst { 18714 break 18715 } 18716 if v.AuxInt != 0 { 18717 break 18718 } 18719 v_0 := v.Args[0] 18720 if v_0.Op != OpS390XMOVDGE { 18721 break 18722 } 18723 v_0_0 := v_0.Args[0] 18724 if v_0_0.Op != OpS390XMOVDconst { 18725 break 18726 } 18727 if v_0_0.AuxInt != 0 { 18728 break 18729 } 18730 v_0_1 := v_0.Args[1] 18731 if v_0_1.Op != OpS390XMOVDconst { 18732 break 18733 } 18734 if v_0_1.AuxInt != 1 { 18735 break 18736 } 18737 cmp := v_0.Args[2] 18738 yes := b.Succs[0] 18739 no := b.Succs[1] 18740 b.Kind = BlockS390XGE 18741 b.SetControl(cmp) 18742 _ = yes 18743 _ = no 18744 return true 18745 } 18746 // match: (NE (CMPWconst [0] (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18747 // cond: 18748 // result: (EQ cmp yes no) 18749 for { 18750 v := b.Control 18751 if v.Op != OpS390XCMPWconst { 18752 break 18753 } 18754 if v.AuxInt != 0 { 18755 break 18756 } 18757 v_0 := v.Args[0] 18758 if v_0.Op != OpS390XMOVDEQ { 18759 break 18760 } 18761 v_0_0 := v_0.Args[0] 18762 if v_0_0.Op != OpS390XMOVDconst { 18763 break 18764 } 18765 if v_0_0.AuxInt != 0 { 18766 break 18767 } 18768 v_0_1 := v_0.Args[1] 18769 if v_0_1.Op != OpS390XMOVDconst { 18770 break 18771 } 18772 if v_0_1.AuxInt != 1 { 18773 break 18774 } 18775 cmp := v_0.Args[2] 18776 yes := b.Succs[0] 18777 no := b.Succs[1] 18778 b.Kind = BlockS390XEQ 18779 b.SetControl(cmp) 18780 _ = yes 18781 _ = no 18782 return true 18783 } 18784 // match: (NE (CMPWconst [0] (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18785 // cond: 18786 // result: (NE cmp yes no) 18787 for { 18788 v := b.Control 18789 if v.Op != OpS390XCMPWconst { 18790 break 18791 } 18792 if v.AuxInt != 0 { 18793 break 18794 } 18795 v_0 := v.Args[0] 18796 if v_0.Op != OpS390XMOVDNE { 18797 break 18798 } 18799 v_0_0 := v_0.Args[0] 18800 if v_0_0.Op != OpS390XMOVDconst { 18801 break 18802 } 18803 if v_0_0.AuxInt != 0 { 18804 break 18805 } 18806 v_0_1 := v_0.Args[1] 18807 if v_0_1.Op != OpS390XMOVDconst { 18808 break 18809 } 18810 if v_0_1.AuxInt != 1 { 18811 break 18812 } 18813 cmp := v_0.Args[2] 18814 yes := b.Succs[0] 18815 no := b.Succs[1] 18816 b.Kind = BlockS390XNE 18817 b.SetControl(cmp) 18818 _ = yes 18819 _ = no 18820 return true 18821 } 18822 // match: (NE (CMPWconst [0] (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18823 // cond: 18824 // result: (GTF cmp yes no) 18825 for { 18826 v := b.Control 18827 if v.Op != OpS390XCMPWconst { 18828 break 18829 } 18830 if v.AuxInt != 0 { 18831 break 18832 } 18833 v_0 := v.Args[0] 18834 if v_0.Op != OpS390XMOVDGTnoinv { 18835 break 18836 } 18837 v_0_0 := v_0.Args[0] 18838 if v_0_0.Op != OpS390XMOVDconst { 18839 break 18840 } 18841 if v_0_0.AuxInt != 0 { 18842 break 18843 } 18844 v_0_1 := v_0.Args[1] 18845 if v_0_1.Op != OpS390XMOVDconst { 18846 break 18847 } 18848 if v_0_1.AuxInt != 1 { 18849 break 18850 } 18851 cmp := v_0.Args[2] 18852 yes := b.Succs[0] 18853 no := b.Succs[1] 18854 b.Kind = BlockS390XGTF 18855 b.SetControl(cmp) 18856 _ = yes 18857 _ = no 18858 return true 18859 } 18860 // match: (NE (CMPWconst [0] (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18861 // cond: 18862 // result: (GEF cmp yes no) 18863 for { 18864 v := b.Control 18865 if v.Op != OpS390XCMPWconst { 18866 break 18867 } 18868 if v.AuxInt != 0 { 18869 break 18870 } 18871 v_0 := v.Args[0] 18872 if v_0.Op != OpS390XMOVDGEnoinv { 18873 break 18874 } 18875 v_0_0 := v_0.Args[0] 18876 if v_0_0.Op != OpS390XMOVDconst { 18877 break 18878 } 18879 if v_0_0.AuxInt != 0 { 18880 break 18881 } 18882 v_0_1 := v_0.Args[1] 18883 if v_0_1.Op != OpS390XMOVDconst { 18884 break 18885 } 18886 if v_0_1.AuxInt != 1 { 18887 break 18888 } 18889 cmp := v_0.Args[2] 18890 yes := b.Succs[0] 18891 no := b.Succs[1] 18892 b.Kind = BlockS390XGEF 18893 b.SetControl(cmp) 18894 _ = yes 18895 _ = no 18896 return true 18897 } 18898 // match: (NE (InvertFlags cmp) yes no) 18899 // cond: 18900 // result: (NE cmp yes no) 18901 for { 18902 v := b.Control 18903 if v.Op != OpS390XInvertFlags { 18904 break 18905 } 18906 cmp := v.Args[0] 18907 yes := b.Succs[0] 18908 no := b.Succs[1] 18909 b.Kind = BlockS390XNE 18910 b.SetControl(cmp) 18911 _ = yes 18912 _ = no 18913 return true 18914 } 18915 // match: (NE (FlagEQ) yes no) 18916 // cond: 18917 // result: (First nil no yes) 18918 for { 18919 v := b.Control 18920 if v.Op != OpS390XFlagEQ { 18921 break 18922 } 18923 yes := b.Succs[0] 18924 no := b.Succs[1] 18925 b.Kind = BlockFirst 18926 b.SetControl(nil) 18927 b.swapSuccessors() 18928 _ = no 18929 _ = yes 18930 return true 18931 } 18932 // match: (NE (FlagLT) yes no) 18933 // cond: 18934 // result: (First nil yes no) 18935 for { 18936 v := b.Control 18937 if v.Op != OpS390XFlagLT { 18938 break 18939 } 18940 yes := b.Succs[0] 18941 no := b.Succs[1] 18942 b.Kind = BlockFirst 18943 b.SetControl(nil) 18944 _ = yes 18945 _ = no 18946 return true 18947 } 18948 // match: (NE (FlagGT) yes no) 18949 // cond: 18950 // result: (First nil yes no) 18951 for { 18952 v := b.Control 18953 if v.Op != OpS390XFlagGT { 18954 break 18955 } 18956 yes := b.Succs[0] 18957 no := b.Succs[1] 18958 b.Kind = BlockFirst 18959 b.SetControl(nil) 18960 _ = yes 18961 _ = no 18962 return true 18963 } 18964 } 18965 return false 18966 }