github.com/rohankumardubey/syslog-redirector-golang@v0.0.0-20140320174030-4859f03d829a/src/cmd/6g/prog.c (about)

     1  // Copyright 2013 The Go Authors.  All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  #include <u.h>
     6  #include <libc.h>
     7  #include "gg.h"
     8  #include "opt.h"
     9  
    10  // Matches real RtoB but can be used in global initializer.
    11  #define RtoB(r) (1<<((r)-D_AX))
    12  
    13  enum {
    14  	AX = RtoB(D_AX),
    15  	BX = RtoB(D_BX),
    16  	CX = RtoB(D_CX),
    17  	DX = RtoB(D_DX),
    18  	DI = RtoB(D_DI),
    19  	SI = RtoB(D_SI),
    20  	
    21  	LeftRdwr = LeftRead | LeftWrite,
    22  	RightRdwr = RightRead | RightWrite,
    23  };
    24  
    25  #undef RtoB
    26  
    27  // This table gives the basic information about instruction
    28  // generated by the compiler and processed in the optimizer.
    29  // See opt.h for bit definitions.
    30  //
    31  // Instructions not generated need not be listed.
    32  // As an exception to that rule, we typically write down all the
    33  // size variants of an operation even if we just use a subset.
    34  //
    35  // The table is formatted for 8-space tabs.
    36  static ProgInfo progtable[ALAST] = {
    37  	[ATYPE]=	{Pseudo | Skip},
    38  	[ATEXT]=	{Pseudo},
    39  	[AFUNCDATA]=	{Pseudo},
    40  	[APCDATA]=	{Pseudo},
    41  	[AUNDEF]=	{OK},
    42  	[AUSEFIELD]=	{OK},
    43  	[ACHECKNIL]=	{LeftRead},
    44  
    45  	// NOP is an internal no-op that also stands
    46  	// for USED and SET annotations, not the Intel opcode.
    47  	[ANOP]=		{LeftRead | RightWrite},
    48  
    49  	[AADCL]=	{SizeL | LeftRead | RightRdwr | SetCarry | UseCarry},
    50  	[AADCQ]=	{SizeQ | LeftRead | RightRdwr | SetCarry | UseCarry},
    51  	[AADCW]=	{SizeW | LeftRead | RightRdwr | SetCarry | UseCarry},
    52  
    53  	[AADDB]=	{SizeB | LeftRead | RightRdwr | SetCarry},
    54  	[AADDL]=	{SizeL | LeftRead | RightRdwr | SetCarry},
    55  	[AADDW]=	{SizeW | LeftRead | RightRdwr | SetCarry},
    56  	[AADDQ]=	{SizeQ | LeftRead | RightRdwr | SetCarry},
    57  	
    58  	[AADDSD]=	{SizeD | LeftRead | RightRdwr},
    59  	[AADDSS]=	{SizeF | LeftRead | RightRdwr},
    60  
    61  	[AANDB]=	{SizeB | LeftRead | RightRdwr | SetCarry},
    62  	[AANDL]=	{SizeL | LeftRead | RightRdwr | SetCarry},
    63  	[AANDQ]=	{SizeQ | LeftRead | RightRdwr | SetCarry},
    64  	[AANDW]=	{SizeW | LeftRead | RightRdwr | SetCarry},
    65  
    66  	[ACALL]=	{RightAddr | Call | KillCarry},
    67  
    68  	[ACDQ]=		{OK, AX, AX | DX},
    69  	[ACQO]=		{OK, AX, AX | DX},
    70  	[ACWD]=		{OK, AX, AX | DX},
    71  
    72  	[ACLD]=		{OK},
    73  	[ASTD]=		{OK},
    74  
    75  	[ACMPB]=	{SizeB | LeftRead | RightRead | SetCarry},
    76  	[ACMPL]=	{SizeL | LeftRead | RightRead | SetCarry},
    77  	[ACMPQ]=	{SizeQ | LeftRead | RightRead | SetCarry},
    78  	[ACMPW]=	{SizeW | LeftRead | RightRead | SetCarry},
    79  
    80  	[ACOMISD]=	{SizeD | LeftRead | RightRead | SetCarry},
    81  	[ACOMISS]=	{SizeF | LeftRead | RightRead | SetCarry},
    82  
    83  	[ACVTSD2SL]=	{SizeL | LeftRead | RightWrite | Conv},
    84  	[ACVTSD2SQ]=	{SizeQ | LeftRead | RightWrite | Conv},
    85  	[ACVTSD2SS]=	{SizeF | LeftRead | RightWrite | Conv},
    86  	[ACVTSL2SD]=	{SizeD | LeftRead | RightWrite | Conv},
    87  	[ACVTSL2SS]=	{SizeF | LeftRead | RightWrite | Conv},
    88  	[ACVTSQ2SD]=	{SizeD | LeftRead | RightWrite | Conv},
    89  	[ACVTSQ2SS]=	{SizeF | LeftRead | RightWrite | Conv},
    90  	[ACVTSS2SD]=	{SizeD | LeftRead | RightWrite | Conv},
    91  	[ACVTSS2SL]=	{SizeL | LeftRead | RightWrite | Conv},
    92  	[ACVTSS2SQ]=	{SizeQ | LeftRead | RightWrite | Conv},
    93  	[ACVTTSD2SL]=	{SizeL | LeftRead | RightWrite | Conv},
    94  	[ACVTTSD2SQ]=	{SizeQ | LeftRead | RightWrite | Conv},
    95  	[ACVTTSS2SL]=	{SizeL | LeftRead | RightWrite | Conv},
    96  	[ACVTTSS2SQ]=	{SizeQ | LeftRead | RightWrite | Conv},
    97  
    98  	[ADECB]=	{SizeB | RightRdwr},
    99  	[ADECL]=	{SizeL | RightRdwr},
   100  	[ADECQ]=	{SizeQ | RightRdwr},
   101  	[ADECW]=	{SizeW | RightRdwr},
   102  
   103  	[ADIVB]=	{SizeB | LeftRead | SetCarry, AX, AX},
   104  	[ADIVL]=	{SizeL | LeftRead | SetCarry, AX|DX, AX|DX},
   105  	[ADIVQ]=	{SizeQ | LeftRead | SetCarry, AX|DX, AX|DX},
   106  	[ADIVW]=	{SizeW | LeftRead | SetCarry, AX|DX, AX|DX},
   107  
   108  	[ADIVSD]=	{SizeD | LeftRead | RightRdwr},
   109  	[ADIVSS]=	{SizeF | LeftRead | RightRdwr},
   110  
   111  	[AIDIVB]=	{SizeB | LeftRead | SetCarry, AX, AX},
   112  	[AIDIVL]=	{SizeL | LeftRead | SetCarry, AX|DX, AX|DX},
   113  	[AIDIVQ]=	{SizeQ | LeftRead | SetCarry, AX|DX, AX|DX},
   114  	[AIDIVW]=	{SizeW | LeftRead | SetCarry, AX|DX, AX|DX},
   115  
   116  	[AIMULB]=	{SizeB | LeftRead | SetCarry, AX, AX},
   117  	[AIMULL]=	{SizeL | LeftRead | ImulAXDX | SetCarry},
   118  	[AIMULQ]=	{SizeQ | LeftRead | ImulAXDX | SetCarry},
   119  	[AIMULW]=	{SizeW | LeftRead | ImulAXDX | SetCarry},
   120  
   121  	[AINCB]=	{SizeB | RightRdwr},
   122  	[AINCL]=	{SizeL | RightRdwr},
   123  	[AINCQ]=	{SizeQ | RightRdwr},
   124  	[AINCW]=	{SizeW | RightRdwr},
   125  
   126  	[AJCC]=		{Cjmp | UseCarry},
   127  	[AJCS]=		{Cjmp | UseCarry},
   128  	[AJEQ]=		{Cjmp | UseCarry},
   129  	[AJGE]=		{Cjmp | UseCarry},
   130  	[AJGT]=		{Cjmp | UseCarry},
   131  	[AJHI]=		{Cjmp | UseCarry},
   132  	[AJLE]=		{Cjmp | UseCarry},
   133  	[AJLS]=		{Cjmp | UseCarry},
   134  	[AJLT]=		{Cjmp | UseCarry},
   135  	[AJMI]=		{Cjmp | UseCarry},
   136  	[AJNE]=		{Cjmp | UseCarry},
   137  	[AJOC]=		{Cjmp | UseCarry},
   138  	[AJOS]=		{Cjmp | UseCarry},
   139  	[AJPC]=		{Cjmp | UseCarry},
   140  	[AJPL]=		{Cjmp | UseCarry},
   141  	[AJPS]=		{Cjmp | UseCarry},
   142  
   143  	[AJMP]=		{Jump | Break | KillCarry},
   144  
   145  	[ALEAQ]=	{LeftAddr | RightWrite},
   146  
   147  	[AMOVBLSX]=	{SizeL | LeftRead | RightWrite | Conv},
   148  	[AMOVBLZX]=	{SizeL | LeftRead | RightWrite | Conv},
   149  	[AMOVBQSX]=	{SizeQ | LeftRead | RightWrite | Conv},
   150  	[AMOVBQZX]=	{SizeQ | LeftRead | RightWrite | Conv},
   151  	[AMOVBWSX]=	{SizeW | LeftRead | RightWrite | Conv},
   152  	[AMOVBWZX]=	{SizeW | LeftRead | RightWrite | Conv},
   153  	[AMOVLQSX]=	{SizeQ | LeftRead | RightWrite | Conv},
   154  	[AMOVLQZX]=	{SizeQ | LeftRead | RightWrite | Conv},
   155  	[AMOVWLSX]=	{SizeL | LeftRead | RightWrite | Conv},
   156  	[AMOVWLZX]=	{SizeL | LeftRead | RightWrite | Conv},
   157  	[AMOVWQSX]=	{SizeQ | LeftRead | RightWrite | Conv},
   158  	[AMOVWQZX]=	{SizeQ | LeftRead | RightWrite | Conv},
   159  	[AMOVQL]=	{SizeL | LeftRead | RightWrite | Conv},
   160  
   161  	[AMOVB]=	{SizeB | LeftRead | RightWrite | Move},
   162  	[AMOVL]=	{SizeL | LeftRead | RightWrite | Move},
   163  	[AMOVQ]=	{SizeQ | LeftRead | RightWrite | Move},
   164  	[AMOVW]=	{SizeW | LeftRead | RightWrite | Move},
   165  
   166  	[AMOVSB]=	{OK, DI|SI, DI|SI},
   167  	[AMOVSL]=	{OK, DI|SI, DI|SI},
   168  	[AMOVSQ]=	{OK, DI|SI, DI|SI},
   169  	[AMOVSW]=	{OK, DI|SI, DI|SI},
   170  
   171  	[AMOVSD]=	{SizeD | LeftRead | RightWrite | Move},
   172  	[AMOVSS]=	{SizeF | LeftRead | RightWrite | Move},
   173  
   174  	// We use MOVAPD as a faster synonym for MOVSD.
   175  	[AMOVAPD]=	{SizeD | LeftRead | RightWrite | Move},
   176  
   177  	[AMULB]=	{SizeB | LeftRead | SetCarry, AX, AX},
   178  	[AMULL]=	{SizeL | LeftRead | SetCarry, AX, AX|DX},
   179  	[AMULQ]=	{SizeQ | LeftRead | SetCarry, AX, AX|DX},
   180  	[AMULW]=	{SizeW | LeftRead | SetCarry, AX, AX|DX},
   181  	
   182  	[AMULSD]=	{SizeD | LeftRead | RightRdwr},
   183  	[AMULSS]=	{SizeF | LeftRead | RightRdwr},
   184  
   185  	[ANEGB]=	{SizeB | RightRdwr | SetCarry},
   186  	[ANEGL]=	{SizeL | RightRdwr | SetCarry},
   187  	[ANEGQ]=	{SizeQ | RightRdwr | SetCarry},
   188  	[ANEGW]=	{SizeW | RightRdwr | SetCarry},
   189  
   190  	[ANOTB]=	{SizeB | RightRdwr},
   191  	[ANOTL]=	{SizeL | RightRdwr},
   192  	[ANOTQ]=	{SizeQ | RightRdwr},
   193  	[ANOTW]=	{SizeW | RightRdwr},
   194  
   195  	[AORB]=		{SizeB | LeftRead | RightRdwr | SetCarry},
   196  	[AORL]=		{SizeL | LeftRead | RightRdwr | SetCarry},
   197  	[AORQ]=		{SizeQ | LeftRead | RightRdwr | SetCarry},
   198  	[AORW]=		{SizeW | LeftRead | RightRdwr | SetCarry},
   199  
   200  	[APOPQ]=	{SizeQ | RightWrite},
   201  	[APUSHQ]=	{SizeQ | LeftRead},
   202  
   203  	[ARCLB]=	{SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry | UseCarry},
   204  	[ARCLL]=	{SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry | UseCarry},
   205  	[ARCLQ]=	{SizeQ | LeftRead | RightRdwr | ShiftCX | SetCarry | UseCarry},
   206  	[ARCLW]=	{SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry | UseCarry},
   207  
   208  	[ARCRB]=	{SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry | UseCarry},
   209  	[ARCRL]=	{SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry | UseCarry},
   210  	[ARCRQ]=	{SizeQ | LeftRead | RightRdwr | ShiftCX | SetCarry | UseCarry},
   211  	[ARCRW]=	{SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry | UseCarry},
   212  
   213  	[AREP]=		{OK, CX, CX},
   214  	[AREPN]=	{OK, CX, CX},
   215  
   216  	[ARET]=		{Break | KillCarry},
   217  
   218  	[AROLB]=	{SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry},
   219  	[AROLL]=	{SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry},
   220  	[AROLQ]=	{SizeQ | LeftRead | RightRdwr | ShiftCX | SetCarry},
   221  	[AROLW]=	{SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry},
   222  
   223  	[ARORB]=	{SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry},
   224  	[ARORL]=	{SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry},
   225  	[ARORQ]=	{SizeQ | LeftRead | RightRdwr | ShiftCX | SetCarry},
   226  	[ARORW]=	{SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry},
   227  
   228  	[ASALB]=	{SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry},
   229  	[ASALL]=	{SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry},
   230  	[ASALQ]=	{SizeQ | LeftRead | RightRdwr | ShiftCX | SetCarry},
   231  	[ASALW]=	{SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry},
   232  
   233  	[ASARB]=	{SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry},
   234  	[ASARL]=	{SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry},
   235  	[ASARQ]=	{SizeQ | LeftRead | RightRdwr | ShiftCX | SetCarry},
   236  	[ASARW]=	{SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry},
   237  
   238  	[ASBBB]=	{SizeB | LeftRead | RightRdwr | SetCarry | UseCarry},
   239  	[ASBBL]=	{SizeL | LeftRead | RightRdwr | SetCarry | UseCarry},
   240  	[ASBBQ]=	{SizeQ | LeftRead | RightRdwr | SetCarry | UseCarry},
   241  	[ASBBW]=	{SizeW | LeftRead | RightRdwr | SetCarry | UseCarry},
   242  
   243  	[ASHLB]=	{SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry},
   244  	[ASHLL]=	{SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry},
   245  	[ASHLQ]=	{SizeQ | LeftRead | RightRdwr | ShiftCX | SetCarry},
   246  	[ASHLW]=	{SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry},
   247  
   248  	[ASHRB]=	{SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry},
   249  	[ASHRL]=	{SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry},
   250  	[ASHRQ]=	{SizeQ | LeftRead | RightRdwr | ShiftCX | SetCarry},
   251  	[ASHRW]=	{SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry},
   252  
   253  	[ASTOSB]=	{OK, AX|DI, DI},
   254  	[ASTOSL]=	{OK, AX|DI, DI},
   255  	[ASTOSQ]=	{OK, AX|DI, DI},
   256  	[ASTOSW]=	{OK, AX|DI, DI},
   257  
   258  	[ASUBB]=	{SizeB | LeftRead | RightRdwr | SetCarry},
   259  	[ASUBL]=	{SizeL | LeftRead | RightRdwr | SetCarry},
   260  	[ASUBQ]=	{SizeQ | LeftRead | RightRdwr | SetCarry},
   261  	[ASUBW]=	{SizeW | LeftRead | RightRdwr | SetCarry},
   262  
   263  	[ASUBSD]=	{SizeD | LeftRead | RightRdwr},
   264  	[ASUBSS]=	{SizeF | LeftRead | RightRdwr},
   265  
   266  	[ATESTB]=	{SizeB | LeftRead | RightRead | SetCarry},
   267  	[ATESTL]=	{SizeL | LeftRead | RightRead | SetCarry},
   268  	[ATESTQ]=	{SizeQ | LeftRead | RightRead | SetCarry},
   269  	[ATESTW]=	{SizeW | LeftRead | RightRead | SetCarry},
   270  
   271  	[AUCOMISD]=	{SizeD | LeftRead | RightRead},
   272  	[AUCOMISS]=	{SizeF | LeftRead | RightRead},
   273  
   274  	[AXCHGB]=	{SizeB | LeftRdwr | RightRdwr},
   275  	[AXCHGL]=	{SizeL | LeftRdwr | RightRdwr},
   276  	[AXCHGQ]=	{SizeQ | LeftRdwr | RightRdwr},
   277  	[AXCHGW]=	{SizeW | LeftRdwr | RightRdwr},
   278  
   279  	[AXORB]=	{SizeB | LeftRead | RightRdwr | SetCarry},
   280  	[AXORL]=	{SizeL | LeftRead | RightRdwr | SetCarry},
   281  	[AXORQ]=	{SizeQ | LeftRead | RightRdwr | SetCarry},
   282  	[AXORW]=	{SizeW | LeftRead | RightRdwr | SetCarry},
   283  };
   284  
   285  void
   286  proginfo(ProgInfo *info, Prog *p)
   287  {
   288  	*info = progtable[p->as];
   289  	if(info->flags == 0)
   290  		fatal("unknown instruction %P", p);
   291  
   292  	if((info->flags & ShiftCX) && p->from.type != D_CONST)
   293  		info->reguse |= CX;
   294  
   295  	if(info->flags & ImulAXDX) {
   296  		if(p->to.type == D_NONE) {
   297  			info->reguse |= AX;
   298  			info->regset |= AX | DX;
   299  		} else {
   300  			info->flags |= RightRdwr;
   301  		}
   302  	}
   303  
   304  	// Addressing makes some registers used.
   305  	if(p->from.type >= D_INDIR)
   306  		info->regindex |= RtoB(p->from.type-D_INDIR);
   307  	if(p->from.index != D_NONE)
   308  		info->regindex |= RtoB(p->from.index);
   309  	if(p->to.type >= D_INDIR)
   310  		info->regindex |= RtoB(p->to.type-D_INDIR);
   311  	if(p->to.index != D_NONE)
   312  		info->regindex |= RtoB(p->to.index);
   313  }