github.com/sanprasirt/go@v0.0.0-20170607001320-a027466e4b6d/src/runtime/vlop_arm.s (about) 1 // Inferno's libkern/vlop-arm.s 2 // https://bitbucket.org/inferno-os/inferno-os/src/default/libkern/vlop-arm.s 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Revisions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com). All rights reserved. 6 // Portions Copyright 2009 The Go Authors. All rights reserved. 7 // 8 // Permission is hereby granted, free of charge, to any person obtaining a copy 9 // of this software and associated documentation files (the "Software"), to deal 10 // in the Software without restriction, including without limitation the rights 11 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 // copies of the Software, and to permit persons to whom the Software is 13 // furnished to do so, subject to the following conditions: 14 // 15 // The above copyright notice and this permission notice shall be included in 16 // all copies or substantial portions of the Software. 17 // 18 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 21 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 // THE SOFTWARE. 25 26 #include "go_asm.h" 27 #include "go_tls.h" 28 #include "funcdata.h" 29 #include "textflag.h" 30 31 /* replaced use of R10 by R11 because the former can be the data segment base register */ 32 33 TEXT _mulv(SB), NOSPLIT, $0 34 MOVW l0+0(FP), R2 /* l0 */ 35 MOVW h0+4(FP), R11 /* h0 */ 36 MOVW l1+8(FP), R4 /* l1 */ 37 MOVW h1+12(FP), R5 /* h1 */ 38 MULLU R4, R2, (R7,R6) 39 MUL R11, R4, R8 40 ADD R8, R7 41 MUL R2, R5, R8 42 ADD R8, R7 43 MOVW R6, ret_lo+16(FP) 44 MOVW R7, ret_hi+20(FP) 45 RET 46 47 // trampoline for _sfloat2. passes LR as arg0 and 48 // saves registers R0-R13 and CPSR on the stack. R0-R12 and CPSR flags can 49 // be changed by _sfloat2. 50 TEXT _sfloat(SB), NOSPLIT, $68-0 // 4 arg + 14*4 saved regs + cpsr + return value 51 MOVW R14, 4(R13) 52 MOVW R0, 8(R13) 53 MOVW $12(R13), R0 54 MOVM.IA.W [R1-R12], (R0) 55 MOVW $72(R13), R1 // correct for frame size 56 MOVW R1, 60(R13) 57 WORD $0xe10f1000 // mrs r1, cpsr 58 MOVW R1, 64(R13) 59 // Disable preemption of this goroutine during _sfloat2 by 60 // m->locks++ and m->locks-- around the call. 61 // Rescheduling this goroutine may cause the loss of the 62 // contents of the software floating point registers in 63 // m->freghi, m->freglo, m->fflag, if the goroutine is moved 64 // to a different m or another goroutine runs on this m. 65 // Rescheduling at ordinary function calls is okay because 66 // all registers are caller save, but _sfloat2 and the things 67 // that it runs are simulating the execution of individual 68 // program instructions, and those instructions do not expect 69 // the floating point registers to be lost. 70 // An alternative would be to move the software floating point 71 // registers into G, but they do not need to be kept at the 72 // usual places a goroutine reschedules (at function calls), 73 // so it would be a waste of 132 bytes per G. 74 MOVW g_m(g), R8 75 MOVW m_locks(R8), R1 76 ADD $1, R1 77 MOVW R1, m_locks(R8) 78 MOVW $1, R1 79 MOVW R1, m_softfloat(R8) 80 BL runtime·_sfloat2(SB) 81 MOVW 68(R13), R0 82 MOVW g_m(g), R8 83 MOVW m_locks(R8), R1 84 SUB $1, R1 85 MOVW R1, m_locks(R8) 86 MOVW $0, R1 87 MOVW R1, m_softfloat(R8) 88 MOVW R0, 0(R13) 89 MOVW 64(R13), R1 90 WORD $0xe128f001 // msr cpsr_f, r1 91 MOVW $12(R13), R0 92 // Restore R1-R12, R0. 93 MOVM.IA.W (R0), [R1-R12] 94 MOVW 8(R13), R0 95 RET 96 97 // trampoline for _sfloat2 panic. 98 // _sfloat2 instructs _sfloat to return here. 99 // We need to push a fake saved LR onto the stack, 100 // load the signal fault address into LR, and jump 101 // to the real sigpanic. 102 // This simulates what sighandler does for a memory fault. 103 TEXT runtime·_sfloatpanic(SB),NOSPLIT,$-4 104 MOVW $0, R0 105 MOVW.W R0, -4(R13) 106 MOVW g_sigpc(g), LR 107 B runtime·sigpanic(SB) 108 109 // func runtime·udiv(n, d uint32) (q, r uint32) 110 // compiler knowns the register usage of this function 111 // Reference: 112 // Sloss, Andrew et. al; ARM System Developer's Guide: Designing and Optimizing System Software 113 // Morgan Kaufmann; 1 edition (April 8, 2004), ISBN 978-1558608740 114 #define Rq R0 // input d, output q 115 #define Rr R1 // input n, output r 116 #define Rs R2 // three temporary variables 117 #define RM R3 118 #define Ra R11 119 120 // Be careful: Ra == R11 will be used by the linker for synthesized instructions. 121 TEXT runtime·udiv(SB),NOSPLIT,$-4 122 MOVBU runtime·hardDiv(SB), Ra 123 CMP $0, Ra 124 BNE udiv_hardware 125 126 CLZ Rq, Rs // find normalizing shift 127 MOVW.S Rq<<Rs, Ra 128 MOVW $fast_udiv_tab<>-64(SB), RM 129 ADD.NE Ra>>25, RM, Ra // index by most significant 7 bits of divisor 130 MOVBU.NE (Ra), Ra 131 132 SUB.S $7, Rs 133 RSB $0, Rq, RM // M = -q 134 MOVW.PL Ra<<Rs, Rq 135 136 // 1st Newton iteration 137 MUL.PL RM, Rq, Ra // a = -q*d 138 BMI udiv_by_large_d 139 MULAWT Ra, Rq, Rq, Rq // q approx q-(q*q*d>>32) 140 TEQ RM->1, RM // check for d=0 or d=1 141 142 // 2nd Newton iteration 143 MUL.NE RM, Rq, Ra 144 MOVW.NE $0, Rs 145 MULAL.NE Rq, Ra, (Rq,Rs) 146 BEQ udiv_by_0_or_1 147 148 // q now accurate enough for a remainder r, 0<=r<3*d 149 MULLU Rq, Rr, (Rq,Rs) // q = (r * q) >> 32 150 ADD RM, Rr, Rr // r = n - d 151 MULA RM, Rq, Rr, Rr // r = n - (q+1)*d 152 153 // since 0 <= n-q*d < 3*d; thus -d <= r < 2*d 154 CMN RM, Rr // t = r-d 155 SUB.CS RM, Rr, Rr // if (t<-d || t>=0) r=r+d 156 ADD.CC $1, Rq 157 ADD.PL RM<<1, Rr 158 ADD.PL $2, Rq 159 RET 160 161 // use hardware divider 162 udiv_hardware: 163 DIVUHW Rq, Rr, Rs 164 MUL Rs, Rq, RM 165 RSB Rr, RM, Rr 166 MOVW Rs, Rq 167 RET 168 169 udiv_by_large_d: 170 // at this point we know d>=2^(31-6)=2^25 171 SUB $4, Ra, Ra 172 RSB $0, Rs, Rs 173 MOVW Ra>>Rs, Rq 174 MULLU Rq, Rr, (Rq,Rs) 175 MULA RM, Rq, Rr, Rr 176 177 // q now accurate enough for a remainder r, 0<=r<4*d 178 CMN Rr>>1, RM // if(r/2 >= d) 179 ADD.CS RM<<1, Rr 180 ADD.CS $2, Rq 181 CMN Rr, RM 182 ADD.CS RM, Rr 183 ADD.CS $1, Rq 184 RET 185 186 udiv_by_0_or_1: 187 // carry set if d==1, carry clear if d==0 188 BCC udiv_by_0 189 MOVW Rr, Rq 190 MOVW $0, Rr 191 RET 192 193 udiv_by_0: 194 MOVW $runtime·panicdivide(SB), R11 195 B (R11) 196 197 // var tab [64]byte 198 // tab[0] = 255; for i := 1; i <= 63; i++ { tab[i] = (1<<14)/(64+i) } 199 // laid out here as little-endian uint32s 200 DATA fast_udiv_tab<>+0x00(SB)/4, $0xf4f8fcff 201 DATA fast_udiv_tab<>+0x04(SB)/4, $0xe6eaedf0 202 DATA fast_udiv_tab<>+0x08(SB)/4, $0xdadde0e3 203 DATA fast_udiv_tab<>+0x0c(SB)/4, $0xcfd2d4d7 204 DATA fast_udiv_tab<>+0x10(SB)/4, $0xc5c7cacc 205 DATA fast_udiv_tab<>+0x14(SB)/4, $0xbcbec0c3 206 DATA fast_udiv_tab<>+0x18(SB)/4, $0xb4b6b8ba 207 DATA fast_udiv_tab<>+0x1c(SB)/4, $0xacaeb0b2 208 DATA fast_udiv_tab<>+0x20(SB)/4, $0xa5a7a8aa 209 DATA fast_udiv_tab<>+0x24(SB)/4, $0x9fa0a2a3 210 DATA fast_udiv_tab<>+0x28(SB)/4, $0x999a9c9d 211 DATA fast_udiv_tab<>+0x2c(SB)/4, $0x93949697 212 DATA fast_udiv_tab<>+0x30(SB)/4, $0x8e8f9092 213 DATA fast_udiv_tab<>+0x34(SB)/4, $0x898a8c8d 214 DATA fast_udiv_tab<>+0x38(SB)/4, $0x85868788 215 DATA fast_udiv_tab<>+0x3c(SB)/4, $0x81828384 216 GLOBL fast_udiv_tab<>(SB), RODATA, $64 217 218 // The linker will pass numerator in R8 219 #define Rn R8 220 // The linker expects the result in RTMP 221 #define RTMP R11 222 223 TEXT _divu(SB), NOSPLIT, $16-0 224 // It's not strictly true that there are no local pointers. 225 // It could be that the saved registers Rq, Rr, Rs, and Rm 226 // contain pointers. However, the only way this can matter 227 // is if the stack grows (which it can't, udiv is nosplit) 228 // or if a fault happens and more frames are added to 229 // the stack due to deferred functions. 230 // In the latter case, the stack can grow arbitrarily, 231 // and garbage collection can happen, and those 232 // operations care about pointers, but in that case 233 // the calling frame is dead, and so are the saved 234 // registers. So we can claim there are no pointers here. 235 NO_LOCAL_POINTERS 236 MOVW Rq, 4(R13) 237 MOVW Rr, 8(R13) 238 MOVW Rs, 12(R13) 239 MOVW RM, 16(R13) 240 241 MOVW Rn, Rr /* numerator */ 242 MOVW g_m(g), Rq 243 MOVW m_divmod(Rq), Rq /* denominator */ 244 BL runtime·udiv(SB) 245 MOVW Rq, RTMP 246 MOVW 4(R13), Rq 247 MOVW 8(R13), Rr 248 MOVW 12(R13), Rs 249 MOVW 16(R13), RM 250 RET 251 252 TEXT _modu(SB), NOSPLIT, $16-0 253 NO_LOCAL_POINTERS 254 MOVW Rq, 4(R13) 255 MOVW Rr, 8(R13) 256 MOVW Rs, 12(R13) 257 MOVW RM, 16(R13) 258 259 MOVW Rn, Rr /* numerator */ 260 MOVW g_m(g), Rq 261 MOVW m_divmod(Rq), Rq /* denominator */ 262 BL runtime·udiv(SB) 263 MOVW Rr, RTMP 264 MOVW 4(R13), Rq 265 MOVW 8(R13), Rr 266 MOVW 12(R13), Rs 267 MOVW 16(R13), RM 268 RET 269 270 TEXT _div(SB),NOSPLIT,$16-0 271 NO_LOCAL_POINTERS 272 MOVW Rq, 4(R13) 273 MOVW Rr, 8(R13) 274 MOVW Rs, 12(R13) 275 MOVW RM, 16(R13) 276 MOVW Rn, Rr /* numerator */ 277 MOVW g_m(g), Rq 278 MOVW m_divmod(Rq), Rq /* denominator */ 279 CMP $0, Rr 280 BGE d1 281 RSB $0, Rr, Rr 282 CMP $0, Rq 283 BGE d2 284 RSB $0, Rq, Rq 285 d0: 286 BL runtime·udiv(SB) /* none/both neg */ 287 MOVW Rq, RTMP 288 B out1 289 d1: 290 CMP $0, Rq 291 BGE d0 292 RSB $0, Rq, Rq 293 d2: 294 BL runtime·udiv(SB) /* one neg */ 295 RSB $0, Rq, RTMP 296 out1: 297 MOVW 4(R13), Rq 298 MOVW 8(R13), Rr 299 MOVW 12(R13), Rs 300 MOVW 16(R13), RM 301 RET 302 303 TEXT _mod(SB),NOSPLIT,$16-0 304 NO_LOCAL_POINTERS 305 MOVW Rq, 4(R13) 306 MOVW Rr, 8(R13) 307 MOVW Rs, 12(R13) 308 MOVW RM, 16(R13) 309 MOVW Rn, Rr /* numerator */ 310 MOVW g_m(g), Rq 311 MOVW m_divmod(Rq), Rq /* denominator */ 312 CMP $0, Rq 313 RSB.LT $0, Rq, Rq 314 CMP $0, Rr 315 BGE m1 316 RSB $0, Rr, Rr 317 BL runtime·udiv(SB) /* neg numerator */ 318 RSB $0, Rr, RTMP 319 B out 320 m1: 321 BL runtime·udiv(SB) /* pos numerator */ 322 MOVW Rr, RTMP 323 out: 324 MOVW 4(R13), Rq 325 MOVW 8(R13), Rr 326 MOVW 12(R13), Rs 327 MOVW 16(R13), RM 328 RET 329 330 // _mul64by32 and _div64by32 not implemented on arm 331 TEXT runtime·_mul64by32(SB), NOSPLIT, $0 332 MOVW $0, R0 333 MOVW (R0), R1 // crash 334 335 TEXT runtime·_div64by32(SB), NOSPLIT, $0 336 MOVW $0, R0 337 MOVW (R0), R1 // crash