github.com/sbinet/go@v0.0.0-20160827155028-54d7de7dd62b/src/cmd/compile/internal/ssa/gen/ARM.rules (about) 1 // Copyright 2016 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 (AddPtr x y) -> (ADD x y) 6 (Add32 x y) -> (ADD x y) 7 (Add16 x y) -> (ADD x y) 8 (Add8 x y) -> (ADD x y) 9 (Add32F x y) -> (ADDF x y) 10 (Add64F x y) -> (ADDD x y) 11 12 (Add32carry x y) -> (ADDS x y) 13 (Add32withcarry x y c) -> (ADC x y c) 14 15 (SubPtr x y) -> (SUB x y) 16 (Sub32 x y) -> (SUB x y) 17 (Sub16 x y) -> (SUB x y) 18 (Sub8 x y) -> (SUB x y) 19 (Sub32F x y) -> (SUBF x y) 20 (Sub64F x y) -> (SUBD x y) 21 22 (Sub32carry x y) -> (SUBS x y) 23 (Sub32withcarry x y c) -> (SBC x y c) 24 25 (Mul32 x y) -> (MUL x y) 26 (Mul16 x y) -> (MUL x y) 27 (Mul8 x y) -> (MUL x y) 28 (Mul32F x y) -> (MULF x y) 29 (Mul64F x y) -> (MULD x y) 30 31 (Hmul32 x y) -> (HMUL x y) 32 (Hmul32u x y) -> (HMULU x y) 33 (Hmul16 x y) -> (SRAconst (MUL <config.fe.TypeInt32()> (SignExt16to32 x) (SignExt16to32 y)) [16]) 34 (Hmul16u x y) -> (SRLconst (MUL <config.fe.TypeUInt32()> (ZeroExt16to32 x) (ZeroExt16to32 y)) [16]) 35 (Hmul8 x y) -> (SRAconst (MUL <config.fe.TypeInt16()> (SignExt8to32 x) (SignExt8to32 y)) [8]) 36 (Hmul8u x y) -> (SRLconst (MUL <config.fe.TypeUInt16()> (ZeroExt8to32 x) (ZeroExt8to32 y)) [8]) 37 38 (Mul32uhilo x y) -> (MULLU x y) 39 40 (Div32 x y) -> (DIV x y) 41 (Div32u x y) -> (DIVU x y) 42 (Div16 x y) -> (DIV (SignExt16to32 x) (SignExt16to32 y)) 43 (Div16u x y) -> (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)) 44 (Div8 x y) -> (DIV (SignExt8to32 x) (SignExt8to32 y)) 45 (Div8u x y) -> (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)) 46 (Div32F x y) -> (DIVF x y) 47 (Div64F x y) -> (DIVD x y) 48 49 (Mod32 x y) -> (MOD x y) 50 (Mod32u x y) -> (MODU x y) 51 (Mod16 x y) -> (MOD (SignExt16to32 x) (SignExt16to32 y)) 52 (Mod16u x y) -> (MODU (ZeroExt16to32 x) (ZeroExt16to32 y)) 53 (Mod8 x y) -> (MOD (SignExt8to32 x) (SignExt8to32 y)) 54 (Mod8u x y) -> (MODU (ZeroExt8to32 x) (ZeroExt8to32 y)) 55 56 (And32 x y) -> (AND x y) 57 (And16 x y) -> (AND x y) 58 (And8 x y) -> (AND x y) 59 60 (Or32 x y) -> (OR x y) 61 (Or16 x y) -> (OR x y) 62 (Or8 x y) -> (OR x y) 63 64 (Xor32 x y) -> (XOR x y) 65 (Xor16 x y) -> (XOR x y) 66 (Xor8 x y) -> (XOR x y) 67 68 // unary ops 69 (Neg32 x) -> (RSBconst [0] x) 70 (Neg16 x) -> (RSBconst [0] x) 71 (Neg8 x) -> (RSBconst [0] x) 72 (Neg32F x) -> (NEGF x) 73 (Neg64F x) -> (NEGD x) 74 75 (Com32 x) -> (MVN x) 76 (Com16 x) -> (MVN x) 77 (Com8 x) -> (MVN x) 78 79 (Sqrt x) -> (SQRTD x) 80 81 // boolean ops -- booleans are represented with 0=false, 1=true 82 (AndB x y) -> (AND x y) 83 (OrB x y) -> (OR x y) 84 (EqB x y) -> (XORconst [1] (XOR <config.fe.TypeBool()> x y)) 85 (NeqB x y) -> (XOR x y) 86 (Not x) -> (XORconst [1] x) 87 88 // shifts 89 // hardware instruction uses only the low byte of the shift 90 // we compare to 256 to ensure Go semantics for large shifts 91 (Lsh32x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 92 (Lsh32x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 93 (Lsh32x8 x y) -> (SLL x (ZeroExt8to32 y)) 94 95 (Lsh16x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 96 (Lsh16x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 97 (Lsh16x8 x y) -> (SLL x (ZeroExt8to32 y)) 98 99 (Lsh8x32 x y) -> (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0]) 100 (Lsh8x16 x y) -> (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 101 (Lsh8x8 x y) -> (SLL x (ZeroExt8to32 y)) 102 103 (Rsh32Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> x y) (CMPconst [256] y) [0]) 104 (Rsh32Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 105 (Rsh32Ux8 x y) -> (SRL x (ZeroExt8to32 y)) 106 107 (Rsh16Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) y) (CMPconst [256] y) [0]) 108 (Rsh16Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 109 (Rsh16Ux8 x y) -> (SRL (ZeroExt16to32 x) (ZeroExt8to32 y)) 110 111 (Rsh8Ux32 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) y) (CMPconst [256] y) [0]) 112 (Rsh8Ux16 x y) -> (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0]) 113 (Rsh8Ux8 x y) -> (SRL (ZeroExt8to32 x) (ZeroExt8to32 y)) 114 115 (Rsh32x32 x y) -> (SRAcond x y (CMPconst [256] y)) 116 (Rsh32x16 x y) -> (SRAcond x (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 117 (Rsh32x8 x y) -> (SRA x (ZeroExt8to32 y)) 118 119 (Rsh16x32 x y) -> (SRAcond (SignExt16to32 x) y (CMPconst [256] y)) 120 (Rsh16x16 x y) -> (SRAcond (SignExt16to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 121 (Rsh16x8 x y) -> (SRA (SignExt16to32 x) (ZeroExt8to32 y)) 122 123 (Rsh8x32 x y) -> (SRAcond (SignExt8to32 x) y (CMPconst [256] y)) 124 (Rsh8x16 x y) -> (SRAcond (SignExt8to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y))) 125 (Rsh8x8 x y) -> (SRA (SignExt8to32 x) (ZeroExt8to32 y)) 126 127 // constant shifts 128 // generic opt rewrites all constant shifts to shift by Const64 129 (Lsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SLLconst x [c]) 130 (Rsh32x64 x (Const64 [c])) && uint64(c) < 32 -> (SRAconst x [c]) 131 (Rsh32Ux64 x (Const64 [c])) && uint64(c) < 32 -> (SRLconst x [c]) 132 (Lsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SLLconst x [c]) 133 (Rsh16x64 x (Const64 [c])) && uint64(c) < 16 -> (SRAconst (SLLconst <config.fe.TypeUInt32()> x [16]) [c+16]) 134 (Rsh16Ux64 x (Const64 [c])) && uint64(c) < 16 -> (SRLconst (SLLconst <config.fe.TypeUInt32()> x [16]) [c+16]) 135 (Lsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SLLconst x [c]) 136 (Rsh8x64 x (Const64 [c])) && uint64(c) < 8 -> (SRAconst (SLLconst <config.fe.TypeUInt32()> x [24]) [c+24]) 137 (Rsh8Ux64 x (Const64 [c])) && uint64(c) < 8 -> (SRLconst (SLLconst <config.fe.TypeUInt32()> x [24]) [c+24]) 138 139 // large constant shifts 140 (Lsh32x64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) 141 (Rsh32Ux64 _ (Const64 [c])) && uint64(c) >= 32 -> (Const32 [0]) 142 (Lsh16x64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) 143 (Rsh16Ux64 _ (Const64 [c])) && uint64(c) >= 16 -> (Const16 [0]) 144 (Lsh8x64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) 145 (Rsh8Ux64 _ (Const64 [c])) && uint64(c) >= 8 -> (Const8 [0]) 146 147 // large constant signed right shift, we leave the sign bit 148 (Rsh32x64 x (Const64 [c])) && uint64(c) >= 32 -> (SRAconst x [31]) 149 (Rsh16x64 x (Const64 [c])) && uint64(c) >= 16 -> (SRAconst (SLLconst <config.fe.TypeUInt32()> x [16]) [31]) 150 (Rsh8x64 x (Const64 [c])) && uint64(c) >= 8 -> (SRAconst (SLLconst <config.fe.TypeUInt32()> x [24]) [31]) 151 152 (Lrot32 x [c]) -> (SRRconst x [32-c&31]) 153 (Lrot16 <t> x [c]) -> (OR (SLLconst <t> x [c&15]) (SRLconst <t> x [16-c&15])) 154 (Lrot8 <t> x [c]) -> (OR (SLLconst <t> x [c&7]) (SRLconst <t> x [8-c&7])) 155 156 // constants 157 (Const8 [val]) -> (MOVWconst [val]) 158 (Const16 [val]) -> (MOVWconst [val]) 159 (Const32 [val]) -> (MOVWconst [val]) 160 (Const32F [val]) -> (MOVFconst [val]) 161 (Const64F [val]) -> (MOVDconst [val]) 162 (ConstNil) -> (MOVWconst [0]) 163 (ConstBool [b]) -> (MOVWconst [b]) 164 165 // truncations 166 // Because we ignore high parts of registers, truncates are just copies. 167 (Trunc16to8 x) -> x 168 (Trunc32to8 x) -> x 169 (Trunc32to16 x) -> x 170 171 // Zero-/Sign-extensions 172 (ZeroExt8to16 x) -> (MOVBUreg x) 173 (ZeroExt8to32 x) -> (MOVBUreg x) 174 (ZeroExt16to32 x) -> (MOVHUreg x) 175 176 (SignExt8to16 x) -> (MOVBreg x) 177 (SignExt8to32 x) -> (MOVBreg x) 178 (SignExt16to32 x) -> (MOVHreg x) 179 180 (Signmask x) -> (SRAconst x [31]) 181 (Zeromask x) -> (SRAconst (RSBshiftRL <config.fe.TypeInt32()> x x [1]) [31]) // sign bit of uint32(x)>>1 - x 182 183 // float <-> int conversion 184 (Cvt32to32F x) -> (MOVWF x) 185 (Cvt32to64F x) -> (MOVWD x) 186 (Cvt32Uto32F x) -> (MOVWUF x) 187 (Cvt32Uto64F x) -> (MOVWUD x) 188 (Cvt32Fto32 x) -> (MOVFW x) 189 (Cvt64Fto32 x) -> (MOVDW x) 190 (Cvt32Fto32U x) -> (MOVFWU x) 191 (Cvt64Fto32U x) -> (MOVDWU x) 192 (Cvt32Fto64F x) -> (MOVFD x) 193 (Cvt64Fto32F x) -> (MOVDF x) 194 195 // comparisons 196 (Eq8 x y) -> (Equal (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 197 (Eq16 x y) -> (Equal (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 198 (Eq32 x y) -> (Equal (CMP x y)) 199 (EqPtr x y) -> (Equal (CMP x y)) 200 (Eq32F x y) -> (Equal (CMPF x y)) 201 (Eq64F x y) -> (Equal (CMPD x y)) 202 203 (Neq8 x y) -> (NotEqual (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 204 (Neq16 x y) -> (NotEqual (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 205 (Neq32 x y) -> (NotEqual (CMP x y)) 206 (NeqPtr x y) -> (NotEqual (CMP x y)) 207 (Neq32F x y) -> (NotEqual (CMPF x y)) 208 (Neq64F x y) -> (NotEqual (CMPD x y)) 209 210 (Less8 x y) -> (LessThan (CMP (SignExt8to32 x) (SignExt8to32 y))) 211 (Less16 x y) -> (LessThan (CMP (SignExt16to32 x) (SignExt16to32 y))) 212 (Less32 x y) -> (LessThan (CMP x y)) 213 (Less32F x y) -> (GreaterThan (CMPF y x)) // reverse operands to work around NaN 214 (Less64F x y) -> (GreaterThan (CMPD y x)) // reverse operands to work around NaN 215 216 (Less8U x y) -> (LessThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 217 (Less16U x y) -> (LessThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 218 (Less32U x y) -> (LessThanU (CMP x y)) 219 220 (Leq8 x y) -> (LessEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) 221 (Leq16 x y) -> (LessEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) 222 (Leq32 x y) -> (LessEqual (CMP x y)) 223 (Leq32F x y) -> (GreaterEqual (CMPF y x)) // reverse operands to work around NaN 224 (Leq64F x y) -> (GreaterEqual (CMPD y x)) // reverse operands to work around NaN 225 226 (Leq8U x y) -> (LessEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 227 (Leq16U x y) -> (LessEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 228 (Leq32U x y) -> (LessEqualU (CMP x y)) 229 230 (Greater8 x y) -> (GreaterThan (CMP (SignExt8to32 x) (SignExt8to32 y))) 231 (Greater16 x y) -> (GreaterThan (CMP (SignExt16to32 x) (SignExt16to32 y))) 232 (Greater32 x y) -> (GreaterThan (CMP x y)) 233 (Greater32F x y) -> (GreaterThan (CMPF x y)) 234 (Greater64F x y) -> (GreaterThan (CMPD x y)) 235 236 (Greater8U x y) -> (GreaterThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 237 (Greater16U x y) -> (GreaterThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 238 (Greater32U x y) -> (GreaterThanU (CMP x y)) 239 240 (Geq8 x y) -> (GreaterEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) 241 (Geq16 x y) -> (GreaterEqual (CMP (SignExt16to32 x) (SignExt16to32 y))) 242 (Geq32 x y) -> (GreaterEqual (CMP x y)) 243 (Geq32F x y) -> (GreaterEqual (CMPF x y)) 244 (Geq64F x y) -> (GreaterEqual (CMPD x y)) 245 246 (Geq8U x y) -> (GreaterEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) 247 (Geq16U x y) -> (GreaterEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) 248 (Geq32U x y) -> (GreaterEqualU (CMP x y)) 249 250 (OffPtr [off] ptr:(SP)) -> (MOVWaddr [off] ptr) 251 (OffPtr [off] ptr) -> (ADDconst [off] ptr) 252 253 (Addr {sym} base) -> (MOVWaddr {sym} base) 254 255 // loads 256 (Load <t> ptr mem) && t.IsBoolean() -> (MOVBUload ptr mem) 257 (Load <t> ptr mem) && (is8BitInt(t) && isSigned(t)) -> (MOVBload ptr mem) 258 (Load <t> ptr mem) && (is8BitInt(t) && !isSigned(t)) -> (MOVBUload ptr mem) 259 (Load <t> ptr mem) && (is16BitInt(t) && isSigned(t)) -> (MOVHload ptr mem) 260 (Load <t> ptr mem) && (is16BitInt(t) && !isSigned(t)) -> (MOVHUload ptr mem) 261 (Load <t> ptr mem) && (is32BitInt(t) || isPtr(t)) -> (MOVWload ptr mem) 262 (Load <t> ptr mem) && is32BitFloat(t) -> (MOVFload ptr mem) 263 (Load <t> ptr mem) && is64BitFloat(t) -> (MOVDload ptr mem) 264 265 // stores 266 (Store [1] ptr val mem) -> (MOVBstore ptr val mem) 267 (Store [2] ptr val mem) -> (MOVHstore ptr val mem) 268 (Store [4] ptr val mem) && !is32BitFloat(val.Type) -> (MOVWstore ptr val mem) 269 (Store [4] ptr val mem) && is32BitFloat(val.Type) -> (MOVFstore ptr val mem) 270 (Store [8] ptr val mem) && is64BitFloat(val.Type) -> (MOVDstore ptr val mem) 271 272 // zero instructions 273 (Zero [s] _ mem) && SizeAndAlign(s).Size() == 0 -> mem 274 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 1 -> (MOVBstore ptr (MOVWconst [0]) mem) 275 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 2 && SizeAndAlign(s).Align()%2 == 0 -> 276 (MOVHstore ptr (MOVWconst [0]) mem) 277 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 2 -> 278 (MOVBstore [1] ptr (MOVWconst [0]) 279 (MOVBstore [0] ptr (MOVWconst [0]) mem)) 280 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%4 == 0 -> 281 (MOVWstore ptr (MOVWconst [0]) mem) 282 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%2 == 0 -> 283 (MOVHstore [2] ptr (MOVWconst [0]) 284 (MOVHstore [0] ptr (MOVWconst [0]) mem)) 285 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 4 -> 286 (MOVBstore [3] ptr (MOVWconst [0]) 287 (MOVBstore [2] ptr (MOVWconst [0]) 288 (MOVBstore [1] ptr (MOVWconst [0]) 289 (MOVBstore [0] ptr (MOVWconst [0]) mem)))) 290 291 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 3 -> 292 (MOVBstore [2] ptr (MOVWconst [0]) 293 (MOVBstore [1] ptr (MOVWconst [0]) 294 (MOVBstore [0] ptr (MOVWconst [0]) mem))) 295 296 // Medium zeroing uses a duff device 297 // 4 and 128 are magic constants, see runtime/mkduff.go 298 (Zero [s] ptr mem) 299 && SizeAndAlign(s).Size()%4 == 0 && SizeAndAlign(s).Size() > 4 && SizeAndAlign(s).Size() <= 512 300 && SizeAndAlign(s).Align()%4 == 0 && !config.noDuffDevice -> 301 (DUFFZERO [4 * (128 - int64(SizeAndAlign(s).Size()/4))] ptr (MOVWconst [0]) mem) 302 303 // Large zeroing uses a loop 304 (Zero [s] ptr mem) 305 && (SizeAndAlign(s).Size() > 512 || config.noDuffDevice) || SizeAndAlign(s).Align()%4 != 0 -> 306 (LoweredZero [SizeAndAlign(s).Align()] 307 ptr 308 (ADDconst <ptr.Type> ptr [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)]) 309 (MOVWconst [0]) 310 mem) 311 312 // moves 313 (Move [s] _ _ mem) && SizeAndAlign(s).Size() == 0 -> mem 314 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 1 -> (MOVBstore dst (MOVBUload src mem) mem) 315 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 2 && SizeAndAlign(s).Align()%2 == 0 -> 316 (MOVHstore dst (MOVHUload src mem) mem) 317 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 2 -> 318 (MOVBstore [1] dst (MOVBUload [1] src mem) 319 (MOVBstore dst (MOVBUload src mem) mem)) 320 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%4 == 0 -> 321 (MOVWstore dst (MOVWload src mem) mem) 322 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 4 && SizeAndAlign(s).Align()%2 == 0 -> 323 (MOVHstore [2] dst (MOVHUload [2] src mem) 324 (MOVHstore dst (MOVHUload src mem) mem)) 325 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 4 -> 326 (MOVBstore [3] dst (MOVBUload [3] src mem) 327 (MOVBstore [2] dst (MOVBUload [2] src mem) 328 (MOVBstore [1] dst (MOVBUload [1] src mem) 329 (MOVBstore dst (MOVBUload src mem) mem)))) 330 331 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 3 -> 332 (MOVBstore [2] dst (MOVBUload [2] src mem) 333 (MOVBstore [1] dst (MOVBUload [1] src mem) 334 (MOVBstore dst (MOVBUload src mem) mem))) 335 336 // Medium move uses a duff device 337 // 8 and 128 are magic constants, see runtime/mkduff.go 338 (Move [s] dst src mem) 339 && SizeAndAlign(s).Size()%4 == 0 && SizeAndAlign(s).Size() > 4 && SizeAndAlign(s).Size() <= 512 340 && SizeAndAlign(s).Align()%4 == 0 && !config.noDuffDevice -> 341 (DUFFCOPY [8 * (128 - int64(SizeAndAlign(s).Size()/4))] dst src mem) 342 343 // Large move uses a loop 344 (Move [s] dst src mem) 345 && (SizeAndAlign(s).Size() > 512 || config.noDuffDevice) || SizeAndAlign(s).Align()%4 != 0 -> 346 (LoweredMove [SizeAndAlign(s).Align()] 347 dst 348 src 349 (ADDconst <src.Type> src [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)]) 350 mem) 351 352 // calls 353 (StaticCall [argwid] {target} mem) -> (CALLstatic [argwid] {target} mem) 354 (ClosureCall [argwid] entry closure mem) -> (CALLclosure [argwid] entry closure mem) 355 (DeferCall [argwid] mem) -> (CALLdefer [argwid] mem) 356 (GoCall [argwid] mem) -> (CALLgo [argwid] mem) 357 (InterCall [argwid] entry mem) -> (CALLinter [argwid] entry mem) 358 359 // checks 360 (NilCheck ptr mem) -> (LoweredNilCheck ptr mem) 361 (IsNonNil ptr) -> (NotEqual (CMPconst [0] ptr)) 362 (IsInBounds idx len) -> (LessThanU (CMP idx len)) 363 (IsSliceInBounds idx len) -> (LessEqualU (CMP idx len)) 364 365 // pseudo-ops 366 (GetClosurePtr) -> (LoweredGetClosurePtr) 367 (Convert x mem) -> (MOVWconvert x mem) 368 369 // Absorb pseudo-ops into blocks. 370 (If (Equal cc) yes no) -> (EQ cc yes no) 371 (If (NotEqual cc) yes no) -> (NE cc yes no) 372 (If (LessThan cc) yes no) -> (LT cc yes no) 373 (If (LessThanU cc) yes no) -> (ULT cc yes no) 374 (If (LessEqual cc) yes no) -> (LE cc yes no) 375 (If (LessEqualU cc) yes no) -> (ULE cc yes no) 376 (If (GreaterThan cc) yes no) -> (GT cc yes no) 377 (If (GreaterThanU cc) yes no) -> (UGT cc yes no) 378 (If (GreaterEqual cc) yes no) -> (GE cc yes no) 379 (If (GreaterEqualU cc) yes no) -> (UGE cc yes no) 380 381 (If cond yes no) -> (NE (CMPconst [0] cond) yes no) 382 383 // Absorb boolean tests into block 384 (NE (CMPconst [0] (Equal cc)) yes no) -> (EQ cc yes no) 385 (NE (CMPconst [0] (NotEqual cc)) yes no) -> (NE cc yes no) 386 (NE (CMPconst [0] (LessThan cc)) yes no) -> (LT cc yes no) 387 (NE (CMPconst [0] (LessThanU cc)) yes no) -> (ULT cc yes no) 388 (NE (CMPconst [0] (LessEqual cc)) yes no) -> (LE cc yes no) 389 (NE (CMPconst [0] (LessEqualU cc)) yes no) -> (ULE cc yes no) 390 (NE (CMPconst [0] (GreaterThan cc)) yes no) -> (GT cc yes no) 391 (NE (CMPconst [0] (GreaterThanU cc)) yes no) -> (UGT cc yes no) 392 (NE (CMPconst [0] (GreaterEqual cc)) yes no) -> (GE cc yes no) 393 (NE (CMPconst [0] (GreaterEqualU cc)) yes no) -> (UGE cc yes no) 394 395 // Optimizations 396 397 // fold offset into address 398 (ADDconst [off1] (MOVWaddr [off2] {sym} ptr)) -> (MOVWaddr [off1+off2] {sym} ptr) 399 400 // fold address into load/store 401 (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBload [off1+off2] {sym} ptr mem) 402 (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVBUload [off1+off2] {sym} ptr mem) 403 (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHload [off1+off2] {sym} ptr mem) 404 (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVHUload [off1+off2] {sym} ptr mem) 405 (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVWload [off1+off2] {sym} ptr mem) 406 (MOVFload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVFload [off1+off2] {sym} ptr mem) 407 (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) -> (MOVDload [off1+off2] {sym} ptr mem) 408 409 (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVBstore [off1+off2] {sym} ptr val mem) 410 (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVHstore [off1+off2] {sym} ptr val mem) 411 (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVWstore [off1+off2] {sym} ptr val mem) 412 (MOVFstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVFstore [off1+off2] {sym} ptr val mem) 413 (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) -> (MOVDstore [off1+off2] {sym} ptr val mem) 414 415 (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 416 (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 417 (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 418 (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 419 (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 420 (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 421 (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 422 (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 423 (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 424 (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 425 (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 426 (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 427 (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> 428 (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 429 430 (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 431 (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 432 (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 433 (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 434 (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 435 (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 436 (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 437 (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 438 (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> 439 (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 440 441 // replace load from same location as preceding store with copy 442 (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && isSigned(x.Type) -> x 443 (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && !isSigned(x.Type) -> x 444 (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && isSigned(x.Type) -> x 445 (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && !isSigned(x.Type) -> x 446 (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 447 (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 448 (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 449 450 (MOVWloadidx ptr idx (MOVWstoreidx ptr2 idx x _)) && isSamePtr(ptr, ptr2) -> x 451 (MOVWloadshiftLL ptr idx [c] (MOVWstoreshiftLL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 452 (MOVWloadshiftRL ptr idx [c] (MOVWstoreshiftRL ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 453 (MOVWloadshiftRA ptr idx [c] (MOVWstoreshiftRA ptr2 idx [d] x _)) && c==d && isSamePtr(ptr, ptr2) -> x 454 455 // fold constant into arithmatic ops 456 (ADD (MOVWconst [c]) x) -> (ADDconst [c] x) 457 (ADD x (MOVWconst [c])) -> (ADDconst [c] x) 458 (SUB (MOVWconst [c]) x) -> (RSBconst [c] x) 459 (SUB x (MOVWconst [c])) -> (SUBconst [c] x) 460 (RSB (MOVWconst [c]) x) -> (SUBconst [c] x) 461 (RSB x (MOVWconst [c])) -> (RSBconst [c] x) 462 463 (ADDS (MOVWconst [c]) x) -> (ADDSconst [c] x) 464 (ADDS x (MOVWconst [c])) -> (ADDSconst [c] x) 465 (SUBS (MOVWconst [c]) x) -> (RSBSconst [c] x) 466 (SUBS x (MOVWconst [c])) -> (SUBSconst [c] x) 467 468 (ADC (MOVWconst [c]) x flags) -> (ADCconst [c] x flags) 469 (ADC x (MOVWconst [c]) flags) -> (ADCconst [c] x flags) 470 (SBC (MOVWconst [c]) x flags) -> (RSCconst [c] x flags) 471 (SBC x (MOVWconst [c]) flags) -> (SBCconst [c] x flags) 472 473 (AND (MOVWconst [c]) x) -> (ANDconst [c] x) 474 (AND x (MOVWconst [c])) -> (ANDconst [c] x) 475 (OR (MOVWconst [c]) x) -> (ORconst [c] x) 476 (OR x (MOVWconst [c])) -> (ORconst [c] x) 477 (XOR (MOVWconst [c]) x) -> (XORconst [c] x) 478 (XOR x (MOVWconst [c])) -> (XORconst [c] x) 479 (BIC x (MOVWconst [c])) -> (BICconst [c] x) 480 481 (SLL x (MOVWconst [c])) -> (SLLconst x [c&31]) // Note: I don't think we ever generate bad constant shifts (i.e. c>=32) 482 (SRL x (MOVWconst [c])) -> (SRLconst x [c&31]) 483 (SRA x (MOVWconst [c])) -> (SRAconst x [c&31]) 484 485 (CMP x (MOVWconst [c])) -> (CMPconst [c] x) 486 (CMP (MOVWconst [c]) x) -> (InvertFlags (CMPconst [c] x)) 487 488 // don't extend after proper load 489 // MOVWreg instruction is not emitted if src and dst registers are same, but it ensures the type. 490 (MOVBreg x:(MOVBload _ _)) -> (MOVWreg x) 491 (MOVBUreg x:(MOVBUload _ _)) -> (MOVWreg x) 492 (MOVHreg x:(MOVBload _ _)) -> (MOVWreg x) 493 (MOVHreg x:(MOVBUload _ _)) -> (MOVWreg x) 494 (MOVHreg x:(MOVHload _ _)) -> (MOVWreg x) 495 (MOVHUreg x:(MOVBUload _ _)) -> (MOVWreg x) 496 (MOVHUreg x:(MOVHUload _ _)) -> (MOVWreg x) 497 498 // fold extensions and ANDs together 499 (MOVBUreg (ANDconst [c] x)) -> (ANDconst [c&0xff] x) 500 (MOVHUreg (ANDconst [c] x)) -> (ANDconst [c&0xffff] x) 501 (MOVBreg (ANDconst [c] x)) && c & 0x80 == 0 -> (ANDconst [c&0x7f] x) 502 (MOVHreg (ANDconst [c] x)) && c & 0x8000 == 0 -> (ANDconst [c&0x7fff] x) 503 504 // fold double extensions 505 (MOVBreg x:(MOVBreg _)) -> (MOVWreg x) 506 (MOVBUreg x:(MOVBUreg _)) -> (MOVWreg x) 507 (MOVHreg x:(MOVBreg _)) -> (MOVWreg x) 508 (MOVHreg x:(MOVBUreg _)) -> (MOVWreg x) 509 (MOVHreg x:(MOVHreg _)) -> (MOVWreg x) 510 (MOVHUreg x:(MOVBUreg _)) -> (MOVWreg x) 511 (MOVHUreg x:(MOVHUreg _)) -> (MOVWreg x) 512 513 // don't extend before store 514 (MOVBstore [off] {sym} ptr (MOVBreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 515 (MOVBstore [off] {sym} ptr (MOVBUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 516 (MOVBstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 517 (MOVBstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 518 (MOVHstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 519 (MOVHstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 520 521 // if a register move has only 1 use, just use the same register without emitting instruction 522 // MOVWnop doesn't emit instruction, only for ensuring the type. 523 (MOVWreg x) && x.Uses == 1 -> (MOVWnop x) 524 525 // mul by constant 526 (MUL x (MOVWconst [c])) && int32(c) == -1 -> (RSBconst [0] x) 527 (MUL _ (MOVWconst [0])) -> (MOVWconst [0]) 528 (MUL x (MOVWconst [1])) -> x 529 (MUL x (MOVWconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 530 (MUL x (MOVWconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 531 (MUL x (MOVWconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSBshiftLL x x [log2(c+1)]) 532 (MUL x (MOVWconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 533 (MUL x (MOVWconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 534 (MUL x (MOVWconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) 535 (MUL x (MOVWconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 536 537 (MUL (MOVWconst [c]) x) && int32(c) == -1 -> (RSBconst [0] x) 538 (MUL (MOVWconst [0]) _) -> (MOVWconst [0]) 539 (MUL (MOVWconst [1]) x) -> x 540 (MUL (MOVWconst [c]) x) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 541 (MUL (MOVWconst [c]) x) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 542 (MUL (MOVWconst [c]) x) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (RSBshiftLL x x [log2(c+1)]) 543 (MUL (MOVWconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 544 (MUL (MOVWconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 545 (MUL (MOVWconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) 546 (MUL (MOVWconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 547 548 (MULA x (MOVWconst [c]) a) && int32(c) == -1 -> (SUB a x) 549 (MULA _ (MOVWconst [0]) a) -> a 550 (MULA x (MOVWconst [1]) a) -> (ADD x a) 551 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) 552 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 553 (MULA x (MOVWconst [c]) a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 554 (MULA x (MOVWconst [c]) a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 555 (MULA x (MOVWconst [c]) a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 556 (MULA x (MOVWconst [c]) a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 557 (MULA x (MOVWconst [c]) a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 558 559 (MULA (MOVWconst [c]) x a) && int32(c) == -1 -> (SUB a x) 560 (MULA (MOVWconst [0]) _ a) -> a 561 (MULA (MOVWconst [1]) x a) -> (ADD x a) 562 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c) -> (ADD (SLLconst <x.Type> [log2(c)] x) a) 563 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a) 564 (MULA (MOVWconst [c]) x a) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a) 565 (MULA (MOVWconst [c]) x a) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a) 566 (MULA (MOVWconst [c]) x a) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a) 567 (MULA (MOVWconst [c]) x a) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a) 568 (MULA (MOVWconst [c]) x a) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a) 569 570 // div by constant 571 (DIVU x (MOVWconst [1])) -> x 572 (DIVU x (MOVWconst [c])) && isPowerOfTwo(c) -> (SRLconst [log2(c)] x) 573 574 // constant comparisons 575 (CMPconst (MOVWconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ) 576 (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)<uint32(y) -> (FlagLT_ULT) 577 (CMPconst (MOVWconst [x]) [y]) && int32(x)<int32(y) && uint32(x)>uint32(y) -> (FlagLT_UGT) 578 (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)<uint32(y) -> (FlagGT_ULT) 579 (CMPconst (MOVWconst [x]) [y]) && int32(x)>int32(y) && uint32(x)>uint32(y) -> (FlagGT_UGT) 580 581 // other known comparisons 582 (CMPconst (MOVBUreg _) [c]) && 0xff < c -> (FlagLT_ULT) 583 (CMPconst (MOVHUreg _) [c]) && 0xffff < c -> (FlagLT_ULT) 584 (CMPconst (ANDconst _ [m]) [n]) && 0 <= int32(m) && int32(m) < int32(n) -> (FlagLT_ULT) 585 (CMPconst (SRLconst _ [c]) [n]) && 0 <= n && 0 < c && c <= 32 && (1<<uint32(32-c)) <= uint32(n) -> (FlagLT_ULT) 586 587 // absorb flag constants into branches 588 (EQ (FlagEQ) yes no) -> (First nil yes no) 589 (EQ (FlagLT_ULT) yes no) -> (First nil no yes) 590 (EQ (FlagLT_UGT) yes no) -> (First nil no yes) 591 (EQ (FlagGT_ULT) yes no) -> (First nil no yes) 592 (EQ (FlagGT_UGT) yes no) -> (First nil no yes) 593 594 (NE (FlagEQ) yes no) -> (First nil no yes) 595 (NE (FlagLT_ULT) yes no) -> (First nil yes no) 596 (NE (FlagLT_UGT) yes no) -> (First nil yes no) 597 (NE (FlagGT_ULT) yes no) -> (First nil yes no) 598 (NE (FlagGT_UGT) yes no) -> (First nil yes no) 599 600 (LT (FlagEQ) yes no) -> (First nil no yes) 601 (LT (FlagLT_ULT) yes no) -> (First nil yes no) 602 (LT (FlagLT_UGT) yes no) -> (First nil yes no) 603 (LT (FlagGT_ULT) yes no) -> (First nil no yes) 604 (LT (FlagGT_UGT) yes no) -> (First nil no yes) 605 606 (LE (FlagEQ) yes no) -> (First nil yes no) 607 (LE (FlagLT_ULT) yes no) -> (First nil yes no) 608 (LE (FlagLT_UGT) yes no) -> (First nil yes no) 609 (LE (FlagGT_ULT) yes no) -> (First nil no yes) 610 (LE (FlagGT_UGT) yes no) -> (First nil no yes) 611 612 (GT (FlagEQ) yes no) -> (First nil no yes) 613 (GT (FlagLT_ULT) yes no) -> (First nil no yes) 614 (GT (FlagLT_UGT) yes no) -> (First nil no yes) 615 (GT (FlagGT_ULT) yes no) -> (First nil yes no) 616 (GT (FlagGT_UGT) yes no) -> (First nil yes no) 617 618 (GE (FlagEQ) yes no) -> (First nil yes no) 619 (GE (FlagLT_ULT) yes no) -> (First nil no yes) 620 (GE (FlagLT_UGT) yes no) -> (First nil no yes) 621 (GE (FlagGT_ULT) yes no) -> (First nil yes no) 622 (GE (FlagGT_UGT) yes no) -> (First nil yes no) 623 624 (ULT (FlagEQ) yes no) -> (First nil no yes) 625 (ULT (FlagLT_ULT) yes no) -> (First nil yes no) 626 (ULT (FlagLT_UGT) yes no) -> (First nil no yes) 627 (ULT (FlagGT_ULT) yes no) -> (First nil yes no) 628 (ULT (FlagGT_UGT) yes no) -> (First nil no yes) 629 630 (ULE (FlagEQ) yes no) -> (First nil yes no) 631 (ULE (FlagLT_ULT) yes no) -> (First nil yes no) 632 (ULE (FlagLT_UGT) yes no) -> (First nil no yes) 633 (ULE (FlagGT_ULT) yes no) -> (First nil yes no) 634 (ULE (FlagGT_UGT) yes no) -> (First nil no yes) 635 636 (UGT (FlagEQ) yes no) -> (First nil no yes) 637 (UGT (FlagLT_ULT) yes no) -> (First nil no yes) 638 (UGT (FlagLT_UGT) yes no) -> (First nil yes no) 639 (UGT (FlagGT_ULT) yes no) -> (First nil no yes) 640 (UGT (FlagGT_UGT) yes no) -> (First nil yes no) 641 642 (UGE (FlagEQ) yes no) -> (First nil yes no) 643 (UGE (FlagLT_ULT) yes no) -> (First nil no yes) 644 (UGE (FlagLT_UGT) yes no) -> (First nil yes no) 645 (UGE (FlagGT_ULT) yes no) -> (First nil no yes) 646 (UGE (FlagGT_UGT) yes no) -> (First nil yes no) 647 648 // absorb InvertFlags into branches 649 (LT (InvertFlags cmp) yes no) -> (GT cmp yes no) 650 (GT (InvertFlags cmp) yes no) -> (LT cmp yes no) 651 (LE (InvertFlags cmp) yes no) -> (GE cmp yes no) 652 (GE (InvertFlags cmp) yes no) -> (LE cmp yes no) 653 (ULT (InvertFlags cmp) yes no) -> (UGT cmp yes no) 654 (UGT (InvertFlags cmp) yes no) -> (ULT cmp yes no) 655 (ULE (InvertFlags cmp) yes no) -> (UGE cmp yes no) 656 (UGE (InvertFlags cmp) yes no) -> (ULE cmp yes no) 657 (EQ (InvertFlags cmp) yes no) -> (EQ cmp yes no) 658 (NE (InvertFlags cmp) yes no) -> (NE cmp yes no) 659 660 // absorb flag constants into boolean values 661 (Equal (FlagEQ)) -> (MOVWconst [1]) 662 (Equal (FlagLT_ULT)) -> (MOVWconst [0]) 663 (Equal (FlagLT_UGT)) -> (MOVWconst [0]) 664 (Equal (FlagGT_ULT)) -> (MOVWconst [0]) 665 (Equal (FlagGT_UGT)) -> (MOVWconst [0]) 666 667 (NotEqual (FlagEQ)) -> (MOVWconst [0]) 668 (NotEqual (FlagLT_ULT)) -> (MOVWconst [1]) 669 (NotEqual (FlagLT_UGT)) -> (MOVWconst [1]) 670 (NotEqual (FlagGT_ULT)) -> (MOVWconst [1]) 671 (NotEqual (FlagGT_UGT)) -> (MOVWconst [1]) 672 673 (LessThan (FlagEQ)) -> (MOVWconst [0]) 674 (LessThan (FlagLT_ULT)) -> (MOVWconst [1]) 675 (LessThan (FlagLT_UGT)) -> (MOVWconst [1]) 676 (LessThan (FlagGT_ULT)) -> (MOVWconst [0]) 677 (LessThan (FlagGT_UGT)) -> (MOVWconst [0]) 678 679 (LessThanU (FlagEQ)) -> (MOVWconst [0]) 680 (LessThanU (FlagLT_ULT)) -> (MOVWconst [1]) 681 (LessThanU (FlagLT_UGT)) -> (MOVWconst [0]) 682 (LessThanU (FlagGT_ULT)) -> (MOVWconst [1]) 683 (LessThanU (FlagGT_UGT)) -> (MOVWconst [0]) 684 685 (LessEqual (FlagEQ)) -> (MOVWconst [1]) 686 (LessEqual (FlagLT_ULT)) -> (MOVWconst [1]) 687 (LessEqual (FlagLT_UGT)) -> (MOVWconst [1]) 688 (LessEqual (FlagGT_ULT)) -> (MOVWconst [0]) 689 (LessEqual (FlagGT_UGT)) -> (MOVWconst [0]) 690 691 (LessEqualU (FlagEQ)) -> (MOVWconst [1]) 692 (LessEqualU (FlagLT_ULT)) -> (MOVWconst [1]) 693 (LessEqualU (FlagLT_UGT)) -> (MOVWconst [0]) 694 (LessEqualU (FlagGT_ULT)) -> (MOVWconst [1]) 695 (LessEqualU (FlagGT_UGT)) -> (MOVWconst [0]) 696 697 (GreaterThan (FlagEQ)) -> (MOVWconst [0]) 698 (GreaterThan (FlagLT_ULT)) -> (MOVWconst [0]) 699 (GreaterThan (FlagLT_UGT)) -> (MOVWconst [0]) 700 (GreaterThan (FlagGT_ULT)) -> (MOVWconst [1]) 701 (GreaterThan (FlagGT_UGT)) -> (MOVWconst [1]) 702 703 (GreaterThanU (FlagEQ)) -> (MOVWconst [0]) 704 (GreaterThanU (FlagLT_ULT)) -> (MOVWconst [0]) 705 (GreaterThanU (FlagLT_UGT)) -> (MOVWconst [1]) 706 (GreaterThanU (FlagGT_ULT)) -> (MOVWconst [0]) 707 (GreaterThanU (FlagGT_UGT)) -> (MOVWconst [1]) 708 709 (GreaterEqual (FlagEQ)) -> (MOVWconst [1]) 710 (GreaterEqual (FlagLT_ULT)) -> (MOVWconst [0]) 711 (GreaterEqual (FlagLT_UGT)) -> (MOVWconst [0]) 712 (GreaterEqual (FlagGT_ULT)) -> (MOVWconst [1]) 713 (GreaterEqual (FlagGT_UGT)) -> (MOVWconst [1]) 714 715 (GreaterEqualU (FlagEQ)) -> (MOVWconst [1]) 716 (GreaterEqualU (FlagLT_ULT)) -> (MOVWconst [0]) 717 (GreaterEqualU (FlagLT_UGT)) -> (MOVWconst [1]) 718 (GreaterEqualU (FlagGT_ULT)) -> (MOVWconst [0]) 719 (GreaterEqualU (FlagGT_UGT)) -> (MOVWconst [1]) 720 721 // absorb InvertFlags into boolean values 722 (Equal (InvertFlags x)) -> (Equal x) 723 (NotEqual (InvertFlags x)) -> (NotEqual x) 724 (LessThan (InvertFlags x)) -> (GreaterThan x) 725 (LessThanU (InvertFlags x)) -> (GreaterThanU x) 726 (GreaterThan (InvertFlags x)) -> (LessThan x) 727 (GreaterThanU (InvertFlags x)) -> (LessThanU x) 728 (LessEqual (InvertFlags x)) -> (GreaterEqual x) 729 (LessEqualU (InvertFlags x)) -> (GreaterEqualU x) 730 (GreaterEqual (InvertFlags x)) -> (LessEqual x) 731 (GreaterEqualU (InvertFlags x)) -> (LessEqualU x) 732 733 // absorb flag constants into conditional instructions 734 (CMOVWLSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) 735 (CMOVWLSconst _ (FlagLT_ULT) [c]) -> (MOVWconst [c]) 736 (CMOVWLSconst x (FlagLT_UGT)) -> x 737 (CMOVWLSconst _ (FlagGT_ULT) [c]) -> (MOVWconst [c]) 738 (CMOVWLSconst x (FlagGT_UGT)) -> x 739 740 (CMOVWHSconst _ (FlagEQ) [c]) -> (MOVWconst [c]) 741 (CMOVWHSconst x (FlagLT_ULT)) -> x 742 (CMOVWHSconst _ (FlagLT_UGT) [c]) -> (MOVWconst [c]) 743 (CMOVWHSconst x (FlagGT_ULT)) -> x 744 (CMOVWHSconst _ (FlagGT_UGT) [c]) -> (MOVWconst [c]) 745 746 (CMOVWLSconst x (InvertFlags flags) [c]) -> (CMOVWHSconst x flags [c]) 747 (CMOVWHSconst x (InvertFlags flags) [c]) -> (CMOVWLSconst x flags [c]) 748 749 (SRAcond x _ (FlagEQ)) -> (SRAconst x [31]) 750 (SRAcond x y (FlagLT_ULT)) -> (SRA x y) 751 (SRAcond x _ (FlagLT_UGT)) -> (SRAconst x [31]) 752 (SRAcond x y (FlagGT_ULT)) -> (SRA x y) 753 (SRAcond x _ (FlagGT_UGT)) -> (SRAconst x [31]) 754 755 // remove redundant *const ops 756 (ADDconst [0] x) -> x 757 (SUBconst [0] x) -> x 758 (ANDconst [0] _) -> (MOVWconst [0]) 759 (ANDconst [c] x) && int32(c)==-1 -> x 760 (ORconst [0] x) -> x 761 (ORconst [c] _) && int32(c)==-1 -> (MOVWconst [-1]) 762 (XORconst [0] x) -> x 763 (BICconst [0] x) -> x 764 (BICconst [c] _) && int32(c)==-1 -> (MOVWconst [0]) 765 766 // generic constant folding 767 (ADDconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c+d))]) 768 (ADDconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(c+d))] x) 769 (ADDconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) 770 (ADDconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) 771 (ADCconst [c] (ADDconst [d] x) flags) -> (ADCconst [int64(int32(c+d))] x flags) 772 (ADCconst [c] (SUBconst [d] x) flags) -> (ADCconst [int64(int32(c-d))] x flags) 773 (SUBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d-c))]) 774 (SUBconst [c] (SUBconst [d] x)) -> (ADDconst [int64(int32(-c-d))] x) 775 (SUBconst [c] (ADDconst [d] x)) -> (ADDconst [int64(int32(-c+d))] x) 776 (SUBconst [c] (RSBconst [d] x)) -> (RSBconst [int64(int32(-c+d))] x) 777 (SBCconst [c] (ADDconst [d] x) flags) -> (SBCconst [int64(int32(c-d))] x flags) 778 (SBCconst [c] (SUBconst [d] x) flags) -> (SBCconst [int64(int32(c+d))] x flags) 779 (RSBconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(c-d))]) 780 (RSBconst [c] (RSBconst [d] x)) -> (ADDconst [int64(int32(c-d))] x) 781 (RSBconst [c] (ADDconst [d] x)) -> (RSBconst [int64(int32(c-d))] x) 782 (RSBconst [c] (SUBconst [d] x)) -> (RSBconst [int64(int32(c+d))] x) 783 (RSCconst [c] (ADDconst [d] x) flags) -> (RSCconst [int64(int32(c-d))] x flags) 784 (RSCconst [c] (SUBconst [d] x) flags) -> (RSCconst [int64(int32(c+d))] x flags) 785 (SLLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)<<uint64(c))]) 786 (SRLconst [c] (MOVWconst [d])) -> (MOVWconst [int64(uint32(d)>>uint64(c))]) 787 (SRAconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d)>>uint64(c))]) 788 (MUL (MOVWconst [c]) (MOVWconst [d])) -> (MOVWconst [int64(int32(c*d))]) 789 (MULA (MOVWconst [c]) (MOVWconst [d]) a) -> (ADDconst [int64(int32(c*d))] a) 790 (DIV (MOVWconst [c]) (MOVWconst [d])) -> (MOVWconst [int64(int32(c)/int32(d))]) 791 (DIVU (MOVWconst [c]) (MOVWconst [d])) -> (MOVWconst [int64(uint32(c)/uint32(d))]) 792 (ANDconst [c] (MOVWconst [d])) -> (MOVWconst [c&d]) 793 (ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x) 794 (ORconst [c] (MOVWconst [d])) -> (MOVWconst [c|d]) 795 (ORconst [c] (ORconst [d] x)) -> (ORconst [c|d] x) 796 (XORconst [c] (MOVWconst [d])) -> (MOVWconst [c^d]) 797 (XORconst [c] (XORconst [d] x)) -> (XORconst [c^d] x) 798 (BICconst [c] (MOVWconst [d])) -> (MOVWconst [d&^c]) 799 (MVN (MOVWconst [c])) -> (MOVWconst [^c]) 800 (MOVBreg (MOVWconst [c])) -> (MOVWconst [int64(int8(c))]) 801 (MOVBUreg (MOVWconst [c])) -> (MOVWconst [int64(uint8(c))]) 802 (MOVHreg (MOVWconst [c])) -> (MOVWconst [int64(int16(c))]) 803 (MOVHUreg (MOVWconst [c])) -> (MOVWconst [int64(uint16(c))]) 804 (MOVWreg (MOVWconst [c])) -> (MOVWconst [c]) 805 806 // absorb shifts into ops 807 (ADD x (SLLconst [c] y)) -> (ADDshiftLL x y [c]) 808 (ADD (SLLconst [c] y) x) -> (ADDshiftLL x y [c]) 809 (ADD x (SRLconst [c] y)) -> (ADDshiftRL x y [c]) 810 (ADD (SRLconst [c] y) x) -> (ADDshiftRL x y [c]) 811 (ADD x (SRAconst [c] y)) -> (ADDshiftRA x y [c]) 812 (ADD (SRAconst [c] y) x) -> (ADDshiftRA x y [c]) 813 (ADD x (SLL y z)) -> (ADDshiftLLreg x y z) 814 (ADD (SLL y z) x) -> (ADDshiftLLreg x y z) 815 (ADD x (SRL y z)) -> (ADDshiftRLreg x y z) 816 (ADD (SRL y z) x) -> (ADDshiftRLreg x y z) 817 (ADD x (SRA y z)) -> (ADDshiftRAreg x y z) 818 (ADD (SRA y z) x) -> (ADDshiftRAreg x y z) 819 (ADC x (SLLconst [c] y) flags) -> (ADCshiftLL x y [c] flags) 820 (ADC (SLLconst [c] y) x flags) -> (ADCshiftLL x y [c] flags) 821 (ADC x (SRLconst [c] y) flags) -> (ADCshiftRL x y [c] flags) 822 (ADC (SRLconst [c] y) x flags) -> (ADCshiftRL x y [c] flags) 823 (ADC x (SRAconst [c] y) flags) -> (ADCshiftRA x y [c] flags) 824 (ADC (SRAconst [c] y) x flags) -> (ADCshiftRA x y [c] flags) 825 (ADC x (SLL y z) flags) -> (ADCshiftLLreg x y z flags) 826 (ADC (SLL y z) x flags) -> (ADCshiftLLreg x y z flags) 827 (ADC x (SRL y z) flags) -> (ADCshiftRLreg x y z flags) 828 (ADC (SRL y z) x flags) -> (ADCshiftRLreg x y z flags) 829 (ADC x (SRA y z) flags) -> (ADCshiftRAreg x y z flags) 830 (ADC (SRA y z) x flags) -> (ADCshiftRAreg x y z flags) 831 (ADDS x (SLLconst [c] y)) -> (ADDSshiftLL x y [c]) 832 (ADDS (SLLconst [c] y) x) -> (ADDSshiftLL x y [c]) 833 (ADDS x (SRLconst [c] y)) -> (ADDSshiftRL x y [c]) 834 (ADDS (SRLconst [c] y) x) -> (ADDSshiftRL x y [c]) 835 (ADDS x (SRAconst [c] y)) -> (ADDSshiftRA x y [c]) 836 (ADDS (SRAconst [c] y) x) -> (ADDSshiftRA x y [c]) 837 (ADDS x (SLL y z)) -> (ADDSshiftLLreg x y z) 838 (ADDS (SLL y z) x) -> (ADDSshiftLLreg x y z) 839 (ADDS x (SRL y z)) -> (ADDSshiftRLreg x y z) 840 (ADDS (SRL y z) x) -> (ADDSshiftRLreg x y z) 841 (ADDS x (SRA y z)) -> (ADDSshiftRAreg x y z) 842 (ADDS (SRA y z) x) -> (ADDSshiftRAreg x y z) 843 (SUB x (SLLconst [c] y)) -> (SUBshiftLL x y [c]) 844 (SUB (SLLconst [c] y) x) -> (RSBshiftLL x y [c]) 845 (SUB x (SRLconst [c] y)) -> (SUBshiftRL x y [c]) 846 (SUB (SRLconst [c] y) x) -> (RSBshiftRL x y [c]) 847 (SUB x (SRAconst [c] y)) -> (SUBshiftRA x y [c]) 848 (SUB (SRAconst [c] y) x) -> (RSBshiftRA x y [c]) 849 (SUB x (SLL y z)) -> (SUBshiftLLreg x y z) 850 (SUB (SLL y z) x) -> (RSBshiftLLreg x y z) 851 (SUB x (SRL y z)) -> (SUBshiftRLreg x y z) 852 (SUB (SRL y z) x) -> (RSBshiftRLreg x y z) 853 (SUB x (SRA y z)) -> (SUBshiftRAreg x y z) 854 (SUB (SRA y z) x) -> (RSBshiftRAreg x y z) 855 (SBC x (SLLconst [c] y) flags) -> (SBCshiftLL x y [c] flags) 856 (SBC (SLLconst [c] y) x flags) -> (RSCshiftLL x y [c] flags) 857 (SBC x (SRLconst [c] y) flags) -> (SBCshiftRL x y [c] flags) 858 (SBC (SRLconst [c] y) x flags) -> (RSCshiftRL x y [c] flags) 859 (SBC x (SRAconst [c] y) flags) -> (SBCshiftRA x y [c] flags) 860 (SBC (SRAconst [c] y) x flags) -> (RSCshiftRA x y [c] flags) 861 (SBC x (SLL y z) flags) -> (SBCshiftLLreg x y z flags) 862 (SBC (SLL y z) x flags) -> (RSCshiftLLreg x y z flags) 863 (SBC x (SRL y z) flags) -> (SBCshiftRLreg x y z flags) 864 (SBC (SRL y z) x flags) -> (RSCshiftRLreg x y z flags) 865 (SBC x (SRA y z) flags) -> (SBCshiftRAreg x y z flags) 866 (SBC (SRA y z) x flags) -> (RSCshiftRAreg x y z flags) 867 (SUBS x (SLLconst [c] y)) -> (SUBSshiftLL x y [c]) 868 (SUBS (SLLconst [c] y) x) -> (RSBSshiftLL x y [c]) 869 (SUBS x (SRLconst [c] y)) -> (SUBSshiftRL x y [c]) 870 (SUBS (SRLconst [c] y) x) -> (RSBSshiftRL x y [c]) 871 (SUBS x (SRAconst [c] y)) -> (SUBSshiftRA x y [c]) 872 (SUBS (SRAconst [c] y) x) -> (RSBSshiftRA x y [c]) 873 (SUBS x (SLL y z)) -> (SUBSshiftLLreg x y z) 874 (SUBS (SLL y z) x) -> (RSBSshiftLLreg x y z) 875 (SUBS x (SRL y z)) -> (SUBSshiftRLreg x y z) 876 (SUBS (SRL y z) x) -> (RSBSshiftRLreg x y z) 877 (SUBS x (SRA y z)) -> (SUBSshiftRAreg x y z) 878 (SUBS (SRA y z) x) -> (RSBSshiftRAreg x y z) 879 (RSB x (SLLconst [c] y)) -> (RSBshiftLL x y [c]) 880 (RSB (SLLconst [c] y) x) -> (SUBshiftLL x y [c]) 881 (RSB x (SRLconst [c] y)) -> (RSBshiftRL x y [c]) 882 (RSB (SRLconst [c] y) x) -> (SUBshiftRL x y [c]) 883 (RSB x (SRAconst [c] y)) -> (RSBshiftRA x y [c]) 884 (RSB (SRAconst [c] y) x) -> (SUBshiftRA x y [c]) 885 (RSB x (SLL y z)) -> (RSBshiftLLreg x y z) 886 (RSB (SLL y z) x) -> (SUBshiftLLreg x y z) 887 (RSB x (SRL y z)) -> (RSBshiftRLreg x y z) 888 (RSB (SRL y z) x) -> (SUBshiftRLreg x y z) 889 (RSB x (SRA y z)) -> (RSBshiftRAreg x y z) 890 (RSB (SRA y z) x) -> (SUBshiftRAreg x y z) 891 (AND x (SLLconst [c] y)) -> (ANDshiftLL x y [c]) 892 (AND (SLLconst [c] y) x) -> (ANDshiftLL x y [c]) 893 (AND x (SRLconst [c] y)) -> (ANDshiftRL x y [c]) 894 (AND (SRLconst [c] y) x) -> (ANDshiftRL x y [c]) 895 (AND x (SRAconst [c] y)) -> (ANDshiftRA x y [c]) 896 (AND (SRAconst [c] y) x) -> (ANDshiftRA x y [c]) 897 (AND x (SLL y z)) -> (ANDshiftLLreg x y z) 898 (AND (SLL y z) x) -> (ANDshiftLLreg x y z) 899 (AND x (SRL y z)) -> (ANDshiftRLreg x y z) 900 (AND (SRL y z) x) -> (ANDshiftRLreg x y z) 901 (AND x (SRA y z)) -> (ANDshiftRAreg x y z) 902 (AND (SRA y z) x) -> (ANDshiftRAreg x y z) 903 (OR x (SLLconst [c] y)) -> (ORshiftLL x y [c]) 904 (OR (SLLconst [c] y) x) -> (ORshiftLL x y [c]) 905 (OR x (SRLconst [c] y)) -> (ORshiftRL x y [c]) 906 (OR (SRLconst [c] y) x) -> (ORshiftRL x y [c]) 907 (OR x (SRAconst [c] y)) -> (ORshiftRA x y [c]) 908 (OR (SRAconst [c] y) x) -> (ORshiftRA x y [c]) 909 (OR x (SLL y z)) -> (ORshiftLLreg x y z) 910 (OR (SLL y z) x) -> (ORshiftLLreg x y z) 911 (OR x (SRL y z)) -> (ORshiftRLreg x y z) 912 (OR (SRL y z) x) -> (ORshiftRLreg x y z) 913 (OR x (SRA y z)) -> (ORshiftRAreg x y z) 914 (OR (SRA y z) x) -> (ORshiftRAreg x y z) 915 (XOR x (SLLconst [c] y)) -> (XORshiftLL x y [c]) 916 (XOR (SLLconst [c] y) x) -> (XORshiftLL x y [c]) 917 (XOR x (SRLconst [c] y)) -> (XORshiftRL x y [c]) 918 (XOR (SRLconst [c] y) x) -> (XORshiftRL x y [c]) 919 (XOR x (SRAconst [c] y)) -> (XORshiftRA x y [c]) 920 (XOR (SRAconst [c] y) x) -> (XORshiftRA x y [c]) 921 (XOR x (SLL y z)) -> (XORshiftLLreg x y z) 922 (XOR (SLL y z) x) -> (XORshiftLLreg x y z) 923 (XOR x (SRL y z)) -> (XORshiftRLreg x y z) 924 (XOR (SRL y z) x) -> (XORshiftRLreg x y z) 925 (XOR x (SRA y z)) -> (XORshiftRAreg x y z) 926 (XOR (SRA y z) x) -> (XORshiftRAreg x y z) 927 (BIC x (SLLconst [c] y)) -> (BICshiftLL x y [c]) 928 (BIC x (SRLconst [c] y)) -> (BICshiftRL x y [c]) 929 (BIC x (SRAconst [c] y)) -> (BICshiftRA x y [c]) 930 (BIC x (SLL y z)) -> (BICshiftLLreg x y z) 931 (BIC x (SRL y z)) -> (BICshiftRLreg x y z) 932 (BIC x (SRA y z)) -> (BICshiftRAreg x y z) 933 (MVN (SLLconst [c] x)) -> (MVNshiftLL x [c]) 934 (MVN (SRLconst [c] x)) -> (MVNshiftRL x [c]) 935 (MVN (SRAconst [c] x)) -> (MVNshiftRA x [c]) 936 (MVN (SLL x y)) -> (MVNshiftLLreg x y) 937 (MVN (SRL x y)) -> (MVNshiftRLreg x y) 938 (MVN (SRA x y)) -> (MVNshiftRAreg x y) 939 940 (CMP x (SLLconst [c] y)) -> (CMPshiftLL x y [c]) 941 (CMP (SLLconst [c] y) x) -> (InvertFlags (CMPshiftLL x y [c])) 942 (CMP x (SRLconst [c] y)) -> (CMPshiftRL x y [c]) 943 (CMP (SRLconst [c] y) x) -> (InvertFlags (CMPshiftRL x y [c])) 944 (CMP x (SRAconst [c] y)) -> (CMPshiftRA x y [c]) 945 (CMP (SRAconst [c] y) x) -> (InvertFlags (CMPshiftRA x y [c])) 946 (CMP x (SLL y z)) -> (CMPshiftLLreg x y z) 947 (CMP (SLL y z) x) -> (InvertFlags (CMPshiftLLreg x y z)) 948 (CMP x (SRL y z)) -> (CMPshiftRLreg x y z) 949 (CMP (SRL y z) x) -> (InvertFlags (CMPshiftRLreg x y z)) 950 (CMP x (SRA y z)) -> (CMPshiftRAreg x y z) 951 (CMP (SRA y z) x) -> (InvertFlags (CMPshiftRAreg x y z)) 952 953 // prefer *const ops to *shift ops 954 (ADDshiftLL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SLLconst <x.Type> x [d])) 955 (ADDshiftRL (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRLconst <x.Type> x [d])) 956 (ADDshiftRA (MOVWconst [c]) x [d]) -> (ADDconst [c] (SRAconst <x.Type> x [d])) 957 (ADCshiftLL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SLLconst <x.Type> x [d]) flags) 958 (ADCshiftRL (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRLconst <x.Type> x [d]) flags) 959 (ADCshiftRA (MOVWconst [c]) x [d] flags) -> (ADCconst [c] (SRAconst <x.Type> x [d]) flags) 960 (ADDSshiftLL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SLLconst <x.Type> x [d])) 961 (ADDSshiftRL (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRLconst <x.Type> x [d])) 962 (ADDSshiftRA (MOVWconst [c]) x [d]) -> (ADDSconst [c] (SRAconst <x.Type> x [d])) 963 (SUBshiftLL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SLLconst <x.Type> x [d])) 964 (SUBshiftRL (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRLconst <x.Type> x [d])) 965 (SUBshiftRA (MOVWconst [c]) x [d]) -> (RSBconst [c] (SRAconst <x.Type> x [d])) 966 (SBCshiftLL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SLLconst <x.Type> x [d]) flags) 967 (SBCshiftRL (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRLconst <x.Type> x [d]) flags) 968 (SBCshiftRA (MOVWconst [c]) x [d] flags) -> (RSCconst [c] (SRAconst <x.Type> x [d]) flags) 969 (SUBSshiftLL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SLLconst <x.Type> x [d])) 970 (SUBSshiftRL (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRLconst <x.Type> x [d])) 971 (SUBSshiftRA (MOVWconst [c]) x [d]) -> (RSBSconst [c] (SRAconst <x.Type> x [d])) 972 (RSBshiftLL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SLLconst <x.Type> x [d])) 973 (RSBshiftRL (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRLconst <x.Type> x [d])) 974 (RSBshiftRA (MOVWconst [c]) x [d]) -> (SUBconst [c] (SRAconst <x.Type> x [d])) 975 (RSCshiftLL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SLLconst <x.Type> x [d]) flags) 976 (RSCshiftRL (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRLconst <x.Type> x [d]) flags) 977 (RSCshiftRA (MOVWconst [c]) x [d] flags) -> (SBCconst [c] (SRAconst <x.Type> x [d]) flags) 978 (RSBSshiftLL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SLLconst <x.Type> x [d])) 979 (RSBSshiftRL (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRLconst <x.Type> x [d])) 980 (RSBSshiftRA (MOVWconst [c]) x [d]) -> (SUBSconst [c] (SRAconst <x.Type> x [d])) 981 (ANDshiftLL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SLLconst <x.Type> x [d])) 982 (ANDshiftRL (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRLconst <x.Type> x [d])) 983 (ANDshiftRA (MOVWconst [c]) x [d]) -> (ANDconst [c] (SRAconst <x.Type> x [d])) 984 (ORshiftLL (MOVWconst [c]) x [d]) -> (ORconst [c] (SLLconst <x.Type> x [d])) 985 (ORshiftRL (MOVWconst [c]) x [d]) -> (ORconst [c] (SRLconst <x.Type> x [d])) 986 (ORshiftRA (MOVWconst [c]) x [d]) -> (ORconst [c] (SRAconst <x.Type> x [d])) 987 (XORshiftLL (MOVWconst [c]) x [d]) -> (XORconst [c] (SLLconst <x.Type> x [d])) 988 (XORshiftRL (MOVWconst [c]) x [d]) -> (XORconst [c] (SRLconst <x.Type> x [d])) 989 (XORshiftRA (MOVWconst [c]) x [d]) -> (XORconst [c] (SRAconst <x.Type> x [d])) 990 (CMPshiftLL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d]))) 991 (CMPshiftRL (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d]))) 992 (CMPshiftRA (MOVWconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d]))) 993 994 (ADDshiftLLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SLL <x.Type> x y)) 995 (ADDshiftRLreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRL <x.Type> x y)) 996 (ADDshiftRAreg (MOVWconst [c]) x y) -> (ADDconst [c] (SRA <x.Type> x y)) 997 (ADCshiftLLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SLL <x.Type> x y) flags) 998 (ADCshiftRLreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRL <x.Type> x y) flags) 999 (ADCshiftRAreg (MOVWconst [c]) x y flags) -> (ADCconst [c] (SRA <x.Type> x y) flags) 1000 (ADDSshiftLLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SLL <x.Type> x y)) 1001 (ADDSshiftRLreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRL <x.Type> x y)) 1002 (ADDSshiftRAreg (MOVWconst [c]) x y) -> (ADDSconst [c] (SRA <x.Type> x y)) 1003 (SUBshiftLLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SLL <x.Type> x y)) 1004 (SUBshiftRLreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRL <x.Type> x y)) 1005 (SUBshiftRAreg (MOVWconst [c]) x y) -> (RSBconst [c] (SRA <x.Type> x y)) 1006 (SBCshiftLLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SLL <x.Type> x y) flags) 1007 (SBCshiftRLreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRL <x.Type> x y) flags) 1008 (SBCshiftRAreg (MOVWconst [c]) x y flags) -> (RSCconst [c] (SRA <x.Type> x y) flags) 1009 (SUBSshiftLLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SLL <x.Type> x y)) 1010 (SUBSshiftRLreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRL <x.Type> x y)) 1011 (SUBSshiftRAreg (MOVWconst [c]) x y) -> (RSBSconst [c] (SRA <x.Type> x y)) 1012 (RSBshiftLLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SLL <x.Type> x y)) 1013 (RSBshiftRLreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRL <x.Type> x y)) 1014 (RSBshiftRAreg (MOVWconst [c]) x y) -> (SUBconst [c] (SRA <x.Type> x y)) 1015 (RSCshiftLLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SLL <x.Type> x y) flags) 1016 (RSCshiftRLreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRL <x.Type> x y) flags) 1017 (RSCshiftRAreg (MOVWconst [c]) x y flags) -> (SBCconst [c] (SRA <x.Type> x y) flags) 1018 (RSBSshiftLLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SLL <x.Type> x y)) 1019 (RSBSshiftRLreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRL <x.Type> x y)) 1020 (RSBSshiftRAreg (MOVWconst [c]) x y) -> (SUBSconst [c] (SRA <x.Type> x y)) 1021 (ANDshiftLLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SLL <x.Type> x y)) 1022 (ANDshiftRLreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRL <x.Type> x y)) 1023 (ANDshiftRAreg (MOVWconst [c]) x y) -> (ANDconst [c] (SRA <x.Type> x y)) 1024 (ORshiftLLreg (MOVWconst [c]) x y) -> (ORconst [c] (SLL <x.Type> x y)) 1025 (ORshiftRLreg (MOVWconst [c]) x y) -> (ORconst [c] (SRL <x.Type> x y)) 1026 (ORshiftRAreg (MOVWconst [c]) x y) -> (ORconst [c] (SRA <x.Type> x y)) 1027 (XORshiftLLreg (MOVWconst [c]) x y) -> (XORconst [c] (SLL <x.Type> x y)) 1028 (XORshiftRLreg (MOVWconst [c]) x y) -> (XORconst [c] (SRL <x.Type> x y)) 1029 (XORshiftRAreg (MOVWconst [c]) x y) -> (XORconst [c] (SRA <x.Type> x y)) 1030 (CMPshiftLLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SLL <x.Type> x y))) 1031 (CMPshiftRLreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRL <x.Type> x y))) 1032 (CMPshiftRAreg (MOVWconst [c]) x y) -> (InvertFlags (CMPconst [c] (SRA <x.Type> x y))) 1033 1034 // constant folding in *shift ops 1035 (ADDshiftLL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(uint32(c)<<uint64(d))]) 1036 (ADDshiftRL x (MOVWconst [c]) [d]) -> (ADDconst x [int64(uint32(c)>>uint64(d))]) 1037 (ADDshiftRA x (MOVWconst [c]) [d]) -> (ADDconst x [int64(int32(c)>>uint64(d))]) 1038 (ADCshiftLL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(uint32(c)<<uint64(d))] flags) 1039 (ADCshiftRL x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(uint32(c)>>uint64(d))] flags) 1040 (ADCshiftRA x (MOVWconst [c]) [d] flags) -> (ADCconst x [int64(int32(c)>>uint64(d))] flags) 1041 (ADDSshiftLL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(uint32(c)<<uint64(d))]) 1042 (ADDSshiftRL x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(uint32(c)>>uint64(d))]) 1043 (ADDSshiftRA x (MOVWconst [c]) [d]) -> (ADDSconst x [int64(int32(c)>>uint64(d))]) 1044 (SUBshiftLL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(uint32(c)<<uint64(d))]) 1045 (SUBshiftRL x (MOVWconst [c]) [d]) -> (SUBconst x [int64(uint32(c)>>uint64(d))]) 1046 (SUBshiftRA x (MOVWconst [c]) [d]) -> (SUBconst x [int64(int32(c)>>uint64(d))]) 1047 (SBCshiftLL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(uint32(c)<<uint64(d))] flags) 1048 (SBCshiftRL x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(uint32(c)>>uint64(d))] flags) 1049 (SBCshiftRA x (MOVWconst [c]) [d] flags) -> (SBCconst x [int64(int32(c)>>uint64(d))] flags) 1050 (SUBSshiftLL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(uint32(c)<<uint64(d))]) 1051 (SUBSshiftRL x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(uint32(c)>>uint64(d))]) 1052 (SUBSshiftRA x (MOVWconst [c]) [d]) -> (SUBSconst x [int64(int32(c)>>uint64(d))]) 1053 (RSBshiftLL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(uint32(c)<<uint64(d))]) 1054 (RSBshiftRL x (MOVWconst [c]) [d]) -> (RSBconst x [int64(uint32(c)>>uint64(d))]) 1055 (RSBshiftRA x (MOVWconst [c]) [d]) -> (RSBconst x [int64(int32(c)>>uint64(d))]) 1056 (RSCshiftLL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(uint32(c)<<uint64(d))] flags) 1057 (RSCshiftRL x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(uint32(c)>>uint64(d))] flags) 1058 (RSCshiftRA x (MOVWconst [c]) [d] flags) -> (RSCconst x [int64(int32(c)>>uint64(d))] flags) 1059 (RSBSshiftLL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(uint32(c)<<uint64(d))]) 1060 (RSBSshiftRL x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(uint32(c)>>uint64(d))]) 1061 (RSBSshiftRA x (MOVWconst [c]) [d]) -> (RSBSconst x [int64(int32(c)>>uint64(d))]) 1062 (ANDshiftLL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(uint32(c)<<uint64(d))]) 1063 (ANDshiftRL x (MOVWconst [c]) [d]) -> (ANDconst x [int64(uint32(c)>>uint64(d))]) 1064 (ANDshiftRA x (MOVWconst [c]) [d]) -> (ANDconst x [int64(int32(c)>>uint64(d))]) 1065 (ORshiftLL x (MOVWconst [c]) [d]) -> (ORconst x [int64(uint32(c)<<uint64(d))]) 1066 (ORshiftRL x (MOVWconst [c]) [d]) -> (ORconst x [int64(uint32(c)>>uint64(d))]) 1067 (ORshiftRA x (MOVWconst [c]) [d]) -> (ORconst x [int64(int32(c)>>uint64(d))]) 1068 (XORshiftLL x (MOVWconst [c]) [d]) -> (XORconst x [int64(uint32(c)<<uint64(d))]) 1069 (XORshiftRL x (MOVWconst [c]) [d]) -> (XORconst x [int64(uint32(c)>>uint64(d))]) 1070 (XORshiftRA x (MOVWconst [c]) [d]) -> (XORconst x [int64(int32(c)>>uint64(d))]) 1071 (BICshiftLL x (MOVWconst [c]) [d]) -> (BICconst x [int64(uint32(c)<<uint64(d))]) 1072 (BICshiftRL x (MOVWconst [c]) [d]) -> (BICconst x [int64(uint32(c)>>uint64(d))]) 1073 (BICshiftRA x (MOVWconst [c]) [d]) -> (BICconst x [int64(int32(c)>>uint64(d))]) 1074 (MVNshiftLL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)<<uint64(d))]) 1075 (MVNshiftRL (MOVWconst [c]) [d]) -> (MOVWconst [^int64(uint32(c)>>uint64(d))]) 1076 (MVNshiftRA (MOVWconst [c]) [d]) -> (MOVWconst [^int64(int32(c)>>uint64(d))]) 1077 (CMPshiftLL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(uint32(c)<<uint64(d))]) 1078 (CMPshiftRL x (MOVWconst [c]) [d]) -> (CMPconst x [int64(uint32(c)>>uint64(d))]) 1079 (CMPshiftRA x (MOVWconst [c]) [d]) -> (CMPconst x [int64(int32(c)>>uint64(d))]) 1080 1081 (ADDshiftLLreg x y (MOVWconst [c])) -> (ADDshiftLL x y [c]) 1082 (ADDshiftRLreg x y (MOVWconst [c])) -> (ADDshiftRL x y [c]) 1083 (ADDshiftRAreg x y (MOVWconst [c])) -> (ADDshiftRA x y [c]) 1084 (ADCshiftLLreg x y (MOVWconst [c]) flags) -> (ADCshiftLL x y [c] flags) 1085 (ADCshiftRLreg x y (MOVWconst [c]) flags) -> (ADCshiftRL x y [c] flags) 1086 (ADCshiftRAreg x y (MOVWconst [c]) flags) -> (ADCshiftRA x y [c] flags) 1087 (ADDSshiftLLreg x y (MOVWconst [c])) -> (ADDSshiftLL x y [c]) 1088 (ADDSshiftRLreg x y (MOVWconst [c])) -> (ADDSshiftRL x y [c]) 1089 (ADDSshiftRAreg x y (MOVWconst [c])) -> (ADDSshiftRA x y [c]) 1090 (SUBshiftLLreg x y (MOVWconst [c])) -> (SUBshiftLL x y [c]) 1091 (SUBshiftRLreg x y (MOVWconst [c])) -> (SUBshiftRL x y [c]) 1092 (SUBshiftRAreg x y (MOVWconst [c])) -> (SUBshiftRA x y [c]) 1093 (SBCshiftLLreg x y (MOVWconst [c]) flags) -> (SBCshiftLL x y [c] flags) 1094 (SBCshiftRLreg x y (MOVWconst [c]) flags) -> (SBCshiftRL x y [c] flags) 1095 (SBCshiftRAreg x y (MOVWconst [c]) flags) -> (SBCshiftRA x y [c] flags) 1096 (SUBSshiftLLreg x y (MOVWconst [c])) -> (SUBSshiftLL x y [c]) 1097 (SUBSshiftRLreg x y (MOVWconst [c])) -> (SUBSshiftRL x y [c]) 1098 (SUBSshiftRAreg x y (MOVWconst [c])) -> (SUBSshiftRA x y [c]) 1099 (RSBshiftLLreg x y (MOVWconst [c])) -> (RSBshiftLL x y [c]) 1100 (RSBshiftRLreg x y (MOVWconst [c])) -> (RSBshiftRL x y [c]) 1101 (RSBshiftRAreg x y (MOVWconst [c])) -> (RSBshiftRA x y [c]) 1102 (RSCshiftLLreg x y (MOVWconst [c]) flags) -> (RSCshiftLL x y [c] flags) 1103 (RSCshiftRLreg x y (MOVWconst [c]) flags) -> (RSCshiftRL x y [c] flags) 1104 (RSCshiftRAreg x y (MOVWconst [c]) flags) -> (RSCshiftRA x y [c] flags) 1105 (RSBSshiftLLreg x y (MOVWconst [c])) -> (RSBSshiftLL x y [c]) 1106 (RSBSshiftRLreg x y (MOVWconst [c])) -> (RSBSshiftRL x y [c]) 1107 (RSBSshiftRAreg x y (MOVWconst [c])) -> (RSBSshiftRA x y [c]) 1108 (ANDshiftLLreg x y (MOVWconst [c])) -> (ANDshiftLL x y [c]) 1109 (ANDshiftRLreg x y (MOVWconst [c])) -> (ANDshiftRL x y [c]) 1110 (ANDshiftRAreg x y (MOVWconst [c])) -> (ANDshiftRA x y [c]) 1111 (ORshiftLLreg x y (MOVWconst [c])) -> (ORshiftLL x y [c]) 1112 (ORshiftRLreg x y (MOVWconst [c])) -> (ORshiftRL x y [c]) 1113 (ORshiftRAreg x y (MOVWconst [c])) -> (ORshiftRA x y [c]) 1114 (XORshiftLLreg x y (MOVWconst [c])) -> (XORshiftLL x y [c]) 1115 (XORshiftRLreg x y (MOVWconst [c])) -> (XORshiftRL x y [c]) 1116 (XORshiftRAreg x y (MOVWconst [c])) -> (XORshiftRA x y [c]) 1117 (BICshiftLLreg x y (MOVWconst [c])) -> (BICshiftLL x y [c]) 1118 (BICshiftRLreg x y (MOVWconst [c])) -> (BICshiftRL x y [c]) 1119 (BICshiftRAreg x y (MOVWconst [c])) -> (BICshiftRA x y [c]) 1120 (MVNshiftLLreg x (MOVWconst [c])) -> (MVNshiftLL x [c]) 1121 (MVNshiftRLreg x (MOVWconst [c])) -> (MVNshiftRL x [c]) 1122 (MVNshiftRAreg x (MOVWconst [c])) -> (MVNshiftRA x [c]) 1123 (CMPshiftLLreg x y (MOVWconst [c])) -> (CMPshiftLL x y [c]) 1124 (CMPshiftRLreg x y (MOVWconst [c])) -> (CMPshiftRL x y [c]) 1125 (CMPshiftRAreg x y (MOVWconst [c])) -> (CMPshiftRA x y [c]) 1126 1127 // use indexed loads and stores 1128 (MOVWload [0] {sym} (ADD ptr idx) mem) && sym == nil && !config.nacl -> (MOVWloadidx ptr idx mem) 1129 (MOVWstore [0] {sym} (ADD ptr idx) val mem) && sym == nil && !config.nacl -> (MOVWstoreidx ptr idx val mem) 1130 (MOVWload [0] {sym} (ADDshiftLL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftLL ptr idx [c] mem) 1131 (MOVWload [0] {sym} (ADDshiftRL ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRL ptr idx [c] mem) 1132 (MOVWload [0] {sym} (ADDshiftRA ptr idx [c]) mem) && sym == nil && !config.nacl -> (MOVWloadshiftRA ptr idx [c] mem) 1133 (MOVWstore [0] {sym} (ADDshiftLL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftLL ptr idx [c] val mem) 1134 (MOVWstore [0] {sym} (ADDshiftRL ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRL ptr idx [c] val mem) 1135 (MOVWstore [0] {sym} (ADDshiftRA ptr idx [c]) val mem) && sym == nil && !config.nacl -> (MOVWstoreshiftRA ptr idx [c] val mem) 1136 1137 // constant folding in indexed loads and stores 1138 (MOVWloadidx ptr (MOVWconst [c]) mem) -> (MOVWload [c] ptr mem) 1139 (MOVWloadidx (MOVWconst [c]) ptr mem) -> (MOVWload [c] ptr mem) 1140 1141 (MOVWstoreidx ptr (MOVWconst [c]) val mem) -> (MOVWstore [c] ptr val mem) 1142 (MOVWstoreidx (MOVWconst [c]) ptr val mem) -> (MOVWstore [c] ptr val mem) 1143 1144 (MOVWloadidx ptr (SLLconst idx [c]) mem) -> (MOVWloadshiftLL ptr idx [c] mem) 1145 (MOVWloadidx (SLLconst idx [c]) ptr mem) -> (MOVWloadshiftLL ptr idx [c] mem) 1146 (MOVWloadidx ptr (SRLconst idx [c]) mem) -> (MOVWloadshiftRL ptr idx [c] mem) 1147 (MOVWloadidx (SRLconst idx [c]) ptr mem) -> (MOVWloadshiftRL ptr idx [c] mem) 1148 (MOVWloadidx ptr (SRAconst idx [c]) mem) -> (MOVWloadshiftRA ptr idx [c] mem) 1149 (MOVWloadidx (SRAconst idx [c]) ptr mem) -> (MOVWloadshiftRA ptr idx [c] mem) 1150 1151 (MOVWstoreidx ptr (SLLconst idx [c]) val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) 1152 (MOVWstoreidx (SLLconst idx [c]) ptr val mem) -> (MOVWstoreshiftLL ptr idx [c] val mem) 1153 (MOVWstoreidx ptr (SRLconst idx [c]) val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) 1154 (MOVWstoreidx (SRLconst idx [c]) ptr val mem) -> (MOVWstoreshiftRL ptr idx [c] val mem) 1155 (MOVWstoreidx ptr (SRAconst idx [c]) val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) 1156 (MOVWstoreidx (SRAconst idx [c]) ptr val mem) -> (MOVWstoreshiftRA ptr idx [c] val mem) 1157 1158 (MOVWloadshiftLL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)<<uint64(d))] ptr mem) 1159 (MOVWloadshiftRL ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(uint32(c)>>uint64(d))] ptr mem) 1160 (MOVWloadshiftRA ptr (MOVWconst [c]) [d] mem) -> (MOVWload [int64(int32(c)>>uint64(d))] ptr mem) 1161 1162 (MOVWstoreshiftLL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)<<uint64(d))] ptr val mem) 1163 (MOVWstoreshiftRL ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(uint32(c)>>uint64(d))] ptr val mem) 1164 (MOVWstoreshiftRA ptr (MOVWconst [c]) [d] val mem) -> (MOVWstore [int64(int32(c)>>uint64(d))] ptr val mem) 1165 1166 // generic simplifications 1167 (ADD x (RSBconst [0] y)) -> (SUB x y) 1168 (ADD (RSBconst [0] y) x) -> (SUB x y) 1169 (SUB x x) -> (MOVWconst [0]) 1170 (RSB x x) -> (MOVWconst [0]) 1171 (AND x x) -> x 1172 (OR x x) -> x 1173 (XOR x x) -> (MOVWconst [0]) 1174 (BIC x x) -> (MOVWconst [0]) 1175 1176 (ADD (MUL x y) a) -> (MULA x y a) 1177 (ADD a (MUL x y)) -> (MULA x y a) 1178 1179 (AND x (MVN y)) -> (BIC x y) 1180 1181 // simplification with *shift ops 1182 (SUBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1183 (SUBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1184 (SUBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1185 (RSBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1186 (RSBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1187 (RSBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1188 (ANDshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1189 (ANDshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1190 (ANDshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1191 (ORshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1192 (ORshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1193 (ORshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1194 (XORshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1195 (XORshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1196 (XORshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1197 (BICshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1198 (BICshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1199 (BICshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVWconst [0]) 1200 (AND x (MVNshiftLL y [c])) -> (BICshiftLL x y [c]) 1201 (AND x (MVNshiftRL y [c])) -> (BICshiftRL x y [c]) 1202 (AND x (MVNshiftRA y [c])) -> (BICshiftRA x y [c]) 1203 1204 // floating point optimizations 1205 (CMPF x (MOVFconst [0])) -> (CMPF0 x) 1206 (CMPD x (MOVDconst [0])) -> (CMPD0 x)