github.com/sbinet/go@v0.0.0-20160827155028-54d7de7dd62b/src/cmd/internal/obj/ppc64/a.out.go (about) 1 // cmd/9c/9.out.h from Vita Nuova. 2 // 3 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 4 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 5 // Portions Copyright © 1997-1999 Vita Nuova Limited 6 // Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com) 7 // Portions Copyright © 2004,2006 Bruce Ellis 8 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 9 // Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others 10 // Portions Copyright © 2009 The Go Authors. All rights reserved. 11 // 12 // Permission is hereby granted, free of charge, to any person obtaining a copy 13 // of this software and associated documentation files (the "Software"), to deal 14 // in the Software without restriction, including without limitation the rights 15 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 16 // copies of the Software, and to permit persons to whom the Software is 17 // furnished to do so, subject to the following conditions: 18 // 19 // The above copyright notice and this permission notice shall be included in 20 // all copies or substantial portions of the Software. 21 // 22 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 25 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 27 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 28 // THE SOFTWARE. 29 30 package ppc64 31 32 import "cmd/internal/obj" 33 34 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p ppc64 35 36 /* 37 * powerpc 64 38 */ 39 const ( 40 NSNAME = 8 41 NSYM = 50 42 NREG = 32 /* number of general registers */ 43 NFREG = 32 /* number of floating point registers */ 44 ) 45 46 const ( 47 REG_R0 = obj.RBasePPC64 + iota 48 REG_R1 49 REG_R2 50 REG_R3 51 REG_R4 52 REG_R5 53 REG_R6 54 REG_R7 55 REG_R8 56 REG_R9 57 REG_R10 58 REG_R11 59 REG_R12 60 REG_R13 61 REG_R14 62 REG_R15 63 REG_R16 64 REG_R17 65 REG_R18 66 REG_R19 67 REG_R20 68 REG_R21 69 REG_R22 70 REG_R23 71 REG_R24 72 REG_R25 73 REG_R26 74 REG_R27 75 REG_R28 76 REG_R29 77 REG_R30 78 REG_R31 79 80 REG_F0 81 REG_F1 82 REG_F2 83 REG_F3 84 REG_F4 85 REG_F5 86 REG_F6 87 REG_F7 88 REG_F8 89 REG_F9 90 REG_F10 91 REG_F11 92 REG_F12 93 REG_F13 94 REG_F14 95 REG_F15 96 REG_F16 97 REG_F17 98 REG_F18 99 REG_F19 100 REG_F20 101 REG_F21 102 REG_F22 103 REG_F23 104 REG_F24 105 REG_F25 106 REG_F26 107 REG_F27 108 REG_F28 109 REG_F29 110 REG_F30 111 REG_F31 112 113 REG_CR0 114 REG_CR1 115 REG_CR2 116 REG_CR3 117 REG_CR4 118 REG_CR5 119 REG_CR6 120 REG_CR7 121 122 REG_MSR 123 REG_FPSCR 124 REG_CR 125 126 REG_SPECIAL = REG_CR0 127 128 REG_SPR0 = obj.RBasePPC64 + 1024 // first of 1024 registers 129 REG_DCR0 = obj.RBasePPC64 + 2048 // first of 1024 registers 130 131 REG_XER = REG_SPR0 + 1 132 REG_LR = REG_SPR0 + 8 133 REG_CTR = REG_SPR0 + 9 134 135 REGZERO = REG_R0 /* set to zero */ 136 REGSP = REG_R1 137 REGSB = REG_R2 138 REGRET = REG_R3 139 REGARG = -1 /* -1 disables passing the first argument in register */ 140 REGRT1 = REG_R3 /* reserved for runtime, duffzero and duffcopy */ 141 REGRT2 = REG_R4 /* reserved for runtime, duffcopy */ 142 REGMIN = REG_R7 /* register variables allocated from here to REGMAX */ 143 REGCTXT = REG_R11 /* context for closures */ 144 REGTLS = REG_R13 /* C ABI TLS base pointer */ 145 REGMAX = REG_R27 146 REGEXT = REG_R30 /* external registers allocated from here down */ 147 REGG = REG_R30 /* G */ 148 REGTMP = REG_R31 /* used by the linker */ 149 FREGRET = REG_F0 150 FREGMIN = REG_F17 /* first register variable */ 151 FREGMAX = REG_F26 /* last register variable for 9g only */ 152 FREGEXT = REG_F26 /* first external register */ 153 FREGCVI = REG_F27 /* floating conversion constant */ 154 FREGZERO = REG_F28 /* both float and double */ 155 FREGHALF = REG_F29 /* double */ 156 FREGONE = REG_F30 /* double */ 157 FREGTWO = REG_F31 /* double */ 158 ) 159 160 /* 161 * GENERAL: 162 * 163 * compiler allocates R3 up as temps 164 * compiler allocates register variables R7-R27 165 * compiler allocates external registers R30 down 166 * 167 * compiler allocates register variables F17-F26 168 * compiler allocates external registers F26 down 169 */ 170 const ( 171 BIG = 32768 - 8 172 ) 173 174 const ( 175 /* mark flags */ 176 LABEL = 1 << 0 177 LEAF = 1 << 1 178 FLOAT = 1 << 2 179 BRANCH = 1 << 3 180 LOAD = 1 << 4 181 FCMP = 1 << 5 182 SYNC = 1 << 6 183 LIST = 1 << 7 184 FOLL = 1 << 8 185 NOSCHED = 1 << 9 186 ) 187 188 // Bit settings from the CR 189 190 const ( 191 C_COND_LT = iota // 0 result is negative 192 C_COND_GT // 1 result is positive 193 C_COND_EQ // 2 result is zero 194 C_COND_SO // 3 summary overflow 195 ) 196 197 const ( 198 C_NONE = iota 199 C_REG 200 C_FREG 201 C_CREG 202 C_SPR /* special processor register */ 203 C_ZCON 204 C_SCON /* 16 bit signed */ 205 C_UCON /* 32 bit signed, low 16 bits 0 */ 206 C_ADDCON /* -0x8000 <= v < 0 */ 207 C_ANDCON /* 0 < v <= 0xFFFF */ 208 C_LCON /* other 32 */ 209 C_DCON /* other 64 (could subdivide further) */ 210 C_SACON /* $n(REG) where n <= int16 */ 211 C_SECON 212 C_LACON /* $n(REG) where int16 < n <= int32 */ 213 C_LECON 214 C_DACON /* $n(REG) where int32 < n */ 215 C_SBRA 216 C_LBRA 217 C_LBRAPIC 218 C_SAUTO 219 C_LAUTO 220 C_SEXT 221 C_LEXT 222 C_ZOREG // conjecture: either (1) register + zeroed offset, or (2) "R0" implies zero or C_REG 223 C_SOREG // register + signed offset 224 C_LOREG 225 C_FPSCR 226 C_MSR 227 C_XER 228 C_LR 229 C_CTR 230 C_ANY 231 C_GOK 232 C_ADDR 233 C_GOTADDR 234 C_TLS_LE 235 C_TLS_IE 236 C_TEXTSIZE 237 238 C_NCLASS /* must be the last */ 239 ) 240 241 const ( 242 AADD = obj.ABasePPC64 + obj.A_ARCHSPECIFIC + iota 243 AADDCC 244 AADDV 245 AADDVCC 246 AADDC 247 AADDCCC 248 AADDCV 249 AADDCVCC 250 AADDME 251 AADDMECC 252 AADDMEVCC 253 AADDMEV 254 AADDE 255 AADDECC 256 AADDEVCC 257 AADDEV 258 AADDZE 259 AADDZECC 260 AADDZEVCC 261 AADDZEV 262 AAND 263 AANDCC 264 AANDN 265 AANDNCC 266 ABC 267 ABCL 268 ABEQ 269 ABGE // not LT = G/E/U 270 ABGT 271 ABLE // not GT = L/E/U 272 ABLT 273 ABNE // not EQ = L/G/U 274 ABVC // apparently Unordered-clear 275 ABVS // apparently Unordered-set 276 ACMP 277 ACMPU 278 ACNTLZW 279 ACNTLZWCC 280 ACRAND 281 ACRANDN 282 ACREQV 283 ACRNAND 284 ACRNOR 285 ACROR 286 ACRORN 287 ACRXOR 288 ADIVW 289 ADIVWCC 290 ADIVWVCC 291 ADIVWV 292 ADIVWU 293 ADIVWUCC 294 ADIVWUVCC 295 ADIVWUV 296 AEQV 297 AEQVCC 298 AEXTSB 299 AEXTSBCC 300 AEXTSH 301 AEXTSHCC 302 AFABS 303 AFABSCC 304 AFADD 305 AFADDCC 306 AFADDS 307 AFADDSCC 308 AFCMPO 309 AFCMPU 310 AFCTIW 311 AFCTIWCC 312 AFCTIWZ 313 AFCTIWZCC 314 AFDIV 315 AFDIVCC 316 AFDIVS 317 AFDIVSCC 318 AFMADD 319 AFMADDCC 320 AFMADDS 321 AFMADDSCC 322 AFMOVD 323 AFMOVDCC 324 AFMOVDU 325 AFMOVS 326 AFMOVSU 327 AFMOVSX 328 AFMOVSZ 329 AFMSUB 330 AFMSUBCC 331 AFMSUBS 332 AFMSUBSCC 333 AFMUL 334 AFMULCC 335 AFMULS 336 AFMULSCC 337 AFNABS 338 AFNABSCC 339 AFNEG 340 AFNEGCC 341 AFNMADD 342 AFNMADDCC 343 AFNMADDS 344 AFNMADDSCC 345 AFNMSUB 346 AFNMSUBCC 347 AFNMSUBS 348 AFNMSUBSCC 349 AFRSP 350 AFRSPCC 351 AFSUB 352 AFSUBCC 353 AFSUBS 354 AFSUBSCC 355 AMOVMW 356 ALBAR 357 ALSW 358 ALWAR 359 ALWSYNC 360 AMOVWBR 361 AMOVB 362 AMOVBU 363 AMOVBZ 364 AMOVBZU 365 AMOVH 366 AMOVHBR 367 AMOVHU 368 AMOVHZ 369 AMOVHZU 370 AMOVW 371 AMOVWU 372 AMOVFL 373 AMOVCRFS 374 AMTFSB0 375 AMTFSB0CC 376 AMTFSB1 377 AMTFSB1CC 378 AMULHW 379 AMULHWCC 380 AMULHWU 381 AMULHWUCC 382 AMULLW 383 AMULLWCC 384 AMULLWVCC 385 AMULLWV 386 ANAND 387 ANANDCC 388 ANEG 389 ANEGCC 390 ANEGVCC 391 ANEGV 392 ANOR 393 ANORCC 394 AOR 395 AORCC 396 AORN 397 AORNCC 398 AREM 399 AREMCC 400 AREMV 401 AREMVCC 402 AREMU 403 AREMUCC 404 AREMUV 405 AREMUVCC 406 ARFI 407 ARLWMI 408 ARLWMICC 409 ARLWNM 410 ARLWNMCC 411 ASLW 412 ASLWCC 413 ASRW 414 ASRAW 415 ASRAWCC 416 ASRWCC 417 ASTBCCC 418 ASTSW 419 ASTWCCC 420 ASUB 421 ASUBCC 422 ASUBVCC 423 ASUBC 424 ASUBCCC 425 ASUBCV 426 ASUBCVCC 427 ASUBME 428 ASUBMECC 429 ASUBMEVCC 430 ASUBMEV 431 ASUBV 432 ASUBE 433 ASUBECC 434 ASUBEV 435 ASUBEVCC 436 ASUBZE 437 ASUBZECC 438 ASUBZEVCC 439 ASUBZEV 440 ASYNC 441 AXOR 442 AXORCC 443 444 ADCBF 445 ADCBI 446 ADCBST 447 ADCBT 448 ADCBTST 449 ADCBZ 450 AECIWX 451 AECOWX 452 AEIEIO 453 AICBI 454 AISYNC 455 APTESYNC 456 ATLBIE 457 ATLBIEL 458 ATLBSYNC 459 ATW 460 461 ASYSCALL 462 AWORD 463 464 ARFCI 465 466 /* optional on 32-bit */ 467 AFRES 468 AFRESCC 469 AFRSQRTE 470 AFRSQRTECC 471 AFSEL 472 AFSELCC 473 AFSQRT 474 AFSQRTCC 475 AFSQRTS 476 AFSQRTSCC 477 478 /* 64-bit */ 479 480 ACNTLZD 481 ACNTLZDCC 482 ACMPW /* CMP with L=0 */ 483 ACMPWU 484 ADIVD 485 ADIVDCC 486 ADIVDVCC 487 ADIVDV 488 ADIVDU 489 ADIVDUCC 490 ADIVDUVCC 491 ADIVDUV 492 AEXTSW 493 AEXTSWCC 494 /* AFCFIW; AFCFIWCC */ 495 AFCFID 496 AFCFIDCC 497 AFCFIDU 498 AFCFIDUCC 499 AFCTID 500 AFCTIDCC 501 AFCTIDZ 502 AFCTIDZCC 503 ALDAR 504 AMOVD 505 AMOVDU 506 AMOVWZ 507 AMOVWZU 508 AMULHD 509 AMULHDCC 510 AMULHDU 511 AMULHDUCC 512 AMULLD 513 AMULLDCC 514 AMULLDVCC 515 AMULLDV 516 ARFID 517 ARLDMI 518 ARLDMICC 519 ARLDC 520 ARLDCCC 521 ARLDCR 522 ARLDCRCC 523 ARLDCL 524 ARLDCLCC 525 ASLBIA 526 ASLBIE 527 ASLBMFEE 528 ASLBMFEV 529 ASLBMTE 530 ASLD 531 ASLDCC 532 ASRD 533 ASRAD 534 ASRADCC 535 ASRDCC 536 ASTDCCC 537 ATD 538 539 /* 64-bit pseudo operation */ 540 ADWORD 541 AREMD 542 AREMDCC 543 AREMDV 544 AREMDVCC 545 AREMDU 546 AREMDUCC 547 AREMDUV 548 AREMDUVCC 549 550 /* more 64-bit operations */ 551 AHRFID 552 553 ALAST 554 555 // aliases 556 ABR = obj.AJMP 557 ABL = obj.ACALL 558 )