github.com/shogo82148/std@v1.22.1-0.20240327122250-4e474527810c/cmd/link/internal/ppc64/asm.go (about) 1 // Inferno utils/5l/asm.c 2 // https://bitbucket.org/inferno-os/inferno-os/src/master/utils/5l/asm.c 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 6 // Portions Copyright © 1997-1999 Vita Nuova Limited 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright © 2004,2006 Bruce Ellis 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright © 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 package ppc64 32 33 const ( 34 // For genstub, the type of stub required by the caller. 35 STUB_TOC = iota 36 STUB_PCREL 37 ) 38 39 const ( 40 OP_TOCRESTORE = 0xe8410018 41 OP_TOCSAVE = 0xf8410018 42 OP_NOP = 0x60000000 43 OP_BL = 0x48000001 44 OP_BCTR = 0x4e800420 45 OP_BCTRL = 0x4e800421 46 OP_BCL = 0x40000001 47 OP_ADDI = 0x38000000 48 OP_ADDIS = 0x3c000000 49 OP_LD = 0xe8000000 50 OP_PLA_PFX = 0x06100000 51 OP_PLA_SFX = 0x38000000 52 OP_PLD_PFX_PCREL = 0x04100000 53 OP_PLD_SFX = 0xe4000000 54 OP_MFLR = 0x7c0802a6 55 OP_MTLR = 0x7c0803a6 56 OP_MFCTR = 0x7c0902a6 57 OP_MTCTR = 0x7c0903a6 58 59 OP_ADDIS_R12_R2 = OP_ADDIS | 12<<21 | 2<<16 60 OP_ADDIS_R12_R12 = OP_ADDIS | 12<<21 | 12<<16 61 OP_ADDI_R12_R12 = OP_ADDI | 12<<21 | 12<<16 62 OP_PLD_SFX_R12 = OP_PLD_SFX | 12<<21 63 OP_PLA_SFX_R12 = OP_PLA_SFX | 12<<21 64 OP_LIS_R12 = OP_ADDIS | 12<<21 65 OP_LD_R12_R12 = OP_LD | 12<<21 | 12<<16 66 OP_MTCTR_R12 = OP_MTCTR | 12<<21 67 OP_MFLR_R12 = OP_MFLR | 12<<21 68 OP_MFLR_R0 = OP_MFLR | 0<<21 69 OP_MTLR_R0 = OP_MTLR | 0<<21 70 71 // This is a special, preferred form of bcl to obtain the next 72 // instruction address (NIA, aka PC+4) in LR. 73 OP_BCL_NIA = OP_BCL | 20<<21 | 31<<16 | 1<<2 74 75 // Masks to match opcodes 76 MASK_PLD_PFX = 0xfff70000 77 MASK_PLD_SFX = 0xfc1f0000 78 MASK_PLD_RT = 0x03e00000 79 MASK_OP_LD = 0xfc000003 80 MASK_OP_ADDIS = 0xfc000000 81 )