github.com/shogo82148/std@v1.22.1-0.20240327122250-4e474527810c/internal/cpu/cpu.go (about)

     1  // Copyright 2017 The Go Authors. All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  // Package cpu implements processor feature detection
     6  // used by the Go standard library.
     7  package cpu
     8  
     9  // DebugOptions is set to true by the runtime if the OS supports reading
    10  // GODEBUG early in runtime startup.
    11  // This should not be changed after it is initialized.
    12  var DebugOptions bool
    13  
    14  // CacheLinePad is used to pad structs to avoid false sharing.
    15  type CacheLinePad struct{ _ [CacheLinePadSize]byte }
    16  
    17  // CacheLineSize is the CPU's assumed cache line size.
    18  // There is currently no runtime detection of the real cache line size
    19  // so we use the constant per GOARCH CacheLinePadSize as an approximation.
    20  var CacheLineSize uintptr = CacheLinePadSize
    21  
    22  // The booleans in X86 contain the correspondingly named cpuid feature bit.
    23  // HasAVX and HasAVX2 are only set if the OS does support XMM and YMM registers
    24  // in addition to the cpuid feature bit being set.
    25  // The struct is padded to avoid false sharing.
    26  var X86 struct {
    27  	_            CacheLinePad
    28  	HasAES       bool
    29  	HasADX       bool
    30  	HasAVX       bool
    31  	HasAVX2      bool
    32  	HasAVX512F   bool
    33  	HasAVX512BW  bool
    34  	HasAVX512VL  bool
    35  	HasBMI1      bool
    36  	HasBMI2      bool
    37  	HasERMS      bool
    38  	HasFMA       bool
    39  	HasOSXSAVE   bool
    40  	HasPCLMULQDQ bool
    41  	HasPOPCNT    bool
    42  	HasRDTSCP    bool
    43  	HasSHA       bool
    44  	HasSSE3      bool
    45  	HasSSSE3     bool
    46  	HasSSE41     bool
    47  	HasSSE42     bool
    48  	_            CacheLinePad
    49  }
    50  
    51  // The booleans in ARM contain the correspondingly named cpu feature bit.
    52  // The struct is padded to avoid false sharing.
    53  var ARM struct {
    54  	_            CacheLinePad
    55  	HasVFPv4     bool
    56  	HasIDIVA     bool
    57  	HasV7Atomics bool
    58  	_            CacheLinePad
    59  }
    60  
    61  // The booleans in ARM64 contain the correspondingly named cpu feature bit.
    62  // The struct is padded to avoid false sharing.
    63  var ARM64 struct {
    64  	_          CacheLinePad
    65  	HasAES     bool
    66  	HasPMULL   bool
    67  	HasSHA1    bool
    68  	HasSHA2    bool
    69  	HasSHA512  bool
    70  	HasCRC32   bool
    71  	HasATOMICS bool
    72  	HasCPUID   bool
    73  	IsNeoverse bool
    74  	_          CacheLinePad
    75  }
    76  
    77  var MIPS64X struct {
    78  	_      CacheLinePad
    79  	HasMSA bool
    80  	_      CacheLinePad
    81  }
    82  
    83  // For ppc64(le), it is safe to check only for ISA level starting on ISA v3.00,
    84  // since there are no optional categories. There are some exceptions that also
    85  // require kernel support to work (darn, scv), so there are feature bits for
    86  // those as well. The minimum processor requirement is POWER8 (ISA 2.07).
    87  // The struct is padded to avoid false sharing.
    88  var PPC64 struct {
    89  	_         CacheLinePad
    90  	HasDARN   bool
    91  	HasSCV    bool
    92  	IsPOWER8  bool
    93  	IsPOWER9  bool
    94  	IsPOWER10 bool
    95  	_         CacheLinePad
    96  }
    97  
    98  var S390X struct {
    99  	_         CacheLinePad
   100  	HasZARCH  bool
   101  	HasSTFLE  bool
   102  	HasLDISP  bool
   103  	HasEIMM   bool
   104  	HasDFP    bool
   105  	HasETF3EH bool
   106  	HasMSA    bool
   107  	HasAES    bool
   108  	HasAESCBC bool
   109  	HasAESCTR bool
   110  	HasAESGCM bool
   111  	HasGHASH  bool
   112  	HasSHA1   bool
   113  	HasSHA256 bool
   114  	HasSHA512 bool
   115  	HasSHA3   bool
   116  	HasVX     bool
   117  	HasVXE    bool
   118  	HasKDSA   bool
   119  	HasECDSA  bool
   120  	HasEDDSA  bool
   121  	_         CacheLinePad
   122  }
   123  
   124  // Initialize examines the processor and sets the relevant variables above.
   125  // This is called by the runtime package early in program initialization,
   126  // before normal init functions are run. env is set by runtime if the OS supports
   127  // cpu feature options in GODEBUG.
   128  func Initialize(env string)