github.com/slayercat/go@v0.0.0-20170428012452-c51559813f61/src/cmd/internal/obj/arm/a.out.go (about) 1 // Inferno utils/5c/5.out.h 2 // https://bitbucket.org/inferno-os/inferno-os/src/default/utils/5c/5.out.h 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 6 // Portions Copyright © 1997-1999 Vita Nuova Limited 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright © 2004,2006 Bruce Ellis 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright © 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 package arm 32 33 import "cmd/internal/obj" 34 35 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm 36 37 const ( 38 NSNAME = 8 39 NSYM = 50 40 NREG = 16 41 ) 42 43 /* -1 disables use of REGARG */ 44 const ( 45 REGARG = -1 46 ) 47 48 const ( 49 REG_R0 = obj.RBaseARM + iota // must be 16-aligned 50 REG_R1 51 REG_R2 52 REG_R3 53 REG_R4 54 REG_R5 55 REG_R6 56 REG_R7 57 REG_R8 58 REG_R9 59 REG_R10 60 REG_R11 61 REG_R12 62 REG_R13 63 REG_R14 64 REG_R15 65 66 REG_F0 // must be 16-aligned 67 REG_F1 68 REG_F2 69 REG_F3 70 REG_F4 71 REG_F5 72 REG_F6 73 REG_F7 74 REG_F8 75 REG_F9 76 REG_F10 77 REG_F11 78 REG_F12 79 REG_F13 80 REG_F14 81 REG_F15 82 83 REG_FPSR // must be 2-aligned 84 REG_FPCR 85 86 REG_CPSR // must be 2-aligned 87 REG_SPSR 88 89 MAXREG 90 REGRET = REG_R0 91 /* compiler allocates R1 up as temps */ 92 /* compiler allocates register variables R3 up */ 93 /* compiler allocates external registers R10 down */ 94 REGEXT = REG_R10 95 /* these two registers are declared in runtime.h */ 96 REGG = REGEXT - 0 97 REGM = REGEXT - 1 98 99 REGCTXT = REG_R7 100 REGTMP = REG_R11 101 REGSP = REG_R13 102 REGLINK = REG_R14 103 REGPC = REG_R15 104 105 NFREG = 16 106 /* compiler allocates register variables F0 up */ 107 /* compiler allocates external registers F7 down */ 108 FREGRET = REG_F0 109 FREGEXT = REG_F7 110 FREGTMP = REG_F15 111 ) 112 113 const ( 114 C_NONE = iota 115 C_REG 116 C_REGREG 117 C_REGREG2 118 C_REGLIST 119 C_SHIFT 120 C_FREG 121 C_PSR 122 C_FCR 123 124 C_RCON /* 0xff rotated */ 125 C_NCON /* ~RCON */ 126 C_RCON2 /* OR of two disjoint C_RCON constants */ 127 C_SCON /* 0xffff */ 128 C_LCON 129 C_LCONADDR 130 C_ZFCON 131 C_SFCON 132 C_LFCON 133 134 C_RACON 135 C_LACON 136 137 C_SBRA 138 C_LBRA 139 140 C_HAUTO /* halfword insn offset (-0xff to 0xff) */ 141 C_FAUTO /* float insn offset (0 to 0x3fc, word aligned) */ 142 C_HFAUTO /* both H and F */ 143 C_SAUTO /* -0xfff to 0xfff */ 144 C_LAUTO 145 146 C_HOREG 147 C_FOREG 148 C_HFOREG 149 C_SOREG 150 C_ROREG 151 C_SROREG /* both nil and R */ 152 C_LOREG 153 154 C_PC 155 C_SP 156 C_HREG 157 158 C_ADDR /* reference to relocatable address */ 159 160 // TLS "var" in local exec mode: will become a constant offset from 161 // thread local base that is ultimately chosen by the program linker. 162 C_TLS_LE 163 164 // TLS "var" in initial exec mode: will become a memory address (chosen 165 // by the program linker) that the dynamic linker will fill with the 166 // offset from the thread local base. 167 C_TLS_IE 168 169 C_TEXTSIZE 170 171 C_GOK 172 173 C_NCLASS /* must be the last */ 174 ) 175 176 const ( 177 AAND = obj.ABaseARM + obj.A_ARCHSPECIFIC + iota 178 AEOR 179 ASUB 180 ARSB 181 AADD 182 AADC 183 ASBC 184 ARSC 185 ATST 186 ATEQ 187 ACMP 188 ACMN 189 AORR 190 ABIC 191 192 AMVN 193 194 /* 195 * Do not reorder or fragment the conditional branch 196 * opcodes, or the predication code will break 197 */ 198 ABEQ 199 ABNE 200 ABCS 201 ABHS 202 ABCC 203 ABLO 204 ABMI 205 ABPL 206 ABVS 207 ABVC 208 ABHI 209 ABLS 210 ABGE 211 ABLT 212 ABGT 213 ABLE 214 215 AMOVWD 216 AMOVWF 217 AMOVDW 218 AMOVFW 219 AMOVFD 220 AMOVDF 221 AMOVF 222 AMOVD 223 224 ACMPF 225 ACMPD 226 AADDF 227 AADDD 228 ASUBF 229 ASUBD 230 AMULF 231 AMULD 232 ADIVF 233 ADIVD 234 ASQRTF 235 ASQRTD 236 AABSF 237 AABSD 238 ANEGF 239 ANEGD 240 241 ASRL 242 ASRA 243 ASLL 244 AMULU 245 ADIVU 246 AMUL 247 AMMUL 248 ADIV 249 AMOD 250 AMODU 251 ADIVHW 252 ADIVUHW 253 254 AMOVB 255 AMOVBS 256 AMOVBU 257 AMOVH 258 AMOVHS 259 AMOVHU 260 AMOVW 261 AMOVM 262 ASWPBU 263 ASWPW 264 265 ARFE 266 ASWI 267 AMULA 268 AMULS 269 AMMULA 270 AMMULS 271 272 AWORD 273 274 AMULL 275 AMULAL 276 AMULLU 277 AMULALU 278 279 ABX 280 ABXRET 281 ADWORD 282 283 ALDREX 284 ASTREX 285 ALDREXD 286 ASTREXD 287 288 APLD 289 290 ACLZ 291 AREV 292 AREV16 293 AREVSH 294 ARBIT 295 296 AMULWT 297 AMULWB 298 AMULBB 299 AMULAWT 300 AMULAWB 301 AMULABB 302 303 ADATABUNDLE 304 ADATABUNDLEEND 305 306 AMRC // MRC/MCR 307 308 ALAST 309 310 // aliases 311 AB = obj.AJMP 312 ABL = obj.ACALL 313 ) 314 315 /* scond byte */ 316 const ( 317 C_SCOND = (1 << 4) - 1 318 C_SBIT = 1 << 4 319 C_PBIT = 1 << 5 320 C_WBIT = 1 << 6 321 C_FBIT = 1 << 7 /* psr flags-only */ 322 C_UBIT = 1 << 7 /* up bit, unsigned bit */ 323 324 // These constants are the ARM condition codes encodings, 325 // XORed with 14 so that C_SCOND_NONE has value 0, 326 // so that a zeroed Prog.scond means "always execute". 327 C_SCOND_XOR = 14 328 329 C_SCOND_EQ = 0 ^ C_SCOND_XOR 330 C_SCOND_NE = 1 ^ C_SCOND_XOR 331 C_SCOND_HS = 2 ^ C_SCOND_XOR 332 C_SCOND_LO = 3 ^ C_SCOND_XOR 333 C_SCOND_MI = 4 ^ C_SCOND_XOR 334 C_SCOND_PL = 5 ^ C_SCOND_XOR 335 C_SCOND_VS = 6 ^ C_SCOND_XOR 336 C_SCOND_VC = 7 ^ C_SCOND_XOR 337 C_SCOND_HI = 8 ^ C_SCOND_XOR 338 C_SCOND_LS = 9 ^ C_SCOND_XOR 339 C_SCOND_GE = 10 ^ C_SCOND_XOR 340 C_SCOND_LT = 11 ^ C_SCOND_XOR 341 C_SCOND_GT = 12 ^ C_SCOND_XOR 342 C_SCOND_LE = 13 ^ C_SCOND_XOR 343 C_SCOND_NONE = 14 ^ C_SCOND_XOR 344 C_SCOND_NV = 15 ^ C_SCOND_XOR 345 346 /* D_SHIFT type */ 347 SHIFT_LL = 0 << 5 348 SHIFT_LR = 1 << 5 349 SHIFT_AR = 2 << 5 350 SHIFT_RR = 3 << 5 351 )