github.com/spotify/syslog-redirector-golang@v0.0.0-20140320174030-4859f03d829a/src/cmd/8c/reg.c (about) 1 // Inferno utils/8c/reg.c 2 // http://code.google.com/p/inferno-os/source/browse/utils/8c/reg.c 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 6 // Portions Copyright © 1997-1999 Vita Nuova Limited 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright © 2004,2006 Bruce Ellis 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright © 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 #include "gc.h" 32 33 static void fixjmp(Reg*); 34 35 Reg* 36 rega(void) 37 { 38 Reg *r; 39 40 r = freer; 41 if(r == R) { 42 r = alloc(sizeof(*r)); 43 } else 44 freer = r->link; 45 46 *r = zreg; 47 return r; 48 } 49 50 int 51 rcmp(const void *a1, const void *a2) 52 { 53 Rgn *p1, *p2; 54 int c1, c2; 55 56 p1 = (Rgn*)a1; 57 p2 = (Rgn*)a2; 58 c1 = p2->cost; 59 c2 = p1->cost; 60 if(c1 -= c2) 61 return c1; 62 return p2->varno - p1->varno; 63 } 64 65 void 66 regopt(Prog *p) 67 { 68 Reg *r, *r1, *r2; 69 Prog *p1; 70 int i, z; 71 int32 initpc, val, npc; 72 uint32 vreg; 73 Bits bit; 74 struct 75 { 76 int32 m; 77 int32 c; 78 Reg* p; 79 } log5[6], *lp; 80 81 firstr = R; 82 lastr = R; 83 nvar = 0; 84 regbits = RtoB(D_SP) | RtoB(D_AX); 85 for(z=0; z<BITS; z++) { 86 externs.b[z] = 0; 87 params.b[z] = 0; 88 consts.b[z] = 0; 89 addrs.b[z] = 0; 90 } 91 92 /* 93 * pass 1 94 * build aux data structure 95 * allocate pcs 96 * find use and set of variables 97 */ 98 val = 5L * 5L * 5L * 5L * 5L; 99 lp = log5; 100 for(i=0; i<5; i++) { 101 lp->m = val; 102 lp->c = 0; 103 lp->p = R; 104 val /= 5L; 105 lp++; 106 } 107 val = 0; 108 for(; p != P; p = p->link) { 109 switch(p->as) { 110 case ADATA: 111 case AGLOBL: 112 case ANAME: 113 case ASIGNAME: 114 case AFUNCDATA: 115 continue; 116 } 117 r = rega(); 118 if(firstr == R) { 119 firstr = r; 120 lastr = r; 121 } else { 122 lastr->link = r; 123 r->p1 = lastr; 124 lastr->s1 = r; 125 lastr = r; 126 } 127 r->prog = p; 128 r->pc = val; 129 val++; 130 131 lp = log5; 132 for(i=0; i<5; i++) { 133 lp->c--; 134 if(lp->c <= 0) { 135 lp->c = lp->m; 136 if(lp->p != R) 137 lp->p->log5 = r; 138 lp->p = r; 139 (lp+1)->c = 0; 140 break; 141 } 142 lp++; 143 } 144 145 r1 = r->p1; 146 if(r1 != R) 147 switch(r1->prog->as) { 148 case ARET: 149 case AJMP: 150 case AIRETL: 151 r->p1 = R; 152 r1->s1 = R; 153 } 154 bit = mkvar(r, &p->from); 155 if(bany(&bit)) 156 switch(p->as) { 157 /* 158 * funny 159 */ 160 case ALEAL: 161 for(z=0; z<BITS; z++) 162 addrs.b[z] |= bit.b[z]; 163 break; 164 165 /* 166 * left side read 167 */ 168 default: 169 for(z=0; z<BITS; z++) 170 r->use1.b[z] |= bit.b[z]; 171 break; 172 } 173 174 bit = mkvar(r, &p->to); 175 if(bany(&bit)) 176 switch(p->as) { 177 default: 178 diag(Z, "reg: unknown op: %A", p->as); 179 break; 180 181 /* 182 * right side read 183 */ 184 case ACMPB: 185 case ACMPL: 186 case ACMPW: 187 case APREFETCHT0: 188 case APREFETCHT1: 189 case APREFETCHT2: 190 case APREFETCHNTA: 191 for(z=0; z<BITS; z++) 192 r->use2.b[z] |= bit.b[z]; 193 break; 194 195 /* 196 * right side write 197 */ 198 case ANOP: 199 case AMOVL: 200 case AMOVB: 201 case AMOVW: 202 case AMOVBLSX: 203 case AMOVBLZX: 204 case AMOVWLSX: 205 case AMOVWLZX: 206 for(z=0; z<BITS; z++) 207 r->set.b[z] |= bit.b[z]; 208 break; 209 210 /* 211 * right side read+write 212 */ 213 case AADDB: 214 case AADDL: 215 case AADDW: 216 case AANDB: 217 case AANDL: 218 case AANDW: 219 case ASUBB: 220 case ASUBL: 221 case ASUBW: 222 case AORB: 223 case AORL: 224 case AORW: 225 case AXORB: 226 case AXORL: 227 case AXORW: 228 case ASALB: 229 case ASALL: 230 case ASALW: 231 case ASARB: 232 case ASARL: 233 case ASARW: 234 case AROLB: 235 case AROLL: 236 case AROLW: 237 case ARORB: 238 case ARORL: 239 case ARORW: 240 case ASHLB: 241 case ASHLL: 242 case ASHLW: 243 case ASHRB: 244 case ASHRL: 245 case ASHRW: 246 case AIMULL: 247 case AIMULW: 248 case ANEGL: 249 case ANOTL: 250 case AADCL: 251 case ASBBL: 252 for(z=0; z<BITS; z++) { 253 r->set.b[z] |= bit.b[z]; 254 r->use2.b[z] |= bit.b[z]; 255 } 256 break; 257 258 /* 259 * funny 260 */ 261 case AFMOVDP: 262 case AFMOVFP: 263 case AFMOVLP: 264 case AFMOVVP: 265 case AFMOVWP: 266 case ACALL: 267 for(z=0; z<BITS; z++) 268 addrs.b[z] |= bit.b[z]; 269 break; 270 } 271 272 switch(p->as) { 273 case AIMULL: 274 case AIMULW: 275 if(p->to.type != D_NONE) 276 break; 277 278 case AIDIVB: 279 case AIDIVL: 280 case AIDIVW: 281 case AIMULB: 282 case ADIVB: 283 case ADIVL: 284 case ADIVW: 285 case AMULB: 286 case AMULL: 287 case AMULW: 288 289 case ACWD: 290 case ACDQ: 291 r->regu |= RtoB(D_AX) | RtoB(D_DX); 292 break; 293 294 case AREP: 295 case AREPN: 296 case ALOOP: 297 case ALOOPEQ: 298 case ALOOPNE: 299 r->regu |= RtoB(D_CX); 300 break; 301 302 case AMOVSB: 303 case AMOVSL: 304 case AMOVSW: 305 case ACMPSB: 306 case ACMPSL: 307 case ACMPSW: 308 r->regu |= RtoB(D_SI) | RtoB(D_DI); 309 break; 310 311 case ASTOSB: 312 case ASTOSL: 313 case ASTOSW: 314 case ASCASB: 315 case ASCASL: 316 case ASCASW: 317 r->regu |= RtoB(D_AX) | RtoB(D_DI); 318 break; 319 320 case AINSB: 321 case AINSL: 322 case AINSW: 323 case AOUTSB: 324 case AOUTSL: 325 case AOUTSW: 326 r->regu |= RtoB(D_DI) | RtoB(D_DX); 327 break; 328 329 case AFSTSW: 330 case ASAHF: 331 r->regu |= RtoB(D_AX); 332 break; 333 } 334 } 335 if(firstr == R) 336 return; 337 initpc = pc - val; 338 npc = val; 339 340 /* 341 * pass 2 342 * turn branch references to pointers 343 * build back pointers 344 */ 345 for(r = firstr; r != R; r = r->link) { 346 p = r->prog; 347 if(p->to.type == D_BRANCH) { 348 val = p->to.offset - initpc; 349 r1 = firstr; 350 while(r1 != R) { 351 r2 = r1->log5; 352 if(r2 != R && val >= r2->pc) { 353 r1 = r2; 354 continue; 355 } 356 if(r1->pc == val) 357 break; 358 r1 = r1->link; 359 } 360 if(r1 == R) { 361 nearln = p->lineno; 362 diag(Z, "ref not found\n%P", p); 363 continue; 364 } 365 if(r1 == r) { 366 nearln = p->lineno; 367 diag(Z, "ref to self\n%P", p); 368 continue; 369 } 370 r->s2 = r1; 371 r->p2link = r1->p2; 372 r1->p2 = r; 373 } 374 } 375 if(debug['R']) { 376 p = firstr->prog; 377 print("\n%L %D\n", p->lineno, &p->from); 378 } 379 380 /* 381 * pass 2.1 382 * fix jumps 383 */ 384 fixjmp(firstr); 385 386 /* 387 * pass 2.5 388 * find looping structure 389 */ 390 for(r = firstr; r != R; r = r->link) 391 r->active = 0; 392 change = 0; 393 loopit(firstr, npc); 394 if(debug['R'] && debug['v']) { 395 print("\nlooping structure:\n"); 396 for(r = firstr; r != R; r = r->link) { 397 print("%d:%P", r->loop, r->prog); 398 for(z=0; z<BITS; z++) 399 bit.b[z] = r->use1.b[z] | 400 r->use2.b[z] | 401 r->set.b[z]; 402 if(bany(&bit)) { 403 print("\t"); 404 if(bany(&r->use1)) 405 print(" u1=%B", r->use1); 406 if(bany(&r->use2)) 407 print(" u2=%B", r->use2); 408 if(bany(&r->set)) 409 print(" st=%B", r->set); 410 } 411 print("\n"); 412 } 413 } 414 415 /* 416 * pass 3 417 * iterate propagating usage 418 * back until flow graph is complete 419 */ 420 loop1: 421 change = 0; 422 for(r = firstr; r != R; r = r->link) 423 r->active = 0; 424 for(r = firstr; r != R; r = r->link) 425 if(r->prog->as == ARET) 426 prop(r, zbits, zbits); 427 loop11: 428 /* pick up unreachable code */ 429 i = 0; 430 for(r = firstr; r != R; r = r1) { 431 r1 = r->link; 432 if(r1 && r1->active && !r->active) { 433 prop(r, zbits, zbits); 434 i = 1; 435 } 436 } 437 if(i) 438 goto loop11; 439 if(change) 440 goto loop1; 441 442 443 /* 444 * pass 4 445 * iterate propagating register/variable synchrony 446 * forward until graph is complete 447 */ 448 loop2: 449 change = 0; 450 for(r = firstr; r != R; r = r->link) 451 r->active = 0; 452 synch(firstr, zbits); 453 if(change) 454 goto loop2; 455 456 457 /* 458 * pass 5 459 * isolate regions 460 * calculate costs (paint1) 461 */ 462 r = firstr; 463 if(r) { 464 for(z=0; z<BITS; z++) 465 bit.b[z] = (r->refahead.b[z] | r->calahead.b[z]) & 466 ~(externs.b[z] | params.b[z] | addrs.b[z] | consts.b[z]); 467 if(bany(&bit)) { 468 nearln = r->prog->lineno; 469 warn(Z, "used and not set: %B", bit); 470 if(debug['R'] && !debug['w']) 471 print("used and not set: %B\n", bit); 472 } 473 } 474 if(debug['R'] && debug['v']) 475 print("\nprop structure:\n"); 476 for(r = firstr; r != R; r = r->link) 477 r->act = zbits; 478 rgp = region; 479 nregion = 0; 480 for(r = firstr; r != R; r = r->link) { 481 if(debug['R'] && debug['v']) { 482 print("%P\t", r->prog); 483 if(bany(&r->set)) 484 print("s:%B ", r->set); 485 if(bany(&r->refahead)) 486 print("ra:%B ", r->refahead); 487 if(bany(&r->calahead)) 488 print("ca:%B ", r->calahead); 489 print("\n"); 490 } 491 for(z=0; z<BITS; z++) 492 bit.b[z] = r->set.b[z] & 493 ~(r->refahead.b[z] | r->calahead.b[z] | addrs.b[z]); 494 if(bany(&bit)) { 495 nearln = r->prog->lineno; 496 warn(Z, "set and not used: %B", bit); 497 if(debug['R']) 498 print("set and not used: %B\n", bit); 499 excise(r); 500 } 501 for(z=0; z<BITS; z++) 502 bit.b[z] = LOAD(r) & ~(r->act.b[z] | addrs.b[z]); 503 while(bany(&bit)) { 504 i = bnum(bit); 505 rgp->enter = r; 506 rgp->varno = i; 507 change = 0; 508 if(debug['R'] && debug['v']) 509 print("\n"); 510 paint1(r, i); 511 bit.b[i/32] &= ~(1L<<(i%32)); 512 if(change <= 0) { 513 if(debug['R']) 514 print("%L$%d: %B\n", 515 r->prog->lineno, change, blsh(i)); 516 continue; 517 } 518 rgp->cost = change; 519 nregion++; 520 if(nregion >= NRGN) { 521 warn(Z, "too many regions"); 522 goto brk; 523 } 524 rgp++; 525 } 526 } 527 brk: 528 qsort(region, nregion, sizeof(region[0]), rcmp); 529 530 /* 531 * pass 6 532 * determine used registers (paint2) 533 * replace code (paint3) 534 */ 535 rgp = region; 536 for(i=0; i<nregion; i++) { 537 bit = blsh(rgp->varno); 538 vreg = paint2(rgp->enter, rgp->varno); 539 vreg = allreg(vreg, rgp); 540 if(debug['R']) { 541 print("%L$%d %R: %B\n", 542 rgp->enter->prog->lineno, 543 rgp->cost, 544 rgp->regno, 545 bit); 546 } 547 if(rgp->regno != 0) 548 paint3(rgp->enter, rgp->varno, vreg, rgp->regno); 549 rgp++; 550 } 551 /* 552 * pass 7 553 * peep-hole on basic block 554 */ 555 if(!debug['R'] || debug['P']) 556 peep(); 557 558 if(debug['R'] && debug['v']) { 559 print("after pass 7 (peep)\n"); 560 for(r=firstr; r; r=r->link) 561 print("%04d %P\n", r->pc, r->prog); 562 print("\n"); 563 } 564 565 /* 566 * pass 8 567 * recalculate pc 568 */ 569 val = initpc; 570 for(r = firstr; r != R; r = r1) { 571 r->pc = val; 572 p = r->prog; 573 p1 = P; 574 r1 = r->link; 575 if(r1 != R) 576 p1 = r1->prog; 577 for(; p != p1; p = p->link) { 578 switch(p->as) { 579 default: 580 val++; 581 break; 582 583 case ANOP: 584 case ADATA: 585 case AGLOBL: 586 case ANAME: 587 case ASIGNAME: 588 case AFUNCDATA: 589 break; 590 } 591 } 592 } 593 pc = val; 594 595 /* 596 * fix up branches 597 */ 598 if(debug['R']) 599 if(bany(&addrs)) 600 print("addrs: %B\n", addrs); 601 602 r1 = 0; /* set */ 603 for(r = firstr; r != R; r = r->link) { 604 p = r->prog; 605 if(p->to.type == D_BRANCH) 606 p->to.offset = r->s2->pc; 607 r1 = r; 608 } 609 610 /* 611 * last pass 612 * eliminate nops 613 * free aux structures 614 */ 615 for(p = firstr->prog; p != P; p = p->link){ 616 while(p->link && p->link->as == ANOP) 617 p->link = p->link->link; 618 } 619 620 if(debug['R'] && debug['v']) { 621 print("after pass 8 (fixup pc)\n"); 622 for(p1=firstr->prog; p1!=P; p1=p1->link) 623 print("%P\n", p1); 624 print("\n"); 625 } 626 627 if(r1 != R) { 628 r1->link = freer; 629 freer = firstr; 630 } 631 } 632 633 /* 634 * add mov b,rn 635 * just after r 636 */ 637 void 638 addmove(Reg *r, int bn, int rn, int f) 639 { 640 Prog *p, *p1; 641 Adr *a; 642 Var *v; 643 644 p1 = alloc(sizeof(*p1)); 645 *p1 = zprog; 646 p = r->prog; 647 648 p1->link = p->link; 649 p->link = p1; 650 p1->lineno = p->lineno; 651 652 v = var + bn; 653 654 a = &p1->to; 655 a->sym = v->sym; 656 a->offset = v->offset; 657 a->etype = v->etype; 658 a->type = v->name; 659 660 p1->as = AMOVL; 661 if(v->etype == TCHAR || v->etype == TUCHAR) 662 p1->as = AMOVB; 663 if(v->etype == TSHORT || v->etype == TUSHORT) 664 p1->as = AMOVW; 665 666 p1->from.type = rn; 667 if(!f) { 668 p1->from = *a; 669 *a = zprog.from; 670 a->type = rn; 671 if(v->etype == TUCHAR) 672 p1->as = AMOVB; 673 if(v->etype == TUSHORT) 674 p1->as = AMOVW; 675 } 676 if(debug['R']) 677 print("%P\t.a%P\n", p, p1); 678 } 679 680 uint32 681 doregbits(int r) 682 { 683 uint32 b; 684 685 b = 0; 686 if(r >= D_INDIR) 687 r -= D_INDIR; 688 if(r >= D_AX && r <= D_DI) 689 b |= RtoB(r); 690 else 691 if(r >= D_AL && r <= D_BL) 692 b |= RtoB(r-D_AL+D_AX); 693 else 694 if(r >= D_AH && r <= D_BH) 695 b |= RtoB(r-D_AH+D_AX); 696 return b; 697 } 698 699 Bits 700 mkvar(Reg *r, Adr *a) 701 { 702 Var *v; 703 int i, t, n, et, z; 704 int32 o; 705 Bits bit; 706 Sym *s; 707 708 /* 709 * mark registers used 710 */ 711 t = a->type; 712 r->regu |= doregbits(t); 713 r->regu |= doregbits(a->index); 714 715 switch(t) { 716 default: 717 goto none; 718 case D_ADDR: 719 a->type = a->index; 720 bit = mkvar(r, a); 721 for(z=0; z<BITS; z++) 722 addrs.b[z] |= bit.b[z]; 723 a->type = t; 724 goto none; 725 case D_EXTERN: 726 case D_STATIC: 727 case D_PARAM: 728 case D_AUTO: 729 n = t; 730 break; 731 } 732 s = a->sym; 733 if(s == S) 734 goto none; 735 if(s->name[0] == '.') 736 goto none; 737 et = a->etype; 738 o = a->offset; 739 v = var; 740 for(i=0; i<nvar; i++) { 741 if(s == v->sym) 742 if(n == v->name) 743 if(o == v->offset) 744 goto out; 745 v++; 746 } 747 if(nvar >= NVAR) { 748 if(debug['w'] > 1 && s) 749 warn(Z, "variable not optimized: %s", s->name); 750 goto none; 751 } 752 i = nvar; 753 nvar++; 754 v = &var[i]; 755 v->sym = s; 756 v->offset = o; 757 v->name = n; 758 v->etype = et; 759 if(debug['R']) 760 print("bit=%2d et=%2d %D\n", i, et, a); 761 762 out: 763 bit = blsh(i); 764 if(n == D_EXTERN || n == D_STATIC) 765 for(z=0; z<BITS; z++) 766 externs.b[z] |= bit.b[z]; 767 if(n == D_PARAM) 768 for(z=0; z<BITS; z++) 769 params.b[z] |= bit.b[z]; 770 if(v->etype != et || !typechlpfd[et]) /* funny punning */ 771 for(z=0; z<BITS; z++) 772 addrs.b[z] |= bit.b[z]; 773 return bit; 774 775 none: 776 return zbits; 777 } 778 779 void 780 prop(Reg *r, Bits ref, Bits cal) 781 { 782 Reg *r1, *r2; 783 int z; 784 785 for(r1 = r; r1 != R; r1 = r1->p1) { 786 for(z=0; z<BITS; z++) { 787 ref.b[z] |= r1->refahead.b[z]; 788 if(ref.b[z] != r1->refahead.b[z]) { 789 r1->refahead.b[z] = ref.b[z]; 790 change++; 791 } 792 cal.b[z] |= r1->calahead.b[z]; 793 if(cal.b[z] != r1->calahead.b[z]) { 794 r1->calahead.b[z] = cal.b[z]; 795 change++; 796 } 797 } 798 switch(r1->prog->as) { 799 case ACALL: 800 for(z=0; z<BITS; z++) { 801 cal.b[z] |= ref.b[z] | externs.b[z]; 802 ref.b[z] = 0; 803 } 804 break; 805 806 case ATEXT: 807 for(z=0; z<BITS; z++) { 808 cal.b[z] = 0; 809 ref.b[z] = 0; 810 } 811 break; 812 813 case ARET: 814 for(z=0; z<BITS; z++) { 815 cal.b[z] = externs.b[z]; 816 ref.b[z] = 0; 817 } 818 } 819 for(z=0; z<BITS; z++) { 820 ref.b[z] = (ref.b[z] & ~r1->set.b[z]) | 821 r1->use1.b[z] | r1->use2.b[z]; 822 cal.b[z] &= ~(r1->set.b[z] | r1->use1.b[z] | r1->use2.b[z]); 823 r1->refbehind.b[z] = ref.b[z]; 824 r1->calbehind.b[z] = cal.b[z]; 825 } 826 if(r1->active) 827 break; 828 r1->active = 1; 829 } 830 for(; r != r1; r = r->p1) 831 for(r2 = r->p2; r2 != R; r2 = r2->p2link) 832 prop(r2, r->refbehind, r->calbehind); 833 } 834 835 /* 836 * find looping structure 837 * 838 * 1) find reverse postordering 839 * 2) find approximate dominators, 840 * the actual dominators if the flow graph is reducible 841 * otherwise, dominators plus some other non-dominators. 842 * See Matthew S. Hecht and Jeffrey D. Ullman, 843 * "Analysis of a Simple Algorithm for Global Data Flow Problems", 844 * Conf. Record of ACM Symp. on Principles of Prog. Langs, Boston, Massachusetts, 845 * Oct. 1-3, 1973, pp. 207-217. 846 * 3) find all nodes with a predecessor dominated by the current node. 847 * such a node is a loop head. 848 * recursively, all preds with a greater rpo number are in the loop 849 */ 850 int32 851 postorder(Reg *r, Reg **rpo2r, int32 n) 852 { 853 Reg *r1; 854 855 r->rpo = 1; 856 r1 = r->s1; 857 if(r1 && !r1->rpo) 858 n = postorder(r1, rpo2r, n); 859 r1 = r->s2; 860 if(r1 && !r1->rpo) 861 n = postorder(r1, rpo2r, n); 862 rpo2r[n] = r; 863 n++; 864 return n; 865 } 866 867 int32 868 rpolca(int32 *idom, int32 rpo1, int32 rpo2) 869 { 870 int32 t; 871 872 if(rpo1 == -1) 873 return rpo2; 874 while(rpo1 != rpo2){ 875 if(rpo1 > rpo2){ 876 t = rpo2; 877 rpo2 = rpo1; 878 rpo1 = t; 879 } 880 while(rpo1 < rpo2){ 881 t = idom[rpo2]; 882 if(t >= rpo2) 883 fatal(Z, "bad idom"); 884 rpo2 = t; 885 } 886 } 887 return rpo1; 888 } 889 890 int 891 doms(int32 *idom, int32 r, int32 s) 892 { 893 while(s > r) 894 s = idom[s]; 895 return s == r; 896 } 897 898 int 899 loophead(int32 *idom, Reg *r) 900 { 901 int32 src; 902 903 src = r->rpo; 904 if(r->p1 != R && doms(idom, src, r->p1->rpo)) 905 return 1; 906 for(r = r->p2; r != R; r = r->p2link) 907 if(doms(idom, src, r->rpo)) 908 return 1; 909 return 0; 910 } 911 912 void 913 loopmark(Reg **rpo2r, int32 head, Reg *r) 914 { 915 if(r->rpo < head || r->active == head) 916 return; 917 r->active = head; 918 r->loop += LOOP; 919 if(r->p1 != R) 920 loopmark(rpo2r, head, r->p1); 921 for(r = r->p2; r != R; r = r->p2link) 922 loopmark(rpo2r, head, r); 923 } 924 925 void 926 loopit(Reg *r, int32 nr) 927 { 928 Reg *r1; 929 int32 i, d, me; 930 931 if(nr > maxnr) { 932 rpo2r = alloc(nr * sizeof(Reg*)); 933 idom = alloc(nr * sizeof(int32)); 934 maxnr = nr; 935 } 936 937 d = postorder(r, rpo2r, 0); 938 if(d > nr) 939 fatal(Z, "too many reg nodes"); 940 nr = d; 941 for(i = 0; i < nr / 2; i++){ 942 r1 = rpo2r[i]; 943 rpo2r[i] = rpo2r[nr - 1 - i]; 944 rpo2r[nr - 1 - i] = r1; 945 } 946 for(i = 0; i < nr; i++) 947 rpo2r[i]->rpo = i; 948 949 idom[0] = 0; 950 for(i = 0; i < nr; i++){ 951 r1 = rpo2r[i]; 952 me = r1->rpo; 953 d = -1; 954 if(r1->p1 != R && r1->p1->rpo < me) 955 d = r1->p1->rpo; 956 for(r1 = r1->p2; r1 != nil; r1 = r1->p2link) 957 if(r1->rpo < me) 958 d = rpolca(idom, d, r1->rpo); 959 idom[i] = d; 960 } 961 962 for(i = 0; i < nr; i++){ 963 r1 = rpo2r[i]; 964 r1->loop++; 965 if(r1->p2 != R && loophead(idom, r1)) 966 loopmark(rpo2r, i, r1); 967 } 968 } 969 970 void 971 synch(Reg *r, Bits dif) 972 { 973 Reg *r1; 974 int z; 975 976 for(r1 = r; r1 != R; r1 = r1->s1) { 977 for(z=0; z<BITS; z++) { 978 dif.b[z] = (dif.b[z] & 979 ~(~r1->refbehind.b[z] & r1->refahead.b[z])) | 980 r1->set.b[z] | r1->regdiff.b[z]; 981 if(dif.b[z] != r1->regdiff.b[z]) { 982 r1->regdiff.b[z] = dif.b[z]; 983 change++; 984 } 985 } 986 if(r1->active) 987 break; 988 r1->active = 1; 989 for(z=0; z<BITS; z++) 990 dif.b[z] &= ~(~r1->calbehind.b[z] & r1->calahead.b[z]); 991 if(r1->s2 != R) 992 synch(r1->s2, dif); 993 } 994 } 995 996 uint32 997 allreg(uint32 b, Rgn *r) 998 { 999 Var *v; 1000 int i; 1001 1002 v = var + r->varno; 1003 r->regno = 0; 1004 switch(v->etype) { 1005 1006 default: 1007 diag(Z, "unknown etype %d/%d", bitno(b), v->etype); 1008 break; 1009 1010 case TCHAR: 1011 case TUCHAR: 1012 case TSHORT: 1013 case TUSHORT: 1014 case TINT: 1015 case TUINT: 1016 case TLONG: 1017 case TULONG: 1018 case TIND: 1019 case TARRAY: 1020 i = BtoR(~b); 1021 if(i && r->cost > 0) { 1022 r->regno = i; 1023 return RtoB(i); 1024 } 1025 break; 1026 1027 case TDOUBLE: 1028 case TFLOAT: 1029 break; 1030 } 1031 return 0; 1032 } 1033 1034 void 1035 paint1(Reg *r, int bn) 1036 { 1037 Reg *r1; 1038 Prog *p; 1039 int z; 1040 uint32 bb; 1041 1042 z = bn/32; 1043 bb = 1L<<(bn%32); 1044 if(r->act.b[z] & bb) 1045 return; 1046 for(;;) { 1047 if(!(r->refbehind.b[z] & bb)) 1048 break; 1049 r1 = r->p1; 1050 if(r1 == R) 1051 break; 1052 if(!(r1->refahead.b[z] & bb)) 1053 break; 1054 if(r1->act.b[z] & bb) 1055 break; 1056 r = r1; 1057 } 1058 1059 if(LOAD(r) & ~(r->set.b[z]&~(r->use1.b[z]|r->use2.b[z])) & bb) { 1060 change -= CLOAD * r->loop; 1061 if(debug['R'] && debug['v']) 1062 print("%d%P\td %B $%d\n", r->loop, 1063 r->prog, blsh(bn), change); 1064 } 1065 for(;;) { 1066 r->act.b[z] |= bb; 1067 p = r->prog; 1068 1069 if(r->use1.b[z] & bb) { 1070 change += CREF * r->loop; 1071 if(p->as == AFMOVL) 1072 if(BtoR(bb) != D_F0) 1073 change = -CINF; 1074 if(debug['R'] && debug['v']) 1075 print("%d%P\tu1 %B $%d\n", r->loop, 1076 p, blsh(bn), change); 1077 } 1078 1079 if((r->use2.b[z]|r->set.b[z]) & bb) { 1080 change += CREF * r->loop; 1081 if(p->as == AFMOVL) 1082 if(BtoR(bb) != D_F0) 1083 change = -CINF; 1084 if(debug['R'] && debug['v']) 1085 print("%d%P\tu2 %B $%d\n", r->loop, 1086 p, blsh(bn), change); 1087 } 1088 1089 if(STORE(r) & r->regdiff.b[z] & bb) { 1090 change -= CLOAD * r->loop; 1091 if(p->as == AFMOVL) 1092 if(BtoR(bb) != D_F0) 1093 change = -CINF; 1094 if(debug['R'] && debug['v']) 1095 print("%d%P\tst %B $%d\n", r->loop, 1096 p, blsh(bn), change); 1097 } 1098 1099 if(r->refbehind.b[z] & bb) 1100 for(r1 = r->p2; r1 != R; r1 = r1->p2link) 1101 if(r1->refahead.b[z] & bb) 1102 paint1(r1, bn); 1103 1104 if(!(r->refahead.b[z] & bb)) 1105 break; 1106 r1 = r->s2; 1107 if(r1 != R) 1108 if(r1->refbehind.b[z] & bb) 1109 paint1(r1, bn); 1110 r = r->s1; 1111 if(r == R) 1112 break; 1113 if(r->act.b[z] & bb) 1114 break; 1115 if(!(r->refbehind.b[z] & bb)) 1116 break; 1117 } 1118 } 1119 1120 uint32 1121 regset(Reg *r, uint32 bb) 1122 { 1123 uint32 b, set; 1124 Adr v; 1125 int c; 1126 1127 set = 0; 1128 v = zprog.from; 1129 while(b = bb & ~(bb-1)) { 1130 v.type = BtoR(b); 1131 c = copyu(r->prog, &v, A); 1132 if(c == 3) 1133 set |= b; 1134 bb &= ~b; 1135 } 1136 return set; 1137 } 1138 1139 uint32 1140 reguse(Reg *r, uint32 bb) 1141 { 1142 uint32 b, set; 1143 Adr v; 1144 int c; 1145 1146 set = 0; 1147 v = zprog.from; 1148 while(b = bb & ~(bb-1)) { 1149 v.type = BtoR(b); 1150 c = copyu(r->prog, &v, A); 1151 if(c == 1 || c == 2 || c == 4) 1152 set |= b; 1153 bb &= ~b; 1154 } 1155 return set; 1156 } 1157 1158 uint32 1159 paint2(Reg *r, int bn) 1160 { 1161 Reg *r1; 1162 int z; 1163 uint32 bb, vreg, x; 1164 1165 z = bn/32; 1166 bb = 1L << (bn%32); 1167 vreg = regbits; 1168 if(!(r->act.b[z] & bb)) 1169 return vreg; 1170 for(;;) { 1171 if(!(r->refbehind.b[z] & bb)) 1172 break; 1173 r1 = r->p1; 1174 if(r1 == R) 1175 break; 1176 if(!(r1->refahead.b[z] & bb)) 1177 break; 1178 if(!(r1->act.b[z] & bb)) 1179 break; 1180 r = r1; 1181 } 1182 for(;;) { 1183 r->act.b[z] &= ~bb; 1184 1185 vreg |= r->regu; 1186 1187 if(r->refbehind.b[z] & bb) 1188 for(r1 = r->p2; r1 != R; r1 = r1->p2link) 1189 if(r1->refahead.b[z] & bb) 1190 vreg |= paint2(r1, bn); 1191 1192 if(!(r->refahead.b[z] & bb)) 1193 break; 1194 r1 = r->s2; 1195 if(r1 != R) 1196 if(r1->refbehind.b[z] & bb) 1197 vreg |= paint2(r1, bn); 1198 r = r->s1; 1199 if(r == R) 1200 break; 1201 if(!(r->act.b[z] & bb)) 1202 break; 1203 if(!(r->refbehind.b[z] & bb)) 1204 break; 1205 } 1206 1207 bb = vreg; 1208 for(; r; r=r->s1) { 1209 x = r->regu & ~bb; 1210 if(x) { 1211 vreg |= reguse(r, x); 1212 bb |= regset(r, x); 1213 } 1214 } 1215 return vreg; 1216 } 1217 1218 void 1219 paint3(Reg *r, int bn, int32 rb, int rn) 1220 { 1221 Reg *r1; 1222 Prog *p; 1223 int z; 1224 uint32 bb; 1225 1226 z = bn/32; 1227 bb = 1L << (bn%32); 1228 if(r->act.b[z] & bb) 1229 return; 1230 for(;;) { 1231 if(!(r->refbehind.b[z] & bb)) 1232 break; 1233 r1 = r->p1; 1234 if(r1 == R) 1235 break; 1236 if(!(r1->refahead.b[z] & bb)) 1237 break; 1238 if(r1->act.b[z] & bb) 1239 break; 1240 r = r1; 1241 } 1242 1243 if(LOAD(r) & ~(r->set.b[z] & ~(r->use1.b[z]|r->use2.b[z])) & bb) 1244 addmove(r, bn, rn, 0); 1245 for(;;) { 1246 r->act.b[z] |= bb; 1247 p = r->prog; 1248 1249 if(r->use1.b[z] & bb) { 1250 if(debug['R']) 1251 print("%P", p); 1252 addreg(&p->from, rn); 1253 if(debug['R']) 1254 print("\t.c%P\n", p); 1255 } 1256 if((r->use2.b[z]|r->set.b[z]) & bb) { 1257 if(debug['R']) 1258 print("%P", p); 1259 addreg(&p->to, rn); 1260 if(debug['R']) 1261 print("\t.c%P\n", p); 1262 } 1263 1264 if(STORE(r) & r->regdiff.b[z] & bb) 1265 addmove(r, bn, rn, 1); 1266 r->regu |= rb; 1267 1268 if(r->refbehind.b[z] & bb) 1269 for(r1 = r->p2; r1 != R; r1 = r1->p2link) 1270 if(r1->refahead.b[z] & bb) 1271 paint3(r1, bn, rb, rn); 1272 1273 if(!(r->refahead.b[z] & bb)) 1274 break; 1275 r1 = r->s2; 1276 if(r1 != R) 1277 if(r1->refbehind.b[z] & bb) 1278 paint3(r1, bn, rb, rn); 1279 r = r->s1; 1280 if(r == R) 1281 break; 1282 if(r->act.b[z] & bb) 1283 break; 1284 if(!(r->refbehind.b[z] & bb)) 1285 break; 1286 } 1287 } 1288 1289 void 1290 addreg(Adr *a, int rn) 1291 { 1292 1293 a->sym = 0; 1294 a->offset = 0; 1295 a->type = rn; 1296 } 1297 1298 int32 1299 RtoB(int r) 1300 { 1301 1302 if(r < D_AX || r > D_DI) 1303 return 0; 1304 return 1L << (r-D_AX); 1305 } 1306 1307 int 1308 BtoR(int32 b) 1309 { 1310 1311 b &= 0xffL; 1312 if(b == 0) 1313 return 0; 1314 return bitno(b) + D_AX; 1315 } 1316 1317 /* what instruction does a JMP to p eventually land on? */ 1318 static Reg* 1319 chasejmp(Reg *r, int *jmploop) 1320 { 1321 int n; 1322 1323 n = 0; 1324 for(; r; r=r->s2) { 1325 if(r->prog->as != AJMP || r->prog->to.type != D_BRANCH) 1326 break; 1327 if(++n > 10) { 1328 *jmploop = 1; 1329 break; 1330 } 1331 } 1332 return r; 1333 } 1334 1335 /* mark all code reachable from firstp as alive */ 1336 static void 1337 mark(Reg *firstr) 1338 { 1339 Reg *r; 1340 Prog *p; 1341 1342 for(r=firstr; r; r=r->link) { 1343 if(r->active) 1344 break; 1345 r->active = 1; 1346 p = r->prog; 1347 if(p->as != ACALL && p->to.type == D_BRANCH) 1348 mark(r->s2); 1349 if(p->as == AJMP || p->as == ARET || p->as == AUNDEF) 1350 break; 1351 } 1352 } 1353 1354 /* 1355 * the code generator depends on being able to write out JMP 1356 * instructions that it can jump to now but fill in later. 1357 * the linker will resolve them nicely, but they make the code 1358 * longer and more difficult to follow during debugging. 1359 * remove them. 1360 */ 1361 static void 1362 fixjmp(Reg *firstr) 1363 { 1364 int jmploop; 1365 Reg *r; 1366 Prog *p; 1367 1368 if(debug['R'] && debug['v']) 1369 print("\nfixjmp\n"); 1370 1371 // pass 1: resolve jump to AJMP, mark all code as dead. 1372 jmploop = 0; 1373 for(r=firstr; r; r=r->link) { 1374 p = r->prog; 1375 if(debug['R'] && debug['v']) 1376 print("%04d %P\n", r->pc, p); 1377 if(p->as != ACALL && p->to.type == D_BRANCH && r->s2 && r->s2->prog->as == AJMP) { 1378 r->s2 = chasejmp(r->s2, &jmploop); 1379 p->to.offset = r->s2->pc; 1380 if(debug['R'] && debug['v']) 1381 print("->%P\n", p); 1382 } 1383 r->active = 0; 1384 } 1385 if(debug['R'] && debug['v']) 1386 print("\n"); 1387 1388 // pass 2: mark all reachable code alive 1389 mark(firstr); 1390 1391 // pass 3: delete dead code (mostly JMPs). 1392 for(r=firstr; r; r=r->link) { 1393 if(!r->active) { 1394 p = r->prog; 1395 if(p->link == P && p->as == ARET && r->p1 && r->p1->prog->as != ARET) { 1396 // This is the final ARET, and the code so far doesn't have one. 1397 // Let it stay. 1398 } else { 1399 if(debug['R'] && debug['v']) 1400 print("del %04d %P\n", r->pc, p); 1401 p->as = ANOP; 1402 } 1403 } 1404 } 1405 1406 // pass 4: elide JMP to next instruction. 1407 // only safe if there are no jumps to JMPs anymore. 1408 if(!jmploop) { 1409 for(r=firstr; r; r=r->link) { 1410 p = r->prog; 1411 if(p->as == AJMP && p->to.type == D_BRANCH && r->s2 == r->link) { 1412 if(debug['R'] && debug['v']) 1413 print("del %04d %P\n", r->pc, p); 1414 p->as = ANOP; 1415 } 1416 } 1417 } 1418 1419 // fix back pointers. 1420 for(r=firstr; r; r=r->link) { 1421 r->p2 = R; 1422 r->p2link = R; 1423 } 1424 for(r=firstr; r; r=r->link) { 1425 if(r->s2) { 1426 r->p2link = r->s2->p2; 1427 r->s2->p2 = r; 1428 } 1429 } 1430 1431 if(debug['R'] && debug['v']) { 1432 print("\n"); 1433 for(r=firstr; r; r=r->link) 1434 print("%04d %P\n", r->pc, r->prog); 1435 print("\n"); 1436 } 1437 } 1438