github.com/tetratelabs/wazero@v1.7.3-0.20240513003603-48f702e154b5/internal/engine/wazevo/backend/isa/amd64/reg.go (about)

     1  package amd64
     2  
     3  import (
     4  	"fmt"
     5  
     6  	"github.com/tetratelabs/wazero/internal/engine/wazevo/backend/regalloc"
     7  )
     8  
     9  // Amd64-specific registers.
    10  const (
    11  	// rax is a gp register.
    12  	rax = regalloc.RealRegInvalid + 1 + iota
    13  	// rcx is a gp register.
    14  	rcx
    15  	// rdx is a gp register.
    16  	rdx
    17  	// rbx is a gp register.
    18  	rbx
    19  	// rsp is a gp register.
    20  	rsp
    21  	// rbp is a gp register.
    22  	rbp
    23  	// rsi is a gp register.
    24  	rsi
    25  	// rdi is a gp register.
    26  	rdi
    27  	// r8 is a gp register.
    28  	r8
    29  	// r9 is a gp register.
    30  	r9
    31  	// r10 is a gp register.
    32  	r10
    33  	// r11 is a gp register.
    34  	r11
    35  	// r12 is a gp register.
    36  	r12
    37  	// r13 is a gp register.
    38  	r13
    39  	// r14 is a gp register.
    40  	r14
    41  	// r15 is a gp register.
    42  	r15
    43  
    44  	// xmm0 is a vector register.
    45  	xmm0
    46  	// xmm1 is a vector register.
    47  	xmm1
    48  	// xmm2 is a vector register.
    49  	xmm2
    50  	// xmm3 is a vector register.
    51  	xmm3
    52  	// xmm4 is a vector register.
    53  	xmm4
    54  	// xmm5 is a vector register.
    55  	xmm5
    56  	// xmm6 is a vector register.
    57  	xmm6
    58  	// xmm7 is a vector register.
    59  	xmm7
    60  	// xmm8 is a vector register.
    61  	xmm8
    62  	// xmm9 is a vector register.
    63  	xmm9
    64  	// xmm10 is a vector register.
    65  	xmm10
    66  	// xmm11 is a vector register.
    67  	xmm11
    68  	// xmm12 is a vector register.
    69  	xmm12
    70  	// xmm13 is a vector register.
    71  	xmm13
    72  	// xmm14 is a vector register.
    73  	xmm14
    74  	// xmm15 is a vector register.
    75  	xmm15
    76  )
    77  
    78  var (
    79  	raxVReg = regalloc.FromRealReg(rax, regalloc.RegTypeInt)
    80  	rcxVReg = regalloc.FromRealReg(rcx, regalloc.RegTypeInt)
    81  	rdxVReg = regalloc.FromRealReg(rdx, regalloc.RegTypeInt)
    82  	rbxVReg = regalloc.FromRealReg(rbx, regalloc.RegTypeInt)
    83  	rspVReg = regalloc.FromRealReg(rsp, regalloc.RegTypeInt)
    84  	rbpVReg = regalloc.FromRealReg(rbp, regalloc.RegTypeInt)
    85  	rsiVReg = regalloc.FromRealReg(rsi, regalloc.RegTypeInt)
    86  	rdiVReg = regalloc.FromRealReg(rdi, regalloc.RegTypeInt)
    87  	r8VReg  = regalloc.FromRealReg(r8, regalloc.RegTypeInt)
    88  	r9VReg  = regalloc.FromRealReg(r9, regalloc.RegTypeInt)
    89  	r10VReg = regalloc.FromRealReg(r10, regalloc.RegTypeInt)
    90  	r11VReg = regalloc.FromRealReg(r11, regalloc.RegTypeInt)
    91  	r12VReg = regalloc.FromRealReg(r12, regalloc.RegTypeInt)
    92  	r13VReg = regalloc.FromRealReg(r13, regalloc.RegTypeInt)
    93  	r14VReg = regalloc.FromRealReg(r14, regalloc.RegTypeInt)
    94  	r15VReg = regalloc.FromRealReg(r15, regalloc.RegTypeInt)
    95  
    96  	xmm0VReg  = regalloc.FromRealReg(xmm0, regalloc.RegTypeFloat)
    97  	xmm1VReg  = regalloc.FromRealReg(xmm1, regalloc.RegTypeFloat)
    98  	xmm2VReg  = regalloc.FromRealReg(xmm2, regalloc.RegTypeFloat)
    99  	xmm3VReg  = regalloc.FromRealReg(xmm3, regalloc.RegTypeFloat)
   100  	xmm4VReg  = regalloc.FromRealReg(xmm4, regalloc.RegTypeFloat)
   101  	xmm5VReg  = regalloc.FromRealReg(xmm5, regalloc.RegTypeFloat)
   102  	xmm6VReg  = regalloc.FromRealReg(xmm6, regalloc.RegTypeFloat)
   103  	xmm7VReg  = regalloc.FromRealReg(xmm7, regalloc.RegTypeFloat)
   104  	xmm8VReg  = regalloc.FromRealReg(xmm8, regalloc.RegTypeFloat)
   105  	xmm9VReg  = regalloc.FromRealReg(xmm9, regalloc.RegTypeFloat)
   106  	xmm10VReg = regalloc.FromRealReg(xmm10, regalloc.RegTypeFloat)
   107  	xmm11VReg = regalloc.FromRealReg(xmm11, regalloc.RegTypeFloat)
   108  	xmm12VReg = regalloc.FromRealReg(xmm12, regalloc.RegTypeFloat)
   109  	xmm13VReg = regalloc.FromRealReg(xmm13, regalloc.RegTypeFloat)
   110  	xmm14VReg = regalloc.FromRealReg(xmm14, regalloc.RegTypeFloat)
   111  	xmm15VReg = regalloc.FromRealReg(xmm15, regalloc.RegTypeFloat)
   112  )
   113  
   114  var regNames = [...]string{
   115  	rax:   "rax",
   116  	rcx:   "rcx",
   117  	rdx:   "rdx",
   118  	rbx:   "rbx",
   119  	rsp:   "rsp",
   120  	rbp:   "rbp",
   121  	rsi:   "rsi",
   122  	rdi:   "rdi",
   123  	r8:    "r8",
   124  	r9:    "r9",
   125  	r10:   "r10",
   126  	r11:   "r11",
   127  	r12:   "r12",
   128  	r13:   "r13",
   129  	r14:   "r14",
   130  	r15:   "r15",
   131  	xmm0:  "xmm0",
   132  	xmm1:  "xmm1",
   133  	xmm2:  "xmm2",
   134  	xmm3:  "xmm3",
   135  	xmm4:  "xmm4",
   136  	xmm5:  "xmm5",
   137  	xmm6:  "xmm6",
   138  	xmm7:  "xmm7",
   139  	xmm8:  "xmm8",
   140  	xmm9:  "xmm9",
   141  	xmm10: "xmm10",
   142  	xmm11: "xmm11",
   143  	xmm12: "xmm12",
   144  	xmm13: "xmm13",
   145  	xmm14: "xmm14",
   146  	xmm15: "xmm15",
   147  }
   148  
   149  func formatVRegSized(r regalloc.VReg, _64 bool) string {
   150  	if r.IsRealReg() {
   151  		if r.RegType() == regalloc.RegTypeInt {
   152  			rr := r.RealReg()
   153  			orig := regNames[rr]
   154  			if rr <= rdi {
   155  				if _64 {
   156  					return "%" + orig
   157  				} else {
   158  					return "%e" + orig[1:]
   159  				}
   160  			} else {
   161  				if _64 {
   162  					return "%" + orig
   163  				} else {
   164  					return "%" + orig + "d"
   165  				}
   166  			}
   167  		} else {
   168  			return "%" + regNames[r.RealReg()]
   169  		}
   170  	} else {
   171  		if r.RegType() == regalloc.RegTypeInt {
   172  			if _64 {
   173  				return fmt.Sprintf("%%r%d?", r.ID())
   174  			} else {
   175  				return fmt.Sprintf("%%r%dd?", r.ID())
   176  			}
   177  		} else {
   178  			return fmt.Sprintf("%%xmm%d?", r.ID())
   179  		}
   180  	}
   181  }