github.com/tetratelabs/wazero@v1.7.3-0.20240513003603-48f702e154b5/internal/engine/wazevo/backend/isa/arm64/instr_test.go (about) 1 package arm64 2 3 import ( 4 "math" 5 "testing" 6 7 "github.com/tetratelabs/wazero/internal/engine/wazevo/backend/regalloc" 8 "github.com/tetratelabs/wazero/internal/testing/require" 9 ) 10 11 func TestInstruction_String(t *testing.T) { 12 for _, tc := range []struct { 13 i *instruction 14 exp string 15 }{ 16 { 17 i: &instruction{ 18 kind: condBr, 19 u1: eq.asCond().asUint64(), 20 u2: uint64(label(1)), 21 }, 22 exp: "b.eq L1", 23 }, 24 { 25 i: &instruction{ 26 kind: condBr, 27 u1: ne.asCond().asUint64(), 28 u2: uint64(label(100)), 29 }, 30 exp: "b.ne L100", 31 }, 32 { 33 i: &instruction{ 34 kind: condBr, 35 u1: registerAsRegZeroCond(regToVReg(x0)).asUint64(), 36 u2: uint64(label(100)), 37 }, 38 exp: "cbz w0, (L100)", 39 }, 40 { 41 i: &instruction{ 42 kind: condBr, 43 u1: registerAsRegNotZeroCond(regToVReg(x29)).asUint64(), 44 u2: uint64(label(50)), 45 }, 46 exp: "cbnz w29, L50", 47 }, 48 { 49 i: &instruction{ 50 kind: loadFpuConst32, 51 u1: uint64(math.Float32bits(3.0)), 52 rd: operandNR(regalloc.VReg(0).SetRegType(regalloc.RegTypeFloat)), 53 }, 54 exp: "ldr s0?, #8; b 8; data.f32 3.000000", 55 }, 56 { 57 i: &instruction{ 58 kind: loadFpuConst64, 59 u1: math.Float64bits(12345.987491), 60 rd: operandNR(regalloc.VReg(0).SetRegType(regalloc.RegTypeFloat)), 61 }, 62 exp: "ldr d0?, #8; b 16; data.f64 12345.987491", 63 }, 64 {exp: "nop0", i: &instruction{kind: nop0}}, 65 {exp: "b L0", i: &instruction{kind: br, u1: uint64(label(0))}}, 66 } { 67 t.Run(tc.exp, func(t *testing.T) { require.Equal(t, tc.exp, tc.i.String()) }) 68 } 69 } 70 71 func TestInstruction_isCopy(t *testing.T) { 72 require.False(t, (&instruction{kind: mov32}).IsCopy()) 73 require.True(t, (&instruction{kind: mov64}).IsCopy()) 74 require.True(t, (&instruction{kind: fpuMov64}).IsCopy()) 75 require.True(t, (&instruction{kind: fpuMov128}).IsCopy()) 76 }