github.com/tidwall/go@v0.0.0-20170415222209-6694a6888b7d/src/cmd/compile/internal/ssa/rewriteMIPS.go (about)

     1  // Code generated from gen/MIPS.rules; DO NOT EDIT.
     2  // generated with: cd gen; go run *.go
     3  
     4  package ssa
     5  
     6  import "math"
     7  import "cmd/internal/obj"
     8  
     9  var _ = math.MinInt8 // in case not otherwise used
    10  var _ = obj.ANOP     // in case not otherwise used
    11  func rewriteValueMIPS(v *Value) bool {
    12  	switch v.Op {
    13  	case OpAdd16:
    14  		return rewriteValueMIPS_OpAdd16(v)
    15  	case OpAdd32:
    16  		return rewriteValueMIPS_OpAdd32(v)
    17  	case OpAdd32F:
    18  		return rewriteValueMIPS_OpAdd32F(v)
    19  	case OpAdd32withcarry:
    20  		return rewriteValueMIPS_OpAdd32withcarry(v)
    21  	case OpAdd64F:
    22  		return rewriteValueMIPS_OpAdd64F(v)
    23  	case OpAdd8:
    24  		return rewriteValueMIPS_OpAdd8(v)
    25  	case OpAddPtr:
    26  		return rewriteValueMIPS_OpAddPtr(v)
    27  	case OpAddr:
    28  		return rewriteValueMIPS_OpAddr(v)
    29  	case OpAnd16:
    30  		return rewriteValueMIPS_OpAnd16(v)
    31  	case OpAnd32:
    32  		return rewriteValueMIPS_OpAnd32(v)
    33  	case OpAnd8:
    34  		return rewriteValueMIPS_OpAnd8(v)
    35  	case OpAndB:
    36  		return rewriteValueMIPS_OpAndB(v)
    37  	case OpAtomicAdd32:
    38  		return rewriteValueMIPS_OpAtomicAdd32(v)
    39  	case OpAtomicAnd8:
    40  		return rewriteValueMIPS_OpAtomicAnd8(v)
    41  	case OpAtomicCompareAndSwap32:
    42  		return rewriteValueMIPS_OpAtomicCompareAndSwap32(v)
    43  	case OpAtomicExchange32:
    44  		return rewriteValueMIPS_OpAtomicExchange32(v)
    45  	case OpAtomicLoad32:
    46  		return rewriteValueMIPS_OpAtomicLoad32(v)
    47  	case OpAtomicLoadPtr:
    48  		return rewriteValueMIPS_OpAtomicLoadPtr(v)
    49  	case OpAtomicOr8:
    50  		return rewriteValueMIPS_OpAtomicOr8(v)
    51  	case OpAtomicStore32:
    52  		return rewriteValueMIPS_OpAtomicStore32(v)
    53  	case OpAtomicStorePtrNoWB:
    54  		return rewriteValueMIPS_OpAtomicStorePtrNoWB(v)
    55  	case OpAvg32u:
    56  		return rewriteValueMIPS_OpAvg32u(v)
    57  	case OpBitLen32:
    58  		return rewriteValueMIPS_OpBitLen32(v)
    59  	case OpClosureCall:
    60  		return rewriteValueMIPS_OpClosureCall(v)
    61  	case OpCom16:
    62  		return rewriteValueMIPS_OpCom16(v)
    63  	case OpCom32:
    64  		return rewriteValueMIPS_OpCom32(v)
    65  	case OpCom8:
    66  		return rewriteValueMIPS_OpCom8(v)
    67  	case OpConst16:
    68  		return rewriteValueMIPS_OpConst16(v)
    69  	case OpConst32:
    70  		return rewriteValueMIPS_OpConst32(v)
    71  	case OpConst32F:
    72  		return rewriteValueMIPS_OpConst32F(v)
    73  	case OpConst64F:
    74  		return rewriteValueMIPS_OpConst64F(v)
    75  	case OpConst8:
    76  		return rewriteValueMIPS_OpConst8(v)
    77  	case OpConstBool:
    78  		return rewriteValueMIPS_OpConstBool(v)
    79  	case OpConstNil:
    80  		return rewriteValueMIPS_OpConstNil(v)
    81  	case OpConvert:
    82  		return rewriteValueMIPS_OpConvert(v)
    83  	case OpCtz32:
    84  		return rewriteValueMIPS_OpCtz32(v)
    85  	case OpCvt32Fto32:
    86  		return rewriteValueMIPS_OpCvt32Fto32(v)
    87  	case OpCvt32Fto64F:
    88  		return rewriteValueMIPS_OpCvt32Fto64F(v)
    89  	case OpCvt32to32F:
    90  		return rewriteValueMIPS_OpCvt32to32F(v)
    91  	case OpCvt32to64F:
    92  		return rewriteValueMIPS_OpCvt32to64F(v)
    93  	case OpCvt64Fto32:
    94  		return rewriteValueMIPS_OpCvt64Fto32(v)
    95  	case OpCvt64Fto32F:
    96  		return rewriteValueMIPS_OpCvt64Fto32F(v)
    97  	case OpDiv16:
    98  		return rewriteValueMIPS_OpDiv16(v)
    99  	case OpDiv16u:
   100  		return rewriteValueMIPS_OpDiv16u(v)
   101  	case OpDiv32:
   102  		return rewriteValueMIPS_OpDiv32(v)
   103  	case OpDiv32F:
   104  		return rewriteValueMIPS_OpDiv32F(v)
   105  	case OpDiv32u:
   106  		return rewriteValueMIPS_OpDiv32u(v)
   107  	case OpDiv64F:
   108  		return rewriteValueMIPS_OpDiv64F(v)
   109  	case OpDiv8:
   110  		return rewriteValueMIPS_OpDiv8(v)
   111  	case OpDiv8u:
   112  		return rewriteValueMIPS_OpDiv8u(v)
   113  	case OpEq16:
   114  		return rewriteValueMIPS_OpEq16(v)
   115  	case OpEq32:
   116  		return rewriteValueMIPS_OpEq32(v)
   117  	case OpEq32F:
   118  		return rewriteValueMIPS_OpEq32F(v)
   119  	case OpEq64F:
   120  		return rewriteValueMIPS_OpEq64F(v)
   121  	case OpEq8:
   122  		return rewriteValueMIPS_OpEq8(v)
   123  	case OpEqB:
   124  		return rewriteValueMIPS_OpEqB(v)
   125  	case OpEqPtr:
   126  		return rewriteValueMIPS_OpEqPtr(v)
   127  	case OpGeq16:
   128  		return rewriteValueMIPS_OpGeq16(v)
   129  	case OpGeq16U:
   130  		return rewriteValueMIPS_OpGeq16U(v)
   131  	case OpGeq32:
   132  		return rewriteValueMIPS_OpGeq32(v)
   133  	case OpGeq32F:
   134  		return rewriteValueMIPS_OpGeq32F(v)
   135  	case OpGeq32U:
   136  		return rewriteValueMIPS_OpGeq32U(v)
   137  	case OpGeq64F:
   138  		return rewriteValueMIPS_OpGeq64F(v)
   139  	case OpGeq8:
   140  		return rewriteValueMIPS_OpGeq8(v)
   141  	case OpGeq8U:
   142  		return rewriteValueMIPS_OpGeq8U(v)
   143  	case OpGetClosurePtr:
   144  		return rewriteValueMIPS_OpGetClosurePtr(v)
   145  	case OpGreater16:
   146  		return rewriteValueMIPS_OpGreater16(v)
   147  	case OpGreater16U:
   148  		return rewriteValueMIPS_OpGreater16U(v)
   149  	case OpGreater32:
   150  		return rewriteValueMIPS_OpGreater32(v)
   151  	case OpGreater32F:
   152  		return rewriteValueMIPS_OpGreater32F(v)
   153  	case OpGreater32U:
   154  		return rewriteValueMIPS_OpGreater32U(v)
   155  	case OpGreater64F:
   156  		return rewriteValueMIPS_OpGreater64F(v)
   157  	case OpGreater8:
   158  		return rewriteValueMIPS_OpGreater8(v)
   159  	case OpGreater8U:
   160  		return rewriteValueMIPS_OpGreater8U(v)
   161  	case OpHmul32:
   162  		return rewriteValueMIPS_OpHmul32(v)
   163  	case OpHmul32u:
   164  		return rewriteValueMIPS_OpHmul32u(v)
   165  	case OpInterCall:
   166  		return rewriteValueMIPS_OpInterCall(v)
   167  	case OpIsInBounds:
   168  		return rewriteValueMIPS_OpIsInBounds(v)
   169  	case OpIsNonNil:
   170  		return rewriteValueMIPS_OpIsNonNil(v)
   171  	case OpIsSliceInBounds:
   172  		return rewriteValueMIPS_OpIsSliceInBounds(v)
   173  	case OpLeq16:
   174  		return rewriteValueMIPS_OpLeq16(v)
   175  	case OpLeq16U:
   176  		return rewriteValueMIPS_OpLeq16U(v)
   177  	case OpLeq32:
   178  		return rewriteValueMIPS_OpLeq32(v)
   179  	case OpLeq32F:
   180  		return rewriteValueMIPS_OpLeq32F(v)
   181  	case OpLeq32U:
   182  		return rewriteValueMIPS_OpLeq32U(v)
   183  	case OpLeq64F:
   184  		return rewriteValueMIPS_OpLeq64F(v)
   185  	case OpLeq8:
   186  		return rewriteValueMIPS_OpLeq8(v)
   187  	case OpLeq8U:
   188  		return rewriteValueMIPS_OpLeq8U(v)
   189  	case OpLess16:
   190  		return rewriteValueMIPS_OpLess16(v)
   191  	case OpLess16U:
   192  		return rewriteValueMIPS_OpLess16U(v)
   193  	case OpLess32:
   194  		return rewriteValueMIPS_OpLess32(v)
   195  	case OpLess32F:
   196  		return rewriteValueMIPS_OpLess32F(v)
   197  	case OpLess32U:
   198  		return rewriteValueMIPS_OpLess32U(v)
   199  	case OpLess64F:
   200  		return rewriteValueMIPS_OpLess64F(v)
   201  	case OpLess8:
   202  		return rewriteValueMIPS_OpLess8(v)
   203  	case OpLess8U:
   204  		return rewriteValueMIPS_OpLess8U(v)
   205  	case OpLoad:
   206  		return rewriteValueMIPS_OpLoad(v)
   207  	case OpLsh16x16:
   208  		return rewriteValueMIPS_OpLsh16x16(v)
   209  	case OpLsh16x32:
   210  		return rewriteValueMIPS_OpLsh16x32(v)
   211  	case OpLsh16x64:
   212  		return rewriteValueMIPS_OpLsh16x64(v)
   213  	case OpLsh16x8:
   214  		return rewriteValueMIPS_OpLsh16x8(v)
   215  	case OpLsh32x16:
   216  		return rewriteValueMIPS_OpLsh32x16(v)
   217  	case OpLsh32x32:
   218  		return rewriteValueMIPS_OpLsh32x32(v)
   219  	case OpLsh32x64:
   220  		return rewriteValueMIPS_OpLsh32x64(v)
   221  	case OpLsh32x8:
   222  		return rewriteValueMIPS_OpLsh32x8(v)
   223  	case OpLsh8x16:
   224  		return rewriteValueMIPS_OpLsh8x16(v)
   225  	case OpLsh8x32:
   226  		return rewriteValueMIPS_OpLsh8x32(v)
   227  	case OpLsh8x64:
   228  		return rewriteValueMIPS_OpLsh8x64(v)
   229  	case OpLsh8x8:
   230  		return rewriteValueMIPS_OpLsh8x8(v)
   231  	case OpMIPSADD:
   232  		return rewriteValueMIPS_OpMIPSADD(v)
   233  	case OpMIPSADDconst:
   234  		return rewriteValueMIPS_OpMIPSADDconst(v)
   235  	case OpMIPSAND:
   236  		return rewriteValueMIPS_OpMIPSAND(v)
   237  	case OpMIPSANDconst:
   238  		return rewriteValueMIPS_OpMIPSANDconst(v)
   239  	case OpMIPSCMOVZ:
   240  		return rewriteValueMIPS_OpMIPSCMOVZ(v)
   241  	case OpMIPSCMOVZzero:
   242  		return rewriteValueMIPS_OpMIPSCMOVZzero(v)
   243  	case OpMIPSLoweredAtomicAdd:
   244  		return rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v)
   245  	case OpMIPSLoweredAtomicStore:
   246  		return rewriteValueMIPS_OpMIPSLoweredAtomicStore(v)
   247  	case OpMIPSMOVBUload:
   248  		return rewriteValueMIPS_OpMIPSMOVBUload(v)
   249  	case OpMIPSMOVBUreg:
   250  		return rewriteValueMIPS_OpMIPSMOVBUreg(v)
   251  	case OpMIPSMOVBload:
   252  		return rewriteValueMIPS_OpMIPSMOVBload(v)
   253  	case OpMIPSMOVBreg:
   254  		return rewriteValueMIPS_OpMIPSMOVBreg(v)
   255  	case OpMIPSMOVBstore:
   256  		return rewriteValueMIPS_OpMIPSMOVBstore(v)
   257  	case OpMIPSMOVBstorezero:
   258  		return rewriteValueMIPS_OpMIPSMOVBstorezero(v)
   259  	case OpMIPSMOVDload:
   260  		return rewriteValueMIPS_OpMIPSMOVDload(v)
   261  	case OpMIPSMOVDstore:
   262  		return rewriteValueMIPS_OpMIPSMOVDstore(v)
   263  	case OpMIPSMOVFload:
   264  		return rewriteValueMIPS_OpMIPSMOVFload(v)
   265  	case OpMIPSMOVFstore:
   266  		return rewriteValueMIPS_OpMIPSMOVFstore(v)
   267  	case OpMIPSMOVHUload:
   268  		return rewriteValueMIPS_OpMIPSMOVHUload(v)
   269  	case OpMIPSMOVHUreg:
   270  		return rewriteValueMIPS_OpMIPSMOVHUreg(v)
   271  	case OpMIPSMOVHload:
   272  		return rewriteValueMIPS_OpMIPSMOVHload(v)
   273  	case OpMIPSMOVHreg:
   274  		return rewriteValueMIPS_OpMIPSMOVHreg(v)
   275  	case OpMIPSMOVHstore:
   276  		return rewriteValueMIPS_OpMIPSMOVHstore(v)
   277  	case OpMIPSMOVHstorezero:
   278  		return rewriteValueMIPS_OpMIPSMOVHstorezero(v)
   279  	case OpMIPSMOVWload:
   280  		return rewriteValueMIPS_OpMIPSMOVWload(v)
   281  	case OpMIPSMOVWreg:
   282  		return rewriteValueMIPS_OpMIPSMOVWreg(v)
   283  	case OpMIPSMOVWstore:
   284  		return rewriteValueMIPS_OpMIPSMOVWstore(v)
   285  	case OpMIPSMOVWstorezero:
   286  		return rewriteValueMIPS_OpMIPSMOVWstorezero(v)
   287  	case OpMIPSMUL:
   288  		return rewriteValueMIPS_OpMIPSMUL(v)
   289  	case OpMIPSNEG:
   290  		return rewriteValueMIPS_OpMIPSNEG(v)
   291  	case OpMIPSNOR:
   292  		return rewriteValueMIPS_OpMIPSNOR(v)
   293  	case OpMIPSNORconst:
   294  		return rewriteValueMIPS_OpMIPSNORconst(v)
   295  	case OpMIPSOR:
   296  		return rewriteValueMIPS_OpMIPSOR(v)
   297  	case OpMIPSORconst:
   298  		return rewriteValueMIPS_OpMIPSORconst(v)
   299  	case OpMIPSSGT:
   300  		return rewriteValueMIPS_OpMIPSSGT(v)
   301  	case OpMIPSSGTU:
   302  		return rewriteValueMIPS_OpMIPSSGTU(v)
   303  	case OpMIPSSGTUconst:
   304  		return rewriteValueMIPS_OpMIPSSGTUconst(v)
   305  	case OpMIPSSGTUzero:
   306  		return rewriteValueMIPS_OpMIPSSGTUzero(v)
   307  	case OpMIPSSGTconst:
   308  		return rewriteValueMIPS_OpMIPSSGTconst(v)
   309  	case OpMIPSSGTzero:
   310  		return rewriteValueMIPS_OpMIPSSGTzero(v)
   311  	case OpMIPSSLL:
   312  		return rewriteValueMIPS_OpMIPSSLL(v)
   313  	case OpMIPSSLLconst:
   314  		return rewriteValueMIPS_OpMIPSSLLconst(v)
   315  	case OpMIPSSRA:
   316  		return rewriteValueMIPS_OpMIPSSRA(v)
   317  	case OpMIPSSRAconst:
   318  		return rewriteValueMIPS_OpMIPSSRAconst(v)
   319  	case OpMIPSSRL:
   320  		return rewriteValueMIPS_OpMIPSSRL(v)
   321  	case OpMIPSSRLconst:
   322  		return rewriteValueMIPS_OpMIPSSRLconst(v)
   323  	case OpMIPSSUB:
   324  		return rewriteValueMIPS_OpMIPSSUB(v)
   325  	case OpMIPSSUBconst:
   326  		return rewriteValueMIPS_OpMIPSSUBconst(v)
   327  	case OpMIPSXOR:
   328  		return rewriteValueMIPS_OpMIPSXOR(v)
   329  	case OpMIPSXORconst:
   330  		return rewriteValueMIPS_OpMIPSXORconst(v)
   331  	case OpMod16:
   332  		return rewriteValueMIPS_OpMod16(v)
   333  	case OpMod16u:
   334  		return rewriteValueMIPS_OpMod16u(v)
   335  	case OpMod32:
   336  		return rewriteValueMIPS_OpMod32(v)
   337  	case OpMod32u:
   338  		return rewriteValueMIPS_OpMod32u(v)
   339  	case OpMod8:
   340  		return rewriteValueMIPS_OpMod8(v)
   341  	case OpMod8u:
   342  		return rewriteValueMIPS_OpMod8u(v)
   343  	case OpMove:
   344  		return rewriteValueMIPS_OpMove(v)
   345  	case OpMul16:
   346  		return rewriteValueMIPS_OpMul16(v)
   347  	case OpMul32:
   348  		return rewriteValueMIPS_OpMul32(v)
   349  	case OpMul32F:
   350  		return rewriteValueMIPS_OpMul32F(v)
   351  	case OpMul32uhilo:
   352  		return rewriteValueMIPS_OpMul32uhilo(v)
   353  	case OpMul64F:
   354  		return rewriteValueMIPS_OpMul64F(v)
   355  	case OpMul8:
   356  		return rewriteValueMIPS_OpMul8(v)
   357  	case OpNeg16:
   358  		return rewriteValueMIPS_OpNeg16(v)
   359  	case OpNeg32:
   360  		return rewriteValueMIPS_OpNeg32(v)
   361  	case OpNeg32F:
   362  		return rewriteValueMIPS_OpNeg32F(v)
   363  	case OpNeg64F:
   364  		return rewriteValueMIPS_OpNeg64F(v)
   365  	case OpNeg8:
   366  		return rewriteValueMIPS_OpNeg8(v)
   367  	case OpNeq16:
   368  		return rewriteValueMIPS_OpNeq16(v)
   369  	case OpNeq32:
   370  		return rewriteValueMIPS_OpNeq32(v)
   371  	case OpNeq32F:
   372  		return rewriteValueMIPS_OpNeq32F(v)
   373  	case OpNeq64F:
   374  		return rewriteValueMIPS_OpNeq64F(v)
   375  	case OpNeq8:
   376  		return rewriteValueMIPS_OpNeq8(v)
   377  	case OpNeqB:
   378  		return rewriteValueMIPS_OpNeqB(v)
   379  	case OpNeqPtr:
   380  		return rewriteValueMIPS_OpNeqPtr(v)
   381  	case OpNilCheck:
   382  		return rewriteValueMIPS_OpNilCheck(v)
   383  	case OpNot:
   384  		return rewriteValueMIPS_OpNot(v)
   385  	case OpOffPtr:
   386  		return rewriteValueMIPS_OpOffPtr(v)
   387  	case OpOr16:
   388  		return rewriteValueMIPS_OpOr16(v)
   389  	case OpOr32:
   390  		return rewriteValueMIPS_OpOr32(v)
   391  	case OpOr8:
   392  		return rewriteValueMIPS_OpOr8(v)
   393  	case OpOrB:
   394  		return rewriteValueMIPS_OpOrB(v)
   395  	case OpRound32F:
   396  		return rewriteValueMIPS_OpRound32F(v)
   397  	case OpRound64F:
   398  		return rewriteValueMIPS_OpRound64F(v)
   399  	case OpRsh16Ux16:
   400  		return rewriteValueMIPS_OpRsh16Ux16(v)
   401  	case OpRsh16Ux32:
   402  		return rewriteValueMIPS_OpRsh16Ux32(v)
   403  	case OpRsh16Ux64:
   404  		return rewriteValueMIPS_OpRsh16Ux64(v)
   405  	case OpRsh16Ux8:
   406  		return rewriteValueMIPS_OpRsh16Ux8(v)
   407  	case OpRsh16x16:
   408  		return rewriteValueMIPS_OpRsh16x16(v)
   409  	case OpRsh16x32:
   410  		return rewriteValueMIPS_OpRsh16x32(v)
   411  	case OpRsh16x64:
   412  		return rewriteValueMIPS_OpRsh16x64(v)
   413  	case OpRsh16x8:
   414  		return rewriteValueMIPS_OpRsh16x8(v)
   415  	case OpRsh32Ux16:
   416  		return rewriteValueMIPS_OpRsh32Ux16(v)
   417  	case OpRsh32Ux32:
   418  		return rewriteValueMIPS_OpRsh32Ux32(v)
   419  	case OpRsh32Ux64:
   420  		return rewriteValueMIPS_OpRsh32Ux64(v)
   421  	case OpRsh32Ux8:
   422  		return rewriteValueMIPS_OpRsh32Ux8(v)
   423  	case OpRsh32x16:
   424  		return rewriteValueMIPS_OpRsh32x16(v)
   425  	case OpRsh32x32:
   426  		return rewriteValueMIPS_OpRsh32x32(v)
   427  	case OpRsh32x64:
   428  		return rewriteValueMIPS_OpRsh32x64(v)
   429  	case OpRsh32x8:
   430  		return rewriteValueMIPS_OpRsh32x8(v)
   431  	case OpRsh8Ux16:
   432  		return rewriteValueMIPS_OpRsh8Ux16(v)
   433  	case OpRsh8Ux32:
   434  		return rewriteValueMIPS_OpRsh8Ux32(v)
   435  	case OpRsh8Ux64:
   436  		return rewriteValueMIPS_OpRsh8Ux64(v)
   437  	case OpRsh8Ux8:
   438  		return rewriteValueMIPS_OpRsh8Ux8(v)
   439  	case OpRsh8x16:
   440  		return rewriteValueMIPS_OpRsh8x16(v)
   441  	case OpRsh8x32:
   442  		return rewriteValueMIPS_OpRsh8x32(v)
   443  	case OpRsh8x64:
   444  		return rewriteValueMIPS_OpRsh8x64(v)
   445  	case OpRsh8x8:
   446  		return rewriteValueMIPS_OpRsh8x8(v)
   447  	case OpSelect0:
   448  		return rewriteValueMIPS_OpSelect0(v)
   449  	case OpSelect1:
   450  		return rewriteValueMIPS_OpSelect1(v)
   451  	case OpSignExt16to32:
   452  		return rewriteValueMIPS_OpSignExt16to32(v)
   453  	case OpSignExt8to16:
   454  		return rewriteValueMIPS_OpSignExt8to16(v)
   455  	case OpSignExt8to32:
   456  		return rewriteValueMIPS_OpSignExt8to32(v)
   457  	case OpSignmask:
   458  		return rewriteValueMIPS_OpSignmask(v)
   459  	case OpSlicemask:
   460  		return rewriteValueMIPS_OpSlicemask(v)
   461  	case OpSqrt:
   462  		return rewriteValueMIPS_OpSqrt(v)
   463  	case OpStaticCall:
   464  		return rewriteValueMIPS_OpStaticCall(v)
   465  	case OpStore:
   466  		return rewriteValueMIPS_OpStore(v)
   467  	case OpSub16:
   468  		return rewriteValueMIPS_OpSub16(v)
   469  	case OpSub32:
   470  		return rewriteValueMIPS_OpSub32(v)
   471  	case OpSub32F:
   472  		return rewriteValueMIPS_OpSub32F(v)
   473  	case OpSub32withcarry:
   474  		return rewriteValueMIPS_OpSub32withcarry(v)
   475  	case OpSub64F:
   476  		return rewriteValueMIPS_OpSub64F(v)
   477  	case OpSub8:
   478  		return rewriteValueMIPS_OpSub8(v)
   479  	case OpSubPtr:
   480  		return rewriteValueMIPS_OpSubPtr(v)
   481  	case OpTrunc16to8:
   482  		return rewriteValueMIPS_OpTrunc16to8(v)
   483  	case OpTrunc32to16:
   484  		return rewriteValueMIPS_OpTrunc32to16(v)
   485  	case OpTrunc32to8:
   486  		return rewriteValueMIPS_OpTrunc32to8(v)
   487  	case OpXor16:
   488  		return rewriteValueMIPS_OpXor16(v)
   489  	case OpXor32:
   490  		return rewriteValueMIPS_OpXor32(v)
   491  	case OpXor8:
   492  		return rewriteValueMIPS_OpXor8(v)
   493  	case OpZero:
   494  		return rewriteValueMIPS_OpZero(v)
   495  	case OpZeroExt16to32:
   496  		return rewriteValueMIPS_OpZeroExt16to32(v)
   497  	case OpZeroExt8to16:
   498  		return rewriteValueMIPS_OpZeroExt8to16(v)
   499  	case OpZeroExt8to32:
   500  		return rewriteValueMIPS_OpZeroExt8to32(v)
   501  	case OpZeromask:
   502  		return rewriteValueMIPS_OpZeromask(v)
   503  	}
   504  	return false
   505  }
   506  func rewriteValueMIPS_OpAdd16(v *Value) bool {
   507  	// match: (Add16 x y)
   508  	// cond:
   509  	// result: (ADD x y)
   510  	for {
   511  		x := v.Args[0]
   512  		y := v.Args[1]
   513  		v.reset(OpMIPSADD)
   514  		v.AddArg(x)
   515  		v.AddArg(y)
   516  		return true
   517  	}
   518  }
   519  func rewriteValueMIPS_OpAdd32(v *Value) bool {
   520  	// match: (Add32 x y)
   521  	// cond:
   522  	// result: (ADD x y)
   523  	for {
   524  		x := v.Args[0]
   525  		y := v.Args[1]
   526  		v.reset(OpMIPSADD)
   527  		v.AddArg(x)
   528  		v.AddArg(y)
   529  		return true
   530  	}
   531  }
   532  func rewriteValueMIPS_OpAdd32F(v *Value) bool {
   533  	// match: (Add32F x y)
   534  	// cond:
   535  	// result: (ADDF x y)
   536  	for {
   537  		x := v.Args[0]
   538  		y := v.Args[1]
   539  		v.reset(OpMIPSADDF)
   540  		v.AddArg(x)
   541  		v.AddArg(y)
   542  		return true
   543  	}
   544  }
   545  func rewriteValueMIPS_OpAdd32withcarry(v *Value) bool {
   546  	b := v.Block
   547  	_ = b
   548  	// match: (Add32withcarry <t> x y c)
   549  	// cond:
   550  	// result: (ADD c (ADD <t> x y))
   551  	for {
   552  		t := v.Type
   553  		x := v.Args[0]
   554  		y := v.Args[1]
   555  		c := v.Args[2]
   556  		v.reset(OpMIPSADD)
   557  		v.AddArg(c)
   558  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
   559  		v0.AddArg(x)
   560  		v0.AddArg(y)
   561  		v.AddArg(v0)
   562  		return true
   563  	}
   564  }
   565  func rewriteValueMIPS_OpAdd64F(v *Value) bool {
   566  	// match: (Add64F x y)
   567  	// cond:
   568  	// result: (ADDD x y)
   569  	for {
   570  		x := v.Args[0]
   571  		y := v.Args[1]
   572  		v.reset(OpMIPSADDD)
   573  		v.AddArg(x)
   574  		v.AddArg(y)
   575  		return true
   576  	}
   577  }
   578  func rewriteValueMIPS_OpAdd8(v *Value) bool {
   579  	// match: (Add8 x y)
   580  	// cond:
   581  	// result: (ADD x y)
   582  	for {
   583  		x := v.Args[0]
   584  		y := v.Args[1]
   585  		v.reset(OpMIPSADD)
   586  		v.AddArg(x)
   587  		v.AddArg(y)
   588  		return true
   589  	}
   590  }
   591  func rewriteValueMIPS_OpAddPtr(v *Value) bool {
   592  	// match: (AddPtr x y)
   593  	// cond:
   594  	// result: (ADD x y)
   595  	for {
   596  		x := v.Args[0]
   597  		y := v.Args[1]
   598  		v.reset(OpMIPSADD)
   599  		v.AddArg(x)
   600  		v.AddArg(y)
   601  		return true
   602  	}
   603  }
   604  func rewriteValueMIPS_OpAddr(v *Value) bool {
   605  	// match: (Addr {sym} base)
   606  	// cond:
   607  	// result: (MOVWaddr {sym} base)
   608  	for {
   609  		sym := v.Aux
   610  		base := v.Args[0]
   611  		v.reset(OpMIPSMOVWaddr)
   612  		v.Aux = sym
   613  		v.AddArg(base)
   614  		return true
   615  	}
   616  }
   617  func rewriteValueMIPS_OpAnd16(v *Value) bool {
   618  	// match: (And16 x y)
   619  	// cond:
   620  	// result: (AND x y)
   621  	for {
   622  		x := v.Args[0]
   623  		y := v.Args[1]
   624  		v.reset(OpMIPSAND)
   625  		v.AddArg(x)
   626  		v.AddArg(y)
   627  		return true
   628  	}
   629  }
   630  func rewriteValueMIPS_OpAnd32(v *Value) bool {
   631  	// match: (And32 x y)
   632  	// cond:
   633  	// result: (AND x y)
   634  	for {
   635  		x := v.Args[0]
   636  		y := v.Args[1]
   637  		v.reset(OpMIPSAND)
   638  		v.AddArg(x)
   639  		v.AddArg(y)
   640  		return true
   641  	}
   642  }
   643  func rewriteValueMIPS_OpAnd8(v *Value) bool {
   644  	// match: (And8 x y)
   645  	// cond:
   646  	// result: (AND x y)
   647  	for {
   648  		x := v.Args[0]
   649  		y := v.Args[1]
   650  		v.reset(OpMIPSAND)
   651  		v.AddArg(x)
   652  		v.AddArg(y)
   653  		return true
   654  	}
   655  }
   656  func rewriteValueMIPS_OpAndB(v *Value) bool {
   657  	// match: (AndB x y)
   658  	// cond:
   659  	// result: (AND x y)
   660  	for {
   661  		x := v.Args[0]
   662  		y := v.Args[1]
   663  		v.reset(OpMIPSAND)
   664  		v.AddArg(x)
   665  		v.AddArg(y)
   666  		return true
   667  	}
   668  }
   669  func rewriteValueMIPS_OpAtomicAdd32(v *Value) bool {
   670  	// match: (AtomicAdd32 ptr val mem)
   671  	// cond:
   672  	// result: (LoweredAtomicAdd ptr val mem)
   673  	for {
   674  		ptr := v.Args[0]
   675  		val := v.Args[1]
   676  		mem := v.Args[2]
   677  		v.reset(OpMIPSLoweredAtomicAdd)
   678  		v.AddArg(ptr)
   679  		v.AddArg(val)
   680  		v.AddArg(mem)
   681  		return true
   682  	}
   683  }
   684  func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
   685  	b := v.Block
   686  	_ = b
   687  	config := b.Func.Config
   688  	_ = config
   689  	types := &b.Func.Config.Types
   690  	_ = types
   691  	// match: (AtomicAnd8 ptr val mem)
   692  	// cond: !config.BigEndian
   693  	// result: (LoweredAtomicAnd (AND <types.UInt32Ptr> (MOVWconst [^3]) ptr) 		(OR <types.UInt32> (SLL <types.UInt32> (ZeroExt8to32 val) 			(SLLconst <types.UInt32> [3] 				(ANDconst  <types.UInt32> [3] ptr))) 		(NORconst [0] <types.UInt32> (SLL <types.UInt32> 			(MOVWconst [0xff]) (SLLconst <types.UInt32> [3] 				(ANDconst <types.UInt32> [3] ptr))))) mem)
   694  	for {
   695  		ptr := v.Args[0]
   696  		val := v.Args[1]
   697  		mem := v.Args[2]
   698  		if !(!config.BigEndian) {
   699  			break
   700  		}
   701  		v.reset(OpMIPSLoweredAtomicAnd)
   702  		v0 := b.NewValue0(v.Pos, OpMIPSAND, types.UInt32Ptr)
   703  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
   704  		v1.AuxInt = ^3
   705  		v0.AddArg(v1)
   706  		v0.AddArg(ptr)
   707  		v.AddArg(v0)
   708  		v2 := b.NewValue0(v.Pos, OpMIPSOR, types.UInt32)
   709  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
   710  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
   711  		v4.AddArg(val)
   712  		v3.AddArg(v4)
   713  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
   714  		v5.AuxInt = 3
   715  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
   716  		v6.AuxInt = 3
   717  		v6.AddArg(ptr)
   718  		v5.AddArg(v6)
   719  		v3.AddArg(v5)
   720  		v2.AddArg(v3)
   721  		v7 := b.NewValue0(v.Pos, OpMIPSNORconst, types.UInt32)
   722  		v7.AuxInt = 0
   723  		v8 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
   724  		v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
   725  		v9.AuxInt = 0xff
   726  		v8.AddArg(v9)
   727  		v10 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
   728  		v10.AuxInt = 3
   729  		v11 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
   730  		v11.AuxInt = 3
   731  		v11.AddArg(ptr)
   732  		v10.AddArg(v11)
   733  		v8.AddArg(v10)
   734  		v7.AddArg(v8)
   735  		v2.AddArg(v7)
   736  		v.AddArg(v2)
   737  		v.AddArg(mem)
   738  		return true
   739  	}
   740  	// match: (AtomicAnd8 ptr val mem)
   741  	// cond: config.BigEndian
   742  	// result: (LoweredAtomicAnd (AND <types.UInt32Ptr> (MOVWconst [^3]) ptr) 		(OR <types.UInt32> (SLL <types.UInt32> (ZeroExt8to32 val) 			(SLLconst <types.UInt32> [3] 				(ANDconst  <types.UInt32> [3] 					(XORconst <types.UInt32> [3] ptr)))) 		(NORconst [0] <types.UInt32> (SLL <types.UInt32> 			(MOVWconst [0xff]) (SLLconst <types.UInt32> [3] 				(ANDconst <types.UInt32> [3] 					(XORconst <types.UInt32> [3] ptr)))))) mem)
   743  	for {
   744  		ptr := v.Args[0]
   745  		val := v.Args[1]
   746  		mem := v.Args[2]
   747  		if !(config.BigEndian) {
   748  			break
   749  		}
   750  		v.reset(OpMIPSLoweredAtomicAnd)
   751  		v0 := b.NewValue0(v.Pos, OpMIPSAND, types.UInt32Ptr)
   752  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
   753  		v1.AuxInt = ^3
   754  		v0.AddArg(v1)
   755  		v0.AddArg(ptr)
   756  		v.AddArg(v0)
   757  		v2 := b.NewValue0(v.Pos, OpMIPSOR, types.UInt32)
   758  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
   759  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
   760  		v4.AddArg(val)
   761  		v3.AddArg(v4)
   762  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
   763  		v5.AuxInt = 3
   764  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
   765  		v6.AuxInt = 3
   766  		v7 := b.NewValue0(v.Pos, OpMIPSXORconst, types.UInt32)
   767  		v7.AuxInt = 3
   768  		v7.AddArg(ptr)
   769  		v6.AddArg(v7)
   770  		v5.AddArg(v6)
   771  		v3.AddArg(v5)
   772  		v2.AddArg(v3)
   773  		v8 := b.NewValue0(v.Pos, OpMIPSNORconst, types.UInt32)
   774  		v8.AuxInt = 0
   775  		v9 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
   776  		v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
   777  		v10.AuxInt = 0xff
   778  		v9.AddArg(v10)
   779  		v11 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
   780  		v11.AuxInt = 3
   781  		v12 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
   782  		v12.AuxInt = 3
   783  		v13 := b.NewValue0(v.Pos, OpMIPSXORconst, types.UInt32)
   784  		v13.AuxInt = 3
   785  		v13.AddArg(ptr)
   786  		v12.AddArg(v13)
   787  		v11.AddArg(v12)
   788  		v9.AddArg(v11)
   789  		v8.AddArg(v9)
   790  		v2.AddArg(v8)
   791  		v.AddArg(v2)
   792  		v.AddArg(mem)
   793  		return true
   794  	}
   795  	return false
   796  }
   797  func rewriteValueMIPS_OpAtomicCompareAndSwap32(v *Value) bool {
   798  	// match: (AtomicCompareAndSwap32 ptr old new_ mem)
   799  	// cond:
   800  	// result: (LoweredAtomicCas ptr old new_ mem)
   801  	for {
   802  		ptr := v.Args[0]
   803  		old := v.Args[1]
   804  		new_ := v.Args[2]
   805  		mem := v.Args[3]
   806  		v.reset(OpMIPSLoweredAtomicCas)
   807  		v.AddArg(ptr)
   808  		v.AddArg(old)
   809  		v.AddArg(new_)
   810  		v.AddArg(mem)
   811  		return true
   812  	}
   813  }
   814  func rewriteValueMIPS_OpAtomicExchange32(v *Value) bool {
   815  	// match: (AtomicExchange32 ptr val mem)
   816  	// cond:
   817  	// result: (LoweredAtomicExchange ptr val mem)
   818  	for {
   819  		ptr := v.Args[0]
   820  		val := v.Args[1]
   821  		mem := v.Args[2]
   822  		v.reset(OpMIPSLoweredAtomicExchange)
   823  		v.AddArg(ptr)
   824  		v.AddArg(val)
   825  		v.AddArg(mem)
   826  		return true
   827  	}
   828  }
   829  func rewriteValueMIPS_OpAtomicLoad32(v *Value) bool {
   830  	// match: (AtomicLoad32 ptr mem)
   831  	// cond:
   832  	// result: (LoweredAtomicLoad ptr mem)
   833  	for {
   834  		ptr := v.Args[0]
   835  		mem := v.Args[1]
   836  		v.reset(OpMIPSLoweredAtomicLoad)
   837  		v.AddArg(ptr)
   838  		v.AddArg(mem)
   839  		return true
   840  	}
   841  }
   842  func rewriteValueMIPS_OpAtomicLoadPtr(v *Value) bool {
   843  	// match: (AtomicLoadPtr ptr mem)
   844  	// cond:
   845  	// result: (LoweredAtomicLoad  ptr mem)
   846  	for {
   847  		ptr := v.Args[0]
   848  		mem := v.Args[1]
   849  		v.reset(OpMIPSLoweredAtomicLoad)
   850  		v.AddArg(ptr)
   851  		v.AddArg(mem)
   852  		return true
   853  	}
   854  }
   855  func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
   856  	b := v.Block
   857  	_ = b
   858  	config := b.Func.Config
   859  	_ = config
   860  	types := &b.Func.Config.Types
   861  	_ = types
   862  	// match: (AtomicOr8 ptr val mem)
   863  	// cond: !config.BigEndian
   864  	// result: (LoweredAtomicOr (AND <types.UInt32Ptr> (MOVWconst [^3]) ptr) 		(SLL <types.UInt32> (ZeroExt8to32 val) 			(SLLconst <types.UInt32> [3] 				(ANDconst <types.UInt32> [3] ptr))) mem)
   865  	for {
   866  		ptr := v.Args[0]
   867  		val := v.Args[1]
   868  		mem := v.Args[2]
   869  		if !(!config.BigEndian) {
   870  			break
   871  		}
   872  		v.reset(OpMIPSLoweredAtomicOr)
   873  		v0 := b.NewValue0(v.Pos, OpMIPSAND, types.UInt32Ptr)
   874  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
   875  		v1.AuxInt = ^3
   876  		v0.AddArg(v1)
   877  		v0.AddArg(ptr)
   878  		v.AddArg(v0)
   879  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
   880  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
   881  		v3.AddArg(val)
   882  		v2.AddArg(v3)
   883  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
   884  		v4.AuxInt = 3
   885  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
   886  		v5.AuxInt = 3
   887  		v5.AddArg(ptr)
   888  		v4.AddArg(v5)
   889  		v2.AddArg(v4)
   890  		v.AddArg(v2)
   891  		v.AddArg(mem)
   892  		return true
   893  	}
   894  	// match: (AtomicOr8 ptr val mem)
   895  	// cond: config.BigEndian
   896  	// result: (LoweredAtomicOr (AND <types.UInt32Ptr> (MOVWconst [^3]) ptr) 		(SLL <types.UInt32> (ZeroExt8to32 val) 			(SLLconst <types.UInt32> [3] 				(ANDconst <types.UInt32> [3] 					(XORconst <types.UInt32> [3] ptr)))) mem)
   897  	for {
   898  		ptr := v.Args[0]
   899  		val := v.Args[1]
   900  		mem := v.Args[2]
   901  		if !(config.BigEndian) {
   902  			break
   903  		}
   904  		v.reset(OpMIPSLoweredAtomicOr)
   905  		v0 := b.NewValue0(v.Pos, OpMIPSAND, types.UInt32Ptr)
   906  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
   907  		v1.AuxInt = ^3
   908  		v0.AddArg(v1)
   909  		v0.AddArg(ptr)
   910  		v.AddArg(v0)
   911  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
   912  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
   913  		v3.AddArg(val)
   914  		v2.AddArg(v3)
   915  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
   916  		v4.AuxInt = 3
   917  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
   918  		v5.AuxInt = 3
   919  		v6 := b.NewValue0(v.Pos, OpMIPSXORconst, types.UInt32)
   920  		v6.AuxInt = 3
   921  		v6.AddArg(ptr)
   922  		v5.AddArg(v6)
   923  		v4.AddArg(v5)
   924  		v2.AddArg(v4)
   925  		v.AddArg(v2)
   926  		v.AddArg(mem)
   927  		return true
   928  	}
   929  	return false
   930  }
   931  func rewriteValueMIPS_OpAtomicStore32(v *Value) bool {
   932  	// match: (AtomicStore32 ptr val mem)
   933  	// cond:
   934  	// result: (LoweredAtomicStore ptr val mem)
   935  	for {
   936  		ptr := v.Args[0]
   937  		val := v.Args[1]
   938  		mem := v.Args[2]
   939  		v.reset(OpMIPSLoweredAtomicStore)
   940  		v.AddArg(ptr)
   941  		v.AddArg(val)
   942  		v.AddArg(mem)
   943  		return true
   944  	}
   945  }
   946  func rewriteValueMIPS_OpAtomicStorePtrNoWB(v *Value) bool {
   947  	// match: (AtomicStorePtrNoWB ptr val mem)
   948  	// cond:
   949  	// result: (LoweredAtomicStore  ptr val mem)
   950  	for {
   951  		ptr := v.Args[0]
   952  		val := v.Args[1]
   953  		mem := v.Args[2]
   954  		v.reset(OpMIPSLoweredAtomicStore)
   955  		v.AddArg(ptr)
   956  		v.AddArg(val)
   957  		v.AddArg(mem)
   958  		return true
   959  	}
   960  }
   961  func rewriteValueMIPS_OpAvg32u(v *Value) bool {
   962  	b := v.Block
   963  	_ = b
   964  	// match: (Avg32u <t> x y)
   965  	// cond:
   966  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
   967  	for {
   968  		t := v.Type
   969  		x := v.Args[0]
   970  		y := v.Args[1]
   971  		v.reset(OpMIPSADD)
   972  		v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
   973  		v0.AuxInt = 1
   974  		v1 := b.NewValue0(v.Pos, OpMIPSSUB, t)
   975  		v1.AddArg(x)
   976  		v1.AddArg(y)
   977  		v0.AddArg(v1)
   978  		v.AddArg(v0)
   979  		v.AddArg(y)
   980  		return true
   981  	}
   982  }
   983  func rewriteValueMIPS_OpBitLen32(v *Value) bool {
   984  	b := v.Block
   985  	_ = b
   986  	types := &b.Func.Config.Types
   987  	_ = types
   988  	// match: (BitLen32 <t> x)
   989  	// cond:
   990  	// result: (SUB (MOVWconst [32]) (CLZ <t> x))
   991  	for {
   992  		t := v.Type
   993  		x := v.Args[0]
   994  		v.reset(OpMIPSSUB)
   995  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
   996  		v0.AuxInt = 32
   997  		v.AddArg(v0)
   998  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   999  		v1.AddArg(x)
  1000  		v.AddArg(v1)
  1001  		return true
  1002  	}
  1003  }
  1004  func rewriteValueMIPS_OpClosureCall(v *Value) bool {
  1005  	// match: (ClosureCall [argwid] entry closure mem)
  1006  	// cond:
  1007  	// result: (CALLclosure [argwid] entry closure mem)
  1008  	for {
  1009  		argwid := v.AuxInt
  1010  		entry := v.Args[0]
  1011  		closure := v.Args[1]
  1012  		mem := v.Args[2]
  1013  		v.reset(OpMIPSCALLclosure)
  1014  		v.AuxInt = argwid
  1015  		v.AddArg(entry)
  1016  		v.AddArg(closure)
  1017  		v.AddArg(mem)
  1018  		return true
  1019  	}
  1020  }
  1021  func rewriteValueMIPS_OpCom16(v *Value) bool {
  1022  	// match: (Com16 x)
  1023  	// cond:
  1024  	// result: (NORconst [0] x)
  1025  	for {
  1026  		x := v.Args[0]
  1027  		v.reset(OpMIPSNORconst)
  1028  		v.AuxInt = 0
  1029  		v.AddArg(x)
  1030  		return true
  1031  	}
  1032  }
  1033  func rewriteValueMIPS_OpCom32(v *Value) bool {
  1034  	// match: (Com32 x)
  1035  	// cond:
  1036  	// result: (NORconst [0] x)
  1037  	for {
  1038  		x := v.Args[0]
  1039  		v.reset(OpMIPSNORconst)
  1040  		v.AuxInt = 0
  1041  		v.AddArg(x)
  1042  		return true
  1043  	}
  1044  }
  1045  func rewriteValueMIPS_OpCom8(v *Value) bool {
  1046  	// match: (Com8 x)
  1047  	// cond:
  1048  	// result: (NORconst [0] x)
  1049  	for {
  1050  		x := v.Args[0]
  1051  		v.reset(OpMIPSNORconst)
  1052  		v.AuxInt = 0
  1053  		v.AddArg(x)
  1054  		return true
  1055  	}
  1056  }
  1057  func rewriteValueMIPS_OpConst16(v *Value) bool {
  1058  	// match: (Const16 [val])
  1059  	// cond:
  1060  	// result: (MOVWconst [val])
  1061  	for {
  1062  		val := v.AuxInt
  1063  		v.reset(OpMIPSMOVWconst)
  1064  		v.AuxInt = val
  1065  		return true
  1066  	}
  1067  }
  1068  func rewriteValueMIPS_OpConst32(v *Value) bool {
  1069  	// match: (Const32 [val])
  1070  	// cond:
  1071  	// result: (MOVWconst [val])
  1072  	for {
  1073  		val := v.AuxInt
  1074  		v.reset(OpMIPSMOVWconst)
  1075  		v.AuxInt = val
  1076  		return true
  1077  	}
  1078  }
  1079  func rewriteValueMIPS_OpConst32F(v *Value) bool {
  1080  	// match: (Const32F [val])
  1081  	// cond:
  1082  	// result: (MOVFconst [val])
  1083  	for {
  1084  		val := v.AuxInt
  1085  		v.reset(OpMIPSMOVFconst)
  1086  		v.AuxInt = val
  1087  		return true
  1088  	}
  1089  }
  1090  func rewriteValueMIPS_OpConst64F(v *Value) bool {
  1091  	// match: (Const64F [val])
  1092  	// cond:
  1093  	// result: (MOVDconst [val])
  1094  	for {
  1095  		val := v.AuxInt
  1096  		v.reset(OpMIPSMOVDconst)
  1097  		v.AuxInt = val
  1098  		return true
  1099  	}
  1100  }
  1101  func rewriteValueMIPS_OpConst8(v *Value) bool {
  1102  	// match: (Const8 [val])
  1103  	// cond:
  1104  	// result: (MOVWconst [val])
  1105  	for {
  1106  		val := v.AuxInt
  1107  		v.reset(OpMIPSMOVWconst)
  1108  		v.AuxInt = val
  1109  		return true
  1110  	}
  1111  }
  1112  func rewriteValueMIPS_OpConstBool(v *Value) bool {
  1113  	// match: (ConstBool [b])
  1114  	// cond:
  1115  	// result: (MOVWconst [b])
  1116  	for {
  1117  		b := v.AuxInt
  1118  		v.reset(OpMIPSMOVWconst)
  1119  		v.AuxInt = b
  1120  		return true
  1121  	}
  1122  }
  1123  func rewriteValueMIPS_OpConstNil(v *Value) bool {
  1124  	// match: (ConstNil)
  1125  	// cond:
  1126  	// result: (MOVWconst [0])
  1127  	for {
  1128  		v.reset(OpMIPSMOVWconst)
  1129  		v.AuxInt = 0
  1130  		return true
  1131  	}
  1132  }
  1133  func rewriteValueMIPS_OpConvert(v *Value) bool {
  1134  	// match: (Convert x mem)
  1135  	// cond:
  1136  	// result: (MOVWconvert x mem)
  1137  	for {
  1138  		x := v.Args[0]
  1139  		mem := v.Args[1]
  1140  		v.reset(OpMIPSMOVWconvert)
  1141  		v.AddArg(x)
  1142  		v.AddArg(mem)
  1143  		return true
  1144  	}
  1145  }
  1146  func rewriteValueMIPS_OpCtz32(v *Value) bool {
  1147  	b := v.Block
  1148  	_ = b
  1149  	types := &b.Func.Config.Types
  1150  	_ = types
  1151  	// match: (Ctz32 <t> x)
  1152  	// cond:
  1153  	// result: (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
  1154  	for {
  1155  		t := v.Type
  1156  		x := v.Args[0]
  1157  		v.reset(OpMIPSSUB)
  1158  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  1159  		v0.AuxInt = 32
  1160  		v.AddArg(v0)
  1161  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
  1162  		v2 := b.NewValue0(v.Pos, OpMIPSSUBconst, t)
  1163  		v2.AuxInt = 1
  1164  		v3 := b.NewValue0(v.Pos, OpMIPSAND, t)
  1165  		v3.AddArg(x)
  1166  		v4 := b.NewValue0(v.Pos, OpMIPSNEG, t)
  1167  		v4.AddArg(x)
  1168  		v3.AddArg(v4)
  1169  		v2.AddArg(v3)
  1170  		v1.AddArg(v2)
  1171  		v.AddArg(v1)
  1172  		return true
  1173  	}
  1174  }
  1175  func rewriteValueMIPS_OpCvt32Fto32(v *Value) bool {
  1176  	// match: (Cvt32Fto32 x)
  1177  	// cond:
  1178  	// result: (TRUNCFW x)
  1179  	for {
  1180  		x := v.Args[0]
  1181  		v.reset(OpMIPSTRUNCFW)
  1182  		v.AddArg(x)
  1183  		return true
  1184  	}
  1185  }
  1186  func rewriteValueMIPS_OpCvt32Fto64F(v *Value) bool {
  1187  	// match: (Cvt32Fto64F x)
  1188  	// cond:
  1189  	// result: (MOVFD x)
  1190  	for {
  1191  		x := v.Args[0]
  1192  		v.reset(OpMIPSMOVFD)
  1193  		v.AddArg(x)
  1194  		return true
  1195  	}
  1196  }
  1197  func rewriteValueMIPS_OpCvt32to32F(v *Value) bool {
  1198  	// match: (Cvt32to32F x)
  1199  	// cond:
  1200  	// result: (MOVWF x)
  1201  	for {
  1202  		x := v.Args[0]
  1203  		v.reset(OpMIPSMOVWF)
  1204  		v.AddArg(x)
  1205  		return true
  1206  	}
  1207  }
  1208  func rewriteValueMIPS_OpCvt32to64F(v *Value) bool {
  1209  	// match: (Cvt32to64F x)
  1210  	// cond:
  1211  	// result: (MOVWD x)
  1212  	for {
  1213  		x := v.Args[0]
  1214  		v.reset(OpMIPSMOVWD)
  1215  		v.AddArg(x)
  1216  		return true
  1217  	}
  1218  }
  1219  func rewriteValueMIPS_OpCvt64Fto32(v *Value) bool {
  1220  	// match: (Cvt64Fto32 x)
  1221  	// cond:
  1222  	// result: (TRUNCDW x)
  1223  	for {
  1224  		x := v.Args[0]
  1225  		v.reset(OpMIPSTRUNCDW)
  1226  		v.AddArg(x)
  1227  		return true
  1228  	}
  1229  }
  1230  func rewriteValueMIPS_OpCvt64Fto32F(v *Value) bool {
  1231  	// match: (Cvt64Fto32F x)
  1232  	// cond:
  1233  	// result: (MOVDF x)
  1234  	for {
  1235  		x := v.Args[0]
  1236  		v.reset(OpMIPSMOVDF)
  1237  		v.AddArg(x)
  1238  		return true
  1239  	}
  1240  }
  1241  func rewriteValueMIPS_OpDiv16(v *Value) bool {
  1242  	b := v.Block
  1243  	_ = b
  1244  	types := &b.Func.Config.Types
  1245  	_ = types
  1246  	// match: (Div16 x y)
  1247  	// cond:
  1248  	// result: (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  1249  	for {
  1250  		x := v.Args[0]
  1251  		y := v.Args[1]
  1252  		v.reset(OpSelect1)
  1253  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, MakeTuple(types.Int32, types.Int32))
  1254  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  1255  		v1.AddArg(x)
  1256  		v0.AddArg(v1)
  1257  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  1258  		v2.AddArg(y)
  1259  		v0.AddArg(v2)
  1260  		v.AddArg(v0)
  1261  		return true
  1262  	}
  1263  }
  1264  func rewriteValueMIPS_OpDiv16u(v *Value) bool {
  1265  	b := v.Block
  1266  	_ = b
  1267  	types := &b.Func.Config.Types
  1268  	_ = types
  1269  	// match: (Div16u x y)
  1270  	// cond:
  1271  	// result: (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1272  	for {
  1273  		x := v.Args[0]
  1274  		y := v.Args[1]
  1275  		v.reset(OpSelect1)
  1276  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, MakeTuple(types.UInt32, types.UInt32))
  1277  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  1278  		v1.AddArg(x)
  1279  		v0.AddArg(v1)
  1280  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  1281  		v2.AddArg(y)
  1282  		v0.AddArg(v2)
  1283  		v.AddArg(v0)
  1284  		return true
  1285  	}
  1286  }
  1287  func rewriteValueMIPS_OpDiv32(v *Value) bool {
  1288  	b := v.Block
  1289  	_ = b
  1290  	types := &b.Func.Config.Types
  1291  	_ = types
  1292  	// match: (Div32 x y)
  1293  	// cond:
  1294  	// result: (Select1 (DIV x y))
  1295  	for {
  1296  		x := v.Args[0]
  1297  		y := v.Args[1]
  1298  		v.reset(OpSelect1)
  1299  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, MakeTuple(types.Int32, types.Int32))
  1300  		v0.AddArg(x)
  1301  		v0.AddArg(y)
  1302  		v.AddArg(v0)
  1303  		return true
  1304  	}
  1305  }
  1306  func rewriteValueMIPS_OpDiv32F(v *Value) bool {
  1307  	// match: (Div32F x y)
  1308  	// cond:
  1309  	// result: (DIVF x y)
  1310  	for {
  1311  		x := v.Args[0]
  1312  		y := v.Args[1]
  1313  		v.reset(OpMIPSDIVF)
  1314  		v.AddArg(x)
  1315  		v.AddArg(y)
  1316  		return true
  1317  	}
  1318  }
  1319  func rewriteValueMIPS_OpDiv32u(v *Value) bool {
  1320  	b := v.Block
  1321  	_ = b
  1322  	types := &b.Func.Config.Types
  1323  	_ = types
  1324  	// match: (Div32u x y)
  1325  	// cond:
  1326  	// result: (Select1 (DIVU x y))
  1327  	for {
  1328  		x := v.Args[0]
  1329  		y := v.Args[1]
  1330  		v.reset(OpSelect1)
  1331  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, MakeTuple(types.UInt32, types.UInt32))
  1332  		v0.AddArg(x)
  1333  		v0.AddArg(y)
  1334  		v.AddArg(v0)
  1335  		return true
  1336  	}
  1337  }
  1338  func rewriteValueMIPS_OpDiv64F(v *Value) bool {
  1339  	// match: (Div64F x y)
  1340  	// cond:
  1341  	// result: (DIVD x y)
  1342  	for {
  1343  		x := v.Args[0]
  1344  		y := v.Args[1]
  1345  		v.reset(OpMIPSDIVD)
  1346  		v.AddArg(x)
  1347  		v.AddArg(y)
  1348  		return true
  1349  	}
  1350  }
  1351  func rewriteValueMIPS_OpDiv8(v *Value) bool {
  1352  	b := v.Block
  1353  	_ = b
  1354  	types := &b.Func.Config.Types
  1355  	_ = types
  1356  	// match: (Div8 x y)
  1357  	// cond:
  1358  	// result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  1359  	for {
  1360  		x := v.Args[0]
  1361  		y := v.Args[1]
  1362  		v.reset(OpSelect1)
  1363  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, MakeTuple(types.Int32, types.Int32))
  1364  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  1365  		v1.AddArg(x)
  1366  		v0.AddArg(v1)
  1367  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  1368  		v2.AddArg(y)
  1369  		v0.AddArg(v2)
  1370  		v.AddArg(v0)
  1371  		return true
  1372  	}
  1373  }
  1374  func rewriteValueMIPS_OpDiv8u(v *Value) bool {
  1375  	b := v.Block
  1376  	_ = b
  1377  	types := &b.Func.Config.Types
  1378  	_ = types
  1379  	// match: (Div8u x y)
  1380  	// cond:
  1381  	// result: (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1382  	for {
  1383  		x := v.Args[0]
  1384  		y := v.Args[1]
  1385  		v.reset(OpSelect1)
  1386  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, MakeTuple(types.UInt32, types.UInt32))
  1387  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  1388  		v1.AddArg(x)
  1389  		v0.AddArg(v1)
  1390  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  1391  		v2.AddArg(y)
  1392  		v0.AddArg(v2)
  1393  		v.AddArg(v0)
  1394  		return true
  1395  	}
  1396  }
  1397  func rewriteValueMIPS_OpEq16(v *Value) bool {
  1398  	b := v.Block
  1399  	_ = b
  1400  	types := &b.Func.Config.Types
  1401  	_ = types
  1402  	// match: (Eq16 x y)
  1403  	// cond:
  1404  	// result: (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1405  	for {
  1406  		x := v.Args[0]
  1407  		y := v.Args[1]
  1408  		v.reset(OpMIPSSGTUconst)
  1409  		v.AuxInt = 1
  1410  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, types.UInt32)
  1411  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  1412  		v1.AddArg(x)
  1413  		v0.AddArg(v1)
  1414  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  1415  		v2.AddArg(y)
  1416  		v0.AddArg(v2)
  1417  		v.AddArg(v0)
  1418  		return true
  1419  	}
  1420  }
  1421  func rewriteValueMIPS_OpEq32(v *Value) bool {
  1422  	b := v.Block
  1423  	_ = b
  1424  	types := &b.Func.Config.Types
  1425  	_ = types
  1426  	// match: (Eq32 x y)
  1427  	// cond:
  1428  	// result: (SGTUconst [1] (XOR x y))
  1429  	for {
  1430  		x := v.Args[0]
  1431  		y := v.Args[1]
  1432  		v.reset(OpMIPSSGTUconst)
  1433  		v.AuxInt = 1
  1434  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, types.UInt32)
  1435  		v0.AddArg(x)
  1436  		v0.AddArg(y)
  1437  		v.AddArg(v0)
  1438  		return true
  1439  	}
  1440  }
  1441  func rewriteValueMIPS_OpEq32F(v *Value) bool {
  1442  	b := v.Block
  1443  	_ = b
  1444  	// match: (Eq32F x y)
  1445  	// cond:
  1446  	// result: (FPFlagTrue (CMPEQF x y))
  1447  	for {
  1448  		x := v.Args[0]
  1449  		y := v.Args[1]
  1450  		v.reset(OpMIPSFPFlagTrue)
  1451  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, TypeFlags)
  1452  		v0.AddArg(x)
  1453  		v0.AddArg(y)
  1454  		v.AddArg(v0)
  1455  		return true
  1456  	}
  1457  }
  1458  func rewriteValueMIPS_OpEq64F(v *Value) bool {
  1459  	b := v.Block
  1460  	_ = b
  1461  	// match: (Eq64F x y)
  1462  	// cond:
  1463  	// result: (FPFlagTrue (CMPEQD x y))
  1464  	for {
  1465  		x := v.Args[0]
  1466  		y := v.Args[1]
  1467  		v.reset(OpMIPSFPFlagTrue)
  1468  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, TypeFlags)
  1469  		v0.AddArg(x)
  1470  		v0.AddArg(y)
  1471  		v.AddArg(v0)
  1472  		return true
  1473  	}
  1474  }
  1475  func rewriteValueMIPS_OpEq8(v *Value) bool {
  1476  	b := v.Block
  1477  	_ = b
  1478  	types := &b.Func.Config.Types
  1479  	_ = types
  1480  	// match: (Eq8 x y)
  1481  	// cond:
  1482  	// result: (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1483  	for {
  1484  		x := v.Args[0]
  1485  		y := v.Args[1]
  1486  		v.reset(OpMIPSSGTUconst)
  1487  		v.AuxInt = 1
  1488  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, types.UInt32)
  1489  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  1490  		v1.AddArg(x)
  1491  		v0.AddArg(v1)
  1492  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  1493  		v2.AddArg(y)
  1494  		v0.AddArg(v2)
  1495  		v.AddArg(v0)
  1496  		return true
  1497  	}
  1498  }
  1499  func rewriteValueMIPS_OpEqB(v *Value) bool {
  1500  	b := v.Block
  1501  	_ = b
  1502  	types := &b.Func.Config.Types
  1503  	_ = types
  1504  	// match: (EqB x y)
  1505  	// cond:
  1506  	// result: (XORconst [1] (XOR <types.Bool> x y))
  1507  	for {
  1508  		x := v.Args[0]
  1509  		y := v.Args[1]
  1510  		v.reset(OpMIPSXORconst)
  1511  		v.AuxInt = 1
  1512  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, types.Bool)
  1513  		v0.AddArg(x)
  1514  		v0.AddArg(y)
  1515  		v.AddArg(v0)
  1516  		return true
  1517  	}
  1518  }
  1519  func rewriteValueMIPS_OpEqPtr(v *Value) bool {
  1520  	b := v.Block
  1521  	_ = b
  1522  	types := &b.Func.Config.Types
  1523  	_ = types
  1524  	// match: (EqPtr x y)
  1525  	// cond:
  1526  	// result: (SGTUconst [1] (XOR x y))
  1527  	for {
  1528  		x := v.Args[0]
  1529  		y := v.Args[1]
  1530  		v.reset(OpMIPSSGTUconst)
  1531  		v.AuxInt = 1
  1532  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, types.UInt32)
  1533  		v0.AddArg(x)
  1534  		v0.AddArg(y)
  1535  		v.AddArg(v0)
  1536  		return true
  1537  	}
  1538  }
  1539  func rewriteValueMIPS_OpGeq16(v *Value) bool {
  1540  	b := v.Block
  1541  	_ = b
  1542  	types := &b.Func.Config.Types
  1543  	_ = types
  1544  	// match: (Geq16 x y)
  1545  	// cond:
  1546  	// result: (XORconst [1] (SGT (SignExt16to32 y) (SignExt16to32 x)))
  1547  	for {
  1548  		x := v.Args[0]
  1549  		y := v.Args[1]
  1550  		v.reset(OpMIPSXORconst)
  1551  		v.AuxInt = 1
  1552  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, types.Bool)
  1553  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  1554  		v1.AddArg(y)
  1555  		v0.AddArg(v1)
  1556  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  1557  		v2.AddArg(x)
  1558  		v0.AddArg(v2)
  1559  		v.AddArg(v0)
  1560  		return true
  1561  	}
  1562  }
  1563  func rewriteValueMIPS_OpGeq16U(v *Value) bool {
  1564  	b := v.Block
  1565  	_ = b
  1566  	types := &b.Func.Config.Types
  1567  	_ = types
  1568  	// match: (Geq16U x y)
  1569  	// cond:
  1570  	// result: (XORconst [1] (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x)))
  1571  	for {
  1572  		x := v.Args[0]
  1573  		y := v.Args[1]
  1574  		v.reset(OpMIPSXORconst)
  1575  		v.AuxInt = 1
  1576  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, types.Bool)
  1577  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  1578  		v1.AddArg(y)
  1579  		v0.AddArg(v1)
  1580  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  1581  		v2.AddArg(x)
  1582  		v0.AddArg(v2)
  1583  		v.AddArg(v0)
  1584  		return true
  1585  	}
  1586  }
  1587  func rewriteValueMIPS_OpGeq32(v *Value) bool {
  1588  	b := v.Block
  1589  	_ = b
  1590  	types := &b.Func.Config.Types
  1591  	_ = types
  1592  	// match: (Geq32 x y)
  1593  	// cond:
  1594  	// result: (XORconst [1] (SGT y x))
  1595  	for {
  1596  		x := v.Args[0]
  1597  		y := v.Args[1]
  1598  		v.reset(OpMIPSXORconst)
  1599  		v.AuxInt = 1
  1600  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, types.Bool)
  1601  		v0.AddArg(y)
  1602  		v0.AddArg(x)
  1603  		v.AddArg(v0)
  1604  		return true
  1605  	}
  1606  }
  1607  func rewriteValueMIPS_OpGeq32F(v *Value) bool {
  1608  	b := v.Block
  1609  	_ = b
  1610  	// match: (Geq32F x y)
  1611  	// cond:
  1612  	// result: (FPFlagTrue (CMPGEF x y))
  1613  	for {
  1614  		x := v.Args[0]
  1615  		y := v.Args[1]
  1616  		v.reset(OpMIPSFPFlagTrue)
  1617  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, TypeFlags)
  1618  		v0.AddArg(x)
  1619  		v0.AddArg(y)
  1620  		v.AddArg(v0)
  1621  		return true
  1622  	}
  1623  }
  1624  func rewriteValueMIPS_OpGeq32U(v *Value) bool {
  1625  	b := v.Block
  1626  	_ = b
  1627  	types := &b.Func.Config.Types
  1628  	_ = types
  1629  	// match: (Geq32U x y)
  1630  	// cond:
  1631  	// result: (XORconst [1] (SGTU y x))
  1632  	for {
  1633  		x := v.Args[0]
  1634  		y := v.Args[1]
  1635  		v.reset(OpMIPSXORconst)
  1636  		v.AuxInt = 1
  1637  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, types.Bool)
  1638  		v0.AddArg(y)
  1639  		v0.AddArg(x)
  1640  		v.AddArg(v0)
  1641  		return true
  1642  	}
  1643  }
  1644  func rewriteValueMIPS_OpGeq64F(v *Value) bool {
  1645  	b := v.Block
  1646  	_ = b
  1647  	// match: (Geq64F x y)
  1648  	// cond:
  1649  	// result: (FPFlagTrue (CMPGED x y))
  1650  	for {
  1651  		x := v.Args[0]
  1652  		y := v.Args[1]
  1653  		v.reset(OpMIPSFPFlagTrue)
  1654  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, TypeFlags)
  1655  		v0.AddArg(x)
  1656  		v0.AddArg(y)
  1657  		v.AddArg(v0)
  1658  		return true
  1659  	}
  1660  }
  1661  func rewriteValueMIPS_OpGeq8(v *Value) bool {
  1662  	b := v.Block
  1663  	_ = b
  1664  	types := &b.Func.Config.Types
  1665  	_ = types
  1666  	// match: (Geq8 x y)
  1667  	// cond:
  1668  	// result: (XORconst [1] (SGT (SignExt8to32 y) (SignExt8to32 x)))
  1669  	for {
  1670  		x := v.Args[0]
  1671  		y := v.Args[1]
  1672  		v.reset(OpMIPSXORconst)
  1673  		v.AuxInt = 1
  1674  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, types.Bool)
  1675  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  1676  		v1.AddArg(y)
  1677  		v0.AddArg(v1)
  1678  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  1679  		v2.AddArg(x)
  1680  		v0.AddArg(v2)
  1681  		v.AddArg(v0)
  1682  		return true
  1683  	}
  1684  }
  1685  func rewriteValueMIPS_OpGeq8U(v *Value) bool {
  1686  	b := v.Block
  1687  	_ = b
  1688  	types := &b.Func.Config.Types
  1689  	_ = types
  1690  	// match: (Geq8U x y)
  1691  	// cond:
  1692  	// result: (XORconst [1] (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x)))
  1693  	for {
  1694  		x := v.Args[0]
  1695  		y := v.Args[1]
  1696  		v.reset(OpMIPSXORconst)
  1697  		v.AuxInt = 1
  1698  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, types.Bool)
  1699  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  1700  		v1.AddArg(y)
  1701  		v0.AddArg(v1)
  1702  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  1703  		v2.AddArg(x)
  1704  		v0.AddArg(v2)
  1705  		v.AddArg(v0)
  1706  		return true
  1707  	}
  1708  }
  1709  func rewriteValueMIPS_OpGetClosurePtr(v *Value) bool {
  1710  	// match: (GetClosurePtr)
  1711  	// cond:
  1712  	// result: (LoweredGetClosurePtr)
  1713  	for {
  1714  		v.reset(OpMIPSLoweredGetClosurePtr)
  1715  		return true
  1716  	}
  1717  }
  1718  func rewriteValueMIPS_OpGreater16(v *Value) bool {
  1719  	b := v.Block
  1720  	_ = b
  1721  	types := &b.Func.Config.Types
  1722  	_ = types
  1723  	// match: (Greater16 x y)
  1724  	// cond:
  1725  	// result: (SGT (SignExt16to32 x) (SignExt16to32 y))
  1726  	for {
  1727  		x := v.Args[0]
  1728  		y := v.Args[1]
  1729  		v.reset(OpMIPSSGT)
  1730  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  1731  		v0.AddArg(x)
  1732  		v.AddArg(v0)
  1733  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  1734  		v1.AddArg(y)
  1735  		v.AddArg(v1)
  1736  		return true
  1737  	}
  1738  }
  1739  func rewriteValueMIPS_OpGreater16U(v *Value) bool {
  1740  	b := v.Block
  1741  	_ = b
  1742  	types := &b.Func.Config.Types
  1743  	_ = types
  1744  	// match: (Greater16U x y)
  1745  	// cond:
  1746  	// result: (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y))
  1747  	for {
  1748  		x := v.Args[0]
  1749  		y := v.Args[1]
  1750  		v.reset(OpMIPSSGTU)
  1751  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  1752  		v0.AddArg(x)
  1753  		v.AddArg(v0)
  1754  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  1755  		v1.AddArg(y)
  1756  		v.AddArg(v1)
  1757  		return true
  1758  	}
  1759  }
  1760  func rewriteValueMIPS_OpGreater32(v *Value) bool {
  1761  	// match: (Greater32 x y)
  1762  	// cond:
  1763  	// result: (SGT x y)
  1764  	for {
  1765  		x := v.Args[0]
  1766  		y := v.Args[1]
  1767  		v.reset(OpMIPSSGT)
  1768  		v.AddArg(x)
  1769  		v.AddArg(y)
  1770  		return true
  1771  	}
  1772  }
  1773  func rewriteValueMIPS_OpGreater32F(v *Value) bool {
  1774  	b := v.Block
  1775  	_ = b
  1776  	// match: (Greater32F x y)
  1777  	// cond:
  1778  	// result: (FPFlagTrue (CMPGTF x y))
  1779  	for {
  1780  		x := v.Args[0]
  1781  		y := v.Args[1]
  1782  		v.reset(OpMIPSFPFlagTrue)
  1783  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, TypeFlags)
  1784  		v0.AddArg(x)
  1785  		v0.AddArg(y)
  1786  		v.AddArg(v0)
  1787  		return true
  1788  	}
  1789  }
  1790  func rewriteValueMIPS_OpGreater32U(v *Value) bool {
  1791  	// match: (Greater32U x y)
  1792  	// cond:
  1793  	// result: (SGTU x y)
  1794  	for {
  1795  		x := v.Args[0]
  1796  		y := v.Args[1]
  1797  		v.reset(OpMIPSSGTU)
  1798  		v.AddArg(x)
  1799  		v.AddArg(y)
  1800  		return true
  1801  	}
  1802  }
  1803  func rewriteValueMIPS_OpGreater64F(v *Value) bool {
  1804  	b := v.Block
  1805  	_ = b
  1806  	// match: (Greater64F x y)
  1807  	// cond:
  1808  	// result: (FPFlagTrue (CMPGTD x y))
  1809  	for {
  1810  		x := v.Args[0]
  1811  		y := v.Args[1]
  1812  		v.reset(OpMIPSFPFlagTrue)
  1813  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, TypeFlags)
  1814  		v0.AddArg(x)
  1815  		v0.AddArg(y)
  1816  		v.AddArg(v0)
  1817  		return true
  1818  	}
  1819  }
  1820  func rewriteValueMIPS_OpGreater8(v *Value) bool {
  1821  	b := v.Block
  1822  	_ = b
  1823  	types := &b.Func.Config.Types
  1824  	_ = types
  1825  	// match: (Greater8 x y)
  1826  	// cond:
  1827  	// result: (SGT (SignExt8to32 x) (SignExt8to32 y))
  1828  	for {
  1829  		x := v.Args[0]
  1830  		y := v.Args[1]
  1831  		v.reset(OpMIPSSGT)
  1832  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  1833  		v0.AddArg(x)
  1834  		v.AddArg(v0)
  1835  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  1836  		v1.AddArg(y)
  1837  		v.AddArg(v1)
  1838  		return true
  1839  	}
  1840  }
  1841  func rewriteValueMIPS_OpGreater8U(v *Value) bool {
  1842  	b := v.Block
  1843  	_ = b
  1844  	types := &b.Func.Config.Types
  1845  	_ = types
  1846  	// match: (Greater8U x y)
  1847  	// cond:
  1848  	// result: (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y))
  1849  	for {
  1850  		x := v.Args[0]
  1851  		y := v.Args[1]
  1852  		v.reset(OpMIPSSGTU)
  1853  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  1854  		v0.AddArg(x)
  1855  		v.AddArg(v0)
  1856  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  1857  		v1.AddArg(y)
  1858  		v.AddArg(v1)
  1859  		return true
  1860  	}
  1861  }
  1862  func rewriteValueMIPS_OpHmul32(v *Value) bool {
  1863  	b := v.Block
  1864  	_ = b
  1865  	types := &b.Func.Config.Types
  1866  	_ = types
  1867  	// match: (Hmul32 x y)
  1868  	// cond:
  1869  	// result: (Select0 (MULT x y))
  1870  	for {
  1871  		x := v.Args[0]
  1872  		y := v.Args[1]
  1873  		v.reset(OpSelect0)
  1874  		v0 := b.NewValue0(v.Pos, OpMIPSMULT, MakeTuple(types.Int32, types.Int32))
  1875  		v0.AddArg(x)
  1876  		v0.AddArg(y)
  1877  		v.AddArg(v0)
  1878  		return true
  1879  	}
  1880  }
  1881  func rewriteValueMIPS_OpHmul32u(v *Value) bool {
  1882  	b := v.Block
  1883  	_ = b
  1884  	types := &b.Func.Config.Types
  1885  	_ = types
  1886  	// match: (Hmul32u x y)
  1887  	// cond:
  1888  	// result: (Select0 (MULTU x y))
  1889  	for {
  1890  		x := v.Args[0]
  1891  		y := v.Args[1]
  1892  		v.reset(OpSelect0)
  1893  		v0 := b.NewValue0(v.Pos, OpMIPSMULTU, MakeTuple(types.UInt32, types.UInt32))
  1894  		v0.AddArg(x)
  1895  		v0.AddArg(y)
  1896  		v.AddArg(v0)
  1897  		return true
  1898  	}
  1899  }
  1900  func rewriteValueMIPS_OpInterCall(v *Value) bool {
  1901  	// match: (InterCall [argwid] entry mem)
  1902  	// cond:
  1903  	// result: (CALLinter [argwid] entry mem)
  1904  	for {
  1905  		argwid := v.AuxInt
  1906  		entry := v.Args[0]
  1907  		mem := v.Args[1]
  1908  		v.reset(OpMIPSCALLinter)
  1909  		v.AuxInt = argwid
  1910  		v.AddArg(entry)
  1911  		v.AddArg(mem)
  1912  		return true
  1913  	}
  1914  }
  1915  func rewriteValueMIPS_OpIsInBounds(v *Value) bool {
  1916  	// match: (IsInBounds idx len)
  1917  	// cond:
  1918  	// result: (SGTU len idx)
  1919  	for {
  1920  		idx := v.Args[0]
  1921  		len := v.Args[1]
  1922  		v.reset(OpMIPSSGTU)
  1923  		v.AddArg(len)
  1924  		v.AddArg(idx)
  1925  		return true
  1926  	}
  1927  }
  1928  func rewriteValueMIPS_OpIsNonNil(v *Value) bool {
  1929  	b := v.Block
  1930  	_ = b
  1931  	types := &b.Func.Config.Types
  1932  	_ = types
  1933  	// match: (IsNonNil ptr)
  1934  	// cond:
  1935  	// result: (SGTU ptr (MOVWconst [0]))
  1936  	for {
  1937  		ptr := v.Args[0]
  1938  		v.reset(OpMIPSSGTU)
  1939  		v.AddArg(ptr)
  1940  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  1941  		v0.AuxInt = 0
  1942  		v.AddArg(v0)
  1943  		return true
  1944  	}
  1945  }
  1946  func rewriteValueMIPS_OpIsSliceInBounds(v *Value) bool {
  1947  	b := v.Block
  1948  	_ = b
  1949  	types := &b.Func.Config.Types
  1950  	_ = types
  1951  	// match: (IsSliceInBounds idx len)
  1952  	// cond:
  1953  	// result: (XORconst [1] (SGTU idx len))
  1954  	for {
  1955  		idx := v.Args[0]
  1956  		len := v.Args[1]
  1957  		v.reset(OpMIPSXORconst)
  1958  		v.AuxInt = 1
  1959  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, types.Bool)
  1960  		v0.AddArg(idx)
  1961  		v0.AddArg(len)
  1962  		v.AddArg(v0)
  1963  		return true
  1964  	}
  1965  }
  1966  func rewriteValueMIPS_OpLeq16(v *Value) bool {
  1967  	b := v.Block
  1968  	_ = b
  1969  	types := &b.Func.Config.Types
  1970  	_ = types
  1971  	// match: (Leq16 x y)
  1972  	// cond:
  1973  	// result: (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
  1974  	for {
  1975  		x := v.Args[0]
  1976  		y := v.Args[1]
  1977  		v.reset(OpMIPSXORconst)
  1978  		v.AuxInt = 1
  1979  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, types.Bool)
  1980  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  1981  		v1.AddArg(x)
  1982  		v0.AddArg(v1)
  1983  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  1984  		v2.AddArg(y)
  1985  		v0.AddArg(v2)
  1986  		v.AddArg(v0)
  1987  		return true
  1988  	}
  1989  }
  1990  func rewriteValueMIPS_OpLeq16U(v *Value) bool {
  1991  	b := v.Block
  1992  	_ = b
  1993  	types := &b.Func.Config.Types
  1994  	_ = types
  1995  	// match: (Leq16U x y)
  1996  	// cond:
  1997  	// result: (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1998  	for {
  1999  		x := v.Args[0]
  2000  		y := v.Args[1]
  2001  		v.reset(OpMIPSXORconst)
  2002  		v.AuxInt = 1
  2003  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, types.Bool)
  2004  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2005  		v1.AddArg(x)
  2006  		v0.AddArg(v1)
  2007  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2008  		v2.AddArg(y)
  2009  		v0.AddArg(v2)
  2010  		v.AddArg(v0)
  2011  		return true
  2012  	}
  2013  }
  2014  func rewriteValueMIPS_OpLeq32(v *Value) bool {
  2015  	b := v.Block
  2016  	_ = b
  2017  	types := &b.Func.Config.Types
  2018  	_ = types
  2019  	// match: (Leq32 x y)
  2020  	// cond:
  2021  	// result: (XORconst [1] (SGT x y))
  2022  	for {
  2023  		x := v.Args[0]
  2024  		y := v.Args[1]
  2025  		v.reset(OpMIPSXORconst)
  2026  		v.AuxInt = 1
  2027  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, types.Bool)
  2028  		v0.AddArg(x)
  2029  		v0.AddArg(y)
  2030  		v.AddArg(v0)
  2031  		return true
  2032  	}
  2033  }
  2034  func rewriteValueMIPS_OpLeq32F(v *Value) bool {
  2035  	b := v.Block
  2036  	_ = b
  2037  	// match: (Leq32F x y)
  2038  	// cond:
  2039  	// result: (FPFlagTrue (CMPGEF y x))
  2040  	for {
  2041  		x := v.Args[0]
  2042  		y := v.Args[1]
  2043  		v.reset(OpMIPSFPFlagTrue)
  2044  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, TypeFlags)
  2045  		v0.AddArg(y)
  2046  		v0.AddArg(x)
  2047  		v.AddArg(v0)
  2048  		return true
  2049  	}
  2050  }
  2051  func rewriteValueMIPS_OpLeq32U(v *Value) bool {
  2052  	b := v.Block
  2053  	_ = b
  2054  	types := &b.Func.Config.Types
  2055  	_ = types
  2056  	// match: (Leq32U x y)
  2057  	// cond:
  2058  	// result: (XORconst [1] (SGTU x y))
  2059  	for {
  2060  		x := v.Args[0]
  2061  		y := v.Args[1]
  2062  		v.reset(OpMIPSXORconst)
  2063  		v.AuxInt = 1
  2064  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, types.Bool)
  2065  		v0.AddArg(x)
  2066  		v0.AddArg(y)
  2067  		v.AddArg(v0)
  2068  		return true
  2069  	}
  2070  }
  2071  func rewriteValueMIPS_OpLeq64F(v *Value) bool {
  2072  	b := v.Block
  2073  	_ = b
  2074  	// match: (Leq64F x y)
  2075  	// cond:
  2076  	// result: (FPFlagTrue (CMPGED y x))
  2077  	for {
  2078  		x := v.Args[0]
  2079  		y := v.Args[1]
  2080  		v.reset(OpMIPSFPFlagTrue)
  2081  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, TypeFlags)
  2082  		v0.AddArg(y)
  2083  		v0.AddArg(x)
  2084  		v.AddArg(v0)
  2085  		return true
  2086  	}
  2087  }
  2088  func rewriteValueMIPS_OpLeq8(v *Value) bool {
  2089  	b := v.Block
  2090  	_ = b
  2091  	types := &b.Func.Config.Types
  2092  	_ = types
  2093  	// match: (Leq8 x y)
  2094  	// cond:
  2095  	// result: (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
  2096  	for {
  2097  		x := v.Args[0]
  2098  		y := v.Args[1]
  2099  		v.reset(OpMIPSXORconst)
  2100  		v.AuxInt = 1
  2101  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, types.Bool)
  2102  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  2103  		v1.AddArg(x)
  2104  		v0.AddArg(v1)
  2105  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  2106  		v2.AddArg(y)
  2107  		v0.AddArg(v2)
  2108  		v.AddArg(v0)
  2109  		return true
  2110  	}
  2111  }
  2112  func rewriteValueMIPS_OpLeq8U(v *Value) bool {
  2113  	b := v.Block
  2114  	_ = b
  2115  	types := &b.Func.Config.Types
  2116  	_ = types
  2117  	// match: (Leq8U x y)
  2118  	// cond:
  2119  	// result: (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2120  	for {
  2121  		x := v.Args[0]
  2122  		y := v.Args[1]
  2123  		v.reset(OpMIPSXORconst)
  2124  		v.AuxInt = 1
  2125  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, types.Bool)
  2126  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2127  		v1.AddArg(x)
  2128  		v0.AddArg(v1)
  2129  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2130  		v2.AddArg(y)
  2131  		v0.AddArg(v2)
  2132  		v.AddArg(v0)
  2133  		return true
  2134  	}
  2135  }
  2136  func rewriteValueMIPS_OpLess16(v *Value) bool {
  2137  	b := v.Block
  2138  	_ = b
  2139  	types := &b.Func.Config.Types
  2140  	_ = types
  2141  	// match: (Less16 x y)
  2142  	// cond:
  2143  	// result: (SGT (SignExt16to32 y) (SignExt16to32 x))
  2144  	for {
  2145  		x := v.Args[0]
  2146  		y := v.Args[1]
  2147  		v.reset(OpMIPSSGT)
  2148  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  2149  		v0.AddArg(y)
  2150  		v.AddArg(v0)
  2151  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  2152  		v1.AddArg(x)
  2153  		v.AddArg(v1)
  2154  		return true
  2155  	}
  2156  }
  2157  func rewriteValueMIPS_OpLess16U(v *Value) bool {
  2158  	b := v.Block
  2159  	_ = b
  2160  	types := &b.Func.Config.Types
  2161  	_ = types
  2162  	// match: (Less16U x y)
  2163  	// cond:
  2164  	// result: (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
  2165  	for {
  2166  		x := v.Args[0]
  2167  		y := v.Args[1]
  2168  		v.reset(OpMIPSSGTU)
  2169  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2170  		v0.AddArg(y)
  2171  		v.AddArg(v0)
  2172  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2173  		v1.AddArg(x)
  2174  		v.AddArg(v1)
  2175  		return true
  2176  	}
  2177  }
  2178  func rewriteValueMIPS_OpLess32(v *Value) bool {
  2179  	// match: (Less32 x y)
  2180  	// cond:
  2181  	// result: (SGT y x)
  2182  	for {
  2183  		x := v.Args[0]
  2184  		y := v.Args[1]
  2185  		v.reset(OpMIPSSGT)
  2186  		v.AddArg(y)
  2187  		v.AddArg(x)
  2188  		return true
  2189  	}
  2190  }
  2191  func rewriteValueMIPS_OpLess32F(v *Value) bool {
  2192  	b := v.Block
  2193  	_ = b
  2194  	// match: (Less32F x y)
  2195  	// cond:
  2196  	// result: (FPFlagTrue (CMPGTF y x))
  2197  	for {
  2198  		x := v.Args[0]
  2199  		y := v.Args[1]
  2200  		v.reset(OpMIPSFPFlagTrue)
  2201  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, TypeFlags)
  2202  		v0.AddArg(y)
  2203  		v0.AddArg(x)
  2204  		v.AddArg(v0)
  2205  		return true
  2206  	}
  2207  }
  2208  func rewriteValueMIPS_OpLess32U(v *Value) bool {
  2209  	// match: (Less32U x y)
  2210  	// cond:
  2211  	// result: (SGTU y x)
  2212  	for {
  2213  		x := v.Args[0]
  2214  		y := v.Args[1]
  2215  		v.reset(OpMIPSSGTU)
  2216  		v.AddArg(y)
  2217  		v.AddArg(x)
  2218  		return true
  2219  	}
  2220  }
  2221  func rewriteValueMIPS_OpLess64F(v *Value) bool {
  2222  	b := v.Block
  2223  	_ = b
  2224  	// match: (Less64F x y)
  2225  	// cond:
  2226  	// result: (FPFlagTrue (CMPGTD y x))
  2227  	for {
  2228  		x := v.Args[0]
  2229  		y := v.Args[1]
  2230  		v.reset(OpMIPSFPFlagTrue)
  2231  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, TypeFlags)
  2232  		v0.AddArg(y)
  2233  		v0.AddArg(x)
  2234  		v.AddArg(v0)
  2235  		return true
  2236  	}
  2237  }
  2238  func rewriteValueMIPS_OpLess8(v *Value) bool {
  2239  	b := v.Block
  2240  	_ = b
  2241  	types := &b.Func.Config.Types
  2242  	_ = types
  2243  	// match: (Less8 x y)
  2244  	// cond:
  2245  	// result: (SGT (SignExt8to32 y) (SignExt8to32 x))
  2246  	for {
  2247  		x := v.Args[0]
  2248  		y := v.Args[1]
  2249  		v.reset(OpMIPSSGT)
  2250  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  2251  		v0.AddArg(y)
  2252  		v.AddArg(v0)
  2253  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  2254  		v1.AddArg(x)
  2255  		v.AddArg(v1)
  2256  		return true
  2257  	}
  2258  }
  2259  func rewriteValueMIPS_OpLess8U(v *Value) bool {
  2260  	b := v.Block
  2261  	_ = b
  2262  	types := &b.Func.Config.Types
  2263  	_ = types
  2264  	// match: (Less8U x y)
  2265  	// cond:
  2266  	// result: (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
  2267  	for {
  2268  		x := v.Args[0]
  2269  		y := v.Args[1]
  2270  		v.reset(OpMIPSSGTU)
  2271  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2272  		v0.AddArg(y)
  2273  		v.AddArg(v0)
  2274  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2275  		v1.AddArg(x)
  2276  		v.AddArg(v1)
  2277  		return true
  2278  	}
  2279  }
  2280  func rewriteValueMIPS_OpLoad(v *Value) bool {
  2281  	// match: (Load <t> ptr mem)
  2282  	// cond: t.IsBoolean()
  2283  	// result: (MOVBUload ptr mem)
  2284  	for {
  2285  		t := v.Type
  2286  		ptr := v.Args[0]
  2287  		mem := v.Args[1]
  2288  		if !(t.IsBoolean()) {
  2289  			break
  2290  		}
  2291  		v.reset(OpMIPSMOVBUload)
  2292  		v.AddArg(ptr)
  2293  		v.AddArg(mem)
  2294  		return true
  2295  	}
  2296  	// match: (Load <t> ptr mem)
  2297  	// cond: (is8BitInt(t) && isSigned(t))
  2298  	// result: (MOVBload ptr mem)
  2299  	for {
  2300  		t := v.Type
  2301  		ptr := v.Args[0]
  2302  		mem := v.Args[1]
  2303  		if !(is8BitInt(t) && isSigned(t)) {
  2304  			break
  2305  		}
  2306  		v.reset(OpMIPSMOVBload)
  2307  		v.AddArg(ptr)
  2308  		v.AddArg(mem)
  2309  		return true
  2310  	}
  2311  	// match: (Load <t> ptr mem)
  2312  	// cond: (is8BitInt(t) && !isSigned(t))
  2313  	// result: (MOVBUload ptr mem)
  2314  	for {
  2315  		t := v.Type
  2316  		ptr := v.Args[0]
  2317  		mem := v.Args[1]
  2318  		if !(is8BitInt(t) && !isSigned(t)) {
  2319  			break
  2320  		}
  2321  		v.reset(OpMIPSMOVBUload)
  2322  		v.AddArg(ptr)
  2323  		v.AddArg(mem)
  2324  		return true
  2325  	}
  2326  	// match: (Load <t> ptr mem)
  2327  	// cond: (is16BitInt(t) && isSigned(t))
  2328  	// result: (MOVHload ptr mem)
  2329  	for {
  2330  		t := v.Type
  2331  		ptr := v.Args[0]
  2332  		mem := v.Args[1]
  2333  		if !(is16BitInt(t) && isSigned(t)) {
  2334  			break
  2335  		}
  2336  		v.reset(OpMIPSMOVHload)
  2337  		v.AddArg(ptr)
  2338  		v.AddArg(mem)
  2339  		return true
  2340  	}
  2341  	// match: (Load <t> ptr mem)
  2342  	// cond: (is16BitInt(t) && !isSigned(t))
  2343  	// result: (MOVHUload ptr mem)
  2344  	for {
  2345  		t := v.Type
  2346  		ptr := v.Args[0]
  2347  		mem := v.Args[1]
  2348  		if !(is16BitInt(t) && !isSigned(t)) {
  2349  			break
  2350  		}
  2351  		v.reset(OpMIPSMOVHUload)
  2352  		v.AddArg(ptr)
  2353  		v.AddArg(mem)
  2354  		return true
  2355  	}
  2356  	// match: (Load <t> ptr mem)
  2357  	// cond: (is32BitInt(t) || isPtr(t))
  2358  	// result: (MOVWload ptr mem)
  2359  	for {
  2360  		t := v.Type
  2361  		ptr := v.Args[0]
  2362  		mem := v.Args[1]
  2363  		if !(is32BitInt(t) || isPtr(t)) {
  2364  			break
  2365  		}
  2366  		v.reset(OpMIPSMOVWload)
  2367  		v.AddArg(ptr)
  2368  		v.AddArg(mem)
  2369  		return true
  2370  	}
  2371  	// match: (Load <t> ptr mem)
  2372  	// cond: is32BitFloat(t)
  2373  	// result: (MOVFload ptr mem)
  2374  	for {
  2375  		t := v.Type
  2376  		ptr := v.Args[0]
  2377  		mem := v.Args[1]
  2378  		if !(is32BitFloat(t)) {
  2379  			break
  2380  		}
  2381  		v.reset(OpMIPSMOVFload)
  2382  		v.AddArg(ptr)
  2383  		v.AddArg(mem)
  2384  		return true
  2385  	}
  2386  	// match: (Load <t> ptr mem)
  2387  	// cond: is64BitFloat(t)
  2388  	// result: (MOVDload ptr mem)
  2389  	for {
  2390  		t := v.Type
  2391  		ptr := v.Args[0]
  2392  		mem := v.Args[1]
  2393  		if !(is64BitFloat(t)) {
  2394  			break
  2395  		}
  2396  		v.reset(OpMIPSMOVDload)
  2397  		v.AddArg(ptr)
  2398  		v.AddArg(mem)
  2399  		return true
  2400  	}
  2401  	return false
  2402  }
  2403  func rewriteValueMIPS_OpLsh16x16(v *Value) bool {
  2404  	b := v.Block
  2405  	_ = b
  2406  	types := &b.Func.Config.Types
  2407  	_ = types
  2408  	// match: (Lsh16x16 <t> x y)
  2409  	// cond:
  2410  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  2411  	for {
  2412  		t := v.Type
  2413  		x := v.Args[0]
  2414  		y := v.Args[1]
  2415  		v.reset(OpMIPSCMOVZ)
  2416  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2417  		v0.AddArg(x)
  2418  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2419  		v1.AddArg(y)
  2420  		v0.AddArg(v1)
  2421  		v.AddArg(v0)
  2422  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  2423  		v2.AuxInt = 0
  2424  		v.AddArg(v2)
  2425  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  2426  		v3.AuxInt = 32
  2427  		v4 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2428  		v4.AddArg(y)
  2429  		v3.AddArg(v4)
  2430  		v.AddArg(v3)
  2431  		return true
  2432  	}
  2433  }
  2434  func rewriteValueMIPS_OpLsh16x32(v *Value) bool {
  2435  	b := v.Block
  2436  	_ = b
  2437  	types := &b.Func.Config.Types
  2438  	_ = types
  2439  	// match: (Lsh16x32 <t> x y)
  2440  	// cond:
  2441  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  2442  	for {
  2443  		t := v.Type
  2444  		x := v.Args[0]
  2445  		y := v.Args[1]
  2446  		v.reset(OpMIPSCMOVZ)
  2447  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2448  		v0.AddArg(x)
  2449  		v0.AddArg(y)
  2450  		v.AddArg(v0)
  2451  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  2452  		v1.AuxInt = 0
  2453  		v.AddArg(v1)
  2454  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  2455  		v2.AuxInt = 32
  2456  		v2.AddArg(y)
  2457  		v.AddArg(v2)
  2458  		return true
  2459  	}
  2460  }
  2461  func rewriteValueMIPS_OpLsh16x64(v *Value) bool {
  2462  	// match: (Lsh16x64 x (Const64 [c]))
  2463  	// cond: uint32(c) < 16
  2464  	// result: (SLLconst x [c])
  2465  	for {
  2466  		x := v.Args[0]
  2467  		v_1 := v.Args[1]
  2468  		if v_1.Op != OpConst64 {
  2469  			break
  2470  		}
  2471  		c := v_1.AuxInt
  2472  		if !(uint32(c) < 16) {
  2473  			break
  2474  		}
  2475  		v.reset(OpMIPSSLLconst)
  2476  		v.AuxInt = c
  2477  		v.AddArg(x)
  2478  		return true
  2479  	}
  2480  	// match: (Lsh16x64 _ (Const64 [c]))
  2481  	// cond: uint32(c) >= 16
  2482  	// result: (MOVWconst [0])
  2483  	for {
  2484  		v_1 := v.Args[1]
  2485  		if v_1.Op != OpConst64 {
  2486  			break
  2487  		}
  2488  		c := v_1.AuxInt
  2489  		if !(uint32(c) >= 16) {
  2490  			break
  2491  		}
  2492  		v.reset(OpMIPSMOVWconst)
  2493  		v.AuxInt = 0
  2494  		return true
  2495  	}
  2496  	return false
  2497  }
  2498  func rewriteValueMIPS_OpLsh16x8(v *Value) bool {
  2499  	b := v.Block
  2500  	_ = b
  2501  	types := &b.Func.Config.Types
  2502  	_ = types
  2503  	// match: (Lsh16x8 <t> x y)
  2504  	// cond:
  2505  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  2506  	for {
  2507  		t := v.Type
  2508  		x := v.Args[0]
  2509  		y := v.Args[1]
  2510  		v.reset(OpMIPSCMOVZ)
  2511  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2512  		v0.AddArg(x)
  2513  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2514  		v1.AddArg(y)
  2515  		v0.AddArg(v1)
  2516  		v.AddArg(v0)
  2517  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  2518  		v2.AuxInt = 0
  2519  		v.AddArg(v2)
  2520  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  2521  		v3.AuxInt = 32
  2522  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2523  		v4.AddArg(y)
  2524  		v3.AddArg(v4)
  2525  		v.AddArg(v3)
  2526  		return true
  2527  	}
  2528  }
  2529  func rewriteValueMIPS_OpLsh32x16(v *Value) bool {
  2530  	b := v.Block
  2531  	_ = b
  2532  	types := &b.Func.Config.Types
  2533  	_ = types
  2534  	// match: (Lsh32x16 <t> x y)
  2535  	// cond:
  2536  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  2537  	for {
  2538  		t := v.Type
  2539  		x := v.Args[0]
  2540  		y := v.Args[1]
  2541  		v.reset(OpMIPSCMOVZ)
  2542  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2543  		v0.AddArg(x)
  2544  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2545  		v1.AddArg(y)
  2546  		v0.AddArg(v1)
  2547  		v.AddArg(v0)
  2548  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  2549  		v2.AuxInt = 0
  2550  		v.AddArg(v2)
  2551  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  2552  		v3.AuxInt = 32
  2553  		v4 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2554  		v4.AddArg(y)
  2555  		v3.AddArg(v4)
  2556  		v.AddArg(v3)
  2557  		return true
  2558  	}
  2559  }
  2560  func rewriteValueMIPS_OpLsh32x32(v *Value) bool {
  2561  	b := v.Block
  2562  	_ = b
  2563  	types := &b.Func.Config.Types
  2564  	_ = types
  2565  	// match: (Lsh32x32 <t> x y)
  2566  	// cond:
  2567  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  2568  	for {
  2569  		t := v.Type
  2570  		x := v.Args[0]
  2571  		y := v.Args[1]
  2572  		v.reset(OpMIPSCMOVZ)
  2573  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2574  		v0.AddArg(x)
  2575  		v0.AddArg(y)
  2576  		v.AddArg(v0)
  2577  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  2578  		v1.AuxInt = 0
  2579  		v.AddArg(v1)
  2580  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  2581  		v2.AuxInt = 32
  2582  		v2.AddArg(y)
  2583  		v.AddArg(v2)
  2584  		return true
  2585  	}
  2586  }
  2587  func rewriteValueMIPS_OpLsh32x64(v *Value) bool {
  2588  	// match: (Lsh32x64 x (Const64 [c]))
  2589  	// cond: uint32(c) < 32
  2590  	// result: (SLLconst x [c])
  2591  	for {
  2592  		x := v.Args[0]
  2593  		v_1 := v.Args[1]
  2594  		if v_1.Op != OpConst64 {
  2595  			break
  2596  		}
  2597  		c := v_1.AuxInt
  2598  		if !(uint32(c) < 32) {
  2599  			break
  2600  		}
  2601  		v.reset(OpMIPSSLLconst)
  2602  		v.AuxInt = c
  2603  		v.AddArg(x)
  2604  		return true
  2605  	}
  2606  	// match: (Lsh32x64 _ (Const64 [c]))
  2607  	// cond: uint32(c) >= 32
  2608  	// result: (MOVWconst [0])
  2609  	for {
  2610  		v_1 := v.Args[1]
  2611  		if v_1.Op != OpConst64 {
  2612  			break
  2613  		}
  2614  		c := v_1.AuxInt
  2615  		if !(uint32(c) >= 32) {
  2616  			break
  2617  		}
  2618  		v.reset(OpMIPSMOVWconst)
  2619  		v.AuxInt = 0
  2620  		return true
  2621  	}
  2622  	return false
  2623  }
  2624  func rewriteValueMIPS_OpLsh32x8(v *Value) bool {
  2625  	b := v.Block
  2626  	_ = b
  2627  	types := &b.Func.Config.Types
  2628  	_ = types
  2629  	// match: (Lsh32x8 <t> x y)
  2630  	// cond:
  2631  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  2632  	for {
  2633  		t := v.Type
  2634  		x := v.Args[0]
  2635  		y := v.Args[1]
  2636  		v.reset(OpMIPSCMOVZ)
  2637  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2638  		v0.AddArg(x)
  2639  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2640  		v1.AddArg(y)
  2641  		v0.AddArg(v1)
  2642  		v.AddArg(v0)
  2643  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  2644  		v2.AuxInt = 0
  2645  		v.AddArg(v2)
  2646  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  2647  		v3.AuxInt = 32
  2648  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2649  		v4.AddArg(y)
  2650  		v3.AddArg(v4)
  2651  		v.AddArg(v3)
  2652  		return true
  2653  	}
  2654  }
  2655  func rewriteValueMIPS_OpLsh8x16(v *Value) bool {
  2656  	b := v.Block
  2657  	_ = b
  2658  	types := &b.Func.Config.Types
  2659  	_ = types
  2660  	// match: (Lsh8x16 <t> x y)
  2661  	// cond:
  2662  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  2663  	for {
  2664  		t := v.Type
  2665  		x := v.Args[0]
  2666  		y := v.Args[1]
  2667  		v.reset(OpMIPSCMOVZ)
  2668  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2669  		v0.AddArg(x)
  2670  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2671  		v1.AddArg(y)
  2672  		v0.AddArg(v1)
  2673  		v.AddArg(v0)
  2674  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  2675  		v2.AuxInt = 0
  2676  		v.AddArg(v2)
  2677  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  2678  		v3.AuxInt = 32
  2679  		v4 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  2680  		v4.AddArg(y)
  2681  		v3.AddArg(v4)
  2682  		v.AddArg(v3)
  2683  		return true
  2684  	}
  2685  }
  2686  func rewriteValueMIPS_OpLsh8x32(v *Value) bool {
  2687  	b := v.Block
  2688  	_ = b
  2689  	types := &b.Func.Config.Types
  2690  	_ = types
  2691  	// match: (Lsh8x32 <t> x y)
  2692  	// cond:
  2693  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  2694  	for {
  2695  		t := v.Type
  2696  		x := v.Args[0]
  2697  		y := v.Args[1]
  2698  		v.reset(OpMIPSCMOVZ)
  2699  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2700  		v0.AddArg(x)
  2701  		v0.AddArg(y)
  2702  		v.AddArg(v0)
  2703  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  2704  		v1.AuxInt = 0
  2705  		v.AddArg(v1)
  2706  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  2707  		v2.AuxInt = 32
  2708  		v2.AddArg(y)
  2709  		v.AddArg(v2)
  2710  		return true
  2711  	}
  2712  }
  2713  func rewriteValueMIPS_OpLsh8x64(v *Value) bool {
  2714  	// match: (Lsh8x64 x (Const64 [c]))
  2715  	// cond: uint32(c) < 8
  2716  	// result: (SLLconst x [c])
  2717  	for {
  2718  		x := v.Args[0]
  2719  		v_1 := v.Args[1]
  2720  		if v_1.Op != OpConst64 {
  2721  			break
  2722  		}
  2723  		c := v_1.AuxInt
  2724  		if !(uint32(c) < 8) {
  2725  			break
  2726  		}
  2727  		v.reset(OpMIPSSLLconst)
  2728  		v.AuxInt = c
  2729  		v.AddArg(x)
  2730  		return true
  2731  	}
  2732  	// match: (Lsh8x64 _ (Const64 [c]))
  2733  	// cond: uint32(c) >= 8
  2734  	// result: (MOVWconst [0])
  2735  	for {
  2736  		v_1 := v.Args[1]
  2737  		if v_1.Op != OpConst64 {
  2738  			break
  2739  		}
  2740  		c := v_1.AuxInt
  2741  		if !(uint32(c) >= 8) {
  2742  			break
  2743  		}
  2744  		v.reset(OpMIPSMOVWconst)
  2745  		v.AuxInt = 0
  2746  		return true
  2747  	}
  2748  	return false
  2749  }
  2750  func rewriteValueMIPS_OpLsh8x8(v *Value) bool {
  2751  	b := v.Block
  2752  	_ = b
  2753  	types := &b.Func.Config.Types
  2754  	_ = types
  2755  	// match: (Lsh8x8 <t> x y)
  2756  	// cond:
  2757  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  2758  	for {
  2759  		t := v.Type
  2760  		x := v.Args[0]
  2761  		y := v.Args[1]
  2762  		v.reset(OpMIPSCMOVZ)
  2763  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2764  		v0.AddArg(x)
  2765  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2766  		v1.AddArg(y)
  2767  		v0.AddArg(v1)
  2768  		v.AddArg(v0)
  2769  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  2770  		v2.AuxInt = 0
  2771  		v.AddArg(v2)
  2772  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  2773  		v3.AuxInt = 32
  2774  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  2775  		v4.AddArg(y)
  2776  		v3.AddArg(v4)
  2777  		v.AddArg(v3)
  2778  		return true
  2779  	}
  2780  }
  2781  func rewriteValueMIPS_OpMIPSADD(v *Value) bool {
  2782  	// match: (ADD x (MOVWconst [c]))
  2783  	// cond:
  2784  	// result: (ADDconst [c] x)
  2785  	for {
  2786  		x := v.Args[0]
  2787  		v_1 := v.Args[1]
  2788  		if v_1.Op != OpMIPSMOVWconst {
  2789  			break
  2790  		}
  2791  		c := v_1.AuxInt
  2792  		v.reset(OpMIPSADDconst)
  2793  		v.AuxInt = c
  2794  		v.AddArg(x)
  2795  		return true
  2796  	}
  2797  	// match: (ADD (MOVWconst [c]) x)
  2798  	// cond:
  2799  	// result: (ADDconst [c] x)
  2800  	for {
  2801  		v_0 := v.Args[0]
  2802  		if v_0.Op != OpMIPSMOVWconst {
  2803  			break
  2804  		}
  2805  		c := v_0.AuxInt
  2806  		x := v.Args[1]
  2807  		v.reset(OpMIPSADDconst)
  2808  		v.AuxInt = c
  2809  		v.AddArg(x)
  2810  		return true
  2811  	}
  2812  	// match: (ADD x (NEG y))
  2813  	// cond:
  2814  	// result: (SUB x y)
  2815  	for {
  2816  		x := v.Args[0]
  2817  		v_1 := v.Args[1]
  2818  		if v_1.Op != OpMIPSNEG {
  2819  			break
  2820  		}
  2821  		y := v_1.Args[0]
  2822  		v.reset(OpMIPSSUB)
  2823  		v.AddArg(x)
  2824  		v.AddArg(y)
  2825  		return true
  2826  	}
  2827  	// match: (ADD (NEG y) x)
  2828  	// cond:
  2829  	// result: (SUB x y)
  2830  	for {
  2831  		v_0 := v.Args[0]
  2832  		if v_0.Op != OpMIPSNEG {
  2833  			break
  2834  		}
  2835  		y := v_0.Args[0]
  2836  		x := v.Args[1]
  2837  		v.reset(OpMIPSSUB)
  2838  		v.AddArg(x)
  2839  		v.AddArg(y)
  2840  		return true
  2841  	}
  2842  	return false
  2843  }
  2844  func rewriteValueMIPS_OpMIPSADDconst(v *Value) bool {
  2845  	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))
  2846  	// cond:
  2847  	// result: (MOVWaddr [off1+off2] {sym} ptr)
  2848  	for {
  2849  		off1 := v.AuxInt
  2850  		v_0 := v.Args[0]
  2851  		if v_0.Op != OpMIPSMOVWaddr {
  2852  			break
  2853  		}
  2854  		off2 := v_0.AuxInt
  2855  		sym := v_0.Aux
  2856  		ptr := v_0.Args[0]
  2857  		v.reset(OpMIPSMOVWaddr)
  2858  		v.AuxInt = off1 + off2
  2859  		v.Aux = sym
  2860  		v.AddArg(ptr)
  2861  		return true
  2862  	}
  2863  	// match: (ADDconst [0] x)
  2864  	// cond:
  2865  	// result: x
  2866  	for {
  2867  		if v.AuxInt != 0 {
  2868  			break
  2869  		}
  2870  		x := v.Args[0]
  2871  		v.reset(OpCopy)
  2872  		v.Type = x.Type
  2873  		v.AddArg(x)
  2874  		return true
  2875  	}
  2876  	// match: (ADDconst [c] (MOVWconst [d]))
  2877  	// cond:
  2878  	// result: (MOVWconst [int64(int32(c+d))])
  2879  	for {
  2880  		c := v.AuxInt
  2881  		v_0 := v.Args[0]
  2882  		if v_0.Op != OpMIPSMOVWconst {
  2883  			break
  2884  		}
  2885  		d := v_0.AuxInt
  2886  		v.reset(OpMIPSMOVWconst)
  2887  		v.AuxInt = int64(int32(c + d))
  2888  		return true
  2889  	}
  2890  	// match: (ADDconst [c] (ADDconst [d] x))
  2891  	// cond:
  2892  	// result: (ADDconst [int64(int32(c+d))] x)
  2893  	for {
  2894  		c := v.AuxInt
  2895  		v_0 := v.Args[0]
  2896  		if v_0.Op != OpMIPSADDconst {
  2897  			break
  2898  		}
  2899  		d := v_0.AuxInt
  2900  		x := v_0.Args[0]
  2901  		v.reset(OpMIPSADDconst)
  2902  		v.AuxInt = int64(int32(c + d))
  2903  		v.AddArg(x)
  2904  		return true
  2905  	}
  2906  	// match: (ADDconst [c] (SUBconst [d] x))
  2907  	// cond:
  2908  	// result: (ADDconst [int64(int32(c-d))] x)
  2909  	for {
  2910  		c := v.AuxInt
  2911  		v_0 := v.Args[0]
  2912  		if v_0.Op != OpMIPSSUBconst {
  2913  			break
  2914  		}
  2915  		d := v_0.AuxInt
  2916  		x := v_0.Args[0]
  2917  		v.reset(OpMIPSADDconst)
  2918  		v.AuxInt = int64(int32(c - d))
  2919  		v.AddArg(x)
  2920  		return true
  2921  	}
  2922  	return false
  2923  }
  2924  func rewriteValueMIPS_OpMIPSAND(v *Value) bool {
  2925  	b := v.Block
  2926  	_ = b
  2927  	// match: (AND x (MOVWconst [c]))
  2928  	// cond:
  2929  	// result: (ANDconst [c] x)
  2930  	for {
  2931  		x := v.Args[0]
  2932  		v_1 := v.Args[1]
  2933  		if v_1.Op != OpMIPSMOVWconst {
  2934  			break
  2935  		}
  2936  		c := v_1.AuxInt
  2937  		v.reset(OpMIPSANDconst)
  2938  		v.AuxInt = c
  2939  		v.AddArg(x)
  2940  		return true
  2941  	}
  2942  	// match: (AND (MOVWconst [c]) x)
  2943  	// cond:
  2944  	// result: (ANDconst [c] x)
  2945  	for {
  2946  		v_0 := v.Args[0]
  2947  		if v_0.Op != OpMIPSMOVWconst {
  2948  			break
  2949  		}
  2950  		c := v_0.AuxInt
  2951  		x := v.Args[1]
  2952  		v.reset(OpMIPSANDconst)
  2953  		v.AuxInt = c
  2954  		v.AddArg(x)
  2955  		return true
  2956  	}
  2957  	// match: (AND x x)
  2958  	// cond:
  2959  	// result: x
  2960  	for {
  2961  		x := v.Args[0]
  2962  		if x != v.Args[1] {
  2963  			break
  2964  		}
  2965  		v.reset(OpCopy)
  2966  		v.Type = x.Type
  2967  		v.AddArg(x)
  2968  		return true
  2969  	}
  2970  	// match: (AND (SGTUconst [1] x) (SGTUconst [1] y))
  2971  	// cond:
  2972  	// result: (SGTUconst [1] (OR <x.Type> x y))
  2973  	for {
  2974  		v_0 := v.Args[0]
  2975  		if v_0.Op != OpMIPSSGTUconst {
  2976  			break
  2977  		}
  2978  		if v_0.AuxInt != 1 {
  2979  			break
  2980  		}
  2981  		x := v_0.Args[0]
  2982  		v_1 := v.Args[1]
  2983  		if v_1.Op != OpMIPSSGTUconst {
  2984  			break
  2985  		}
  2986  		if v_1.AuxInt != 1 {
  2987  			break
  2988  		}
  2989  		y := v_1.Args[0]
  2990  		v.reset(OpMIPSSGTUconst)
  2991  		v.AuxInt = 1
  2992  		v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  2993  		v0.AddArg(x)
  2994  		v0.AddArg(y)
  2995  		v.AddArg(v0)
  2996  		return true
  2997  	}
  2998  	// match: (AND (SGTUconst [1] y) (SGTUconst [1] x))
  2999  	// cond:
  3000  	// result: (SGTUconst [1] (OR <x.Type> x y))
  3001  	for {
  3002  		v_0 := v.Args[0]
  3003  		if v_0.Op != OpMIPSSGTUconst {
  3004  			break
  3005  		}
  3006  		if v_0.AuxInt != 1 {
  3007  			break
  3008  		}
  3009  		y := v_0.Args[0]
  3010  		v_1 := v.Args[1]
  3011  		if v_1.Op != OpMIPSSGTUconst {
  3012  			break
  3013  		}
  3014  		if v_1.AuxInt != 1 {
  3015  			break
  3016  		}
  3017  		x := v_1.Args[0]
  3018  		v.reset(OpMIPSSGTUconst)
  3019  		v.AuxInt = 1
  3020  		v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  3021  		v0.AddArg(x)
  3022  		v0.AddArg(y)
  3023  		v.AddArg(v0)
  3024  		return true
  3025  	}
  3026  	return false
  3027  }
  3028  func rewriteValueMIPS_OpMIPSANDconst(v *Value) bool {
  3029  	// match: (ANDconst [0] _)
  3030  	// cond:
  3031  	// result: (MOVWconst [0])
  3032  	for {
  3033  		if v.AuxInt != 0 {
  3034  			break
  3035  		}
  3036  		v.reset(OpMIPSMOVWconst)
  3037  		v.AuxInt = 0
  3038  		return true
  3039  	}
  3040  	// match: (ANDconst [-1] x)
  3041  	// cond:
  3042  	// result: x
  3043  	for {
  3044  		if v.AuxInt != -1 {
  3045  			break
  3046  		}
  3047  		x := v.Args[0]
  3048  		v.reset(OpCopy)
  3049  		v.Type = x.Type
  3050  		v.AddArg(x)
  3051  		return true
  3052  	}
  3053  	// match: (ANDconst [c] (MOVWconst [d]))
  3054  	// cond:
  3055  	// result: (MOVWconst [c&d])
  3056  	for {
  3057  		c := v.AuxInt
  3058  		v_0 := v.Args[0]
  3059  		if v_0.Op != OpMIPSMOVWconst {
  3060  			break
  3061  		}
  3062  		d := v_0.AuxInt
  3063  		v.reset(OpMIPSMOVWconst)
  3064  		v.AuxInt = c & d
  3065  		return true
  3066  	}
  3067  	// match: (ANDconst [c] (ANDconst [d] x))
  3068  	// cond:
  3069  	// result: (ANDconst [c&d] x)
  3070  	for {
  3071  		c := v.AuxInt
  3072  		v_0 := v.Args[0]
  3073  		if v_0.Op != OpMIPSANDconst {
  3074  			break
  3075  		}
  3076  		d := v_0.AuxInt
  3077  		x := v_0.Args[0]
  3078  		v.reset(OpMIPSANDconst)
  3079  		v.AuxInt = c & d
  3080  		v.AddArg(x)
  3081  		return true
  3082  	}
  3083  	return false
  3084  }
  3085  func rewriteValueMIPS_OpMIPSCMOVZ(v *Value) bool {
  3086  	b := v.Block
  3087  	_ = b
  3088  	// match: (CMOVZ _ b (MOVWconst [0]))
  3089  	// cond:
  3090  	// result: b
  3091  	for {
  3092  		b := v.Args[1]
  3093  		v_2 := v.Args[2]
  3094  		if v_2.Op != OpMIPSMOVWconst {
  3095  			break
  3096  		}
  3097  		if v_2.AuxInt != 0 {
  3098  			break
  3099  		}
  3100  		v.reset(OpCopy)
  3101  		v.Type = b.Type
  3102  		v.AddArg(b)
  3103  		return true
  3104  	}
  3105  	// match: (CMOVZ a _ (MOVWconst [c]))
  3106  	// cond: c!=0
  3107  	// result: a
  3108  	for {
  3109  		a := v.Args[0]
  3110  		v_2 := v.Args[2]
  3111  		if v_2.Op != OpMIPSMOVWconst {
  3112  			break
  3113  		}
  3114  		c := v_2.AuxInt
  3115  		if !(c != 0) {
  3116  			break
  3117  		}
  3118  		v.reset(OpCopy)
  3119  		v.Type = a.Type
  3120  		v.AddArg(a)
  3121  		return true
  3122  	}
  3123  	// match: (CMOVZ a (MOVWconst [0]) c)
  3124  	// cond:
  3125  	// result: (CMOVZzero a c)
  3126  	for {
  3127  		a := v.Args[0]
  3128  		v_1 := v.Args[1]
  3129  		if v_1.Op != OpMIPSMOVWconst {
  3130  			break
  3131  		}
  3132  		if v_1.AuxInt != 0 {
  3133  			break
  3134  		}
  3135  		c := v.Args[2]
  3136  		v.reset(OpMIPSCMOVZzero)
  3137  		v.AddArg(a)
  3138  		v.AddArg(c)
  3139  		return true
  3140  	}
  3141  	return false
  3142  }
  3143  func rewriteValueMIPS_OpMIPSCMOVZzero(v *Value) bool {
  3144  	// match: (CMOVZzero _ (MOVWconst [0]))
  3145  	// cond:
  3146  	// result: (MOVWconst [0])
  3147  	for {
  3148  		v_1 := v.Args[1]
  3149  		if v_1.Op != OpMIPSMOVWconst {
  3150  			break
  3151  		}
  3152  		if v_1.AuxInt != 0 {
  3153  			break
  3154  		}
  3155  		v.reset(OpMIPSMOVWconst)
  3156  		v.AuxInt = 0
  3157  		return true
  3158  	}
  3159  	// match: (CMOVZzero a (MOVWconst [c]))
  3160  	// cond: c!=0
  3161  	// result: a
  3162  	for {
  3163  		a := v.Args[0]
  3164  		v_1 := v.Args[1]
  3165  		if v_1.Op != OpMIPSMOVWconst {
  3166  			break
  3167  		}
  3168  		c := v_1.AuxInt
  3169  		if !(c != 0) {
  3170  			break
  3171  		}
  3172  		v.reset(OpCopy)
  3173  		v.Type = a.Type
  3174  		v.AddArg(a)
  3175  		return true
  3176  	}
  3177  	return false
  3178  }
  3179  func rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v *Value) bool {
  3180  	// match: (LoweredAtomicAdd ptr (MOVWconst [c]) mem)
  3181  	// cond: is16Bit(c)
  3182  	// result: (LoweredAtomicAddconst [c] ptr mem)
  3183  	for {
  3184  		ptr := v.Args[0]
  3185  		v_1 := v.Args[1]
  3186  		if v_1.Op != OpMIPSMOVWconst {
  3187  			break
  3188  		}
  3189  		c := v_1.AuxInt
  3190  		mem := v.Args[2]
  3191  		if !(is16Bit(c)) {
  3192  			break
  3193  		}
  3194  		v.reset(OpMIPSLoweredAtomicAddconst)
  3195  		v.AuxInt = c
  3196  		v.AddArg(ptr)
  3197  		v.AddArg(mem)
  3198  		return true
  3199  	}
  3200  	return false
  3201  }
  3202  func rewriteValueMIPS_OpMIPSLoweredAtomicStore(v *Value) bool {
  3203  	// match: (LoweredAtomicStore ptr (MOVWconst [0]) mem)
  3204  	// cond:
  3205  	// result: (LoweredAtomicStorezero ptr mem)
  3206  	for {
  3207  		ptr := v.Args[0]
  3208  		v_1 := v.Args[1]
  3209  		if v_1.Op != OpMIPSMOVWconst {
  3210  			break
  3211  		}
  3212  		if v_1.AuxInt != 0 {
  3213  			break
  3214  		}
  3215  		mem := v.Args[2]
  3216  		v.reset(OpMIPSLoweredAtomicStorezero)
  3217  		v.AddArg(ptr)
  3218  		v.AddArg(mem)
  3219  		return true
  3220  	}
  3221  	return false
  3222  }
  3223  func rewriteValueMIPS_OpMIPSMOVBUload(v *Value) bool {
  3224  	// match: (MOVBUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3225  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  3226  	// result: (MOVBUload [off1+off2] {sym} ptr mem)
  3227  	for {
  3228  		off1 := v.AuxInt
  3229  		sym := v.Aux
  3230  		x := v.Args[0]
  3231  		if x.Op != OpMIPSADDconst {
  3232  			break
  3233  		}
  3234  		off2 := x.AuxInt
  3235  		ptr := x.Args[0]
  3236  		mem := v.Args[1]
  3237  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  3238  			break
  3239  		}
  3240  		v.reset(OpMIPSMOVBUload)
  3241  		v.AuxInt = off1 + off2
  3242  		v.Aux = sym
  3243  		v.AddArg(ptr)
  3244  		v.AddArg(mem)
  3245  		return true
  3246  	}
  3247  	// match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3248  	// cond: canMergeSym(sym1,sym2)
  3249  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3250  	for {
  3251  		off1 := v.AuxInt
  3252  		sym1 := v.Aux
  3253  		v_0 := v.Args[0]
  3254  		if v_0.Op != OpMIPSMOVWaddr {
  3255  			break
  3256  		}
  3257  		off2 := v_0.AuxInt
  3258  		sym2 := v_0.Aux
  3259  		ptr := v_0.Args[0]
  3260  		mem := v.Args[1]
  3261  		if !(canMergeSym(sym1, sym2)) {
  3262  			break
  3263  		}
  3264  		v.reset(OpMIPSMOVBUload)
  3265  		v.AuxInt = off1 + off2
  3266  		v.Aux = mergeSym(sym1, sym2)
  3267  		v.AddArg(ptr)
  3268  		v.AddArg(mem)
  3269  		return true
  3270  	}
  3271  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  3272  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && !isSigned(x.Type)
  3273  	// result: x
  3274  	for {
  3275  		off := v.AuxInt
  3276  		sym := v.Aux
  3277  		ptr := v.Args[0]
  3278  		v_1 := v.Args[1]
  3279  		if v_1.Op != OpMIPSMOVBstore {
  3280  			break
  3281  		}
  3282  		off2 := v_1.AuxInt
  3283  		sym2 := v_1.Aux
  3284  		ptr2 := v_1.Args[0]
  3285  		x := v_1.Args[1]
  3286  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && !isSigned(x.Type)) {
  3287  			break
  3288  		}
  3289  		v.reset(OpCopy)
  3290  		v.Type = x.Type
  3291  		v.AddArg(x)
  3292  		return true
  3293  	}
  3294  	return false
  3295  }
  3296  func rewriteValueMIPS_OpMIPSMOVBUreg(v *Value) bool {
  3297  	b := v.Block
  3298  	_ = b
  3299  	// match: (MOVBUreg x:(MOVBUload _ _))
  3300  	// cond:
  3301  	// result: (MOVWreg x)
  3302  	for {
  3303  		x := v.Args[0]
  3304  		if x.Op != OpMIPSMOVBUload {
  3305  			break
  3306  		}
  3307  		v.reset(OpMIPSMOVWreg)
  3308  		v.AddArg(x)
  3309  		return true
  3310  	}
  3311  	// match: (MOVBUreg x:(MOVBUreg _))
  3312  	// cond:
  3313  	// result: (MOVWreg x)
  3314  	for {
  3315  		x := v.Args[0]
  3316  		if x.Op != OpMIPSMOVBUreg {
  3317  			break
  3318  		}
  3319  		v.reset(OpMIPSMOVWreg)
  3320  		v.AddArg(x)
  3321  		return true
  3322  	}
  3323  	// match: (MOVBUreg <t> x:(MOVBload [off] {sym} ptr mem))
  3324  	// cond: x.Uses == 1 && clobber(x)
  3325  	// result: @x.Block (MOVBUload <t> [off] {sym} ptr mem)
  3326  	for {
  3327  		t := v.Type
  3328  		x := v.Args[0]
  3329  		if x.Op != OpMIPSMOVBload {
  3330  			break
  3331  		}
  3332  		off := x.AuxInt
  3333  		sym := x.Aux
  3334  		ptr := x.Args[0]
  3335  		mem := x.Args[1]
  3336  		if !(x.Uses == 1 && clobber(x)) {
  3337  			break
  3338  		}
  3339  		b = x.Block
  3340  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, t)
  3341  		v.reset(OpCopy)
  3342  		v.AddArg(v0)
  3343  		v0.AuxInt = off
  3344  		v0.Aux = sym
  3345  		v0.AddArg(ptr)
  3346  		v0.AddArg(mem)
  3347  		return true
  3348  	}
  3349  	// match: (MOVBUreg (ANDconst [c] x))
  3350  	// cond:
  3351  	// result: (ANDconst [c&0xff] x)
  3352  	for {
  3353  		v_0 := v.Args[0]
  3354  		if v_0.Op != OpMIPSANDconst {
  3355  			break
  3356  		}
  3357  		c := v_0.AuxInt
  3358  		x := v_0.Args[0]
  3359  		v.reset(OpMIPSANDconst)
  3360  		v.AuxInt = c & 0xff
  3361  		v.AddArg(x)
  3362  		return true
  3363  	}
  3364  	// match: (MOVBUreg (MOVWconst [c]))
  3365  	// cond:
  3366  	// result: (MOVWconst [int64(uint8(c))])
  3367  	for {
  3368  		v_0 := v.Args[0]
  3369  		if v_0.Op != OpMIPSMOVWconst {
  3370  			break
  3371  		}
  3372  		c := v_0.AuxInt
  3373  		v.reset(OpMIPSMOVWconst)
  3374  		v.AuxInt = int64(uint8(c))
  3375  		return true
  3376  	}
  3377  	return false
  3378  }
  3379  func rewriteValueMIPS_OpMIPSMOVBload(v *Value) bool {
  3380  	// match: (MOVBload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3381  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  3382  	// result: (MOVBload  [off1+off2] {sym} ptr mem)
  3383  	for {
  3384  		off1 := v.AuxInt
  3385  		sym := v.Aux
  3386  		x := v.Args[0]
  3387  		if x.Op != OpMIPSADDconst {
  3388  			break
  3389  		}
  3390  		off2 := x.AuxInt
  3391  		ptr := x.Args[0]
  3392  		mem := v.Args[1]
  3393  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  3394  			break
  3395  		}
  3396  		v.reset(OpMIPSMOVBload)
  3397  		v.AuxInt = off1 + off2
  3398  		v.Aux = sym
  3399  		v.AddArg(ptr)
  3400  		v.AddArg(mem)
  3401  		return true
  3402  	}
  3403  	// match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3404  	// cond: canMergeSym(sym1,sym2)
  3405  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3406  	for {
  3407  		off1 := v.AuxInt
  3408  		sym1 := v.Aux
  3409  		v_0 := v.Args[0]
  3410  		if v_0.Op != OpMIPSMOVWaddr {
  3411  			break
  3412  		}
  3413  		off2 := v_0.AuxInt
  3414  		sym2 := v_0.Aux
  3415  		ptr := v_0.Args[0]
  3416  		mem := v.Args[1]
  3417  		if !(canMergeSym(sym1, sym2)) {
  3418  			break
  3419  		}
  3420  		v.reset(OpMIPSMOVBload)
  3421  		v.AuxInt = off1 + off2
  3422  		v.Aux = mergeSym(sym1, sym2)
  3423  		v.AddArg(ptr)
  3424  		v.AddArg(mem)
  3425  		return true
  3426  	}
  3427  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  3428  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && isSigned(x.Type)
  3429  	// result: x
  3430  	for {
  3431  		off := v.AuxInt
  3432  		sym := v.Aux
  3433  		ptr := v.Args[0]
  3434  		v_1 := v.Args[1]
  3435  		if v_1.Op != OpMIPSMOVBstore {
  3436  			break
  3437  		}
  3438  		off2 := v_1.AuxInt
  3439  		sym2 := v_1.Aux
  3440  		ptr2 := v_1.Args[0]
  3441  		x := v_1.Args[1]
  3442  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && isSigned(x.Type)) {
  3443  			break
  3444  		}
  3445  		v.reset(OpCopy)
  3446  		v.Type = x.Type
  3447  		v.AddArg(x)
  3448  		return true
  3449  	}
  3450  	return false
  3451  }
  3452  func rewriteValueMIPS_OpMIPSMOVBreg(v *Value) bool {
  3453  	b := v.Block
  3454  	_ = b
  3455  	// match: (MOVBreg x:(MOVBload _ _))
  3456  	// cond:
  3457  	// result: (MOVWreg x)
  3458  	for {
  3459  		x := v.Args[0]
  3460  		if x.Op != OpMIPSMOVBload {
  3461  			break
  3462  		}
  3463  		v.reset(OpMIPSMOVWreg)
  3464  		v.AddArg(x)
  3465  		return true
  3466  	}
  3467  	// match: (MOVBreg x:(MOVBreg _))
  3468  	// cond:
  3469  	// result: (MOVWreg x)
  3470  	for {
  3471  		x := v.Args[0]
  3472  		if x.Op != OpMIPSMOVBreg {
  3473  			break
  3474  		}
  3475  		v.reset(OpMIPSMOVWreg)
  3476  		v.AddArg(x)
  3477  		return true
  3478  	}
  3479  	// match: (MOVBreg <t> x:(MOVBUload [off] {sym} ptr mem))
  3480  	// cond: x.Uses == 1 && clobber(x)
  3481  	// result: @x.Block (MOVBload <t> [off] {sym} ptr mem)
  3482  	for {
  3483  		t := v.Type
  3484  		x := v.Args[0]
  3485  		if x.Op != OpMIPSMOVBUload {
  3486  			break
  3487  		}
  3488  		off := x.AuxInt
  3489  		sym := x.Aux
  3490  		ptr := x.Args[0]
  3491  		mem := x.Args[1]
  3492  		if !(x.Uses == 1 && clobber(x)) {
  3493  			break
  3494  		}
  3495  		b = x.Block
  3496  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBload, t)
  3497  		v.reset(OpCopy)
  3498  		v.AddArg(v0)
  3499  		v0.AuxInt = off
  3500  		v0.Aux = sym
  3501  		v0.AddArg(ptr)
  3502  		v0.AddArg(mem)
  3503  		return true
  3504  	}
  3505  	// match: (MOVBreg (ANDconst [c] x))
  3506  	// cond: c & 0x80 == 0
  3507  	// result: (ANDconst [c&0x7f] x)
  3508  	for {
  3509  		v_0 := v.Args[0]
  3510  		if v_0.Op != OpMIPSANDconst {
  3511  			break
  3512  		}
  3513  		c := v_0.AuxInt
  3514  		x := v_0.Args[0]
  3515  		if !(c&0x80 == 0) {
  3516  			break
  3517  		}
  3518  		v.reset(OpMIPSANDconst)
  3519  		v.AuxInt = c & 0x7f
  3520  		v.AddArg(x)
  3521  		return true
  3522  	}
  3523  	// match: (MOVBreg (MOVWconst [c]))
  3524  	// cond:
  3525  	// result: (MOVWconst [int64(int8(c))])
  3526  	for {
  3527  		v_0 := v.Args[0]
  3528  		if v_0.Op != OpMIPSMOVWconst {
  3529  			break
  3530  		}
  3531  		c := v_0.AuxInt
  3532  		v.reset(OpMIPSMOVWconst)
  3533  		v.AuxInt = int64(int8(c))
  3534  		return true
  3535  	}
  3536  	return false
  3537  }
  3538  func rewriteValueMIPS_OpMIPSMOVBstore(v *Value) bool {
  3539  	// match: (MOVBstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3540  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  3541  	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
  3542  	for {
  3543  		off1 := v.AuxInt
  3544  		sym := v.Aux
  3545  		x := v.Args[0]
  3546  		if x.Op != OpMIPSADDconst {
  3547  			break
  3548  		}
  3549  		off2 := x.AuxInt
  3550  		ptr := x.Args[0]
  3551  		val := v.Args[1]
  3552  		mem := v.Args[2]
  3553  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  3554  			break
  3555  		}
  3556  		v.reset(OpMIPSMOVBstore)
  3557  		v.AuxInt = off1 + off2
  3558  		v.Aux = sym
  3559  		v.AddArg(ptr)
  3560  		v.AddArg(val)
  3561  		v.AddArg(mem)
  3562  		return true
  3563  	}
  3564  	// match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3565  	// cond: canMergeSym(sym1,sym2)
  3566  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3567  	for {
  3568  		off1 := v.AuxInt
  3569  		sym1 := v.Aux
  3570  		v_0 := v.Args[0]
  3571  		if v_0.Op != OpMIPSMOVWaddr {
  3572  			break
  3573  		}
  3574  		off2 := v_0.AuxInt
  3575  		sym2 := v_0.Aux
  3576  		ptr := v_0.Args[0]
  3577  		val := v.Args[1]
  3578  		mem := v.Args[2]
  3579  		if !(canMergeSym(sym1, sym2)) {
  3580  			break
  3581  		}
  3582  		v.reset(OpMIPSMOVBstore)
  3583  		v.AuxInt = off1 + off2
  3584  		v.Aux = mergeSym(sym1, sym2)
  3585  		v.AddArg(ptr)
  3586  		v.AddArg(val)
  3587  		v.AddArg(mem)
  3588  		return true
  3589  	}
  3590  	// match: (MOVBstore [off] {sym} ptr (MOVWconst [0]) mem)
  3591  	// cond:
  3592  	// result: (MOVBstorezero [off] {sym} ptr mem)
  3593  	for {
  3594  		off := v.AuxInt
  3595  		sym := v.Aux
  3596  		ptr := v.Args[0]
  3597  		v_1 := v.Args[1]
  3598  		if v_1.Op != OpMIPSMOVWconst {
  3599  			break
  3600  		}
  3601  		if v_1.AuxInt != 0 {
  3602  			break
  3603  		}
  3604  		mem := v.Args[2]
  3605  		v.reset(OpMIPSMOVBstorezero)
  3606  		v.AuxInt = off
  3607  		v.Aux = sym
  3608  		v.AddArg(ptr)
  3609  		v.AddArg(mem)
  3610  		return true
  3611  	}
  3612  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  3613  	// cond:
  3614  	// result: (MOVBstore [off] {sym} ptr x mem)
  3615  	for {
  3616  		off := v.AuxInt
  3617  		sym := v.Aux
  3618  		ptr := v.Args[0]
  3619  		v_1 := v.Args[1]
  3620  		if v_1.Op != OpMIPSMOVBreg {
  3621  			break
  3622  		}
  3623  		x := v_1.Args[0]
  3624  		mem := v.Args[2]
  3625  		v.reset(OpMIPSMOVBstore)
  3626  		v.AuxInt = off
  3627  		v.Aux = sym
  3628  		v.AddArg(ptr)
  3629  		v.AddArg(x)
  3630  		v.AddArg(mem)
  3631  		return true
  3632  	}
  3633  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  3634  	// cond:
  3635  	// result: (MOVBstore [off] {sym} ptr x mem)
  3636  	for {
  3637  		off := v.AuxInt
  3638  		sym := v.Aux
  3639  		ptr := v.Args[0]
  3640  		v_1 := v.Args[1]
  3641  		if v_1.Op != OpMIPSMOVBUreg {
  3642  			break
  3643  		}
  3644  		x := v_1.Args[0]
  3645  		mem := v.Args[2]
  3646  		v.reset(OpMIPSMOVBstore)
  3647  		v.AuxInt = off
  3648  		v.Aux = sym
  3649  		v.AddArg(ptr)
  3650  		v.AddArg(x)
  3651  		v.AddArg(mem)
  3652  		return true
  3653  	}
  3654  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  3655  	// cond:
  3656  	// result: (MOVBstore [off] {sym} ptr x mem)
  3657  	for {
  3658  		off := v.AuxInt
  3659  		sym := v.Aux
  3660  		ptr := v.Args[0]
  3661  		v_1 := v.Args[1]
  3662  		if v_1.Op != OpMIPSMOVHreg {
  3663  			break
  3664  		}
  3665  		x := v_1.Args[0]
  3666  		mem := v.Args[2]
  3667  		v.reset(OpMIPSMOVBstore)
  3668  		v.AuxInt = off
  3669  		v.Aux = sym
  3670  		v.AddArg(ptr)
  3671  		v.AddArg(x)
  3672  		v.AddArg(mem)
  3673  		return true
  3674  	}
  3675  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  3676  	// cond:
  3677  	// result: (MOVBstore [off] {sym} ptr x mem)
  3678  	for {
  3679  		off := v.AuxInt
  3680  		sym := v.Aux
  3681  		ptr := v.Args[0]
  3682  		v_1 := v.Args[1]
  3683  		if v_1.Op != OpMIPSMOVHUreg {
  3684  			break
  3685  		}
  3686  		x := v_1.Args[0]
  3687  		mem := v.Args[2]
  3688  		v.reset(OpMIPSMOVBstore)
  3689  		v.AuxInt = off
  3690  		v.Aux = sym
  3691  		v.AddArg(ptr)
  3692  		v.AddArg(x)
  3693  		v.AddArg(mem)
  3694  		return true
  3695  	}
  3696  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  3697  	// cond:
  3698  	// result: (MOVBstore [off] {sym} ptr x mem)
  3699  	for {
  3700  		off := v.AuxInt
  3701  		sym := v.Aux
  3702  		ptr := v.Args[0]
  3703  		v_1 := v.Args[1]
  3704  		if v_1.Op != OpMIPSMOVWreg {
  3705  			break
  3706  		}
  3707  		x := v_1.Args[0]
  3708  		mem := v.Args[2]
  3709  		v.reset(OpMIPSMOVBstore)
  3710  		v.AuxInt = off
  3711  		v.Aux = sym
  3712  		v.AddArg(ptr)
  3713  		v.AddArg(x)
  3714  		v.AddArg(mem)
  3715  		return true
  3716  	}
  3717  	return false
  3718  }
  3719  func rewriteValueMIPS_OpMIPSMOVBstorezero(v *Value) bool {
  3720  	// match: (MOVBstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3721  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  3722  	// result: (MOVBstorezero [off1+off2] {sym} ptr mem)
  3723  	for {
  3724  		off1 := v.AuxInt
  3725  		sym := v.Aux
  3726  		x := v.Args[0]
  3727  		if x.Op != OpMIPSADDconst {
  3728  			break
  3729  		}
  3730  		off2 := x.AuxInt
  3731  		ptr := x.Args[0]
  3732  		mem := v.Args[1]
  3733  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  3734  			break
  3735  		}
  3736  		v.reset(OpMIPSMOVBstorezero)
  3737  		v.AuxInt = off1 + off2
  3738  		v.Aux = sym
  3739  		v.AddArg(ptr)
  3740  		v.AddArg(mem)
  3741  		return true
  3742  	}
  3743  	// match: (MOVBstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3744  	// cond: canMergeSym(sym1,sym2)
  3745  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3746  	for {
  3747  		off1 := v.AuxInt
  3748  		sym1 := v.Aux
  3749  		v_0 := v.Args[0]
  3750  		if v_0.Op != OpMIPSMOVWaddr {
  3751  			break
  3752  		}
  3753  		off2 := v_0.AuxInt
  3754  		sym2 := v_0.Aux
  3755  		ptr := v_0.Args[0]
  3756  		mem := v.Args[1]
  3757  		if !(canMergeSym(sym1, sym2)) {
  3758  			break
  3759  		}
  3760  		v.reset(OpMIPSMOVBstorezero)
  3761  		v.AuxInt = off1 + off2
  3762  		v.Aux = mergeSym(sym1, sym2)
  3763  		v.AddArg(ptr)
  3764  		v.AddArg(mem)
  3765  		return true
  3766  	}
  3767  	return false
  3768  }
  3769  func rewriteValueMIPS_OpMIPSMOVDload(v *Value) bool {
  3770  	// match: (MOVDload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3771  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  3772  	// result: (MOVDload  [off1+off2] {sym} ptr mem)
  3773  	for {
  3774  		off1 := v.AuxInt
  3775  		sym := v.Aux
  3776  		x := v.Args[0]
  3777  		if x.Op != OpMIPSADDconst {
  3778  			break
  3779  		}
  3780  		off2 := x.AuxInt
  3781  		ptr := x.Args[0]
  3782  		mem := v.Args[1]
  3783  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  3784  			break
  3785  		}
  3786  		v.reset(OpMIPSMOVDload)
  3787  		v.AuxInt = off1 + off2
  3788  		v.Aux = sym
  3789  		v.AddArg(ptr)
  3790  		v.AddArg(mem)
  3791  		return true
  3792  	}
  3793  	// match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3794  	// cond: canMergeSym(sym1,sym2)
  3795  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3796  	for {
  3797  		off1 := v.AuxInt
  3798  		sym1 := v.Aux
  3799  		v_0 := v.Args[0]
  3800  		if v_0.Op != OpMIPSMOVWaddr {
  3801  			break
  3802  		}
  3803  		off2 := v_0.AuxInt
  3804  		sym2 := v_0.Aux
  3805  		ptr := v_0.Args[0]
  3806  		mem := v.Args[1]
  3807  		if !(canMergeSym(sym1, sym2)) {
  3808  			break
  3809  		}
  3810  		v.reset(OpMIPSMOVDload)
  3811  		v.AuxInt = off1 + off2
  3812  		v.Aux = mergeSym(sym1, sym2)
  3813  		v.AddArg(ptr)
  3814  		v.AddArg(mem)
  3815  		return true
  3816  	}
  3817  	// match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _))
  3818  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3819  	// result: x
  3820  	for {
  3821  		off := v.AuxInt
  3822  		sym := v.Aux
  3823  		ptr := v.Args[0]
  3824  		v_1 := v.Args[1]
  3825  		if v_1.Op != OpMIPSMOVDstore {
  3826  			break
  3827  		}
  3828  		off2 := v_1.AuxInt
  3829  		sym2 := v_1.Aux
  3830  		ptr2 := v_1.Args[0]
  3831  		x := v_1.Args[1]
  3832  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3833  			break
  3834  		}
  3835  		v.reset(OpCopy)
  3836  		v.Type = x.Type
  3837  		v.AddArg(x)
  3838  		return true
  3839  	}
  3840  	return false
  3841  }
  3842  func rewriteValueMIPS_OpMIPSMOVDstore(v *Value) bool {
  3843  	// match: (MOVDstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3844  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  3845  	// result: (MOVDstore [off1+off2] {sym} ptr val mem)
  3846  	for {
  3847  		off1 := v.AuxInt
  3848  		sym := v.Aux
  3849  		x := v.Args[0]
  3850  		if x.Op != OpMIPSADDconst {
  3851  			break
  3852  		}
  3853  		off2 := x.AuxInt
  3854  		ptr := x.Args[0]
  3855  		val := v.Args[1]
  3856  		mem := v.Args[2]
  3857  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  3858  			break
  3859  		}
  3860  		v.reset(OpMIPSMOVDstore)
  3861  		v.AuxInt = off1 + off2
  3862  		v.Aux = sym
  3863  		v.AddArg(ptr)
  3864  		v.AddArg(val)
  3865  		v.AddArg(mem)
  3866  		return true
  3867  	}
  3868  	// match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3869  	// cond: canMergeSym(sym1,sym2)
  3870  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3871  	for {
  3872  		off1 := v.AuxInt
  3873  		sym1 := v.Aux
  3874  		v_0 := v.Args[0]
  3875  		if v_0.Op != OpMIPSMOVWaddr {
  3876  			break
  3877  		}
  3878  		off2 := v_0.AuxInt
  3879  		sym2 := v_0.Aux
  3880  		ptr := v_0.Args[0]
  3881  		val := v.Args[1]
  3882  		mem := v.Args[2]
  3883  		if !(canMergeSym(sym1, sym2)) {
  3884  			break
  3885  		}
  3886  		v.reset(OpMIPSMOVDstore)
  3887  		v.AuxInt = off1 + off2
  3888  		v.Aux = mergeSym(sym1, sym2)
  3889  		v.AddArg(ptr)
  3890  		v.AddArg(val)
  3891  		v.AddArg(mem)
  3892  		return true
  3893  	}
  3894  	return false
  3895  }
  3896  func rewriteValueMIPS_OpMIPSMOVFload(v *Value) bool {
  3897  	// match: (MOVFload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3898  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  3899  	// result: (MOVFload  [off1+off2] {sym} ptr mem)
  3900  	for {
  3901  		off1 := v.AuxInt
  3902  		sym := v.Aux
  3903  		x := v.Args[0]
  3904  		if x.Op != OpMIPSADDconst {
  3905  			break
  3906  		}
  3907  		off2 := x.AuxInt
  3908  		ptr := x.Args[0]
  3909  		mem := v.Args[1]
  3910  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  3911  			break
  3912  		}
  3913  		v.reset(OpMIPSMOVFload)
  3914  		v.AuxInt = off1 + off2
  3915  		v.Aux = sym
  3916  		v.AddArg(ptr)
  3917  		v.AddArg(mem)
  3918  		return true
  3919  	}
  3920  	// match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3921  	// cond: canMergeSym(sym1,sym2)
  3922  	// result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3923  	for {
  3924  		off1 := v.AuxInt
  3925  		sym1 := v.Aux
  3926  		v_0 := v.Args[0]
  3927  		if v_0.Op != OpMIPSMOVWaddr {
  3928  			break
  3929  		}
  3930  		off2 := v_0.AuxInt
  3931  		sym2 := v_0.Aux
  3932  		ptr := v_0.Args[0]
  3933  		mem := v.Args[1]
  3934  		if !(canMergeSym(sym1, sym2)) {
  3935  			break
  3936  		}
  3937  		v.reset(OpMIPSMOVFload)
  3938  		v.AuxInt = off1 + off2
  3939  		v.Aux = mergeSym(sym1, sym2)
  3940  		v.AddArg(ptr)
  3941  		v.AddArg(mem)
  3942  		return true
  3943  	}
  3944  	// match: (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _))
  3945  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3946  	// result: x
  3947  	for {
  3948  		off := v.AuxInt
  3949  		sym := v.Aux
  3950  		ptr := v.Args[0]
  3951  		v_1 := v.Args[1]
  3952  		if v_1.Op != OpMIPSMOVFstore {
  3953  			break
  3954  		}
  3955  		off2 := v_1.AuxInt
  3956  		sym2 := v_1.Aux
  3957  		ptr2 := v_1.Args[0]
  3958  		x := v_1.Args[1]
  3959  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3960  			break
  3961  		}
  3962  		v.reset(OpCopy)
  3963  		v.Type = x.Type
  3964  		v.AddArg(x)
  3965  		return true
  3966  	}
  3967  	return false
  3968  }
  3969  func rewriteValueMIPS_OpMIPSMOVFstore(v *Value) bool {
  3970  	// match: (MOVFstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3971  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  3972  	// result: (MOVFstore [off1+off2] {sym} ptr val mem)
  3973  	for {
  3974  		off1 := v.AuxInt
  3975  		sym := v.Aux
  3976  		x := v.Args[0]
  3977  		if x.Op != OpMIPSADDconst {
  3978  			break
  3979  		}
  3980  		off2 := x.AuxInt
  3981  		ptr := x.Args[0]
  3982  		val := v.Args[1]
  3983  		mem := v.Args[2]
  3984  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  3985  			break
  3986  		}
  3987  		v.reset(OpMIPSMOVFstore)
  3988  		v.AuxInt = off1 + off2
  3989  		v.Aux = sym
  3990  		v.AddArg(ptr)
  3991  		v.AddArg(val)
  3992  		v.AddArg(mem)
  3993  		return true
  3994  	}
  3995  	// match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3996  	// cond: canMergeSym(sym1,sym2)
  3997  	// result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3998  	for {
  3999  		off1 := v.AuxInt
  4000  		sym1 := v.Aux
  4001  		v_0 := v.Args[0]
  4002  		if v_0.Op != OpMIPSMOVWaddr {
  4003  			break
  4004  		}
  4005  		off2 := v_0.AuxInt
  4006  		sym2 := v_0.Aux
  4007  		ptr := v_0.Args[0]
  4008  		val := v.Args[1]
  4009  		mem := v.Args[2]
  4010  		if !(canMergeSym(sym1, sym2)) {
  4011  			break
  4012  		}
  4013  		v.reset(OpMIPSMOVFstore)
  4014  		v.AuxInt = off1 + off2
  4015  		v.Aux = mergeSym(sym1, sym2)
  4016  		v.AddArg(ptr)
  4017  		v.AddArg(val)
  4018  		v.AddArg(mem)
  4019  		return true
  4020  	}
  4021  	return false
  4022  }
  4023  func rewriteValueMIPS_OpMIPSMOVHUload(v *Value) bool {
  4024  	// match: (MOVHUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  4025  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  4026  	// result: (MOVHUload [off1+off2] {sym} ptr mem)
  4027  	for {
  4028  		off1 := v.AuxInt
  4029  		sym := v.Aux
  4030  		x := v.Args[0]
  4031  		if x.Op != OpMIPSADDconst {
  4032  			break
  4033  		}
  4034  		off2 := x.AuxInt
  4035  		ptr := x.Args[0]
  4036  		mem := v.Args[1]
  4037  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  4038  			break
  4039  		}
  4040  		v.reset(OpMIPSMOVHUload)
  4041  		v.AuxInt = off1 + off2
  4042  		v.Aux = sym
  4043  		v.AddArg(ptr)
  4044  		v.AddArg(mem)
  4045  		return true
  4046  	}
  4047  	// match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  4048  	// cond: canMergeSym(sym1,sym2)
  4049  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4050  	for {
  4051  		off1 := v.AuxInt
  4052  		sym1 := v.Aux
  4053  		v_0 := v.Args[0]
  4054  		if v_0.Op != OpMIPSMOVWaddr {
  4055  			break
  4056  		}
  4057  		off2 := v_0.AuxInt
  4058  		sym2 := v_0.Aux
  4059  		ptr := v_0.Args[0]
  4060  		mem := v.Args[1]
  4061  		if !(canMergeSym(sym1, sym2)) {
  4062  			break
  4063  		}
  4064  		v.reset(OpMIPSMOVHUload)
  4065  		v.AuxInt = off1 + off2
  4066  		v.Aux = mergeSym(sym1, sym2)
  4067  		v.AddArg(ptr)
  4068  		v.AddArg(mem)
  4069  		return true
  4070  	}
  4071  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  4072  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && !isSigned(x.Type)
  4073  	// result: x
  4074  	for {
  4075  		off := v.AuxInt
  4076  		sym := v.Aux
  4077  		ptr := v.Args[0]
  4078  		v_1 := v.Args[1]
  4079  		if v_1.Op != OpMIPSMOVHstore {
  4080  			break
  4081  		}
  4082  		off2 := v_1.AuxInt
  4083  		sym2 := v_1.Aux
  4084  		ptr2 := v_1.Args[0]
  4085  		x := v_1.Args[1]
  4086  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && !isSigned(x.Type)) {
  4087  			break
  4088  		}
  4089  		v.reset(OpCopy)
  4090  		v.Type = x.Type
  4091  		v.AddArg(x)
  4092  		return true
  4093  	}
  4094  	return false
  4095  }
  4096  func rewriteValueMIPS_OpMIPSMOVHUreg(v *Value) bool {
  4097  	b := v.Block
  4098  	_ = b
  4099  	// match: (MOVHUreg x:(MOVBUload _ _))
  4100  	// cond:
  4101  	// result: (MOVWreg x)
  4102  	for {
  4103  		x := v.Args[0]
  4104  		if x.Op != OpMIPSMOVBUload {
  4105  			break
  4106  		}
  4107  		v.reset(OpMIPSMOVWreg)
  4108  		v.AddArg(x)
  4109  		return true
  4110  	}
  4111  	// match: (MOVHUreg x:(MOVHUload _ _))
  4112  	// cond:
  4113  	// result: (MOVWreg x)
  4114  	for {
  4115  		x := v.Args[0]
  4116  		if x.Op != OpMIPSMOVHUload {
  4117  			break
  4118  		}
  4119  		v.reset(OpMIPSMOVWreg)
  4120  		v.AddArg(x)
  4121  		return true
  4122  	}
  4123  	// match: (MOVHUreg x:(MOVBUreg _))
  4124  	// cond:
  4125  	// result: (MOVWreg x)
  4126  	for {
  4127  		x := v.Args[0]
  4128  		if x.Op != OpMIPSMOVBUreg {
  4129  			break
  4130  		}
  4131  		v.reset(OpMIPSMOVWreg)
  4132  		v.AddArg(x)
  4133  		return true
  4134  	}
  4135  	// match: (MOVHUreg x:(MOVHUreg _))
  4136  	// cond:
  4137  	// result: (MOVWreg x)
  4138  	for {
  4139  		x := v.Args[0]
  4140  		if x.Op != OpMIPSMOVHUreg {
  4141  			break
  4142  		}
  4143  		v.reset(OpMIPSMOVWreg)
  4144  		v.AddArg(x)
  4145  		return true
  4146  	}
  4147  	// match: (MOVHUreg <t> x:(MOVHload [off] {sym} ptr mem))
  4148  	// cond: x.Uses == 1 && clobber(x)
  4149  	// result: @x.Block (MOVHUload <t> [off] {sym} ptr mem)
  4150  	for {
  4151  		t := v.Type
  4152  		x := v.Args[0]
  4153  		if x.Op != OpMIPSMOVHload {
  4154  			break
  4155  		}
  4156  		off := x.AuxInt
  4157  		sym := x.Aux
  4158  		ptr := x.Args[0]
  4159  		mem := x.Args[1]
  4160  		if !(x.Uses == 1 && clobber(x)) {
  4161  			break
  4162  		}
  4163  		b = x.Block
  4164  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, t)
  4165  		v.reset(OpCopy)
  4166  		v.AddArg(v0)
  4167  		v0.AuxInt = off
  4168  		v0.Aux = sym
  4169  		v0.AddArg(ptr)
  4170  		v0.AddArg(mem)
  4171  		return true
  4172  	}
  4173  	// match: (MOVHUreg (ANDconst [c] x))
  4174  	// cond:
  4175  	// result: (ANDconst [c&0xffff] x)
  4176  	for {
  4177  		v_0 := v.Args[0]
  4178  		if v_0.Op != OpMIPSANDconst {
  4179  			break
  4180  		}
  4181  		c := v_0.AuxInt
  4182  		x := v_0.Args[0]
  4183  		v.reset(OpMIPSANDconst)
  4184  		v.AuxInt = c & 0xffff
  4185  		v.AddArg(x)
  4186  		return true
  4187  	}
  4188  	// match: (MOVHUreg (MOVWconst [c]))
  4189  	// cond:
  4190  	// result: (MOVWconst [int64(uint16(c))])
  4191  	for {
  4192  		v_0 := v.Args[0]
  4193  		if v_0.Op != OpMIPSMOVWconst {
  4194  			break
  4195  		}
  4196  		c := v_0.AuxInt
  4197  		v.reset(OpMIPSMOVWconst)
  4198  		v.AuxInt = int64(uint16(c))
  4199  		return true
  4200  	}
  4201  	return false
  4202  }
  4203  func rewriteValueMIPS_OpMIPSMOVHload(v *Value) bool {
  4204  	// match: (MOVHload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  4205  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  4206  	// result: (MOVHload  [off1+off2] {sym} ptr mem)
  4207  	for {
  4208  		off1 := v.AuxInt
  4209  		sym := v.Aux
  4210  		x := v.Args[0]
  4211  		if x.Op != OpMIPSADDconst {
  4212  			break
  4213  		}
  4214  		off2 := x.AuxInt
  4215  		ptr := x.Args[0]
  4216  		mem := v.Args[1]
  4217  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  4218  			break
  4219  		}
  4220  		v.reset(OpMIPSMOVHload)
  4221  		v.AuxInt = off1 + off2
  4222  		v.Aux = sym
  4223  		v.AddArg(ptr)
  4224  		v.AddArg(mem)
  4225  		return true
  4226  	}
  4227  	// match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  4228  	// cond: canMergeSym(sym1,sym2)
  4229  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4230  	for {
  4231  		off1 := v.AuxInt
  4232  		sym1 := v.Aux
  4233  		v_0 := v.Args[0]
  4234  		if v_0.Op != OpMIPSMOVWaddr {
  4235  			break
  4236  		}
  4237  		off2 := v_0.AuxInt
  4238  		sym2 := v_0.Aux
  4239  		ptr := v_0.Args[0]
  4240  		mem := v.Args[1]
  4241  		if !(canMergeSym(sym1, sym2)) {
  4242  			break
  4243  		}
  4244  		v.reset(OpMIPSMOVHload)
  4245  		v.AuxInt = off1 + off2
  4246  		v.Aux = mergeSym(sym1, sym2)
  4247  		v.AddArg(ptr)
  4248  		v.AddArg(mem)
  4249  		return true
  4250  	}
  4251  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  4252  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && isSigned(x.Type)
  4253  	// result: x
  4254  	for {
  4255  		off := v.AuxInt
  4256  		sym := v.Aux
  4257  		ptr := v.Args[0]
  4258  		v_1 := v.Args[1]
  4259  		if v_1.Op != OpMIPSMOVHstore {
  4260  			break
  4261  		}
  4262  		off2 := v_1.AuxInt
  4263  		sym2 := v_1.Aux
  4264  		ptr2 := v_1.Args[0]
  4265  		x := v_1.Args[1]
  4266  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) && isSigned(x.Type)) {
  4267  			break
  4268  		}
  4269  		v.reset(OpCopy)
  4270  		v.Type = x.Type
  4271  		v.AddArg(x)
  4272  		return true
  4273  	}
  4274  	return false
  4275  }
  4276  func rewriteValueMIPS_OpMIPSMOVHreg(v *Value) bool {
  4277  	b := v.Block
  4278  	_ = b
  4279  	// match: (MOVHreg x:(MOVBload _ _))
  4280  	// cond:
  4281  	// result: (MOVWreg x)
  4282  	for {
  4283  		x := v.Args[0]
  4284  		if x.Op != OpMIPSMOVBload {
  4285  			break
  4286  		}
  4287  		v.reset(OpMIPSMOVWreg)
  4288  		v.AddArg(x)
  4289  		return true
  4290  	}
  4291  	// match: (MOVHreg x:(MOVBUload _ _))
  4292  	// cond:
  4293  	// result: (MOVWreg x)
  4294  	for {
  4295  		x := v.Args[0]
  4296  		if x.Op != OpMIPSMOVBUload {
  4297  			break
  4298  		}
  4299  		v.reset(OpMIPSMOVWreg)
  4300  		v.AddArg(x)
  4301  		return true
  4302  	}
  4303  	// match: (MOVHreg x:(MOVHload _ _))
  4304  	// cond:
  4305  	// result: (MOVWreg x)
  4306  	for {
  4307  		x := v.Args[0]
  4308  		if x.Op != OpMIPSMOVHload {
  4309  			break
  4310  		}
  4311  		v.reset(OpMIPSMOVWreg)
  4312  		v.AddArg(x)
  4313  		return true
  4314  	}
  4315  	// match: (MOVHreg x:(MOVBreg _))
  4316  	// cond:
  4317  	// result: (MOVWreg x)
  4318  	for {
  4319  		x := v.Args[0]
  4320  		if x.Op != OpMIPSMOVBreg {
  4321  			break
  4322  		}
  4323  		v.reset(OpMIPSMOVWreg)
  4324  		v.AddArg(x)
  4325  		return true
  4326  	}
  4327  	// match: (MOVHreg x:(MOVBUreg _))
  4328  	// cond:
  4329  	// result: (MOVWreg x)
  4330  	for {
  4331  		x := v.Args[0]
  4332  		if x.Op != OpMIPSMOVBUreg {
  4333  			break
  4334  		}
  4335  		v.reset(OpMIPSMOVWreg)
  4336  		v.AddArg(x)
  4337  		return true
  4338  	}
  4339  	// match: (MOVHreg x:(MOVHreg _))
  4340  	// cond:
  4341  	// result: (MOVWreg x)
  4342  	for {
  4343  		x := v.Args[0]
  4344  		if x.Op != OpMIPSMOVHreg {
  4345  			break
  4346  		}
  4347  		v.reset(OpMIPSMOVWreg)
  4348  		v.AddArg(x)
  4349  		return true
  4350  	}
  4351  	// match: (MOVHreg <t> x:(MOVHUload [off] {sym} ptr mem))
  4352  	// cond: x.Uses == 1 && clobber(x)
  4353  	// result: @x.Block (MOVHload <t> [off] {sym} ptr mem)
  4354  	for {
  4355  		t := v.Type
  4356  		x := v.Args[0]
  4357  		if x.Op != OpMIPSMOVHUload {
  4358  			break
  4359  		}
  4360  		off := x.AuxInt
  4361  		sym := x.Aux
  4362  		ptr := x.Args[0]
  4363  		mem := x.Args[1]
  4364  		if !(x.Uses == 1 && clobber(x)) {
  4365  			break
  4366  		}
  4367  		b = x.Block
  4368  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, t)
  4369  		v.reset(OpCopy)
  4370  		v.AddArg(v0)
  4371  		v0.AuxInt = off
  4372  		v0.Aux = sym
  4373  		v0.AddArg(ptr)
  4374  		v0.AddArg(mem)
  4375  		return true
  4376  	}
  4377  	// match: (MOVHreg (ANDconst [c] x))
  4378  	// cond: c & 0x8000 == 0
  4379  	// result: (ANDconst [c&0x7fff] x)
  4380  	for {
  4381  		v_0 := v.Args[0]
  4382  		if v_0.Op != OpMIPSANDconst {
  4383  			break
  4384  		}
  4385  		c := v_0.AuxInt
  4386  		x := v_0.Args[0]
  4387  		if !(c&0x8000 == 0) {
  4388  			break
  4389  		}
  4390  		v.reset(OpMIPSANDconst)
  4391  		v.AuxInt = c & 0x7fff
  4392  		v.AddArg(x)
  4393  		return true
  4394  	}
  4395  	// match: (MOVHreg (MOVWconst [c]))
  4396  	// cond:
  4397  	// result: (MOVWconst [int64(int16(c))])
  4398  	for {
  4399  		v_0 := v.Args[0]
  4400  		if v_0.Op != OpMIPSMOVWconst {
  4401  			break
  4402  		}
  4403  		c := v_0.AuxInt
  4404  		v.reset(OpMIPSMOVWconst)
  4405  		v.AuxInt = int64(int16(c))
  4406  		return true
  4407  	}
  4408  	return false
  4409  }
  4410  func rewriteValueMIPS_OpMIPSMOVHstore(v *Value) bool {
  4411  	// match: (MOVHstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  4412  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  4413  	// result: (MOVHstore [off1+off2] {sym} ptr val mem)
  4414  	for {
  4415  		off1 := v.AuxInt
  4416  		sym := v.Aux
  4417  		x := v.Args[0]
  4418  		if x.Op != OpMIPSADDconst {
  4419  			break
  4420  		}
  4421  		off2 := x.AuxInt
  4422  		ptr := x.Args[0]
  4423  		val := v.Args[1]
  4424  		mem := v.Args[2]
  4425  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  4426  			break
  4427  		}
  4428  		v.reset(OpMIPSMOVHstore)
  4429  		v.AuxInt = off1 + off2
  4430  		v.Aux = sym
  4431  		v.AddArg(ptr)
  4432  		v.AddArg(val)
  4433  		v.AddArg(mem)
  4434  		return true
  4435  	}
  4436  	// match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  4437  	// cond: canMergeSym(sym1,sym2)
  4438  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  4439  	for {
  4440  		off1 := v.AuxInt
  4441  		sym1 := v.Aux
  4442  		v_0 := v.Args[0]
  4443  		if v_0.Op != OpMIPSMOVWaddr {
  4444  			break
  4445  		}
  4446  		off2 := v_0.AuxInt
  4447  		sym2 := v_0.Aux
  4448  		ptr := v_0.Args[0]
  4449  		val := v.Args[1]
  4450  		mem := v.Args[2]
  4451  		if !(canMergeSym(sym1, sym2)) {
  4452  			break
  4453  		}
  4454  		v.reset(OpMIPSMOVHstore)
  4455  		v.AuxInt = off1 + off2
  4456  		v.Aux = mergeSym(sym1, sym2)
  4457  		v.AddArg(ptr)
  4458  		v.AddArg(val)
  4459  		v.AddArg(mem)
  4460  		return true
  4461  	}
  4462  	// match: (MOVHstore [off] {sym} ptr (MOVWconst [0]) mem)
  4463  	// cond:
  4464  	// result: (MOVHstorezero [off] {sym} ptr mem)
  4465  	for {
  4466  		off := v.AuxInt
  4467  		sym := v.Aux
  4468  		ptr := v.Args[0]
  4469  		v_1 := v.Args[1]
  4470  		if v_1.Op != OpMIPSMOVWconst {
  4471  			break
  4472  		}
  4473  		if v_1.AuxInt != 0 {
  4474  			break
  4475  		}
  4476  		mem := v.Args[2]
  4477  		v.reset(OpMIPSMOVHstorezero)
  4478  		v.AuxInt = off
  4479  		v.Aux = sym
  4480  		v.AddArg(ptr)
  4481  		v.AddArg(mem)
  4482  		return true
  4483  	}
  4484  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  4485  	// cond:
  4486  	// result: (MOVHstore [off] {sym} ptr x mem)
  4487  	for {
  4488  		off := v.AuxInt
  4489  		sym := v.Aux
  4490  		ptr := v.Args[0]
  4491  		v_1 := v.Args[1]
  4492  		if v_1.Op != OpMIPSMOVHreg {
  4493  			break
  4494  		}
  4495  		x := v_1.Args[0]
  4496  		mem := v.Args[2]
  4497  		v.reset(OpMIPSMOVHstore)
  4498  		v.AuxInt = off
  4499  		v.Aux = sym
  4500  		v.AddArg(ptr)
  4501  		v.AddArg(x)
  4502  		v.AddArg(mem)
  4503  		return true
  4504  	}
  4505  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  4506  	// cond:
  4507  	// result: (MOVHstore [off] {sym} ptr x mem)
  4508  	for {
  4509  		off := v.AuxInt
  4510  		sym := v.Aux
  4511  		ptr := v.Args[0]
  4512  		v_1 := v.Args[1]
  4513  		if v_1.Op != OpMIPSMOVHUreg {
  4514  			break
  4515  		}
  4516  		x := v_1.Args[0]
  4517  		mem := v.Args[2]
  4518  		v.reset(OpMIPSMOVHstore)
  4519  		v.AuxInt = off
  4520  		v.Aux = sym
  4521  		v.AddArg(ptr)
  4522  		v.AddArg(x)
  4523  		v.AddArg(mem)
  4524  		return true
  4525  	}
  4526  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  4527  	// cond:
  4528  	// result: (MOVHstore [off] {sym} ptr x mem)
  4529  	for {
  4530  		off := v.AuxInt
  4531  		sym := v.Aux
  4532  		ptr := v.Args[0]
  4533  		v_1 := v.Args[1]
  4534  		if v_1.Op != OpMIPSMOVWreg {
  4535  			break
  4536  		}
  4537  		x := v_1.Args[0]
  4538  		mem := v.Args[2]
  4539  		v.reset(OpMIPSMOVHstore)
  4540  		v.AuxInt = off
  4541  		v.Aux = sym
  4542  		v.AddArg(ptr)
  4543  		v.AddArg(x)
  4544  		v.AddArg(mem)
  4545  		return true
  4546  	}
  4547  	return false
  4548  }
  4549  func rewriteValueMIPS_OpMIPSMOVHstorezero(v *Value) bool {
  4550  	// match: (MOVHstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  4551  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  4552  	// result: (MOVHstorezero [off1+off2] {sym} ptr mem)
  4553  	for {
  4554  		off1 := v.AuxInt
  4555  		sym := v.Aux
  4556  		x := v.Args[0]
  4557  		if x.Op != OpMIPSADDconst {
  4558  			break
  4559  		}
  4560  		off2 := x.AuxInt
  4561  		ptr := x.Args[0]
  4562  		mem := v.Args[1]
  4563  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  4564  			break
  4565  		}
  4566  		v.reset(OpMIPSMOVHstorezero)
  4567  		v.AuxInt = off1 + off2
  4568  		v.Aux = sym
  4569  		v.AddArg(ptr)
  4570  		v.AddArg(mem)
  4571  		return true
  4572  	}
  4573  	// match: (MOVHstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  4574  	// cond: canMergeSym(sym1,sym2)
  4575  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4576  	for {
  4577  		off1 := v.AuxInt
  4578  		sym1 := v.Aux
  4579  		v_0 := v.Args[0]
  4580  		if v_0.Op != OpMIPSMOVWaddr {
  4581  			break
  4582  		}
  4583  		off2 := v_0.AuxInt
  4584  		sym2 := v_0.Aux
  4585  		ptr := v_0.Args[0]
  4586  		mem := v.Args[1]
  4587  		if !(canMergeSym(sym1, sym2)) {
  4588  			break
  4589  		}
  4590  		v.reset(OpMIPSMOVHstorezero)
  4591  		v.AuxInt = off1 + off2
  4592  		v.Aux = mergeSym(sym1, sym2)
  4593  		v.AddArg(ptr)
  4594  		v.AddArg(mem)
  4595  		return true
  4596  	}
  4597  	return false
  4598  }
  4599  func rewriteValueMIPS_OpMIPSMOVWload(v *Value) bool {
  4600  	// match: (MOVWload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  4601  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  4602  	// result: (MOVWload  [off1+off2] {sym} ptr mem)
  4603  	for {
  4604  		off1 := v.AuxInt
  4605  		sym := v.Aux
  4606  		x := v.Args[0]
  4607  		if x.Op != OpMIPSADDconst {
  4608  			break
  4609  		}
  4610  		off2 := x.AuxInt
  4611  		ptr := x.Args[0]
  4612  		mem := v.Args[1]
  4613  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  4614  			break
  4615  		}
  4616  		v.reset(OpMIPSMOVWload)
  4617  		v.AuxInt = off1 + off2
  4618  		v.Aux = sym
  4619  		v.AddArg(ptr)
  4620  		v.AddArg(mem)
  4621  		return true
  4622  	}
  4623  	// match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  4624  	// cond: canMergeSym(sym1,sym2)
  4625  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4626  	for {
  4627  		off1 := v.AuxInt
  4628  		sym1 := v.Aux
  4629  		v_0 := v.Args[0]
  4630  		if v_0.Op != OpMIPSMOVWaddr {
  4631  			break
  4632  		}
  4633  		off2 := v_0.AuxInt
  4634  		sym2 := v_0.Aux
  4635  		ptr := v_0.Args[0]
  4636  		mem := v.Args[1]
  4637  		if !(canMergeSym(sym1, sym2)) {
  4638  			break
  4639  		}
  4640  		v.reset(OpMIPSMOVWload)
  4641  		v.AuxInt = off1 + off2
  4642  		v.Aux = mergeSym(sym1, sym2)
  4643  		v.AddArg(ptr)
  4644  		v.AddArg(mem)
  4645  		return true
  4646  	}
  4647  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
  4648  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  4649  	// result: x
  4650  	for {
  4651  		off := v.AuxInt
  4652  		sym := v.Aux
  4653  		ptr := v.Args[0]
  4654  		v_1 := v.Args[1]
  4655  		if v_1.Op != OpMIPSMOVWstore {
  4656  			break
  4657  		}
  4658  		off2 := v_1.AuxInt
  4659  		sym2 := v_1.Aux
  4660  		ptr2 := v_1.Args[0]
  4661  		x := v_1.Args[1]
  4662  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  4663  			break
  4664  		}
  4665  		v.reset(OpCopy)
  4666  		v.Type = x.Type
  4667  		v.AddArg(x)
  4668  		return true
  4669  	}
  4670  	return false
  4671  }
  4672  func rewriteValueMIPS_OpMIPSMOVWreg(v *Value) bool {
  4673  	// match: (MOVWreg x)
  4674  	// cond: x.Uses == 1
  4675  	// result: (MOVWnop x)
  4676  	for {
  4677  		x := v.Args[0]
  4678  		if !(x.Uses == 1) {
  4679  			break
  4680  		}
  4681  		v.reset(OpMIPSMOVWnop)
  4682  		v.AddArg(x)
  4683  		return true
  4684  	}
  4685  	// match: (MOVWreg (MOVWconst [c]))
  4686  	// cond:
  4687  	// result: (MOVWconst [c])
  4688  	for {
  4689  		v_0 := v.Args[0]
  4690  		if v_0.Op != OpMIPSMOVWconst {
  4691  			break
  4692  		}
  4693  		c := v_0.AuxInt
  4694  		v.reset(OpMIPSMOVWconst)
  4695  		v.AuxInt = c
  4696  		return true
  4697  	}
  4698  	return false
  4699  }
  4700  func rewriteValueMIPS_OpMIPSMOVWstore(v *Value) bool {
  4701  	// match: (MOVWstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  4702  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  4703  	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
  4704  	for {
  4705  		off1 := v.AuxInt
  4706  		sym := v.Aux
  4707  		x := v.Args[0]
  4708  		if x.Op != OpMIPSADDconst {
  4709  			break
  4710  		}
  4711  		off2 := x.AuxInt
  4712  		ptr := x.Args[0]
  4713  		val := v.Args[1]
  4714  		mem := v.Args[2]
  4715  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  4716  			break
  4717  		}
  4718  		v.reset(OpMIPSMOVWstore)
  4719  		v.AuxInt = off1 + off2
  4720  		v.Aux = sym
  4721  		v.AddArg(ptr)
  4722  		v.AddArg(val)
  4723  		v.AddArg(mem)
  4724  		return true
  4725  	}
  4726  	// match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  4727  	// cond: canMergeSym(sym1,sym2)
  4728  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  4729  	for {
  4730  		off1 := v.AuxInt
  4731  		sym1 := v.Aux
  4732  		v_0 := v.Args[0]
  4733  		if v_0.Op != OpMIPSMOVWaddr {
  4734  			break
  4735  		}
  4736  		off2 := v_0.AuxInt
  4737  		sym2 := v_0.Aux
  4738  		ptr := v_0.Args[0]
  4739  		val := v.Args[1]
  4740  		mem := v.Args[2]
  4741  		if !(canMergeSym(sym1, sym2)) {
  4742  			break
  4743  		}
  4744  		v.reset(OpMIPSMOVWstore)
  4745  		v.AuxInt = off1 + off2
  4746  		v.Aux = mergeSym(sym1, sym2)
  4747  		v.AddArg(ptr)
  4748  		v.AddArg(val)
  4749  		v.AddArg(mem)
  4750  		return true
  4751  	}
  4752  	// match: (MOVWstore [off] {sym} ptr (MOVWconst [0]) mem)
  4753  	// cond:
  4754  	// result: (MOVWstorezero [off] {sym} ptr mem)
  4755  	for {
  4756  		off := v.AuxInt
  4757  		sym := v.Aux
  4758  		ptr := v.Args[0]
  4759  		v_1 := v.Args[1]
  4760  		if v_1.Op != OpMIPSMOVWconst {
  4761  			break
  4762  		}
  4763  		if v_1.AuxInt != 0 {
  4764  			break
  4765  		}
  4766  		mem := v.Args[2]
  4767  		v.reset(OpMIPSMOVWstorezero)
  4768  		v.AuxInt = off
  4769  		v.Aux = sym
  4770  		v.AddArg(ptr)
  4771  		v.AddArg(mem)
  4772  		return true
  4773  	}
  4774  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  4775  	// cond:
  4776  	// result: (MOVWstore [off] {sym} ptr x mem)
  4777  	for {
  4778  		off := v.AuxInt
  4779  		sym := v.Aux
  4780  		ptr := v.Args[0]
  4781  		v_1 := v.Args[1]
  4782  		if v_1.Op != OpMIPSMOVWreg {
  4783  			break
  4784  		}
  4785  		x := v_1.Args[0]
  4786  		mem := v.Args[2]
  4787  		v.reset(OpMIPSMOVWstore)
  4788  		v.AuxInt = off
  4789  		v.Aux = sym
  4790  		v.AddArg(ptr)
  4791  		v.AddArg(x)
  4792  		v.AddArg(mem)
  4793  		return true
  4794  	}
  4795  	return false
  4796  }
  4797  func rewriteValueMIPS_OpMIPSMOVWstorezero(v *Value) bool {
  4798  	// match: (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  4799  	// cond: (is16Bit(off1+off2) || x.Uses == 1)
  4800  	// result: (MOVWstorezero [off1+off2] {sym} ptr mem)
  4801  	for {
  4802  		off1 := v.AuxInt
  4803  		sym := v.Aux
  4804  		x := v.Args[0]
  4805  		if x.Op != OpMIPSADDconst {
  4806  			break
  4807  		}
  4808  		off2 := x.AuxInt
  4809  		ptr := x.Args[0]
  4810  		mem := v.Args[1]
  4811  		if !(is16Bit(off1+off2) || x.Uses == 1) {
  4812  			break
  4813  		}
  4814  		v.reset(OpMIPSMOVWstorezero)
  4815  		v.AuxInt = off1 + off2
  4816  		v.Aux = sym
  4817  		v.AddArg(ptr)
  4818  		v.AddArg(mem)
  4819  		return true
  4820  	}
  4821  	// match: (MOVWstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  4822  	// cond: canMergeSym(sym1,sym2)
  4823  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4824  	for {
  4825  		off1 := v.AuxInt
  4826  		sym1 := v.Aux
  4827  		v_0 := v.Args[0]
  4828  		if v_0.Op != OpMIPSMOVWaddr {
  4829  			break
  4830  		}
  4831  		off2 := v_0.AuxInt
  4832  		sym2 := v_0.Aux
  4833  		ptr := v_0.Args[0]
  4834  		mem := v.Args[1]
  4835  		if !(canMergeSym(sym1, sym2)) {
  4836  			break
  4837  		}
  4838  		v.reset(OpMIPSMOVWstorezero)
  4839  		v.AuxInt = off1 + off2
  4840  		v.Aux = mergeSym(sym1, sym2)
  4841  		v.AddArg(ptr)
  4842  		v.AddArg(mem)
  4843  		return true
  4844  	}
  4845  	return false
  4846  }
  4847  func rewriteValueMIPS_OpMIPSMUL(v *Value) bool {
  4848  	// match: (MUL (MOVWconst [0]) _)
  4849  	// cond:
  4850  	// result: (MOVWconst [0])
  4851  	for {
  4852  		v_0 := v.Args[0]
  4853  		if v_0.Op != OpMIPSMOVWconst {
  4854  			break
  4855  		}
  4856  		if v_0.AuxInt != 0 {
  4857  			break
  4858  		}
  4859  		v.reset(OpMIPSMOVWconst)
  4860  		v.AuxInt = 0
  4861  		return true
  4862  	}
  4863  	// match: (MUL _ (MOVWconst [0]))
  4864  	// cond:
  4865  	// result: (MOVWconst [0])
  4866  	for {
  4867  		v_1 := v.Args[1]
  4868  		if v_1.Op != OpMIPSMOVWconst {
  4869  			break
  4870  		}
  4871  		if v_1.AuxInt != 0 {
  4872  			break
  4873  		}
  4874  		v.reset(OpMIPSMOVWconst)
  4875  		v.AuxInt = 0
  4876  		return true
  4877  	}
  4878  	// match: (MUL (MOVWconst [1]) x)
  4879  	// cond:
  4880  	// result: x
  4881  	for {
  4882  		v_0 := v.Args[0]
  4883  		if v_0.Op != OpMIPSMOVWconst {
  4884  			break
  4885  		}
  4886  		if v_0.AuxInt != 1 {
  4887  			break
  4888  		}
  4889  		x := v.Args[1]
  4890  		v.reset(OpCopy)
  4891  		v.Type = x.Type
  4892  		v.AddArg(x)
  4893  		return true
  4894  	}
  4895  	// match: (MUL x (MOVWconst [1]))
  4896  	// cond:
  4897  	// result: x
  4898  	for {
  4899  		x := v.Args[0]
  4900  		v_1 := v.Args[1]
  4901  		if v_1.Op != OpMIPSMOVWconst {
  4902  			break
  4903  		}
  4904  		if v_1.AuxInt != 1 {
  4905  			break
  4906  		}
  4907  		v.reset(OpCopy)
  4908  		v.Type = x.Type
  4909  		v.AddArg(x)
  4910  		return true
  4911  	}
  4912  	// match: (MUL (MOVWconst [-1]) x)
  4913  	// cond:
  4914  	// result: (NEG x)
  4915  	for {
  4916  		v_0 := v.Args[0]
  4917  		if v_0.Op != OpMIPSMOVWconst {
  4918  			break
  4919  		}
  4920  		if v_0.AuxInt != -1 {
  4921  			break
  4922  		}
  4923  		x := v.Args[1]
  4924  		v.reset(OpMIPSNEG)
  4925  		v.AddArg(x)
  4926  		return true
  4927  	}
  4928  	// match: (MUL x (MOVWconst [-1]))
  4929  	// cond:
  4930  	// result: (NEG x)
  4931  	for {
  4932  		x := v.Args[0]
  4933  		v_1 := v.Args[1]
  4934  		if v_1.Op != OpMIPSMOVWconst {
  4935  			break
  4936  		}
  4937  		if v_1.AuxInt != -1 {
  4938  			break
  4939  		}
  4940  		v.reset(OpMIPSNEG)
  4941  		v.AddArg(x)
  4942  		return true
  4943  	}
  4944  	// match: (MUL (MOVWconst [c]) x)
  4945  	// cond: isPowerOfTwo(int64(uint32(c)))
  4946  	// result: (SLLconst [log2(int64(uint32(c)))] x)
  4947  	for {
  4948  		v_0 := v.Args[0]
  4949  		if v_0.Op != OpMIPSMOVWconst {
  4950  			break
  4951  		}
  4952  		c := v_0.AuxInt
  4953  		x := v.Args[1]
  4954  		if !(isPowerOfTwo(int64(uint32(c)))) {
  4955  			break
  4956  		}
  4957  		v.reset(OpMIPSSLLconst)
  4958  		v.AuxInt = log2(int64(uint32(c)))
  4959  		v.AddArg(x)
  4960  		return true
  4961  	}
  4962  	// match: (MUL x (MOVWconst [c]))
  4963  	// cond: isPowerOfTwo(int64(uint32(c)))
  4964  	// result: (SLLconst [log2(int64(uint32(c)))] x)
  4965  	for {
  4966  		x := v.Args[0]
  4967  		v_1 := v.Args[1]
  4968  		if v_1.Op != OpMIPSMOVWconst {
  4969  			break
  4970  		}
  4971  		c := v_1.AuxInt
  4972  		if !(isPowerOfTwo(int64(uint32(c)))) {
  4973  			break
  4974  		}
  4975  		v.reset(OpMIPSSLLconst)
  4976  		v.AuxInt = log2(int64(uint32(c)))
  4977  		v.AddArg(x)
  4978  		return true
  4979  	}
  4980  	// match: (MUL (MOVWconst [c]) (MOVWconst [d]))
  4981  	// cond:
  4982  	// result: (MOVWconst [int64(int32(c)*int32(d))])
  4983  	for {
  4984  		v_0 := v.Args[0]
  4985  		if v_0.Op != OpMIPSMOVWconst {
  4986  			break
  4987  		}
  4988  		c := v_0.AuxInt
  4989  		v_1 := v.Args[1]
  4990  		if v_1.Op != OpMIPSMOVWconst {
  4991  			break
  4992  		}
  4993  		d := v_1.AuxInt
  4994  		v.reset(OpMIPSMOVWconst)
  4995  		v.AuxInt = int64(int32(c) * int32(d))
  4996  		return true
  4997  	}
  4998  	// match: (MUL (MOVWconst [d]) (MOVWconst [c]))
  4999  	// cond:
  5000  	// result: (MOVWconst [int64(int32(c)*int32(d))])
  5001  	for {
  5002  		v_0 := v.Args[0]
  5003  		if v_0.Op != OpMIPSMOVWconst {
  5004  			break
  5005  		}
  5006  		d := v_0.AuxInt
  5007  		v_1 := v.Args[1]
  5008  		if v_1.Op != OpMIPSMOVWconst {
  5009  			break
  5010  		}
  5011  		c := v_1.AuxInt
  5012  		v.reset(OpMIPSMOVWconst)
  5013  		v.AuxInt = int64(int32(c) * int32(d))
  5014  		return true
  5015  	}
  5016  	return false
  5017  }
  5018  func rewriteValueMIPS_OpMIPSNEG(v *Value) bool {
  5019  	// match: (NEG (MOVWconst [c]))
  5020  	// cond:
  5021  	// result: (MOVWconst [int64(int32(-c))])
  5022  	for {
  5023  		v_0 := v.Args[0]
  5024  		if v_0.Op != OpMIPSMOVWconst {
  5025  			break
  5026  		}
  5027  		c := v_0.AuxInt
  5028  		v.reset(OpMIPSMOVWconst)
  5029  		v.AuxInt = int64(int32(-c))
  5030  		return true
  5031  	}
  5032  	return false
  5033  }
  5034  func rewriteValueMIPS_OpMIPSNOR(v *Value) bool {
  5035  	// match: (NOR x (MOVWconst [c]))
  5036  	// cond:
  5037  	// result: (NORconst [c] x)
  5038  	for {
  5039  		x := v.Args[0]
  5040  		v_1 := v.Args[1]
  5041  		if v_1.Op != OpMIPSMOVWconst {
  5042  			break
  5043  		}
  5044  		c := v_1.AuxInt
  5045  		v.reset(OpMIPSNORconst)
  5046  		v.AuxInt = c
  5047  		v.AddArg(x)
  5048  		return true
  5049  	}
  5050  	// match: (NOR (MOVWconst [c]) x)
  5051  	// cond:
  5052  	// result: (NORconst [c] x)
  5053  	for {
  5054  		v_0 := v.Args[0]
  5055  		if v_0.Op != OpMIPSMOVWconst {
  5056  			break
  5057  		}
  5058  		c := v_0.AuxInt
  5059  		x := v.Args[1]
  5060  		v.reset(OpMIPSNORconst)
  5061  		v.AuxInt = c
  5062  		v.AddArg(x)
  5063  		return true
  5064  	}
  5065  	return false
  5066  }
  5067  func rewriteValueMIPS_OpMIPSNORconst(v *Value) bool {
  5068  	// match: (NORconst [c] (MOVWconst [d]))
  5069  	// cond:
  5070  	// result: (MOVWconst [^(c|d)])
  5071  	for {
  5072  		c := v.AuxInt
  5073  		v_0 := v.Args[0]
  5074  		if v_0.Op != OpMIPSMOVWconst {
  5075  			break
  5076  		}
  5077  		d := v_0.AuxInt
  5078  		v.reset(OpMIPSMOVWconst)
  5079  		v.AuxInt = ^(c | d)
  5080  		return true
  5081  	}
  5082  	return false
  5083  }
  5084  func rewriteValueMIPS_OpMIPSOR(v *Value) bool {
  5085  	b := v.Block
  5086  	_ = b
  5087  	// match: (OR x (MOVWconst [c]))
  5088  	// cond:
  5089  	// result: (ORconst  [c] x)
  5090  	for {
  5091  		x := v.Args[0]
  5092  		v_1 := v.Args[1]
  5093  		if v_1.Op != OpMIPSMOVWconst {
  5094  			break
  5095  		}
  5096  		c := v_1.AuxInt
  5097  		v.reset(OpMIPSORconst)
  5098  		v.AuxInt = c
  5099  		v.AddArg(x)
  5100  		return true
  5101  	}
  5102  	// match: (OR (MOVWconst [c]) x)
  5103  	// cond:
  5104  	// result: (ORconst  [c] x)
  5105  	for {
  5106  		v_0 := v.Args[0]
  5107  		if v_0.Op != OpMIPSMOVWconst {
  5108  			break
  5109  		}
  5110  		c := v_0.AuxInt
  5111  		x := v.Args[1]
  5112  		v.reset(OpMIPSORconst)
  5113  		v.AuxInt = c
  5114  		v.AddArg(x)
  5115  		return true
  5116  	}
  5117  	// match: (OR x x)
  5118  	// cond:
  5119  	// result: x
  5120  	for {
  5121  		x := v.Args[0]
  5122  		if x != v.Args[1] {
  5123  			break
  5124  		}
  5125  		v.reset(OpCopy)
  5126  		v.Type = x.Type
  5127  		v.AddArg(x)
  5128  		return true
  5129  	}
  5130  	// match: (OR (SGTUzero x) (SGTUzero y))
  5131  	// cond:
  5132  	// result: (SGTUzero (OR <x.Type> x y))
  5133  	for {
  5134  		v_0 := v.Args[0]
  5135  		if v_0.Op != OpMIPSSGTUzero {
  5136  			break
  5137  		}
  5138  		x := v_0.Args[0]
  5139  		v_1 := v.Args[1]
  5140  		if v_1.Op != OpMIPSSGTUzero {
  5141  			break
  5142  		}
  5143  		y := v_1.Args[0]
  5144  		v.reset(OpMIPSSGTUzero)
  5145  		v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  5146  		v0.AddArg(x)
  5147  		v0.AddArg(y)
  5148  		v.AddArg(v0)
  5149  		return true
  5150  	}
  5151  	// match: (OR (SGTUzero y) (SGTUzero x))
  5152  	// cond:
  5153  	// result: (SGTUzero (OR <x.Type> x y))
  5154  	for {
  5155  		v_0 := v.Args[0]
  5156  		if v_0.Op != OpMIPSSGTUzero {
  5157  			break
  5158  		}
  5159  		y := v_0.Args[0]
  5160  		v_1 := v.Args[1]
  5161  		if v_1.Op != OpMIPSSGTUzero {
  5162  			break
  5163  		}
  5164  		x := v_1.Args[0]
  5165  		v.reset(OpMIPSSGTUzero)
  5166  		v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  5167  		v0.AddArg(x)
  5168  		v0.AddArg(y)
  5169  		v.AddArg(v0)
  5170  		return true
  5171  	}
  5172  	return false
  5173  }
  5174  func rewriteValueMIPS_OpMIPSORconst(v *Value) bool {
  5175  	// match: (ORconst [0] x)
  5176  	// cond:
  5177  	// result: x
  5178  	for {
  5179  		if v.AuxInt != 0 {
  5180  			break
  5181  		}
  5182  		x := v.Args[0]
  5183  		v.reset(OpCopy)
  5184  		v.Type = x.Type
  5185  		v.AddArg(x)
  5186  		return true
  5187  	}
  5188  	// match: (ORconst [-1] _)
  5189  	// cond:
  5190  	// result: (MOVWconst [-1])
  5191  	for {
  5192  		if v.AuxInt != -1 {
  5193  			break
  5194  		}
  5195  		v.reset(OpMIPSMOVWconst)
  5196  		v.AuxInt = -1
  5197  		return true
  5198  	}
  5199  	// match: (ORconst [c] (MOVWconst [d]))
  5200  	// cond:
  5201  	// result: (MOVWconst [c|d])
  5202  	for {
  5203  		c := v.AuxInt
  5204  		v_0 := v.Args[0]
  5205  		if v_0.Op != OpMIPSMOVWconst {
  5206  			break
  5207  		}
  5208  		d := v_0.AuxInt
  5209  		v.reset(OpMIPSMOVWconst)
  5210  		v.AuxInt = c | d
  5211  		return true
  5212  	}
  5213  	// match: (ORconst [c] (ORconst [d] x))
  5214  	// cond:
  5215  	// result: (ORconst [c|d] x)
  5216  	for {
  5217  		c := v.AuxInt
  5218  		v_0 := v.Args[0]
  5219  		if v_0.Op != OpMIPSORconst {
  5220  			break
  5221  		}
  5222  		d := v_0.AuxInt
  5223  		x := v_0.Args[0]
  5224  		v.reset(OpMIPSORconst)
  5225  		v.AuxInt = c | d
  5226  		v.AddArg(x)
  5227  		return true
  5228  	}
  5229  	return false
  5230  }
  5231  func rewriteValueMIPS_OpMIPSSGT(v *Value) bool {
  5232  	// match: (SGT (MOVWconst [c]) x)
  5233  	// cond:
  5234  	// result: (SGTconst  [c] x)
  5235  	for {
  5236  		v_0 := v.Args[0]
  5237  		if v_0.Op != OpMIPSMOVWconst {
  5238  			break
  5239  		}
  5240  		c := v_0.AuxInt
  5241  		x := v.Args[1]
  5242  		v.reset(OpMIPSSGTconst)
  5243  		v.AuxInt = c
  5244  		v.AddArg(x)
  5245  		return true
  5246  	}
  5247  	// match: (SGT x (MOVWconst [0]))
  5248  	// cond:
  5249  	// result: (SGTzero x)
  5250  	for {
  5251  		x := v.Args[0]
  5252  		v_1 := v.Args[1]
  5253  		if v_1.Op != OpMIPSMOVWconst {
  5254  			break
  5255  		}
  5256  		if v_1.AuxInt != 0 {
  5257  			break
  5258  		}
  5259  		v.reset(OpMIPSSGTzero)
  5260  		v.AddArg(x)
  5261  		return true
  5262  	}
  5263  	return false
  5264  }
  5265  func rewriteValueMIPS_OpMIPSSGTU(v *Value) bool {
  5266  	// match: (SGTU (MOVWconst [c]) x)
  5267  	// cond:
  5268  	// result: (SGTUconst [c] x)
  5269  	for {
  5270  		v_0 := v.Args[0]
  5271  		if v_0.Op != OpMIPSMOVWconst {
  5272  			break
  5273  		}
  5274  		c := v_0.AuxInt
  5275  		x := v.Args[1]
  5276  		v.reset(OpMIPSSGTUconst)
  5277  		v.AuxInt = c
  5278  		v.AddArg(x)
  5279  		return true
  5280  	}
  5281  	// match: (SGTU x (MOVWconst [0]))
  5282  	// cond:
  5283  	// result: (SGTUzero x)
  5284  	for {
  5285  		x := v.Args[0]
  5286  		v_1 := v.Args[1]
  5287  		if v_1.Op != OpMIPSMOVWconst {
  5288  			break
  5289  		}
  5290  		if v_1.AuxInt != 0 {
  5291  			break
  5292  		}
  5293  		v.reset(OpMIPSSGTUzero)
  5294  		v.AddArg(x)
  5295  		return true
  5296  	}
  5297  	return false
  5298  }
  5299  func rewriteValueMIPS_OpMIPSSGTUconst(v *Value) bool {
  5300  	// match: (SGTUconst [c] (MOVWconst [d]))
  5301  	// cond: uint32(c)>uint32(d)
  5302  	// result: (MOVWconst [1])
  5303  	for {
  5304  		c := v.AuxInt
  5305  		v_0 := v.Args[0]
  5306  		if v_0.Op != OpMIPSMOVWconst {
  5307  			break
  5308  		}
  5309  		d := v_0.AuxInt
  5310  		if !(uint32(c) > uint32(d)) {
  5311  			break
  5312  		}
  5313  		v.reset(OpMIPSMOVWconst)
  5314  		v.AuxInt = 1
  5315  		return true
  5316  	}
  5317  	// match: (SGTUconst [c] (MOVWconst [d]))
  5318  	// cond: uint32(c)<=uint32(d)
  5319  	// result: (MOVWconst [0])
  5320  	for {
  5321  		c := v.AuxInt
  5322  		v_0 := v.Args[0]
  5323  		if v_0.Op != OpMIPSMOVWconst {
  5324  			break
  5325  		}
  5326  		d := v_0.AuxInt
  5327  		if !(uint32(c) <= uint32(d)) {
  5328  			break
  5329  		}
  5330  		v.reset(OpMIPSMOVWconst)
  5331  		v.AuxInt = 0
  5332  		return true
  5333  	}
  5334  	// match: (SGTUconst [c] (MOVBUreg _))
  5335  	// cond: 0xff < uint32(c)
  5336  	// result: (MOVWconst [1])
  5337  	for {
  5338  		c := v.AuxInt
  5339  		v_0 := v.Args[0]
  5340  		if v_0.Op != OpMIPSMOVBUreg {
  5341  			break
  5342  		}
  5343  		if !(0xff < uint32(c)) {
  5344  			break
  5345  		}
  5346  		v.reset(OpMIPSMOVWconst)
  5347  		v.AuxInt = 1
  5348  		return true
  5349  	}
  5350  	// match: (SGTUconst [c] (MOVHUreg _))
  5351  	// cond: 0xffff < uint32(c)
  5352  	// result: (MOVWconst [1])
  5353  	for {
  5354  		c := v.AuxInt
  5355  		v_0 := v.Args[0]
  5356  		if v_0.Op != OpMIPSMOVHUreg {
  5357  			break
  5358  		}
  5359  		if !(0xffff < uint32(c)) {
  5360  			break
  5361  		}
  5362  		v.reset(OpMIPSMOVWconst)
  5363  		v.AuxInt = 1
  5364  		return true
  5365  	}
  5366  	// match: (SGTUconst [c] (ANDconst [m] _))
  5367  	// cond: uint32(m) < uint32(c)
  5368  	// result: (MOVWconst [1])
  5369  	for {
  5370  		c := v.AuxInt
  5371  		v_0 := v.Args[0]
  5372  		if v_0.Op != OpMIPSANDconst {
  5373  			break
  5374  		}
  5375  		m := v_0.AuxInt
  5376  		if !(uint32(m) < uint32(c)) {
  5377  			break
  5378  		}
  5379  		v.reset(OpMIPSMOVWconst)
  5380  		v.AuxInt = 1
  5381  		return true
  5382  	}
  5383  	// match: (SGTUconst [c] (SRLconst _ [d]))
  5384  	// cond: uint32(d) <= 31 && 1<<(32-uint32(d)) <= uint32(c)
  5385  	// result: (MOVWconst [1])
  5386  	for {
  5387  		c := v.AuxInt
  5388  		v_0 := v.Args[0]
  5389  		if v_0.Op != OpMIPSSRLconst {
  5390  			break
  5391  		}
  5392  		d := v_0.AuxInt
  5393  		if !(uint32(d) <= 31 && 1<<(32-uint32(d)) <= uint32(c)) {
  5394  			break
  5395  		}
  5396  		v.reset(OpMIPSMOVWconst)
  5397  		v.AuxInt = 1
  5398  		return true
  5399  	}
  5400  	return false
  5401  }
  5402  func rewriteValueMIPS_OpMIPSSGTUzero(v *Value) bool {
  5403  	// match: (SGTUzero (MOVWconst [d]))
  5404  	// cond: uint32(d) != 0
  5405  	// result: (MOVWconst [1])
  5406  	for {
  5407  		v_0 := v.Args[0]
  5408  		if v_0.Op != OpMIPSMOVWconst {
  5409  			break
  5410  		}
  5411  		d := v_0.AuxInt
  5412  		if !(uint32(d) != 0) {
  5413  			break
  5414  		}
  5415  		v.reset(OpMIPSMOVWconst)
  5416  		v.AuxInt = 1
  5417  		return true
  5418  	}
  5419  	// match: (SGTUzero (MOVWconst [d]))
  5420  	// cond: uint32(d) == 0
  5421  	// result: (MOVWconst [0])
  5422  	for {
  5423  		v_0 := v.Args[0]
  5424  		if v_0.Op != OpMIPSMOVWconst {
  5425  			break
  5426  		}
  5427  		d := v_0.AuxInt
  5428  		if !(uint32(d) == 0) {
  5429  			break
  5430  		}
  5431  		v.reset(OpMIPSMOVWconst)
  5432  		v.AuxInt = 0
  5433  		return true
  5434  	}
  5435  	return false
  5436  }
  5437  func rewriteValueMIPS_OpMIPSSGTconst(v *Value) bool {
  5438  	// match: (SGTconst [c] (MOVWconst [d]))
  5439  	// cond: int32(c) > int32(d)
  5440  	// result: (MOVWconst [1])
  5441  	for {
  5442  		c := v.AuxInt
  5443  		v_0 := v.Args[0]
  5444  		if v_0.Op != OpMIPSMOVWconst {
  5445  			break
  5446  		}
  5447  		d := v_0.AuxInt
  5448  		if !(int32(c) > int32(d)) {
  5449  			break
  5450  		}
  5451  		v.reset(OpMIPSMOVWconst)
  5452  		v.AuxInt = 1
  5453  		return true
  5454  	}
  5455  	// match: (SGTconst [c] (MOVWconst [d]))
  5456  	// cond: int32(c) <= int32(d)
  5457  	// result: (MOVWconst [0])
  5458  	for {
  5459  		c := v.AuxInt
  5460  		v_0 := v.Args[0]
  5461  		if v_0.Op != OpMIPSMOVWconst {
  5462  			break
  5463  		}
  5464  		d := v_0.AuxInt
  5465  		if !(int32(c) <= int32(d)) {
  5466  			break
  5467  		}
  5468  		v.reset(OpMIPSMOVWconst)
  5469  		v.AuxInt = 0
  5470  		return true
  5471  	}
  5472  	// match: (SGTconst [c] (MOVBreg _))
  5473  	// cond: 0x7f < int32(c)
  5474  	// result: (MOVWconst [1])
  5475  	for {
  5476  		c := v.AuxInt
  5477  		v_0 := v.Args[0]
  5478  		if v_0.Op != OpMIPSMOVBreg {
  5479  			break
  5480  		}
  5481  		if !(0x7f < int32(c)) {
  5482  			break
  5483  		}
  5484  		v.reset(OpMIPSMOVWconst)
  5485  		v.AuxInt = 1
  5486  		return true
  5487  	}
  5488  	// match: (SGTconst [c] (MOVBreg _))
  5489  	// cond: int32(c) <= -0x80
  5490  	// result: (MOVWconst [0])
  5491  	for {
  5492  		c := v.AuxInt
  5493  		v_0 := v.Args[0]
  5494  		if v_0.Op != OpMIPSMOVBreg {
  5495  			break
  5496  		}
  5497  		if !(int32(c) <= -0x80) {
  5498  			break
  5499  		}
  5500  		v.reset(OpMIPSMOVWconst)
  5501  		v.AuxInt = 0
  5502  		return true
  5503  	}
  5504  	// match: (SGTconst [c] (MOVBUreg _))
  5505  	// cond: 0xff < int32(c)
  5506  	// result: (MOVWconst [1])
  5507  	for {
  5508  		c := v.AuxInt
  5509  		v_0 := v.Args[0]
  5510  		if v_0.Op != OpMIPSMOVBUreg {
  5511  			break
  5512  		}
  5513  		if !(0xff < int32(c)) {
  5514  			break
  5515  		}
  5516  		v.reset(OpMIPSMOVWconst)
  5517  		v.AuxInt = 1
  5518  		return true
  5519  	}
  5520  	// match: (SGTconst [c] (MOVBUreg _))
  5521  	// cond: int32(c) < 0
  5522  	// result: (MOVWconst [0])
  5523  	for {
  5524  		c := v.AuxInt
  5525  		v_0 := v.Args[0]
  5526  		if v_0.Op != OpMIPSMOVBUreg {
  5527  			break
  5528  		}
  5529  		if !(int32(c) < 0) {
  5530  			break
  5531  		}
  5532  		v.reset(OpMIPSMOVWconst)
  5533  		v.AuxInt = 0
  5534  		return true
  5535  	}
  5536  	// match: (SGTconst [c] (MOVHreg _))
  5537  	// cond: 0x7fff < int32(c)
  5538  	// result: (MOVWconst [1])
  5539  	for {
  5540  		c := v.AuxInt
  5541  		v_0 := v.Args[0]
  5542  		if v_0.Op != OpMIPSMOVHreg {
  5543  			break
  5544  		}
  5545  		if !(0x7fff < int32(c)) {
  5546  			break
  5547  		}
  5548  		v.reset(OpMIPSMOVWconst)
  5549  		v.AuxInt = 1
  5550  		return true
  5551  	}
  5552  	// match: (SGTconst [c] (MOVHreg _))
  5553  	// cond: int32(c) <= -0x8000
  5554  	// result: (MOVWconst [0])
  5555  	for {
  5556  		c := v.AuxInt
  5557  		v_0 := v.Args[0]
  5558  		if v_0.Op != OpMIPSMOVHreg {
  5559  			break
  5560  		}
  5561  		if !(int32(c) <= -0x8000) {
  5562  			break
  5563  		}
  5564  		v.reset(OpMIPSMOVWconst)
  5565  		v.AuxInt = 0
  5566  		return true
  5567  	}
  5568  	// match: (SGTconst [c] (MOVHUreg _))
  5569  	// cond: 0xffff < int32(c)
  5570  	// result: (MOVWconst [1])
  5571  	for {
  5572  		c := v.AuxInt
  5573  		v_0 := v.Args[0]
  5574  		if v_0.Op != OpMIPSMOVHUreg {
  5575  			break
  5576  		}
  5577  		if !(0xffff < int32(c)) {
  5578  			break
  5579  		}
  5580  		v.reset(OpMIPSMOVWconst)
  5581  		v.AuxInt = 1
  5582  		return true
  5583  	}
  5584  	// match: (SGTconst [c] (MOVHUreg _))
  5585  	// cond: int32(c) < 0
  5586  	// result: (MOVWconst [0])
  5587  	for {
  5588  		c := v.AuxInt
  5589  		v_0 := v.Args[0]
  5590  		if v_0.Op != OpMIPSMOVHUreg {
  5591  			break
  5592  		}
  5593  		if !(int32(c) < 0) {
  5594  			break
  5595  		}
  5596  		v.reset(OpMIPSMOVWconst)
  5597  		v.AuxInt = 0
  5598  		return true
  5599  	}
  5600  	// match: (SGTconst [c] (ANDconst [m] _))
  5601  	// cond: 0 <= int32(m) && int32(m) < int32(c)
  5602  	// result: (MOVWconst [1])
  5603  	for {
  5604  		c := v.AuxInt
  5605  		v_0 := v.Args[0]
  5606  		if v_0.Op != OpMIPSANDconst {
  5607  			break
  5608  		}
  5609  		m := v_0.AuxInt
  5610  		if !(0 <= int32(m) && int32(m) < int32(c)) {
  5611  			break
  5612  		}
  5613  		v.reset(OpMIPSMOVWconst)
  5614  		v.AuxInt = 1
  5615  		return true
  5616  	}
  5617  	// match: (SGTconst [c] (SRLconst _ [d]))
  5618  	// cond: 0 <= int32(c) && uint32(d) <= 31 && 1<<(32-uint32(d)) <= int32(c)
  5619  	// result: (MOVWconst [1])
  5620  	for {
  5621  		c := v.AuxInt
  5622  		v_0 := v.Args[0]
  5623  		if v_0.Op != OpMIPSSRLconst {
  5624  			break
  5625  		}
  5626  		d := v_0.AuxInt
  5627  		if !(0 <= int32(c) && uint32(d) <= 31 && 1<<(32-uint32(d)) <= int32(c)) {
  5628  			break
  5629  		}
  5630  		v.reset(OpMIPSMOVWconst)
  5631  		v.AuxInt = 1
  5632  		return true
  5633  	}
  5634  	return false
  5635  }
  5636  func rewriteValueMIPS_OpMIPSSGTzero(v *Value) bool {
  5637  	// match: (SGTzero (MOVWconst [d]))
  5638  	// cond: int32(d) > 0
  5639  	// result: (MOVWconst [1])
  5640  	for {
  5641  		v_0 := v.Args[0]
  5642  		if v_0.Op != OpMIPSMOVWconst {
  5643  			break
  5644  		}
  5645  		d := v_0.AuxInt
  5646  		if !(int32(d) > 0) {
  5647  			break
  5648  		}
  5649  		v.reset(OpMIPSMOVWconst)
  5650  		v.AuxInt = 1
  5651  		return true
  5652  	}
  5653  	// match: (SGTzero (MOVWconst [d]))
  5654  	// cond: int32(d) <= 0
  5655  	// result: (MOVWconst [0])
  5656  	for {
  5657  		v_0 := v.Args[0]
  5658  		if v_0.Op != OpMIPSMOVWconst {
  5659  			break
  5660  		}
  5661  		d := v_0.AuxInt
  5662  		if !(int32(d) <= 0) {
  5663  			break
  5664  		}
  5665  		v.reset(OpMIPSMOVWconst)
  5666  		v.AuxInt = 0
  5667  		return true
  5668  	}
  5669  	return false
  5670  }
  5671  func rewriteValueMIPS_OpMIPSSLL(v *Value) bool {
  5672  	// match: (SLL _ (MOVWconst [c]))
  5673  	// cond: uint32(c)>=32
  5674  	// result: (MOVWconst [0])
  5675  	for {
  5676  		v_1 := v.Args[1]
  5677  		if v_1.Op != OpMIPSMOVWconst {
  5678  			break
  5679  		}
  5680  		c := v_1.AuxInt
  5681  		if !(uint32(c) >= 32) {
  5682  			break
  5683  		}
  5684  		v.reset(OpMIPSMOVWconst)
  5685  		v.AuxInt = 0
  5686  		return true
  5687  	}
  5688  	// match: (SLL x (MOVWconst [c]))
  5689  	// cond:
  5690  	// result: (SLLconst x [c])
  5691  	for {
  5692  		x := v.Args[0]
  5693  		v_1 := v.Args[1]
  5694  		if v_1.Op != OpMIPSMOVWconst {
  5695  			break
  5696  		}
  5697  		c := v_1.AuxInt
  5698  		v.reset(OpMIPSSLLconst)
  5699  		v.AuxInt = c
  5700  		v.AddArg(x)
  5701  		return true
  5702  	}
  5703  	return false
  5704  }
  5705  func rewriteValueMIPS_OpMIPSSLLconst(v *Value) bool {
  5706  	// match: (SLLconst [c] (MOVWconst [d]))
  5707  	// cond:
  5708  	// result: (MOVWconst [int64(int32(uint32(d)<<uint32(c)))])
  5709  	for {
  5710  		c := v.AuxInt
  5711  		v_0 := v.Args[0]
  5712  		if v_0.Op != OpMIPSMOVWconst {
  5713  			break
  5714  		}
  5715  		d := v_0.AuxInt
  5716  		v.reset(OpMIPSMOVWconst)
  5717  		v.AuxInt = int64(int32(uint32(d) << uint32(c)))
  5718  		return true
  5719  	}
  5720  	return false
  5721  }
  5722  func rewriteValueMIPS_OpMIPSSRA(v *Value) bool {
  5723  	// match: (SRA x (MOVWconst [c]))
  5724  	// cond: uint32(c)>=32
  5725  	// result: (SRAconst x [31])
  5726  	for {
  5727  		x := v.Args[0]
  5728  		v_1 := v.Args[1]
  5729  		if v_1.Op != OpMIPSMOVWconst {
  5730  			break
  5731  		}
  5732  		c := v_1.AuxInt
  5733  		if !(uint32(c) >= 32) {
  5734  			break
  5735  		}
  5736  		v.reset(OpMIPSSRAconst)
  5737  		v.AuxInt = 31
  5738  		v.AddArg(x)
  5739  		return true
  5740  	}
  5741  	// match: (SRA x (MOVWconst [c]))
  5742  	// cond:
  5743  	// result: (SRAconst x [c])
  5744  	for {
  5745  		x := v.Args[0]
  5746  		v_1 := v.Args[1]
  5747  		if v_1.Op != OpMIPSMOVWconst {
  5748  			break
  5749  		}
  5750  		c := v_1.AuxInt
  5751  		v.reset(OpMIPSSRAconst)
  5752  		v.AuxInt = c
  5753  		v.AddArg(x)
  5754  		return true
  5755  	}
  5756  	return false
  5757  }
  5758  func rewriteValueMIPS_OpMIPSSRAconst(v *Value) bool {
  5759  	// match: (SRAconst [c] (MOVWconst [d]))
  5760  	// cond:
  5761  	// result: (MOVWconst [int64(int32(d)>>uint32(c))])
  5762  	for {
  5763  		c := v.AuxInt
  5764  		v_0 := v.Args[0]
  5765  		if v_0.Op != OpMIPSMOVWconst {
  5766  			break
  5767  		}
  5768  		d := v_0.AuxInt
  5769  		v.reset(OpMIPSMOVWconst)
  5770  		v.AuxInt = int64(int32(d) >> uint32(c))
  5771  		return true
  5772  	}
  5773  	return false
  5774  }
  5775  func rewriteValueMIPS_OpMIPSSRL(v *Value) bool {
  5776  	// match: (SRL _ (MOVWconst [c]))
  5777  	// cond: uint32(c)>=32
  5778  	// result: (MOVWconst [0])
  5779  	for {
  5780  		v_1 := v.Args[1]
  5781  		if v_1.Op != OpMIPSMOVWconst {
  5782  			break
  5783  		}
  5784  		c := v_1.AuxInt
  5785  		if !(uint32(c) >= 32) {
  5786  			break
  5787  		}
  5788  		v.reset(OpMIPSMOVWconst)
  5789  		v.AuxInt = 0
  5790  		return true
  5791  	}
  5792  	// match: (SRL x (MOVWconst [c]))
  5793  	// cond:
  5794  	// result: (SRLconst x [c])
  5795  	for {
  5796  		x := v.Args[0]
  5797  		v_1 := v.Args[1]
  5798  		if v_1.Op != OpMIPSMOVWconst {
  5799  			break
  5800  		}
  5801  		c := v_1.AuxInt
  5802  		v.reset(OpMIPSSRLconst)
  5803  		v.AuxInt = c
  5804  		v.AddArg(x)
  5805  		return true
  5806  	}
  5807  	return false
  5808  }
  5809  func rewriteValueMIPS_OpMIPSSRLconst(v *Value) bool {
  5810  	// match: (SRLconst [c] (MOVWconst [d]))
  5811  	// cond:
  5812  	// result: (MOVWconst [int64(uint32(d)>>uint32(c))])
  5813  	for {
  5814  		c := v.AuxInt
  5815  		v_0 := v.Args[0]
  5816  		if v_0.Op != OpMIPSMOVWconst {
  5817  			break
  5818  		}
  5819  		d := v_0.AuxInt
  5820  		v.reset(OpMIPSMOVWconst)
  5821  		v.AuxInt = int64(uint32(d) >> uint32(c))
  5822  		return true
  5823  	}
  5824  	return false
  5825  }
  5826  func rewriteValueMIPS_OpMIPSSUB(v *Value) bool {
  5827  	// match: (SUB x (MOVWconst [c]))
  5828  	// cond:
  5829  	// result: (SUBconst [c] x)
  5830  	for {
  5831  		x := v.Args[0]
  5832  		v_1 := v.Args[1]
  5833  		if v_1.Op != OpMIPSMOVWconst {
  5834  			break
  5835  		}
  5836  		c := v_1.AuxInt
  5837  		v.reset(OpMIPSSUBconst)
  5838  		v.AuxInt = c
  5839  		v.AddArg(x)
  5840  		return true
  5841  	}
  5842  	// match: (SUB x x)
  5843  	// cond:
  5844  	// result: (MOVWconst [0])
  5845  	for {
  5846  		x := v.Args[0]
  5847  		if x != v.Args[1] {
  5848  			break
  5849  		}
  5850  		v.reset(OpMIPSMOVWconst)
  5851  		v.AuxInt = 0
  5852  		return true
  5853  	}
  5854  	// match: (SUB (MOVWconst [0]) x)
  5855  	// cond:
  5856  	// result: (NEG x)
  5857  	for {
  5858  		v_0 := v.Args[0]
  5859  		if v_0.Op != OpMIPSMOVWconst {
  5860  			break
  5861  		}
  5862  		if v_0.AuxInt != 0 {
  5863  			break
  5864  		}
  5865  		x := v.Args[1]
  5866  		v.reset(OpMIPSNEG)
  5867  		v.AddArg(x)
  5868  		return true
  5869  	}
  5870  	return false
  5871  }
  5872  func rewriteValueMIPS_OpMIPSSUBconst(v *Value) bool {
  5873  	// match: (SUBconst [0] x)
  5874  	// cond:
  5875  	// result: x
  5876  	for {
  5877  		if v.AuxInt != 0 {
  5878  			break
  5879  		}
  5880  		x := v.Args[0]
  5881  		v.reset(OpCopy)
  5882  		v.Type = x.Type
  5883  		v.AddArg(x)
  5884  		return true
  5885  	}
  5886  	// match: (SUBconst [c] (MOVWconst [d]))
  5887  	// cond:
  5888  	// result: (MOVWconst [int64(int32(d-c))])
  5889  	for {
  5890  		c := v.AuxInt
  5891  		v_0 := v.Args[0]
  5892  		if v_0.Op != OpMIPSMOVWconst {
  5893  			break
  5894  		}
  5895  		d := v_0.AuxInt
  5896  		v.reset(OpMIPSMOVWconst)
  5897  		v.AuxInt = int64(int32(d - c))
  5898  		return true
  5899  	}
  5900  	// match: (SUBconst [c] (SUBconst [d] x))
  5901  	// cond:
  5902  	// result: (ADDconst [int64(int32(-c-d))] x)
  5903  	for {
  5904  		c := v.AuxInt
  5905  		v_0 := v.Args[0]
  5906  		if v_0.Op != OpMIPSSUBconst {
  5907  			break
  5908  		}
  5909  		d := v_0.AuxInt
  5910  		x := v_0.Args[0]
  5911  		v.reset(OpMIPSADDconst)
  5912  		v.AuxInt = int64(int32(-c - d))
  5913  		v.AddArg(x)
  5914  		return true
  5915  	}
  5916  	// match: (SUBconst [c] (ADDconst [d] x))
  5917  	// cond:
  5918  	// result: (ADDconst [int64(int32(-c+d))] x)
  5919  	for {
  5920  		c := v.AuxInt
  5921  		v_0 := v.Args[0]
  5922  		if v_0.Op != OpMIPSADDconst {
  5923  			break
  5924  		}
  5925  		d := v_0.AuxInt
  5926  		x := v_0.Args[0]
  5927  		v.reset(OpMIPSADDconst)
  5928  		v.AuxInt = int64(int32(-c + d))
  5929  		v.AddArg(x)
  5930  		return true
  5931  	}
  5932  	return false
  5933  }
  5934  func rewriteValueMIPS_OpMIPSXOR(v *Value) bool {
  5935  	// match: (XOR x (MOVWconst [c]))
  5936  	// cond:
  5937  	// result: (XORconst [c] x)
  5938  	for {
  5939  		x := v.Args[0]
  5940  		v_1 := v.Args[1]
  5941  		if v_1.Op != OpMIPSMOVWconst {
  5942  			break
  5943  		}
  5944  		c := v_1.AuxInt
  5945  		v.reset(OpMIPSXORconst)
  5946  		v.AuxInt = c
  5947  		v.AddArg(x)
  5948  		return true
  5949  	}
  5950  	// match: (XOR (MOVWconst [c]) x)
  5951  	// cond:
  5952  	// result: (XORconst [c] x)
  5953  	for {
  5954  		v_0 := v.Args[0]
  5955  		if v_0.Op != OpMIPSMOVWconst {
  5956  			break
  5957  		}
  5958  		c := v_0.AuxInt
  5959  		x := v.Args[1]
  5960  		v.reset(OpMIPSXORconst)
  5961  		v.AuxInt = c
  5962  		v.AddArg(x)
  5963  		return true
  5964  	}
  5965  	// match: (XOR x x)
  5966  	// cond:
  5967  	// result: (MOVWconst [0])
  5968  	for {
  5969  		x := v.Args[0]
  5970  		if x != v.Args[1] {
  5971  			break
  5972  		}
  5973  		v.reset(OpMIPSMOVWconst)
  5974  		v.AuxInt = 0
  5975  		return true
  5976  	}
  5977  	return false
  5978  }
  5979  func rewriteValueMIPS_OpMIPSXORconst(v *Value) bool {
  5980  	// match: (XORconst [0] x)
  5981  	// cond:
  5982  	// result: x
  5983  	for {
  5984  		if v.AuxInt != 0 {
  5985  			break
  5986  		}
  5987  		x := v.Args[0]
  5988  		v.reset(OpCopy)
  5989  		v.Type = x.Type
  5990  		v.AddArg(x)
  5991  		return true
  5992  	}
  5993  	// match: (XORconst [-1] x)
  5994  	// cond:
  5995  	// result: (NORconst [0] x)
  5996  	for {
  5997  		if v.AuxInt != -1 {
  5998  			break
  5999  		}
  6000  		x := v.Args[0]
  6001  		v.reset(OpMIPSNORconst)
  6002  		v.AuxInt = 0
  6003  		v.AddArg(x)
  6004  		return true
  6005  	}
  6006  	// match: (XORconst [c] (MOVWconst [d]))
  6007  	// cond:
  6008  	// result: (MOVWconst [c^d])
  6009  	for {
  6010  		c := v.AuxInt
  6011  		v_0 := v.Args[0]
  6012  		if v_0.Op != OpMIPSMOVWconst {
  6013  			break
  6014  		}
  6015  		d := v_0.AuxInt
  6016  		v.reset(OpMIPSMOVWconst)
  6017  		v.AuxInt = c ^ d
  6018  		return true
  6019  	}
  6020  	// match: (XORconst [c] (XORconst [d] x))
  6021  	// cond:
  6022  	// result: (XORconst [c^d] x)
  6023  	for {
  6024  		c := v.AuxInt
  6025  		v_0 := v.Args[0]
  6026  		if v_0.Op != OpMIPSXORconst {
  6027  			break
  6028  		}
  6029  		d := v_0.AuxInt
  6030  		x := v_0.Args[0]
  6031  		v.reset(OpMIPSXORconst)
  6032  		v.AuxInt = c ^ d
  6033  		v.AddArg(x)
  6034  		return true
  6035  	}
  6036  	return false
  6037  }
  6038  func rewriteValueMIPS_OpMod16(v *Value) bool {
  6039  	b := v.Block
  6040  	_ = b
  6041  	types := &b.Func.Config.Types
  6042  	_ = types
  6043  	// match: (Mod16 x y)
  6044  	// cond:
  6045  	// result: (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  6046  	for {
  6047  		x := v.Args[0]
  6048  		y := v.Args[1]
  6049  		v.reset(OpSelect0)
  6050  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, MakeTuple(types.Int32, types.Int32))
  6051  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  6052  		v1.AddArg(x)
  6053  		v0.AddArg(v1)
  6054  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  6055  		v2.AddArg(y)
  6056  		v0.AddArg(v2)
  6057  		v.AddArg(v0)
  6058  		return true
  6059  	}
  6060  }
  6061  func rewriteValueMIPS_OpMod16u(v *Value) bool {
  6062  	b := v.Block
  6063  	_ = b
  6064  	types := &b.Func.Config.Types
  6065  	_ = types
  6066  	// match: (Mod16u x y)
  6067  	// cond:
  6068  	// result: (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  6069  	for {
  6070  		x := v.Args[0]
  6071  		y := v.Args[1]
  6072  		v.reset(OpSelect0)
  6073  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, MakeTuple(types.UInt32, types.UInt32))
  6074  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  6075  		v1.AddArg(x)
  6076  		v0.AddArg(v1)
  6077  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  6078  		v2.AddArg(y)
  6079  		v0.AddArg(v2)
  6080  		v.AddArg(v0)
  6081  		return true
  6082  	}
  6083  }
  6084  func rewriteValueMIPS_OpMod32(v *Value) bool {
  6085  	b := v.Block
  6086  	_ = b
  6087  	types := &b.Func.Config.Types
  6088  	_ = types
  6089  	// match: (Mod32 x y)
  6090  	// cond:
  6091  	// result: (Select0 (DIV x y))
  6092  	for {
  6093  		x := v.Args[0]
  6094  		y := v.Args[1]
  6095  		v.reset(OpSelect0)
  6096  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, MakeTuple(types.Int32, types.Int32))
  6097  		v0.AddArg(x)
  6098  		v0.AddArg(y)
  6099  		v.AddArg(v0)
  6100  		return true
  6101  	}
  6102  }
  6103  func rewriteValueMIPS_OpMod32u(v *Value) bool {
  6104  	b := v.Block
  6105  	_ = b
  6106  	types := &b.Func.Config.Types
  6107  	_ = types
  6108  	// match: (Mod32u x y)
  6109  	// cond:
  6110  	// result: (Select0 (DIVU x y))
  6111  	for {
  6112  		x := v.Args[0]
  6113  		y := v.Args[1]
  6114  		v.reset(OpSelect0)
  6115  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, MakeTuple(types.UInt32, types.UInt32))
  6116  		v0.AddArg(x)
  6117  		v0.AddArg(y)
  6118  		v.AddArg(v0)
  6119  		return true
  6120  	}
  6121  }
  6122  func rewriteValueMIPS_OpMod8(v *Value) bool {
  6123  	b := v.Block
  6124  	_ = b
  6125  	types := &b.Func.Config.Types
  6126  	_ = types
  6127  	// match: (Mod8 x y)
  6128  	// cond:
  6129  	// result: (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  6130  	for {
  6131  		x := v.Args[0]
  6132  		y := v.Args[1]
  6133  		v.reset(OpSelect0)
  6134  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, MakeTuple(types.Int32, types.Int32))
  6135  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  6136  		v1.AddArg(x)
  6137  		v0.AddArg(v1)
  6138  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, types.Int32)
  6139  		v2.AddArg(y)
  6140  		v0.AddArg(v2)
  6141  		v.AddArg(v0)
  6142  		return true
  6143  	}
  6144  }
  6145  func rewriteValueMIPS_OpMod8u(v *Value) bool {
  6146  	b := v.Block
  6147  	_ = b
  6148  	types := &b.Func.Config.Types
  6149  	_ = types
  6150  	// match: (Mod8u x y)
  6151  	// cond:
  6152  	// result: (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  6153  	for {
  6154  		x := v.Args[0]
  6155  		y := v.Args[1]
  6156  		v.reset(OpSelect0)
  6157  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, MakeTuple(types.UInt32, types.UInt32))
  6158  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  6159  		v1.AddArg(x)
  6160  		v0.AddArg(v1)
  6161  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  6162  		v2.AddArg(y)
  6163  		v0.AddArg(v2)
  6164  		v.AddArg(v0)
  6165  		return true
  6166  	}
  6167  }
  6168  func rewriteValueMIPS_OpMove(v *Value) bool {
  6169  	b := v.Block
  6170  	_ = b
  6171  	config := b.Func.Config
  6172  	_ = config
  6173  	types := &b.Func.Config.Types
  6174  	_ = types
  6175  	// match: (Move [0] _ _ mem)
  6176  	// cond:
  6177  	// result: mem
  6178  	for {
  6179  		if v.AuxInt != 0 {
  6180  			break
  6181  		}
  6182  		mem := v.Args[2]
  6183  		v.reset(OpCopy)
  6184  		v.Type = mem.Type
  6185  		v.AddArg(mem)
  6186  		return true
  6187  	}
  6188  	// match: (Move [1] dst src mem)
  6189  	// cond:
  6190  	// result: (MOVBstore dst (MOVBUload src mem) mem)
  6191  	for {
  6192  		if v.AuxInt != 1 {
  6193  			break
  6194  		}
  6195  		dst := v.Args[0]
  6196  		src := v.Args[1]
  6197  		mem := v.Args[2]
  6198  		v.reset(OpMIPSMOVBstore)
  6199  		v.AddArg(dst)
  6200  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6201  		v0.AddArg(src)
  6202  		v0.AddArg(mem)
  6203  		v.AddArg(v0)
  6204  		v.AddArg(mem)
  6205  		return true
  6206  	}
  6207  	// match: (Move [2] {t} dst src mem)
  6208  	// cond: t.(Type).Alignment()%2 == 0
  6209  	// result: (MOVHstore dst (MOVHUload src mem) mem)
  6210  	for {
  6211  		if v.AuxInt != 2 {
  6212  			break
  6213  		}
  6214  		t := v.Aux
  6215  		dst := v.Args[0]
  6216  		src := v.Args[1]
  6217  		mem := v.Args[2]
  6218  		if !(t.(Type).Alignment()%2 == 0) {
  6219  			break
  6220  		}
  6221  		v.reset(OpMIPSMOVHstore)
  6222  		v.AddArg(dst)
  6223  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, types.UInt16)
  6224  		v0.AddArg(src)
  6225  		v0.AddArg(mem)
  6226  		v.AddArg(v0)
  6227  		v.AddArg(mem)
  6228  		return true
  6229  	}
  6230  	// match: (Move [2] dst src mem)
  6231  	// cond:
  6232  	// result: (MOVBstore [1] dst (MOVBUload [1] src mem) 		(MOVBstore dst (MOVBUload src mem) mem))
  6233  	for {
  6234  		if v.AuxInt != 2 {
  6235  			break
  6236  		}
  6237  		dst := v.Args[0]
  6238  		src := v.Args[1]
  6239  		mem := v.Args[2]
  6240  		v.reset(OpMIPSMOVBstore)
  6241  		v.AuxInt = 1
  6242  		v.AddArg(dst)
  6243  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6244  		v0.AuxInt = 1
  6245  		v0.AddArg(src)
  6246  		v0.AddArg(mem)
  6247  		v.AddArg(v0)
  6248  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  6249  		v1.AddArg(dst)
  6250  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6251  		v2.AddArg(src)
  6252  		v2.AddArg(mem)
  6253  		v1.AddArg(v2)
  6254  		v1.AddArg(mem)
  6255  		v.AddArg(v1)
  6256  		return true
  6257  	}
  6258  	// match: (Move [4] {t} dst src mem)
  6259  	// cond: t.(Type).Alignment()%4 == 0
  6260  	// result: (MOVWstore dst (MOVWload src mem) mem)
  6261  	for {
  6262  		if v.AuxInt != 4 {
  6263  			break
  6264  		}
  6265  		t := v.Aux
  6266  		dst := v.Args[0]
  6267  		src := v.Args[1]
  6268  		mem := v.Args[2]
  6269  		if !(t.(Type).Alignment()%4 == 0) {
  6270  			break
  6271  		}
  6272  		v.reset(OpMIPSMOVWstore)
  6273  		v.AddArg(dst)
  6274  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6275  		v0.AddArg(src)
  6276  		v0.AddArg(mem)
  6277  		v.AddArg(v0)
  6278  		v.AddArg(mem)
  6279  		return true
  6280  	}
  6281  	// match: (Move [4] {t} dst src mem)
  6282  	// cond: t.(Type).Alignment()%2 == 0
  6283  	// result: (MOVHstore [2] dst (MOVHUload [2] src mem) 		(MOVHstore dst (MOVHUload src mem) mem))
  6284  	for {
  6285  		if v.AuxInt != 4 {
  6286  			break
  6287  		}
  6288  		t := v.Aux
  6289  		dst := v.Args[0]
  6290  		src := v.Args[1]
  6291  		mem := v.Args[2]
  6292  		if !(t.(Type).Alignment()%2 == 0) {
  6293  			break
  6294  		}
  6295  		v.reset(OpMIPSMOVHstore)
  6296  		v.AuxInt = 2
  6297  		v.AddArg(dst)
  6298  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, types.UInt16)
  6299  		v0.AuxInt = 2
  6300  		v0.AddArg(src)
  6301  		v0.AddArg(mem)
  6302  		v.AddArg(v0)
  6303  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, TypeMem)
  6304  		v1.AddArg(dst)
  6305  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHUload, types.UInt16)
  6306  		v2.AddArg(src)
  6307  		v2.AddArg(mem)
  6308  		v1.AddArg(v2)
  6309  		v1.AddArg(mem)
  6310  		v.AddArg(v1)
  6311  		return true
  6312  	}
  6313  	// match: (Move [4] dst src mem)
  6314  	// cond:
  6315  	// result: (MOVBstore [3] dst (MOVBUload [3] src mem) 		(MOVBstore [2] dst (MOVBUload [2] src mem) 			(MOVBstore [1] dst (MOVBUload [1] src mem) 				(MOVBstore dst (MOVBUload src mem) mem))))
  6316  	for {
  6317  		if v.AuxInt != 4 {
  6318  			break
  6319  		}
  6320  		dst := v.Args[0]
  6321  		src := v.Args[1]
  6322  		mem := v.Args[2]
  6323  		v.reset(OpMIPSMOVBstore)
  6324  		v.AuxInt = 3
  6325  		v.AddArg(dst)
  6326  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6327  		v0.AuxInt = 3
  6328  		v0.AddArg(src)
  6329  		v0.AddArg(mem)
  6330  		v.AddArg(v0)
  6331  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  6332  		v1.AuxInt = 2
  6333  		v1.AddArg(dst)
  6334  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6335  		v2.AuxInt = 2
  6336  		v2.AddArg(src)
  6337  		v2.AddArg(mem)
  6338  		v1.AddArg(v2)
  6339  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  6340  		v3.AuxInt = 1
  6341  		v3.AddArg(dst)
  6342  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6343  		v4.AuxInt = 1
  6344  		v4.AddArg(src)
  6345  		v4.AddArg(mem)
  6346  		v3.AddArg(v4)
  6347  		v5 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  6348  		v5.AddArg(dst)
  6349  		v6 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6350  		v6.AddArg(src)
  6351  		v6.AddArg(mem)
  6352  		v5.AddArg(v6)
  6353  		v5.AddArg(mem)
  6354  		v3.AddArg(v5)
  6355  		v1.AddArg(v3)
  6356  		v.AddArg(v1)
  6357  		return true
  6358  	}
  6359  	// match: (Move [3] dst src mem)
  6360  	// cond:
  6361  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) 		(MOVBstore [1] dst (MOVBUload [1] src mem) 			(MOVBstore dst (MOVBUload src mem) mem)))
  6362  	for {
  6363  		if v.AuxInt != 3 {
  6364  			break
  6365  		}
  6366  		dst := v.Args[0]
  6367  		src := v.Args[1]
  6368  		mem := v.Args[2]
  6369  		v.reset(OpMIPSMOVBstore)
  6370  		v.AuxInt = 2
  6371  		v.AddArg(dst)
  6372  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6373  		v0.AuxInt = 2
  6374  		v0.AddArg(src)
  6375  		v0.AddArg(mem)
  6376  		v.AddArg(v0)
  6377  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  6378  		v1.AuxInt = 1
  6379  		v1.AddArg(dst)
  6380  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6381  		v2.AuxInt = 1
  6382  		v2.AddArg(src)
  6383  		v2.AddArg(mem)
  6384  		v1.AddArg(v2)
  6385  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  6386  		v3.AddArg(dst)
  6387  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, types.UInt8)
  6388  		v4.AddArg(src)
  6389  		v4.AddArg(mem)
  6390  		v3.AddArg(v4)
  6391  		v3.AddArg(mem)
  6392  		v1.AddArg(v3)
  6393  		v.AddArg(v1)
  6394  		return true
  6395  	}
  6396  	// match: (Move [8] {t} dst src mem)
  6397  	// cond: t.(Type).Alignment()%4 == 0
  6398  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) 		(MOVWstore dst (MOVWload src mem) mem))
  6399  	for {
  6400  		if v.AuxInt != 8 {
  6401  			break
  6402  		}
  6403  		t := v.Aux
  6404  		dst := v.Args[0]
  6405  		src := v.Args[1]
  6406  		mem := v.Args[2]
  6407  		if !(t.(Type).Alignment()%4 == 0) {
  6408  			break
  6409  		}
  6410  		v.reset(OpMIPSMOVWstore)
  6411  		v.AuxInt = 4
  6412  		v.AddArg(dst)
  6413  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6414  		v0.AuxInt = 4
  6415  		v0.AddArg(src)
  6416  		v0.AddArg(mem)
  6417  		v.AddArg(v0)
  6418  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  6419  		v1.AddArg(dst)
  6420  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6421  		v2.AddArg(src)
  6422  		v2.AddArg(mem)
  6423  		v1.AddArg(v2)
  6424  		v1.AddArg(mem)
  6425  		v.AddArg(v1)
  6426  		return true
  6427  	}
  6428  	// match: (Move [8] {t} dst src mem)
  6429  	// cond: t.(Type).Alignment()%2 == 0
  6430  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) 		(MOVHstore [4] dst (MOVHload [4] src mem) 			(MOVHstore [2] dst (MOVHload [2] src mem) 				(MOVHstore dst (MOVHload src mem) mem))))
  6431  	for {
  6432  		if v.AuxInt != 8 {
  6433  			break
  6434  		}
  6435  		t := v.Aux
  6436  		dst := v.Args[0]
  6437  		src := v.Args[1]
  6438  		mem := v.Args[2]
  6439  		if !(t.(Type).Alignment()%2 == 0) {
  6440  			break
  6441  		}
  6442  		v.reset(OpMIPSMOVHstore)
  6443  		v.AuxInt = 6
  6444  		v.AddArg(dst)
  6445  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, types.Int16)
  6446  		v0.AuxInt = 6
  6447  		v0.AddArg(src)
  6448  		v0.AddArg(mem)
  6449  		v.AddArg(v0)
  6450  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, TypeMem)
  6451  		v1.AuxInt = 4
  6452  		v1.AddArg(dst)
  6453  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, types.Int16)
  6454  		v2.AuxInt = 4
  6455  		v2.AddArg(src)
  6456  		v2.AddArg(mem)
  6457  		v1.AddArg(v2)
  6458  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, TypeMem)
  6459  		v3.AuxInt = 2
  6460  		v3.AddArg(dst)
  6461  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, types.Int16)
  6462  		v4.AuxInt = 2
  6463  		v4.AddArg(src)
  6464  		v4.AddArg(mem)
  6465  		v3.AddArg(v4)
  6466  		v5 := b.NewValue0(v.Pos, OpMIPSMOVHstore, TypeMem)
  6467  		v5.AddArg(dst)
  6468  		v6 := b.NewValue0(v.Pos, OpMIPSMOVHload, types.Int16)
  6469  		v6.AddArg(src)
  6470  		v6.AddArg(mem)
  6471  		v5.AddArg(v6)
  6472  		v5.AddArg(mem)
  6473  		v3.AddArg(v5)
  6474  		v1.AddArg(v3)
  6475  		v.AddArg(v1)
  6476  		return true
  6477  	}
  6478  	// match: (Move [6] {t} dst src mem)
  6479  	// cond: t.(Type).Alignment()%2 == 0
  6480  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) 		(MOVHstore [2] dst (MOVHload [2] src mem) 			(MOVHstore dst (MOVHload src mem) mem)))
  6481  	for {
  6482  		if v.AuxInt != 6 {
  6483  			break
  6484  		}
  6485  		t := v.Aux
  6486  		dst := v.Args[0]
  6487  		src := v.Args[1]
  6488  		mem := v.Args[2]
  6489  		if !(t.(Type).Alignment()%2 == 0) {
  6490  			break
  6491  		}
  6492  		v.reset(OpMIPSMOVHstore)
  6493  		v.AuxInt = 4
  6494  		v.AddArg(dst)
  6495  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, types.Int16)
  6496  		v0.AuxInt = 4
  6497  		v0.AddArg(src)
  6498  		v0.AddArg(mem)
  6499  		v.AddArg(v0)
  6500  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, TypeMem)
  6501  		v1.AuxInt = 2
  6502  		v1.AddArg(dst)
  6503  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, types.Int16)
  6504  		v2.AuxInt = 2
  6505  		v2.AddArg(src)
  6506  		v2.AddArg(mem)
  6507  		v1.AddArg(v2)
  6508  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, TypeMem)
  6509  		v3.AddArg(dst)
  6510  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, types.Int16)
  6511  		v4.AddArg(src)
  6512  		v4.AddArg(mem)
  6513  		v3.AddArg(v4)
  6514  		v3.AddArg(mem)
  6515  		v1.AddArg(v3)
  6516  		v.AddArg(v1)
  6517  		return true
  6518  	}
  6519  	// match: (Move [12] {t} dst src mem)
  6520  	// cond: t.(Type).Alignment()%4 == 0
  6521  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) 		(MOVWstore [4] dst (MOVWload [4] src mem) 			(MOVWstore dst (MOVWload src mem) mem)))
  6522  	for {
  6523  		if v.AuxInt != 12 {
  6524  			break
  6525  		}
  6526  		t := v.Aux
  6527  		dst := v.Args[0]
  6528  		src := v.Args[1]
  6529  		mem := v.Args[2]
  6530  		if !(t.(Type).Alignment()%4 == 0) {
  6531  			break
  6532  		}
  6533  		v.reset(OpMIPSMOVWstore)
  6534  		v.AuxInt = 8
  6535  		v.AddArg(dst)
  6536  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6537  		v0.AuxInt = 8
  6538  		v0.AddArg(src)
  6539  		v0.AddArg(mem)
  6540  		v.AddArg(v0)
  6541  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  6542  		v1.AuxInt = 4
  6543  		v1.AddArg(dst)
  6544  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6545  		v2.AuxInt = 4
  6546  		v2.AddArg(src)
  6547  		v2.AddArg(mem)
  6548  		v1.AddArg(v2)
  6549  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  6550  		v3.AddArg(dst)
  6551  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6552  		v4.AddArg(src)
  6553  		v4.AddArg(mem)
  6554  		v3.AddArg(v4)
  6555  		v3.AddArg(mem)
  6556  		v1.AddArg(v3)
  6557  		v.AddArg(v1)
  6558  		return true
  6559  	}
  6560  	// match: (Move [16] {t} dst src mem)
  6561  	// cond: t.(Type).Alignment()%4 == 0
  6562  	// result: (MOVWstore [12] dst (MOVWload [12] src mem) 		(MOVWstore [8] dst (MOVWload [8] src mem) 			(MOVWstore [4] dst (MOVWload [4] src mem) 				(MOVWstore dst (MOVWload src mem) mem))))
  6563  	for {
  6564  		if v.AuxInt != 16 {
  6565  			break
  6566  		}
  6567  		t := v.Aux
  6568  		dst := v.Args[0]
  6569  		src := v.Args[1]
  6570  		mem := v.Args[2]
  6571  		if !(t.(Type).Alignment()%4 == 0) {
  6572  			break
  6573  		}
  6574  		v.reset(OpMIPSMOVWstore)
  6575  		v.AuxInt = 12
  6576  		v.AddArg(dst)
  6577  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6578  		v0.AuxInt = 12
  6579  		v0.AddArg(src)
  6580  		v0.AddArg(mem)
  6581  		v.AddArg(v0)
  6582  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  6583  		v1.AuxInt = 8
  6584  		v1.AddArg(dst)
  6585  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6586  		v2.AuxInt = 8
  6587  		v2.AddArg(src)
  6588  		v2.AddArg(mem)
  6589  		v1.AddArg(v2)
  6590  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  6591  		v3.AuxInt = 4
  6592  		v3.AddArg(dst)
  6593  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6594  		v4.AuxInt = 4
  6595  		v4.AddArg(src)
  6596  		v4.AddArg(mem)
  6597  		v3.AddArg(v4)
  6598  		v5 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  6599  		v5.AddArg(dst)
  6600  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWload, types.UInt32)
  6601  		v6.AddArg(src)
  6602  		v6.AddArg(mem)
  6603  		v5.AddArg(v6)
  6604  		v5.AddArg(mem)
  6605  		v3.AddArg(v5)
  6606  		v1.AddArg(v3)
  6607  		v.AddArg(v1)
  6608  		return true
  6609  	}
  6610  	// match: (Move [s] {t} dst src mem)
  6611  	// cond: (s > 16 || t.(Type).Alignment()%4 != 0)
  6612  	// result: (LoweredMove [t.(Type).Alignment()] 		dst 		src 		(ADDconst <src.Type> src [s-moveSize(t.(Type).Alignment(), config)]) 		mem)
  6613  	for {
  6614  		s := v.AuxInt
  6615  		t := v.Aux
  6616  		dst := v.Args[0]
  6617  		src := v.Args[1]
  6618  		mem := v.Args[2]
  6619  		if !(s > 16 || t.(Type).Alignment()%4 != 0) {
  6620  			break
  6621  		}
  6622  		v.reset(OpMIPSLoweredMove)
  6623  		v.AuxInt = t.(Type).Alignment()
  6624  		v.AddArg(dst)
  6625  		v.AddArg(src)
  6626  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, src.Type)
  6627  		v0.AuxInt = s - moveSize(t.(Type).Alignment(), config)
  6628  		v0.AddArg(src)
  6629  		v.AddArg(v0)
  6630  		v.AddArg(mem)
  6631  		return true
  6632  	}
  6633  	return false
  6634  }
  6635  func rewriteValueMIPS_OpMul16(v *Value) bool {
  6636  	// match: (Mul16 x y)
  6637  	// cond:
  6638  	// result: (MUL x y)
  6639  	for {
  6640  		x := v.Args[0]
  6641  		y := v.Args[1]
  6642  		v.reset(OpMIPSMUL)
  6643  		v.AddArg(x)
  6644  		v.AddArg(y)
  6645  		return true
  6646  	}
  6647  }
  6648  func rewriteValueMIPS_OpMul32(v *Value) bool {
  6649  	// match: (Mul32 x y)
  6650  	// cond:
  6651  	// result: (MUL x y)
  6652  	for {
  6653  		x := v.Args[0]
  6654  		y := v.Args[1]
  6655  		v.reset(OpMIPSMUL)
  6656  		v.AddArg(x)
  6657  		v.AddArg(y)
  6658  		return true
  6659  	}
  6660  }
  6661  func rewriteValueMIPS_OpMul32F(v *Value) bool {
  6662  	// match: (Mul32F x y)
  6663  	// cond:
  6664  	// result: (MULF x y)
  6665  	for {
  6666  		x := v.Args[0]
  6667  		y := v.Args[1]
  6668  		v.reset(OpMIPSMULF)
  6669  		v.AddArg(x)
  6670  		v.AddArg(y)
  6671  		return true
  6672  	}
  6673  }
  6674  func rewriteValueMIPS_OpMul32uhilo(v *Value) bool {
  6675  	// match: (Mul32uhilo x y)
  6676  	// cond:
  6677  	// result: (MULTU x y)
  6678  	for {
  6679  		x := v.Args[0]
  6680  		y := v.Args[1]
  6681  		v.reset(OpMIPSMULTU)
  6682  		v.AddArg(x)
  6683  		v.AddArg(y)
  6684  		return true
  6685  	}
  6686  }
  6687  func rewriteValueMIPS_OpMul64F(v *Value) bool {
  6688  	// match: (Mul64F x y)
  6689  	// cond:
  6690  	// result: (MULD x y)
  6691  	for {
  6692  		x := v.Args[0]
  6693  		y := v.Args[1]
  6694  		v.reset(OpMIPSMULD)
  6695  		v.AddArg(x)
  6696  		v.AddArg(y)
  6697  		return true
  6698  	}
  6699  }
  6700  func rewriteValueMIPS_OpMul8(v *Value) bool {
  6701  	// match: (Mul8 x y)
  6702  	// cond:
  6703  	// result: (MUL x y)
  6704  	for {
  6705  		x := v.Args[0]
  6706  		y := v.Args[1]
  6707  		v.reset(OpMIPSMUL)
  6708  		v.AddArg(x)
  6709  		v.AddArg(y)
  6710  		return true
  6711  	}
  6712  }
  6713  func rewriteValueMIPS_OpNeg16(v *Value) bool {
  6714  	// match: (Neg16 x)
  6715  	// cond:
  6716  	// result: (NEG x)
  6717  	for {
  6718  		x := v.Args[0]
  6719  		v.reset(OpMIPSNEG)
  6720  		v.AddArg(x)
  6721  		return true
  6722  	}
  6723  }
  6724  func rewriteValueMIPS_OpNeg32(v *Value) bool {
  6725  	// match: (Neg32 x)
  6726  	// cond:
  6727  	// result: (NEG x)
  6728  	for {
  6729  		x := v.Args[0]
  6730  		v.reset(OpMIPSNEG)
  6731  		v.AddArg(x)
  6732  		return true
  6733  	}
  6734  }
  6735  func rewriteValueMIPS_OpNeg32F(v *Value) bool {
  6736  	// match: (Neg32F x)
  6737  	// cond:
  6738  	// result: (NEGF x)
  6739  	for {
  6740  		x := v.Args[0]
  6741  		v.reset(OpMIPSNEGF)
  6742  		v.AddArg(x)
  6743  		return true
  6744  	}
  6745  }
  6746  func rewriteValueMIPS_OpNeg64F(v *Value) bool {
  6747  	// match: (Neg64F x)
  6748  	// cond:
  6749  	// result: (NEGD x)
  6750  	for {
  6751  		x := v.Args[0]
  6752  		v.reset(OpMIPSNEGD)
  6753  		v.AddArg(x)
  6754  		return true
  6755  	}
  6756  }
  6757  func rewriteValueMIPS_OpNeg8(v *Value) bool {
  6758  	// match: (Neg8 x)
  6759  	// cond:
  6760  	// result: (NEG x)
  6761  	for {
  6762  		x := v.Args[0]
  6763  		v.reset(OpMIPSNEG)
  6764  		v.AddArg(x)
  6765  		return true
  6766  	}
  6767  }
  6768  func rewriteValueMIPS_OpNeq16(v *Value) bool {
  6769  	b := v.Block
  6770  	_ = b
  6771  	types := &b.Func.Config.Types
  6772  	_ = types
  6773  	// match: (Neq16 x y)
  6774  	// cond:
  6775  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
  6776  	for {
  6777  		x := v.Args[0]
  6778  		y := v.Args[1]
  6779  		v.reset(OpMIPSSGTU)
  6780  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, types.UInt32)
  6781  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  6782  		v1.AddArg(x)
  6783  		v0.AddArg(v1)
  6784  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  6785  		v2.AddArg(y)
  6786  		v0.AddArg(v2)
  6787  		v.AddArg(v0)
  6788  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  6789  		v3.AuxInt = 0
  6790  		v.AddArg(v3)
  6791  		return true
  6792  	}
  6793  }
  6794  func rewriteValueMIPS_OpNeq32(v *Value) bool {
  6795  	b := v.Block
  6796  	_ = b
  6797  	types := &b.Func.Config.Types
  6798  	_ = types
  6799  	// match: (Neq32 x y)
  6800  	// cond:
  6801  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  6802  	for {
  6803  		x := v.Args[0]
  6804  		y := v.Args[1]
  6805  		v.reset(OpMIPSSGTU)
  6806  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, types.UInt32)
  6807  		v0.AddArg(x)
  6808  		v0.AddArg(y)
  6809  		v.AddArg(v0)
  6810  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  6811  		v1.AuxInt = 0
  6812  		v.AddArg(v1)
  6813  		return true
  6814  	}
  6815  }
  6816  func rewriteValueMIPS_OpNeq32F(v *Value) bool {
  6817  	b := v.Block
  6818  	_ = b
  6819  	// match: (Neq32F x y)
  6820  	// cond:
  6821  	// result: (FPFlagFalse (CMPEQF x y))
  6822  	for {
  6823  		x := v.Args[0]
  6824  		y := v.Args[1]
  6825  		v.reset(OpMIPSFPFlagFalse)
  6826  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, TypeFlags)
  6827  		v0.AddArg(x)
  6828  		v0.AddArg(y)
  6829  		v.AddArg(v0)
  6830  		return true
  6831  	}
  6832  }
  6833  func rewriteValueMIPS_OpNeq64F(v *Value) bool {
  6834  	b := v.Block
  6835  	_ = b
  6836  	// match: (Neq64F x y)
  6837  	// cond:
  6838  	// result: (FPFlagFalse (CMPEQD x y))
  6839  	for {
  6840  		x := v.Args[0]
  6841  		y := v.Args[1]
  6842  		v.reset(OpMIPSFPFlagFalse)
  6843  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, TypeFlags)
  6844  		v0.AddArg(x)
  6845  		v0.AddArg(y)
  6846  		v.AddArg(v0)
  6847  		return true
  6848  	}
  6849  }
  6850  func rewriteValueMIPS_OpNeq8(v *Value) bool {
  6851  	b := v.Block
  6852  	_ = b
  6853  	types := &b.Func.Config.Types
  6854  	_ = types
  6855  	// match: (Neq8 x y)
  6856  	// cond:
  6857  	// result: (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
  6858  	for {
  6859  		x := v.Args[0]
  6860  		y := v.Args[1]
  6861  		v.reset(OpMIPSSGTU)
  6862  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, types.UInt32)
  6863  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  6864  		v1.AddArg(x)
  6865  		v0.AddArg(v1)
  6866  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  6867  		v2.AddArg(y)
  6868  		v0.AddArg(v2)
  6869  		v.AddArg(v0)
  6870  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  6871  		v3.AuxInt = 0
  6872  		v.AddArg(v3)
  6873  		return true
  6874  	}
  6875  }
  6876  func rewriteValueMIPS_OpNeqB(v *Value) bool {
  6877  	// match: (NeqB x y)
  6878  	// cond:
  6879  	// result: (XOR x y)
  6880  	for {
  6881  		x := v.Args[0]
  6882  		y := v.Args[1]
  6883  		v.reset(OpMIPSXOR)
  6884  		v.AddArg(x)
  6885  		v.AddArg(y)
  6886  		return true
  6887  	}
  6888  }
  6889  func rewriteValueMIPS_OpNeqPtr(v *Value) bool {
  6890  	b := v.Block
  6891  	_ = b
  6892  	types := &b.Func.Config.Types
  6893  	_ = types
  6894  	// match: (NeqPtr x y)
  6895  	// cond:
  6896  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  6897  	for {
  6898  		x := v.Args[0]
  6899  		y := v.Args[1]
  6900  		v.reset(OpMIPSSGTU)
  6901  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, types.UInt32)
  6902  		v0.AddArg(x)
  6903  		v0.AddArg(y)
  6904  		v.AddArg(v0)
  6905  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  6906  		v1.AuxInt = 0
  6907  		v.AddArg(v1)
  6908  		return true
  6909  	}
  6910  }
  6911  func rewriteValueMIPS_OpNilCheck(v *Value) bool {
  6912  	// match: (NilCheck ptr mem)
  6913  	// cond:
  6914  	// result: (LoweredNilCheck ptr mem)
  6915  	for {
  6916  		ptr := v.Args[0]
  6917  		mem := v.Args[1]
  6918  		v.reset(OpMIPSLoweredNilCheck)
  6919  		v.AddArg(ptr)
  6920  		v.AddArg(mem)
  6921  		return true
  6922  	}
  6923  }
  6924  func rewriteValueMIPS_OpNot(v *Value) bool {
  6925  	// match: (Not x)
  6926  	// cond:
  6927  	// result: (XORconst [1] x)
  6928  	for {
  6929  		x := v.Args[0]
  6930  		v.reset(OpMIPSXORconst)
  6931  		v.AuxInt = 1
  6932  		v.AddArg(x)
  6933  		return true
  6934  	}
  6935  }
  6936  func rewriteValueMIPS_OpOffPtr(v *Value) bool {
  6937  	// match: (OffPtr [off] ptr:(SP))
  6938  	// cond:
  6939  	// result: (MOVWaddr [off] ptr)
  6940  	for {
  6941  		off := v.AuxInt
  6942  		ptr := v.Args[0]
  6943  		if ptr.Op != OpSP {
  6944  			break
  6945  		}
  6946  		v.reset(OpMIPSMOVWaddr)
  6947  		v.AuxInt = off
  6948  		v.AddArg(ptr)
  6949  		return true
  6950  	}
  6951  	// match: (OffPtr [off] ptr)
  6952  	// cond:
  6953  	// result: (ADDconst [off] ptr)
  6954  	for {
  6955  		off := v.AuxInt
  6956  		ptr := v.Args[0]
  6957  		v.reset(OpMIPSADDconst)
  6958  		v.AuxInt = off
  6959  		v.AddArg(ptr)
  6960  		return true
  6961  	}
  6962  }
  6963  func rewriteValueMIPS_OpOr16(v *Value) bool {
  6964  	// match: (Or16 x y)
  6965  	// cond:
  6966  	// result: (OR x y)
  6967  	for {
  6968  		x := v.Args[0]
  6969  		y := v.Args[1]
  6970  		v.reset(OpMIPSOR)
  6971  		v.AddArg(x)
  6972  		v.AddArg(y)
  6973  		return true
  6974  	}
  6975  }
  6976  func rewriteValueMIPS_OpOr32(v *Value) bool {
  6977  	// match: (Or32 x y)
  6978  	// cond:
  6979  	// result: (OR x y)
  6980  	for {
  6981  		x := v.Args[0]
  6982  		y := v.Args[1]
  6983  		v.reset(OpMIPSOR)
  6984  		v.AddArg(x)
  6985  		v.AddArg(y)
  6986  		return true
  6987  	}
  6988  }
  6989  func rewriteValueMIPS_OpOr8(v *Value) bool {
  6990  	// match: (Or8 x y)
  6991  	// cond:
  6992  	// result: (OR x y)
  6993  	for {
  6994  		x := v.Args[0]
  6995  		y := v.Args[1]
  6996  		v.reset(OpMIPSOR)
  6997  		v.AddArg(x)
  6998  		v.AddArg(y)
  6999  		return true
  7000  	}
  7001  }
  7002  func rewriteValueMIPS_OpOrB(v *Value) bool {
  7003  	// match: (OrB x y)
  7004  	// cond:
  7005  	// result: (OR x y)
  7006  	for {
  7007  		x := v.Args[0]
  7008  		y := v.Args[1]
  7009  		v.reset(OpMIPSOR)
  7010  		v.AddArg(x)
  7011  		v.AddArg(y)
  7012  		return true
  7013  	}
  7014  }
  7015  func rewriteValueMIPS_OpRound32F(v *Value) bool {
  7016  	// match: (Round32F x)
  7017  	// cond:
  7018  	// result: x
  7019  	for {
  7020  		x := v.Args[0]
  7021  		v.reset(OpCopy)
  7022  		v.Type = x.Type
  7023  		v.AddArg(x)
  7024  		return true
  7025  	}
  7026  }
  7027  func rewriteValueMIPS_OpRound64F(v *Value) bool {
  7028  	// match: (Round64F x)
  7029  	// cond:
  7030  	// result: x
  7031  	for {
  7032  		x := v.Args[0]
  7033  		v.reset(OpCopy)
  7034  		v.Type = x.Type
  7035  		v.AddArg(x)
  7036  		return true
  7037  	}
  7038  }
  7039  func rewriteValueMIPS_OpRsh16Ux16(v *Value) bool {
  7040  	b := v.Block
  7041  	_ = b
  7042  	types := &b.Func.Config.Types
  7043  	_ = types
  7044  	// match: (Rsh16Ux16 <t> x y)
  7045  	// cond:
  7046  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  7047  	for {
  7048  		t := v.Type
  7049  		x := v.Args[0]
  7050  		y := v.Args[1]
  7051  		v.reset(OpMIPSCMOVZ)
  7052  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  7053  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7054  		v1.AddArg(x)
  7055  		v0.AddArg(v1)
  7056  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7057  		v2.AddArg(y)
  7058  		v0.AddArg(v2)
  7059  		v.AddArg(v0)
  7060  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7061  		v3.AuxInt = 0
  7062  		v.AddArg(v3)
  7063  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7064  		v4.AuxInt = 32
  7065  		v5 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7066  		v5.AddArg(y)
  7067  		v4.AddArg(v5)
  7068  		v.AddArg(v4)
  7069  		return true
  7070  	}
  7071  }
  7072  func rewriteValueMIPS_OpRsh16Ux32(v *Value) bool {
  7073  	b := v.Block
  7074  	_ = b
  7075  	types := &b.Func.Config.Types
  7076  	_ = types
  7077  	// match: (Rsh16Ux32 <t> x y)
  7078  	// cond:
  7079  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  7080  	for {
  7081  		t := v.Type
  7082  		x := v.Args[0]
  7083  		y := v.Args[1]
  7084  		v.reset(OpMIPSCMOVZ)
  7085  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  7086  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7087  		v1.AddArg(x)
  7088  		v0.AddArg(v1)
  7089  		v0.AddArg(y)
  7090  		v.AddArg(v0)
  7091  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7092  		v2.AuxInt = 0
  7093  		v.AddArg(v2)
  7094  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7095  		v3.AuxInt = 32
  7096  		v3.AddArg(y)
  7097  		v.AddArg(v3)
  7098  		return true
  7099  	}
  7100  }
  7101  func rewriteValueMIPS_OpRsh16Ux64(v *Value) bool {
  7102  	b := v.Block
  7103  	_ = b
  7104  	types := &b.Func.Config.Types
  7105  	_ = types
  7106  	// match: (Rsh16Ux64 x (Const64 [c]))
  7107  	// cond: uint32(c) < 16
  7108  	// result: (SRLconst (SLLconst <types.UInt32> x [16]) [c+16])
  7109  	for {
  7110  		x := v.Args[0]
  7111  		v_1 := v.Args[1]
  7112  		if v_1.Op != OpConst64 {
  7113  			break
  7114  		}
  7115  		c := v_1.AuxInt
  7116  		if !(uint32(c) < 16) {
  7117  			break
  7118  		}
  7119  		v.reset(OpMIPSSRLconst)
  7120  		v.AuxInt = c + 16
  7121  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
  7122  		v0.AuxInt = 16
  7123  		v0.AddArg(x)
  7124  		v.AddArg(v0)
  7125  		return true
  7126  	}
  7127  	// match: (Rsh16Ux64 _ (Const64 [c]))
  7128  	// cond: uint32(c) >= 16
  7129  	// result: (MOVWconst [0])
  7130  	for {
  7131  		v_1 := v.Args[1]
  7132  		if v_1.Op != OpConst64 {
  7133  			break
  7134  		}
  7135  		c := v_1.AuxInt
  7136  		if !(uint32(c) >= 16) {
  7137  			break
  7138  		}
  7139  		v.reset(OpMIPSMOVWconst)
  7140  		v.AuxInt = 0
  7141  		return true
  7142  	}
  7143  	return false
  7144  }
  7145  func rewriteValueMIPS_OpRsh16Ux8(v *Value) bool {
  7146  	b := v.Block
  7147  	_ = b
  7148  	types := &b.Func.Config.Types
  7149  	_ = types
  7150  	// match: (Rsh16Ux8 <t> x y)
  7151  	// cond:
  7152  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  7153  	for {
  7154  		t := v.Type
  7155  		x := v.Args[0]
  7156  		y := v.Args[1]
  7157  		v.reset(OpMIPSCMOVZ)
  7158  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  7159  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7160  		v1.AddArg(x)
  7161  		v0.AddArg(v1)
  7162  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7163  		v2.AddArg(y)
  7164  		v0.AddArg(v2)
  7165  		v.AddArg(v0)
  7166  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7167  		v3.AuxInt = 0
  7168  		v.AddArg(v3)
  7169  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7170  		v4.AuxInt = 32
  7171  		v5 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7172  		v5.AddArg(y)
  7173  		v4.AddArg(v5)
  7174  		v.AddArg(v4)
  7175  		return true
  7176  	}
  7177  }
  7178  func rewriteValueMIPS_OpRsh16x16(v *Value) bool {
  7179  	b := v.Block
  7180  	_ = b
  7181  	types := &b.Func.Config.Types
  7182  	_ = types
  7183  	// match: (Rsh16x16 x y)
  7184  	// cond:
  7185  	// result: (SRA (SignExt16to32 x) ( CMOVZ <types.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
  7186  	for {
  7187  		x := v.Args[0]
  7188  		y := v.Args[1]
  7189  		v.reset(OpMIPSSRA)
  7190  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  7191  		v0.AddArg(x)
  7192  		v.AddArg(v0)
  7193  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, types.UInt32)
  7194  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7195  		v2.AddArg(y)
  7196  		v1.AddArg(v2)
  7197  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7198  		v3.AuxInt = -1
  7199  		v1.AddArg(v3)
  7200  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7201  		v4.AuxInt = 32
  7202  		v5 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7203  		v5.AddArg(y)
  7204  		v4.AddArg(v5)
  7205  		v1.AddArg(v4)
  7206  		v.AddArg(v1)
  7207  		return true
  7208  	}
  7209  }
  7210  func rewriteValueMIPS_OpRsh16x32(v *Value) bool {
  7211  	b := v.Block
  7212  	_ = b
  7213  	types := &b.Func.Config.Types
  7214  	_ = types
  7215  	// match: (Rsh16x32 x y)
  7216  	// cond:
  7217  	// result: (SRA (SignExt16to32 x) ( CMOVZ <types.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
  7218  	for {
  7219  		x := v.Args[0]
  7220  		y := v.Args[1]
  7221  		v.reset(OpMIPSSRA)
  7222  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  7223  		v0.AddArg(x)
  7224  		v.AddArg(v0)
  7225  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, types.UInt32)
  7226  		v1.AddArg(y)
  7227  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7228  		v2.AuxInt = -1
  7229  		v1.AddArg(v2)
  7230  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7231  		v3.AuxInt = 32
  7232  		v3.AddArg(y)
  7233  		v1.AddArg(v3)
  7234  		v.AddArg(v1)
  7235  		return true
  7236  	}
  7237  }
  7238  func rewriteValueMIPS_OpRsh16x64(v *Value) bool {
  7239  	b := v.Block
  7240  	_ = b
  7241  	types := &b.Func.Config.Types
  7242  	_ = types
  7243  	// match: (Rsh16x64 x (Const64 [c]))
  7244  	// cond: uint32(c) < 16
  7245  	// result: (SRAconst (SLLconst <types.UInt32> x [16]) [c+16])
  7246  	for {
  7247  		x := v.Args[0]
  7248  		v_1 := v.Args[1]
  7249  		if v_1.Op != OpConst64 {
  7250  			break
  7251  		}
  7252  		c := v_1.AuxInt
  7253  		if !(uint32(c) < 16) {
  7254  			break
  7255  		}
  7256  		v.reset(OpMIPSSRAconst)
  7257  		v.AuxInt = c + 16
  7258  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
  7259  		v0.AuxInt = 16
  7260  		v0.AddArg(x)
  7261  		v.AddArg(v0)
  7262  		return true
  7263  	}
  7264  	// match: (Rsh16x64 x (Const64 [c]))
  7265  	// cond: uint32(c) >= 16
  7266  	// result: (SRAconst (SLLconst <types.UInt32> x [16]) [31])
  7267  	for {
  7268  		x := v.Args[0]
  7269  		v_1 := v.Args[1]
  7270  		if v_1.Op != OpConst64 {
  7271  			break
  7272  		}
  7273  		c := v_1.AuxInt
  7274  		if !(uint32(c) >= 16) {
  7275  			break
  7276  		}
  7277  		v.reset(OpMIPSSRAconst)
  7278  		v.AuxInt = 31
  7279  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
  7280  		v0.AuxInt = 16
  7281  		v0.AddArg(x)
  7282  		v.AddArg(v0)
  7283  		return true
  7284  	}
  7285  	return false
  7286  }
  7287  func rewriteValueMIPS_OpRsh16x8(v *Value) bool {
  7288  	b := v.Block
  7289  	_ = b
  7290  	types := &b.Func.Config.Types
  7291  	_ = types
  7292  	// match: (Rsh16x8 x y)
  7293  	// cond:
  7294  	// result: (SRA (SignExt16to32 x) ( CMOVZ <types.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
  7295  	for {
  7296  		x := v.Args[0]
  7297  		y := v.Args[1]
  7298  		v.reset(OpMIPSSRA)
  7299  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  7300  		v0.AddArg(x)
  7301  		v.AddArg(v0)
  7302  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, types.UInt32)
  7303  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7304  		v2.AddArg(y)
  7305  		v1.AddArg(v2)
  7306  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7307  		v3.AuxInt = -1
  7308  		v1.AddArg(v3)
  7309  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7310  		v4.AuxInt = 32
  7311  		v5 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7312  		v5.AddArg(y)
  7313  		v4.AddArg(v5)
  7314  		v1.AddArg(v4)
  7315  		v.AddArg(v1)
  7316  		return true
  7317  	}
  7318  }
  7319  func rewriteValueMIPS_OpRsh32Ux16(v *Value) bool {
  7320  	b := v.Block
  7321  	_ = b
  7322  	types := &b.Func.Config.Types
  7323  	_ = types
  7324  	// match: (Rsh32Ux16 <t> x y)
  7325  	// cond:
  7326  	// result: (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  7327  	for {
  7328  		t := v.Type
  7329  		x := v.Args[0]
  7330  		y := v.Args[1]
  7331  		v.reset(OpMIPSCMOVZ)
  7332  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  7333  		v0.AddArg(x)
  7334  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7335  		v1.AddArg(y)
  7336  		v0.AddArg(v1)
  7337  		v.AddArg(v0)
  7338  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7339  		v2.AuxInt = 0
  7340  		v.AddArg(v2)
  7341  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7342  		v3.AuxInt = 32
  7343  		v4 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7344  		v4.AddArg(y)
  7345  		v3.AddArg(v4)
  7346  		v.AddArg(v3)
  7347  		return true
  7348  	}
  7349  }
  7350  func rewriteValueMIPS_OpRsh32Ux32(v *Value) bool {
  7351  	b := v.Block
  7352  	_ = b
  7353  	types := &b.Func.Config.Types
  7354  	_ = types
  7355  	// match: (Rsh32Ux32 <t> x y)
  7356  	// cond:
  7357  	// result: (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  7358  	for {
  7359  		t := v.Type
  7360  		x := v.Args[0]
  7361  		y := v.Args[1]
  7362  		v.reset(OpMIPSCMOVZ)
  7363  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  7364  		v0.AddArg(x)
  7365  		v0.AddArg(y)
  7366  		v.AddArg(v0)
  7367  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7368  		v1.AuxInt = 0
  7369  		v.AddArg(v1)
  7370  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7371  		v2.AuxInt = 32
  7372  		v2.AddArg(y)
  7373  		v.AddArg(v2)
  7374  		return true
  7375  	}
  7376  }
  7377  func rewriteValueMIPS_OpRsh32Ux64(v *Value) bool {
  7378  	// match: (Rsh32Ux64 x (Const64 [c]))
  7379  	// cond: uint32(c) < 32
  7380  	// result: (SRLconst x [c])
  7381  	for {
  7382  		x := v.Args[0]
  7383  		v_1 := v.Args[1]
  7384  		if v_1.Op != OpConst64 {
  7385  			break
  7386  		}
  7387  		c := v_1.AuxInt
  7388  		if !(uint32(c) < 32) {
  7389  			break
  7390  		}
  7391  		v.reset(OpMIPSSRLconst)
  7392  		v.AuxInt = c
  7393  		v.AddArg(x)
  7394  		return true
  7395  	}
  7396  	// match: (Rsh32Ux64 _ (Const64 [c]))
  7397  	// cond: uint32(c) >= 32
  7398  	// result: (MOVWconst [0])
  7399  	for {
  7400  		v_1 := v.Args[1]
  7401  		if v_1.Op != OpConst64 {
  7402  			break
  7403  		}
  7404  		c := v_1.AuxInt
  7405  		if !(uint32(c) >= 32) {
  7406  			break
  7407  		}
  7408  		v.reset(OpMIPSMOVWconst)
  7409  		v.AuxInt = 0
  7410  		return true
  7411  	}
  7412  	return false
  7413  }
  7414  func rewriteValueMIPS_OpRsh32Ux8(v *Value) bool {
  7415  	b := v.Block
  7416  	_ = b
  7417  	types := &b.Func.Config.Types
  7418  	_ = types
  7419  	// match: (Rsh32Ux8 <t> x y)
  7420  	// cond:
  7421  	// result: (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  7422  	for {
  7423  		t := v.Type
  7424  		x := v.Args[0]
  7425  		y := v.Args[1]
  7426  		v.reset(OpMIPSCMOVZ)
  7427  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  7428  		v0.AddArg(x)
  7429  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7430  		v1.AddArg(y)
  7431  		v0.AddArg(v1)
  7432  		v.AddArg(v0)
  7433  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7434  		v2.AuxInt = 0
  7435  		v.AddArg(v2)
  7436  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7437  		v3.AuxInt = 32
  7438  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7439  		v4.AddArg(y)
  7440  		v3.AddArg(v4)
  7441  		v.AddArg(v3)
  7442  		return true
  7443  	}
  7444  }
  7445  func rewriteValueMIPS_OpRsh32x16(v *Value) bool {
  7446  	b := v.Block
  7447  	_ = b
  7448  	types := &b.Func.Config.Types
  7449  	_ = types
  7450  	// match: (Rsh32x16 x y)
  7451  	// cond:
  7452  	// result: (SRA x ( CMOVZ <types.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
  7453  	for {
  7454  		x := v.Args[0]
  7455  		y := v.Args[1]
  7456  		v.reset(OpMIPSSRA)
  7457  		v.AddArg(x)
  7458  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, types.UInt32)
  7459  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7460  		v1.AddArg(y)
  7461  		v0.AddArg(v1)
  7462  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7463  		v2.AuxInt = -1
  7464  		v0.AddArg(v2)
  7465  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7466  		v3.AuxInt = 32
  7467  		v4 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7468  		v4.AddArg(y)
  7469  		v3.AddArg(v4)
  7470  		v0.AddArg(v3)
  7471  		v.AddArg(v0)
  7472  		return true
  7473  	}
  7474  }
  7475  func rewriteValueMIPS_OpRsh32x32(v *Value) bool {
  7476  	b := v.Block
  7477  	_ = b
  7478  	types := &b.Func.Config.Types
  7479  	_ = types
  7480  	// match: (Rsh32x32 x y)
  7481  	// cond:
  7482  	// result: (SRA x ( CMOVZ <types.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
  7483  	for {
  7484  		x := v.Args[0]
  7485  		y := v.Args[1]
  7486  		v.reset(OpMIPSSRA)
  7487  		v.AddArg(x)
  7488  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, types.UInt32)
  7489  		v0.AddArg(y)
  7490  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7491  		v1.AuxInt = -1
  7492  		v0.AddArg(v1)
  7493  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7494  		v2.AuxInt = 32
  7495  		v2.AddArg(y)
  7496  		v0.AddArg(v2)
  7497  		v.AddArg(v0)
  7498  		return true
  7499  	}
  7500  }
  7501  func rewriteValueMIPS_OpRsh32x64(v *Value) bool {
  7502  	// match: (Rsh32x64 x (Const64 [c]))
  7503  	// cond: uint32(c) < 32
  7504  	// result: (SRAconst x [c])
  7505  	for {
  7506  		x := v.Args[0]
  7507  		v_1 := v.Args[1]
  7508  		if v_1.Op != OpConst64 {
  7509  			break
  7510  		}
  7511  		c := v_1.AuxInt
  7512  		if !(uint32(c) < 32) {
  7513  			break
  7514  		}
  7515  		v.reset(OpMIPSSRAconst)
  7516  		v.AuxInt = c
  7517  		v.AddArg(x)
  7518  		return true
  7519  	}
  7520  	// match: (Rsh32x64 x (Const64 [c]))
  7521  	// cond: uint32(c) >= 32
  7522  	// result: (SRAconst x [31])
  7523  	for {
  7524  		x := v.Args[0]
  7525  		v_1 := v.Args[1]
  7526  		if v_1.Op != OpConst64 {
  7527  			break
  7528  		}
  7529  		c := v_1.AuxInt
  7530  		if !(uint32(c) >= 32) {
  7531  			break
  7532  		}
  7533  		v.reset(OpMIPSSRAconst)
  7534  		v.AuxInt = 31
  7535  		v.AddArg(x)
  7536  		return true
  7537  	}
  7538  	return false
  7539  }
  7540  func rewriteValueMIPS_OpRsh32x8(v *Value) bool {
  7541  	b := v.Block
  7542  	_ = b
  7543  	types := &b.Func.Config.Types
  7544  	_ = types
  7545  	// match: (Rsh32x8 x y)
  7546  	// cond:
  7547  	// result: (SRA x ( CMOVZ <types.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
  7548  	for {
  7549  		x := v.Args[0]
  7550  		y := v.Args[1]
  7551  		v.reset(OpMIPSSRA)
  7552  		v.AddArg(x)
  7553  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, types.UInt32)
  7554  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7555  		v1.AddArg(y)
  7556  		v0.AddArg(v1)
  7557  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7558  		v2.AuxInt = -1
  7559  		v0.AddArg(v2)
  7560  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7561  		v3.AuxInt = 32
  7562  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7563  		v4.AddArg(y)
  7564  		v3.AddArg(v4)
  7565  		v0.AddArg(v3)
  7566  		v.AddArg(v0)
  7567  		return true
  7568  	}
  7569  }
  7570  func rewriteValueMIPS_OpRsh8Ux16(v *Value) bool {
  7571  	b := v.Block
  7572  	_ = b
  7573  	types := &b.Func.Config.Types
  7574  	_ = types
  7575  	// match: (Rsh8Ux16 <t> x y)
  7576  	// cond:
  7577  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  7578  	for {
  7579  		t := v.Type
  7580  		x := v.Args[0]
  7581  		y := v.Args[1]
  7582  		v.reset(OpMIPSCMOVZ)
  7583  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  7584  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7585  		v1.AddArg(x)
  7586  		v0.AddArg(v1)
  7587  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7588  		v2.AddArg(y)
  7589  		v0.AddArg(v2)
  7590  		v.AddArg(v0)
  7591  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7592  		v3.AuxInt = 0
  7593  		v.AddArg(v3)
  7594  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7595  		v4.AuxInt = 32
  7596  		v5 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7597  		v5.AddArg(y)
  7598  		v4.AddArg(v5)
  7599  		v.AddArg(v4)
  7600  		return true
  7601  	}
  7602  }
  7603  func rewriteValueMIPS_OpRsh8Ux32(v *Value) bool {
  7604  	b := v.Block
  7605  	_ = b
  7606  	types := &b.Func.Config.Types
  7607  	_ = types
  7608  	// match: (Rsh8Ux32 <t> x y)
  7609  	// cond:
  7610  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  7611  	for {
  7612  		t := v.Type
  7613  		x := v.Args[0]
  7614  		y := v.Args[1]
  7615  		v.reset(OpMIPSCMOVZ)
  7616  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  7617  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7618  		v1.AddArg(x)
  7619  		v0.AddArg(v1)
  7620  		v0.AddArg(y)
  7621  		v.AddArg(v0)
  7622  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7623  		v2.AuxInt = 0
  7624  		v.AddArg(v2)
  7625  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7626  		v3.AuxInt = 32
  7627  		v3.AddArg(y)
  7628  		v.AddArg(v3)
  7629  		return true
  7630  	}
  7631  }
  7632  func rewriteValueMIPS_OpRsh8Ux64(v *Value) bool {
  7633  	b := v.Block
  7634  	_ = b
  7635  	types := &b.Func.Config.Types
  7636  	_ = types
  7637  	// match: (Rsh8Ux64 x (Const64 [c]))
  7638  	// cond: uint32(c) < 8
  7639  	// result: (SRLconst (SLLconst <types.UInt32> x [24]) [c+24])
  7640  	for {
  7641  		x := v.Args[0]
  7642  		v_1 := v.Args[1]
  7643  		if v_1.Op != OpConst64 {
  7644  			break
  7645  		}
  7646  		c := v_1.AuxInt
  7647  		if !(uint32(c) < 8) {
  7648  			break
  7649  		}
  7650  		v.reset(OpMIPSSRLconst)
  7651  		v.AuxInt = c + 24
  7652  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
  7653  		v0.AuxInt = 24
  7654  		v0.AddArg(x)
  7655  		v.AddArg(v0)
  7656  		return true
  7657  	}
  7658  	// match: (Rsh8Ux64 _ (Const64 [c]))
  7659  	// cond: uint32(c) >= 8
  7660  	// result: (MOVWconst [0])
  7661  	for {
  7662  		v_1 := v.Args[1]
  7663  		if v_1.Op != OpConst64 {
  7664  			break
  7665  		}
  7666  		c := v_1.AuxInt
  7667  		if !(uint32(c) >= 8) {
  7668  			break
  7669  		}
  7670  		v.reset(OpMIPSMOVWconst)
  7671  		v.AuxInt = 0
  7672  		return true
  7673  	}
  7674  	return false
  7675  }
  7676  func rewriteValueMIPS_OpRsh8Ux8(v *Value) bool {
  7677  	b := v.Block
  7678  	_ = b
  7679  	types := &b.Func.Config.Types
  7680  	_ = types
  7681  	// match: (Rsh8Ux8 <t> x y)
  7682  	// cond:
  7683  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  7684  	for {
  7685  		t := v.Type
  7686  		x := v.Args[0]
  7687  		y := v.Args[1]
  7688  		v.reset(OpMIPSCMOVZ)
  7689  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  7690  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7691  		v1.AddArg(x)
  7692  		v0.AddArg(v1)
  7693  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7694  		v2.AddArg(y)
  7695  		v0.AddArg(v2)
  7696  		v.AddArg(v0)
  7697  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7698  		v3.AuxInt = 0
  7699  		v.AddArg(v3)
  7700  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7701  		v4.AuxInt = 32
  7702  		v5 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7703  		v5.AddArg(y)
  7704  		v4.AddArg(v5)
  7705  		v.AddArg(v4)
  7706  		return true
  7707  	}
  7708  }
  7709  func rewriteValueMIPS_OpRsh8x16(v *Value) bool {
  7710  	b := v.Block
  7711  	_ = b
  7712  	types := &b.Func.Config.Types
  7713  	_ = types
  7714  	// match: (Rsh8x16 x y)
  7715  	// cond:
  7716  	// result: (SRA (SignExt16to32 x) ( CMOVZ <types.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
  7717  	for {
  7718  		x := v.Args[0]
  7719  		y := v.Args[1]
  7720  		v.reset(OpMIPSSRA)
  7721  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  7722  		v0.AddArg(x)
  7723  		v.AddArg(v0)
  7724  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, types.UInt32)
  7725  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7726  		v2.AddArg(y)
  7727  		v1.AddArg(v2)
  7728  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7729  		v3.AuxInt = -1
  7730  		v1.AddArg(v3)
  7731  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7732  		v4.AuxInt = 32
  7733  		v5 := b.NewValue0(v.Pos, OpZeroExt16to32, types.UInt32)
  7734  		v5.AddArg(y)
  7735  		v4.AddArg(v5)
  7736  		v1.AddArg(v4)
  7737  		v.AddArg(v1)
  7738  		return true
  7739  	}
  7740  }
  7741  func rewriteValueMIPS_OpRsh8x32(v *Value) bool {
  7742  	b := v.Block
  7743  	_ = b
  7744  	types := &b.Func.Config.Types
  7745  	_ = types
  7746  	// match: (Rsh8x32 x y)
  7747  	// cond:
  7748  	// result: (SRA (SignExt16to32 x) ( CMOVZ <types.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
  7749  	for {
  7750  		x := v.Args[0]
  7751  		y := v.Args[1]
  7752  		v.reset(OpMIPSSRA)
  7753  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  7754  		v0.AddArg(x)
  7755  		v.AddArg(v0)
  7756  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, types.UInt32)
  7757  		v1.AddArg(y)
  7758  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7759  		v2.AuxInt = -1
  7760  		v1.AddArg(v2)
  7761  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7762  		v3.AuxInt = 32
  7763  		v3.AddArg(y)
  7764  		v1.AddArg(v3)
  7765  		v.AddArg(v1)
  7766  		return true
  7767  	}
  7768  }
  7769  func rewriteValueMIPS_OpRsh8x64(v *Value) bool {
  7770  	b := v.Block
  7771  	_ = b
  7772  	types := &b.Func.Config.Types
  7773  	_ = types
  7774  	// match: (Rsh8x64 x (Const64 [c]))
  7775  	// cond: uint32(c) < 8
  7776  	// result: (SRAconst (SLLconst <types.UInt32> x [24]) [c+24])
  7777  	for {
  7778  		x := v.Args[0]
  7779  		v_1 := v.Args[1]
  7780  		if v_1.Op != OpConst64 {
  7781  			break
  7782  		}
  7783  		c := v_1.AuxInt
  7784  		if !(uint32(c) < 8) {
  7785  			break
  7786  		}
  7787  		v.reset(OpMIPSSRAconst)
  7788  		v.AuxInt = c + 24
  7789  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
  7790  		v0.AuxInt = 24
  7791  		v0.AddArg(x)
  7792  		v.AddArg(v0)
  7793  		return true
  7794  	}
  7795  	// match: (Rsh8x64 x (Const64 [c]))
  7796  	// cond: uint32(c) >= 8
  7797  	// result: (SRAconst (SLLconst <types.UInt32> x [24]) [31])
  7798  	for {
  7799  		x := v.Args[0]
  7800  		v_1 := v.Args[1]
  7801  		if v_1.Op != OpConst64 {
  7802  			break
  7803  		}
  7804  		c := v_1.AuxInt
  7805  		if !(uint32(c) >= 8) {
  7806  			break
  7807  		}
  7808  		v.reset(OpMIPSSRAconst)
  7809  		v.AuxInt = 31
  7810  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
  7811  		v0.AuxInt = 24
  7812  		v0.AddArg(x)
  7813  		v.AddArg(v0)
  7814  		return true
  7815  	}
  7816  	return false
  7817  }
  7818  func rewriteValueMIPS_OpRsh8x8(v *Value) bool {
  7819  	b := v.Block
  7820  	_ = b
  7821  	types := &b.Func.Config.Types
  7822  	_ = types
  7823  	// match: (Rsh8x8 x y)
  7824  	// cond:
  7825  	// result: (SRA (SignExt16to32 x) ( CMOVZ <types.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
  7826  	for {
  7827  		x := v.Args[0]
  7828  		y := v.Args[1]
  7829  		v.reset(OpMIPSSRA)
  7830  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, types.Int32)
  7831  		v0.AddArg(x)
  7832  		v.AddArg(v0)
  7833  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, types.UInt32)
  7834  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7835  		v2.AddArg(y)
  7836  		v1.AddArg(v2)
  7837  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7838  		v3.AuxInt = -1
  7839  		v1.AddArg(v3)
  7840  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, types.Bool)
  7841  		v4.AuxInt = 32
  7842  		v5 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
  7843  		v5.AddArg(y)
  7844  		v4.AddArg(v5)
  7845  		v1.AddArg(v4)
  7846  		v.AddArg(v1)
  7847  		return true
  7848  	}
  7849  }
  7850  func rewriteValueMIPS_OpSelect0(v *Value) bool {
  7851  	b := v.Block
  7852  	_ = b
  7853  	types := &b.Func.Config.Types
  7854  	_ = types
  7855  	// match: (Select0 (Add32carry <t> x y))
  7856  	// cond:
  7857  	// result: (ADD <t.FieldType(0)> x y)
  7858  	for {
  7859  		v_0 := v.Args[0]
  7860  		if v_0.Op != OpAdd32carry {
  7861  			break
  7862  		}
  7863  		t := v_0.Type
  7864  		x := v_0.Args[0]
  7865  		y := v_0.Args[1]
  7866  		v.reset(OpMIPSADD)
  7867  		v.Type = t.FieldType(0)
  7868  		v.AddArg(x)
  7869  		v.AddArg(y)
  7870  		return true
  7871  	}
  7872  	// match: (Select0 (Sub32carry <t> x y))
  7873  	// cond:
  7874  	// result: (SUB <t.FieldType(0)> x y)
  7875  	for {
  7876  		v_0 := v.Args[0]
  7877  		if v_0.Op != OpSub32carry {
  7878  			break
  7879  		}
  7880  		t := v_0.Type
  7881  		x := v_0.Args[0]
  7882  		y := v_0.Args[1]
  7883  		v.reset(OpMIPSSUB)
  7884  		v.Type = t.FieldType(0)
  7885  		v.AddArg(x)
  7886  		v.AddArg(y)
  7887  		return true
  7888  	}
  7889  	// match: (Select0 (MULTU (MOVWconst [0]) _))
  7890  	// cond:
  7891  	// result: (MOVWconst [0])
  7892  	for {
  7893  		v_0 := v.Args[0]
  7894  		if v_0.Op != OpMIPSMULTU {
  7895  			break
  7896  		}
  7897  		v_0_0 := v_0.Args[0]
  7898  		if v_0_0.Op != OpMIPSMOVWconst {
  7899  			break
  7900  		}
  7901  		if v_0_0.AuxInt != 0 {
  7902  			break
  7903  		}
  7904  		v.reset(OpMIPSMOVWconst)
  7905  		v.AuxInt = 0
  7906  		return true
  7907  	}
  7908  	// match: (Select0 (MULTU _ (MOVWconst [0])))
  7909  	// cond:
  7910  	// result: (MOVWconst [0])
  7911  	for {
  7912  		v_0 := v.Args[0]
  7913  		if v_0.Op != OpMIPSMULTU {
  7914  			break
  7915  		}
  7916  		v_0_1 := v_0.Args[1]
  7917  		if v_0_1.Op != OpMIPSMOVWconst {
  7918  			break
  7919  		}
  7920  		if v_0_1.AuxInt != 0 {
  7921  			break
  7922  		}
  7923  		v.reset(OpMIPSMOVWconst)
  7924  		v.AuxInt = 0
  7925  		return true
  7926  	}
  7927  	// match: (Select0 (MULTU (MOVWconst [1]) _))
  7928  	// cond:
  7929  	// result: (MOVWconst [0])
  7930  	for {
  7931  		v_0 := v.Args[0]
  7932  		if v_0.Op != OpMIPSMULTU {
  7933  			break
  7934  		}
  7935  		v_0_0 := v_0.Args[0]
  7936  		if v_0_0.Op != OpMIPSMOVWconst {
  7937  			break
  7938  		}
  7939  		if v_0_0.AuxInt != 1 {
  7940  			break
  7941  		}
  7942  		v.reset(OpMIPSMOVWconst)
  7943  		v.AuxInt = 0
  7944  		return true
  7945  	}
  7946  	// match: (Select0 (MULTU _ (MOVWconst [1])))
  7947  	// cond:
  7948  	// result: (MOVWconst [0])
  7949  	for {
  7950  		v_0 := v.Args[0]
  7951  		if v_0.Op != OpMIPSMULTU {
  7952  			break
  7953  		}
  7954  		v_0_1 := v_0.Args[1]
  7955  		if v_0_1.Op != OpMIPSMOVWconst {
  7956  			break
  7957  		}
  7958  		if v_0_1.AuxInt != 1 {
  7959  			break
  7960  		}
  7961  		v.reset(OpMIPSMOVWconst)
  7962  		v.AuxInt = 0
  7963  		return true
  7964  	}
  7965  	// match: (Select0 (MULTU (MOVWconst [-1]) x))
  7966  	// cond:
  7967  	// result: (CMOVZ (ADDconst <x.Type> [-1] x) (MOVWconst [0]) x)
  7968  	for {
  7969  		v_0 := v.Args[0]
  7970  		if v_0.Op != OpMIPSMULTU {
  7971  			break
  7972  		}
  7973  		v_0_0 := v_0.Args[0]
  7974  		if v_0_0.Op != OpMIPSMOVWconst {
  7975  			break
  7976  		}
  7977  		if v_0_0.AuxInt != -1 {
  7978  			break
  7979  		}
  7980  		x := v_0.Args[1]
  7981  		v.reset(OpMIPSCMOVZ)
  7982  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
  7983  		v0.AuxInt = -1
  7984  		v0.AddArg(x)
  7985  		v.AddArg(v0)
  7986  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  7987  		v1.AuxInt = 0
  7988  		v.AddArg(v1)
  7989  		v.AddArg(x)
  7990  		return true
  7991  	}
  7992  	// match: (Select0 (MULTU x (MOVWconst [-1])))
  7993  	// cond:
  7994  	// result: (CMOVZ (ADDconst <x.Type> [-1] x) (MOVWconst [0]) x)
  7995  	for {
  7996  		v_0 := v.Args[0]
  7997  		if v_0.Op != OpMIPSMULTU {
  7998  			break
  7999  		}
  8000  		x := v_0.Args[0]
  8001  		v_0_1 := v_0.Args[1]
  8002  		if v_0_1.Op != OpMIPSMOVWconst {
  8003  			break
  8004  		}
  8005  		if v_0_1.AuxInt != -1 {
  8006  			break
  8007  		}
  8008  		v.reset(OpMIPSCMOVZ)
  8009  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
  8010  		v0.AuxInt = -1
  8011  		v0.AddArg(x)
  8012  		v.AddArg(v0)
  8013  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8014  		v1.AuxInt = 0
  8015  		v.AddArg(v1)
  8016  		v.AddArg(x)
  8017  		return true
  8018  	}
  8019  	// match: (Select0 (MULTU (MOVWconst [c]) x))
  8020  	// cond: isPowerOfTwo(int64(uint32(c)))
  8021  	// result: (SRLconst [32-log2(int64(uint32(c)))] x)
  8022  	for {
  8023  		v_0 := v.Args[0]
  8024  		if v_0.Op != OpMIPSMULTU {
  8025  			break
  8026  		}
  8027  		v_0_0 := v_0.Args[0]
  8028  		if v_0_0.Op != OpMIPSMOVWconst {
  8029  			break
  8030  		}
  8031  		c := v_0_0.AuxInt
  8032  		x := v_0.Args[1]
  8033  		if !(isPowerOfTwo(int64(uint32(c)))) {
  8034  			break
  8035  		}
  8036  		v.reset(OpMIPSSRLconst)
  8037  		v.AuxInt = 32 - log2(int64(uint32(c)))
  8038  		v.AddArg(x)
  8039  		return true
  8040  	}
  8041  	// match: (Select0 (MULTU x (MOVWconst [c])))
  8042  	// cond: isPowerOfTwo(int64(uint32(c)))
  8043  	// result: (SRLconst [32-log2(int64(uint32(c)))] x)
  8044  	for {
  8045  		v_0 := v.Args[0]
  8046  		if v_0.Op != OpMIPSMULTU {
  8047  			break
  8048  		}
  8049  		x := v_0.Args[0]
  8050  		v_0_1 := v_0.Args[1]
  8051  		if v_0_1.Op != OpMIPSMOVWconst {
  8052  			break
  8053  		}
  8054  		c := v_0_1.AuxInt
  8055  		if !(isPowerOfTwo(int64(uint32(c)))) {
  8056  			break
  8057  		}
  8058  		v.reset(OpMIPSSRLconst)
  8059  		v.AuxInt = 32 - log2(int64(uint32(c)))
  8060  		v.AddArg(x)
  8061  		return true
  8062  	}
  8063  	// match: (Select0 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  8064  	// cond:
  8065  	// result: (MOVWconst [(c*d)>>32])
  8066  	for {
  8067  		v_0 := v.Args[0]
  8068  		if v_0.Op != OpMIPSMULTU {
  8069  			break
  8070  		}
  8071  		v_0_0 := v_0.Args[0]
  8072  		if v_0_0.Op != OpMIPSMOVWconst {
  8073  			break
  8074  		}
  8075  		c := v_0_0.AuxInt
  8076  		v_0_1 := v_0.Args[1]
  8077  		if v_0_1.Op != OpMIPSMOVWconst {
  8078  			break
  8079  		}
  8080  		d := v_0_1.AuxInt
  8081  		v.reset(OpMIPSMOVWconst)
  8082  		v.AuxInt = (c * d) >> 32
  8083  		return true
  8084  	}
  8085  	// match: (Select0 (MULTU (MOVWconst [d]) (MOVWconst [c])))
  8086  	// cond:
  8087  	// result: (MOVWconst [(c*d)>>32])
  8088  	for {
  8089  		v_0 := v.Args[0]
  8090  		if v_0.Op != OpMIPSMULTU {
  8091  			break
  8092  		}
  8093  		v_0_0 := v_0.Args[0]
  8094  		if v_0_0.Op != OpMIPSMOVWconst {
  8095  			break
  8096  		}
  8097  		d := v_0_0.AuxInt
  8098  		v_0_1 := v_0.Args[1]
  8099  		if v_0_1.Op != OpMIPSMOVWconst {
  8100  			break
  8101  		}
  8102  		c := v_0_1.AuxInt
  8103  		v.reset(OpMIPSMOVWconst)
  8104  		v.AuxInt = (c * d) >> 32
  8105  		return true
  8106  	}
  8107  	// match: (Select0 (DIV (MOVWconst [c]) (MOVWconst [d])))
  8108  	// cond:
  8109  	// result: (MOVWconst [int64(int32(c)%int32(d))])
  8110  	for {
  8111  		v_0 := v.Args[0]
  8112  		if v_0.Op != OpMIPSDIV {
  8113  			break
  8114  		}
  8115  		v_0_0 := v_0.Args[0]
  8116  		if v_0_0.Op != OpMIPSMOVWconst {
  8117  			break
  8118  		}
  8119  		c := v_0_0.AuxInt
  8120  		v_0_1 := v_0.Args[1]
  8121  		if v_0_1.Op != OpMIPSMOVWconst {
  8122  			break
  8123  		}
  8124  		d := v_0_1.AuxInt
  8125  		v.reset(OpMIPSMOVWconst)
  8126  		v.AuxInt = int64(int32(c) % int32(d))
  8127  		return true
  8128  	}
  8129  	// match: (Select0 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  8130  	// cond:
  8131  	// result: (MOVWconst [int64(int32(uint32(c)%uint32(d)))])
  8132  	for {
  8133  		v_0 := v.Args[0]
  8134  		if v_0.Op != OpMIPSDIVU {
  8135  			break
  8136  		}
  8137  		v_0_0 := v_0.Args[0]
  8138  		if v_0_0.Op != OpMIPSMOVWconst {
  8139  			break
  8140  		}
  8141  		c := v_0_0.AuxInt
  8142  		v_0_1 := v_0.Args[1]
  8143  		if v_0_1.Op != OpMIPSMOVWconst {
  8144  			break
  8145  		}
  8146  		d := v_0_1.AuxInt
  8147  		v.reset(OpMIPSMOVWconst)
  8148  		v.AuxInt = int64(int32(uint32(c) % uint32(d)))
  8149  		return true
  8150  	}
  8151  	return false
  8152  }
  8153  func rewriteValueMIPS_OpSelect1(v *Value) bool {
  8154  	b := v.Block
  8155  	_ = b
  8156  	types := &b.Func.Config.Types
  8157  	_ = types
  8158  	// match: (Select1 (Add32carry <t> x y))
  8159  	// cond:
  8160  	// result: (SGTU <types.Bool> x (ADD <t.FieldType(0)> x y))
  8161  	for {
  8162  		v_0 := v.Args[0]
  8163  		if v_0.Op != OpAdd32carry {
  8164  			break
  8165  		}
  8166  		t := v_0.Type
  8167  		x := v_0.Args[0]
  8168  		y := v_0.Args[1]
  8169  		v.reset(OpMIPSSGTU)
  8170  		v.Type = types.Bool
  8171  		v.AddArg(x)
  8172  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  8173  		v0.AddArg(x)
  8174  		v0.AddArg(y)
  8175  		v.AddArg(v0)
  8176  		return true
  8177  	}
  8178  	// match: (Select1 (Sub32carry <t> x y))
  8179  	// cond:
  8180  	// result: (SGTU <types.Bool> (SUB <t.FieldType(0)> x y) x)
  8181  	for {
  8182  		v_0 := v.Args[0]
  8183  		if v_0.Op != OpSub32carry {
  8184  			break
  8185  		}
  8186  		t := v_0.Type
  8187  		x := v_0.Args[0]
  8188  		y := v_0.Args[1]
  8189  		v.reset(OpMIPSSGTU)
  8190  		v.Type = types.Bool
  8191  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t.FieldType(0))
  8192  		v0.AddArg(x)
  8193  		v0.AddArg(y)
  8194  		v.AddArg(v0)
  8195  		v.AddArg(x)
  8196  		return true
  8197  	}
  8198  	// match: (Select1 (MULTU (MOVWconst [0]) _))
  8199  	// cond:
  8200  	// result: (MOVWconst [0])
  8201  	for {
  8202  		v_0 := v.Args[0]
  8203  		if v_0.Op != OpMIPSMULTU {
  8204  			break
  8205  		}
  8206  		v_0_0 := v_0.Args[0]
  8207  		if v_0_0.Op != OpMIPSMOVWconst {
  8208  			break
  8209  		}
  8210  		if v_0_0.AuxInt != 0 {
  8211  			break
  8212  		}
  8213  		v.reset(OpMIPSMOVWconst)
  8214  		v.AuxInt = 0
  8215  		return true
  8216  	}
  8217  	// match: (Select1 (MULTU _ (MOVWconst [0])))
  8218  	// cond:
  8219  	// result: (MOVWconst [0])
  8220  	for {
  8221  		v_0 := v.Args[0]
  8222  		if v_0.Op != OpMIPSMULTU {
  8223  			break
  8224  		}
  8225  		v_0_1 := v_0.Args[1]
  8226  		if v_0_1.Op != OpMIPSMOVWconst {
  8227  			break
  8228  		}
  8229  		if v_0_1.AuxInt != 0 {
  8230  			break
  8231  		}
  8232  		v.reset(OpMIPSMOVWconst)
  8233  		v.AuxInt = 0
  8234  		return true
  8235  	}
  8236  	// match: (Select1 (MULTU (MOVWconst [1]) x))
  8237  	// cond:
  8238  	// result: x
  8239  	for {
  8240  		v_0 := v.Args[0]
  8241  		if v_0.Op != OpMIPSMULTU {
  8242  			break
  8243  		}
  8244  		v_0_0 := v_0.Args[0]
  8245  		if v_0_0.Op != OpMIPSMOVWconst {
  8246  			break
  8247  		}
  8248  		if v_0_0.AuxInt != 1 {
  8249  			break
  8250  		}
  8251  		x := v_0.Args[1]
  8252  		v.reset(OpCopy)
  8253  		v.Type = x.Type
  8254  		v.AddArg(x)
  8255  		return true
  8256  	}
  8257  	// match: (Select1 (MULTU x (MOVWconst [1])))
  8258  	// cond:
  8259  	// result: x
  8260  	for {
  8261  		v_0 := v.Args[0]
  8262  		if v_0.Op != OpMIPSMULTU {
  8263  			break
  8264  		}
  8265  		x := v_0.Args[0]
  8266  		v_0_1 := v_0.Args[1]
  8267  		if v_0_1.Op != OpMIPSMOVWconst {
  8268  			break
  8269  		}
  8270  		if v_0_1.AuxInt != 1 {
  8271  			break
  8272  		}
  8273  		v.reset(OpCopy)
  8274  		v.Type = x.Type
  8275  		v.AddArg(x)
  8276  		return true
  8277  	}
  8278  	// match: (Select1 (MULTU (MOVWconst [-1]) x))
  8279  	// cond:
  8280  	// result: (NEG <x.Type> x)
  8281  	for {
  8282  		v_0 := v.Args[0]
  8283  		if v_0.Op != OpMIPSMULTU {
  8284  			break
  8285  		}
  8286  		v_0_0 := v_0.Args[0]
  8287  		if v_0_0.Op != OpMIPSMOVWconst {
  8288  			break
  8289  		}
  8290  		if v_0_0.AuxInt != -1 {
  8291  			break
  8292  		}
  8293  		x := v_0.Args[1]
  8294  		v.reset(OpMIPSNEG)
  8295  		v.Type = x.Type
  8296  		v.AddArg(x)
  8297  		return true
  8298  	}
  8299  	// match: (Select1 (MULTU x (MOVWconst [-1])))
  8300  	// cond:
  8301  	// result: (NEG <x.Type> x)
  8302  	for {
  8303  		v_0 := v.Args[0]
  8304  		if v_0.Op != OpMIPSMULTU {
  8305  			break
  8306  		}
  8307  		x := v_0.Args[0]
  8308  		v_0_1 := v_0.Args[1]
  8309  		if v_0_1.Op != OpMIPSMOVWconst {
  8310  			break
  8311  		}
  8312  		if v_0_1.AuxInt != -1 {
  8313  			break
  8314  		}
  8315  		v.reset(OpMIPSNEG)
  8316  		v.Type = x.Type
  8317  		v.AddArg(x)
  8318  		return true
  8319  	}
  8320  	// match: (Select1 (MULTU (MOVWconst [c]) x))
  8321  	// cond: isPowerOfTwo(int64(uint32(c)))
  8322  	// result: (SLLconst [log2(int64(uint32(c)))] x)
  8323  	for {
  8324  		v_0 := v.Args[0]
  8325  		if v_0.Op != OpMIPSMULTU {
  8326  			break
  8327  		}
  8328  		v_0_0 := v_0.Args[0]
  8329  		if v_0_0.Op != OpMIPSMOVWconst {
  8330  			break
  8331  		}
  8332  		c := v_0_0.AuxInt
  8333  		x := v_0.Args[1]
  8334  		if !(isPowerOfTwo(int64(uint32(c)))) {
  8335  			break
  8336  		}
  8337  		v.reset(OpMIPSSLLconst)
  8338  		v.AuxInt = log2(int64(uint32(c)))
  8339  		v.AddArg(x)
  8340  		return true
  8341  	}
  8342  	// match: (Select1 (MULTU x (MOVWconst [c])))
  8343  	// cond: isPowerOfTwo(int64(uint32(c)))
  8344  	// result: (SLLconst [log2(int64(uint32(c)))] x)
  8345  	for {
  8346  		v_0 := v.Args[0]
  8347  		if v_0.Op != OpMIPSMULTU {
  8348  			break
  8349  		}
  8350  		x := v_0.Args[0]
  8351  		v_0_1 := v_0.Args[1]
  8352  		if v_0_1.Op != OpMIPSMOVWconst {
  8353  			break
  8354  		}
  8355  		c := v_0_1.AuxInt
  8356  		if !(isPowerOfTwo(int64(uint32(c)))) {
  8357  			break
  8358  		}
  8359  		v.reset(OpMIPSSLLconst)
  8360  		v.AuxInt = log2(int64(uint32(c)))
  8361  		v.AddArg(x)
  8362  		return true
  8363  	}
  8364  	// match: (Select1 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  8365  	// cond:
  8366  	// result: (MOVWconst [int64(int32(uint32(c)*uint32(d)))])
  8367  	for {
  8368  		v_0 := v.Args[0]
  8369  		if v_0.Op != OpMIPSMULTU {
  8370  			break
  8371  		}
  8372  		v_0_0 := v_0.Args[0]
  8373  		if v_0_0.Op != OpMIPSMOVWconst {
  8374  			break
  8375  		}
  8376  		c := v_0_0.AuxInt
  8377  		v_0_1 := v_0.Args[1]
  8378  		if v_0_1.Op != OpMIPSMOVWconst {
  8379  			break
  8380  		}
  8381  		d := v_0_1.AuxInt
  8382  		v.reset(OpMIPSMOVWconst)
  8383  		v.AuxInt = int64(int32(uint32(c) * uint32(d)))
  8384  		return true
  8385  	}
  8386  	// match: (Select1 (MULTU (MOVWconst [d]) (MOVWconst [c])))
  8387  	// cond:
  8388  	// result: (MOVWconst [int64(int32(uint32(c)*uint32(d)))])
  8389  	for {
  8390  		v_0 := v.Args[0]
  8391  		if v_0.Op != OpMIPSMULTU {
  8392  			break
  8393  		}
  8394  		v_0_0 := v_0.Args[0]
  8395  		if v_0_0.Op != OpMIPSMOVWconst {
  8396  			break
  8397  		}
  8398  		d := v_0_0.AuxInt
  8399  		v_0_1 := v_0.Args[1]
  8400  		if v_0_1.Op != OpMIPSMOVWconst {
  8401  			break
  8402  		}
  8403  		c := v_0_1.AuxInt
  8404  		v.reset(OpMIPSMOVWconst)
  8405  		v.AuxInt = int64(int32(uint32(c) * uint32(d)))
  8406  		return true
  8407  	}
  8408  	// match: (Select1 (DIV (MOVWconst [c]) (MOVWconst [d])))
  8409  	// cond:
  8410  	// result: (MOVWconst [int64(int32(c)/int32(d))])
  8411  	for {
  8412  		v_0 := v.Args[0]
  8413  		if v_0.Op != OpMIPSDIV {
  8414  			break
  8415  		}
  8416  		v_0_0 := v_0.Args[0]
  8417  		if v_0_0.Op != OpMIPSMOVWconst {
  8418  			break
  8419  		}
  8420  		c := v_0_0.AuxInt
  8421  		v_0_1 := v_0.Args[1]
  8422  		if v_0_1.Op != OpMIPSMOVWconst {
  8423  			break
  8424  		}
  8425  		d := v_0_1.AuxInt
  8426  		v.reset(OpMIPSMOVWconst)
  8427  		v.AuxInt = int64(int32(c) / int32(d))
  8428  		return true
  8429  	}
  8430  	// match: (Select1 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  8431  	// cond:
  8432  	// result: (MOVWconst [int64(int32(uint32(c)/uint32(d)))])
  8433  	for {
  8434  		v_0 := v.Args[0]
  8435  		if v_0.Op != OpMIPSDIVU {
  8436  			break
  8437  		}
  8438  		v_0_0 := v_0.Args[0]
  8439  		if v_0_0.Op != OpMIPSMOVWconst {
  8440  			break
  8441  		}
  8442  		c := v_0_0.AuxInt
  8443  		v_0_1 := v_0.Args[1]
  8444  		if v_0_1.Op != OpMIPSMOVWconst {
  8445  			break
  8446  		}
  8447  		d := v_0_1.AuxInt
  8448  		v.reset(OpMIPSMOVWconst)
  8449  		v.AuxInt = int64(int32(uint32(c) / uint32(d)))
  8450  		return true
  8451  	}
  8452  	return false
  8453  }
  8454  func rewriteValueMIPS_OpSignExt16to32(v *Value) bool {
  8455  	// match: (SignExt16to32 x)
  8456  	// cond:
  8457  	// result: (MOVHreg x)
  8458  	for {
  8459  		x := v.Args[0]
  8460  		v.reset(OpMIPSMOVHreg)
  8461  		v.AddArg(x)
  8462  		return true
  8463  	}
  8464  }
  8465  func rewriteValueMIPS_OpSignExt8to16(v *Value) bool {
  8466  	// match: (SignExt8to16 x)
  8467  	// cond:
  8468  	// result: (MOVBreg x)
  8469  	for {
  8470  		x := v.Args[0]
  8471  		v.reset(OpMIPSMOVBreg)
  8472  		v.AddArg(x)
  8473  		return true
  8474  	}
  8475  }
  8476  func rewriteValueMIPS_OpSignExt8to32(v *Value) bool {
  8477  	// match: (SignExt8to32 x)
  8478  	// cond:
  8479  	// result: (MOVBreg x)
  8480  	for {
  8481  		x := v.Args[0]
  8482  		v.reset(OpMIPSMOVBreg)
  8483  		v.AddArg(x)
  8484  		return true
  8485  	}
  8486  }
  8487  func rewriteValueMIPS_OpSignmask(v *Value) bool {
  8488  	// match: (Signmask x)
  8489  	// cond:
  8490  	// result: (SRAconst x [31])
  8491  	for {
  8492  		x := v.Args[0]
  8493  		v.reset(OpMIPSSRAconst)
  8494  		v.AuxInt = 31
  8495  		v.AddArg(x)
  8496  		return true
  8497  	}
  8498  }
  8499  func rewriteValueMIPS_OpSlicemask(v *Value) bool {
  8500  	b := v.Block
  8501  	_ = b
  8502  	// match: (Slicemask <t> x)
  8503  	// cond:
  8504  	// result: (SRAconst (NEG <t> x) [31])
  8505  	for {
  8506  		t := v.Type
  8507  		x := v.Args[0]
  8508  		v.reset(OpMIPSSRAconst)
  8509  		v.AuxInt = 31
  8510  		v0 := b.NewValue0(v.Pos, OpMIPSNEG, t)
  8511  		v0.AddArg(x)
  8512  		v.AddArg(v0)
  8513  		return true
  8514  	}
  8515  }
  8516  func rewriteValueMIPS_OpSqrt(v *Value) bool {
  8517  	// match: (Sqrt x)
  8518  	// cond:
  8519  	// result: (SQRTD x)
  8520  	for {
  8521  		x := v.Args[0]
  8522  		v.reset(OpMIPSSQRTD)
  8523  		v.AddArg(x)
  8524  		return true
  8525  	}
  8526  }
  8527  func rewriteValueMIPS_OpStaticCall(v *Value) bool {
  8528  	// match: (StaticCall [argwid] {target} mem)
  8529  	// cond:
  8530  	// result: (CALLstatic [argwid] {target} mem)
  8531  	for {
  8532  		argwid := v.AuxInt
  8533  		target := v.Aux
  8534  		mem := v.Args[0]
  8535  		v.reset(OpMIPSCALLstatic)
  8536  		v.AuxInt = argwid
  8537  		v.Aux = target
  8538  		v.AddArg(mem)
  8539  		return true
  8540  	}
  8541  }
  8542  func rewriteValueMIPS_OpStore(v *Value) bool {
  8543  	// match: (Store {t} ptr val mem)
  8544  	// cond: t.(Type).Size() == 1
  8545  	// result: (MOVBstore ptr val mem)
  8546  	for {
  8547  		t := v.Aux
  8548  		ptr := v.Args[0]
  8549  		val := v.Args[1]
  8550  		mem := v.Args[2]
  8551  		if !(t.(Type).Size() == 1) {
  8552  			break
  8553  		}
  8554  		v.reset(OpMIPSMOVBstore)
  8555  		v.AddArg(ptr)
  8556  		v.AddArg(val)
  8557  		v.AddArg(mem)
  8558  		return true
  8559  	}
  8560  	// match: (Store {t} ptr val mem)
  8561  	// cond: t.(Type).Size() == 2
  8562  	// result: (MOVHstore ptr val mem)
  8563  	for {
  8564  		t := v.Aux
  8565  		ptr := v.Args[0]
  8566  		val := v.Args[1]
  8567  		mem := v.Args[2]
  8568  		if !(t.(Type).Size() == 2) {
  8569  			break
  8570  		}
  8571  		v.reset(OpMIPSMOVHstore)
  8572  		v.AddArg(ptr)
  8573  		v.AddArg(val)
  8574  		v.AddArg(mem)
  8575  		return true
  8576  	}
  8577  	// match: (Store {t} ptr val mem)
  8578  	// cond: t.(Type).Size() == 4 && !is32BitFloat(val.Type)
  8579  	// result: (MOVWstore ptr val mem)
  8580  	for {
  8581  		t := v.Aux
  8582  		ptr := v.Args[0]
  8583  		val := v.Args[1]
  8584  		mem := v.Args[2]
  8585  		if !(t.(Type).Size() == 4 && !is32BitFloat(val.Type)) {
  8586  			break
  8587  		}
  8588  		v.reset(OpMIPSMOVWstore)
  8589  		v.AddArg(ptr)
  8590  		v.AddArg(val)
  8591  		v.AddArg(mem)
  8592  		return true
  8593  	}
  8594  	// match: (Store {t} ptr val mem)
  8595  	// cond: t.(Type).Size() == 4 && is32BitFloat(val.Type)
  8596  	// result: (MOVFstore ptr val mem)
  8597  	for {
  8598  		t := v.Aux
  8599  		ptr := v.Args[0]
  8600  		val := v.Args[1]
  8601  		mem := v.Args[2]
  8602  		if !(t.(Type).Size() == 4 && is32BitFloat(val.Type)) {
  8603  			break
  8604  		}
  8605  		v.reset(OpMIPSMOVFstore)
  8606  		v.AddArg(ptr)
  8607  		v.AddArg(val)
  8608  		v.AddArg(mem)
  8609  		return true
  8610  	}
  8611  	// match: (Store {t} ptr val mem)
  8612  	// cond: t.(Type).Size() == 8 && is64BitFloat(val.Type)
  8613  	// result: (MOVDstore ptr val mem)
  8614  	for {
  8615  		t := v.Aux
  8616  		ptr := v.Args[0]
  8617  		val := v.Args[1]
  8618  		mem := v.Args[2]
  8619  		if !(t.(Type).Size() == 8 && is64BitFloat(val.Type)) {
  8620  			break
  8621  		}
  8622  		v.reset(OpMIPSMOVDstore)
  8623  		v.AddArg(ptr)
  8624  		v.AddArg(val)
  8625  		v.AddArg(mem)
  8626  		return true
  8627  	}
  8628  	return false
  8629  }
  8630  func rewriteValueMIPS_OpSub16(v *Value) bool {
  8631  	// match: (Sub16 x y)
  8632  	// cond:
  8633  	// result: (SUB x y)
  8634  	for {
  8635  		x := v.Args[0]
  8636  		y := v.Args[1]
  8637  		v.reset(OpMIPSSUB)
  8638  		v.AddArg(x)
  8639  		v.AddArg(y)
  8640  		return true
  8641  	}
  8642  }
  8643  func rewriteValueMIPS_OpSub32(v *Value) bool {
  8644  	// match: (Sub32 x y)
  8645  	// cond:
  8646  	// result: (SUB x y)
  8647  	for {
  8648  		x := v.Args[0]
  8649  		y := v.Args[1]
  8650  		v.reset(OpMIPSSUB)
  8651  		v.AddArg(x)
  8652  		v.AddArg(y)
  8653  		return true
  8654  	}
  8655  }
  8656  func rewriteValueMIPS_OpSub32F(v *Value) bool {
  8657  	// match: (Sub32F x y)
  8658  	// cond:
  8659  	// result: (SUBF x y)
  8660  	for {
  8661  		x := v.Args[0]
  8662  		y := v.Args[1]
  8663  		v.reset(OpMIPSSUBF)
  8664  		v.AddArg(x)
  8665  		v.AddArg(y)
  8666  		return true
  8667  	}
  8668  }
  8669  func rewriteValueMIPS_OpSub32withcarry(v *Value) bool {
  8670  	b := v.Block
  8671  	_ = b
  8672  	// match: (Sub32withcarry <t> x y c)
  8673  	// cond:
  8674  	// result: (SUB (SUB <t> x y) c)
  8675  	for {
  8676  		t := v.Type
  8677  		x := v.Args[0]
  8678  		y := v.Args[1]
  8679  		c := v.Args[2]
  8680  		v.reset(OpMIPSSUB)
  8681  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t)
  8682  		v0.AddArg(x)
  8683  		v0.AddArg(y)
  8684  		v.AddArg(v0)
  8685  		v.AddArg(c)
  8686  		return true
  8687  	}
  8688  }
  8689  func rewriteValueMIPS_OpSub64F(v *Value) bool {
  8690  	// match: (Sub64F x y)
  8691  	// cond:
  8692  	// result: (SUBD x y)
  8693  	for {
  8694  		x := v.Args[0]
  8695  		y := v.Args[1]
  8696  		v.reset(OpMIPSSUBD)
  8697  		v.AddArg(x)
  8698  		v.AddArg(y)
  8699  		return true
  8700  	}
  8701  }
  8702  func rewriteValueMIPS_OpSub8(v *Value) bool {
  8703  	// match: (Sub8 x y)
  8704  	// cond:
  8705  	// result: (SUB x y)
  8706  	for {
  8707  		x := v.Args[0]
  8708  		y := v.Args[1]
  8709  		v.reset(OpMIPSSUB)
  8710  		v.AddArg(x)
  8711  		v.AddArg(y)
  8712  		return true
  8713  	}
  8714  }
  8715  func rewriteValueMIPS_OpSubPtr(v *Value) bool {
  8716  	// match: (SubPtr x y)
  8717  	// cond:
  8718  	// result: (SUB x y)
  8719  	for {
  8720  		x := v.Args[0]
  8721  		y := v.Args[1]
  8722  		v.reset(OpMIPSSUB)
  8723  		v.AddArg(x)
  8724  		v.AddArg(y)
  8725  		return true
  8726  	}
  8727  }
  8728  func rewriteValueMIPS_OpTrunc16to8(v *Value) bool {
  8729  	// match: (Trunc16to8 x)
  8730  	// cond:
  8731  	// result: x
  8732  	for {
  8733  		x := v.Args[0]
  8734  		v.reset(OpCopy)
  8735  		v.Type = x.Type
  8736  		v.AddArg(x)
  8737  		return true
  8738  	}
  8739  }
  8740  func rewriteValueMIPS_OpTrunc32to16(v *Value) bool {
  8741  	// match: (Trunc32to16 x)
  8742  	// cond:
  8743  	// result: x
  8744  	for {
  8745  		x := v.Args[0]
  8746  		v.reset(OpCopy)
  8747  		v.Type = x.Type
  8748  		v.AddArg(x)
  8749  		return true
  8750  	}
  8751  }
  8752  func rewriteValueMIPS_OpTrunc32to8(v *Value) bool {
  8753  	// match: (Trunc32to8 x)
  8754  	// cond:
  8755  	// result: x
  8756  	for {
  8757  		x := v.Args[0]
  8758  		v.reset(OpCopy)
  8759  		v.Type = x.Type
  8760  		v.AddArg(x)
  8761  		return true
  8762  	}
  8763  }
  8764  func rewriteValueMIPS_OpXor16(v *Value) bool {
  8765  	// match: (Xor16 x y)
  8766  	// cond:
  8767  	// result: (XOR x y)
  8768  	for {
  8769  		x := v.Args[0]
  8770  		y := v.Args[1]
  8771  		v.reset(OpMIPSXOR)
  8772  		v.AddArg(x)
  8773  		v.AddArg(y)
  8774  		return true
  8775  	}
  8776  }
  8777  func rewriteValueMIPS_OpXor32(v *Value) bool {
  8778  	// match: (Xor32 x y)
  8779  	// cond:
  8780  	// result: (XOR x y)
  8781  	for {
  8782  		x := v.Args[0]
  8783  		y := v.Args[1]
  8784  		v.reset(OpMIPSXOR)
  8785  		v.AddArg(x)
  8786  		v.AddArg(y)
  8787  		return true
  8788  	}
  8789  }
  8790  func rewriteValueMIPS_OpXor8(v *Value) bool {
  8791  	// match: (Xor8 x y)
  8792  	// cond:
  8793  	// result: (XOR x y)
  8794  	for {
  8795  		x := v.Args[0]
  8796  		y := v.Args[1]
  8797  		v.reset(OpMIPSXOR)
  8798  		v.AddArg(x)
  8799  		v.AddArg(y)
  8800  		return true
  8801  	}
  8802  }
  8803  func rewriteValueMIPS_OpZero(v *Value) bool {
  8804  	b := v.Block
  8805  	_ = b
  8806  	config := b.Func.Config
  8807  	_ = config
  8808  	types := &b.Func.Config.Types
  8809  	_ = types
  8810  	// match: (Zero [0] _ mem)
  8811  	// cond:
  8812  	// result: mem
  8813  	for {
  8814  		if v.AuxInt != 0 {
  8815  			break
  8816  		}
  8817  		mem := v.Args[1]
  8818  		v.reset(OpCopy)
  8819  		v.Type = mem.Type
  8820  		v.AddArg(mem)
  8821  		return true
  8822  	}
  8823  	// match: (Zero [1] ptr mem)
  8824  	// cond:
  8825  	// result: (MOVBstore ptr (MOVWconst [0]) mem)
  8826  	for {
  8827  		if v.AuxInt != 1 {
  8828  			break
  8829  		}
  8830  		ptr := v.Args[0]
  8831  		mem := v.Args[1]
  8832  		v.reset(OpMIPSMOVBstore)
  8833  		v.AddArg(ptr)
  8834  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8835  		v0.AuxInt = 0
  8836  		v.AddArg(v0)
  8837  		v.AddArg(mem)
  8838  		return true
  8839  	}
  8840  	// match: (Zero [2] {t} ptr mem)
  8841  	// cond: t.(Type).Alignment()%2 == 0
  8842  	// result: (MOVHstore ptr (MOVWconst [0]) mem)
  8843  	for {
  8844  		if v.AuxInt != 2 {
  8845  			break
  8846  		}
  8847  		t := v.Aux
  8848  		ptr := v.Args[0]
  8849  		mem := v.Args[1]
  8850  		if !(t.(Type).Alignment()%2 == 0) {
  8851  			break
  8852  		}
  8853  		v.reset(OpMIPSMOVHstore)
  8854  		v.AddArg(ptr)
  8855  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8856  		v0.AuxInt = 0
  8857  		v.AddArg(v0)
  8858  		v.AddArg(mem)
  8859  		return true
  8860  	}
  8861  	// match: (Zero [2] ptr mem)
  8862  	// cond:
  8863  	// result: (MOVBstore [1] ptr (MOVWconst [0]) 		(MOVBstore [0] ptr (MOVWconst [0]) mem))
  8864  	for {
  8865  		if v.AuxInt != 2 {
  8866  			break
  8867  		}
  8868  		ptr := v.Args[0]
  8869  		mem := v.Args[1]
  8870  		v.reset(OpMIPSMOVBstore)
  8871  		v.AuxInt = 1
  8872  		v.AddArg(ptr)
  8873  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8874  		v0.AuxInt = 0
  8875  		v.AddArg(v0)
  8876  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  8877  		v1.AuxInt = 0
  8878  		v1.AddArg(ptr)
  8879  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8880  		v2.AuxInt = 0
  8881  		v1.AddArg(v2)
  8882  		v1.AddArg(mem)
  8883  		v.AddArg(v1)
  8884  		return true
  8885  	}
  8886  	// match: (Zero [4] {t} ptr mem)
  8887  	// cond: t.(Type).Alignment()%4 == 0
  8888  	// result: (MOVWstore ptr (MOVWconst [0]) mem)
  8889  	for {
  8890  		if v.AuxInt != 4 {
  8891  			break
  8892  		}
  8893  		t := v.Aux
  8894  		ptr := v.Args[0]
  8895  		mem := v.Args[1]
  8896  		if !(t.(Type).Alignment()%4 == 0) {
  8897  			break
  8898  		}
  8899  		v.reset(OpMIPSMOVWstore)
  8900  		v.AddArg(ptr)
  8901  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8902  		v0.AuxInt = 0
  8903  		v.AddArg(v0)
  8904  		v.AddArg(mem)
  8905  		return true
  8906  	}
  8907  	// match: (Zero [4] {t} ptr mem)
  8908  	// cond: t.(Type).Alignment()%2 == 0
  8909  	// result: (MOVHstore [2] ptr (MOVWconst [0]) 		(MOVHstore [0] ptr (MOVWconst [0]) mem))
  8910  	for {
  8911  		if v.AuxInt != 4 {
  8912  			break
  8913  		}
  8914  		t := v.Aux
  8915  		ptr := v.Args[0]
  8916  		mem := v.Args[1]
  8917  		if !(t.(Type).Alignment()%2 == 0) {
  8918  			break
  8919  		}
  8920  		v.reset(OpMIPSMOVHstore)
  8921  		v.AuxInt = 2
  8922  		v.AddArg(ptr)
  8923  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8924  		v0.AuxInt = 0
  8925  		v.AddArg(v0)
  8926  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, TypeMem)
  8927  		v1.AuxInt = 0
  8928  		v1.AddArg(ptr)
  8929  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8930  		v2.AuxInt = 0
  8931  		v1.AddArg(v2)
  8932  		v1.AddArg(mem)
  8933  		v.AddArg(v1)
  8934  		return true
  8935  	}
  8936  	// match: (Zero [4] ptr mem)
  8937  	// cond:
  8938  	// result: (MOVBstore [3] ptr (MOVWconst [0]) 		(MOVBstore [2] ptr (MOVWconst [0]) 			(MOVBstore [1] ptr (MOVWconst [0]) 				(MOVBstore [0] ptr (MOVWconst [0]) mem))))
  8939  	for {
  8940  		if v.AuxInt != 4 {
  8941  			break
  8942  		}
  8943  		ptr := v.Args[0]
  8944  		mem := v.Args[1]
  8945  		v.reset(OpMIPSMOVBstore)
  8946  		v.AuxInt = 3
  8947  		v.AddArg(ptr)
  8948  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8949  		v0.AuxInt = 0
  8950  		v.AddArg(v0)
  8951  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  8952  		v1.AuxInt = 2
  8953  		v1.AddArg(ptr)
  8954  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8955  		v2.AuxInt = 0
  8956  		v1.AddArg(v2)
  8957  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  8958  		v3.AuxInt = 1
  8959  		v3.AddArg(ptr)
  8960  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8961  		v4.AuxInt = 0
  8962  		v3.AddArg(v4)
  8963  		v5 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  8964  		v5.AuxInt = 0
  8965  		v5.AddArg(ptr)
  8966  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8967  		v6.AuxInt = 0
  8968  		v5.AddArg(v6)
  8969  		v5.AddArg(mem)
  8970  		v3.AddArg(v5)
  8971  		v1.AddArg(v3)
  8972  		v.AddArg(v1)
  8973  		return true
  8974  	}
  8975  	// match: (Zero [3] ptr mem)
  8976  	// cond:
  8977  	// result: (MOVBstore [2] ptr (MOVWconst [0]) 		(MOVBstore [1] ptr (MOVWconst [0]) 			(MOVBstore [0] ptr (MOVWconst [0]) mem)))
  8978  	for {
  8979  		if v.AuxInt != 3 {
  8980  			break
  8981  		}
  8982  		ptr := v.Args[0]
  8983  		mem := v.Args[1]
  8984  		v.reset(OpMIPSMOVBstore)
  8985  		v.AuxInt = 2
  8986  		v.AddArg(ptr)
  8987  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8988  		v0.AuxInt = 0
  8989  		v.AddArg(v0)
  8990  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  8991  		v1.AuxInt = 1
  8992  		v1.AddArg(ptr)
  8993  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  8994  		v2.AuxInt = 0
  8995  		v1.AddArg(v2)
  8996  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, TypeMem)
  8997  		v3.AuxInt = 0
  8998  		v3.AddArg(ptr)
  8999  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9000  		v4.AuxInt = 0
  9001  		v3.AddArg(v4)
  9002  		v3.AddArg(mem)
  9003  		v1.AddArg(v3)
  9004  		v.AddArg(v1)
  9005  		return true
  9006  	}
  9007  	// match: (Zero [6] {t} ptr mem)
  9008  	// cond: t.(Type).Alignment()%2 == 0
  9009  	// result: (MOVHstore [4] ptr (MOVWconst [0]) 		(MOVHstore [2] ptr (MOVWconst [0]) 			(MOVHstore [0] ptr (MOVWconst [0]) mem)))
  9010  	for {
  9011  		if v.AuxInt != 6 {
  9012  			break
  9013  		}
  9014  		t := v.Aux
  9015  		ptr := v.Args[0]
  9016  		mem := v.Args[1]
  9017  		if !(t.(Type).Alignment()%2 == 0) {
  9018  			break
  9019  		}
  9020  		v.reset(OpMIPSMOVHstore)
  9021  		v.AuxInt = 4
  9022  		v.AddArg(ptr)
  9023  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9024  		v0.AuxInt = 0
  9025  		v.AddArg(v0)
  9026  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, TypeMem)
  9027  		v1.AuxInt = 2
  9028  		v1.AddArg(ptr)
  9029  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9030  		v2.AuxInt = 0
  9031  		v1.AddArg(v2)
  9032  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, TypeMem)
  9033  		v3.AuxInt = 0
  9034  		v3.AddArg(ptr)
  9035  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9036  		v4.AuxInt = 0
  9037  		v3.AddArg(v4)
  9038  		v3.AddArg(mem)
  9039  		v1.AddArg(v3)
  9040  		v.AddArg(v1)
  9041  		return true
  9042  	}
  9043  	// match: (Zero [8] {t} ptr mem)
  9044  	// cond: t.(Type).Alignment()%4 == 0
  9045  	// result: (MOVWstore [4] ptr (MOVWconst [0]) 			(MOVWstore [0] ptr (MOVWconst [0]) mem))
  9046  	for {
  9047  		if v.AuxInt != 8 {
  9048  			break
  9049  		}
  9050  		t := v.Aux
  9051  		ptr := v.Args[0]
  9052  		mem := v.Args[1]
  9053  		if !(t.(Type).Alignment()%4 == 0) {
  9054  			break
  9055  		}
  9056  		v.reset(OpMIPSMOVWstore)
  9057  		v.AuxInt = 4
  9058  		v.AddArg(ptr)
  9059  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9060  		v0.AuxInt = 0
  9061  		v.AddArg(v0)
  9062  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  9063  		v1.AuxInt = 0
  9064  		v1.AddArg(ptr)
  9065  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9066  		v2.AuxInt = 0
  9067  		v1.AddArg(v2)
  9068  		v1.AddArg(mem)
  9069  		v.AddArg(v1)
  9070  		return true
  9071  	}
  9072  	// match: (Zero [12] {t} ptr mem)
  9073  	// cond: t.(Type).Alignment()%4 == 0
  9074  	// result: (MOVWstore [8] ptr (MOVWconst [0]) 		(MOVWstore [4] ptr (MOVWconst [0]) 			(MOVWstore [0] ptr (MOVWconst [0]) mem)))
  9075  	for {
  9076  		if v.AuxInt != 12 {
  9077  			break
  9078  		}
  9079  		t := v.Aux
  9080  		ptr := v.Args[0]
  9081  		mem := v.Args[1]
  9082  		if !(t.(Type).Alignment()%4 == 0) {
  9083  			break
  9084  		}
  9085  		v.reset(OpMIPSMOVWstore)
  9086  		v.AuxInt = 8
  9087  		v.AddArg(ptr)
  9088  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9089  		v0.AuxInt = 0
  9090  		v.AddArg(v0)
  9091  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  9092  		v1.AuxInt = 4
  9093  		v1.AddArg(ptr)
  9094  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9095  		v2.AuxInt = 0
  9096  		v1.AddArg(v2)
  9097  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  9098  		v3.AuxInt = 0
  9099  		v3.AddArg(ptr)
  9100  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9101  		v4.AuxInt = 0
  9102  		v3.AddArg(v4)
  9103  		v3.AddArg(mem)
  9104  		v1.AddArg(v3)
  9105  		v.AddArg(v1)
  9106  		return true
  9107  	}
  9108  	// match: (Zero [16] {t} ptr mem)
  9109  	// cond: t.(Type).Alignment()%4 == 0
  9110  	// result: (MOVWstore [12] ptr (MOVWconst [0]) 		(MOVWstore [8] ptr (MOVWconst [0]) 			(MOVWstore [4] ptr (MOVWconst [0]) 				(MOVWstore [0] ptr (MOVWconst [0]) mem))))
  9111  	for {
  9112  		if v.AuxInt != 16 {
  9113  			break
  9114  		}
  9115  		t := v.Aux
  9116  		ptr := v.Args[0]
  9117  		mem := v.Args[1]
  9118  		if !(t.(Type).Alignment()%4 == 0) {
  9119  			break
  9120  		}
  9121  		v.reset(OpMIPSMOVWstore)
  9122  		v.AuxInt = 12
  9123  		v.AddArg(ptr)
  9124  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9125  		v0.AuxInt = 0
  9126  		v.AddArg(v0)
  9127  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  9128  		v1.AuxInt = 8
  9129  		v1.AddArg(ptr)
  9130  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9131  		v2.AuxInt = 0
  9132  		v1.AddArg(v2)
  9133  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  9134  		v3.AuxInt = 4
  9135  		v3.AddArg(ptr)
  9136  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9137  		v4.AuxInt = 0
  9138  		v3.AddArg(v4)
  9139  		v5 := b.NewValue0(v.Pos, OpMIPSMOVWstore, TypeMem)
  9140  		v5.AuxInt = 0
  9141  		v5.AddArg(ptr)
  9142  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9143  		v6.AuxInt = 0
  9144  		v5.AddArg(v6)
  9145  		v5.AddArg(mem)
  9146  		v3.AddArg(v5)
  9147  		v1.AddArg(v3)
  9148  		v.AddArg(v1)
  9149  		return true
  9150  	}
  9151  	// match: (Zero [s] {t} ptr mem)
  9152  	// cond: (s > 16  || t.(Type).Alignment()%4 != 0)
  9153  	// result: (LoweredZero [t.(Type).Alignment()] 		ptr 		(ADDconst <ptr.Type> ptr [s-moveSize(t.(Type).Alignment(), config)]) 		mem)
  9154  	for {
  9155  		s := v.AuxInt
  9156  		t := v.Aux
  9157  		ptr := v.Args[0]
  9158  		mem := v.Args[1]
  9159  		if !(s > 16 || t.(Type).Alignment()%4 != 0) {
  9160  			break
  9161  		}
  9162  		v.reset(OpMIPSLoweredZero)
  9163  		v.AuxInt = t.(Type).Alignment()
  9164  		v.AddArg(ptr)
  9165  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, ptr.Type)
  9166  		v0.AuxInt = s - moveSize(t.(Type).Alignment(), config)
  9167  		v0.AddArg(ptr)
  9168  		v.AddArg(v0)
  9169  		v.AddArg(mem)
  9170  		return true
  9171  	}
  9172  	return false
  9173  }
  9174  func rewriteValueMIPS_OpZeroExt16to32(v *Value) bool {
  9175  	// match: (ZeroExt16to32 x)
  9176  	// cond:
  9177  	// result: (MOVHUreg x)
  9178  	for {
  9179  		x := v.Args[0]
  9180  		v.reset(OpMIPSMOVHUreg)
  9181  		v.AddArg(x)
  9182  		return true
  9183  	}
  9184  }
  9185  func rewriteValueMIPS_OpZeroExt8to16(v *Value) bool {
  9186  	// match: (ZeroExt8to16 x)
  9187  	// cond:
  9188  	// result: (MOVBUreg x)
  9189  	for {
  9190  		x := v.Args[0]
  9191  		v.reset(OpMIPSMOVBUreg)
  9192  		v.AddArg(x)
  9193  		return true
  9194  	}
  9195  }
  9196  func rewriteValueMIPS_OpZeroExt8to32(v *Value) bool {
  9197  	// match: (ZeroExt8to32 x)
  9198  	// cond:
  9199  	// result: (MOVBUreg x)
  9200  	for {
  9201  		x := v.Args[0]
  9202  		v.reset(OpMIPSMOVBUreg)
  9203  		v.AddArg(x)
  9204  		return true
  9205  	}
  9206  }
  9207  func rewriteValueMIPS_OpZeromask(v *Value) bool {
  9208  	b := v.Block
  9209  	_ = b
  9210  	types := &b.Func.Config.Types
  9211  	_ = types
  9212  	// match: (Zeromask x)
  9213  	// cond:
  9214  	// result: (NEG (SGTU x (MOVWconst [0])))
  9215  	for {
  9216  		x := v.Args[0]
  9217  		v.reset(OpMIPSNEG)
  9218  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, types.Bool)
  9219  		v0.AddArg(x)
  9220  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
  9221  		v1.AuxInt = 0
  9222  		v0.AddArg(v1)
  9223  		v.AddArg(v0)
  9224  		return true
  9225  	}
  9226  }
  9227  func rewriteBlockMIPS(b *Block) bool {
  9228  	config := b.Func.Config
  9229  	_ = config
  9230  	fe := b.Func.fe
  9231  	_ = fe
  9232  	types := &config.Types
  9233  	_ = types
  9234  	switch b.Kind {
  9235  	case BlockMIPSEQ:
  9236  		// match: (EQ (FPFlagTrue cmp) yes no)
  9237  		// cond:
  9238  		// result: (FPF cmp yes no)
  9239  		for {
  9240  			v := b.Control
  9241  			if v.Op != OpMIPSFPFlagTrue {
  9242  				break
  9243  			}
  9244  			cmp := v.Args[0]
  9245  			yes := b.Succs[0]
  9246  			no := b.Succs[1]
  9247  			b.Kind = BlockMIPSFPF
  9248  			b.SetControl(cmp)
  9249  			_ = yes
  9250  			_ = no
  9251  			return true
  9252  		}
  9253  		// match: (EQ (FPFlagFalse cmp) yes no)
  9254  		// cond:
  9255  		// result: (FPT cmp yes no)
  9256  		for {
  9257  			v := b.Control
  9258  			if v.Op != OpMIPSFPFlagFalse {
  9259  				break
  9260  			}
  9261  			cmp := v.Args[0]
  9262  			yes := b.Succs[0]
  9263  			no := b.Succs[1]
  9264  			b.Kind = BlockMIPSFPT
  9265  			b.SetControl(cmp)
  9266  			_ = yes
  9267  			_ = no
  9268  			return true
  9269  		}
  9270  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  9271  		// cond:
  9272  		// result: (NE cmp yes no)
  9273  		for {
  9274  			v := b.Control
  9275  			if v.Op != OpMIPSXORconst {
  9276  				break
  9277  			}
  9278  			if v.AuxInt != 1 {
  9279  				break
  9280  			}
  9281  			cmp := v.Args[0]
  9282  			if cmp.Op != OpMIPSSGT {
  9283  				break
  9284  			}
  9285  			yes := b.Succs[0]
  9286  			no := b.Succs[1]
  9287  			b.Kind = BlockMIPSNE
  9288  			b.SetControl(cmp)
  9289  			_ = yes
  9290  			_ = no
  9291  			return true
  9292  		}
  9293  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  9294  		// cond:
  9295  		// result: (NE cmp yes no)
  9296  		for {
  9297  			v := b.Control
  9298  			if v.Op != OpMIPSXORconst {
  9299  				break
  9300  			}
  9301  			if v.AuxInt != 1 {
  9302  				break
  9303  			}
  9304  			cmp := v.Args[0]
  9305  			if cmp.Op != OpMIPSSGTU {
  9306  				break
  9307  			}
  9308  			yes := b.Succs[0]
  9309  			no := b.Succs[1]
  9310  			b.Kind = BlockMIPSNE
  9311  			b.SetControl(cmp)
  9312  			_ = yes
  9313  			_ = no
  9314  			return true
  9315  		}
  9316  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  9317  		// cond:
  9318  		// result: (NE cmp yes no)
  9319  		for {
  9320  			v := b.Control
  9321  			if v.Op != OpMIPSXORconst {
  9322  				break
  9323  			}
  9324  			if v.AuxInt != 1 {
  9325  				break
  9326  			}
  9327  			cmp := v.Args[0]
  9328  			if cmp.Op != OpMIPSSGTconst {
  9329  				break
  9330  			}
  9331  			yes := b.Succs[0]
  9332  			no := b.Succs[1]
  9333  			b.Kind = BlockMIPSNE
  9334  			b.SetControl(cmp)
  9335  			_ = yes
  9336  			_ = no
  9337  			return true
  9338  		}
  9339  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  9340  		// cond:
  9341  		// result: (NE cmp yes no)
  9342  		for {
  9343  			v := b.Control
  9344  			if v.Op != OpMIPSXORconst {
  9345  				break
  9346  			}
  9347  			if v.AuxInt != 1 {
  9348  				break
  9349  			}
  9350  			cmp := v.Args[0]
  9351  			if cmp.Op != OpMIPSSGTUconst {
  9352  				break
  9353  			}
  9354  			yes := b.Succs[0]
  9355  			no := b.Succs[1]
  9356  			b.Kind = BlockMIPSNE
  9357  			b.SetControl(cmp)
  9358  			_ = yes
  9359  			_ = no
  9360  			return true
  9361  		}
  9362  		// match: (EQ (XORconst [1] cmp:(SGTzero _)) yes no)
  9363  		// cond:
  9364  		// result: (NE cmp yes no)
  9365  		for {
  9366  			v := b.Control
  9367  			if v.Op != OpMIPSXORconst {
  9368  				break
  9369  			}
  9370  			if v.AuxInt != 1 {
  9371  				break
  9372  			}
  9373  			cmp := v.Args[0]
  9374  			if cmp.Op != OpMIPSSGTzero {
  9375  				break
  9376  			}
  9377  			yes := b.Succs[0]
  9378  			no := b.Succs[1]
  9379  			b.Kind = BlockMIPSNE
  9380  			b.SetControl(cmp)
  9381  			_ = yes
  9382  			_ = no
  9383  			return true
  9384  		}
  9385  		// match: (EQ (XORconst [1] cmp:(SGTUzero _)) yes no)
  9386  		// cond:
  9387  		// result: (NE cmp yes no)
  9388  		for {
  9389  			v := b.Control
  9390  			if v.Op != OpMIPSXORconst {
  9391  				break
  9392  			}
  9393  			if v.AuxInt != 1 {
  9394  				break
  9395  			}
  9396  			cmp := v.Args[0]
  9397  			if cmp.Op != OpMIPSSGTUzero {
  9398  				break
  9399  			}
  9400  			yes := b.Succs[0]
  9401  			no := b.Succs[1]
  9402  			b.Kind = BlockMIPSNE
  9403  			b.SetControl(cmp)
  9404  			_ = yes
  9405  			_ = no
  9406  			return true
  9407  		}
  9408  		// match: (EQ (SGTUconst [1] x) yes no)
  9409  		// cond:
  9410  		// result: (NE x yes no)
  9411  		for {
  9412  			v := b.Control
  9413  			if v.Op != OpMIPSSGTUconst {
  9414  				break
  9415  			}
  9416  			if v.AuxInt != 1 {
  9417  				break
  9418  			}
  9419  			x := v.Args[0]
  9420  			yes := b.Succs[0]
  9421  			no := b.Succs[1]
  9422  			b.Kind = BlockMIPSNE
  9423  			b.SetControl(x)
  9424  			_ = yes
  9425  			_ = no
  9426  			return true
  9427  		}
  9428  		// match: (EQ (SGTUzero x) yes no)
  9429  		// cond:
  9430  		// result: (EQ x yes no)
  9431  		for {
  9432  			v := b.Control
  9433  			if v.Op != OpMIPSSGTUzero {
  9434  				break
  9435  			}
  9436  			x := v.Args[0]
  9437  			yes := b.Succs[0]
  9438  			no := b.Succs[1]
  9439  			b.Kind = BlockMIPSEQ
  9440  			b.SetControl(x)
  9441  			_ = yes
  9442  			_ = no
  9443  			return true
  9444  		}
  9445  		// match: (EQ (SGTconst [0] x) yes no)
  9446  		// cond:
  9447  		// result: (GEZ x yes no)
  9448  		for {
  9449  			v := b.Control
  9450  			if v.Op != OpMIPSSGTconst {
  9451  				break
  9452  			}
  9453  			if v.AuxInt != 0 {
  9454  				break
  9455  			}
  9456  			x := v.Args[0]
  9457  			yes := b.Succs[0]
  9458  			no := b.Succs[1]
  9459  			b.Kind = BlockMIPSGEZ
  9460  			b.SetControl(x)
  9461  			_ = yes
  9462  			_ = no
  9463  			return true
  9464  		}
  9465  		// match: (EQ (SGTzero x) yes no)
  9466  		// cond:
  9467  		// result: (LEZ x yes no)
  9468  		for {
  9469  			v := b.Control
  9470  			if v.Op != OpMIPSSGTzero {
  9471  				break
  9472  			}
  9473  			x := v.Args[0]
  9474  			yes := b.Succs[0]
  9475  			no := b.Succs[1]
  9476  			b.Kind = BlockMIPSLEZ
  9477  			b.SetControl(x)
  9478  			_ = yes
  9479  			_ = no
  9480  			return true
  9481  		}
  9482  		// match: (EQ (MOVWconst [0]) yes no)
  9483  		// cond:
  9484  		// result: (First nil yes no)
  9485  		for {
  9486  			v := b.Control
  9487  			if v.Op != OpMIPSMOVWconst {
  9488  				break
  9489  			}
  9490  			if v.AuxInt != 0 {
  9491  				break
  9492  			}
  9493  			yes := b.Succs[0]
  9494  			no := b.Succs[1]
  9495  			b.Kind = BlockFirst
  9496  			b.SetControl(nil)
  9497  			_ = yes
  9498  			_ = no
  9499  			return true
  9500  		}
  9501  		// match: (EQ (MOVWconst [c]) yes no)
  9502  		// cond: c != 0
  9503  		// result: (First nil no yes)
  9504  		for {
  9505  			v := b.Control
  9506  			if v.Op != OpMIPSMOVWconst {
  9507  				break
  9508  			}
  9509  			c := v.AuxInt
  9510  			yes := b.Succs[0]
  9511  			no := b.Succs[1]
  9512  			if !(c != 0) {
  9513  				break
  9514  			}
  9515  			b.Kind = BlockFirst
  9516  			b.SetControl(nil)
  9517  			b.swapSuccessors()
  9518  			_ = no
  9519  			_ = yes
  9520  			return true
  9521  		}
  9522  	case BlockMIPSGEZ:
  9523  		// match: (GEZ (MOVWconst [c]) yes no)
  9524  		// cond: int32(c) >= 0
  9525  		// result: (First nil yes no)
  9526  		for {
  9527  			v := b.Control
  9528  			if v.Op != OpMIPSMOVWconst {
  9529  				break
  9530  			}
  9531  			c := v.AuxInt
  9532  			yes := b.Succs[0]
  9533  			no := b.Succs[1]
  9534  			if !(int32(c) >= 0) {
  9535  				break
  9536  			}
  9537  			b.Kind = BlockFirst
  9538  			b.SetControl(nil)
  9539  			_ = yes
  9540  			_ = no
  9541  			return true
  9542  		}
  9543  		// match: (GEZ (MOVWconst [c]) yes no)
  9544  		// cond: int32(c) <  0
  9545  		// result: (First nil no yes)
  9546  		for {
  9547  			v := b.Control
  9548  			if v.Op != OpMIPSMOVWconst {
  9549  				break
  9550  			}
  9551  			c := v.AuxInt
  9552  			yes := b.Succs[0]
  9553  			no := b.Succs[1]
  9554  			if !(int32(c) < 0) {
  9555  				break
  9556  			}
  9557  			b.Kind = BlockFirst
  9558  			b.SetControl(nil)
  9559  			b.swapSuccessors()
  9560  			_ = no
  9561  			_ = yes
  9562  			return true
  9563  		}
  9564  	case BlockMIPSGTZ:
  9565  		// match: (GTZ (MOVWconst [c]) yes no)
  9566  		// cond: int32(c) >  0
  9567  		// result: (First nil yes no)
  9568  		for {
  9569  			v := b.Control
  9570  			if v.Op != OpMIPSMOVWconst {
  9571  				break
  9572  			}
  9573  			c := v.AuxInt
  9574  			yes := b.Succs[0]
  9575  			no := b.Succs[1]
  9576  			if !(int32(c) > 0) {
  9577  				break
  9578  			}
  9579  			b.Kind = BlockFirst
  9580  			b.SetControl(nil)
  9581  			_ = yes
  9582  			_ = no
  9583  			return true
  9584  		}
  9585  		// match: (GTZ (MOVWconst [c]) yes no)
  9586  		// cond: int32(c) <= 0
  9587  		// result: (First nil no yes)
  9588  		for {
  9589  			v := b.Control
  9590  			if v.Op != OpMIPSMOVWconst {
  9591  				break
  9592  			}
  9593  			c := v.AuxInt
  9594  			yes := b.Succs[0]
  9595  			no := b.Succs[1]
  9596  			if !(int32(c) <= 0) {
  9597  				break
  9598  			}
  9599  			b.Kind = BlockFirst
  9600  			b.SetControl(nil)
  9601  			b.swapSuccessors()
  9602  			_ = no
  9603  			_ = yes
  9604  			return true
  9605  		}
  9606  	case BlockIf:
  9607  		// match: (If cond yes no)
  9608  		// cond:
  9609  		// result: (NE cond yes no)
  9610  		for {
  9611  			v := b.Control
  9612  			_ = v
  9613  			cond := b.Control
  9614  			yes := b.Succs[0]
  9615  			no := b.Succs[1]
  9616  			b.Kind = BlockMIPSNE
  9617  			b.SetControl(cond)
  9618  			_ = yes
  9619  			_ = no
  9620  			return true
  9621  		}
  9622  	case BlockMIPSLEZ:
  9623  		// match: (LEZ (MOVWconst [c]) yes no)
  9624  		// cond: int32(c) <= 0
  9625  		// result: (First nil yes no)
  9626  		for {
  9627  			v := b.Control
  9628  			if v.Op != OpMIPSMOVWconst {
  9629  				break
  9630  			}
  9631  			c := v.AuxInt
  9632  			yes := b.Succs[0]
  9633  			no := b.Succs[1]
  9634  			if !(int32(c) <= 0) {
  9635  				break
  9636  			}
  9637  			b.Kind = BlockFirst
  9638  			b.SetControl(nil)
  9639  			_ = yes
  9640  			_ = no
  9641  			return true
  9642  		}
  9643  		// match: (LEZ (MOVWconst [c]) yes no)
  9644  		// cond: int32(c) >  0
  9645  		// result: (First nil no yes)
  9646  		for {
  9647  			v := b.Control
  9648  			if v.Op != OpMIPSMOVWconst {
  9649  				break
  9650  			}
  9651  			c := v.AuxInt
  9652  			yes := b.Succs[0]
  9653  			no := b.Succs[1]
  9654  			if !(int32(c) > 0) {
  9655  				break
  9656  			}
  9657  			b.Kind = BlockFirst
  9658  			b.SetControl(nil)
  9659  			b.swapSuccessors()
  9660  			_ = no
  9661  			_ = yes
  9662  			return true
  9663  		}
  9664  	case BlockMIPSLTZ:
  9665  		// match: (LTZ (MOVWconst [c]) yes no)
  9666  		// cond: int32(c) <  0
  9667  		// result: (First nil yes no)
  9668  		for {
  9669  			v := b.Control
  9670  			if v.Op != OpMIPSMOVWconst {
  9671  				break
  9672  			}
  9673  			c := v.AuxInt
  9674  			yes := b.Succs[0]
  9675  			no := b.Succs[1]
  9676  			if !(int32(c) < 0) {
  9677  				break
  9678  			}
  9679  			b.Kind = BlockFirst
  9680  			b.SetControl(nil)
  9681  			_ = yes
  9682  			_ = no
  9683  			return true
  9684  		}
  9685  		// match: (LTZ (MOVWconst [c]) yes no)
  9686  		// cond: int32(c) >= 0
  9687  		// result: (First nil no yes)
  9688  		for {
  9689  			v := b.Control
  9690  			if v.Op != OpMIPSMOVWconst {
  9691  				break
  9692  			}
  9693  			c := v.AuxInt
  9694  			yes := b.Succs[0]
  9695  			no := b.Succs[1]
  9696  			if !(int32(c) >= 0) {
  9697  				break
  9698  			}
  9699  			b.Kind = BlockFirst
  9700  			b.SetControl(nil)
  9701  			b.swapSuccessors()
  9702  			_ = no
  9703  			_ = yes
  9704  			return true
  9705  		}
  9706  	case BlockMIPSNE:
  9707  		// match: (NE (FPFlagTrue cmp) yes no)
  9708  		// cond:
  9709  		// result: (FPT cmp yes no)
  9710  		for {
  9711  			v := b.Control
  9712  			if v.Op != OpMIPSFPFlagTrue {
  9713  				break
  9714  			}
  9715  			cmp := v.Args[0]
  9716  			yes := b.Succs[0]
  9717  			no := b.Succs[1]
  9718  			b.Kind = BlockMIPSFPT
  9719  			b.SetControl(cmp)
  9720  			_ = yes
  9721  			_ = no
  9722  			return true
  9723  		}
  9724  		// match: (NE (FPFlagFalse cmp) yes no)
  9725  		// cond:
  9726  		// result: (FPF cmp yes no)
  9727  		for {
  9728  			v := b.Control
  9729  			if v.Op != OpMIPSFPFlagFalse {
  9730  				break
  9731  			}
  9732  			cmp := v.Args[0]
  9733  			yes := b.Succs[0]
  9734  			no := b.Succs[1]
  9735  			b.Kind = BlockMIPSFPF
  9736  			b.SetControl(cmp)
  9737  			_ = yes
  9738  			_ = no
  9739  			return true
  9740  		}
  9741  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  9742  		// cond:
  9743  		// result: (EQ cmp yes no)
  9744  		for {
  9745  			v := b.Control
  9746  			if v.Op != OpMIPSXORconst {
  9747  				break
  9748  			}
  9749  			if v.AuxInt != 1 {
  9750  				break
  9751  			}
  9752  			cmp := v.Args[0]
  9753  			if cmp.Op != OpMIPSSGT {
  9754  				break
  9755  			}
  9756  			yes := b.Succs[0]
  9757  			no := b.Succs[1]
  9758  			b.Kind = BlockMIPSEQ
  9759  			b.SetControl(cmp)
  9760  			_ = yes
  9761  			_ = no
  9762  			return true
  9763  		}
  9764  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  9765  		// cond:
  9766  		// result: (EQ cmp yes no)
  9767  		for {
  9768  			v := b.Control
  9769  			if v.Op != OpMIPSXORconst {
  9770  				break
  9771  			}
  9772  			if v.AuxInt != 1 {
  9773  				break
  9774  			}
  9775  			cmp := v.Args[0]
  9776  			if cmp.Op != OpMIPSSGTU {
  9777  				break
  9778  			}
  9779  			yes := b.Succs[0]
  9780  			no := b.Succs[1]
  9781  			b.Kind = BlockMIPSEQ
  9782  			b.SetControl(cmp)
  9783  			_ = yes
  9784  			_ = no
  9785  			return true
  9786  		}
  9787  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  9788  		// cond:
  9789  		// result: (EQ cmp yes no)
  9790  		for {
  9791  			v := b.Control
  9792  			if v.Op != OpMIPSXORconst {
  9793  				break
  9794  			}
  9795  			if v.AuxInt != 1 {
  9796  				break
  9797  			}
  9798  			cmp := v.Args[0]
  9799  			if cmp.Op != OpMIPSSGTconst {
  9800  				break
  9801  			}
  9802  			yes := b.Succs[0]
  9803  			no := b.Succs[1]
  9804  			b.Kind = BlockMIPSEQ
  9805  			b.SetControl(cmp)
  9806  			_ = yes
  9807  			_ = no
  9808  			return true
  9809  		}
  9810  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  9811  		// cond:
  9812  		// result: (EQ cmp yes no)
  9813  		for {
  9814  			v := b.Control
  9815  			if v.Op != OpMIPSXORconst {
  9816  				break
  9817  			}
  9818  			if v.AuxInt != 1 {
  9819  				break
  9820  			}
  9821  			cmp := v.Args[0]
  9822  			if cmp.Op != OpMIPSSGTUconst {
  9823  				break
  9824  			}
  9825  			yes := b.Succs[0]
  9826  			no := b.Succs[1]
  9827  			b.Kind = BlockMIPSEQ
  9828  			b.SetControl(cmp)
  9829  			_ = yes
  9830  			_ = no
  9831  			return true
  9832  		}
  9833  		// match: (NE (XORconst [1] cmp:(SGTzero _)) yes no)
  9834  		// cond:
  9835  		// result: (EQ cmp yes no)
  9836  		for {
  9837  			v := b.Control
  9838  			if v.Op != OpMIPSXORconst {
  9839  				break
  9840  			}
  9841  			if v.AuxInt != 1 {
  9842  				break
  9843  			}
  9844  			cmp := v.Args[0]
  9845  			if cmp.Op != OpMIPSSGTzero {
  9846  				break
  9847  			}
  9848  			yes := b.Succs[0]
  9849  			no := b.Succs[1]
  9850  			b.Kind = BlockMIPSEQ
  9851  			b.SetControl(cmp)
  9852  			_ = yes
  9853  			_ = no
  9854  			return true
  9855  		}
  9856  		// match: (NE (XORconst [1] cmp:(SGTUzero _)) yes no)
  9857  		// cond:
  9858  		// result: (EQ cmp yes no)
  9859  		for {
  9860  			v := b.Control
  9861  			if v.Op != OpMIPSXORconst {
  9862  				break
  9863  			}
  9864  			if v.AuxInt != 1 {
  9865  				break
  9866  			}
  9867  			cmp := v.Args[0]
  9868  			if cmp.Op != OpMIPSSGTUzero {
  9869  				break
  9870  			}
  9871  			yes := b.Succs[0]
  9872  			no := b.Succs[1]
  9873  			b.Kind = BlockMIPSEQ
  9874  			b.SetControl(cmp)
  9875  			_ = yes
  9876  			_ = no
  9877  			return true
  9878  		}
  9879  		// match: (NE (SGTUconst [1] x) yes no)
  9880  		// cond:
  9881  		// result: (EQ x yes no)
  9882  		for {
  9883  			v := b.Control
  9884  			if v.Op != OpMIPSSGTUconst {
  9885  				break
  9886  			}
  9887  			if v.AuxInt != 1 {
  9888  				break
  9889  			}
  9890  			x := v.Args[0]
  9891  			yes := b.Succs[0]
  9892  			no := b.Succs[1]
  9893  			b.Kind = BlockMIPSEQ
  9894  			b.SetControl(x)
  9895  			_ = yes
  9896  			_ = no
  9897  			return true
  9898  		}
  9899  		// match: (NE (SGTUzero x) yes no)
  9900  		// cond:
  9901  		// result: (NE x yes no)
  9902  		for {
  9903  			v := b.Control
  9904  			if v.Op != OpMIPSSGTUzero {
  9905  				break
  9906  			}
  9907  			x := v.Args[0]
  9908  			yes := b.Succs[0]
  9909  			no := b.Succs[1]
  9910  			b.Kind = BlockMIPSNE
  9911  			b.SetControl(x)
  9912  			_ = yes
  9913  			_ = no
  9914  			return true
  9915  		}
  9916  		// match: (NE (SGTconst [0] x) yes no)
  9917  		// cond:
  9918  		// result: (LTZ x yes no)
  9919  		for {
  9920  			v := b.Control
  9921  			if v.Op != OpMIPSSGTconst {
  9922  				break
  9923  			}
  9924  			if v.AuxInt != 0 {
  9925  				break
  9926  			}
  9927  			x := v.Args[0]
  9928  			yes := b.Succs[0]
  9929  			no := b.Succs[1]
  9930  			b.Kind = BlockMIPSLTZ
  9931  			b.SetControl(x)
  9932  			_ = yes
  9933  			_ = no
  9934  			return true
  9935  		}
  9936  		// match: (NE (SGTzero x) yes no)
  9937  		// cond:
  9938  		// result: (GTZ x yes no)
  9939  		for {
  9940  			v := b.Control
  9941  			if v.Op != OpMIPSSGTzero {
  9942  				break
  9943  			}
  9944  			x := v.Args[0]
  9945  			yes := b.Succs[0]
  9946  			no := b.Succs[1]
  9947  			b.Kind = BlockMIPSGTZ
  9948  			b.SetControl(x)
  9949  			_ = yes
  9950  			_ = no
  9951  			return true
  9952  		}
  9953  		// match: (NE (MOVWconst [0]) yes no)
  9954  		// cond:
  9955  		// result: (First nil no yes)
  9956  		for {
  9957  			v := b.Control
  9958  			if v.Op != OpMIPSMOVWconst {
  9959  				break
  9960  			}
  9961  			if v.AuxInt != 0 {
  9962  				break
  9963  			}
  9964  			yes := b.Succs[0]
  9965  			no := b.Succs[1]
  9966  			b.Kind = BlockFirst
  9967  			b.SetControl(nil)
  9968  			b.swapSuccessors()
  9969  			_ = no
  9970  			_ = yes
  9971  			return true
  9972  		}
  9973  		// match: (NE (MOVWconst [c]) yes no)
  9974  		// cond: c != 0
  9975  		// result: (First nil yes no)
  9976  		for {
  9977  			v := b.Control
  9978  			if v.Op != OpMIPSMOVWconst {
  9979  				break
  9980  			}
  9981  			c := v.AuxInt
  9982  			yes := b.Succs[0]
  9983  			no := b.Succs[1]
  9984  			if !(c != 0) {
  9985  				break
  9986  			}
  9987  			b.Kind = BlockFirst
  9988  			b.SetControl(nil)
  9989  			_ = yes
  9990  			_ = no
  9991  			return true
  9992  		}
  9993  	}
  9994  	return false
  9995  }