github.com/tinygo-org/tinygo@v0.31.3-0.20240404173401-90b0bf646c27/src/machine/machine_stm32f4.go (about)

     1  //go:build stm32f4
     2  
     3  package machine
     4  
     5  // Peripheral abstraction layer for the stm32f4
     6  
     7  import (
     8  	"device/stm32"
     9  	"encoding/binary"
    10  	"errors"
    11  	"math/bits"
    12  	"runtime/interrupt"
    13  	"runtime/volatile"
    14  	"unsafe"
    15  )
    16  
    17  var deviceIDAddr = []uintptr{0x1FFF7A10, 0x1FFF7A14, 0x1FFF7A18}
    18  
    19  const (
    20  	PA0  = portA + 0
    21  	PA1  = portA + 1
    22  	PA2  = portA + 2
    23  	PA3  = portA + 3
    24  	PA4  = portA + 4
    25  	PA5  = portA + 5
    26  	PA6  = portA + 6
    27  	PA7  = portA + 7
    28  	PA8  = portA + 8
    29  	PA9  = portA + 9
    30  	PA10 = portA + 10
    31  	PA11 = portA + 11
    32  	PA12 = portA + 12
    33  	PA13 = portA + 13
    34  	PA14 = portA + 14
    35  	PA15 = portA + 15
    36  
    37  	PB0  = portB + 0
    38  	PB1  = portB + 1
    39  	PB2  = portB + 2
    40  	PB3  = portB + 3
    41  	PB4  = portB + 4
    42  	PB5  = portB + 5
    43  	PB6  = portB + 6
    44  	PB7  = portB + 7
    45  	PB8  = portB + 8
    46  	PB9  = portB + 9
    47  	PB10 = portB + 10
    48  	PB11 = portB + 11
    49  	PB12 = portB + 12
    50  	PB13 = portB + 13
    51  	PB14 = portB + 14
    52  	PB15 = portB + 15
    53  
    54  	PC0  = portC + 0
    55  	PC1  = portC + 1
    56  	PC2  = portC + 2
    57  	PC3  = portC + 3
    58  	PC4  = portC + 4
    59  	PC5  = portC + 5
    60  	PC6  = portC + 6
    61  	PC7  = portC + 7
    62  	PC8  = portC + 8
    63  	PC9  = portC + 9
    64  	PC10 = portC + 10
    65  	PC11 = portC + 11
    66  	PC12 = portC + 12
    67  	PC13 = portC + 13
    68  	PC14 = portC + 14
    69  	PC15 = portC + 15
    70  
    71  	PD0  = portD + 0
    72  	PD1  = portD + 1
    73  	PD2  = portD + 2
    74  	PD3  = portD + 3
    75  	PD4  = portD + 4
    76  	PD5  = portD + 5
    77  	PD6  = portD + 6
    78  	PD7  = portD + 7
    79  	PD8  = portD + 8
    80  	PD9  = portD + 9
    81  	PD10 = portD + 10
    82  	PD11 = portD + 11
    83  	PD12 = portD + 12
    84  	PD13 = portD + 13
    85  	PD14 = portD + 14
    86  	PD15 = portD + 15
    87  
    88  	PE0  = portE + 0
    89  	PE1  = portE + 1
    90  	PE2  = portE + 2
    91  	PE3  = portE + 3
    92  	PE4  = portE + 4
    93  	PE5  = portE + 5
    94  	PE6  = portE + 6
    95  	PE7  = portE + 7
    96  	PE8  = portE + 8
    97  	PE9  = portE + 9
    98  	PE10 = portE + 10
    99  	PE11 = portE + 11
   100  	PE12 = portE + 12
   101  	PE13 = portE + 13
   102  	PE14 = portE + 14
   103  	PE15 = portE + 15
   104  
   105  	PF0  = portF + 0
   106  	PF1  = portF + 1
   107  	PF2  = portF + 2
   108  	PF3  = portF + 3
   109  	PF4  = portF + 4
   110  	PF5  = portF + 5
   111  	PF6  = portF + 6
   112  	PF7  = portF + 7
   113  	PF8  = portF + 8
   114  	PF9  = portF + 9
   115  	PF10 = portF + 10
   116  	PF11 = portF + 11
   117  	PF12 = portF + 12
   118  	PF13 = portF + 13
   119  	PF14 = portF + 14
   120  	PF15 = portF + 15
   121  
   122  	PG0  = portG + 0
   123  	PG1  = portG + 1
   124  	PG2  = portG + 2
   125  	PG3  = portG + 3
   126  	PG4  = portG + 4
   127  	PG5  = portG + 5
   128  	PG6  = portG + 6
   129  	PG7  = portG + 7
   130  	PG8  = portG + 8
   131  	PG9  = portG + 9
   132  	PG10 = portG + 10
   133  	PG11 = portG + 11
   134  	PG12 = portG + 12
   135  	PG13 = portG + 13
   136  	PG14 = portG + 14
   137  	PG15 = portG + 15
   138  
   139  	PH0  = portH + 0
   140  	PH1  = portH + 1
   141  	PH2  = portH + 2
   142  	PH3  = portH + 3
   143  	PH4  = portH + 4
   144  	PH5  = portH + 5
   145  	PH6  = portH + 6
   146  	PH7  = portH + 7
   147  	PH8  = portH + 8
   148  	PH9  = portH + 9
   149  	PH10 = portH + 10
   150  	PH11 = portH + 11
   151  	PH12 = portH + 12
   152  	PH13 = portH + 13
   153  	PH14 = portH + 14
   154  	PH15 = portH + 15
   155  
   156  	PI0  = portI + 0
   157  	PI1  = portI + 1
   158  	PI2  = portI + 2
   159  	PI3  = portI + 3
   160  	PI4  = portI + 4
   161  	PI5  = portI + 5
   162  	PI6  = portI + 6
   163  	PI7  = portI + 7
   164  	PI8  = portI + 8
   165  	PI9  = portI + 9
   166  	PI10 = portI + 10
   167  	PI11 = portI + 11
   168  	PI12 = portI + 12
   169  	PI13 = portI + 13
   170  	PI14 = portI + 14
   171  	PI15 = portI + 15
   172  
   173  	PK0  = portK + 0
   174  	PK1  = portK + 1
   175  	PK2  = portK + 2
   176  	PK3  = portK + 3
   177  	PK4  = portK + 4
   178  	PK5  = portK + 5
   179  	PK6  = portK + 6
   180  	PK7  = portK + 7
   181  	PK8  = portK + 8
   182  	PK9  = portK + 9
   183  	PK10 = portK + 10
   184  	PK11 = portK + 11
   185  	PK12 = portK + 12
   186  	PK13 = portK + 13
   187  	PK14 = portK + 14
   188  	PK15 = portK + 15
   189  )
   190  
   191  func (p Pin) getPort() *stm32.GPIO_Type {
   192  	switch p / 16 {
   193  	case 0:
   194  		return stm32.GPIOA
   195  	case 1:
   196  		return stm32.GPIOB
   197  	case 2:
   198  		return stm32.GPIOC
   199  	case 3:
   200  		return stm32.GPIOD
   201  	case 4:
   202  		return stm32.GPIOE
   203  	case 5:
   204  		return stm32.GPIOF
   205  	case 6:
   206  		return stm32.GPIOG
   207  	case 7:
   208  		return stm32.GPIOH
   209  	case 8:
   210  		return stm32.GPIOI
   211  	case 9:
   212  		return stm32.GPIOJ
   213  	case 10:
   214  		return stm32.GPIOK
   215  	default:
   216  		panic("machine: unknown port")
   217  	}
   218  }
   219  
   220  // enableClock enables the clock for this desired GPIO port.
   221  func (p Pin) enableClock() {
   222  	bit := p / 16
   223  	if 0 <= bit && bit <= 10 {
   224  		stm32.RCC.AHB1ENR.SetBits(0b1 << bit)
   225  	} else {
   226  		panic("machine: unknown port")
   227  	}
   228  }
   229  
   230  func (p Pin) registerInterrupt() interrupt.Interrupt {
   231  	pin := uint8(p) % 16
   232  
   233  	switch pin {
   234  	case 0:
   235  		return interrupt.New(stm32.IRQ_EXTI0, func(interrupt.Interrupt) { handlePinInterrupt(0) })
   236  	case 1:
   237  		return interrupt.New(stm32.IRQ_EXTI1, func(interrupt.Interrupt) { handlePinInterrupt(1) })
   238  	case 2:
   239  		return interrupt.New(stm32.IRQ_EXTI2, func(interrupt.Interrupt) { handlePinInterrupt(2) })
   240  	case 3:
   241  		return interrupt.New(stm32.IRQ_EXTI3, func(interrupt.Interrupt) { handlePinInterrupt(3) })
   242  	case 4:
   243  		return interrupt.New(stm32.IRQ_EXTI4, func(interrupt.Interrupt) { handlePinInterrupt(4) })
   244  	case 5:
   245  		return interrupt.New(stm32.IRQ_EXTI9_5, func(interrupt.Interrupt) { handlePinInterrupt(5) })
   246  	case 6:
   247  		return interrupt.New(stm32.IRQ_EXTI9_5, func(interrupt.Interrupt) { handlePinInterrupt(6) })
   248  	case 7:
   249  		return interrupt.New(stm32.IRQ_EXTI9_5, func(interrupt.Interrupt) { handlePinInterrupt(7) })
   250  	case 8:
   251  		return interrupt.New(stm32.IRQ_EXTI9_5, func(interrupt.Interrupt) { handlePinInterrupt(8) })
   252  	case 9:
   253  		return interrupt.New(stm32.IRQ_EXTI9_5, func(interrupt.Interrupt) { handlePinInterrupt(9) })
   254  	case 10:
   255  		return interrupt.New(stm32.IRQ_EXTI15_10, func(interrupt.Interrupt) { handlePinInterrupt(10) })
   256  	case 11:
   257  		return interrupt.New(stm32.IRQ_EXTI15_10, func(interrupt.Interrupt) { handlePinInterrupt(11) })
   258  	case 12:
   259  		return interrupt.New(stm32.IRQ_EXTI15_10, func(interrupt.Interrupt) { handlePinInterrupt(12) })
   260  	case 13:
   261  		return interrupt.New(stm32.IRQ_EXTI15_10, func(interrupt.Interrupt) { handlePinInterrupt(13) })
   262  	case 14:
   263  		return interrupt.New(stm32.IRQ_EXTI15_10, func(interrupt.Interrupt) { handlePinInterrupt(14) })
   264  	case 15:
   265  		return interrupt.New(stm32.IRQ_EXTI15_10, func(interrupt.Interrupt) { handlePinInterrupt(15) })
   266  	}
   267  
   268  	return interrupt.Interrupt{}
   269  }
   270  
   271  // Enable peripheral clock
   272  func enableAltFuncClock(bus unsafe.Pointer) {
   273  	switch bus {
   274  	case unsafe.Pointer(stm32.DAC): // DAC interface clock enable
   275  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_DACEN)
   276  	case unsafe.Pointer(stm32.PWR): // Power interface clock enable
   277  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_PWREN)
   278  	case unsafe.Pointer(stm32.CAN2): // CAN 2 clock enable
   279  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_CAN2EN)
   280  	case unsafe.Pointer(stm32.CAN1): // CAN 1 clock enable
   281  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_CAN1EN)
   282  	case unsafe.Pointer(stm32.I2C3): // I2C3 clock enable
   283  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C3EN)
   284  	case unsafe.Pointer(stm32.I2C2): // I2C2 clock enable
   285  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C2EN)
   286  	case unsafe.Pointer(stm32.I2C1): // I2C1 clock enable
   287  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C1EN)
   288  	case unsafe.Pointer(stm32.UART5): // UART5 clock enable
   289  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_UART5EN)
   290  	case unsafe.Pointer(stm32.UART4): // UART4 clock enable
   291  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_UART4EN)
   292  	case unsafe.Pointer(stm32.USART3): // USART3 clock enable
   293  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART3EN)
   294  	case unsafe.Pointer(stm32.USART2): // USART2 clock enable
   295  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART2EN)
   296  	case unsafe.Pointer(stm32.SPI3): // SPI3 clock enable
   297  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_SPI3EN)
   298  	case unsafe.Pointer(stm32.SPI2): // SPI2 clock enable
   299  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_SPI2EN)
   300  	case unsafe.Pointer(stm32.WWDG): // Window watchdog clock enable
   301  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_WWDGEN)
   302  	case unsafe.Pointer(stm32.TIM14): // TIM14 clock enable
   303  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM14EN)
   304  	case unsafe.Pointer(stm32.TIM13): // TIM13 clock enable
   305  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM13EN)
   306  	case unsafe.Pointer(stm32.TIM12): // TIM12 clock enable
   307  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM12EN)
   308  	case unsafe.Pointer(stm32.TIM7): // TIM7 clock enable
   309  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM7EN)
   310  	case unsafe.Pointer(stm32.TIM6): // TIM6 clock enable
   311  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM6EN)
   312  	case unsafe.Pointer(stm32.TIM5): // TIM5 clock enable
   313  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM5EN)
   314  	case unsafe.Pointer(stm32.TIM4): // TIM4 clock enable
   315  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM4EN)
   316  	case unsafe.Pointer(stm32.TIM3): // TIM3 clock enable
   317  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM3EN)
   318  	case unsafe.Pointer(stm32.TIM2): // TIM2 clock enable
   319  		stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM2EN)
   320  	case unsafe.Pointer(stm32.TIM11): // TIM11 clock enable
   321  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM11EN)
   322  	case unsafe.Pointer(stm32.TIM10): // TIM10 clock enable
   323  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM10EN)
   324  	case unsafe.Pointer(stm32.TIM9): // TIM9 clock enable
   325  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM9EN)
   326  	case unsafe.Pointer(stm32.SYSCFG): // System configuration controller clock enable
   327  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SYSCFGEN)
   328  	case unsafe.Pointer(stm32.SPI1): // SPI1 clock enable
   329  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SPI1EN)
   330  	case unsafe.Pointer(stm32.SDIO): // SDIO clock enable
   331  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SDIOEN)
   332  	case unsafe.Pointer(stm32.ADC3): // ADC3 clock enable
   333  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADC3EN)
   334  	case unsafe.Pointer(stm32.ADC2): // ADC2 clock enable
   335  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADC2EN)
   336  	case unsafe.Pointer(stm32.ADC1): // ADC1 clock enable
   337  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADC1EN)
   338  	case unsafe.Pointer(stm32.USART6): // USART6 clock enable
   339  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_USART6EN)
   340  	case unsafe.Pointer(stm32.USART1): // USART1 clock enable
   341  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_USART1EN)
   342  	case unsafe.Pointer(stm32.TIM8): // TIM8 clock enable
   343  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM8EN)
   344  	case unsafe.Pointer(stm32.TIM1): // TIM1 clock enable
   345  		stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM1EN)
   346  	}
   347  }
   348  
   349  //---------- Timer related code
   350  
   351  var (
   352  	TIM1 = TIM{
   353  		EnableRegister: &stm32.RCC.APB2ENR,
   354  		EnableFlag:     stm32.RCC_APB2ENR_TIM1EN,
   355  		Device:         stm32.TIM1,
   356  		Channels: [4]TimerChannel{
   357  			TimerChannel{Pins: []PinFunction{{PA8, AF1_TIM1_2}, {PE9, AF1_TIM1_2}}},
   358  			TimerChannel{Pins: []PinFunction{{PA9, AF1_TIM1_2}, {PE11, AF1_TIM1_2}}},
   359  			TimerChannel{Pins: []PinFunction{{PA10, AF1_TIM1_2}, {PE13, AF1_TIM1_2}}},
   360  			TimerChannel{Pins: []PinFunction{{PA11, AF1_TIM1_2}, {PE14, AF1_TIM1_2}}},
   361  		},
   362  		busFreq: APB2_TIM_FREQ,
   363  	}
   364  
   365  	TIM2 = TIM{
   366  		EnableRegister: &stm32.RCC.APB1ENR,
   367  		EnableFlag:     stm32.RCC_APB1ENR_TIM2EN,
   368  		Device:         stm32.TIM2,
   369  		Channels: [4]TimerChannel{
   370  			TimerChannel{Pins: []PinFunction{{PA0, AF1_TIM1_2}, {PA5, AF1_TIM1_2}, {PA15, AF1_TIM1_2}}},
   371  			TimerChannel{Pins: []PinFunction{{PA1, AF1_TIM1_2}, {PB3, AF1_TIM1_2}}},
   372  			TimerChannel{Pins: []PinFunction{{PA2, AF1_TIM1_2}, {PB10, AF1_TIM1_2}}},
   373  			TimerChannel{Pins: []PinFunction{{PA3, AF1_TIM1_2}, {PB11, AF1_TIM1_2}}},
   374  		},
   375  		busFreq: APB1_TIM_FREQ,
   376  	}
   377  
   378  	TIM3 = TIM{
   379  		EnableRegister: &stm32.RCC.APB1ENR,
   380  		EnableFlag:     stm32.RCC_APB1ENR_TIM3EN,
   381  		Device:         stm32.TIM3,
   382  		Channels: [4]TimerChannel{
   383  			TimerChannel{Pins: []PinFunction{{PA6, AF2_TIM3_4_5}, {PB4, AF2_TIM3_4_5}, {PC6, AF2_TIM3_4_5}}},
   384  			TimerChannel{Pins: []PinFunction{{PA7, AF2_TIM3_4_5}, {PB5, AF2_TIM3_4_5}, {PC7, AF2_TIM3_4_5}}},
   385  			TimerChannel{Pins: []PinFunction{{PB0, AF2_TIM3_4_5}, {PC8, AF2_TIM3_4_5}}},
   386  			TimerChannel{Pins: []PinFunction{{PB1, AF2_TIM3_4_5}, {PC9, AF2_TIM3_4_5}}},
   387  		},
   388  		busFreq: APB1_TIM_FREQ,
   389  	}
   390  
   391  	TIM4 = TIM{
   392  		EnableRegister: &stm32.RCC.APB1ENR,
   393  		EnableFlag:     stm32.RCC_APB1ENR_TIM4EN,
   394  		Device:         stm32.TIM4,
   395  		Channels: [4]TimerChannel{
   396  			TimerChannel{Pins: []PinFunction{{PB6, AF2_TIM3_4_5}, {PD12, AF2_TIM3_4_5}}},
   397  			TimerChannel{Pins: []PinFunction{{PB7, AF2_TIM3_4_5}, {PD13, AF2_TIM3_4_5}}},
   398  			TimerChannel{Pins: []PinFunction{{PB8, AF2_TIM3_4_5}, {PD14, AF2_TIM3_4_5}}},
   399  			TimerChannel{Pins: []PinFunction{{PB9, AF2_TIM3_4_5}, {PD15, AF2_TIM3_4_5}}},
   400  		},
   401  		busFreq: APB1_TIM_FREQ,
   402  	}
   403  
   404  	TIM5 = TIM{
   405  		EnableRegister: &stm32.RCC.APB1ENR,
   406  		EnableFlag:     stm32.RCC_APB1ENR_TIM5EN,
   407  		Device:         stm32.TIM5,
   408  		Channels: [4]TimerChannel{
   409  			TimerChannel{Pins: []PinFunction{{PH10, AF2_TIM3_4_5}}},
   410  			TimerChannel{Pins: []PinFunction{{PH11, AF2_TIM3_4_5}}},
   411  			TimerChannel{Pins: []PinFunction{{PH12, AF2_TIM3_4_5}}},
   412  			TimerChannel{Pins: []PinFunction{{PI0, AF2_TIM3_4_5}}},
   413  		},
   414  		busFreq: APB1_TIM_FREQ,
   415  	}
   416  
   417  	TIM6 = TIM{
   418  		EnableRegister: &stm32.RCC.APB1ENR,
   419  		EnableFlag:     stm32.RCC_APB1ENR_TIM6EN,
   420  		Device:         stm32.TIM6,
   421  		Channels: [4]TimerChannel{
   422  			TimerChannel{Pins: []PinFunction{}},
   423  			TimerChannel{Pins: []PinFunction{}},
   424  			TimerChannel{Pins: []PinFunction{}},
   425  			TimerChannel{Pins: []PinFunction{}},
   426  		},
   427  		busFreq: APB1_TIM_FREQ,
   428  	}
   429  
   430  	TIM7 = TIM{
   431  		EnableRegister: &stm32.RCC.APB1ENR,
   432  		EnableFlag:     stm32.RCC_APB1ENR_TIM7EN,
   433  		Device:         stm32.TIM7,
   434  		Channels: [4]TimerChannel{
   435  			TimerChannel{Pins: []PinFunction{}},
   436  			TimerChannel{Pins: []PinFunction{}},
   437  			TimerChannel{Pins: []PinFunction{}},
   438  			TimerChannel{Pins: []PinFunction{}},
   439  		},
   440  		busFreq: APB1_TIM_FREQ,
   441  	}
   442  
   443  	TIM8 = TIM{
   444  		EnableRegister: &stm32.RCC.APB2ENR,
   445  		EnableFlag:     stm32.RCC_APB2ENR_TIM8EN,
   446  		Device:         stm32.TIM8,
   447  		Channels: [4]TimerChannel{
   448  			TimerChannel{Pins: []PinFunction{{PC6, AF3_TIM8_9_10_11}, {PI5, AF3_TIM8_9_10_11}}},
   449  			TimerChannel{Pins: []PinFunction{{PC7, AF3_TIM8_9_10_11}, {PI6, AF3_TIM8_9_10_11}}},
   450  			TimerChannel{Pins: []PinFunction{{PC8, AF3_TIM8_9_10_11}, {PI7, AF3_TIM8_9_10_11}}},
   451  			TimerChannel{Pins: []PinFunction{{PC9, AF3_TIM8_9_10_11}, {PI2, AF3_TIM8_9_10_11}}},
   452  		},
   453  		busFreq: APB2_TIM_FREQ,
   454  	}
   455  
   456  	TIM9 = TIM{
   457  		EnableRegister: &stm32.RCC.APB2ENR,
   458  		EnableFlag:     stm32.RCC_APB2ENR_TIM9EN,
   459  		Device:         stm32.TIM9,
   460  		Channels: [4]TimerChannel{
   461  			TimerChannel{Pins: []PinFunction{{PA2, AF3_TIM8_9_10_11}, {PE5, AF3_TIM8_9_10_11}}},
   462  			TimerChannel{Pins: []PinFunction{{PA3, AF3_TIM8_9_10_11}, {PE6, AF3_TIM8_9_10_11}}},
   463  			TimerChannel{Pins: []PinFunction{}},
   464  			TimerChannel{Pins: []PinFunction{}},
   465  		},
   466  		busFreq: APB2_TIM_FREQ,
   467  	}
   468  
   469  	TIM10 = TIM{
   470  		EnableRegister: &stm32.RCC.APB2ENR,
   471  		EnableFlag:     stm32.RCC_APB2ENR_TIM10EN,
   472  		Device:         stm32.TIM10,
   473  		Channels: [4]TimerChannel{
   474  			TimerChannel{Pins: []PinFunction{{PB8, AF3_TIM8_9_10_11}, {PF6, AF3_TIM8_9_10_11}}},
   475  			TimerChannel{Pins: []PinFunction{}},
   476  			TimerChannel{Pins: []PinFunction{}},
   477  			TimerChannel{Pins: []PinFunction{}},
   478  		},
   479  		busFreq: APB2_TIM_FREQ,
   480  	}
   481  
   482  	TIM11 = TIM{
   483  		EnableRegister: &stm32.RCC.APB2ENR,
   484  		EnableFlag:     stm32.RCC_APB2ENR_TIM11EN,
   485  		Device:         stm32.TIM11,
   486  		Channels: [4]TimerChannel{
   487  			TimerChannel{Pins: []PinFunction{{PB9, AF3_TIM8_9_10_11}, {PF7, AF3_TIM8_9_10_11}}},
   488  			TimerChannel{Pins: []PinFunction{}},
   489  			TimerChannel{Pins: []PinFunction{}},
   490  			TimerChannel{Pins: []PinFunction{}},
   491  		},
   492  		busFreq: APB2_TIM_FREQ,
   493  	}
   494  
   495  	TIM12 = TIM{
   496  		EnableRegister: &stm32.RCC.APB1ENR,
   497  		EnableFlag:     stm32.RCC_APB1ENR_TIM12EN,
   498  		Device:         stm32.TIM12,
   499  		Channels: [4]TimerChannel{
   500  			TimerChannel{Pins: []PinFunction{{PB14, AF9_CAN1_CAN2_TIM12_13_14}, {PH6, AF9_CAN1_CAN2_TIM12_13_14}}},
   501  			TimerChannel{Pins: []PinFunction{{PB15, AF9_CAN1_CAN2_TIM12_13_14}, {PH9, AF9_CAN1_CAN2_TIM12_13_14}}},
   502  			TimerChannel{Pins: []PinFunction{}},
   503  			TimerChannel{Pins: []PinFunction{}},
   504  		},
   505  		busFreq: APB1_TIM_FREQ,
   506  	}
   507  
   508  	TIM13 = TIM{
   509  		EnableRegister: &stm32.RCC.APB1ENR,
   510  		EnableFlag:     stm32.RCC_APB1ENR_TIM13EN,
   511  		Device:         stm32.TIM13,
   512  		Channels: [4]TimerChannel{
   513  			TimerChannel{Pins: []PinFunction{{PA6, AF9_CAN1_CAN2_TIM12_13_14}, {PF8, AF9_CAN1_CAN2_TIM12_13_14}}},
   514  			TimerChannel{Pins: []PinFunction{}},
   515  			TimerChannel{Pins: []PinFunction{}},
   516  			TimerChannel{Pins: []PinFunction{}},
   517  		},
   518  		busFreq: APB1_TIM_FREQ,
   519  	}
   520  
   521  	TIM14 = TIM{
   522  		EnableRegister: &stm32.RCC.APB1ENR,
   523  		EnableFlag:     stm32.RCC_APB1ENR_TIM14EN,
   524  		Device:         stm32.TIM14,
   525  		Channels: [4]TimerChannel{
   526  			TimerChannel{Pins: []PinFunction{{PA7, AF9_CAN1_CAN2_TIM12_13_14}, {PF9, AF9_CAN1_CAN2_TIM12_13_14}}},
   527  			TimerChannel{Pins: []PinFunction{}},
   528  			TimerChannel{Pins: []PinFunction{}},
   529  			TimerChannel{Pins: []PinFunction{}},
   530  		},
   531  		busFreq: APB1_TIM_FREQ,
   532  	}
   533  )
   534  
   535  func (t *TIM) registerUPInterrupt() interrupt.Interrupt {
   536  	switch t {
   537  	case &TIM1:
   538  		return interrupt.New(stm32.IRQ_TIM1_UP_TIM10, TIM1.handleUPInterrupt)
   539  	case &TIM2:
   540  		return interrupt.New(stm32.IRQ_TIM2, TIM2.handleUPInterrupt)
   541  	case &TIM3:
   542  		return interrupt.New(stm32.IRQ_TIM3, TIM3.handleUPInterrupt)
   543  	case &TIM4:
   544  		return interrupt.New(stm32.IRQ_TIM4, TIM4.handleUPInterrupt)
   545  	case &TIM5:
   546  		return interrupt.New(stm32.IRQ_TIM5, TIM5.handleUPInterrupt)
   547  	case &TIM6:
   548  		return interrupt.New(stm32.IRQ_TIM6_DAC, TIM6.handleUPInterrupt)
   549  	case &TIM7:
   550  		return interrupt.New(stm32.IRQ_TIM7, TIM7.handleUPInterrupt)
   551  	case &TIM8:
   552  		return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM8.handleUPInterrupt)
   553  	case &TIM9:
   554  		return interrupt.New(stm32.IRQ_TIM1_BRK_TIM9, TIM9.handleUPInterrupt)
   555  	case &TIM10:
   556  		return interrupt.New(stm32.IRQ_TIM1_UP_TIM10, TIM10.handleUPInterrupt)
   557  	case &TIM11:
   558  		return interrupt.New(stm32.IRQ_TIM1_TRG_COM_TIM11, TIM11.handleUPInterrupt)
   559  	case &TIM12:
   560  		return interrupt.New(stm32.IRQ_TIM8_BRK_TIM12, TIM12.handleUPInterrupt)
   561  	case &TIM13:
   562  		return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM13.handleUPInterrupt)
   563  	case &TIM14:
   564  		return interrupt.New(stm32.IRQ_TIM8_TRG_COM_TIM14, TIM14.handleUPInterrupt)
   565  	}
   566  
   567  	return interrupt.Interrupt{}
   568  }
   569  
   570  func (t *TIM) registerOCInterrupt() interrupt.Interrupt {
   571  	switch t {
   572  	case &TIM1:
   573  		return interrupt.New(stm32.IRQ_TIM1_CC, TIM1.handleOCInterrupt)
   574  	case &TIM2:
   575  		return interrupt.New(stm32.IRQ_TIM2, TIM2.handleOCInterrupt)
   576  	case &TIM3:
   577  		return interrupt.New(stm32.IRQ_TIM3, TIM3.handleOCInterrupt)
   578  	case &TIM4:
   579  		return interrupt.New(stm32.IRQ_TIM4, TIM4.handleOCInterrupt)
   580  	case &TIM5:
   581  		return interrupt.New(stm32.IRQ_TIM5, TIM5.handleOCInterrupt)
   582  	case &TIM6:
   583  		return interrupt.New(stm32.IRQ_TIM6_DAC, TIM6.handleOCInterrupt)
   584  	case &TIM7:
   585  		return interrupt.New(stm32.IRQ_TIM7, TIM7.handleOCInterrupt)
   586  	case &TIM8:
   587  		return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM8.handleOCInterrupt)
   588  	case &TIM9:
   589  		return interrupt.New(stm32.IRQ_TIM1_BRK_TIM9, TIM9.handleOCInterrupt)
   590  	case &TIM10:
   591  		return interrupt.New(stm32.IRQ_TIM1_UP_TIM10, TIM10.handleOCInterrupt)
   592  	case &TIM11:
   593  		return interrupt.New(stm32.IRQ_TIM1_TRG_COM_TIM11, TIM11.handleOCInterrupt)
   594  	case &TIM12:
   595  		return interrupt.New(stm32.IRQ_TIM8_BRK_TIM12, TIM12.handleOCInterrupt)
   596  	case &TIM13:
   597  		return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM13.handleOCInterrupt)
   598  	case &TIM14:
   599  		return interrupt.New(stm32.IRQ_TIM8_TRG_COM_TIM14, TIM14.handleOCInterrupt)
   600  	}
   601  
   602  	return interrupt.Interrupt{}
   603  }
   604  
   605  func (t *TIM) enableMainOutput() {
   606  	t.Device.BDTR.SetBits(stm32.TIM_BDTR_MOE)
   607  }
   608  
   609  type arrtype = uint32
   610  type arrRegType = volatile.Register32
   611  
   612  const (
   613  	ARR_MAX = 0x10000
   614  	PSC_MAX = 0x10000
   615  )
   616  
   617  func initRNG() {
   618  	stm32.RCC.AHB2ENR.SetBits(stm32.RCC_AHB2ENR_RNGEN)
   619  	stm32.RNG.CR.SetBits(stm32.RNG_CR_RNGEN)
   620  }
   621  
   622  // Alternative peripheral pin functions
   623  const (
   624  	AF0_SYSTEM                = 0
   625  	AF1_TIM1_2                = 1
   626  	AF2_TIM3_4_5              = 2
   627  	AF3_TIM8_9_10_11          = 3
   628  	AF4_I2C1_2_3              = 4
   629  	AF5_SPI1_SPI2             = 5
   630  	AF6_SPI3                  = 6
   631  	AF7_USART1_2_3            = 7
   632  	AF8_USART4_5_6            = 8
   633  	AF9_CAN1_CAN2_TIM12_13_14 = 9
   634  	AF10_OTG_FS_OTG_HS        = 10
   635  	AF11_ETH                  = 11
   636  	AF12_FSMC_SDIO_OTG_HS_1   = 12
   637  	AF13_DCMI                 = 13
   638  	AF14                      = 14
   639  	AF15_EVENTOUT             = 15
   640  )
   641  
   642  // -- UART ---------------------------------------------------------------------
   643  
   644  func (uart *UART) configurePins(config UARTConfig) {
   645  	// enable the alternate functions on the TX and RX pins
   646  	config.TX.ConfigureAltFunc(PinConfig{Mode: PinModeUARTTX}, uart.TxAltFuncSelector)
   647  	config.RX.ConfigureAltFunc(PinConfig{Mode: PinModeUARTRX}, uart.RxAltFuncSelector)
   648  }
   649  
   650  func (uart *UART) getBaudRateDivisor(baudRate uint32) uint32 {
   651  	var clock uint32
   652  	switch uart.Bus {
   653  	case stm32.USART1, stm32.USART6:
   654  		clock = CPUFrequency() / 2 // APB2 Frequency
   655  	case stm32.USART2, stm32.USART3, stm32.UART4, stm32.UART5:
   656  		clock = CPUFrequency() / 4 // APB1 Frequency
   657  	}
   658  	return clock / baudRate
   659  }
   660  
   661  func (uart *UART) setRegisters() {
   662  	uart.rxReg = &uart.Bus.DR
   663  	uart.txReg = &uart.Bus.DR
   664  	uart.statusReg = &uart.Bus.SR
   665  	uart.txEmptyFlag = stm32.USART_SR_TXE
   666  }
   667  
   668  // -- SPI ----------------------------------------------------------------------
   669  
   670  type SPI struct {
   671  	Bus             *stm32.SPI_Type
   672  	AltFuncSelector uint8
   673  }
   674  
   675  func (spi SPI) config8Bits() {
   676  	// no-op on this series
   677  }
   678  
   679  func (spi SPI) configurePins(config SPIConfig) {
   680  	config.SCK.ConfigureAltFunc(PinConfig{Mode: PinModeSPICLK}, spi.AltFuncSelector)
   681  	config.SDO.ConfigureAltFunc(PinConfig{Mode: PinModeSPISDO}, spi.AltFuncSelector)
   682  	config.SDI.ConfigureAltFunc(PinConfig{Mode: PinModeSPISDI}, spi.AltFuncSelector)
   683  }
   684  
   685  func (spi SPI) getBaudRate(config SPIConfig) uint32 {
   686  	var clock uint32
   687  	switch spi.Bus {
   688  	case stm32.SPI1:
   689  		clock = CPUFrequency() / 2
   690  	case stm32.SPI2, stm32.SPI3:
   691  		clock = CPUFrequency() / 4
   692  	}
   693  
   694  	// limit requested frequency to bus frequency and min frequency (DIV256)
   695  	freq := config.Frequency
   696  	if min := clock / 256; freq < min {
   697  		freq = min
   698  	} else if freq > clock {
   699  		freq = clock
   700  	}
   701  
   702  	// calculate the exact clock divisor (freq=clock/div -> div=clock/freq).
   703  	// truncation is fine, since it produces a less-than-or-equal divisor, and
   704  	// thus a greater-than-or-equal frequency.
   705  	// divisors only come in consecutive powers of 2, so we can use log2 (or,
   706  	// equivalently, bits.Len - 1) to convert to respective enum value.
   707  	div := bits.Len32(clock/freq) - 1
   708  
   709  	// but DIV1 (2^0) is not permitted, as the least divisor is DIV2 (2^1), so
   710  	// subtract 1 from the log2 value, keeping a lower bound of 0
   711  	if div < 0 {
   712  		div = 0
   713  	} else if div > 0 {
   714  		div--
   715  	}
   716  
   717  	// finally, shift the enumerated value into position for SPI CR1
   718  	return uint32(div) << stm32.SPI_CR1_BR_Pos
   719  }
   720  
   721  // -- I2C ----------------------------------------------------------------------
   722  
   723  type I2C struct {
   724  	Bus             *stm32.I2C_Type
   725  	AltFuncSelector uint8
   726  }
   727  
   728  func (i2c *I2C) configurePins(config I2CConfig) {
   729  	config.SCL.ConfigureAltFunc(PinConfig{Mode: PinModeI2CSCL}, i2c.AltFuncSelector)
   730  	config.SDA.ConfigureAltFunc(PinConfig{Mode: PinModeI2CSDA}, i2c.AltFuncSelector)
   731  }
   732  
   733  func (i2c *I2C) getFreqRange(config I2CConfig) uint32 {
   734  	// all I2C interfaces are on APB1
   735  	clock := CPUFrequency() / 4
   736  	// convert to MHz
   737  	clock /= 1000000
   738  	// must be between 2 MHz (or 4 MHz for fast mode (Fm)) and 50 MHz, inclusive
   739  	var min, max uint32 = 2, 50
   740  	if config.Frequency > 100000 {
   741  		min = 4 // fast mode (Fm)
   742  	}
   743  	if clock < min {
   744  		clock = min
   745  	} else if clock > max {
   746  		clock = max
   747  	}
   748  	return clock << stm32.I2C_CR2_FREQ_Pos
   749  }
   750  
   751  func (i2c *I2C) getRiseTime(config I2CConfig) uint32 {
   752  	// These bits must be programmed with the maximum SCL rise time given in the
   753  	// I2C bus specification, incremented by 1.
   754  	// For instance: in Sm mode, the maximum allowed SCL rise time is 1000 ns.
   755  	// If, in the I2C_CR2 register, the value of FREQ[5:0] bits is equal to 0x08
   756  	// and PCLK1 = 125 ns, therefore the TRISE[5:0] bits must be programmed with
   757  	// 09h (1000 ns / 125 ns = 8 + 1)
   758  	freqRange := i2c.getFreqRange(config)
   759  	if config.Frequency > 100000 {
   760  		// fast mode (Fm) adjustment
   761  		freqRange *= 300
   762  		freqRange /= 1000
   763  	}
   764  	return (freqRange + 1) << stm32.I2C_TRISE_TRISE_Pos
   765  }
   766  
   767  func (i2c *I2C) getSpeed(config I2CConfig) uint32 {
   768  	ccr := func(pclk uint32, freq uint32, coeff uint32) uint32 {
   769  		return (((pclk - 1) / (freq * coeff)) + 1) & stm32.I2C_CCR_CCR_Msk
   770  	}
   771  	sm := func(pclk uint32, freq uint32) uint32 { // standard mode (Sm)
   772  		if s := ccr(pclk, freq, 2); s < 4 {
   773  			return 4
   774  		} else {
   775  			return s
   776  		}
   777  	}
   778  	fm := func(pclk uint32, freq uint32, duty uint8) uint32 { // fast mode (Fm)
   779  		if duty == DutyCycle2 {
   780  			return ccr(pclk, freq, 3)
   781  		} else {
   782  			return ccr(pclk, freq, 25) | stm32.I2C_CCR_DUTY
   783  		}
   784  	}
   785  	// all I2C interfaces are on APB1
   786  	clock := CPUFrequency() / 4
   787  	if config.Frequency <= 100000 {
   788  		return sm(clock, config.Frequency)
   789  	} else {
   790  		s := fm(clock, config.Frequency, config.DutyCycle)
   791  		if (s & stm32.I2C_CCR_CCR_Msk) == 0 {
   792  			return 1
   793  		} else {
   794  			return s | stm32.I2C_CCR_F_S
   795  		}
   796  	}
   797  }
   798  
   799  //---------- Flash related code
   800  
   801  // the block size actually depends on the sector.
   802  // TODO: handle this correctly for sectors > 3
   803  const eraseBlockSizeValue = 16384
   804  
   805  // see RM0090 page 75
   806  func sectorNumber(address uintptr) uint32 {
   807  	switch {
   808  	// 0x0800 0000 - 0x0800 3FFF
   809  	case address >= 0x08000000 && address <= 0x08003FFF:
   810  		return 0
   811  	// 0x0800 4000 - 0x0800 7FFF
   812  	case address >= 0x08004000 && address <= 0x08007FFF:
   813  		return 1
   814  	// 0x0800 8000 - 0x0800 BFFF
   815  	case address >= 0x08008000 && address <= 0x0800BFFF:
   816  		return 2
   817  	// 0x0800 C000 - 0x0800 FFFF
   818  	case address >= 0x0800C000 && address <= 0x0800FFFF:
   819  		return 3
   820  	// 0x0801 0000 - 0x0801 FFFF
   821  	case address >= 0x08010000 && address <= 0x0801FFFF:
   822  		return 4
   823  	// 0x0802 0000 - 0x0803 FFFF
   824  	case address >= 0x08020000 && address <= 0x0803FFFF:
   825  		return 5
   826  	// 0x0804 0000 - 0x0805 FFFF
   827  	case address >= 0x08040000 && address <= 0x0805FFFF:
   828  		return 6
   829  	case address >= 0x08060000 && address <= 0x0807FFFF:
   830  		return 7
   831  	case address >= 0x08080000 && address <= 0x0809FFFF:
   832  		return 8
   833  	case address >= 0x080A0000 && address <= 0x080BFFFF:
   834  		return 9
   835  	case address >= 0x080C0000 && address <= 0x080DFFFF:
   836  		return 10
   837  	case address >= 0x080E0000 && address <= 0x080FFFFF:
   838  		return 11
   839  	default:
   840  		return 0
   841  	}
   842  }
   843  
   844  // calculate sector number from address
   845  // var sector uint32 = sectorNumber(address)
   846  
   847  // see RM0090 page 85
   848  // eraseBlock at the passed in block number
   849  func eraseBlock(block uint32) error {
   850  	waitUntilFlashDone()
   851  
   852  	// clear any previous errors
   853  	stm32.FLASH.SR.SetBits(0xF0)
   854  
   855  	// set SER bit
   856  	stm32.FLASH.SetCR_SER(1)
   857  	defer stm32.FLASH.SetCR_SER(0)
   858  
   859  	// set the block (aka sector) to be erased
   860  	stm32.FLASH.SetCR_SNB(block)
   861  	defer stm32.FLASH.SetCR_SNB(0)
   862  
   863  	// start the page erase
   864  	stm32.FLASH.SetCR_STRT(1)
   865  
   866  	waitUntilFlashDone()
   867  
   868  	if err := checkError(); err != nil {
   869  		return err
   870  	}
   871  
   872  	return nil
   873  }
   874  
   875  const writeBlockSize = 2
   876  
   877  // see RM0090 page 86
   878  // must write data in word-length
   879  func writeFlashData(address uintptr, data []byte) (int, error) {
   880  	if len(data)%writeBlockSize != 0 {
   881  		return 0, errFlashInvalidWriteLength
   882  	}
   883  
   884  	waitUntilFlashDone()
   885  
   886  	// clear any previous errors
   887  	stm32.FLASH.SR.SetBits(0xF0)
   888  
   889  	// set parallelism to x32
   890  	stm32.FLASH.SetCR_PSIZE(2)
   891  
   892  	for i := 0; i < len(data); i += writeBlockSize {
   893  		// start write operation
   894  		stm32.FLASH.SetCR_PG(1)
   895  
   896  		*(*uint16)(unsafe.Pointer(address)) = binary.LittleEndian.Uint16(data[i : i+writeBlockSize])
   897  
   898  		waitUntilFlashDone()
   899  
   900  		if err := checkError(); err != nil {
   901  			return i, err
   902  		}
   903  
   904  		// end write operation
   905  		stm32.FLASH.SetCR_PG(0)
   906  	}
   907  
   908  	return len(data), nil
   909  }
   910  
   911  func waitUntilFlashDone() {
   912  	for stm32.FLASH.GetSR_BSY() != 0 {
   913  	}
   914  }
   915  
   916  var (
   917  	errFlashPGS = errors.New("errFlashPGS")
   918  	errFlashPGP = errors.New("errFlashPGP")
   919  	errFlashPGA = errors.New("errFlashPGA")
   920  	errFlashWRP = errors.New("errFlashWRP")
   921  )
   922  
   923  func checkError() error {
   924  	switch {
   925  	case stm32.FLASH.GetSR_PGSERR() != 0:
   926  		return errFlashPGS
   927  	case stm32.FLASH.GetSR_PGPERR() != 0:
   928  		return errFlashPGP
   929  	case stm32.FLASH.GetSR_PGAERR() != 0:
   930  		return errFlashPGA
   931  	case stm32.FLASH.GetSR_WRPERR() != 0:
   932  		return errFlashWRP
   933  	}
   934  
   935  	return nil
   936  }