github.com/tinygo-org/tinygo@v0.31.3-0.20240404173401-90b0bf646c27/src/runtime/runtime_stm32wlx.go (about) 1 //go:build stm32wlx 2 3 package runtime 4 5 import ( 6 "device/stm32" 7 "machine" 8 ) 9 10 const ( 11 /* PLL Options RMN0461.p247 */ 12 PLL_M = 2 13 PLL_N = 6 14 PLL_R = 2 15 PLL_P = 2 16 PLL_Q = 2 17 ) 18 19 func init() { 20 21 // Configure 48Mhz clock 22 initCLK() 23 24 // Timers init 25 initTickTimer(&machine.TIM1) 26 27 // UART init 28 machine.InitSerial() 29 } 30 31 func initCLK() { 32 33 // Enable HSE32 VDDTCXO output on package pin PB0-VDDTCXO 34 stm32.RCC.CR.ReplaceBits(stm32.RCC_CR_HSEBYPPWR_VDDTCXO, stm32.RCC_CR_HSEBYPPWR_Msk, 0) 35 36 // SYSCLOCK from HSE32 clock division factor (SYSCLOCK=HSE32) 37 stm32.RCC.CR.ReplaceBits(stm32.RCC_CR_HSEPRE_Div1, stm32.RCC_CR_HSEPRE_Msk, 0) 38 39 // enable external Clock HSE32 TXCO (RM0461p226) 40 stm32.RCC.CR.SetBits(stm32.RCC_CR_HSEBYPPWR) 41 stm32.RCC.CR.SetBits(stm32.RCC_CR_HSEON) 42 for !stm32.RCC.CR.HasBits(stm32.RCC_CR_HSERDY) { 43 } 44 45 // Disable PLL 46 stm32.RCC.CR.ClearBits(stm32.RCC_CR_PLLON) 47 for stm32.RCC.CR.HasBits(stm32.RCC_CR_PLLRDY) { 48 } 49 50 // Configure the PLL 51 stm32.RCC.PLLCFGR.Set((PLL_M-1)<<stm32.RCC_PLLCFGR_PLLM_Pos | 52 ((PLL_N) << stm32.RCC_PLLCFGR_PLLN_Pos) | 53 ((PLL_Q - 1) << stm32.RCC_PLLCFGR_PLLQ_Pos) | 54 ((PLL_R - 1) << stm32.RCC_PLLCFGR_PLLR_Pos) | 55 ((PLL_P - 1) << stm32.RCC_PLLCFGR_PLLP_Pos) | 56 stm32.RCC_PLLCFGR_PLLSRC_HSE32 | stm32.RCC_PLLCFGR_PLLPEN | stm32.RCC_PLLCFGR_PLLQEN) 57 58 // Enable PLL 59 stm32.RCC.CR.SetBits(stm32.RCC_CR_PLLON) 60 for !stm32.RCC.CR.HasBits(stm32.RCC_CR_PLLRDY) { 61 } 62 63 // Enable PLL System Clock output. 64 stm32.RCC.PLLCFGR.SetBits(stm32.RCC_PLLCFGR_PLLREN) 65 for !stm32.RCC.CR.HasBits(stm32.RCC_CR_PLLRDY) { 66 } 67 68 // Set Flash Latency of 2 69 stm32.FLASH.ACR.ReplaceBits(stm32.Flash_ACR_LATENCY_WS2, stm32.Flash_ACR_LATENCY_Msk, 0) 70 for (stm32.FLASH.ACR.Get() & stm32.Flash_ACR_LATENCY_Msk) != stm32.Flash_ACR_LATENCY_WS2 { 71 } 72 73 // HCLK1 clock division factor 74 stm32.RCC.CFGR.ReplaceBits(stm32.RCC_CFGR_HPRE_Div1, stm32.RCC_CFGR_HPRE_Msk, 0) 75 for !stm32.RCC.CFGR.HasBits(stm32.RCC_CFGR_HPREF) { 76 } 77 78 // HCLK3 clock division factor 79 stm32.RCC.EXTCFGR.ReplaceBits(stm32.RCC_EXTCFGR_SHDHPRE_Div1, stm32.RCC_EXTCFGR_SHDHPRE_Msk, 0) 80 for !stm32.RCC.EXTCFGR.HasBits(stm32.RCC_EXTCFGR_SHDHPREF) { 81 } 82 83 // PCLK1 clock division factor 84 stm32.RCC.CFGR.ReplaceBits(stm32.RCC_CFGR_PPRE1_Div1, stm32.RCC_CFGR_PPRE1_Msk, 0) 85 for !stm32.RCC.CFGR.HasBits(stm32.RCC_CFGR_PPRE1F) { 86 } 87 88 // PCLK2 clock division factor 89 stm32.RCC.CFGR.ReplaceBits(stm32.RCC_CFGR_PPRE2_Div1, stm32.RCC_CFGR_PPRE2_Msk, 0) 90 for !stm32.RCC.CFGR.HasBits(stm32.RCC_CFGR_PPRE2F) { 91 } 92 93 // Set clock source to PLL 94 stm32.RCC.CFGR.ReplaceBits(stm32.RCC_CFGR_SW_PLLR, stm32.RCC_CFGR_SW_Msk, 0) 95 for (stm32.RCC.CFGR.Get() & stm32.RCC_CFGR_SWS_Msk) != (stm32.RCC_CFGR_SWS_PLLR << stm32.RCC_CFGR_SWS_Pos) { 96 } 97 98 } 99 100 func putchar(c byte) { 101 machine.Serial.WriteByte(c) 102 } 103 104 func getchar() byte { 105 for machine.Serial.Buffered() == 0 { 106 Gosched() 107 } 108 v, _ := machine.Serial.ReadByte() 109 return v 110 } 111 112 func buffered() int { 113 return machine.Serial.Buffered() 114 }