github.com/tinygo-org/tinygo@v0.31.3-0.20240404173401-90b0bf646c27/targets/esp32c3.ld (about) 1 /* Linker script for the ESP32-C3 2 * 3 * The ESP32-C3 has a rather funky memory layout, more like its Xtensa 4 * predecessors than like other RISC-V chips: 5 * - It has 384kB of regular RAM. This RAM can be used both as data RAM and 6 * instruction RAM, but needs to be accessed via a different address space 7 * (DRAM/IRAM). 8 * - It has another 16kB of RAM, that could be used as regular RAM but is 9 * normally used by the flash cache. 10 * - It has 8MB of address space for the DROM and IROM, but for some reason 11 * this address space is shared. So it isn't possible to map all DROM at 12 * 0x3C000000 and all DRAM at 0x42000000: they would overlap. 13 * - The MMU works in pages of 64kB, which means the bottom 16 bits of the 14 * address in flash and the address in DROM/IROM need to match. 15 * - Memory in DRAM and IRAM is loaded at reset by the ROM bootloader. 16 * Luckily, this doesn't have significant alignment requirements. 17 * 18 * This linker script has been written to carefully work around (or with) these 19 * limitations: 20 * - It adds dummy sections so that the bottom 16 bits of the virtual address 21 * and the physical address (in the generated firmware image) match. 22 * - It also offsets sections that share an address space using those same 23 * dummy sections. 24 * - It sorts the sections by load address, to avoid surprises as esptool.py 25 * also does it. 26 * This way, it's possible to create a very small firmware image that still 27 * conforms to the expectations of esptool.py and the ROM bootloader. 28 */ 29 30 MEMORY 31 { 32 /* Note: DRAM and IRAM below are actually in the same 384K address space. */ 33 DRAM (rw) : ORIGIN = 0x3FC80000, LENGTH = 384K /* Internal SRAM 1 (data bus) */ 34 IRAM (x) : ORIGIN = 0x40380000, LENGTH = 384K /* Internal SRAM 1 (instruction bus) */ 35 36 /* Note: DROM and IROM below are actually in the same 8M address space. */ 37 DROM (r) : ORIGIN = 0x3C000000, LENGTH = 8M /* Data bus (read-only) */ 38 IROM (rx) : ORIGIN = 0x42000000, LENGTH = 8M /* Instruction bus */ 39 } 40 41 /* The entry point. It is set in the image flashed to the chip, so must be 42 * defined. 43 */ 44 ENTRY(call_start_cpu0) 45 46 SECTIONS 47 { 48 /* Dummy section to make sure the .rodata section starts exactly behind the 49 * image header. 50 */ 51 .rodata_dummy (NOLOAD): ALIGN(4) 52 { 53 . += 0x18; /* image header at start of flash: esp_image_header_t */ 54 . += 0x8; /* DROM segment header (8 bytes) */ 55 } > DROM 56 57 /* Constant global variables, stored in DROM. 58 */ 59 .rodata : ALIGN(4) 60 { 61 *(.rodata*) 62 . = ALIGN (4); 63 } >DROM 64 65 /* Put the stack at the bottom of DRAM, so that the application will 66 * crash on stack overflow instead of silently corrupting memory. 67 * See: http://blog.japaric.io/stack-overflow-protection/ 68 * TODO: this might not actually work because memory protection hasn't been set up. 69 */ 70 .stack (NOLOAD) : 71 { 72 . = ALIGN(16); 73 . += _stack_size; 74 _stack_top = .; 75 } >DRAM 76 77 /* Global variables that are mutable and zero-initialized. 78 * These must be zeroed at startup (unlike data, which is loaded by the 79 * bootloader). 80 */ 81 .bss (NOLOAD) : ALIGN(4) 82 { 83 . = ALIGN (4); 84 _sbss = ABSOLUTE(.); 85 *(.sbss) 86 *(.bss .bss.*) 87 . = ALIGN (4); 88 _ebss = ABSOLUTE(.); 89 } >DRAM 90 91 /* Mutable global variables. This data (in the DRAM segment) is initialized 92 * by the ROM bootloader. 93 */ 94 .data : ALIGN(4) 95 { 96 . = ALIGN (4); 97 _sdata = ABSOLUTE(.); 98 *(.sdata) 99 *(.data .data.*) 100 *(.dram*) 101 . = ALIGN (4); 102 _edata = ABSOLUTE(.); 103 } >DRAM 104 105 /* Dummy section to make sure the .init section (in the IRAM segment) is just 106 * behind the DRAM segment. For IRAM and DRAM, we luckily don't have to 107 * worry about 64kB pages or image headers as they're loaded in RAM by the 108 * bootloader (not mapped from flash). 109 */ 110 .iram_dummy (NOLOAD): ALIGN(4) 111 { 112 . += SIZEOF(.stack); 113 . += SIZEOF(.bss); 114 . += SIZEOF(.data); 115 } > IRAM 116 117 /* IRAM segment. This contains some functions that always need to be loaded 118 * in IRAM, and contains initialization code. 119 * The initialization code is later reclaimed for the heap, so no RAM is 120 * wasted. 121 */ 122 .iram : ALIGN(4) 123 { 124 *(.iram*) 125 *(.wifislprxiram*) 126 *(.wifiextrairam*) 127 *(.wifi0iram*) 128 *(.wifislpiram*) 129 *(.wifirxiram*) 130 __init_start = .; 131 *(.init) 132 __init_end = .; 133 } >IRAM 134 135 /* Dummy section to put the IROM segment exactly behind the IRAM segment. 136 * This has to follow the app image format exactly. 137 */ 138 .text_dummy (NOLOAD): ALIGN(4) 139 { 140 /* Note: DRAM and DROM are not always present so the header should only 141 * be inserted if it actually exists. 142 */ 143 . += 0x18; /* esp_image_header_t */ 144 . += SIZEOF(.rodata) + ((SIZEOF(.rodata) != 0) ? 0x8 : 0); /* DROM segment (optional) */ 145 . += SIZEOF(.data) + ((SIZEOF(.data) != 0) ? 0x8 : 0); /* DRAM segment (optional) */ 146 . += SIZEOF(.iram) + 0x8; /* IRAM segment */ 147 . += 0x8; /* IROM segment header */ 148 } > IROM 149 150 /* IROM segment. This contains all the actual code and is placed right after 151 * the DROM segment. 152 */ 153 .text : ALIGN(4) 154 { 155 . = ALIGN (256); 156 *(.text.exception_vectors) 157 . = ALIGN (4); 158 *(.text .text.*) 159 } >IROM 160 161 /DISCARD/ : 162 { 163 *(.eh_frame) /* causes 'no memory region specified' error in lld */ 164 } 165 166 /* Check that the boot ROM stack (for the APP CPU) does not overlap with the 167 * data that is loaded by the boot ROM. This is unlikely to happen in 168 * practice. 169 * The magic value comes from here: 170 * https://github.com/espressif/esp-idf/blob/61299f879e/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld#L191 171 */ 172 ASSERT((_edata + SIZEOF(.iram)) < 0x3FCDE710, "the .iram section overlaps with the stack used by the boot ROM, possibly causing corruption at startup") 173 } 174 175 /* For the garbage collector. 176 * Note that _heap_start starts after _edata + most of the IRAM section. 177 * It starts just before the initialisation code, which isn't necessary anymore 178 * after startup and can thus be overwritten by the heap. 179 */ 180 _globals_start = _sbss; 181 _globals_end = _edata; 182 _heap_start = _edata + SIZEOF(.iram) - (__init_end - __init_start); 183 _heap_end = ORIGIN(DRAM) + LENGTH(DRAM); 184 185 _stack_size = 4K; 186 187 /* ROM functions used for setting up the flash mapping. 188 */ 189 Cache_Invalidate_ICache_All = 0x400004d8; 190 Cache_Suspend_ICache = 0x40000524; 191 Cache_Resume_ICache = 0x40000528; 192 Cache_MMU_Init = 0x4000055c; 193 Cache_Dbus_MMU_Set = 0x40000564; 194 195 /* From ESP-IDF: 196 * components/esp_rom/esp32c3/ld/esp32c3.rom.libgcc.ld 197 * These are called from LLVM during codegen. The original license is Apache 198 * 2.0. 199 */ 200 __absvdi2 = 0x40000764; 201 __absvsi2 = 0x40000768; 202 __adddf3 = 0x4000076c; 203 __addsf3 = 0x40000770; 204 __addvdi3 = 0x40000774; 205 __addvsi3 = 0x40000778; 206 __ashldi3 = 0x4000077c; 207 __ashrdi3 = 0x40000780; 208 __bswapdi2 = 0x40000784; 209 __bswapsi2 = 0x40000788; 210 __clear_cache = 0x4000078c; 211 __clrsbdi2 = 0x40000790; 212 __clrsbsi2 = 0x40000794; 213 __clzdi2 = 0x40000798; 214 __clzsi2 = 0x4000079c; 215 __cmpdi2 = 0x400007a0; 216 __ctzdi2 = 0x400007a4; 217 __ctzsi2 = 0x400007a8; 218 __divdc3 = 0x400007ac; 219 __divdf3 = 0x400007b0; 220 __divdi3 = 0x400007b4; 221 __divsc3 = 0x400007b8; 222 __divsf3 = 0x400007bc; 223 __divsi3 = 0x400007c0; 224 __eqdf2 = 0x400007c4; 225 __eqsf2 = 0x400007c8; 226 __extendsfdf2 = 0x400007cc; 227 __ffsdi2 = 0x400007d0; 228 __ffssi2 = 0x400007d4; 229 __fixdfdi = 0x400007d8; 230 __fixdfsi = 0x400007dc; 231 __fixsfdi = 0x400007e0; 232 __fixsfsi = 0x400007e4; 233 __fixunsdfsi = 0x400007e8; 234 __fixunssfdi = 0x400007ec; 235 __fixunssfsi = 0x400007f0; 236 __floatdidf = 0x400007f4; 237 __floatdisf = 0x400007f8; 238 __floatsidf = 0x400007fc; 239 __floatsisf = 0x40000800; 240 __floatundidf = 0x40000804; 241 __floatundisf = 0x40000808; 242 __floatunsidf = 0x4000080c; 243 __floatunsisf = 0x40000810; 244 __gcc_bcmp = 0x40000814; 245 __gedf2 = 0x40000818; 246 __gesf2 = 0x4000081c; 247 __gtdf2 = 0x40000820; 248 __gtsf2 = 0x40000824; 249 __ledf2 = 0x40000828; 250 __lesf2 = 0x4000082c; 251 __lshrdi3 = 0x40000830; 252 __ltdf2 = 0x40000834; 253 __ltsf2 = 0x40000838; 254 __moddi3 = 0x4000083c; 255 __modsi3 = 0x40000840; 256 __muldc3 = 0x40000844; 257 __muldf3 = 0x40000848; 258 __muldi3 = 0x4000084c; 259 __mulsc3 = 0x40000850; 260 __mulsf3 = 0x40000854; 261 __mulsi3 = 0x40000858; 262 __mulvdi3 = 0x4000085c; 263 __mulvsi3 = 0x40000860; 264 __nedf2 = 0x40000864; 265 __negdf2 = 0x40000868; 266 __negdi2 = 0x4000086c; 267 __negsf2 = 0x40000870; 268 __negvdi2 = 0x40000874; 269 __negvsi2 = 0x40000878; 270 __nesf2 = 0x4000087c; 271 __paritysi2 = 0x40000880; 272 __popcountdi2 = 0x40000884; 273 __popcountsi2 = 0x40000888; 274 __powidf2 = 0x4000088c; 275 __powisf2 = 0x40000890; 276 __subdf3 = 0x40000894; 277 __subsf3 = 0x40000898; 278 __subvdi3 = 0x4000089c; 279 __subvsi3 = 0x400008a0; 280 __truncdfsf2 = 0x400008a4; 281 __ucmpdi2 = 0x400008a8; 282 __udivdi3 = 0x400008ac; 283 __udivmoddi4 = 0x400008b0; 284 __udivsi3 = 0x400008b4; 285 __udiv_w_sdiv = 0x400008b8; 286 __umoddi3 = 0x400008bc; 287 __umodsi3 = 0x400008c0; 288 __unorddf2 = 0x400008c4; 289 __unordsf2 = 0x400008c8; 290 291 /* From ESP-IDF: 292 * components/esp_rom/esp32c3/ld/esp32c3.rom.newlib.ld 293 * These are called during codegen and thus it's a good idea to make them always 294 * available. ROM functions may also be faster than functions in IROM (that go 295 * through the flash cache) and are always available in interrupts. 296 */ 297 memset = 0x40000354; 298 memcpy = 0x40000358; 299 memmove = 0x4000035c; 300 301 302 /* From ESP-IDF: 303 * components/esp_rom/esp32c3/ld/esp32c3.rom.ld 304 * These are needed for wifi/BLE support and are available on the Apache 2.0 305 * license. 306 */ 307 /* ROM function interface esp32c3.rom.ld for esp32c3 308 * 309 * 310 * Generated from ./interface-esp32c3.yml md5sum 93b28a9e1fe42d212018eb4336849208 311 * 312 * Compatible with ROM where ECO version equal or greater to 0. 313 * 314 * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. 315 */ 316 317 /*************************************** 318 Group common 319 ***************************************/ 320 321 /* Functions */ 322 rtc_get_reset_reason = 0x40000018; 323 analog_super_wdt_reset_happened = 0x4000001c; 324 jtag_cpu_reset_happened = 0x40000020; 325 rtc_get_wakeup_cause = 0x40000024; 326 rtc_boot_control = 0x40000028; 327 rtc_select_apb_bridge = 0x4000002c; 328 rtc_unhold_all_pads = 0x40000030; 329 set_rtc_memory_crc = 0x40000034; 330 cacl_rtc_memory_crc = 0x40000038; 331 ets_is_print_boot = 0x4000003c; 332 ets_printf = 0x40000040; 333 ets_install_putc1 = 0x40000044; 334 ets_install_uart_printf = 0x40000048; 335 ets_install_putc2 = 0x4000004c; 336 PROVIDE( ets_delay_us = 0x40000050 ); 337 ets_get_stack_info = 0x40000054; 338 ets_install_lock = 0x40000058; 339 ets_backup_dma_copy = 0x4000005c; 340 ets_apb_backup_init_lock_func = 0x40000060; 341 UartRxString = 0x40000064; 342 uart_tx_one_char = 0x40000068; 343 uart_tx_one_char2 = 0x4000006c; 344 uart_rx_one_char = 0x40000070; 345 uart_rx_one_char_block = 0x40000074; 346 uart_rx_readbuff = 0x40000078; 347 uartAttach = 0x4000007c; 348 uart_tx_flush = 0x40000080; 349 uart_tx_wait_idle = 0x40000084; 350 uart_div_modify = 0x40000088; 351 multofup = 0x4000008c; 352 software_reset = 0x40000090; 353 software_reset_cpu = 0x40000094; 354 assist_debug_clock_enable = 0x40000098; 355 assist_debug_record_enable = 0x4000009c; 356 clear_super_wdt_reset_flag = 0x400000a0; 357 disable_default_watchdog = 0x400000a4; 358 send_packet = 0x400000a8; 359 recv_packet = 0x400000ac; 360 GetUartDevice = 0x400000b0; 361 UartDwnLdProc = 0x400000b4; 362 Uart_Init = 0x400000b8; 363 ets_set_user_start = 0x400000bc; 364 /* Data (.data, .bss, .rodata) */ 365 ets_rom_layout_p = 0x3ff1fffc; 366 ets_ops_table_ptr = 0x3fcdfffc; 367 368 369 /*************************************** 370 Group miniz 371 ***************************************/ 372 373 /* Functions */ 374 mz_adler32 = 0x400000c0; 375 mz_crc32 = 0x400000c4; 376 mz_free = 0x400000c8; 377 tdefl_compress = 0x400000cc; 378 tdefl_compress_buffer = 0x400000d0; 379 tdefl_compress_mem_to_heap = 0x400000d4; 380 tdefl_compress_mem_to_mem = 0x400000d8; 381 tdefl_compress_mem_to_output = 0x400000dc; 382 tdefl_get_adler32 = 0x400000e0; 383 tdefl_get_prev_return_status = 0x400000e4; 384 tdefl_init = 0x400000e8; 385 tdefl_write_image_to_png_file_in_memory = 0x400000ec; 386 tdefl_write_image_to_png_file_in_memory_ex = 0x400000f0; 387 tinfl_decompress = 0x400000f4; 388 tinfl_decompress_mem_to_callback = 0x400000f8; 389 tinfl_decompress_mem_to_heap = 0x400000fc; 390 tinfl_decompress_mem_to_mem = 0x40000100; 391 392 393 /*************************************** 394 Group tjpgd 395 ***************************************/ 396 397 /* Functions */ 398 PROVIDE( jd_prepare = 0x40000104 ); 399 PROVIDE( jd_decomp = 0x40000108 ); 400 401 402 /*************************************** 403 Group spiflash_legacy 404 ***************************************/ 405 406 /* Functions */ 407 PROVIDE( esp_rom_spiflash_wait_idle = 0x4000010c ); 408 PROVIDE( esp_rom_spiflash_write_encrypted = 0x40000110 ); 409 PROVIDE( esp_rom_spiflash_write_encrypted_dest = 0x40000114 ); 410 PROVIDE( esp_rom_spiflash_write_encrypted_enable = 0x40000118 ); 411 PROVIDE( esp_rom_spiflash_write_encrypted_disable = 0x4000011c ); 412 PROVIDE( esp_rom_spiflash_erase_chip = 0x40000120 ); 413 PROVIDE( esp_rom_spiflash_erase_block = 0x40000124 ); 414 PROVIDE( esp_rom_spiflash_erase_sector = 0x40000128 ); 415 PROVIDE( esp_rom_spiflash_write = 0x4000012c ); 416 PROVIDE( esp_rom_spiflash_read = 0x40000130 ); 417 PROVIDE( esp_rom_spiflash_config_param = 0x40000134 ); 418 PROVIDE( esp_rom_spiflash_read_user_cmd = 0x40000138 ); 419 PROVIDE( esp_rom_spiflash_select_qio_pins = 0x4000013c ); 420 PROVIDE( esp_rom_spiflash_unlock = 0x40000140 ); 421 PROVIDE( esp_rom_spi_flash_auto_sus_res = 0x40000144 ); 422 PROVIDE( esp_rom_spi_flash_send_resume = 0x40000148 ); 423 PROVIDE( esp_rom_spi_flash_update_id = 0x4000014c ); 424 PROVIDE( esp_rom_spiflash_config_clk = 0x40000150 ); 425 PROVIDE( esp_rom_spiflash_config_readmode = 0x40000154 ); 426 PROVIDE( esp_rom_spiflash_read_status = 0x40000158 ); 427 PROVIDE( esp_rom_spiflash_read_statushigh = 0x4000015c ); 428 PROVIDE( esp_rom_spiflash_write_status = 0x40000160 ); 429 PROVIDE( esp_rom_spiflash_attach = 0x40000164 ); 430 PROVIDE( spi_flash_get_chip_size = 0x40000168 ); 431 PROVIDE( spi_flash_guard_set = 0x4000016c ); 432 PROVIDE( spi_flash_guard_get = 0x40000170 ); 433 PROVIDE( spi_flash_write_config_set = 0x40000174 ); 434 PROVIDE( spi_flash_write_config_get = 0x40000178 ); 435 PROVIDE( spi_flash_safe_write_address_func_set = 0x4000017c ); 436 PROVIDE( spi_flash_unlock = 0x40000180 ); 437 PROVIDE( spi_flash_erase_range = 0x40000184 ); 438 PROVIDE( spi_flash_erase_sector = 0x40000188 ); 439 PROVIDE( spi_flash_write = 0x4000018c ); 440 PROVIDE( spi_flash_read = 0x40000190 ); 441 PROVIDE( spi_flash_write_encrypted = 0x40000194 ); 442 PROVIDE( spi_flash_read_encrypted = 0x40000198 ); 443 PROVIDE( spi_flash_mmap_os_func_set = 0x4000019c ); 444 PROVIDE( spi_flash_mmap_page_num_init = 0x400001a0 ); 445 PROVIDE( spi_flash_mmap = 0x400001a4 ); 446 PROVIDE( spi_flash_mmap_pages = 0x400001a8 ); 447 PROVIDE( spi_flash_munmap = 0x400001ac ); 448 PROVIDE( spi_flash_mmap_dump = 0x400001b0 ); 449 PROVIDE( spi_flash_check_and_flush_cache = 0x400001b4 ); 450 PROVIDE( spi_flash_mmap_get_free_pages = 0x400001b8 ); 451 PROVIDE( spi_flash_cache2phys = 0x400001bc ); 452 PROVIDE( spi_flash_phys2cache = 0x400001c0 ); 453 PROVIDE( spi_flash_disable_cache = 0x400001c4 ); 454 PROVIDE( spi_flash_restore_cache = 0x400001c8 ); 455 PROVIDE( spi_flash_cache_enabled = 0x400001cc ); 456 PROVIDE( spi_flash_enable_cache = 0x400001d0 ); 457 PROVIDE( spi_cache_mode_switch = 0x400001d4 ); 458 PROVIDE( spi_common_set_dummy_output = 0x400001d8 ); 459 PROVIDE( spi_common_set_flash_cs_timing = 0x400001dc ); 460 PROVIDE( esp_enable_cache_flash_wrap = 0x400001e0 ); 461 PROVIDE( SPIEraseArea = 0x400001e4 ); 462 PROVIDE( SPILock = 0x400001e8 ); 463 PROVIDE( SPIMasterReadModeCnfig = 0x400001ec ); 464 PROVIDE( SPI_Common_Command = 0x400001f0 ); 465 PROVIDE( SPI_WakeUp = 0x400001f4 ); 466 PROVIDE( SPI_block_erase = 0x400001f8 ); 467 PROVIDE( SPI_chip_erase = 0x400001fc ); 468 PROVIDE( SPI_init = 0x40000200 ); 469 PROVIDE( SPI_page_program = 0x40000204 ); 470 PROVIDE( SPI_read_data = 0x40000208 ); 471 PROVIDE( SPI_sector_erase = 0x4000020c ); 472 PROVIDE( SPI_write_enable = 0x40000210 ); 473 PROVIDE( SelectSpiFunction = 0x40000214 ); 474 PROVIDE( SetSpiDrvs = 0x40000218 ); 475 PROVIDE( Wait_SPI_Idle = 0x4000021c ); 476 PROVIDE( spi_dummy_len_fix = 0x40000220 ); 477 PROVIDE( Disable_QMode = 0x40000224 ); 478 PROVIDE( Enable_QMode = 0x40000228 ); 479 /* Data (.data, .bss, .rodata) */ 480 PROVIDE( rom_spiflash_legacy_funcs = 0x3fcdfff4 ); 481 PROVIDE( rom_spiflash_legacy_data = 0x3fcdfff0 ); 482 PROVIDE( g_flash_guard_ops = 0x3fcdfff8 ); 483 484 485 /*************************************** 486 Group spi_flash_hal 487 ***************************************/ 488 489 /* Functions */ 490 PROVIDE( spi_flash_hal_poll_cmd_done = 0x4000022c ); 491 PROVIDE( spi_flash_hal_device_config = 0x40000230 ); 492 PROVIDE( spi_flash_hal_configure_host_io_mode = 0x40000234 ); 493 PROVIDE( spi_flash_hal_common_command = 0x40000238 ); 494 PROVIDE( spi_flash_hal_read = 0x4000023c ); 495 PROVIDE( spi_flash_hal_erase_chip = 0x40000240 ); 496 PROVIDE( spi_flash_hal_erase_sector = 0x40000244 ); 497 PROVIDE( spi_flash_hal_erase_block = 0x40000248 ); 498 PROVIDE( spi_flash_hal_program_page = 0x4000024c ); 499 PROVIDE( spi_flash_hal_set_write_protect = 0x40000250 ); 500 PROVIDE( spi_flash_hal_host_idle = 0x40000254 ); 501 502 503 /*************************************** 504 Group spi_flash_chips 505 ***************************************/ 506 507 /* Functions */ 508 PROVIDE( spi_flash_chip_generic_probe = 0x40000258 ); 509 PROVIDE( spi_flash_chip_generic_detect_size = 0x4000025c ); 510 PROVIDE( spi_flash_chip_generic_write = 0x40000260 ); 511 PROVIDE( spi_flash_chip_generic_write_encrypted = 0x40000264 ); 512 PROVIDE( spi_flash_chip_generic_set_write_protect = 0x40000268 ); 513 PROVIDE( spi_flash_common_write_status_16b_wrsr = 0x4000026c ); 514 PROVIDE( spi_flash_chip_generic_reset = 0x40000270 ); 515 PROVIDE( spi_flash_chip_generic_erase_chip = 0x40000274 ); 516 PROVIDE( spi_flash_chip_generic_erase_sector = 0x40000278 ); 517 PROVIDE( spi_flash_chip_generic_erase_block = 0x4000027c ); 518 PROVIDE( spi_flash_chip_generic_page_program = 0x40000280 ); 519 PROVIDE( spi_flash_chip_generic_get_write_protect = 0x40000284 ); 520 PROVIDE( spi_flash_common_read_status_16b_rdsr_rdsr2 = 0x40000288 ); 521 PROVIDE( spi_flash_chip_generic_read_reg = 0x4000028c ); 522 PROVIDE( spi_flash_chip_generic_yield = 0x40000290 ); 523 PROVIDE( spi_flash_generic_wait_host_idle = 0x40000294 ); 524 PROVIDE( spi_flash_chip_generic_wait_idle = 0x40000298 ); 525 PROVIDE( spi_flash_chip_generic_config_host_io_mode = 0x4000029c ); 526 PROVIDE( spi_flash_chip_generic_read = 0x400002a0 ); 527 PROVIDE( spi_flash_common_read_status_8b_rdsr2 = 0x400002a4 ); 528 PROVIDE( spi_flash_chip_generic_get_io_mode = 0x400002a8 ); 529 PROVIDE( spi_flash_common_read_status_8b_rdsr = 0x400002ac ); 530 PROVIDE( spi_flash_common_write_status_8b_wrsr = 0x400002b0 ); 531 PROVIDE( spi_flash_common_write_status_8b_wrsr2 = 0x400002b4 ); 532 PROVIDE( spi_flash_common_set_io_mode = 0x400002b8 ); 533 PROVIDE( spi_flash_chip_generic_set_io_mode = 0x400002bc ); 534 PROVIDE( spi_flash_chip_gd_get_io_mode = 0x400002c0 ); 535 PROVIDE( spi_flash_chip_gd_probe = 0x400002c4 ); 536 PROVIDE( spi_flash_chip_gd_set_io_mode = 0x400002c8 ); 537 /* Data (.data, .bss, .rodata) */ 538 PROVIDE( spi_flash_chip_generic_config_data = 0x3fcdffec ); 539 540 541 /*************************************** 542 Group memspi_host 543 ***************************************/ 544 545 /* Functions */ 546 PROVIDE( memspi_host_read_id_hs = 0x400002cc ); 547 PROVIDE( memspi_host_read_status_hs = 0x400002d0 ); 548 PROVIDE( memspi_host_flush_cache = 0x400002d4 ); 549 PROVIDE( memspi_host_erase_chip = 0x400002d8 ); 550 PROVIDE( memspi_host_erase_sector = 0x400002dc ); 551 PROVIDE( memspi_host_erase_block = 0x400002e0 ); 552 PROVIDE( memspi_host_program_page = 0x400002e4 ); 553 PROVIDE( memspi_host_read = 0x400002e8 ); 554 PROVIDE( memspi_host_set_write_protect = 0x400002ec ); 555 PROVIDE( memspi_host_set_max_read_len = 0x400002f0 ); 556 PROVIDE( memspi_host_read_data_slicer = 0x400002f4 ); 557 PROVIDE( memspi_host_write_data_slicer = 0x400002f8 ); 558 559 560 /*************************************** 561 Group esp_flash 562 ***************************************/ 563 564 /* Functions */ 565 PROVIDE( esp_flash_chip_driver_initialized = 0x400002fc ); 566 PROVIDE( esp_flash_read_id = 0x40000300 ); 567 PROVIDE( esp_flash_get_size = 0x40000304 ); 568 PROVIDE( esp_flash_erase_chip = 0x40000308 ); 569 PROVIDE( rom_esp_flash_erase_region = 0x4000030c ); 570 PROVIDE( esp_flash_get_chip_write_protect = 0x40000310 ); 571 PROVIDE( esp_flash_set_chip_write_protect = 0x40000314 ); 572 PROVIDE( esp_flash_get_protectable_regions = 0x40000318 ); 573 PROVIDE( esp_flash_get_protected_region = 0x4000031c ); 574 PROVIDE( esp_flash_set_protected_region = 0x40000320 ); 575 PROVIDE( esp_flash_read = 0x40000324 ); 576 PROVIDE( esp_flash_write = 0x40000328 ); 577 PROVIDE( esp_flash_write_encrypted = 0x4000032c ); 578 PROVIDE( esp_flash_read_encrypted = 0x40000330 ); 579 PROVIDE( esp_flash_get_io_mode = 0x40000334 ); 580 PROVIDE( esp_flash_set_io_mode = 0x40000338 ); 581 PROVIDE( spi_flash_boot_attach = 0x4000033c ); 582 PROVIDE( spi_flash_dump_counters = 0x40000340 ); 583 PROVIDE( spi_flash_get_counters = 0x40000344 ); 584 PROVIDE( spi_flash_op_counters_config = 0x40000348 ); 585 PROVIDE( spi_flash_reset_counters = 0x4000034c ); 586 /* Data (.data, .bss, .rodata) */ 587 PROVIDE( esp_flash_default_chip = 0x3fcdffe8 ); 588 PROVIDE( esp_flash_api_funcs = 0x3fcdffe4 ); 589 590 591 /*************************************** 592 Group cache 593 ***************************************/ 594 595 /* Functions */ 596 PROVIDE( Cache_Get_ICache_Line_Size = 0x400004b0 ); 597 PROVIDE( Cache_Get_Mode = 0x400004b4 ); 598 PROVIDE( Cache_Address_Through_IBus = 0x400004b8 ); 599 PROVIDE( Cache_Address_Through_DBus = 0x400004bc ); 600 PROVIDE( Cache_Set_Default_Mode = 0x400004c0 ); 601 PROVIDE( Cache_Enable_Defalut_ICache_Mode = 0x400004c4 ); 602 PROVIDE( ROM_Boot_Cache_Init = 0x400004c8 ); 603 PROVIDE( Cache_Invalidate_ICache_Items = 0x400004cc ); 604 PROVIDE( Cache_Op_Addr = 0x400004d0 ); 605 PROVIDE( Cache_Invalidate_Addr = 0x400004d4 ); 606 PROVIDE( Cache_Invalidate_ICache_All = 0x400004d8 ); 607 PROVIDE( Cache_Mask_All = 0x400004dc ); 608 PROVIDE( Cache_UnMask_Dram0 = 0x400004e0 ); 609 PROVIDE( Cache_Suspend_ICache_Autoload = 0x400004e4 ); 610 PROVIDE( Cache_Resume_ICache_Autoload = 0x400004e8 ); 611 PROVIDE( Cache_Start_ICache_Preload = 0x400004ec ); 612 PROVIDE( Cache_ICache_Preload_Done = 0x400004f0 ); 613 PROVIDE( Cache_End_ICache_Preload = 0x400004f4 ); 614 PROVIDE( Cache_Config_ICache_Autoload = 0x400004f8 ); 615 PROVIDE( Cache_Enable_ICache_Autoload = 0x400004fc ); 616 PROVIDE( Cache_Disable_ICache_Autoload = 0x40000500 ); 617 PROVIDE( Cache_Enable_ICache_PreLock = 0x40000504 ); 618 PROVIDE( Cache_Disable_ICache_PreLock = 0x40000508 ); 619 PROVIDE( Cache_Lock_ICache_Items = 0x4000050c ); 620 PROVIDE( Cache_Unlock_ICache_Items = 0x40000510 ); 621 PROVIDE( Cache_Lock_Addr = 0x40000514 ); 622 PROVIDE( Cache_Unlock_Addr = 0x40000518 ); 623 PROVIDE( Cache_Disable_ICache = 0x4000051c ); 624 PROVIDE( Cache_Enable_ICache = 0x40000520 ); 625 PROVIDE( Cache_Suspend_ICache = 0x40000524 ); 626 PROVIDE( Cache_Resume_ICache = 0x40000528 ); 627 PROVIDE( Cache_Freeze_ICache_Enable = 0x4000052c ); 628 PROVIDE( Cache_Freeze_ICache_Disable = 0x40000530 ); 629 PROVIDE( Cache_Pms_Lock = 0x40000534 ); 630 PROVIDE( Cache_Ibus_Pms_Set_Addr = 0x40000538 ); 631 PROVIDE( Cache_Ibus_Pms_Set_Attr = 0x4000053c ); 632 PROVIDE( Cache_Dbus_Pms_Set_Addr = 0x40000540 ); 633 PROVIDE( Cache_Dbus_Pms_Set_Attr = 0x40000544 ); 634 PROVIDE( Cache_Set_IDROM_MMU_Size = 0x40000548 ); 635 PROVIDE( Cache_Get_IROM_MMU_End = 0x4000054c ); 636 PROVIDE( Cache_Get_DROM_MMU_End = 0x40000550 ); 637 PROVIDE( Cache_Owner_Init = 0x40000554 ); 638 PROVIDE( Cache_Occupy_ICache_MEMORY = 0x40000558 ); 639 PROVIDE( Cache_MMU_Init = 0x4000055c ); 640 PROVIDE( Cache_Ibus_MMU_Set = 0x40000560 ); 641 PROVIDE( Cache_Dbus_MMU_Set = 0x40000564 ); 642 PROVIDE( Cache_Count_Flash_Pages = 0x40000568 ); 643 PROVIDE( Cache_Travel_Tag_Memory = 0x4000056c ); 644 PROVIDE( Cache_Get_Virtual_Addr = 0x40000570 ); 645 PROVIDE( Cache_Get_Memory_BaseAddr = 0x40000574 ); 646 PROVIDE( Cache_Get_Memory_Addr = 0x40000578 ); 647 PROVIDE( Cache_Get_Memory_value = 0x4000057c ); 648 /* Data (.data, .bss, .rodata) */ 649 PROVIDE( rom_cache_op_cb = 0x3fcdffd8 ); 650 PROVIDE( rom_cache_internal_table_ptr = 0x3fcdffd4 ); 651 652 653 /*************************************** 654 Group clock 655 ***************************************/ 656 657 /* Functions */ 658 ets_get_apb_freq = 0x40000580; 659 ets_get_cpu_frequency = 0x40000584; 660 ets_update_cpu_frequency = 0x40000588; 661 ets_get_printf_channel = 0x4000058c; 662 ets_get_xtal_div = 0x40000590; 663 ets_set_xtal_div = 0x40000594; 664 ets_get_xtal_freq = 0x40000598; 665 666 667 /*************************************** 668 Group gpio 669 ***************************************/ 670 671 /* Functions */ 672 gpio_input_get = 0x4000059c; 673 gpio_matrix_in = 0x400005a0; 674 gpio_matrix_out = 0x400005a4; 675 gpio_output_disable = 0x400005a8; 676 gpio_output_enable = 0x400005ac; 677 gpio_output_set = 0x400005b0; 678 gpio_pad_hold = 0x400005b4; 679 gpio_pad_input_disable = 0x400005b8; 680 gpio_pad_input_enable = 0x400005bc; 681 gpio_pad_pulldown = 0x400005c0; 682 gpio_pad_pullup = 0x400005c4; 683 gpio_pad_select_gpio = 0x400005c8; 684 gpio_pad_set_drv = 0x400005cc; 685 gpio_pad_unhold = 0x400005d0; 686 gpio_pin_wakeup_disable = 0x400005d4; 687 gpio_pin_wakeup_enable = 0x400005d8; 688 gpio_bypass_matrix_in = 0x400005dc; 689 690 691 /*************************************** 692 Group interrupts 693 ***************************************/ 694 695 /* Functions */ 696 esprv_intc_int_set_priority = 0x400005e0; 697 esprv_intc_int_set_threshold = 0x400005e4; 698 esprv_intc_int_enable = 0x400005e8; 699 esprv_intc_int_disable = 0x400005ec; 700 esprv_intc_int_set_type = 0x400005f0; 701 intr_matrix_set = 0x400005f4; 702 ets_intr_lock = 0x400005f8; 703 ets_intr_unlock = 0x400005fc; 704 PROVIDE( intr_handler_set = 0x40000600 ); 705 ets_isr_attach = 0x40000604; 706 ets_isr_mask = 0x40000608; 707 ets_isr_unmask = 0x4000060c; 708 709 710 /*************************************** 711 Group crypto 712 ***************************************/ 713 714 /* Functions */ 715 md5_vector = 0x40000610; 716 MD5Init = 0x40000614; 717 MD5Update = 0x40000618; 718 MD5Final = 0x4000061c; 719 hmac_md5_vector = 0x40000620; 720 hmac_md5 = 0x40000624; 721 crc32_le = 0x40000628; 722 crc32_be = 0x4000062c; 723 crc16_le = 0x40000630; 724 crc16_be = 0x40000634; 725 crc8_le = 0x40000638; 726 crc8_be = 0x4000063c; 727 esp_crc8 = 0x40000640; 728 ets_sha_enable = 0x40000644; 729 ets_sha_disable = 0x40000648; 730 ets_sha_get_state = 0x4000064c; 731 ets_sha_init = 0x40000650; 732 ets_sha_process = 0x40000654; 733 ets_sha_starts = 0x40000658; 734 ets_sha_update = 0x4000065c; 735 ets_sha_finish = 0x40000660; 736 ets_sha_clone = 0x40000664; 737 ets_hmac_enable = 0x40000668; 738 ets_hmac_disable = 0x4000066c; 739 ets_hmac_calculate_message = 0x40000670; 740 ets_hmac_calculate_downstream = 0x40000674; 741 ets_hmac_invalidate_downstream = 0x40000678; 742 ets_jtag_enable_temporarily = 0x4000067c; 743 ets_aes_enable = 0x40000680; 744 ets_aes_disable = 0x40000684; 745 ets_aes_setkey = 0x40000688; 746 ets_aes_block = 0x4000068c; 747 ets_bigint_enable = 0x40000690; 748 ets_bigint_disable = 0x40000694; 749 ets_bigint_multiply = 0x40000698; 750 ets_bigint_modmult = 0x4000069c; 751 ets_bigint_modexp = 0x400006a0; 752 ets_bigint_wait_finish = 0x400006a4; 753 ets_bigint_getz = 0x400006a8; 754 ets_ds_enable = 0x400006ac; 755 ets_ds_disable = 0x400006b0; 756 ets_ds_start_sign = 0x400006b4; 757 ets_ds_is_busy = 0x400006b8; 758 ets_ds_finish_sign = 0x400006bc; 759 ets_ds_encrypt_params = 0x400006c0; 760 ets_aes_setkey_dec = 0x400006c4; 761 ets_aes_setkey_enc = 0x400006c8; 762 ets_mgf1_sha256 = 0x400006cc; 763 764 765 /*************************************** 766 Group efuse 767 ***************************************/ 768 769 /* Functions */ 770 ets_efuse_read = 0x400006d0; 771 ets_efuse_program = 0x400006d4; 772 ets_efuse_clear_program_registers = 0x400006d8; 773 ets_efuse_write_key = 0x400006dc; 774 ets_efuse_get_read_register_address = 0x400006e0; 775 ets_efuse_get_key_purpose = 0x400006e4; 776 ets_efuse_key_block_unused = 0x400006e8; 777 ets_efuse_find_unused_key_block = 0x400006ec; 778 ets_efuse_rs_calculate = 0x400006f0; 779 ets_efuse_count_unused_key_blocks = 0x400006f4; 780 ets_efuse_secure_boot_enabled = 0x400006f8; 781 ets_efuse_secure_boot_aggressive_revoke_enabled = 0x400006fc; 782 ets_efuse_cache_encryption_enabled = 0x40000700; 783 ets_efuse_download_modes_disabled = 0x40000704; 784 ets_efuse_find_purpose = 0x40000708; 785 ets_efuse_flash_opi_5pads_power_sel_vddspi = 0x4000070c; 786 ets_efuse_force_send_resume = 0x40000710; 787 ets_efuse_get_flash_delay_us = 0x40000714; 788 ets_efuse_get_mac = 0x40000718; 789 ets_efuse_get_spiconfig = 0x4000071c; 790 ets_efuse_usb_print_is_disabled = 0x40000720; 791 /*ets_efuse_get_uart_print_channel = 0x40000724;*/ 792 ets_efuse_usb_serial_jtag_print_is_disabled = 0x40000724; 793 ets_efuse_get_uart_print_control = 0x40000728; 794 ets_efuse_get_wp_pad = 0x4000072c; 795 ets_efuse_legacy_spi_boot_mode_disabled = 0x40000730; 796 ets_efuse_security_download_modes_enabled = 0x40000734; 797 ets_efuse_set_timing = 0x40000738; 798 ets_efuse_jtag_disabled = 0x4000073c; 799 ets_efuse_usb_download_mode_disabled = 0x40000740; 800 ets_efuse_usb_module_disabled = 0x40000744; 801 ets_efuse_usb_device_disabled = 0x40000748; 802 803 804 /*************************************** 805 Group secureboot 806 ***************************************/ 807 808 /* Functions */ 809 ets_emsa_pss_verify = 0x4000074c; 810 ets_rsa_pss_verify = 0x40000750; 811 ets_secure_boot_verify_bootloader_with_keys = 0x40000754; 812 ets_secure_boot_verify_signature = 0x40000758; 813 ets_secure_boot_read_key_digests = 0x4000075c; 814 ets_secure_boot_revoke_public_key_digest = 0x40000760; 815 816 817 /*************************************** 818 Group usb_uart 819 ***************************************/ 820 821 /* Functions */ 822 PROVIDE( usb_uart_rx_one_char = 0x400008cc ); 823 PROVIDE( usb_uart_rx_one_char_block = 0x400008d0 ); 824 PROVIDE( usb_uart_tx_flush = 0x400008d4 ); 825 PROVIDE( usb_uart_tx_one_char = 0x400008d8 ); 826 /* Data (.data, .bss, .rodata) */ 827 PROVIDE( g_uart_print = 0x3fcdffd1 ); 828 PROVIDE( g_usb_print = 0x3fcdffd0 ); 829 830 831 /*************************************** 832 Group bluetooth 833 ***************************************/ 834 835 /* Functions */ 836 bt_rf_coex_get_dft_cfg = 0x400008dc; 837 bt_rf_coex_hooks_p_set = 0x400008e0; 838 btdm_con_maxevtime_cal_impl = 0x400008e4; 839 btdm_controller_get_compile_version_impl = 0x400008e8; 840 btdm_controller_rom_data_init = 0x400008ec; 841 btdm_dis_privacy_err_report_impl = 0x400008f0; 842 btdm_disable_adv_delay_impl = 0x400008f4; 843 btdm_enable_scan_continue_impl = 0x400008f8; 844 btdm_enable_scan_forever_impl = 0x400008fc; 845 btdm_get_power_state_impl = 0x40000900; 846 btdm_get_prevent_sleep_flag_impl = 0x40000904; 847 btdm_power_state_active_impl = 0x40000908; 848 btdm_switch_phy_coded_impl = 0x4000090c; 849 hci_acl_data_handler = 0x40000910; 850 hci_disconnect_cmd_handler = 0x40000914; 851 hci_le_con_upd_cmd_handler = 0x40000918; 852 hci_le_ltk_req_neg_reply_cmd_handler = 0x4000091c; 853 hci_le_ltk_req_reply_cmd_handler = 0x40000920; 854 hci_le_rd_chnl_map_cmd_handler = 0x40000924; 855 hci_le_rd_phy_cmd_handler = 0x40000928; 856 hci_le_rd_rem_feats_cmd_handler = 0x4000092c; 857 hci_le_rem_con_param_req_neg_reply_cmd_handler = 0x40000930; 858 hci_le_rem_con_param_req_reply_cmd_handler = 0x40000934; 859 hci_le_set_data_len_cmd_handler = 0x40000938; 860 hci_le_set_phy_cmd_handler = 0x4000093c; 861 hci_le_start_enc_cmd_handler = 0x40000940; 862 hci_rd_auth_payl_to_cmd_handler = 0x40000944; 863 hci_rd_rem_ver_info_cmd_handler = 0x40000948; 864 hci_rd_rssi_cmd_handler = 0x4000094c; 865 hci_rd_tx_pwr_lvl_cmd_handler = 0x40000950; 866 hci_vs_set_pref_slave_evt_dur_cmd_handler = 0x40000954; 867 hci_vs_set_pref_slave_latency_cmd_handler = 0x40000958; 868 hci_wr_auth_payl_to_cmd_handler = 0x4000095c; 869 ll_channel_map_ind_handler = 0x40000960; 870 ll_connection_param_req_handler = 0x40000964; 871 ll_connection_param_rsp_handler = 0x40000968; 872 ll_connection_update_ind_handler = 0x4000096c; 873 ll_enc_req_handler = 0x40000970; 874 ll_enc_rsp_handler = 0x40000974; 875 ll_feature_req_handler = 0x40000978; 876 ll_feature_rsp_handler = 0x4000097c; 877 ll_length_req_handler = 0x40000980; 878 ll_length_rsp_handler = 0x40000984; 879 ll_min_used_channels_ind_handler = 0x40000988; 880 ll_pause_enc_req_handler = 0x4000098c; 881 ll_pause_enc_rsp_handler = 0x40000990; 882 ll_phy_req_handler = 0x40000994; 883 ll_phy_rsp_handler = 0x40000998; 884 ll_phy_update_ind_handler = 0x4000099c; 885 ll_ping_req_handler = 0x400009a0; 886 ll_ping_rsp_handler = 0x400009a4; 887 ll_slave_feature_req_handler = 0x400009a8; 888 ll_start_enc_req_handler = 0x400009ac; 889 ll_start_enc_rsp_handler = 0x400009b0; 890 ll_terminate_ind_handler = 0x400009b4; 891 ll_version_ind_handler = 0x400009b8; 892 llc_auth_payl_nearly_to_handler = 0x400009bc; 893 llc_auth_payl_real_to_handler = 0x400009c0; 894 llc_encrypt_ind_handler = 0x400009c4; 895 llc_hci_command_handler_wrapper = 0x400009c8; 896 llc_ll_connection_param_req_pdu_send = 0x400009cc; 897 llc_ll_connection_param_rsp_pdu_send = 0x400009d0; 898 llc_ll_connection_update_ind_pdu_send = 0x400009d4; 899 llc_ll_enc_req_pdu_send = 0x400009d8; 900 llc_ll_enc_rsp_pdu_send = 0x400009dc; 901 llc_ll_feature_req_pdu_send = 0x400009e0; 902 llc_ll_feature_rsp_pdu_send = 0x400009e4; 903 llc_ll_length_req_pdu_send = 0x400009e8; 904 llc_ll_length_rsp_pdu_send = 0x400009ec; 905 llc_ll_pause_enc_req_pdu_send = 0x400009f0; 906 llc_ll_pause_enc_rsp_pdu_send = 0x400009f4; 907 llc_ll_phy_req_pdu_send = 0x400009f8; 908 llc_ll_phy_rsp_pdu_send = 0x400009fc; 909 llc_ll_ping_req_pdu_send = 0x40000a00; 910 llc_ll_ping_rsp_pdu_send = 0x40000a04; 911 llc_ll_start_enc_req_pdu_send = 0x40000a08; 912 llc_ll_start_enc_rsp_pdu_send = 0x40000a0c; 913 llc_ll_terminate_ind_pdu_send = 0x40000a10; 914 llc_ll_unknown_rsp_pdu_send = 0x40000a14; 915 llc_llcp_ch_map_update_ind_pdu_send = 0x40000a18; 916 llc_llcp_phy_upd_ind_pdu_send = 0x40000a1c; 917 llc_llcp_version_ind_pdu_send = 0x40000a20; 918 llc_op_ch_map_upd_ind_handler = 0x40000a24; 919 llc_op_con_upd_ind_handler = 0x40000a28; 920 llc_op_disconnect_ind_handler = 0x40000a2c; 921 llc_op_dl_upd_ind_handler = 0x40000a30; 922 llc_op_encrypt_ind_handler = 0x40000a34; 923 llc_op_feats_exch_ind_handler = 0x40000a38; 924 llc_op_le_ping_ind_handler = 0x40000a3c; 925 llc_op_phy_upd_ind_handler = 0x40000a40; 926 llc_op_ver_exch_ind_handler = 0x40000a44; 927 llc_stopped_ind_handler = 0x40000a48; 928 lld_acl_rx_ind_handler = 0x40000a4c; 929 lld_acl_tx_cfm_handler = 0x40000a50; 930 lld_adv_end_ind_handler = 0x40000a54; 931 lld_adv_rep_ind_handler = 0x40000a58; 932 lld_ch_map_upd_cfm_handler = 0x40000a5c; 933 lld_con_estab_ind_handler = 0x40000a60; 934 lld_con_evt_sd_evt_time_set = 0x40000a64; 935 lld_con_offset_upd_ind_handler = 0x40000a68; 936 lld_con_param_upd_cfm_handler = 0x40000a6c; 937 lld_disc_ind_handler = 0x40000a70; 938 lld_init_end_ind_handler = 0x40000a74; 939 lld_llcp_rx_ind_handler_wrapper = 0x40000a78; 940 lld_llcp_tx_cfm_handler = 0x40000a7c; 941 lld_per_adv_end_ind_handler = 0x40000a80; 942 lld_per_adv_rep_ind_handler = 0x40000a84; 943 lld_per_adv_rx_end_ind_handler = 0x40000a88; 944 lld_phy_coded_500k_get = 0x40000a8c; 945 lld_phy_upd_cfm_handler = 0x40000a90; 946 lld_scan_end_ind_handler = 0x40000a94; 947 lld_scan_req_ind_handler = 0x40000a98; 948 lld_sync_start_req_handler = 0x40000a9c; 949 lld_test_end_ind_handler = 0x40000aa0; 950 lld_update_rxbuf_handler = 0x40000aa4; 951 llm_ch_map_update_ind_handler = 0x40000aa8; 952 llm_hci_command_handler_wrapper = 0x40000aac; 953 llm_scan_period_to_handler = 0x40000ab0; 954 r_Add2SelfBigHex256 = 0x40000ab4; 955 r_AddBigHex256 = 0x40000ab8; 956 r_AddBigHexModP256 = 0x40000abc; 957 r_AddP256 = 0x40000ac0; 958 r_AddPdiv2_256 = 0x40000ac4; 959 r_GF_Jacobian_Point_Addition256 = 0x40000ac8; 960 r_GF_Jacobian_Point_Double256 = 0x40000acc; 961 r_GF_Point_Jacobian_To_Affine256 = 0x40000ad0; 962 r_MultiplyBigHexByUint32_256 = 0x40000ad4; 963 r_MultiplyBigHexModP256 = 0x40000ad8; 964 r_MultiplyByU16ModP256 = 0x40000adc; 965 r_SubtractBigHex256 = 0x40000ae0; 966 r_SubtractBigHexMod256 = 0x40000ae4; 967 r_SubtractBigHexUint32_256 = 0x40000ae8; 968 r_SubtractFromSelfBigHex256 = 0x40000aec; 969 r_SubtractFromSelfBigHexSign256 = 0x40000af0; 970 r_aes_alloc = 0x40000af4; 971 r_aes_ccm_continue = 0x40000af8; 972 r_aes_ccm_process_e = 0x40000afc; 973 r_aes_ccm_xor_128_lsb = 0x40000b00; 974 r_aes_ccm_xor_128_msb = 0x40000b04; 975 r_aes_cmac_continue = 0x40000b08; 976 r_aes_cmac_start = 0x40000b0c; 977 r_aes_k1_continue = 0x40000b10; 978 r_aes_k2_continue = 0x40000b14; 979 r_aes_k3_continue = 0x40000b18; 980 r_aes_k4_continue = 0x40000b1c; 981 r_aes_shift_left_128 = 0x40000b20; 982 r_aes_start = 0x40000b24; 983 r_aes_xor_128 = 0x40000b28; 984 r_assert_err = 0x40000b2c; 985 r_assert_param = 0x40000b30; 986 r_assert_warn = 0x40000b34; 987 r_bigHexInversion256 = 0x40000b38; 988 r_ble_sw_cca_check_isr = 0x40000b3c; 989 r_ble_util_buf_acl_tx_alloc = 0x40000b40; 990 r_ble_util_buf_acl_tx_elt_get = 0x40000b44; 991 r_ble_util_buf_acl_tx_free = 0x40000b48; 992 r_ble_util_buf_acl_tx_free_in_isr = 0x40000b4c; 993 r_ble_util_buf_adv_tx_alloc = 0x40000b50; 994 r_ble_util_buf_adv_tx_free = 0x40000b54; 995 r_ble_util_buf_adv_tx_free_in_isr = 0x40000b58; 996 r_ble_util_buf_env_deinit = 0x40000b5c; 997 r_ble_util_buf_env_init = 0x40000b60; 998 r_ble_util_buf_get_rx_buf_nb = 0x40000b64; 999 r_ble_util_buf_get_rx_buf_size = 0x40000b68; 1000 r_ble_util_buf_llcp_tx_alloc = 0x40000b6c; 1001 r_ble_util_buf_llcp_tx_free = 0x40000b70; 1002 r_ble_util_buf_rx_alloc = 0x40000b74; 1003 r_ble_util_buf_rx_alloc_in_isr = 0x40000b78; 1004 r_ble_util_buf_rx_free = 0x40000b7c; 1005 r_ble_util_buf_rx_free_in_isr = 0x40000b80; 1006 r_ble_util_buf_set_rx_buf_nb = 0x40000b84; 1007 r_ble_util_buf_set_rx_buf_size = 0x40000b88; 1008 r_ble_util_data_rx_buf_reset = 0x40000b8c; 1009 r_bt_bb_get_intr_mask = 0x40000b90; 1010 r_bt_bb_intr_clear = 0x40000b94; 1011 r_bt_bb_intr_mask_set = 0x40000b98; 1012 r_bt_rf_coex_cfg_set = 0x40000ba0; 1013 r_bt_rf_coex_conn_dynamic_pti_en_get = 0x40000ba4; 1014 r_bt_rf_coex_ext_adv_dynamic_pti_en_get = 0x40000bac; 1015 r_bt_rf_coex_ext_scan_dynamic_pti_en_get = 0x40000bb0; 1016 r_bt_rf_coex_legacy_adv_dynamic_pti_en_get = 0x40000bb4; 1017 r_bt_rf_coex_per_adv_dynamic_pti_en_get = 0x40000bb8; 1018 r_bt_rf_coex_pti_table_get = 0x40000bbc; 1019 r_bt_rf_coex_st_param_get = 0x40000bc0; 1020 r_bt_rf_coex_st_param_set = 0x40000bc4; 1021 r_bt_rf_coex_sync_scan_dynamic_pti_en_get = 0x40000bc8; 1022 r_bt_rma_apply_rule_cs_fmt = 0x40000bcc; 1023 r_bt_rma_apply_rule_cs_idx = 0x40000bd0; 1024 r_bt_rma_configure = 0x40000bd4; 1025 r_bt_rma_deregister_rule_cs_fmt = 0x40000bd8; 1026 r_bt_rma_deregister_rule_cs_idx = 0x40000bdc; 1027 r_bt_rma_get_ant_by_act = 0x40000be0; 1028 r_bt_rma_init = 0x40000be4; 1029 r_bt_rma_register_rule_cs_fmt = 0x40000be8; 1030 r_bt_rma_register_rule_cs_idx = 0x40000bec; 1031 r_bt_rtp_apply_rule_cs_fmt = 0x40000bf0; 1032 r_bt_rtp_apply_rule_cs_idx = 0x40000bf4; 1033 r_bt_rtp_deregister_rule_cs_fmt = 0x40000bf8; 1034 r_bt_rtp_deregister_rule_cs_idx = 0x40000bfc; 1035 r_bt_rtp_init = 0x40000c04; 1036 r_bt_rtp_register_rule_cs_fmt = 0x40000c08; 1037 r_bt_rtp_register_rule_cs_idx = 0x40000c0c; 1038 r_btdm_isr = 0x40000c10; 1039 r_cali_phase_match_p = 0x40000c20; 1040 r_cmp_abs_time = 0x40000c24; 1041 r_cmp_dest_id = 0x40000c28; 1042 r_cmp_timer_id = 0x40000c2c; 1043 r_co_bdaddr_compare = 0x40000c30; 1044 r_co_ble_pkt_dur_in_us = 0x40000c34; 1045 r_co_list_extract = 0x40000c38; 1046 r_co_list_extract_after = 0x40000c3c; 1047 r_co_list_extract_sublist = 0x40000c40; 1048 r_co_list_find = 0x40000c44; 1049 r_co_list_init = 0x40000c48; 1050 r_co_list_insert_after = 0x40000c4c; 1051 r_co_list_insert_before = 0x40000c50; 1052 r_co_list_merge = 0x40000c54; 1053 r_co_list_pool_init = 0x40000c58; 1054 r_co_list_pop_front = 0x40000c5c; 1055 r_co_list_push_back = 0x40000c60; 1056 r_co_list_push_back_sublist = 0x40000c64; 1057 r_co_list_push_front = 0x40000c68; 1058 r_co_list_size = 0x40000c6c; 1059 r_co_nb_good_le_channels = 0x40000c70; 1060 r_co_util_pack = 0x40000c74; 1061 r_co_util_read_array_size = 0x40000c78; 1062 r_co_util_unpack = 0x40000c7c; 1063 r_dbg_env_deinit = 0x40000c80; 1064 r_dbg_env_init = 0x40000c84; 1065 r_dbg_platform_reset_complete = 0x40000c88; 1066 r_dl_upd_proc_start = 0x40000c8c; 1067 r_dump_data = 0x40000c90; 1068 r_ecc_abort_key256_generation = 0x40000c94; 1069 r_ecc_gen_new_public_key = 0x40000c98; 1070 r_ecc_gen_new_secret_key = 0x40000c9c; 1071 r_ecc_generate_key256 = 0x40000ca0; 1072 r_ecc_get_debug_Keys = 0x40000ca4; 1073 r_ecc_init = 0x40000ca8; 1074 r_ecc_is_valid_point = 0x40000cac; 1075 r_ecc_multiplication_event_handler = 0x40000cb0; 1076 r_ecc_point_multiplication_win_256 = 0x40000cb4; 1077 r_emi_alloc_em_mapping_by_offset = 0x40000cb8; 1078 r_emi_base_reg_lut_show = 0x40000cbc; 1079 r_emi_em_base_reg_show = 0x40000cc0; 1080 r_emi_free_em_mapping_by_offset = 0x40000cc4; 1081 r_emi_get_em_mapping_idx_by_offset = 0x40000cc8; 1082 r_emi_get_mem_addr_by_offset = 0x40000ccc; 1083 r_emi_overwrite_em_mapping_by_offset = 0x40000cd0; 1084 r_esp_vendor_hci_command_handler = 0x40000cd4; 1085 r_get_stack_usage = 0x40000cd8; 1086 r_h4tl_acl_hdr_rx_evt_handler = 0x40000cdc; 1087 r_h4tl_cmd_hdr_rx_evt_handler = 0x40000ce0; 1088 r_h4tl_cmd_pld_rx_evt_handler = 0x40000ce4; 1089 r_h4tl_eif_io_event_post = 0x40000ce8; 1090 r_h4tl_eif_register = 0x40000cec; 1091 r_h4tl_init = 0x40000cf0; 1092 r_h4tl_out_of_sync = 0x40000cf4; 1093 r_h4tl_out_of_sync_check = 0x40000cf8; 1094 r_h4tl_read_hdr = 0x40000cfc; 1095 r_h4tl_read_next_out_of_sync = 0x40000d00; 1096 r_h4tl_read_payl = 0x40000d04; 1097 r_h4tl_read_start = 0x40000d08; 1098 r_h4tl_rx_acl_hdr_extract = 0x40000d0c; 1099 r_h4tl_rx_cmd_hdr_extract = 0x40000d10; 1100 r_h4tl_rx_done = 0x40000d14; 1101 r_h4tl_start = 0x40000d18; 1102 r_h4tl_stop = 0x40000d1c; 1103 r_h4tl_tx_done = 0x40000d20; 1104 r_h4tl_tx_evt_handler = 0x40000d24; 1105 r_h4tl_write = 0x40000d28; 1106 r_hci_acl_tx_data_alloc = 0x40000d2c; 1107 r_hci_acl_tx_data_received = 0x40000d30; 1108 r_hci_basic_cmd_send_2_controller = 0x40000d34; 1109 r_hci_ble_adv_report_filter_check = 0x40000d38; 1110 r_hci_ble_adv_report_tx_check = 0x40000d3c; 1111 r_hci_ble_conhdl_register = 0x40000d40; 1112 r_hci_ble_conhdl_unregister = 0x40000d44; 1113 r_hci_build_acl_data = 0x40000d48; 1114 r_hci_build_cc_evt = 0x40000d4c; 1115 r_hci_build_cs_evt = 0x40000d50; 1116 r_hci_build_evt = 0x40000d54; 1117 r_hci_build_le_evt = 0x40000d58; 1118 r_hci_cmd_get_max_param_size = 0x40000d5c; 1119 r_hci_cmd_received = 0x40000d60; 1120 r_hci_cmd_reject = 0x40000d64; 1121 r_hci_evt_mask_check = 0x40000d68; 1122 r_hci_evt_mask_set = 0x40000d6c; 1123 r_hci_fc_acl_buf_size_set = 0x40000d70; 1124 r_hci_fc_acl_en = 0x40000d74; 1125 r_hci_fc_acl_packet_sent = 0x40000d78; 1126 r_hci_fc_check_host_available_nb_acl_packets = 0x40000d7c; 1127 r_hci_fc_host_nb_acl_pkts_complete = 0x40000d80; 1128 r_hci_fc_init = 0x40000d84; 1129 r_hci_look_for_cmd_desc = 0x40000d88; 1130 r_hci_look_for_evt_desc = 0x40000d8c; 1131 r_hci_look_for_le_evt_desc = 0x40000d90; 1132 r_hci_look_for_le_evt_desc_esp = 0x40000d94; 1133 r_hci_pack_bytes = 0x40000d98; 1134 r_hci_send_2_controller = 0x40000da0; 1135 r_hci_send_2_host = 0x40000da4; 1136 r_hci_tl_c2h_data_flow_on = 0x40000da8; 1137 r_hci_tl_cmd_hdr_rx_evt_handler = 0x40000dac; 1138 r_hci_tl_cmd_pld_rx_evt_handler = 0x40000db0; 1139 r_hci_tl_get_pkt = 0x40000db4; 1140 r_hci_tl_hci_pkt_handler = 0x40000db8; 1141 r_hci_tl_hci_tx_done_evt_handler = 0x40000dbc; 1142 r_hci_tl_inc_nb_h2c_cmd_pkts = 0x40000dc0; 1143 r_hci_tl_save_pkt = 0x40000dc4; 1144 r_hci_tl_send = 0x40000dc8; 1145 r_hci_tx_done = 0x40000dcc; 1146 r_hci_tx_start = 0x40000dd0; 1147 r_hci_tx_trigger = 0x40000dd4; 1148 r_isValidSecretKey_256 = 0x40000dd8; 1149 r_ke_check_malloc = 0x40000ddc; 1150 r_ke_event_callback_set = 0x40000de0; 1151 r_ke_event_clear = 0x40000de4; 1152 r_ke_event_flush = 0x40000de8; 1153 r_ke_event_get = 0x40000dec; 1154 r_ke_event_get_all = 0x40000df0; 1155 r_ke_event_init = 0x40000df4; 1156 r_ke_event_schedule = 0x40000df8; 1157 r_ke_event_set = 0x40000dfc; 1158 r_ke_flush = 0x40000e00; 1159 r_ke_free = 0x40000e04; 1160 r_ke_handler_search = 0x40000e08; 1161 r_ke_init = 0x40000e0c; 1162 r_ke_is_free = 0x40000e10; 1163 r_ke_malloc = 0x40000e14; 1164 r_ke_mem_init = 0x40000e18; 1165 r_ke_mem_is_empty = 0x40000e1c; 1166 r_ke_mem_is_in_heap = 0x40000e20; 1167 r_ke_msg_alloc = 0x40000e24; 1168 r_ke_msg_dest_id_get = 0x40000e28; 1169 r_ke_msg_discard = 0x40000e2c; 1170 r_ke_msg_forward = 0x40000e30; 1171 r_ke_msg_forward_new_id = 0x40000e34; 1172 r_ke_msg_free = 0x40000e38; 1173 r_ke_msg_in_queue = 0x40000e3c; 1174 r_ke_msg_save = 0x40000e40; 1175 r_ke_msg_send = 0x40000e44; 1176 r_ke_msg_send_basic = 0x40000e48; 1177 r_ke_msg_src_id_get = 0x40000e4c; 1178 r_ke_queue_extract = 0x40000e50; 1179 r_ke_queue_insert = 0x40000e54; 1180 r_ke_sleep_check = 0x40000e58; 1181 r_ke_state_get = 0x40000e5c; 1182 r_ke_state_set = 0x40000e60; 1183 r_ke_task_check = 0x40000e64; 1184 r_ke_task_create = 0x40000e68; 1185 r_ke_task_delete = 0x40000e6c; 1186 r_ke_task_handler_get = 0x40000e70; 1187 r_ke_task_init = 0x40000e74; 1188 r_ke_task_msg_flush = 0x40000e78; 1189 r_ke_task_saved_update = 0x40000e7c; 1190 r_ke_time = 0x40000e84; 1191 r_ke_time_cmp = 0x40000e88; 1192 r_ke_time_past = 0x40000e8c; 1193 r_ke_timer_active = 0x40000e90; 1194 r_ke_timer_adjust_all = 0x40000e94; 1195 r_ke_timer_clear = 0x40000e98; 1196 r_ke_timer_init = 0x40000e9c; 1197 r_ke_timer_schedule = 0x40000ea0; 1198 r_ke_timer_set = 0x40000ea4; 1199 r_led_init = 0x40000ea8; 1200 r_led_set_all = 0x40000eac; 1201 r_llc_aes_res_cb = 0x40000eb0; 1202 r_llc_ch_map_up_proc_err_cb = 0x40000eb4; 1203 r_llc_cleanup = 0x40000eb8; 1204 r_llc_cmd_cmp_send = 0x40000ebc; 1205 r_llc_cmd_stat_send = 0x40000ec0; 1206 r_llc_con_move_cbk = 0x40000ec4; 1207 r_llc_con_plan_set_update = 0x40000ec8; 1208 r_llc_con_upd_param_in_range = 0x40000ecc; 1209 r_llc_disconnect = 0x40000ed0; 1210 r_llc_disconnect_end = 0x40000ed4; 1211 r_llc_disconnect_proc_continue = 0x40000ed8; 1212 r_llc_disconnect_proc_err_cb = 0x40000edc; 1213 r_llc_dl_chg_check = 0x40000ee0; 1214 r_llc_dle_proc_err_cb = 0x40000ee4; 1215 r_llc_feats_exch_proc_err_cb = 0x40000ee8; 1216 r_llc_hci_cmd_handler_tab_p_get = 0x40000eec; 1217 r_llc_hci_con_param_req_evt_send = 0x40000ef4; 1218 r_llc_hci_con_upd_info_send = 0x40000ef8; 1219 r_llc_hci_disconnected_dis = 0x40000efc; 1220 r_llc_hci_dl_upd_info_send = 0x40000f00; 1221 r_llc_hci_enc_evt_send = 0x40000f04; 1222 r_llc_hci_feats_info_send = 0x40000f08; 1223 r_llc_hci_le_phy_upd_cmp_evt_send = 0x40000f0c; 1224 r_llc_hci_ltk_request_evt_send = 0x40000f10; 1225 r_llc_hci_nb_cmp_pkts_evt_send = 0x40000f14; 1226 r_llc_hci_version_info_send = 0x40000f18; 1227 r_llc_init_term_proc = 0x40000f1c; 1228 r_llc_iv_skd_rand_gen = 0x40000f20; 1229 r_llc_le_ping_proc_continue = 0x40000f24; 1230 r_llc_le_ping_proc_err_cb = 0x40000f28; 1231 r_llc_le_ping_restart = 0x40000f2c; 1232 r_llc_le_ping_set = 0x40000f30; 1233 r_llc_ll_pause_enc_rsp_ack_handler = 0x40000f34; 1234 r_llc_ll_reject_ind_ack_handler = 0x40000f38; 1235 r_llc_ll_reject_ind_pdu_send = 0x40000f3c; 1236 r_llc_ll_start_enc_rsp_ack_handler = 0x40000f40; 1237 r_llc_ll_terminate_ind_ack = 0x40000f44; 1238 r_llc_ll_unknown_ind_handler = 0x40000f48; 1239 r_llc_llcp_send = 0x40000f4c; 1240 r_llc_llcp_state_set = 0x40000f50; 1241 r_llc_llcp_trans_timer_set = 0x40000f54; 1242 r_llc_llcp_tx_check = 0x40000f58; 1243 r_llc_loc_ch_map_proc_continue = 0x40000f5c; 1244 r_llc_loc_con_upd_proc_err_cb = 0x40000f64; 1245 r_llc_loc_dl_upd_proc_continue = 0x40000f68; 1246 r_llc_loc_encrypt_proc_continue = 0x40000f6c; 1247 r_llc_loc_encrypt_proc_err_cb = 0x40000f70; 1248 r_llc_loc_feats_exch_proc_continue = 0x40000f74; 1249 r_llc_loc_phy_upd_proc_err_cb = 0x40000f7c; 1250 r_llc_msg_handler_tab_p_get = 0x40000f80; 1251 r_llc_pref_param_compute = 0x40000f84; 1252 r_llc_proc_collision_check = 0x40000f88; 1253 r_llc_proc_err_ind = 0x40000f8c; 1254 r_llc_proc_get = 0x40000f90; 1255 r_llc_proc_id_get = 0x40000f94; 1256 r_llc_proc_reg = 0x40000f98; 1257 r_llc_proc_state_get = 0x40000f9c; 1258 r_llc_proc_state_set = 0x40000fa0; 1259 r_llc_proc_timer_pause_set = 0x40000fa4; 1260 r_llc_proc_timer_set = 0x40000fa8; 1261 r_llc_proc_unreg = 0x40000fac; 1262 r_llc_rem_ch_map_proc_continue = 0x40000fb0; 1263 r_llc_rem_con_upd_proc_err_cb = 0x40000fb8; 1264 r_llc_rem_dl_upd_proc = 0x40000fbc; 1265 r_llc_rem_encrypt_proc_continue = 0x40000fc0; 1266 r_llc_rem_encrypt_proc_err_cb = 0x40000fc4; 1267 r_llc_rem_phy_upd_proc_continue = 0x40000fc8; 1268 r_llc_rem_phy_upd_proc_err_cb = 0x40000fcc; 1269 r_llc_role_get = 0x40000fd0; 1270 r_llc_sk_gen = 0x40000fd4; 1271 r_llc_start = 0x40000fd8; 1272 r_llc_stop = 0x40000fdc; 1273 r_llc_ver_exch_loc_proc_continue = 0x40000fe0; 1274 r_llc_ver_proc_err_cb = 0x40000fe4; 1275 r_llcp_pdu_handler_tab_p_get = 0x40000fe8; 1276 r_lld_aa_gen = 0x40000fec; 1277 r_lld_adv_adv_data_set = 0x40000ff0; 1278 r_lld_adv_adv_data_update = 0x40000ff4; 1279 r_lld_adv_aux_ch_idx_set = 0x40000ff8; 1280 r_lld_adv_aux_evt_canceled_cbk = 0x40000ffc; 1281 r_lld_adv_aux_evt_start_cbk = 0x40001000; 1282 r_lld_adv_coex_check_ext_adv_synced = 0x40001004; 1283 r_lld_adv_coex_env_reset = 0x40001008; 1284 r_lld_adv_duration_update = 0x4000100c; 1285 r_lld_adv_dynamic_pti_process = 0x40001010; 1286 r_lld_adv_end = 0x40001014; 1287 r_lld_adv_evt_canceled_cbk = 0x40001018; 1288 r_lld_adv_evt_start_cbk = 0x4000101c; 1289 r_lld_adv_ext_chain_construct = 0x40001020; 1290 r_lld_adv_ext_pkt_prepare = 0x40001024; 1291 r_lld_adv_frm_cbk = 0x40001028; 1292 r_lld_adv_frm_isr = 0x4000102c; 1293 r_lld_adv_frm_skip_isr = 0x40001030; 1294 r_lld_adv_init = 0x40001034; 1295 r_lld_adv_pkt_rx = 0x40001038; 1296 r_lld_adv_pkt_rx_connect_ind = 0x4000103c; 1297 r_lld_adv_pkt_rx_send_scan_req_evt = 0x40001040; 1298 r_lld_adv_rand_addr_update = 0x40001044; 1299 r_lld_adv_restart = 0x40001048; 1300 r_lld_adv_scan_rsp_data_set = 0x4000104c; 1301 r_lld_adv_scan_rsp_data_update = 0x40001050; 1302 r_lld_adv_set_tx_power = 0x40001054; 1303 r_lld_adv_start = 0x40001058; 1304 r_lld_adv_stop = 0x4000105c; 1305 r_lld_adv_sync_info_set = 0x40001060; 1306 r_lld_adv_sync_info_update = 0x40001064; 1307 r_lld_calc_aux_rx = 0x40001068; 1308 r_lld_cca_alloc = 0x4000106c; 1309 r_lld_cca_data_reset = 0x40001070; 1310 r_lld_cca_free = 0x40001074; 1311 r_lld_ch_assess_data_get = 0x40001078; 1312 r_lld_ch_idx_get = 0x4000107c; 1313 r_lld_ch_map_set = 0x40001080; 1314 r_lld_channel_assess = 0x40001084; 1315 r_lld_con_activity_act_offset_compute = 0x40001088; 1316 r_lld_con_activity_offset_compute = 0x4000108c; 1317 r_lld_con_ch_map_update = 0x40001090; 1318 r_lld_con_cleanup = 0x40001094; 1319 r_lld_con_current_tx_power_get = 0x40001098; 1320 r_lld_con_data_flow_set = 0x4000109c; 1321 r_lld_con_data_len_update = 0x400010a0; 1322 r_lld_con_data_tx = 0x400010a4; 1323 r_lld_con_enc_key_load = 0x400010a8; 1324 r_lld_con_event_counter_get = 0x400010ac; 1325 r_lld_con_evt_canceled_cbk = 0x400010b0; 1326 r_lld_con_evt_duration_min_get = 0x400010b4; 1327 r_lld_con_evt_max_eff_time_cal = 0x400010b8; 1328 r_lld_con_evt_sd_evt_time_get = 0x400010bc; 1329 r_lld_con_evt_start_cbk = 0x400010c0; 1330 r_lld_con_evt_time_update = 0x400010c4; 1331 r_lld_con_free_all_tx_buf = 0x400010c8; 1332 r_lld_con_frm_cbk = 0x400010cc; 1333 r_lld_con_frm_isr = 0x400010d0; 1334 r_lld_con_frm_skip_isr = 0x400010d4; 1335 r_lld_con_init = 0x400010d8; 1336 r_lld_con_llcp_tx = 0x400010dc; 1337 r_lld_con_max_lat_calc = 0x400010e0; 1338 r_lld_con_offset_get = 0x400010e4; 1339 r_lld_con_param_update = 0x400010e8; 1340 r_lld_con_phys_update = 0x400010ec; 1341 r_lld_con_pref_slave_evt_dur_set = 0x400010f0; 1342 r_lld_con_pref_slave_latency_set = 0x400010f4; 1343 r_lld_con_rssi_get = 0x400010f8; 1344 r_lld_con_rx = 0x400010fc; 1345 r_lld_con_rx_channel_assess = 0x40001100; 1346 r_lld_con_rx_enc = 0x40001104; 1347 r_lld_con_rx_isr = 0x40001108; 1348 r_lld_con_rx_link_info_check = 0x4000110c; 1349 r_lld_con_rx_llcp_check = 0x40001110; 1350 r_lld_con_rx_sync_time_update = 0x40001114; 1351 r_lld_con_set_tx_power = 0x4000111c; 1352 r_lld_con_start = 0x40001120; 1353 r_lld_con_tx = 0x40001128; 1354 r_lld_con_tx_enc = 0x4000112c; 1355 r_lld_con_tx_isr = 0x40001130; 1356 r_lld_con_tx_len_update = 0x40001134; 1357 r_lld_con_tx_len_update_for_intv = 0x40001138; 1358 r_lld_con_tx_len_update_for_rate = 0x4000113c; 1359 r_lld_con_tx_prog = 0x40001140; 1360 r_lld_conn_dynamic_pti_process = 0x40001144; 1361 r_lld_continue_scan_rx_isr_end_process = 0x40001148; 1362 r_lld_ext_scan_dynamic_pti_process = 0x4000114c; 1363 r_lld_hw_cca_end_isr = 0x40001150; 1364 r_lld_hw_cca_evt_handler = 0x40001154; 1365 r_lld_hw_cca_isr = 0x40001158; 1366 r_lld_init_cal_anchor_point = 0x4000115c; 1367 r_lld_init_compute_winoffset = 0x40001160; 1368 r_lld_init_connect_req_pack = 0x40001164; 1369 r_lld_init_end = 0x40001168; 1370 r_lld_init_evt_canceled_cbk = 0x4000116c; 1371 r_lld_init_evt_start_cbk = 0x40001170; 1372 r_lld_init_frm_cbk = 0x40001174; 1373 r_lld_init_frm_eof_isr = 0x40001178; 1374 r_lld_init_frm_skip_isr = 0x4000117c; 1375 r_lld_init_init = 0x40001180; 1376 r_lld_init_process_pkt_rx = 0x40001184; 1377 r_lld_init_process_pkt_rx_adv_ext_ind = 0x40001188; 1378 r_lld_init_process_pkt_rx_adv_ind_or_direct_ind = 0x4000118c; 1379 r_lld_init_process_pkt_rx_aux_connect_rsp = 0x40001190; 1380 r_lld_init_process_pkt_tx = 0x40001194; 1381 r_lld_init_process_pkt_tx_cal_con_timestamp = 0x40001198; 1382 r_lld_init_sched = 0x4000119c; 1383 r_lld_init_set_tx_power = 0x400011a0; 1384 r_lld_init_start = 0x400011a4; 1385 r_lld_init_stop = 0x400011a8; 1386 r_lld_instant_proc_end = 0x400011ac; 1387 r_lld_per_adv_ch_map_update = 0x400011b4; 1388 r_lld_per_adv_chain_construct = 0x400011b8; 1389 r_lld_per_adv_cleanup = 0x400011bc; 1390 r_lld_per_adv_coex_env_reset = 0x400011c0; 1391 r_lld_per_adv_data_set = 0x400011c4; 1392 r_lld_per_adv_data_update = 0x400011c8; 1393 r_lld_per_adv_dynamic_pti_process = 0x400011cc; 1394 r_lld_per_adv_evt_canceled_cbk = 0x400011d0; 1395 r_lld_per_adv_evt_start_cbk = 0x400011d4; 1396 r_lld_per_adv_ext_pkt_prepare = 0x400011d8; 1397 r_lld_per_adv_frm_cbk = 0x400011dc; 1398 r_lld_per_adv_frm_isr = 0x400011e0; 1399 r_lld_per_adv_frm_skip_isr = 0x400011e4; 1400 r_lld_per_adv_init = 0x400011e8; 1401 r_lld_per_adv_init_info_get = 0x400011ec; 1402 r_lld_per_adv_list_add = 0x400011f0; 1403 r_lld_per_adv_list_rem = 0x400011f4; 1404 r_lld_per_adv_set_tx_power = 0x400011fc; 1405 r_lld_per_adv_start = 0x40001200; 1406 r_lld_per_adv_stop = 0x40001204; 1407 r_lld_per_adv_sync_info_get = 0x40001208; 1408 r_lld_process_cca_data = 0x4000120c; 1409 r_lld_ral_search = 0x40001210; 1410 r_lld_read_clock = 0x40001214; 1411 r_lld_res_list_add = 0x40001218; 1412 r_lld_res_list_is_empty = 0x40001220; 1413 r_lld_res_list_local_rpa_get = 0x40001224; 1414 r_lld_res_list_peer_rpa_get = 0x40001228; 1415 r_lld_res_list_peer_update = 0x4000122c; 1416 r_lld_res_list_priv_mode_update = 0x40001230; 1417 r_lld_reset_reg = 0x40001238; 1418 r_lld_rpa_renew = 0x4000123c; 1419 r_lld_rpa_renew_evt_canceled_cbk = 0x40001240; 1420 r_lld_rpa_renew_evt_start_cbk = 0x40001244; 1421 r_lld_rpa_renew_instant_cbk = 0x40001248; 1422 r_lld_rxdesc_check = 0x4000124c; 1423 r_lld_rxdesc_free = 0x40001250; 1424 r_lld_scan_create_sync = 0x40001254; 1425 r_lld_scan_create_sync_cancel = 0x40001258; 1426 r_lld_scan_end = 0x4000125c; 1427 r_lld_scan_evt_canceled_cbk = 0x40001260; 1428 r_lld_scan_evt_start_cbk = 0x40001264; 1429 r_lld_scan_frm_cbk = 0x40001268; 1430 r_lld_scan_frm_eof_isr = 0x4000126c; 1431 r_lld_scan_frm_rx_isr = 0x40001270; 1432 r_lld_scan_frm_skip_isr = 0x40001274; 1433 r_lld_scan_init = 0x40001278; 1434 r_lld_scan_params_update = 0x4000127c; 1435 r_lld_scan_process_pkt_rx_aux_adv_ind = 0x40001288; 1436 r_lld_scan_process_pkt_rx_aux_chain_ind = 0x4000128c; 1437 r_lld_scan_process_pkt_rx_aux_scan_rsp = 0x40001290; 1438 r_lld_scan_process_pkt_rx_ext_adv = 0x40001294; 1439 r_lld_scan_process_pkt_rx_ext_adv_ind = 0x40001298; 1440 r_lld_scan_process_pkt_rx_legacy_adv = 0x4000129c; 1441 r_lld_scan_restart = 0x400012a0; 1442 r_lld_scan_sched = 0x400012a4; 1443 r_lld_scan_set_tx_power = 0x400012a8; 1444 r_lld_scan_start = 0x400012ac; 1445 r_lld_scan_stop = 0x400012b0; 1446 r_lld_scan_sync_accept = 0x400012b4; 1447 r_lld_scan_sync_info_unpack = 0x400012b8; 1448 r_lld_scan_trunc_ind = 0x400012bc; 1449 r_lld_sw_cca_evt_handler = 0x400012c0; 1450 r_lld_sw_cca_isr = 0x400012c4; 1451 r_lld_sync_ch_map_update = 0x400012c8; 1452 r_lld_sync_cleanup = 0x400012cc; 1453 r_lld_sync_evt_canceled_cbk = 0x400012d0; 1454 r_lld_sync_evt_start_cbk = 0x400012d4; 1455 r_lld_sync_frm_cbk = 0x400012d8; 1456 r_lld_sync_frm_eof_isr = 0x400012dc; 1457 r_lld_sync_frm_rx_isr = 0x400012e0; 1458 r_lld_sync_frm_skip_isr = 0x400012e4; 1459 r_lld_sync_init = 0x400012e8; 1460 r_lld_sync_process_pkt_rx = 0x400012ec; 1461 r_lld_sync_process_pkt_rx_aux_sync_ind = 0x400012f0; 1462 r_lld_sync_process_pkt_rx_pkt_check = 0x400012f4; 1463 r_lld_sync_scan_dynamic_pti_process = 0x400012f8; 1464 r_lld_sync_sched = 0x400012fc; 1465 r_lld_sync_start = 0x40001300; 1466 r_lld_sync_stop = 0x40001304; 1467 r_lld_sync_trunc_ind = 0x40001308; 1468 r_lld_test_cleanup = 0x4000130c; 1469 r_lld_test_evt_canceled_cbk = 0x40001310; 1470 r_lld_test_evt_start_cbk = 0x40001314; 1471 r_lld_test_freq2chnl = 0x40001318; 1472 r_lld_test_frm_cbk = 0x4000131c; 1473 r_lld_test_frm_isr = 0x40001320; 1474 r_lld_test_init = 0x40001324; 1475 r_lld_test_rx_isr = 0x40001328; 1476 r_lld_test_set_tx_power = 0x4000132c; 1477 r_lld_test_start = 0x40001330; 1478 r_lld_test_stop = 0x40001334; 1479 r_lld_update_rxbuf = 0x40001338; 1480 r_lld_update_rxbuf_isr = 0x4000133c; 1481 r_lld_white_list_add = 0x40001340; 1482 r_lld_white_list_rem = 0x40001344; 1483 r_llm_activity_free_get = 0x40001348; 1484 r_llm_activity_free_set = 0x4000134c; 1485 r_llm_activity_syncing_get = 0x40001350; 1486 r_llm_adv_con_len_check = 0x40001354; 1487 r_llm_adv_hdl_to_id = 0x40001358; 1488 r_llm_adv_rep_flow_control_check = 0x4000135c; 1489 r_llm_adv_rep_flow_control_update = 0x40001360; 1490 r_llm_adv_reports_list_check = 0x40001364; 1491 r_llm_adv_set_all_release = 0x40001368; 1492 r_llm_adv_set_dft_params = 0x4000136c; 1493 r_llm_adv_set_release = 0x40001370; 1494 r_llm_aes_res_cb = 0x40001374; 1495 r_llm_ble_update_adv_flow_control = 0x40001378; 1496 r_llm_ch_map_update = 0x4000137c; 1497 r_llm_cmd_cmp_send = 0x40001380; 1498 r_llm_cmd_stat_send = 0x40001384; 1499 r_llm_dev_list_empty_entry = 0x40001388; 1500 r_llm_dev_list_search = 0x4000138c; 1501 r_llm_env_adv_dup_filt_deinit = 0x40001390; 1502 r_llm_env_adv_dup_filt_init = 0x40001394; 1503 r_llm_init_ble_adv_report_flow_contol = 0x40001398; 1504 r_llm_is_dev_connected = 0x4000139c; 1505 r_llm_is_dev_synced = 0x400013a0; 1506 r_llm_is_non_con_act_ongoing_check = 0x400013a4; 1507 r_llm_is_wl_accessible = 0x400013a8; 1508 r_llm_le_evt_mask_check = 0x400013ac; 1509 r_llm_link_disc = 0x400013b4; 1510 r_llm_master_ch_map_get = 0x400013b8; 1511 r_llm_msg_handler_tab_p_get = 0x400013bc; 1512 r_llm_no_activity = 0x400013c0; 1513 r_llm_per_adv_slot_dur = 0x400013c4; 1514 r_llm_plan_elt_get = 0x400013c8; 1515 r_llm_rx_path_comp_get = 0x400013cc; 1516 r_llm_scan_start = 0x400013d0; 1517 r_llm_scan_sync_acad_attach = 0x400013d4; 1518 r_llm_scan_sync_acad_detach = 0x400013d8; 1519 r_llm_send_adv_lost_event_to_host = 0x400013dc; 1520 r_llm_tx_path_comp_get = 0x400013e0; 1521 r_misc_deinit = 0x400013e4; 1522 r_misc_free_em_buf_in_isr = 0x400013e8; 1523 r_misc_init = 0x400013ec; 1524 r_misc_msg_handler_tab_p_get = 0x400013f0; 1525 r_notEqual256 = 0x400013f4; 1526 r_phy_upd_proc_start = 0x400013f8; 1527 r_platform_reset = 0x400013fc; 1528 r_rf_em_init = 0x40001404; 1529 r_rf_force_agc_enable = 0x40001408; 1530 r_rf_reg_rd = 0x4000140c; 1531 r_rf_reg_wr = 0x40001410; 1532 r_rf_reset = 0x40001414; 1533 r_rf_rssi_convert = 0x40001418; 1534 r_rf_rw_v9_le_disable = 0x4000141c; 1535 r_rf_rw_v9_le_enable = 0x40001420; 1536 r_rf_sleep = 0x40001424; 1537 r_rf_util_cs_fmt_convert = 0x40001430; 1538 r_rw_crypto_aes_ccm = 0x40001434; 1539 r_rw_crypto_aes_encrypt = 0x40001438; 1540 r_rw_crypto_aes_init = 0x4000143c; 1541 r_rw_crypto_aes_k1 = 0x40001440; 1542 r_rw_crypto_aes_k2 = 0x40001444; 1543 r_rw_crypto_aes_k3 = 0x40001448; 1544 r_rw_crypto_aes_k4 = 0x4000144c; 1545 r_rw_crypto_aes_rand = 0x40001450; 1546 r_rw_crypto_aes_result_handler = 0x40001454; 1547 r_rw_crypto_aes_s1 = 0x40001458; 1548 r_rw_cryto_aes_cmac = 0x4000145c; 1549 r_rw_v9_init_em_radio_table = 0x40001460; 1550 r_rwble_sleep_enter = 0x40001468; 1551 r_rwble_sleep_wakeup_end = 0x4000146c; 1552 r_rwbtdm_isr_wrapper = 0x40001470; 1553 r_rwip_active_check = 0x40001474; 1554 r_rwip_aes_encrypt = 0x40001478; 1555 r_rwip_assert = 0x4000147c; 1556 r_rwip_crypt_evt_handler = 0x40001480; 1557 r_rwip_crypt_isr_handler = 0x40001484; 1558 r_rwip_eif_get = 0x40001488; 1559 r_rwip_half_slot_2_lpcycles = 0x4000148c; 1560 r_rwip_hus_2_lpcycles = 0x40001490; 1561 r_rwip_isr = 0x40001494; 1562 r_rwip_lpcycles_2_hus = 0x40001498; 1563 r_rwip_prevent_sleep_clear = 0x4000149c; 1564 r_rwip_prevent_sleep_set = 0x400014a0; 1565 r_rwip_schedule = 0x400014a4; 1566 r_rwip_sleep = 0x400014a8; 1567 r_rwip_sw_int_handler = 0x400014ac; 1568 r_rwip_sw_int_req = 0x400014b0; 1569 r_rwip_time_get = 0x400014b4; 1570 r_rwip_timer_10ms_handler = 0x400014b8; 1571 r_rwip_timer_10ms_set = 0x400014bc; 1572 r_rwip_timer_hs_handler = 0x400014c0; 1573 r_rwip_timer_hs_set = 0x400014c4; 1574 r_rwip_timer_hus_handler = 0x400014c8; 1575 r_rwip_timer_hus_set = 0x400014cc; 1576 r_rwip_wakeup = 0x400014d0; 1577 r_rwip_wakeup_end = 0x400014d4; 1578 r_rwip_wlcoex_set = 0x400014d8; 1579 r_sch_alarm_clear = 0x400014dc; 1580 r_sch_alarm_init = 0x400014e0; 1581 r_sch_alarm_prog = 0x400014e4; 1582 r_sch_alarm_set = 0x400014e8; 1583 r_sch_alarm_timer_isr = 0x400014ec; 1584 r_sch_arb_conflict_check = 0x400014f0; 1585 r_sch_arb_elt_cancel = 0x400014f4; 1586 r_sch_arb_init = 0x400014fc; 1587 r_sch_arb_insert = 0x40001500; 1588 r_sch_arb_prog_timer = 0x40001504; 1589 r_sch_arb_remove = 0x40001508; 1590 r_sch_arb_sw_isr = 0x4000150c; 1591 r_sch_plan_chk = 0x40001510; 1592 r_sch_plan_clock_wrap_offset_update = 0x40001514; 1593 r_sch_plan_init = 0x40001518; 1594 r_sch_plan_interval_req = 0x4000151c; 1595 r_sch_plan_offset_max_calc = 0x40001520; 1596 r_sch_plan_offset_req = 0x40001524; 1597 r_sch_plan_position_range_compute = 0x40001528; 1598 r_sch_plan_rem = 0x4000152c; 1599 r_sch_plan_req = 0x40001530; 1600 r_sch_prog_init = 0x4000153c; 1601 r_sch_prog_push = 0x40001540; 1602 r_sch_prog_rx_isr = 0x40001544; 1603 r_sch_prog_skip_isr = 0x40001548; 1604 r_sch_prog_tx_isr = 0x4000154c; 1605 r_sch_slice_bg_add = 0x40001550; 1606 r_sch_slice_bg_remove = 0x40001554; 1607 r_sch_slice_compute = 0x40001558; 1608 r_sch_slice_fg_add = 0x4000155c; 1609 r_sch_slice_fg_remove = 0x40001560; 1610 r_sch_slice_init = 0x40001564; 1611 r_sch_slice_per_add = 0x40001568; 1612 r_sch_slice_per_remove = 0x4000156c; 1613 r_sdk_config_get_bt_sleep_enable = 0x40001570; 1614 r_sdk_config_get_hl_derived_opts = 0x40001574; 1615 r_sdk_config_get_opts = 0x40001578; 1616 r_sdk_config_get_priv_opts = 0x4000157c; 1617 r_sdk_config_set_bt_sleep_enable = 0x40001580; 1618 r_sdk_config_set_hl_derived_opts = 0x40001584; 1619 r_sdk_config_set_opts = 0x40001588; 1620 r_specialModP256 = 0x4000158c; 1621 r_unloaded_area_init = 0x40001590; 1622 r_vhci_flow_off = 0x40001594; 1623 r_vhci_flow_on = 0x40001598; 1624 r_vhci_notify_host_send_available = 0x4000159c; 1625 r_vhci_send_to_host = 0x400015a0; 1626 r_vnd_hci_command_handler = 0x400015a4; 1627 r_vshci_init = 0x400015a8; 1628 vnd_hci_command_handler_wrapper = 0x400015ac; 1629 /* Data (.data, .bss, .rodata) */ 1630 bt_rf_coex_cfg_p = 0x3fcdffcc; 1631 bt_rf_coex_hooks_p = 0x3fcdffc8; 1632 btdm_env_p = 0x3fcdffc4; 1633 g_rw_controller_task_handle = 0x3fcdffc0; 1634 g_rw_init_sem = 0x3fcdffbc; 1635 g_rw_schd_queue = 0x3fcdffb8; 1636 lld_init_env = 0x3fcdffb4; 1637 lld_rpa_renew_env = 0x3fcdffb0; 1638 lld_scan_env = 0x3fcdffac; 1639 lld_scan_sync_env = 0x3fcdffa8; 1640 lld_test_env = 0x3fcdffa4; 1641 p_ble_util_buf_env = 0x3fcdffa0; 1642 p_lld_env = 0x3fcdff9c; 1643 p_llm_env = 0x3fcdff98; 1644 r_h4tl_eif_p = 0x3fcdff94; 1645 r_hli_funcs_p = 0x3fcdff90; 1646 r_ip_funcs_p = 0x3fcdff8c; 1647 r_modules_funcs_p = 0x3fcdff88; 1648 r_osi_funcs_p = 0x3fcdff84; 1649 r_plf_funcs_p = 0x3fcdff80; 1650 vhci_env_p = 0x3fcdff7c; 1651 aa_gen = 0x3fcdff78; 1652 aes_env = 0x3fcdff6c; 1653 bt_rf_coex_cfg_cb = 0x3fcdff1c; 1654 btdm_pwr_state = 0x3fcdff18; 1655 btdm_slp_err = 0x3fcdff14; 1656 ecc_env = 0x3fcdff0c; 1657 esp_handler = 0x3fcdff04; 1658 esp_vendor_cmd = 0x3fcdfefc; 1659 g_adv_delay_dis = 0x3fcdfef8; 1660 g_conflict_elt = 0x3fcdfef4; 1661 g_eif_api = 0x3fcdfee4; 1662 g_event_empty = 0x3fcdfed8; 1663 g_llc_state = 0x3fcdfecc; 1664 g_llm_state = 0x3fcdfec8; 1665 g_max_evt_env = 0x3fcdfec4; 1666 g_misc_state = 0x3fcdfec0; 1667 g_rma_rule_db = 0x3fcdfea4; 1668 g_rtp_rule_db = 0x3fcdfe88; 1669 g_scan_forever = 0x3fcdfe85; 1670 g_time_msb = 0x3fcdfe84; 1671 h4tl_env = 0x3fcdfe5c; 1672 hci_env = 0x3fcdfe38; 1673 hci_ext_host = 0x3fcdfe34; 1674 hci_fc_env = 0x3fcdfe2c; 1675 hci_tl_env = 0x3fcdfe00; 1676 ke_env = 0x3fcdfdd0; 1677 ke_event_env = 0x3fcdfd90; 1678 ke_task_env = 0x3fcdfd14; 1679 llc_env = 0x3fcdfcec; 1680 lld_adv_env = 0x3fcdfcc4; 1681 lld_con_env = 0x3fcdfc9c; 1682 lld_exp_sync_pos_tab = 0x3fcdfc94; 1683 lld_per_adv_env = 0x3fcdfc6c; 1684 lld_sync_env = 0x3fcdfc44; 1685 llm_le_adv_flow_env = 0x3fcdfc38; 1686 rw_sleep_enable = 0x3fcdfc34; 1687 rwble_env = 0x3fcdfc2c; 1688 rwip_env = 0x3fcdfc10; 1689 rwip_param = 0x3fcdfc04; 1690 rwip_prog_delay = 0x3fcdfc00; 1691 rwip_rf = 0x3fcdfbc8; 1692 sch_alarm_env = 0x3fcdfbc0; 1693 sch_arb_env = 0x3fcdfbac; 1694 sch_plan_env = 0x3fcdfba4; 1695 sch_prog_env = 0x3fcdfaa0; 1696 sch_slice_env = 0x3fcdfa40; 1697 sch_slice_params = 0x3fcdfa38; 1698 timer_env = 0x3fcdfa30; 1699 unloaded_area = 0x3fcdfa2c; 1700 vshci_state = 0x3fcdfa28; 1701 TASK_DESC_LLC = 0x3fcdfa1c; 1702 TASK_DESC_LLM = 0x3fcdfa10; 1703 TASK_DESC_VSHCI = 0x3fcdfa04; 1704 co_default_bdaddr = 0x3fcdf9fc; 1705 dbg_assert_block = 0x3fcdf9f8; 1706 g_bt_plf_log_level = 0x3fcdf9f4; 1707 hci_cmd_desc_tab_vs_esp = 0x3fcdf9d0; 1708 hci_command_handler_tab_esp = 0x3fcdf9b8; 1709 privacy_en = 0x3fcdf9b4; 1710 sdk_cfg_priv_opts = 0x3fcdf96c; 1711 BasePoint_x_256 = 0x3ff1ffdc; 1712 BasePoint_y_256 = 0x3ff1ffbc; 1713 DebugE256PublicKey_x = 0x3ff1ff9c; 1714 DebugE256PublicKey_y = 0x3ff1ff7c; 1715 DebugE256SecretKey = 0x3ff1ff5c; 1716 ECC_4Win_Look_up_table = 0x3ff1f7a0; 1717 LLM_AA_CT1 = 0x3ff1f79c; 1718 LLM_AA_CT2 = 0x3ff1f798; 1719 RF_TX_PW_CONV_TBL = 0x3ff1f790; 1720 TASK_DESC_MISC = 0x3ff1f784; 1721 adv_evt_prop2type = 0x3ff1f768; 1722 adv_evt_type2prop = 0x3ff1f760; 1723 aes_cmac_zero = 0x3ff1f750; 1724 aes_k2_salt = 0x3ff1f740; 1725 aes_k3_id64 = 0x3ff1f738; 1726 aes_k3_salt = 0x3ff1f728; 1727 aes_k4_id6 = 0x3ff1f724; 1728 aes_k4_salt = 0x3ff1f714; 1729 bigHexP256 = 0x3ff1f6e8; 1730 byte_tx_time = 0x3ff1f6e0; 1731 co_null_bdaddr = 0x3ff1f6d8; 1732 co_phy_mask_to_rate = 0x3ff1f6d0; 1733 co_phy_mask_to_value = 0x3ff1f6c8; 1734 co_phy_to_rate = 0x3ff1f6c4; 1735 co_phy_value_to_mask = 0x3ff1f6c0; 1736 co_rate_to_byte_dur_us = 0x3ff1f6b8; 1737 co_rate_to_phy = 0x3ff1f6b0; 1738 co_rate_to_phy_mask = 0x3ff1f6ac; 1739 co_sca2ppm = 0x3ff1f69c; 1740 coef_B = 0x3ff1f670; 1741 connect_req_dur_tab = 0x3ff1f668; 1742 ecc_Jacobian_InfinityPoint256 = 0x3ff1f5e4; 1743 em_base_reg_lut = 0x3ff1f518; 1744 fixed_tx_time = 0x3ff1f510; 1745 h4tl_msgtype2hdrlen = 0x3ff1f508; 1746 hci_cmd_desc_root_tab = 0x3ff1f4d8; 1747 hci_cmd_desc_tab_ctrl_bb = 0x3ff1f46c; 1748 hci_cmd_desc_tab_info_par = 0x3ff1f43c; 1749 hci_cmd_desc_tab_le = 0x3ff1f0a0; 1750 hci_cmd_desc_tab_lk_ctrl = 0x3ff1f088; 1751 hci_cmd_desc_tab_stat_par = 0x3ff1f07c; 1752 hci_cmd_desc_tab_vs = 0x3ff1f040; 1753 hci_evt_desc_tab = 0x3ff1eff8; 1754 hci_evt_le_desc_tab = 0x3ff1ef58; 1755 hci_evt_le_desc_tab_esp = 0x3ff1ef50; 1756 hci_rsvd_evt_msk = 0x3ff1ef48; 1757 lld_aux_phy_to_rate = 0x3ff1ef44; 1758 lld_init_max_aux_dur_tab = 0x3ff1ef3c; 1759 lld_scan_map_legacy_pdu_to_evt_type = 0x3ff1ef34; 1760 lld_scan_max_aux_dur_tab = 0x3ff1ef2c; 1761 lld_sync_max_aux_dur_tab = 0x3ff1ef24; 1762 llm_local_le_feats = 0x3ff1ef1c; 1763 llm_local_le_states = 0x3ff1ef14; 1764 llm_local_supp_cmds = 0x3ff1eeec; 1765 maxSecretKey_256 = 0x3ff1eecc; 1766 max_data_tx_time = 0x3ff1eec4; 1767 one_bits = 0x3ff1eeb4; 1768 rwip_coex_cfg = 0x3ff1eeac; 1769 rwip_priority = 0x3ff1ee94; 1770 veryBigHexP256 = 0x3ff1ee48; 1771 1772 /* bluetooth hook funcs */ 1773 r_llc_loc_encrypt_proc_continue_hook = 0x40001c60; 1774 r_llc_loc_phy_upd_proc_continue_hook = 0x40001c64; 1775 r_llc_rem_phy_upd_proc_continue_hook = 0x40001c68; 1776 r_lld_scan_frm_eof_isr_hook = 0x40001c6c; 1777 r_lld_scan_evt_start_cbk_hook = 0x40001c70; 1778 r_lld_scan_process_pkt_rx_ext_adv_hook = 0x40001c78; 1779 r_lld_scan_sched_hook = 0x40001c7c; 1780 r_lld_adv_evt_start_cbk_hook = 0x40001c84; 1781 r_lld_adv_aux_evt_start_cbk_hook = 0x40001c88; 1782 r_lld_adv_frm_isr_hook = 0x40001c8c; 1783 r_lld_adv_start_init_evt_param_hook = 0x40001c90; 1784 r_lld_con_evt_canceled_cbk_hook = 0x40001c94; 1785 r_lld_con_frm_isr_hook = 0x40001c98; 1786 r_lld_con_tx_hook = 0x40001c9c; 1787 r_lld_con_rx_hook = 0x40001ca0; 1788 r_lld_con_evt_start_cbk_hook = 0x40001ca4; 1789 r_lld_con_tx_prog_new_packet_hook = 0x40001cac; 1790 r_lld_init_frm_eof_isr_hook = 0x40001cb0; 1791 r_lld_init_evt_start_cbk_hook = 0x40001cb4; 1792 r_lld_init_sched_hook = 0x40001cbc; 1793 r_lld_init_process_pkt_tx_hook = 0x40001cc0; 1794 r_lld_per_adv_evt_start_cbk_hook = 0x40001cc4; 1795 r_lld_per_adv_frm_isr_hook = 0x40001cc8; 1796 r_lld_per_adv_start_hook = 0x40001ccc; 1797 r_lld_sync_frm_eof_isr_hook = 0x40001cd0; 1798 r_lld_sync_evt_start_cbk_hook = 0x40001cd4; 1799 r_lld_sync_start_hook = 0x40001cd8; 1800 r_lld_sync_process_pkt_rx_pkt_check_hook = 0x40001cdc; 1801 r_sch_arb_insert_hook = 0x40001ce0; 1802 r_sch_plan_offset_req_hook = 0x40001ce4; 1803 1804 /*************************************** 1805 Group rom_pp 1806 ***************************************/ 1807 1808 /* Functions */ 1809 esp_pp_rom_version_get = 0x400015b0; 1810 RC_GetBlockAckTime = 0x400015b4; 1811 ebuf_list_remove = 0x400015b8; 1812 /*esf_buf_alloc = 0x400015bc;*/ 1813 GetAccess = 0x400015c8; 1814 hal_mac_is_low_rate_enabled = 0x400015cc; 1815 hal_mac_tx_get_blockack = 0x400015d0; 1816 /* hal_mac_tx_set_ppdu = 0x400015d4;*/ 1817 ic_get_trc = 0x400015d8; 1818 /* ic_mac_deinit = 0x400015dc; */ 1819 ic_mac_init = 0x400015e0; 1820 ic_interface_enabled = 0x400015e4; 1821 is_lmac_idle = 0x400015e8; 1822 /*lmacAdjustTimestamp = 0x400015ec;*/ 1823 lmacDiscardAgedMSDU = 0x400015f0; 1824 /*lmacDiscardMSDU = 0x400015f4;*/ 1825 lmacEndFrameExchangeSequence = 0x400015f8; 1826 lmacIsIdle = 0x400015fc; 1827 lmacIsLongFrame = 0x40001600; 1828 /*lmacMSDUAged = 0x40001604;*/ 1829 lmacPostTxComplete = 0x40001608; 1830 lmacProcessAllTxTimeout = 0x4000160c; 1831 lmacProcessCollisions = 0x40001610; 1832 lmacProcessRxSucData = 0x40001614; 1833 lmacReachLongLimit = 0x40001618; 1834 lmacReachShortLimit = 0x4000161c; 1835 lmacRecycleMPDU = 0x40001620; 1836 lmacRxDone = 0x40001624; 1837 /*lmacSetTxFrame = 0x40001628;*/ 1838 /*lmacTxFrame = 0x40001630;*/ 1839 mac_tx_set_duration = 0x40001634; 1840 /* mac_tx_set_htsig = 0x40001638;*/ 1841 mac_tx_set_plcp0 = 0x4000163c; 1842 /* mac_tx_set_plcp1 = 0x40001640;*/ 1843 mac_tx_set_plcp2 = 0x40001644; 1844 /* pm_check_state = 0x40001648; */ 1845 pm_disable_dream_timer = 0x4000164c; 1846 pm_disable_sleep_delay_timer = 0x40001650; 1847 pm_dream = 0x40001654; 1848 pm_mac_wakeup = 0x40001658; 1849 pm_mac_sleep = 0x4000165c; 1850 pm_enable_active_timer = 0x40001660; 1851 pm_enable_sleep_delay_timer = 0x40001664; 1852 pm_local_tsf_process = 0x40001668; 1853 pm_set_beacon_filter = 0x4000166c; 1854 pm_is_in_wifi_slice_threshold = 0x40001670; 1855 pm_is_waked = 0x40001674; 1856 pm_keep_alive = 0x40001678; 1857 /* pm_on_beacon_rx = 0x4000167c; */ 1858 pm_on_data_rx = 0x40001680; 1859 pm_on_tbtt = 0x40001684; 1860 /* pm_parse_beacon = 0x40001688;*/ 1861 /* pm_process_tim = 0x4000168c; */ 1862 /*pm_rx_beacon_process = 0x40001690;*/ 1863 /* pm_rx_data_process = 0x40001694; */ 1864 /*pm_sleep = 0x40001698;*/ 1865 pm_sleep_for = 0x4000169c; 1866 /* pm_tbtt_process = 0x400016a0; */ 1867 ppAMPDU2Normal = 0x400016a4; 1868 /*ppAssembleAMPDU = 0x400016a8;*/ 1869 ppCalFrameTimes = 0x400016ac; 1870 ppCalSubFrameLength = 0x400016b0; 1871 /*ppCalTxAMPDULength = 0x400016b4;*/ 1872 ppCheckTxAMPDUlength = 0x400016b8; 1873 ppDequeueRxq_Locked = 0x400016bc; 1874 ppDequeueTxQ = 0x400016c0; 1875 ppEmptyDelimiterLength = 0x400016c4; 1876 ppEnqueueRxq = 0x400016c8; 1877 ppEnqueueTxDone = 0x400016cc; 1878 ppGetTxQFirstAvail_Locked = 0x400016d0; 1879 ppGetTxframe = 0x400016d4; 1880 ppProcessRxPktHdr = 0x400016e0; 1881 ppProcessTxQ = 0x400016e4; 1882 ppRecordBarRRC = 0x400016e8; 1883 lmacRequestTxopQueue = 0x400016ec; 1884 lmacReleaseTxopQueue = 0x400016f0; 1885 ppRecycleAmpdu = 0x400016f4; 1886 ppRecycleRxPkt = 0x400016f8; 1887 ppResortTxAMPDU = 0x400016fc; 1888 ppResumeTxAMPDU = 0x40001700; 1889 /* ppRxFragmentProc = 0x40001704; */ 1890 /* ppRxPkt = 0x40001708; */ 1891 ppRxProtoProc = 0x4000170c; 1892 ppSearchTxQueue = 0x40001710; 1893 ppSearchTxframe = 0x40001714; 1894 ppSelectNextQueue = 0x40001718; 1895 ppSubFromAMPDU = 0x4000171c; 1896 ppTask = 0x40001720; 1897 ppTxPkt = 0x40001724; 1898 ppTxProtoProc = 0x40001728; 1899 ppTxqUpdateBitmap = 0x4000172c; 1900 pp_coex_tx_request = 0x40001730; 1901 pp_hdrsize = 0x40001734; 1902 pp_post = 0x40001738; 1903 pp_process_hmac_waiting_txq = 0x4000173c; 1904 rcGetAmpduSched = 0x40001740; 1905 rcUpdateRxDone = 0x40001744; 1906 rc_get_trc = 0x40001748; 1907 rc_get_trc_by_index = 0x4000174c; 1908 rcAmpduLowerRate = 0x40001750; 1909 rcampduuprate = 0x40001754; 1910 rcClearCurAMPDUSched = 0x40001758; 1911 rcClearCurSched = 0x4000175c; 1912 rcClearCurStat = 0x40001760; 1913 rcLowerSched = 0x40001768; 1914 rcSetTxAmpduLimit = 0x4000176c; 1915 /* rcTxUpdatePer = 0x40001770;*/ 1916 rcUpdateAckSnr = 0x40001774; 1917 /*rcUpdateRate = 0x40001778;*/ 1918 /* rcUpdateTxDone = 0x4000177c; */ 1919 rcUpdateTxDoneAmpdu2 = 0x40001780; 1920 rcUpSched = 0x40001784; 1921 rssi_margin = 0x40001788; 1922 rx11NRate2AMPDULimit = 0x4000178c; 1923 TRC_AMPDU_PER_DOWN_THRESHOLD = 0x40001790; 1924 TRC_AMPDU_PER_UP_THRESHOLD = 0x40001794; 1925 trc_calc_duration = 0x40001798; 1926 trc_isTxAmpduOperational = 0x4000179c; 1927 trc_onAmpduOp = 0x400017a0; 1928 TRC_PER_IS_GOOD = 0x400017a4; 1929 trc_SetTxAmpduState = 0x400017a8; 1930 trc_tid_isTxAmpduOperational = 0x400017ac; 1931 trcAmpduSetState = 0x400017b0; 1932 wDev_AppendRxBlocks = 0x400017b8; 1933 wDev_DiscardFrame = 0x400017bc; 1934 wDev_GetNoiseFloor = 0x400017c0; 1935 wDev_IndicateAmpdu = 0x400017c4; 1936 /*wDev_IndicateFrame = 0x400017c8;*/ 1937 wdev_bank_store = 0x400017cc; 1938 wdev_bank_load = 0x400017d0; 1939 wdev_mac_reg_load = 0x400017d4; 1940 wdev_mac_reg_store = 0x400017d8; 1941 wdev_mac_special_reg_load = 0x400017dc; 1942 wdev_mac_special_reg_store = 0x400017e0; 1943 wdev_mac_wakeup = 0x400017e4; 1944 wdev_mac_sleep = 0x400017e8; 1945 hal_mac_is_dma_enable = 0x400017ec; 1946 /*wDev_ProcessFiq = 0x400017f0;*/ 1947 /*wDev_ProcessRxSucData = 0x400017f4;*/ 1948 wdevProcessRxSucDataAll = 0x400017f8; 1949 wdev_csi_len_align = 0x400017fc; 1950 ppDequeueTxDone_Locked = 0x40001800; 1951 /*pm_tx_data_done_process = 0x40001808;*/ 1952 config_is_cache_tx_buf_enabled = 0x4000180c; 1953 //ppMapWaitTxq = 0x40001810; 1954 ppProcessWaitingQueue = 0x40001814; 1955 ppDisableQueue = 0x40001818; 1956 pm_allow_tx = 0x4000181c; 1957 /* Data (.data, .bss, .rodata) */ 1958 our_instances_ptr = 0x3ff1ee44; 1959 pTxRx = 0x3fcdf968; 1960 lmacConfMib_ptr = 0x3fcdf964; 1961 our_wait_eb = 0x3fcdf960; 1962 our_tx_eb = 0x3fcdf95c; 1963 pp_wdev_funcs = 0x3fcdf958; 1964 g_osi_funcs_p = 0x3fcdf954; 1965 wDevCtrl_ptr = 0x3fcdf950; 1966 g_wdev_last_desc_reset_ptr = 0x3ff1ee40; 1967 wDevMacSleep_ptr = 0x3fcdf94c; 1968 g_lmac_cnt_ptr = 0x3fcdf948; 1969 our_controls_ptr = 0x3ff1ee3c; 1970 pp_sig_cnt_ptr = 0x3fcdf944; 1971 g_eb_list_desc_ptr = 0x3fcdf940; 1972 s_fragment_ptr = 0x3fcdf93c; 1973 if_ctrl_ptr = 0x3fcdf938; 1974 g_intr_lock_mux = 0x3fcdf934; 1975 g_wifi_global_lock = 0x3fcdf930; 1976 s_wifi_queue = 0x3fcdf92c; 1977 pp_task_hdl = 0x3fcdf928; 1978 s_pp_task_create_sem = 0x3fcdf924; 1979 s_pp_task_del_sem = 0x3fcdf920; 1980 g_wifi_menuconfig_ptr = 0x3fcdf91c; 1981 xphyQueue = 0x3fcdf918; 1982 ap_no_lr_ptr = 0x3fcdf914; 1983 rc11BSchedTbl_ptr = 0x3fcdf910; 1984 rc11NSchedTbl_ptr = 0x3fcdf90c; 1985 rcLoRaSchedTbl_ptr = 0x3fcdf908; 1986 BasicOFDMSched_ptr = 0x3fcdf904; 1987 trc_ctl_ptr = 0x3fcdf900; 1988 g_pm_cnt_ptr = 0x3fcdf8fc; 1989 g_pm_ptr = 0x3fcdf8f8; 1990 g_pm_cfg_ptr = 0x3fcdf8f4; 1991 g_esp_mesh_quick_funcs_ptr = 0x3fcdf8f0; 1992 g_txop_queue_status_ptr = 0x3fcdf8ec; 1993 g_mac_sleep_en_ptr = 0x3fcdf8e8; 1994 g_mesh_is_root_ptr = 0x3fcdf8e4; 1995 g_mesh_topology_ptr = 0x3fcdf8e0; 1996 g_mesh_init_ps_type_ptr = 0x3fcdf8dc; 1997 g_mesh_is_started_ptr = 0x3fcdf8d8; 1998 g_config_func = 0x3fcdf8d4; 1999 g_net80211_tx_func = 0x3fcdf8d0; 2000 g_timer_func = 0x3fcdf8cc; 2001 s_michael_mic_failure_cb = 0x3fcdf8c8; 2002 wifi_sta_rx_probe_req = 0x3fcdf8c4; 2003 g_tx_done_cb_func = 0x3fcdf8c0; 2004 g_per_conn_trc = 0x3fcdf874; 2005 s_encap_amsdu_func = 0x3fcdf870; 2006 2007 2008 /*************************************** 2009 Group rom_net80211 2010 ***************************************/ 2011 2012 /* Functions */ 2013 esp_net80211_rom_version_get = 0x40001820; 2014 ampdu_dispatch = 0x40001824; 2015 ampdu_dispatch_all = 0x40001828; 2016 ampdu_dispatch_as_many_as_possible = 0x4000182c; 2017 ampdu_dispatch_movement = 0x40001830; 2018 ampdu_dispatch_upto = 0x40001834; 2019 chm_is_at_home_channel = 0x40001838; 2020 cnx_node_is_existing = 0x4000183c; 2021 cnx_node_search = 0x40001840; 2022 ic_ebuf_recycle_rx = 0x40001844; 2023 ic_ebuf_recycle_tx = 0x40001848; 2024 ic_reset_rx_ba = 0x4000184c; 2025 ieee80211_align_eb = 0x40001850; 2026 ieee80211_ampdu_reorder = 0x40001854; 2027 ieee80211_ampdu_start_age_timer = 0x40001858; 2028 /*ieee80211_encap_esfbuf = 0x4000185c;*/ 2029 ieee80211_is_tx_allowed = 0x40001860; 2030 ieee80211_output_pending_eb = 0x40001864; 2031 /*ieee80211_output_process = 0x40001868;*/ 2032 ieee80211_set_tx_desc = 0x4000186c; 2033 rom_sta_input = 0x40001870; 2034 wifi_get_macaddr = 0x40001874; 2035 wifi_rf_phy_disable = 0x40001878; 2036 wifi_rf_phy_enable = 0x4000187c; 2037 ic_ebuf_alloc = 0x40001880; 2038 ieee80211_classify = 0x40001884; 2039 ieee80211_copy_eb_header = 0x40001888; 2040 ieee80211_recycle_cache_eb = 0x4000188c; 2041 ieee80211_search_node = 0x40001890; 2042 roundup2 = 0x40001894; 2043 ieee80211_crypto_encap = 0x40001898; 2044 /* ieee80211_crypto_decap = 0x4000189c; */ 2045 /* ieee80211_decap = 0x400018a0; */ 2046 ieee80211_set_tx_pti = 0x400018a4; 2047 wifi_is_started = 0x400018a8; 2048 /* Data (.data, .bss, .rodata) */ 2049 net80211_funcs = 0x3fcdf86c; 2050 g_scan = 0x3fcdf868; 2051 g_chm = 0x3fcdf864; 2052 g_ic_ptr = 0x3fcdf860; 2053 g_hmac_cnt_ptr = 0x3fcdf85c; 2054 g_tx_cacheq_ptr = 0x3fcdf858; 2055 s_netstack_free = 0x3fcdf854; 2056 mesh_rxcb = 0x3fcdf850; 2057 sta_rxcb = 0x3fcdf84c; 2058 2059 2060 /*************************************** 2061 Group rom_coexist 2062 ***************************************/ 2063 2064 /* Functions */ 2065 esp_coex_rom_version_get = 0x400018ac; 2066 coex_bt_release = 0x400018b0; 2067 coex_bt_request = 0x400018b4; 2068 coex_core_ble_conn_dyn_prio_get = 0x400018b8; 2069 coex_core_event_duration_get = 0x400018bc; 2070 coex_core_pti_get = 0x400018c0; 2071 coex_core_release = 0x400018c4; 2072 coex_core_request = 0x400018c8; 2073 coex_core_status_get = 0x400018cc; 2074 /*coex_core_timer_idx_get = 0x400018d0;*/ 2075 coex_event_duration_get = 0x400018d4; 2076 coex_hw_timer_disable = 0x400018d8; 2077 coex_hw_timer_enable = 0x400018dc; 2078 coex_hw_timer_set = 0x400018e0; 2079 coex_schm_interval_set = 0x400018e4; 2080 coex_schm_lock = 0x400018e8; 2081 coex_schm_unlock = 0x400018ec; 2082 coex_status_get = 0x400018f0; 2083 coex_wifi_release = 0x400018f4; 2084 esp_coex_ble_conn_dynamic_prio_get = 0x400018f8; 2085 /* Data (.data, .bss, .rodata) */ 2086 coex_env_ptr = 0x3fcdf848; 2087 coex_pti_tab_ptr = 0x3fcdf844; 2088 coex_schm_env_ptr = 0x3fcdf840; 2089 coexist_funcs = 0x3fcdf83c; 2090 g_coa_funcs_p = 0x3fcdf838; 2091 g_coex_param_ptr = 0x3fcdf834; 2092 2093 2094 /*************************************** 2095 Group rom_phy 2096 ***************************************/ 2097 2098 /* Functions */ 2099 phy_get_romfuncs = 0x400018fc; 2100 rom_abs_temp = 0x40001900; 2101 rom_bb_bss_cbw40_dig = 0x40001904; 2102 rom_bb_wdg_test_en = 0x40001908; 2103 rom_bb_wdt_get_status = 0x4000190c; 2104 rom_bb_wdt_int_enable = 0x40001910; 2105 rom_bb_wdt_rst_enable = 0x40001914; 2106 rom_bb_wdt_timeout_clear = 0x40001918; 2107 rom_cbw2040_cfg = 0x4000191c; 2108 rom_check_noise_floor = 0x40001920; 2109 rom_chip_i2c_readReg = 0x40001924; 2110 rom_chip_i2c_writeReg = 0x40001928; 2111 rom_correct_rf_ana_gain = 0x4000192c; 2112 rom_dc_iq_est = 0x40001930; 2113 rom_disable_agc = 0x40001934; 2114 rom_en_pwdet = 0x40001938; 2115 rom_enable_agc = 0x4000193c; 2116 rom_get_bbgain_db = 0x40001940; 2117 rom_get_data_sat = 0x40001944; 2118 rom_get_i2c_read_mask = 0x40001948; 2119 rom_get_pwctrl_correct = 0x4000194c; 2120 rom_get_rf_gain_qdb = 0x40001950; 2121 rom_i2c_readReg = 0x40001954; 2122 rom_i2c_readReg_Mask = 0x40001958; 2123 rom_i2c_writeReg = 0x4000195c; 2124 rom_i2c_writeReg_Mask = 0x40001960; 2125 /* rom_index_to_txbbgain = 0x40001964; */ 2126 rom_iq_est_disable = 0x40001968; 2127 rom_iq_est_enable = 0x4000196c; 2128 rom_linear_to_db = 0x40001970; 2129 rom_loopback_mode_en = 0x40001974; 2130 rom_mhz2ieee = 0x40001978; 2131 rom_noise_floor_auto_set = 0x4000197c; 2132 rom_pbus_debugmode = 0x40001980; 2133 rom_pbus_force_mode = 0x40001984; 2134 rom_pbus_force_test = 0x40001988; 2135 rom_pbus_rd = 0x4000198c; 2136 rom_pbus_rd_addr = 0x40001990; 2137 rom_pbus_rd_shift = 0x40001994; 2138 rom_pbus_set_dco = 0x40001998; 2139 rom_pbus_set_rxgain = 0x4000199c; 2140 rom_pbus_workmode = 0x400019a0; 2141 rom_pbus_xpd_rx_off = 0x400019a4; 2142 rom_pbus_xpd_rx_on = 0x400019a8; 2143 rom_pbus_xpd_tx_off = 0x400019ac; 2144 /* rom_pbus_xpd_tx_on = 0x400019b0; */ 2145 rom_phy_byte_to_word = 0x400019b4; 2146 rom_phy_disable_cca = 0x400019b8; 2147 rom_phy_enable_cca = 0x400019bc; 2148 rom_phy_get_noisefloor = 0x400019c0; 2149 rom_phy_get_rx_freq = 0x400019c4; 2150 rom_phy_set_bbfreq_init = 0x400019c8; 2151 rom_pow_usr = 0x400019cc; 2152 rom_pwdet_sar2_init = 0x400019d0; 2153 rom_read_hw_noisefloor = 0x400019d4; 2154 rom_read_sar_dout = 0x400019d8; 2155 rom_set_cal_rxdc = 0x400019dc; 2156 rom_set_chan_cal_interp = 0x400019e0; 2157 rom_set_loopback_gain = 0x400019e4; 2158 rom_set_noise_floor = 0x400019e8; 2159 rom_set_rxclk_en = 0x400019ec; 2160 /* rom_set_tx_dig_gain = 0x400019f0; */ 2161 /* rom_set_txcap_reg = 0x400019f4; */ 2162 rom_set_txclk_en = 0x400019f8; 2163 rom_spur_cal = 0x400019fc; 2164 rom_spur_reg_write_one_tone = 0x40001a00; 2165 rom_target_power_add_backoff = 0x40001a04; 2166 rom_tx_pwctrl_bg_init = 0x40001a08; 2167 /* rom_txbbgain_to_index = 0x40001a0c; */ 2168 rom_wifi_11g_rate_chg = 0x40001a10; 2169 rom_write_gain_mem = 0x40001a14; 2170 chip726_phyrom_version = 0x40001a18; 2171 rom_disable_wifi_agc = 0x40001a1c; 2172 rom_enable_wifi_agc = 0x40001a20; 2173 rom_set_tx_gain_table = 0x40001a24; 2174 rom_bt_index_to_bb = 0x40001a28; 2175 rom_bt_bb_to_index = 0x40001a2c; 2176 rom_wr_bt_tx_atten = 0x40001a30; 2177 rom_wr_bt_tx_gain_mem = 0x40001a34; 2178 rom_spur_coef_cfg = 0x40001a38; 2179 rom_bb_bss_cbw40 = 0x40001a3c; 2180 rom_set_cca = 0x40001a40; 2181 rom_tx_paon_set = 0x40001a44; 2182 rom_i2cmst_reg_init = 0x40001a48; 2183 rom_iq_corr_enable = 0x40001a4c; 2184 rom_fe_reg_init = 0x40001a50; 2185 /* rom_agc_reg_init = 0x40001a54; */ 2186 /* rom_bb_reg_init = 0x40001a58; */ 2187 rom_mac_enable_bb = 0x40001a5c; 2188 rom_bb_wdg_cfg = 0x40001a60; 2189 rom_force_txon = 0x40001a64; 2190 rom_fe_txrx_reset = 0x40001a68; 2191 rom_set_rx_comp = 0x40001a6c; 2192 /* rom_set_pbus_reg = 0x40001a70; */ 2193 rom_write_chan_freq = 0x40001a74; 2194 /* rom_phy_xpd_rf = 0x40001a78; */ 2195 rom_set_xpd_sar = 0x40001a7c; 2196 rom_write_dac_gain2 = 0x40001a80; 2197 rom_rtc_sar2_init = 0x40001a84; 2198 rom_get_target_power_offset = 0x40001a88; 2199 /* rom_write_txrate_power_offset = 0x40001a8c; */ 2200 rom_get_rate_fcc_index = 0x40001a90; 2201 rom_get_rate_target_power = 0x40001a94; 2202 rom_write_wifi_dig_gain = 0x40001a98; 2203 rom_bt_correct_rf_ana_gain = 0x40001a9c; 2204 rom_pkdet_vol_start = 0x40001aa0; 2205 rom_read_sar2_code = 0x40001aa4; 2206 rom_get_sar2_vol = 0x40001aa8; 2207 rom_get_pll_vol = 0x40001aac; 2208 rom_get_phy_target_power = 0x40001ab0; 2209 /* rom_temp_to_power = 0x40001ab4; */ 2210 rom_phy_track_pll_cap = 0x40001ab8; 2211 rom_phy_pwdet_always_en = 0x40001abc; 2212 rom_phy_pwdet_onetime_en = 0x40001ac0; 2213 rom_get_i2c_mst0_mask = 0x40001ac4; 2214 rom_get_i2c_hostid = 0x40001ac8; 2215 rom_enter_critical_phy = 0x40001acc; 2216 rom_exit_critical_phy = 0x40001ad0; 2217 rom_chip_i2c_readReg_org = 0x40001ad4; 2218 rom_i2c_paral_set_mst0 = 0x40001ad8; 2219 rom_i2c_paral_set_read = 0x40001adc; 2220 rom_i2c_paral_read = 0x40001ae0; 2221 rom_i2c_paral_write = 0x40001ae4; 2222 rom_i2c_paral_write_num = 0x40001ae8; 2223 rom_i2c_paral_write_mask = 0x40001aec; 2224 rom_bb_bss_cbw40_ana = 0x40001af0; 2225 rom_chan_to_freq = 0x40001af4; 2226 /* rom_open_i2c_xpd = 0x40001af8; */ 2227 rom_dac_rate_set = 0x40001afc; 2228 /* rom_tsens_read_init = 0x40001b00; */ 2229 /* rom_tsens_code_read = 0x40001b04; */ 2230 rom_tsens_index_to_dac = 0x40001b08; 2231 rom_tsens_index_to_offset = 0x40001b0c; 2232 /* rom_tsens_dac_cal = 0x40001b10; */ 2233 rom_code_to_temp = 0x40001b14; 2234 rom_write_pll_cap_mem = 0x40001b18; 2235 rom_pll_correct_dcap = 0x40001b1c; 2236 rom_phy_en_hw_set_freq = 0x40001b20; 2237 rom_phy_dis_hw_set_freq = 0x40001b24; 2238 /* rom_pll_vol_cal = 0x40001b28; */