github.com/tinygo-org/tinygo@v0.31.3-0.20240404173401-90b0bf646c27/targets/teensy40.s (about)

     1  // -----------------------------------------------------------------------------
     2  //  file: teensy40.s
     3  //  desc: various startup and configuration data for Teensy 4.0.
     4  // -----------------------------------------------------------------------------
     5  //  References
     6  //    i.MX RT1060 Processor Reference Manual
     7  //       - Section 9.7.1 "Image Vector Table and Boot Data"
     8  //    Teensyduino 1.53 by Paul Stoffregen (PJRC)
     9  //       - cores/teensy4/bootdata.c
    10  //       - cores/teensy4/startup.c
    11  // -----------------------------------------------------------------------------
    12  
    13  .section .boot_data
    14  .global  __boot_data
    15  __boot_data:
    16      .word 0x60000000         // boot start location
    17      .word _image_size        // flash size
    18      .word 0                  // plugin flag, use 0 to indicate normal (non-plugin) ROM image
    19  
    20  .section .ivt
    21  .global  __ivt
    22  __ivt:
    23      .word 0x402000D1         // header (version 4.0)
    24      .word _svectors          // image entry function
    25      .word 0                  // reserved
    26      .word 0                  // DCD info (optional, set to 0|NULL if unused)
    27      .word __boot_data        // boot data struct
    28      .word __ivt              // self
    29      .word 0                  // command sequence file (CSF) not provided in image
    30      .word 0                  // reserved
    31  
    32  .section .flash_config
    33  .global  __flash_config
    34  __flash_config:
    35      // 448 byte common FlexSPI configuration block, 8.6.3.1 page 223 (RT1060 rev 0)
    36      // MCU_Flashloader_Reference_Manual.pdf, 8.2.1, Table 8-2, page 72-75
    37      .word 0x42464346         // Tag                                       0x00
    38      .word 0x56010000         // Version
    39      .word 0                  // reserved
    40      .word 0x00020101         // columnAdressWidth,dataSetupTime,dataHoldTime,readSampleClkSrc
    41  
    42      .word 0x00000000         // waitTimeCfgCommands,-,deviceModeCfgEnable
    43      .word 0                  // deviceModeSeq
    44      .word 0                  // deviceModeArg
    45      .word 0x00000000         // -,-,-,configCmdEnable
    46  
    47      .word 0                  // configCmdSeqs                             0x20
    48      .word 0
    49      .word 0
    50      .word 0
    51  
    52      .word 0                  // cfgCmdArgs                                0x30
    53      .word 0
    54      .word 0
    55      .word 0
    56  
    57      .word 0x00000000         // controllerMiscOption                      0x40
    58      .word 0x00030401         // lutCustomSeqEnable,serialClkFreq,sflashPadType,deviceType
    59      .word 0                  // reserved
    60      .word 0                  // reserved
    61  
    62      .word 0x00200000         // sflashA1Size (Teensy 4.0)                 0x50
    63      //.word 0x00800000         // sflashA1Size (Teensy 4.1)                 0x50
    64  
    65      .word 0                  // sflashA2Size
    66      .word 0                  // sflashB1Size
    67      .word 0                  // sflashB2Size
    68  
    69      .word 0                  // csPadSettingOverride                      0x60
    70      .word 0                  // sclkPadSettingOverride
    71      .word 0                  // dataPadSettingOverride
    72      .word 0                  // dqsPadSettingOverride
    73  
    74      .word 0                  // timeoutInMs                               0x70
    75      .word 0                  // commandInterval
    76      .word 0                  // dataValidTime
    77      .word 0x00000000         // busyBitPolarity,busyOffset
    78  
    79      .word 0x0A1804EB         // lookupTable[0]                            0x80
    80      .word 0x26043206         // lookupTable[1]
    81      .word 0                  // lookupTable[2]
    82      .word 0                  // lookupTable[3]
    83  
    84      .word 0x24040405         // lookupTable[4]                            0x90
    85      .word 0                  // lookupTable[5]
    86      .word 0                  // lookupTable[6]
    87      .word 0                  // lookupTable[7]
    88  
    89      .word 0                  // lookupTable[8]                            0xA0
    90      .word 0                  // lookupTable[9]
    91      .word 0                  // lookupTable[10]
    92      .word 0                  // lookupTable[11]
    93  
    94      .word 0x00000406         // lookupTable[12]                           0xB0
    95      .word 0                  // lookupTable[13]
    96      .word 0                  // lookupTable[14]
    97      .word 0                  // lookupTable[15]
    98  
    99      .word 0                  // lookupTable[16]                           0xC0
   100      .word 0                  // lookupTable[17]
   101      .word 0                  // lookupTable[18]
   102      .word 0                  // lookupTable[19]
   103  
   104      .word 0x08180420         // lookupTable[20]                           0xD0
   105      .word 0                  // lookupTable[21]
   106      .word 0                  // lookupTable[22]
   107      .word 0                  // lookupTable[23]
   108  
   109      .word 0                  // lookupTable[24]                           0xE0
   110      .word 0                  // lookupTable[25]
   111      .word 0                  // lookupTable[26]
   112      .word 0                  // lookupTable[27]
   113  
   114      .word 0                  // lookupTable[28]                           0xF0
   115      .word 0                  // lookupTable[29]
   116      .word 0                  // lookupTable[30]
   117      .word 0                  // lookupTable[31]
   118  
   119      .word 0x081804D8         // lookupTable[32]                           0x100
   120      .word 0                  // lookupTable[33]
   121      .word 0                  // lookupTable[34]
   122      .word 0                  // lookupTable[35]
   123  
   124      .word 0x08180402         // lookupTable[36]                           0x110
   125      .word 0x00002004         // lookupTable[37]
   126      .word 0                  // lookupTable[38]
   127      .word 0                  // lookupTable[39]
   128  
   129      .word 0                  // lookupTable[40]                           0x120
   130      .word 0                  // lookupTable[41]
   131      .word 0                  // lookupTable[42]
   132      .word 0                  // lookupTable[43]
   133  
   134      .word 0x00000460         // lookupTable[44]                           0x130
   135      .word 0                  // lookupTable[45]
   136      .word 0                  // lookupTable[46]
   137      .word 0                  // lookupTable[47]
   138  
   139      .word 0                  // lookupTable[48]                           0x140
   140      .word 0                  // lookupTable[49]
   141      .word 0                  // lookupTable[50]
   142      .word 0                  // lookupTable[51]
   143  
   144      .word 0                  // lookupTable[52]                           0x150
   145      .word 0                  // lookupTable[53]
   146      .word 0                  // lookupTable[54]
   147      .word 0                  // lookupTable[55]
   148  
   149      .word 0                  // lookupTable[56]                           0x160
   150      .word 0                  // lookupTable[57]
   151      .word 0                  // lookupTable[58]
   152      .word 0                  // lookupTable[59]
   153  
   154      .word 0                  // lookupTable[60]                           0x170
   155      .word 0                  // lookupTable[61]
   156      .word 0                  // lookupTable[62]
   157      .word 0                  // lookupTable[63]
   158  
   159      .word 0                  // LUT 0: Read                               0x180
   160      .word 0                  // LUT 1: ReadStatus
   161      .word 0                  // LUT 3: WriteEnable
   162      .word 0                  // LUT 5: EraseSector
   163  
   164      .word 0                  // LUT 9: PageProgram                        0x190
   165      .word 0                  // LUT 11: ChipErase
   166      .word 0                  // LUT 15: Dummy
   167      .word 0                  // LUT unused?
   168  
   169      .word 0                  // LUT unused?                               0x1A0
   170      .word 0                  // LUT unused?
   171      .word 0                  // LUT unused?
   172      .word 0                  // LUT unused?
   173  
   174      .word 0                  // reserved                                  0x1B0
   175      .word 0                  // reserved
   176      .word 0                  // reserved
   177      .word 0                  // reserved
   178  
   179      // 64 byte Serial NOR configuration block (8.6.3.2, page 346)
   180  
   181      .word 256                // pageSize                                  0x1C0
   182      .word 4096               // sectorSize
   183      .word 1                  // ipCmdSerialClkFreq
   184      .word 0                  // reserved
   185  
   186      .word 0x00010000         // block size                                0x1D0
   187      .word 0                  // reserved
   188      .word 0                  // reserved
   189      .word 0                  // reserved
   190  
   191      .word 0                  // reserved                                  0x1E0
   192      .word 0                  // reserved
   193      .word 0                  // reserved
   194      .word 0                  // reserved
   195  
   196      .word 0                  // reserved                                  0x1F0
   197      .word 0                  // reserved
   198      .word 0                  // reserved
   199      .word 0                  // reserved