github.com/usbarmory/tamago@v0.0.0-20240508072735-8612bbe1e454/arm/timer.s (about)

     1  // ARM processor support
     2  // https://github.com/usbarmory/tamago
     3  //
     4  // Copyright (c) WithSecure Corporation
     5  // https://foundry.withsecure.com
     6  //
     7  // Use of this source code is governed by the license
     8  // that can be found in the LICENSE file.
     9  
    10  // func read_gtc() int64
    11  TEXT ·read_gtc(SB),$0-8
    12  	// Cortex™-A9 MPCore® Technical Reference Manual
    13  	// 4.4.1 Global Timer Counter Registers, 0x00 and 0x04
    14  	//
    15  	// p214, Table 2-1, ARM MP Global timer, IMX6DQRM
    16  	MOVW	$0x00a00204, R1
    17  	MOVW	$0x00a00200, R2
    18  read:
    19  	MOVW	(R1), R3
    20  	MOVW	(R2), R4
    21  	MOVW	(R1), R5
    22  	CMP	R5, R3
    23  	BNE	read
    24  
    25  	MOVW	R3, ret_hi+4(FP)
    26  	MOVW	R4, ret_lo+0(FP)
    27  
    28  	RET
    29  
    30  // func read_cntfrq() int32
    31  TEXT ·read_cntfrq(SB),$0-4
    32  	// ARM Architecture Reference Manual - ARMv7-A and ARMv7-R edition
    33  	// B4.1.21 CNTFRQ, Counter Frequency register, VMSA
    34  	WORD	$0xf57ff06f // isb sy
    35  	MRC	15, 0, R0, C14, C0, 0
    36  
    37  	MOVW	R0, ret+0(FP)
    38  
    39  	RET
    40  
    41  // func write_cntfrq(freq int32)
    42  TEXT ·write_cntfrq(SB),$0-4
    43  	// ARM Architecture Reference Manual - ARMv7-A and ARMv7-R edition
    44  	// B4.1.21 CNTFRQ, Counter Frequency register, VMSA
    45  	MOVW	freq+0(FP), R0
    46  
    47  	WORD	$0xf57ff06f // isb sy
    48  	MCR	15, 0, R0, C14, C0, 0
    49  
    50  	RET
    51  
    52  // func write_cntkctl(val uint32)
    53  TEXT ·write_cntkctl(SB),$0-4
    54  	// ARM Architecture Reference Manual - ARMv7-A and ARMv7-R edition
    55  	// B4.1.26 CNTKCTL, Timer PL1 Control register, VMSA
    56  	MOVW	val+0(FP), R0
    57  
    58  	WORD	$0xf57ff06f // isb sy
    59  	MCR	15, 0, R0, C14, C1, 0
    60  
    61  	RET
    62  
    63  // func read_cntpct() int64
    64  TEXT ·read_cntpct(SB),$0-8
    65  	// ARM Architecture Reference Manual - ARMv7-A and ARMv7-R edition
    66  	// B4.1.30 CNTPCT, Physical Count register, VMSA
    67  	WORD	$0xf57ff06f // isb sy
    68  	WORD	$0xec510f0e // mrrc p15, 0, r0, r1, c14
    69  
    70  	MOVW	R0, ret_lo+0(FP)
    71  	MOVW	R1, ret_hi+4(FP)
    72  
    73  	RET
    74  
    75  // func write_cntptval(val int32, enable bool)
    76  TEXT ·write_cntptval(SB),$0-8
    77  	// ARM Architecture Reference Manual - ARMv7-A and ARMv7-R edition
    78  	// B6.1.13 CNTP_TVAL, PL1 Physical TimerValue register, PMSA
    79  	MOVW	val+0(FP), R0
    80  	MOVW	enable+4(FP), R1
    81  
    82  	WORD	$0xf57ff06f // isb sy
    83  	MCR	15, 0, R0, C14, C2, 0
    84  	MCR	15, 0, R1, C14, C2, 1
    85  
    86  	RET
    87  
    88  // func busyloop(count int32)
    89  TEXT ·Busyloop(SB),$0-4
    90  	MOVW count+0(FP), R0
    91  loop:
    92  	SUB.S	$1, R0, R0
    93  	CMP	$0, R0
    94  	BNE	loop
    95  
    96  	RET