github.com/usbarmory/tamago@v0.0.0-20240508072735-8612bbe1e454/soc/nxp/iomuxc/iomuxc.go (about)

     1  // NXP IOMUXC support
     2  // https://github.com/usbarmory/tamago
     3  //
     4  // Copyright (c) WithSecure Corporation
     5  // https://foundry.withsecure.com
     6  //
     7  // Use of this source code is governed by the license
     8  // that can be found in the LICENSE file.
     9  
    10  // Package iomuxc implements helpers for IOMUX configuration on NXP SoCs.
    11  //
    12  // This package is only meant to be used with `GOOS=tamago GOARCH=arm` as
    13  // supported by the TamaGo framework for bare metal Go on ARM SoCs, see
    14  // https://github.com/usbarmory/tamago.
    15  package iomuxc
    16  
    17  import (
    18  	"github.com/usbarmory/tamago/internal/reg"
    19  )
    20  
    21  // IOMUXC registers
    22  const (
    23  	SW_PAD_CTL_HYS = 16
    24  
    25  	SW_PAD_CTL_PUS                = 14
    26  	SW_PAD_CTL_PUS_PULL_DOWN_100K = 0b00
    27  	SW_PAD_CTL_PUS_PULL_UP_47K    = 0b01
    28  	SW_PAD_CTL_PUS_PULL_UP_100K   = 0b10
    29  	SW_PAD_CTL_PUS_PULL_UP_22K    = 0b11
    30  
    31  	SW_PAD_CTL_PUE = 13
    32  	SW_PAD_CTL_PKE = 12
    33  	SW_PAD_CTL_ODE = 11
    34  
    35  	SW_PAD_CTL_SPEED        = 6
    36  	SW_PAD_CTL_SPEED_50MHZ  = 0b00
    37  	SW_PAD_CTL_SPEED_100MHZ = 0b10
    38  	SW_PAD_CTL_SPEED_200MHZ = 0b11
    39  
    40  	SW_PAD_CTL_DSE                        = 3
    41  	SW_PAD_CTL_DSE_OUTPUT_DRIVER_DISABLED = 0b000
    42  	SW_PAD_CTL_DSE_2_R0_2                 = 0b010
    43  	SW_PAD_CTL_DSE_2_R0_3                 = 0b011
    44  	SW_PAD_CTL_DSE_2_R0_4                 = 0b100
    45  	SW_PAD_CTL_DSE_2_R0_5                 = 0b101
    46  	SW_PAD_CTL_DSE_2_R0_6                 = 0b110
    47  	SW_PAD_CTL_DSE_2_R0_7                 = 0b111
    48  
    49  	SW_PAD_CTL_SRE = 0
    50  
    51  	SW_MUX_CTL_SION     = 4
    52  	SW_MUX_CTL_MUX_MODE = 0
    53  )
    54  
    55  // Pad instance.
    56  type Pad struct {
    57  	// Mux register (e.g. IOMUXC_SW_MUX_CTL_PAD_*)
    58  	Mux uint32
    59  	// Pad register (e.g. IOMUXC_SW_PAD_CTL_PAD_*)
    60  	Pad uint32
    61  	// Daisy register (e.g. IOMUXC_*_SELECT_INPUT)
    62  	Daisy uint32
    63  }
    64  
    65  // Init initializes a pad.
    66  func Init(mux uint32, pad uint32, mode uint32) (p *Pad) {
    67  	p = &Pad{
    68  		Mux: mux,
    69  		Pad: pad,
    70  	}
    71  
    72  	p.Mode(mode)
    73  
    74  	return
    75  }
    76  
    77  // Mode configures the pad iomux mode.
    78  func (pad *Pad) Mode(mode uint32) {
    79  	reg.SetN(pad.Mux, SW_MUX_CTL_MUX_MODE, 0b1111, mode)
    80  }
    81  
    82  // SoftwareInput configures the pad SION bit.
    83  func (pad *Pad) SoftwareInput(enabled bool) {
    84  	reg.SetTo(pad.Mux, SW_MUX_CTL_SION, enabled)
    85  }
    86  
    87  // Ctl configures the pad control register.
    88  func (pad *Pad) Ctl(ctl uint32) {
    89  	reg.Write(pad.Pad, ctl)
    90  }
    91  
    92  // Select configures the pad daisy chain register.
    93  func (pad *Pad) Select(input uint32) {
    94  	if pad.Daisy == 0 {
    95  		return
    96  	}
    97  
    98  	reg.Write(pad.Daisy, input)
    99  }