github.com/usbarmory/tamago@v0.0.0-20240508072735-8612bbe1e454/soc/sifive/fu540/fu540.go (about) 1 // SiFive FU540 configuration and support 2 // https://github.com/usbarmory/tamago 3 // 4 // Copyright (c) WithSecure Corporation 5 // https://foundry.withsecure.com 6 // 7 // Use of this source code is governed by the license 8 // that can be found in the LICENSE file. 9 10 // Package fu530 provides support to Go bare metal unikernels written using the 11 // TamaGo framework. 12 // 13 // The package implements initialization and drivers for specific SiFive FU540 14 // System-on-Chip (SoC) peripherals, adopting, where indicated, the following 15 // reference specifications: 16 // - FU540C00RM - SiFive FU540-C000 Manual - v1p4 2021/03/25 17 // 18 // This package is only meant to be used with `GOOS=tamago GOARCH=riscv64` as 19 // supported by the TamaGo framework for bare metal Go on RISC-V SoCs, see 20 // https://github.com/usbarmory/tamago. 21 package fu540 22 23 import ( 24 _ "unsafe" 25 26 "github.com/usbarmory/tamago/riscv" 27 "github.com/usbarmory/tamago/soc/sifive/clint" 28 "github.com/usbarmory/tamago/soc/sifive/uart" 29 ) 30 31 // Peripheral registers 32 const ( 33 // Core-Local Interruptor 34 CLINT_BASE = 0x2000000 35 36 // Serial ports 37 UART0_BASE = 0x10010000 38 UART1_BASE = 0x10011000 39 ) 40 41 // Peripheral instances 42 var ( 43 // RISC-V core 44 RV64 = &riscv.CPU{} 45 46 // Core-Local Interruptor 47 CLINT = &clint.CLINT{ 48 Base: CLINT_BASE, 49 RTCCLK: RTCCLK, 50 } 51 52 // Serial port 1 53 UART0 = &uart.UART{ 54 Index: 1, 55 Base: UART0_BASE, 56 } 57 58 // Serial port 2 59 UART1 = &uart.UART{ 60 Index: 2, 61 Base: UART1_BASE, 62 } 63 ) 64 65 // Model returns the SoC model name. 66 func Model() string { 67 return "FU540" 68 }