github.com/wasilibs/wazerox@v0.0.0-20240124024944-4923be63ab5f/internal/asm/amd64/consts.go (about) 1 package amd64 2 3 import ( 4 "fmt" 5 6 "github.com/wasilibs/wazerox/internal/asm" 7 ) 8 9 // AMD64-specific conditional register states. 10 // 11 // See https://www.lri.fr/~filliatr/ens/compil/x86-64.pdf 12 // See https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf 13 const ( 14 // ConditionalRegisterStateE is the e (equal to zero) condition code 15 ConditionalRegisterStateE = asm.ConditionalRegisterStateUnset + 1 + iota // ZF equal to zero 16 // ConditionalRegisterStateNE is the ne (not equal to zero) condition code 17 ConditionalRegisterStateNE // ˜ZF not equal to zero 18 // ConditionalRegisterStateS is the s (negative) condition code 19 ConditionalRegisterStateS // SF negative 20 // ConditionalRegisterStateNS is the ns (non-negative) condition code 21 ConditionalRegisterStateNS // ˜SF non-negative 22 // ConditionalRegisterStateG is the g (greater) condition code 23 ConditionalRegisterStateG // ˜(SF xor OF) & ˜ ZF greater (signed >) 24 // ConditionalRegisterStateGE is the ge (greater or equal) condition code 25 ConditionalRegisterStateGE // ˜(SF xor OF) greater or equal (signed >=) 26 // ConditionalRegisterStateL is the l (less) condition code 27 ConditionalRegisterStateL // SF xor OF less (signed <) 28 // ConditionalRegisterStateLE is the le (less or equal) condition code 29 ConditionalRegisterStateLE // (SF xor OF) | ZF less or equal (signed <=) 30 // ConditionalRegisterStateA is the a (above) condition code 31 ConditionalRegisterStateA // ˜CF & ˜ZF above (unsigned >) 32 // ConditionalRegisterStateAE is the ae (above or equal) condition code 33 ConditionalRegisterStateAE // ˜CF above or equal (unsigned >=) 34 // ConditionalRegisterStateB is the b (below) condition code 35 ConditionalRegisterStateB // CF below (unsigned <) 36 // ConditionalRegisterStateBE is the be (below or equal) condition code 37 ConditionalRegisterStateBE // CF | ZF below or equal (unsigned <=) 38 ) 39 40 // AMD64-specific instructions. 41 // 42 // Note: This only defines amd64 instructions used by wazero's compiler. 43 // Note: Naming conventions intentionally match the Go assembler: https://go.dev/doc/asm 44 // See https://www.felixcloutier.com/x86/index.html 45 const ( 46 // NONE is not a real instruction but represents the lack of an instruction 47 NONE asm.Instruction = iota 48 // ADDL is the ADD instruction in 32-bit mode. https://www.felixcloutier.com/x86/add 49 ADDL 50 // ADDQ is the ADD instruction in 64-bit mode. https://www.felixcloutier.com/x86/add 51 ADDQ 52 // ADDSD is the ADDSD instruction. https://www.felixcloutier.com/x86/addsd 53 ADDSD 54 // ADDSS is the ADDSS instruction. https://www.felixcloutier.com/x86/addss 55 ADDSS 56 // ANDL is the AND instruction in 32-bit mode. https://www.felixcloutier.com/x86/and 57 ANDL 58 // ANDPD is the ANDPD instruction. https://www.felixcloutier.com/x86/andpd 59 ANDPD 60 // ANDPS is the ANDPS instruction. https://www.felixcloutier.com/x86/andps 61 ANDPS 62 // ANDQ is the AND instruction in 64-bit mode. https://www.felixcloutier.com/x86/and 63 ANDQ 64 // BSRL is the BSR instruction in 32-bit mode. https://www.felixcloutier.com/x86/bsr 65 BSRL 66 // BSRQ is the BSR instruction in 64-bit mode. https://www.felixcloutier.com/x86/bsr 67 BSRQ 68 // CDQ is the CDQ instruction. https://www.felixcloutier.com/x86/cwd:cdq:cqo 69 CDQ 70 // CLD is the CLD instruction. https://www.felixcloutier.com/x86/cld 71 CLD 72 // CMOVQCS is the CMOVC (move if carry) instruction in 64-bit mode. https://www.felixcloutier.com/x86/cmovcc 73 CMOVQCS 74 // CMPL is the CMP instruction in 32-bit mode. https://www.felixcloutier.com/x86/cmp 75 CMPL 76 // CMPQ is the CMP instruction in 64-bit mode. https://www.felixcloutier.com/x86/cmp 77 CMPQ 78 // CMPXCHGQ is the CMPXCHG instruction in 64-bit mode. https://www.felixcloutier.com/x86/cmpxchg 79 CMPXCHGQ 80 // CMPXCHGL is the CMPXCHG instruction in 32-bit mode. https://www.felixcloutier.com/x86/cmpxchg 81 CMPXCHGL 82 // CMPXCHGW is the CMPXCHG instruction in 16-bit mode. https://www.felixcloutier.com/x86/cmpxchg 83 CMPXCHGW 84 // CMPXCHGW is the CMPXCHG instruction in 8-bit mode. https://www.felixcloutier.com/x86/cmpxchg 85 CMPXCHGB 86 // COMISD is the COMISD instruction. https://www.felixcloutier.com/x86/comisd 87 COMISD 88 // COMISS is the COMISS instruction. https://www.felixcloutier.com/x86/comiss 89 COMISS 90 // CQO is the CQO instruction. https://www.felixcloutier.com/x86/cwd:cdq:cqo 91 CQO 92 // CVTSD2SS is the CVTSD2SS instruction. https://www.felixcloutier.com/x86/cvtsd2ss 93 CVTSD2SS 94 // CVTSL2SD is the CVTSI2SD instruction in 32-bit mode. https://www.felixcloutier.com/x86/cvtsi2sd 95 CVTSL2SD 96 // CVTSL2SS is the CVTSI2SS instruction in 32-bit mode. https://www.felixcloutier.com/x86/cvtsi2ss 97 CVTSL2SS 98 // CVTSQ2SD is the CVTSI2SD instruction in 64-bit mode. https://www.felixcloutier.com/x86/cvtsi2sd 99 CVTSQ2SD 100 // CVTSQ2SS is the CVTSI2SS instruction in 64-bit mode. https://www.felixcloutier.com/x86/cvtsi2ss 101 CVTSQ2SS 102 // CVTSS2SD is the CVTSS2SD instruction. https://www.felixcloutier.com/x86/cvtss2sd 103 CVTSS2SD 104 // CVTTSD2SL is the CVTTSD2SI instruction in 32-bit mode. https://www.felixcloutier.com/x86/cvttsd2si 105 CVTTSD2SL 106 // CVTTSD2SQ is the CVTTSD2SI instruction in 64-bit mode. https://www.felixcloutier.com/x86/cvttsd2si 107 CVTTSD2SQ 108 // CVTTSS2SL is the CVTTSS2SI instruction in 32-bit mode. https://www.felixcloutier.com/x86/cvttss2si 109 CVTTSS2SL 110 // CVTTSS2SQ is the CVTTSS2SI instruction in 64-bit mode. https://www.felixcloutier.com/x86/cvttss2si 111 CVTTSS2SQ 112 // DECQ is the DEC instruction in 64-bit mode. https://www.felixcloutier.com/x86/dec 113 DECQ 114 // DIVL is the DIV instruction in 32-bit mode. https://www.felixcloutier.com/x86/div 115 DIVL 116 // DIVQ is the DIV instruction in 64-bit mode. https://www.felixcloutier.com/x86/div 117 DIVQ 118 // DIVSD is the DIVSD instruction. https://www.felixcloutier.com/x86/divsd 119 DIVSD 120 // DIVSS is the DIVSS instruction. https://www.felixcloutier.com/x86/divss 121 DIVSS 122 // IDIVL is the IDIV instruction in 32-bit mode. https://www.felixcloutier.com/x86/idiv 123 IDIVL 124 // IDIVQ is the IDIV instruction in 64-bit mode. https://www.felixcloutier.com/x86/idiv 125 IDIVQ 126 // INCQ is the INC instruction in 64-bit mode. https://www.felixcloutier.com/x86/inc 127 INCQ 128 // JCC is the JAE (jump if above or equal) instruction. https://www.felixcloutier.com/x86/jcc 129 JCC 130 // JCS is the JB (jump if below) instruction. https://www.felixcloutier.com/x86/jcc 131 JCS 132 // JEQ is the JE (jump if equal) instruction. https://www.felixcloutier.com/x86/jcc 133 JEQ 134 // JGE is the JGE (jump if greater or equal) instruction. https://www.felixcloutier.com/x86/jcc 135 JGE 136 // JGT is the JG (jump if greater) instruction. https://www.felixcloutier.com/x86/jcc 137 JGT 138 // JHI is the JNBE (jump if not below or equal) instruction. https://www.felixcloutier.com/x86/jcc 139 JHI 140 // JLE is the JLE (jump if less or equal) instruction. https://www.felixcloutier.com/x86/jcc 141 JLE 142 // JLS is the JNA (jump if not above) instruction. https://www.felixcloutier.com/x86/jcc 143 JLS 144 // JLT is the JL (jump if less) instruction. https://www.felixcloutier.com/x86/jcc 145 JLT 146 // JMI is the JS (jump if sign) instruction. https://www.felixcloutier.com/x86/jcc 147 JMI 148 // JNE is the JNE (jump if not equal) instruction. https://www.felixcloutier.com/x86/jcc 149 JNE 150 // JPC is the JPO (jump if parity odd) instruction. https://www.felixcloutier.com/x86/jcc 151 JPC 152 // JPL is the JNS (jump if not sign) instruction. https://www.felixcloutier.com/x86/jcc 153 JPL 154 // JPS is the JPE (jump if parity even) instruction. https://www.felixcloutier.com/x86/jcc 155 JPS 156 // LEAQ is the LEA instruction in 64-bit mode. https://www.felixcloutier.com/x86/lea 157 LEAQ 158 // LZCNTL is the LZCNT instruction in 32-bit mode. https://www.felixcloutier.com/x86/lzcnt 159 LZCNTL 160 // LZCNTQ is the LZCNT instruction in 64-bit mode. https://www.felixcloutier.com/x86/lzcnt 161 LZCNTQ 162 // MAXSD is the MAXSD instruction. https://www.felixcloutier.com/x86/maxsd 163 MAXSD 164 // MAXSS is the MAXSS instruction. https://www.felixcloutier.com/x86/maxss 165 MAXSS 166 // MINSD is the MINSD instruction. https://www.felixcloutier.com/x86/minsd 167 MINSD 168 // MINSS is the MINSS instruction. https://www.felixcloutier.com/x86/minss 169 MINSS 170 // MOVB is the MOV instruction for a single byte. https://www.felixcloutier.com/x86/mov 171 MOVB 172 // MOVBLSX is the MOVSX instruction for single byte in 32-bit mode. https://www.felixcloutier.com/x86/movsx:movsxd 173 MOVBLSX 174 // MOVBLZX is the MOVZX instruction for single-byte in 32-bit mode. https://www.felixcloutier.com/x86/movzx 175 MOVBLZX 176 // MOVBQSX is the MOVSX instruction for single byte in 64-bit mode. https://www.felixcloutier.com/x86/movsx:movsxd 177 MOVBQSX 178 // MOVBQZX is the MOVZX instruction for single-byte in 64-bit mode. https://www.felixcloutier.com/x86/movzx 179 MOVBQZX 180 // MOVL is the MOV instruction for a double word. 181 MOVL 182 // MOVLQSX is the MOVSXD instruction. https://www.felixcloutier.com/x86/movsx:movsxd 183 MOVLQSX 184 // MOVLQZX is the MOVZX instruction for a word to a doubleword. https://www.felixcloutier.com/x86/movzx 185 MOVLQZX 186 // MOVQ is the MOV instruction for a doubleword. https://www.felixcloutier.com/x86/mov 187 MOVQ 188 // MOVW is the MOV instruction for a word. https://www.felixcloutier.com/x86/mov 189 MOVW 190 // MOVWLSX is the MOVSX instruction for a word in 32-bit mode. https://www.felixcloutier.com/x86/movsx:movsxd 191 MOVWLSX 192 // MOVWLZX is the MOVZX instruction for a word in 32-bit mode. https://www.felixcloutier.com/x86/movzx 193 MOVWLZX 194 // MOVWQSX is the MOVSX instruction for a word in 64-bit mode. https://www.felixcloutier.com/x86/movsx:movsxd 195 MOVWQSX 196 // MOVWQZX is the MOVZX instruction for a word in 64-bit mode. https://www.felixcloutier.com/x86/movzx 197 MOVWQZX 198 // MULL is the MUL instruction in 32-bit mode. https://www.felixcloutier.com/x86/mul 199 MULL 200 // MULQ is the MUL instruction in 64-bit mode. https://www.felixcloutier.com/x86/mul 201 MULQ 202 // IMULQ is the IMUL instruction in 64-bit mode. https://www.felixcloutier.com/x86/imul 203 IMULQ 204 // MULSD is the MULSD instruction. https://www.felixcloutier.com/x86/mulsd 205 MULSD 206 // MULSS is the MULSS instruction. https://www.felixcloutier.com/x86/mulss 207 MULSS 208 // NEGQ is the NEG instruction in 64-bit mode. https://www.felixcloutier.com/x86/neg 209 NEGQ 210 // NEGL is the NEG instruction in 32-bit mode. https://www.felixcloutier.com/x86/neg 211 NEGL 212 // NEGW is the NEG instruction in 16-bit mode. https://www.felixcloutier.com/x86/neg 213 NEGW 214 // NEGB is the NEG instruction in 8-bit mode. https://www.felixcloutier.com/x86/neg 215 NEGB 216 // ORL is the OR instruction in 32-bit mode. https://www.felixcloutier.com/x86/or 217 ORL 218 // ORPD is the ORPD instruction. https://www.felixcloutier.com/x86/orpd 219 ORPD 220 // ORPS is the ORPS instruction. https://www.felixcloutier.com/x86/orps 221 ORPS 222 // ORQ is the OR instruction in 64-bit mode. https://www.felixcloutier.com/x86/or 223 ORQ 224 // POPCNTL is the POPCNT instruction in 32-bit mode. https://www.felixcloutier.com/x86/popcnt 225 POPCNTL 226 // POPCNTQ is the POPCNT instruction in 64-bit mode. https://www.felixcloutier.com/x86/popcnt 227 POPCNTQ 228 // PSLLD is the PSLLD instruction. https://www.felixcloutier.com/x86/psllw:pslld:psllq 229 PSLLD 230 // PSLLQ is the PSLLQ instruction. https://www.felixcloutier.com/x86/psllw:pslld:psllq 231 PSLLQ 232 // PSRLD is the PSRLD instruction. https://www.felixcloutier.com/x86/psrlw:psrld:psrlq 233 PSRLD 234 // PSRLQ is the PSRLQ instruction. https://www.felixcloutier.com/x86/psrlw:psrld:psrlq 235 PSRLQ 236 // REPMOVSQ is the REP MOVSQ instruction in 64-bit mode. https://www.felixcloutier.com/x86/movs:movsb:movsw:movsd:movsq https://www.felixcloutier.com/x86/rep:repe:repz:repne:repnz 237 REPMOVSQ 238 // REPSTOSQ is the REP STOSQ instruction in 64-bit mode. https://www.felixcloutier.com/x86/stos:stosb:stosw:stosd:stosq https://www.felixcloutier.com/x86/rep:repe:repz:repne:repnz 239 REPSTOSQ 240 // ROLL is the ROL instruction in 32-bit mode. https://www.felixcloutier.com/x86/rcl:rcr:rol:ror 241 ROLL 242 // ROLQ is the ROL instruction in 64-bit mode. https://www.felixcloutier.com/x86/rcl:rcr:rol:ror 243 ROLQ 244 // RORL is the ROR instruction in 32-bit mode. https://www.felixcloutier.com/x86/rcl:rcr:rol:ror 245 RORL 246 // RORQ is the ROR instruction in 64-bit mode. https://www.felixcloutier.com/x86/rcl:rcr:rol:ror 247 RORQ 248 // ROUNDSD is the ROUNDSD instruction. https://www.felixcloutier.com/x86/roundsd 249 ROUNDSD 250 // ROUNDSS is the ROUNDSS instruction. https://www.felixcloutier.com/x86/roundss 251 ROUNDSS 252 // SARL is the SAR instruction in 32-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 253 SARL 254 // SARQ is the SAR instruction in 64-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 255 SARQ 256 // SETCC is the SETAE (set if above or equal) instruction. https://www.felixcloutier.com/x86/setcc 257 SETCC 258 // SETCS is the SETB (set if below) instruction. https://www.felixcloutier.com/x86/setcc 259 SETCS 260 // SETEQ is the SETE (set if equal) instruction. https://www.felixcloutier.com/x86/setcc 261 SETEQ 262 // SETGE is the SETGE (set if greater or equal) instruction. https://www.felixcloutier.com/x86/setcc 263 SETGE 264 // SETGT is the SETG (set if greater) instruction. https://www.felixcloutier.com/x86/setcc 265 SETGT 266 // SETHI is the SETNBE (set if not below or equal) instruction. https://www.felixcloutier.com/x86/setcc 267 SETHI 268 // SETLE is the SETLE (set if less or equal) instruction. https://www.felixcloutier.com/x86/setcc 269 SETLE 270 // SETLS is the SETNA (set if not above) instruction. https://www.felixcloutier.com/x86/setcc 271 SETLS 272 // SETLT is the SETL (set if less) instruction. https://www.felixcloutier.com/x86/setcc 273 SETLT 274 // SETMI is the SETS (set if sign) instruction. https://www.felixcloutier.com/x86/setcc 275 SETMI 276 // SETNE is the SETNE (set if not equal) instruction. https://www.felixcloutier.com/x86/setcc 277 SETNE 278 // SETPC is the SETNP (set if not parity) instruction. https://www.felixcloutier.com/x86/setcc 279 SETPC 280 // SETPL is the SETNS (set if not sign) instruction. https://www.felixcloutier.com/x86/setcc 281 SETPL 282 // SETPS is the SETP (set if parity) instruction. https://www.felixcloutier.com/x86/setcc 283 SETPS 284 // SHLL is the SHL instruction in 32-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 285 SHLL 286 // SHLQ is the SHL instruction in 64-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 287 SHLQ 288 // SHRL is the SHR instruction in 32-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 289 SHRL 290 // SHRQ is the SHR instruction in 64-bit mode. https://www.felixcloutier.com/x86/sal:sar:shl:shr 291 SHRQ 292 // SQRTSD is the SQRTSD instruction. https://www.felixcloutier.com/x86/sqrtsd 293 SQRTSD 294 // SQRTSS is the SQRTSS instruction. https://www.felixcloutier.com/x86/sqrtss 295 SQRTSS 296 // STD is the STD instruction. https://www.felixcloutier.com/x86/std 297 STD 298 // SUBL is the SUB instruction in 32-bit mode. https://www.felixcloutier.com/x86/sub 299 SUBL 300 // SUBQ is the SUB instruction in 64-bit mode. https://www.felixcloutier.com/x86/sub 301 SUBQ 302 // SUBSD is the SUBSD instruction. https://www.felixcloutier.com/x86/subsd 303 SUBSD 304 // SUBSS is the SUBSS instruction. https://www.felixcloutier.com/x86/subss 305 SUBSS 306 // TESTL is the TEST instruction in 32-bit mode. https://www.felixcloutier.com/x86/test 307 TESTL 308 // TESTQ is the TEST instruction in 64-bit mode. https://www.felixcloutier.com/x86/test 309 TESTQ 310 // TZCNTL is the TZCNT instruction in 32-bit mode. https://www.felixcloutier.com/x86/tzcnt 311 TZCNTL 312 // TZCNTQ is the TZCNT instruction in 64-bit mode. https://www.felixcloutier.com/x86/tzcnt 313 TZCNTQ 314 // UCOMISD is the UCOMISD instruction. https://www.felixcloutier.com/x86/ucomisd 315 UCOMISD 316 // UCOMISS is the UCOMISS instruction. https://www.felixcloutier.com/x86/ucomisd 317 UCOMISS 318 // XORL is the XOR instruction in 32-bit mode. https://www.felixcloutier.com/x86/xor 319 XORL 320 // XORPD is the XORPD instruction. https://www.felixcloutier.com/x86/xorpd 321 XORPD 322 // XORPS is the XORPS instruction. https://www.felixcloutier.com/x86/xorps 323 XORPS 324 // XORQ is the XOR instruction in 64-bit mode. https://www.felixcloutier.com/x86/xor 325 XORQ 326 // XCHGQ is the XCHG instruction in 64-bit mode. https://www.felixcloutier.com/x86/xchg 327 XCHGQ 328 // XCHGW is the XCHG instruction in 32-bit mode. https://www.felixcloutier.com/x86/xchg 329 XCHGW 330 // XCHGL is the XCHG instruction in 16-bit mode. https://www.felixcloutier.com/x86/xchg 331 XCHGL 332 // XCHGB is the XCHG instruction in 8-bit mode. https://www.felixcloutier.com/x86/xchg 333 XCHGB 334 // RET is the RET instruction. https://www.felixcloutier.com/x86/ret 335 RET 336 // JMP is the JMP instruction. https://www.felixcloutier.com/x86/jmp 337 JMP 338 // NOP is the NOP instruction. https://www.felixcloutier.com/x86/nop 339 NOP 340 // UD2 is the UD2 instruction. https://www.felixcloutier.com/x86/ud 341 UD2 342 // MOVDQU is the MOVDQU instruction in 64-bit mode. https://www.felixcloutier.com/x86/movdqu:vmovdqu8:vmovdqu16:vmovdqu32:vmovdqu64 343 MOVDQU 344 // MOVDQA is the MOVDQA instruction in 64-bit mode. https://www.felixcloutier.com/x86/movdqa:vmovdqa32:vmovdqa64 345 MOVDQA 346 // PINSRB is the PINSRB instruction. https://www.felixcloutier.com/x86/pinsrb:pinsrd:pinsrq 347 PINSRB 348 // PINSRW is the PINSRW instruction. https://www.felixcloutier.com/x86/pinsrw 349 PINSRW 350 // PINSRD is the PINSRD instruction. https://www.felixcloutier.com/x86/pinsrb:pinsrd:pinsrq 351 PINSRD 352 // PINSRQ is the PINSRQ instruction. https://www.felixcloutier.com/x86/pinsrb:pinsrd:pinsrq 353 PINSRQ 354 // PADDB is the PADDB instruction. https://www.felixcloutier.com/x86/paddb:paddw:paddd:paddq 355 PADDB 356 // PADDW is the PADDW instruction. https://www.felixcloutier.com/x86/paddb:paddw:paddd:paddq 357 PADDW 358 // PADDD is the PADDD instruction. https://www.felixcloutier.com/x86/paddb:paddw:paddd:paddq 359 PADDD 360 // PADDQ is the PADDQ instruction. https://www.felixcloutier.com/x86/paddb:paddw:paddd:paddq 361 PADDQ 362 // PSUBB is the PSUBB instruction. https://www.felixcloutier.com/x86/psubb:psubw:psubd 363 PSUBB 364 // PSUBW is the PSUBW instruction. https://www.felixcloutier.com/x86/psubb:psubw:psubd 365 PSUBW 366 // PSUBD is the PSUBD instruction. https://www.felixcloutier.com/x86/psubb:psubw:psubd 367 PSUBD 368 // PSUBQ is the PSUBQ instruction. https://www.felixcloutier.com/x86/psubq 369 PSUBQ 370 // ADDPS is the ADDPS instruction. https://www.felixcloutier.com/x86/addps 371 ADDPS 372 // ADDPD is the ADDPD instruction. https://www.felixcloutier.com/x86/addpd 373 ADDPD 374 // SUBPS is the SUBPS instruction. https://www.felixcloutier.com/x86/subps 375 SUBPS 376 // SUBPD is the SUBPD instruction. https://www.felixcloutier.com/x86/subpd 377 SUBPD 378 // PMOVSXBW is the PMOVSXBW instruction https://www.felixcloutier.com/x86/pmovsx 379 PMOVSXBW 380 // PMOVSXWD is the PMOVSXWD instruction https://www.felixcloutier.com/x86/pmovsx 381 PMOVSXWD 382 // PMOVSXDQ is the PMOVSXDQ instruction https://www.felixcloutier.com/x86/pmovsx 383 PMOVSXDQ 384 // PMOVZXBW is the PMOVZXBW instruction https://www.felixcloutier.com/x86/pmovzx 385 PMOVZXBW 386 // PMOVZXWD is the PMOVZXWD instruction https://www.felixcloutier.com/x86/pmovzx 387 PMOVZXWD 388 // PMOVZXDQ is the PMOVZXDQ instruction https://www.felixcloutier.com/x86/pmovzx 389 PMOVZXDQ 390 // PSHUFB is the PSHUFB instruction https://www.felixcloutier.com/x86/pshufb 391 PSHUFB 392 // PSHUFD is the PSHUFD instruction https://www.felixcloutier.com/x86/pshufd 393 PSHUFD 394 // PXOR is the PXOR instruction https://www.felixcloutier.com/x86/pxor 395 PXOR 396 // PEXTRB is the PEXTRB instruction https://www.felixcloutier.com/x86/pextrb:pextrd:pextrq 397 PEXTRB 398 // PEXTRW is the PEXTRW instruction https://www.felixcloutier.com/x86/pextrw 399 PEXTRW 400 // PEXTRD is the PEXTRD instruction https://www.felixcloutier.com/x86/pextrb:pextrd:pextrq 401 PEXTRD 402 // PEXTRQ is the PEXTRQ instruction https://www.felixcloutier.com/x86/pextrb:pextrd:pextrq 403 PEXTRQ 404 // MOVLHPS is the MOVLHPS instruction https://www.felixcloutier.com/x86/movlhps 405 MOVLHPS 406 // INSERTPS is the INSERTPS instruction https://www.felixcloutier.com/x86/insertps 407 INSERTPS 408 // PTEST is the PTEST instruction https://www.felixcloutier.com/x86/ptest 409 PTEST 410 // PCMPEQB is the PCMPEQB instruction https://www.felixcloutier.com/x86/pcmpeqb:pcmpeqw:pcmpeqd 411 PCMPEQB 412 // PCMPEQW is the PCMPEQW instruction https://www.felixcloutier.com/x86/pcmpeqb:pcmpeqw:pcmpeqd 413 PCMPEQW 414 // PCMPEQD is the PCMPEQD instruction https://www.felixcloutier.com/x86/pcmpeqb:pcmpeqw:pcmpeqd 415 PCMPEQD 416 // PCMPEQQ is the PCMPEQQ instruction https://www.felixcloutier.com/x86/pcmpeqq 417 PCMPEQQ 418 // PADDUSB is the PADDUSB instruction https://www.felixcloutier.com/x86/paddusb:paddusw 419 PADDUSB 420 // MOVSD is the MOVSD instruction https://www.felixcloutier.com/x86/movsd 421 MOVSD 422 // PACKSSWB is the PACKSSWB instruction https://www.felixcloutier.com/x86/packsswb:packssdw 423 PACKSSWB 424 // PMOVMSKB is the PMOVMSKB instruction https://www.felixcloutier.com/x86/pmovmskb 425 PMOVMSKB 426 // MOVMSKPS is the MOVMSKPS instruction https://www.felixcloutier.com/x86/movmskps 427 MOVMSKPS 428 // MOVMSKPD is the MOVMSKPD instruction https://www.felixcloutier.com/x86/movmskpd 429 MOVMSKPD 430 // PAND is the PAND instruction https://www.felixcloutier.com/x86/pand 431 PAND 432 // POR is the POR instruction https://www.felixcloutier.com/x86/por 433 POR 434 // PANDN is the PANDN instruction https://www.felixcloutier.com/x86/pandn 435 PANDN 436 // PSRAD is the PSRAD instruction https://www.felixcloutier.com/x86/psraw:psrad:psraq 437 PSRAD 438 // PSRAW is the PSRAW instruction https://www.felixcloutier.com/x86/psraw:psrad:psraq 439 PSRAW 440 // PSRLW is the PSRLW instruction https://www.felixcloutier.com/x86/psrlw:psrld:psrlq 441 PSRLW 442 // PSLLW is the PSLLW instruction https://www.felixcloutier.com/x86/psllw:pslld:psllq 443 PSLLW 444 // PUNPCKLBW is the PUNPCKLBW instruction https://www.felixcloutier.com/x86/punpcklbw:punpcklwd:punpckldq:punpcklqdq 445 PUNPCKLBW 446 // PUNPCKHBW is the PUNPCKHBW instruction https://www.felixcloutier.com/x86/punpckhbw:punpckhwd:punpckhdq:punpckhqdq 447 PUNPCKHBW 448 // CMPPS is the CMPPS instruction https://www.felixcloutier.com/x86/cmpps 449 CMPPS 450 // CMPPD is the https://www.felixcloutier.com/x86/cmppd 451 CMPPD 452 // PCMPGTQ is the PCMPGTQ instruction https://www.felixcloutier.com/x86/pcmpgtq 453 PCMPGTQ 454 // PCMPGTD is the PCMPGTD instruction https://www.felixcloutier.com/x86/pcmpgtb:pcmpgtw:pcmpgtd 455 PCMPGTD 456 // PCMPGTW is the PCMPGTW instruction https://www.felixcloutier.com/x86/pcmpgtb:pcmpgtw:pcmpgtd 457 PCMPGTW 458 // PCMPGTB is the PCMPGTB instruction https://www.felixcloutier.com/x86/pcmpgtb:pcmpgtw:pcmpgtd 459 PCMPGTB 460 // PMINSD is the PMINSD instruction https://www.felixcloutier.com/x86/pminsd:pminsq 461 PMINSD 462 // PMINSW is the PMINSW instruction https://www.felixcloutier.com/x86/pminsb:pminsw 463 PMINSW 464 // PMINSB is the PMINSB instruction https://www.felixcloutier.com/x86/pminsb:pminsw 465 PMINSB 466 // PMAXSD is the PMAXSD instruction https://www.felixcloutier.com/x86/pmaxsb:pmaxsw:pmaxsd:pmaxsq 467 PMAXSD 468 // PMAXSW is the PMAXSW instruction https://www.felixcloutier.com/x86/pmaxsb:pmaxsw:pmaxsd:pmaxsq 469 PMAXSW 470 // PMAXSB is the PMAXSB instruction https://www.felixcloutier.com/x86/pmaxsb:pmaxsw:pmaxsd:pmaxsq 471 PMAXSB 472 // PMINUD is the PMINUD instruction https://www.felixcloutier.com/x86/pminud:pminuq 473 PMINUD 474 // PMINUW is the PMINUW instruction https://www.felixcloutier.com/x86/pminub:pminuw 475 PMINUW 476 // PMINUB is the PMINUB instruction https://www.felixcloutier.com/x86/pminub:pminuw 477 PMINUB 478 // PMAXUD is the PMAXUD instruction https://www.felixcloutier.com/x86/pmaxud:pmaxuq 479 PMAXUD 480 // PMAXUW is the PMAXUW instruction https://www.felixcloutier.com/x86/pmaxub:pmaxuw 481 PMAXUW 482 // PMAXUB is the PMAXUB instruction https://www.felixcloutier.com/x86/pmaxub:pmaxuw 483 PMAXUB 484 // PMULLW is the PMULLW instruction https://www.felixcloutier.com/x86/pmullw 485 PMULLW 486 // PMULLD is the PMULLD instruction https://www.felixcloutier.com/x86/pmulld:pmullq 487 PMULLD 488 // PMULUDQ is the PMULUDQ instruction https://www.felixcloutier.com/x86/pmuludq 489 PMULUDQ 490 // PSUBSB is the PSUBSB instruction https://www.felixcloutier.com/x86/psubsb:psubsw 491 PSUBSB 492 // PSUBSW is the PSUBSW instruction https://www.felixcloutier.com/x86/psubsb:psubsw 493 PSUBSW 494 // PSUBUSB is the PSUBUSB instruction https://www.felixcloutier.com/x86/psubusb:psubusw 495 PSUBUSB 496 // PSUBUSW is the PSUBUSW instruction https://www.felixcloutier.com/x86/psubusb:psubusw 497 PSUBUSW 498 // PADDSW is the PADDSW instruction https://www.felixcloutier.com/x86/paddsb:paddsw 499 PADDSW 500 // PADDSB is the PADDSB instruction https://www.felixcloutier.com/x86/paddsb:paddsw 501 PADDSB 502 // PADDUSW is the PADDUSW instruction https://www.felixcloutier.com/x86/paddusb:paddusw 503 PADDUSW 504 // PAVGB is the PAVGB instruction https://www.felixcloutier.com/x86/pavgb:pavgw 505 PAVGB 506 // PAVGW is the PAVGW instruction https://www.felixcloutier.com/x86/pavgb:pavgw 507 PAVGW 508 // PABSB is the PABSB instruction https://www.felixcloutier.com/x86/pabsb:pabsw:pabsd:pabsq 509 PABSB 510 // PABSW is the PABSW instruction https://www.felixcloutier.com/x86/pabsb:pabsw:pabsd:pabsq 511 PABSW 512 // PABSD is the PABSD instruction https://www.felixcloutier.com/x86/pabsb:pabsw:pabsd:pabsq 513 PABSD 514 // BLENDVPD is the BLENDVPD instruction https://www.felixcloutier.com/x86/blendvpd 515 BLENDVPD 516 // MAXPD is the MAXPD instruction https://www.felixcloutier.com/x86/maxpd 517 MAXPD 518 // MAXPS is the MAXPS instruction https://www.felixcloutier.com/x86/maxps 519 MAXPS 520 // MINPD is the MINPD instruction https://www.felixcloutier.com/x86/minpd 521 MINPD 522 // MINPS is the MINPS instruction https://www.felixcloutier.com/x86/minps 523 MINPS 524 // ANDNPD is the ANDNPD instruction https://www.felixcloutier.com/x86/andnpd 525 ANDNPD 526 // ANDNPS is the ANDNPS instruction https://www.felixcloutier.com/x86/andnps 527 ANDNPS 528 // MULPS is the MULPS instruction https://www.felixcloutier.com/x86/mulps 529 MULPS 530 // MULPD is the MULPD instruction https://www.felixcloutier.com/x86/mulpd 531 MULPD 532 // DIVPS is the DIVPS instruction https://www.felixcloutier.com/x86/divps 533 DIVPS 534 // DIVPD is the DIVPD instruction https://www.felixcloutier.com/x86/divpd 535 DIVPD 536 // SQRTPS is the SQRTPS instruction https://www.felixcloutier.com/x86/sqrtps 537 SQRTPS 538 // SQRTPD is the SQRTPD instruction https://www.felixcloutier.com/x86/sqrtpd 539 SQRTPD 540 // ROUNDPS is the ROUNDPS instruction https://www.felixcloutier.com/x86/roundps 541 ROUNDPS 542 // ROUNDPD is the ROUNDPD instruction https://www.felixcloutier.com/x86/roundpd 543 ROUNDPD 544 // PALIGNR is the PALIGNR instruction https://www.felixcloutier.com/x86/palignr 545 PALIGNR 546 // PUNPCKLWD is the PUNPCKLWD instruction https://www.felixcloutier.com/x86/punpcklbw:punpcklwd:punpckldq:punpcklqdq 547 PUNPCKLWD 548 // PUNPCKHWD is the PUNPCKHWD instruction https://www.felixcloutier.com/x86/punpckhbw:punpckhwd:punpckhdq:punpckhqdq 549 PUNPCKHWD 550 // PMULHUW is the PMULHUW instruction https://www.felixcloutier.com/x86/pmulhuw 551 PMULHUW 552 // PMULDQ is the PMULDQ instruction https://www.felixcloutier.com/x86/pmuldq 553 PMULDQ 554 // PMULHRSW is the PMULHRSW instruction https://www.felixcloutier.com/x86/pmulhrsw 555 PMULHRSW 556 // PMULHW is the PMULHW instruction https://www.felixcloutier.com/x86/pmulhw 557 PMULHW 558 // CMPEQPS is the CMPEQPS instruction https://www.felixcloutier.com/x86/cmpps 559 CMPEQPS 560 // CMPEQPD is the CMPEQPD instruction https://www.felixcloutier.com/x86/cmppd 561 CMPEQPD 562 // CVTTPS2DQ is the CVTTPS2DQ instruction https://www.felixcloutier.com/x86/cvttps2dq 563 CVTTPS2DQ 564 // CVTDQ2PS is the CVTDQ2PS instruction https://www.felixcloutier.com/x86/cvtdq2ps 565 CVTDQ2PS 566 // MOVUPD is the MOVUPD instruction https://www.felixcloutier.com/x86/movupd 567 MOVUPD 568 // SHUFPS is the SHUFPS instruction https://www.felixcloutier.com/x86/shufps 569 SHUFPS 570 // PMADDWD is the PMADDWD instruction https://www.felixcloutier.com/x86/pmaddwd 571 PMADDWD 572 // CVTDQ2PD is the CVTDQ2PD instruction https://www.felixcloutier.com/x86/cvtdq2pd 573 CVTDQ2PD 574 // UNPCKLPS is the UNPCKLPS instruction https://www.felixcloutier.com/x86/unpcklps 575 UNPCKLPS 576 // PACKUSWB is the PACKUSWB instruction https://www.felixcloutier.com/x86/packuswb 577 PACKUSWB 578 // PACKSSDW is the PACKSSDW instruction https://www.felixcloutier.com/x86/packsswb:packssdw 579 PACKSSDW 580 // PACKUSDW is the PACKUSDW instruction https://www.felixcloutier.com/x86/packusdw 581 PACKUSDW 582 // CVTPS2PD is the CVTPS2PD instruction https://www.felixcloutier.com/x86/cvtps2pd 583 CVTPS2PD 584 // CVTPD2PS is the CVTPD2PS instruction https://www.felixcloutier.com/x86/cvtpd2ps 585 CVTPD2PS 586 // PMADDUBSW is the PMADDUBSW instruction https://www.felixcloutier.com/x86/pmaddubsw 587 PMADDUBSW 588 // CVTTPD2DQ is the CVTTPD2DQ instruction https://www.felixcloutier.com/x86/cvttpd2dq 589 CVTTPD2DQ 590 591 // XADDB is the XADD instruction in 8-bit mode https://www.felixcloutier.com/x86/xadd 592 XADDB 593 // XADDW is the XADD instruction in 16-bit mode https://www.felixcloutier.com/x86/xadd 594 XADDW 595 // XADDL is the XADD instruction in 32-bit mode https://www.felixcloutier.com/x86/xadd 596 XADDL 597 // XADDQ is the XADD instruction in 64-bit mode https://www.felixcloutier.com/x86/xadd 598 XADDQ 599 600 // MFENCE is the MFENCE instrution https://www.felixcloutier.com/x86/mfence 601 MFENCE 602 603 // instructionEnd is always placed at the bottom of this iota definition to be used in the test. 604 instructionEnd 605 ) 606 607 // InstructionName returns the name for an instruction 608 func InstructionName(instruction asm.Instruction) string { 609 switch instruction { 610 case ADDL: 611 return "ADDL" 612 case ADDQ: 613 return "ADDQ" 614 case ADDSD: 615 return "ADDSD" 616 case ADDSS: 617 return "ADDSS" 618 case ANDL: 619 return "ANDL" 620 case ANDPD: 621 return "ANDPD" 622 case ANDPS: 623 return "ANDPS" 624 case ANDQ: 625 return "ANDQ" 626 case BSRL: 627 return "BSRL" 628 case BSRQ: 629 return "BSRQ" 630 case CDQ: 631 return "CDQ" 632 case CLD: 633 return "CLD" 634 case CMOVQCS: 635 return "CMOVQCS" 636 case CMPL: 637 return "CMPL" 638 case CMPQ: 639 return "CMPQ" 640 case CMPXCHGQ: 641 return "CMPXCHGQ" 642 case CMPXCHGL: 643 return "CMPXCHGL" 644 case CMPXCHGW: 645 return "CMPXCHGW" 646 case CMPXCHGB: 647 return "CMPXCHGB" 648 case COMISD: 649 return "COMISD" 650 case COMISS: 651 return "COMISS" 652 case CQO: 653 return "CQO" 654 case CVTSD2SS: 655 return "CVTSD2SS" 656 case CVTSL2SD: 657 return "CVTSL2SD" 658 case CVTSL2SS: 659 return "CVTSL2SS" 660 case CVTSQ2SD: 661 return "CVTSQ2SD" 662 case CVTSQ2SS: 663 return "CVTSQ2SS" 664 case CVTSS2SD: 665 return "CVTSS2SD" 666 case CVTTSD2SL: 667 return "CVTTSD2SL" 668 case CVTTSD2SQ: 669 return "CVTTSD2SQ" 670 case CVTTSS2SL: 671 return "CVTTSS2SL" 672 case CVTTSS2SQ: 673 return "CVTTSS2SQ" 674 case DECQ: 675 return "DECQ" 676 case DIVL: 677 return "DIVL" 678 case DIVQ: 679 return "DIVQ" 680 case DIVSD: 681 return "DIVSD" 682 case DIVSS: 683 return "DIVSS" 684 case IDIVL: 685 return "IDIVL" 686 case IDIVQ: 687 return "IDIVQ" 688 case INCQ: 689 return "INCQ" 690 case JCC: 691 return "JCC" 692 case JCS: 693 return "JCS" 694 case JEQ: 695 return "JEQ" 696 case JGE: 697 return "JGE" 698 case JGT: 699 return "JGT" 700 case JHI: 701 return "JHI" 702 case JLE: 703 return "JLE" 704 case JLS: 705 return "JLS" 706 case JLT: 707 return "JLT" 708 case JMI: 709 return "JMI" 710 case JNE: 711 return "JNE" 712 case JPC: 713 return "JPC" 714 case JPL: 715 return "JPL" 716 case JPS: 717 return "JPS" 718 case LEAQ: 719 return "LEAQ" 720 case LZCNTL: 721 return "LZCNTL" 722 case LZCNTQ: 723 return "LZCNTQ" 724 case MAXSD: 725 return "MAXSD" 726 case MAXSS: 727 return "MAXSS" 728 case MINSD: 729 return "MINSD" 730 case MINSS: 731 return "MINSS" 732 case MOVB: 733 return "MOVB" 734 case MOVBLSX: 735 return "MOVBLSX" 736 case MOVBLZX: 737 return "MOVBLZX" 738 case MOVBQSX: 739 return "MOVBQSX" 740 case MOVBQZX: 741 return "MOVBQZX" 742 case MOVL: 743 return "MOVL" 744 case MOVLQSX: 745 return "MOVLQSX" 746 case MOVLQZX: 747 return "MOVLQZX" 748 case MOVQ: 749 return "MOVQ" 750 case MOVW: 751 return "MOVW" 752 case MOVWLSX: 753 return "MOVWLSX" 754 case MOVWLZX: 755 return "MOVWLZX" 756 case MOVWQSX: 757 return "MOVWQSX" 758 case MOVWQZX: 759 return "MOVWQZX" 760 case MULL: 761 return "MULL" 762 case MULQ: 763 return "MULQ" 764 case IMULQ: 765 return "IMULQ" 766 case MULSD: 767 return "MULSD" 768 case MULSS: 769 return "MULSS" 770 case ORL: 771 return "ORL" 772 case ORPD: 773 return "ORPD" 774 case ORPS: 775 return "ORPS" 776 case ORQ: 777 return "ORQ" 778 case POPCNTL: 779 return "POPCNTL" 780 case POPCNTQ: 781 return "POPCNTQ" 782 case PSLLD: 783 return "PSLLD" 784 case PSLLQ: 785 return "PSLLQ" 786 case PSRLD: 787 return "PSRLD" 788 case PSRLQ: 789 return "PSRLQ" 790 case REPMOVSQ: 791 return "REP MOVSQ" 792 case REPSTOSQ: 793 return "REP STOSQ" 794 case ROLL: 795 return "ROLL" 796 case ROLQ: 797 return "ROLQ" 798 case RORL: 799 return "RORL" 800 case RORQ: 801 return "RORQ" 802 case ROUNDSD: 803 return "ROUNDSD" 804 case ROUNDSS: 805 return "ROUNDSS" 806 case SARL: 807 return "SARL" 808 case SARQ: 809 return "SARQ" 810 case SETCC: 811 return "SETCC" 812 case SETCS: 813 return "SETCS" 814 case SETEQ: 815 return "SETEQ" 816 case SETGE: 817 return "SETGE" 818 case SETGT: 819 return "SETGT" 820 case SETHI: 821 return "SETHI" 822 case SETLE: 823 return "SETLE" 824 case SETLS: 825 return "SETLS" 826 case SETLT: 827 return "SETLT" 828 case SETMI: 829 return "SETMI" 830 case SETNE: 831 return "SETNE" 832 case SETPC: 833 return "SETPC" 834 case SETPL: 835 return "SETPL" 836 case SETPS: 837 return "SETPS" 838 case SHLL: 839 return "SHLL" 840 case SHLQ: 841 return "SHLQ" 842 case SHRL: 843 return "SHRL" 844 case SHRQ: 845 return "SHRQ" 846 case SQRTSD: 847 return "SQRTSD" 848 case SQRTSS: 849 return "SQRTSS" 850 case STD: 851 return "STD" 852 case SUBL: 853 return "SUBL" 854 case SUBQ: 855 return "SUBQ" 856 case SUBSD: 857 return "SUBSD" 858 case SUBSS: 859 return "SUBSS" 860 case TESTL: 861 return "TESTL" 862 case TESTQ: 863 return "TESTQ" 864 case TZCNTL: 865 return "TZCNTL" 866 case TZCNTQ: 867 return "TZCNTQ" 868 case UCOMISD: 869 return "UCOMISD" 870 case UCOMISS: 871 return "UCOMISS" 872 case XORL: 873 return "XORL" 874 case XORPD: 875 return "XORPD" 876 case XORPS: 877 return "XORPS" 878 case XORQ: 879 return "XORQ" 880 case XCHGQ: 881 return "XCHGQ" 882 case XCHGW: 883 return "XCHGW" 884 case XCHGL: 885 return "XCHGL" 886 case XCHGB: 887 return "XCHGB" 888 case RET: 889 return "RET" 890 case JMP: 891 return "JMP" 892 case NOP: 893 return "NOP" 894 case UD2: 895 return "UD2" 896 case MOVDQU: 897 return "MOVDQU" 898 case PINSRB: 899 return "PINSRB" 900 case PINSRW: 901 return "PINSRW" 902 case PINSRD: 903 return "PINSRD" 904 case PINSRQ: 905 return "PINSRQ" 906 case PADDB: 907 return "PADDB" 908 case PADDW: 909 return "PADDW" 910 case PADDD: 911 return "PADDD" 912 case PADDQ: 913 return "PADDQ" 914 case ADDPS: 915 return "ADDPS" 916 case ADDPD: 917 return "ADDPD" 918 case PSUBB: 919 return "PSUBB" 920 case PSUBW: 921 return "PSUBW" 922 case PSUBD: 923 return "PSUBD" 924 case PSUBQ: 925 return "PSUBQ" 926 case SUBPS: 927 return "SUBPS" 928 case SUBPD: 929 return "SUBPD" 930 case PMOVSXBW: 931 return "PMOVSXBW" 932 case PMOVSXWD: 933 return "PMOVSXWD" 934 case PMOVSXDQ: 935 return "PMOVSXDQ" 936 case PMOVZXBW: 937 return "PMOVZXBW" 938 case PMOVZXWD: 939 return "PMOVZXWD" 940 case PMOVZXDQ: 941 return "PMOVZXDQ" 942 case PSHUFB: 943 return "PSHUFB" 944 case PSHUFD: 945 return "PSHUFD" 946 case PXOR: 947 return "PXOR" 948 case PEXTRB: 949 return "PEXTRB" 950 case PEXTRW: 951 return "PEXTRW" 952 case PEXTRD: 953 return "PEXTRD" 954 case PEXTRQ: 955 return "PEXTRQ" 956 case INSERTPS: 957 return "INSERTPS" 958 case MOVLHPS: 959 return "MOVLHPS" 960 case PTEST: 961 return "PTEST" 962 case PCMPEQB: 963 return "PCMPEQB" 964 case PCMPEQW: 965 return "PCMPEQW" 966 case PCMPEQD: 967 return "PCMPEQD" 968 case PCMPEQQ: 969 return "PCMPEQQ" 970 case PADDUSB: 971 return "PADDUSB" 972 case MOVDQA: 973 return "MOVDQA" 974 case MOVSD: 975 return "MOVSD" 976 case PACKSSWB: 977 return "PACKSSWB" 978 case PMOVMSKB: 979 return "PMOVMSKB" 980 case MOVMSKPS: 981 return "MOVMSKPS" 982 case MOVMSKPD: 983 return "MOVMSKPD" 984 case PAND: 985 return "PAND" 986 case POR: 987 return "POR" 988 case PANDN: 989 return "PANDN" 990 case PSRAD: 991 return "PSRAD" 992 case PSRAW: 993 return "PSRAW" 994 case PSRLW: 995 return "PSRLW" 996 case PSLLW: 997 return "PSLLW" 998 case PUNPCKLBW: 999 return "PUNPCKLBW" 1000 case PUNPCKHBW: 1001 return "PUNPCKHBW" 1002 case NEGQ: 1003 return "NEGQ" 1004 case NEGL: 1005 return "NEGL" 1006 case NEGW: 1007 return "NEGW" 1008 case NEGB: 1009 return "NEGB" 1010 case NONE: 1011 return "NONE" 1012 case CMPPS: 1013 return "CMPPS" 1014 case CMPPD: 1015 return "CMPPD" 1016 case PCMPGTQ: 1017 return "PCMPGTQ" 1018 case PCMPGTD: 1019 return "PCMPGTD" 1020 case PMINSD: 1021 return "PMINSD" 1022 case PMAXSD: 1023 return "PMAXSD" 1024 case PMINSW: 1025 return "PMINSW" 1026 case PCMPGTB: 1027 return "PCMPGTB" 1028 case PMINSB: 1029 return "PMINSB" 1030 case PMINUD: 1031 return "PMINUD" 1032 case PMINUW: 1033 return "PMINUW" 1034 case PMINUB: 1035 return "PMINUB" 1036 case PMAXUD: 1037 return "PMAXUD" 1038 case PMAXUW: 1039 return "PMAXUW" 1040 case PMAXUB: 1041 return "PMAXUB" 1042 case PCMPGTW: 1043 return "PCMPGTW" 1044 case PMAXSW: 1045 return "PMAXSW" 1046 case PMAXSB: 1047 return "PMAXSB" 1048 case PMULLW: 1049 return "PMULLW" 1050 case PMULLD: 1051 return "PMULLD" 1052 case PMULUDQ: 1053 return "PMULUDQ" 1054 case PSUBSB: 1055 return "PSUBSB" 1056 case PSUBUSB: 1057 return "PSUBUSB" 1058 case PADDSW: 1059 return "PADDSW" 1060 case PADDSB: 1061 return "PADDSB" 1062 case PADDUSW: 1063 return "PADDUSW" 1064 case PSUBSW: 1065 return "PSUBSW" 1066 case PSUBUSW: 1067 return "PSUBUSW" 1068 case PAVGB: 1069 return "PAVGB" 1070 case PAVGW: 1071 return "PAVGW" 1072 case PABSB: 1073 return "PABSB" 1074 case PABSW: 1075 return "PABSW" 1076 case PABSD: 1077 return "PABSD" 1078 case BLENDVPD: 1079 return "BLENDVPD" 1080 case MAXPD: 1081 return "MAXPD" 1082 case MAXPS: 1083 return "MAXPS" 1084 case MINPD: 1085 return "MINPD" 1086 case MINPS: 1087 return "MINPS" 1088 case ANDNPD: 1089 return "ANDNPD" 1090 case ANDNPS: 1091 return "ANDNPS" 1092 case MULPS: 1093 return "MULPS" 1094 case MULPD: 1095 return "MULPD" 1096 case DIVPS: 1097 return "DIVPS" 1098 case DIVPD: 1099 return "DIVPD" 1100 case SQRTPS: 1101 return "SQRTPS" 1102 case SQRTPD: 1103 return "SQRTPD" 1104 case ROUNDPS: 1105 return "ROUNDPS" 1106 case ROUNDPD: 1107 return "ROUNDPD" 1108 case PALIGNR: 1109 return "PALIGNR" 1110 case PUNPCKLWD: 1111 return "PUNPCKLWD" 1112 case PUNPCKHWD: 1113 return "PUNPCKHWD" 1114 case PMULHUW: 1115 return "PMULHUW" 1116 case PMULDQ: 1117 return "PMULDQ" 1118 case PMULHRSW: 1119 return "PMULHRSW" 1120 case PMULHW: 1121 return "PMULHW" 1122 case CMPEQPS: 1123 return "CMPEQPS" 1124 case CMPEQPD: 1125 return "CMPEQPD" 1126 case CVTTPS2DQ: 1127 return "CVTTPS2DQ" 1128 case CVTDQ2PS: 1129 return "CVTDQ2PS" 1130 case XADDB: 1131 return "XADDB" 1132 case XADDW: 1133 return "XADDW" 1134 case XADDL: 1135 return "XADDL" 1136 case XADDQ: 1137 return "XADDQ" 1138 case MFENCE: 1139 return "MFENCE" 1140 case MOVUPD: 1141 return "MOVUPD" 1142 case SHUFPS: 1143 return "SHUFPS" 1144 case PMADDWD: 1145 return "PMADDWD" 1146 case CVTDQ2PD: 1147 return "CVTDQ2PD" 1148 case UNPCKLPS: 1149 return "UNPCKLPS" 1150 case PACKUSWB: 1151 return "PACKUSWB" 1152 case PACKSSDW: 1153 return "PACKSSDW" 1154 case PACKUSDW: 1155 return "PACKUSDW" 1156 case CVTPS2PD: 1157 return "CVTPS2PD" 1158 case CVTPD2PS: 1159 return "CVTPD2PS" 1160 case PMADDUBSW: 1161 return "PMADDUBSW" 1162 case CVTTPD2DQ: 1163 return "CVTTPD2DQ" 1164 } 1165 panic(fmt.Errorf("unknown instruction %d", instruction)) 1166 } 1167 1168 // Amd64-specific registers. 1169 // 1170 // Note: naming convention intentionally matches the Go assembler: https://go.dev/doc/asm 1171 // See https://www.lri.fr/~filliatr/ens/compil/x86-64.pdf 1172 // See https://cs.brown.edu/courses/cs033/docs/guides/x64_cheatsheet.pdf 1173 const ( 1174 // RegAX is the ax register 1175 RegAX = asm.NilRegister + 1 + iota 1176 // RegCX is the cx register 1177 RegCX 1178 // RegDX is the dx register 1179 RegDX 1180 // RegBX is the bx register 1181 RegBX 1182 // RegSP is the sp register 1183 RegSP 1184 // RegBP is the bp register 1185 RegBP 1186 // RegSI is the si register 1187 RegSI 1188 // RegDI is the di register 1189 RegDI 1190 // RegR8 is the r8 register 1191 RegR8 1192 // RegR9 is the r9 register 1193 RegR9 1194 // RegR10 is the r10 register 1195 RegR10 1196 // RegR11 is the r11 register 1197 RegR11 1198 // RegR12 is the r12 register 1199 RegR12 1200 // RegR13 is the r13 register 1201 RegR13 1202 // RegR14 is the r14 register 1203 RegR14 1204 // RegR15 is the r15 register 1205 RegR15 1206 // RegX0 is the x0 register 1207 RegX0 1208 // RegX1 is the x1 register 1209 RegX1 1210 // RegX2 is the x2 register 1211 RegX2 1212 // RegX3 is the x3 register 1213 RegX3 1214 // RegX4 is the x4 register 1215 RegX4 1216 // RegX5 is the x5 register 1217 RegX5 1218 // RegX6 is the x6 register 1219 RegX6 1220 // RegX7 is the x7 register 1221 RegX7 1222 // RegX8 is the x8 register 1223 RegX8 1224 // RegX9 is the x9 register 1225 RegX9 1226 // RegX10 is the x10 register 1227 RegX10 1228 // RegX11 is the x11 register 1229 RegX11 1230 // RegX12 is the x12 register 1231 RegX12 1232 // RegX13 is the x13 register 1233 RegX13 1234 // RegX14 is the x14 register 1235 RegX14 1236 // RegX15 is the x15 register 1237 RegX15 1238 ) 1239 1240 // RegisterName returns the name for a register 1241 func RegisterName(reg asm.Register) string { 1242 switch reg { 1243 case RegAX: 1244 return "AX" 1245 case RegCX: 1246 return "CX" 1247 case RegDX: 1248 return "DX" 1249 case RegBX: 1250 return "BX" 1251 case RegSP: 1252 return "SP" 1253 case RegBP: 1254 return "BP" 1255 case RegSI: 1256 return "SI" 1257 case RegDI: 1258 return "DI" 1259 case RegR8: 1260 return "R8" 1261 case RegR9: 1262 return "R9" 1263 case RegR10: 1264 return "R10" 1265 case RegR11: 1266 return "R11" 1267 case RegR12: 1268 return "R12" 1269 case RegR13: 1270 return "R13" 1271 case RegR14: 1272 return "R14" 1273 case RegR15: 1274 return "R15" 1275 case RegX0: 1276 return "X0" 1277 case RegX1: 1278 return "X1" 1279 case RegX2: 1280 return "X2" 1281 case RegX3: 1282 return "X3" 1283 case RegX4: 1284 return "X4" 1285 case RegX5: 1286 return "X5" 1287 case RegX6: 1288 return "X6" 1289 case RegX7: 1290 return "X7" 1291 case RegX8: 1292 return "X8" 1293 case RegX9: 1294 return "X9" 1295 case RegX10: 1296 return "X10" 1297 case RegX11: 1298 return "X11" 1299 case RegX12: 1300 return "X12" 1301 case RegX13: 1302 return "X13" 1303 case RegX14: 1304 return "X14" 1305 case RegX15: 1306 return "X15" 1307 default: 1308 return "nil" 1309 } 1310 }