github.com/yukk001/go1.10.8@v0.0.0-20190813125351-6df2d3982e20/src/cmd/compile/internal/ssa/rewritePPC64.go (about)

     1  // Code generated from gen/PPC64.rules; DO NOT EDIT.
     2  // generated with: cd gen; go run *.go
     3  
     4  package ssa
     5  
     6  import "math"
     7  import "cmd/internal/obj"
     8  import "cmd/internal/objabi"
     9  import "cmd/compile/internal/types"
    10  
    11  var _ = math.MinInt8  // in case not otherwise used
    12  var _ = obj.ANOP      // in case not otherwise used
    13  var _ = objabi.GOROOT // in case not otherwise used
    14  var _ = types.TypeMem // in case not otherwise used
    15  
    16  func rewriteValuePPC64(v *Value) bool {
    17  	switch v.Op {
    18  	case OpAbs:
    19  		return rewriteValuePPC64_OpAbs_0(v)
    20  	case OpAdd16:
    21  		return rewriteValuePPC64_OpAdd16_0(v)
    22  	case OpAdd32:
    23  		return rewriteValuePPC64_OpAdd32_0(v)
    24  	case OpAdd32F:
    25  		return rewriteValuePPC64_OpAdd32F_0(v)
    26  	case OpAdd64:
    27  		return rewriteValuePPC64_OpAdd64_0(v)
    28  	case OpAdd64F:
    29  		return rewriteValuePPC64_OpAdd64F_0(v)
    30  	case OpAdd8:
    31  		return rewriteValuePPC64_OpAdd8_0(v)
    32  	case OpAddPtr:
    33  		return rewriteValuePPC64_OpAddPtr_0(v)
    34  	case OpAddr:
    35  		return rewriteValuePPC64_OpAddr_0(v)
    36  	case OpAnd16:
    37  		return rewriteValuePPC64_OpAnd16_0(v)
    38  	case OpAnd32:
    39  		return rewriteValuePPC64_OpAnd32_0(v)
    40  	case OpAnd64:
    41  		return rewriteValuePPC64_OpAnd64_0(v)
    42  	case OpAnd8:
    43  		return rewriteValuePPC64_OpAnd8_0(v)
    44  	case OpAndB:
    45  		return rewriteValuePPC64_OpAndB_0(v)
    46  	case OpAtomicAdd32:
    47  		return rewriteValuePPC64_OpAtomicAdd32_0(v)
    48  	case OpAtomicAdd64:
    49  		return rewriteValuePPC64_OpAtomicAdd64_0(v)
    50  	case OpAtomicAnd8:
    51  		return rewriteValuePPC64_OpAtomicAnd8_0(v)
    52  	case OpAtomicCompareAndSwap32:
    53  		return rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v)
    54  	case OpAtomicCompareAndSwap64:
    55  		return rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v)
    56  	case OpAtomicExchange32:
    57  		return rewriteValuePPC64_OpAtomicExchange32_0(v)
    58  	case OpAtomicExchange64:
    59  		return rewriteValuePPC64_OpAtomicExchange64_0(v)
    60  	case OpAtomicLoad32:
    61  		return rewriteValuePPC64_OpAtomicLoad32_0(v)
    62  	case OpAtomicLoad64:
    63  		return rewriteValuePPC64_OpAtomicLoad64_0(v)
    64  	case OpAtomicLoadPtr:
    65  		return rewriteValuePPC64_OpAtomicLoadPtr_0(v)
    66  	case OpAtomicOr8:
    67  		return rewriteValuePPC64_OpAtomicOr8_0(v)
    68  	case OpAtomicStore32:
    69  		return rewriteValuePPC64_OpAtomicStore32_0(v)
    70  	case OpAtomicStore64:
    71  		return rewriteValuePPC64_OpAtomicStore64_0(v)
    72  	case OpAvg64u:
    73  		return rewriteValuePPC64_OpAvg64u_0(v)
    74  	case OpBitLen32:
    75  		return rewriteValuePPC64_OpBitLen32_0(v)
    76  	case OpBitLen64:
    77  		return rewriteValuePPC64_OpBitLen64_0(v)
    78  	case OpCeil:
    79  		return rewriteValuePPC64_OpCeil_0(v)
    80  	case OpClosureCall:
    81  		return rewriteValuePPC64_OpClosureCall_0(v)
    82  	case OpCom16:
    83  		return rewriteValuePPC64_OpCom16_0(v)
    84  	case OpCom32:
    85  		return rewriteValuePPC64_OpCom32_0(v)
    86  	case OpCom64:
    87  		return rewriteValuePPC64_OpCom64_0(v)
    88  	case OpCom8:
    89  		return rewriteValuePPC64_OpCom8_0(v)
    90  	case OpConst16:
    91  		return rewriteValuePPC64_OpConst16_0(v)
    92  	case OpConst32:
    93  		return rewriteValuePPC64_OpConst32_0(v)
    94  	case OpConst32F:
    95  		return rewriteValuePPC64_OpConst32F_0(v)
    96  	case OpConst64:
    97  		return rewriteValuePPC64_OpConst64_0(v)
    98  	case OpConst64F:
    99  		return rewriteValuePPC64_OpConst64F_0(v)
   100  	case OpConst8:
   101  		return rewriteValuePPC64_OpConst8_0(v)
   102  	case OpConstBool:
   103  		return rewriteValuePPC64_OpConstBool_0(v)
   104  	case OpConstNil:
   105  		return rewriteValuePPC64_OpConstNil_0(v)
   106  	case OpConvert:
   107  		return rewriteValuePPC64_OpConvert_0(v)
   108  	case OpCopysign:
   109  		return rewriteValuePPC64_OpCopysign_0(v)
   110  	case OpCtz32:
   111  		return rewriteValuePPC64_OpCtz32_0(v)
   112  	case OpCtz64:
   113  		return rewriteValuePPC64_OpCtz64_0(v)
   114  	case OpCvt32Fto32:
   115  		return rewriteValuePPC64_OpCvt32Fto32_0(v)
   116  	case OpCvt32Fto64:
   117  		return rewriteValuePPC64_OpCvt32Fto64_0(v)
   118  	case OpCvt32Fto64F:
   119  		return rewriteValuePPC64_OpCvt32Fto64F_0(v)
   120  	case OpCvt32to32F:
   121  		return rewriteValuePPC64_OpCvt32to32F_0(v)
   122  	case OpCvt32to64F:
   123  		return rewriteValuePPC64_OpCvt32to64F_0(v)
   124  	case OpCvt64Fto32:
   125  		return rewriteValuePPC64_OpCvt64Fto32_0(v)
   126  	case OpCvt64Fto32F:
   127  		return rewriteValuePPC64_OpCvt64Fto32F_0(v)
   128  	case OpCvt64Fto64:
   129  		return rewriteValuePPC64_OpCvt64Fto64_0(v)
   130  	case OpCvt64to32F:
   131  		return rewriteValuePPC64_OpCvt64to32F_0(v)
   132  	case OpCvt64to64F:
   133  		return rewriteValuePPC64_OpCvt64to64F_0(v)
   134  	case OpDiv16:
   135  		return rewriteValuePPC64_OpDiv16_0(v)
   136  	case OpDiv16u:
   137  		return rewriteValuePPC64_OpDiv16u_0(v)
   138  	case OpDiv32:
   139  		return rewriteValuePPC64_OpDiv32_0(v)
   140  	case OpDiv32F:
   141  		return rewriteValuePPC64_OpDiv32F_0(v)
   142  	case OpDiv32u:
   143  		return rewriteValuePPC64_OpDiv32u_0(v)
   144  	case OpDiv64:
   145  		return rewriteValuePPC64_OpDiv64_0(v)
   146  	case OpDiv64F:
   147  		return rewriteValuePPC64_OpDiv64F_0(v)
   148  	case OpDiv64u:
   149  		return rewriteValuePPC64_OpDiv64u_0(v)
   150  	case OpDiv8:
   151  		return rewriteValuePPC64_OpDiv8_0(v)
   152  	case OpDiv8u:
   153  		return rewriteValuePPC64_OpDiv8u_0(v)
   154  	case OpEq16:
   155  		return rewriteValuePPC64_OpEq16_0(v)
   156  	case OpEq32:
   157  		return rewriteValuePPC64_OpEq32_0(v)
   158  	case OpEq32F:
   159  		return rewriteValuePPC64_OpEq32F_0(v)
   160  	case OpEq64:
   161  		return rewriteValuePPC64_OpEq64_0(v)
   162  	case OpEq64F:
   163  		return rewriteValuePPC64_OpEq64F_0(v)
   164  	case OpEq8:
   165  		return rewriteValuePPC64_OpEq8_0(v)
   166  	case OpEqB:
   167  		return rewriteValuePPC64_OpEqB_0(v)
   168  	case OpEqPtr:
   169  		return rewriteValuePPC64_OpEqPtr_0(v)
   170  	case OpFloor:
   171  		return rewriteValuePPC64_OpFloor_0(v)
   172  	case OpGeq16:
   173  		return rewriteValuePPC64_OpGeq16_0(v)
   174  	case OpGeq16U:
   175  		return rewriteValuePPC64_OpGeq16U_0(v)
   176  	case OpGeq32:
   177  		return rewriteValuePPC64_OpGeq32_0(v)
   178  	case OpGeq32F:
   179  		return rewriteValuePPC64_OpGeq32F_0(v)
   180  	case OpGeq32U:
   181  		return rewriteValuePPC64_OpGeq32U_0(v)
   182  	case OpGeq64:
   183  		return rewriteValuePPC64_OpGeq64_0(v)
   184  	case OpGeq64F:
   185  		return rewriteValuePPC64_OpGeq64F_0(v)
   186  	case OpGeq64U:
   187  		return rewriteValuePPC64_OpGeq64U_0(v)
   188  	case OpGeq8:
   189  		return rewriteValuePPC64_OpGeq8_0(v)
   190  	case OpGeq8U:
   191  		return rewriteValuePPC64_OpGeq8U_0(v)
   192  	case OpGetCallerSP:
   193  		return rewriteValuePPC64_OpGetCallerSP_0(v)
   194  	case OpGetClosurePtr:
   195  		return rewriteValuePPC64_OpGetClosurePtr_0(v)
   196  	case OpGreater16:
   197  		return rewriteValuePPC64_OpGreater16_0(v)
   198  	case OpGreater16U:
   199  		return rewriteValuePPC64_OpGreater16U_0(v)
   200  	case OpGreater32:
   201  		return rewriteValuePPC64_OpGreater32_0(v)
   202  	case OpGreater32F:
   203  		return rewriteValuePPC64_OpGreater32F_0(v)
   204  	case OpGreater32U:
   205  		return rewriteValuePPC64_OpGreater32U_0(v)
   206  	case OpGreater64:
   207  		return rewriteValuePPC64_OpGreater64_0(v)
   208  	case OpGreater64F:
   209  		return rewriteValuePPC64_OpGreater64F_0(v)
   210  	case OpGreater64U:
   211  		return rewriteValuePPC64_OpGreater64U_0(v)
   212  	case OpGreater8:
   213  		return rewriteValuePPC64_OpGreater8_0(v)
   214  	case OpGreater8U:
   215  		return rewriteValuePPC64_OpGreater8U_0(v)
   216  	case OpHmul32:
   217  		return rewriteValuePPC64_OpHmul32_0(v)
   218  	case OpHmul32u:
   219  		return rewriteValuePPC64_OpHmul32u_0(v)
   220  	case OpHmul64:
   221  		return rewriteValuePPC64_OpHmul64_0(v)
   222  	case OpHmul64u:
   223  		return rewriteValuePPC64_OpHmul64u_0(v)
   224  	case OpInterCall:
   225  		return rewriteValuePPC64_OpInterCall_0(v)
   226  	case OpIsInBounds:
   227  		return rewriteValuePPC64_OpIsInBounds_0(v)
   228  	case OpIsNonNil:
   229  		return rewriteValuePPC64_OpIsNonNil_0(v)
   230  	case OpIsSliceInBounds:
   231  		return rewriteValuePPC64_OpIsSliceInBounds_0(v)
   232  	case OpLeq16:
   233  		return rewriteValuePPC64_OpLeq16_0(v)
   234  	case OpLeq16U:
   235  		return rewriteValuePPC64_OpLeq16U_0(v)
   236  	case OpLeq32:
   237  		return rewriteValuePPC64_OpLeq32_0(v)
   238  	case OpLeq32F:
   239  		return rewriteValuePPC64_OpLeq32F_0(v)
   240  	case OpLeq32U:
   241  		return rewriteValuePPC64_OpLeq32U_0(v)
   242  	case OpLeq64:
   243  		return rewriteValuePPC64_OpLeq64_0(v)
   244  	case OpLeq64F:
   245  		return rewriteValuePPC64_OpLeq64F_0(v)
   246  	case OpLeq64U:
   247  		return rewriteValuePPC64_OpLeq64U_0(v)
   248  	case OpLeq8:
   249  		return rewriteValuePPC64_OpLeq8_0(v)
   250  	case OpLeq8U:
   251  		return rewriteValuePPC64_OpLeq8U_0(v)
   252  	case OpLess16:
   253  		return rewriteValuePPC64_OpLess16_0(v)
   254  	case OpLess16U:
   255  		return rewriteValuePPC64_OpLess16U_0(v)
   256  	case OpLess32:
   257  		return rewriteValuePPC64_OpLess32_0(v)
   258  	case OpLess32F:
   259  		return rewriteValuePPC64_OpLess32F_0(v)
   260  	case OpLess32U:
   261  		return rewriteValuePPC64_OpLess32U_0(v)
   262  	case OpLess64:
   263  		return rewriteValuePPC64_OpLess64_0(v)
   264  	case OpLess64F:
   265  		return rewriteValuePPC64_OpLess64F_0(v)
   266  	case OpLess64U:
   267  		return rewriteValuePPC64_OpLess64U_0(v)
   268  	case OpLess8:
   269  		return rewriteValuePPC64_OpLess8_0(v)
   270  	case OpLess8U:
   271  		return rewriteValuePPC64_OpLess8U_0(v)
   272  	case OpLoad:
   273  		return rewriteValuePPC64_OpLoad_0(v)
   274  	case OpLsh16x16:
   275  		return rewriteValuePPC64_OpLsh16x16_0(v)
   276  	case OpLsh16x32:
   277  		return rewriteValuePPC64_OpLsh16x32_0(v)
   278  	case OpLsh16x64:
   279  		return rewriteValuePPC64_OpLsh16x64_0(v)
   280  	case OpLsh16x8:
   281  		return rewriteValuePPC64_OpLsh16x8_0(v)
   282  	case OpLsh32x16:
   283  		return rewriteValuePPC64_OpLsh32x16_0(v)
   284  	case OpLsh32x32:
   285  		return rewriteValuePPC64_OpLsh32x32_0(v)
   286  	case OpLsh32x64:
   287  		return rewriteValuePPC64_OpLsh32x64_0(v)
   288  	case OpLsh32x8:
   289  		return rewriteValuePPC64_OpLsh32x8_0(v)
   290  	case OpLsh64x16:
   291  		return rewriteValuePPC64_OpLsh64x16_0(v)
   292  	case OpLsh64x32:
   293  		return rewriteValuePPC64_OpLsh64x32_0(v)
   294  	case OpLsh64x64:
   295  		return rewriteValuePPC64_OpLsh64x64_0(v)
   296  	case OpLsh64x8:
   297  		return rewriteValuePPC64_OpLsh64x8_0(v)
   298  	case OpLsh8x16:
   299  		return rewriteValuePPC64_OpLsh8x16_0(v)
   300  	case OpLsh8x32:
   301  		return rewriteValuePPC64_OpLsh8x32_0(v)
   302  	case OpLsh8x64:
   303  		return rewriteValuePPC64_OpLsh8x64_0(v)
   304  	case OpLsh8x8:
   305  		return rewriteValuePPC64_OpLsh8x8_0(v)
   306  	case OpMod16:
   307  		return rewriteValuePPC64_OpMod16_0(v)
   308  	case OpMod16u:
   309  		return rewriteValuePPC64_OpMod16u_0(v)
   310  	case OpMod32:
   311  		return rewriteValuePPC64_OpMod32_0(v)
   312  	case OpMod32u:
   313  		return rewriteValuePPC64_OpMod32u_0(v)
   314  	case OpMod64:
   315  		return rewriteValuePPC64_OpMod64_0(v)
   316  	case OpMod64u:
   317  		return rewriteValuePPC64_OpMod64u_0(v)
   318  	case OpMod8:
   319  		return rewriteValuePPC64_OpMod8_0(v)
   320  	case OpMod8u:
   321  		return rewriteValuePPC64_OpMod8u_0(v)
   322  	case OpMove:
   323  		return rewriteValuePPC64_OpMove_0(v) || rewriteValuePPC64_OpMove_10(v)
   324  	case OpMul16:
   325  		return rewriteValuePPC64_OpMul16_0(v)
   326  	case OpMul32:
   327  		return rewriteValuePPC64_OpMul32_0(v)
   328  	case OpMul32F:
   329  		return rewriteValuePPC64_OpMul32F_0(v)
   330  	case OpMul64:
   331  		return rewriteValuePPC64_OpMul64_0(v)
   332  	case OpMul64F:
   333  		return rewriteValuePPC64_OpMul64F_0(v)
   334  	case OpMul8:
   335  		return rewriteValuePPC64_OpMul8_0(v)
   336  	case OpNeg16:
   337  		return rewriteValuePPC64_OpNeg16_0(v)
   338  	case OpNeg32:
   339  		return rewriteValuePPC64_OpNeg32_0(v)
   340  	case OpNeg32F:
   341  		return rewriteValuePPC64_OpNeg32F_0(v)
   342  	case OpNeg64:
   343  		return rewriteValuePPC64_OpNeg64_0(v)
   344  	case OpNeg64F:
   345  		return rewriteValuePPC64_OpNeg64F_0(v)
   346  	case OpNeg8:
   347  		return rewriteValuePPC64_OpNeg8_0(v)
   348  	case OpNeq16:
   349  		return rewriteValuePPC64_OpNeq16_0(v)
   350  	case OpNeq32:
   351  		return rewriteValuePPC64_OpNeq32_0(v)
   352  	case OpNeq32F:
   353  		return rewriteValuePPC64_OpNeq32F_0(v)
   354  	case OpNeq64:
   355  		return rewriteValuePPC64_OpNeq64_0(v)
   356  	case OpNeq64F:
   357  		return rewriteValuePPC64_OpNeq64F_0(v)
   358  	case OpNeq8:
   359  		return rewriteValuePPC64_OpNeq8_0(v)
   360  	case OpNeqB:
   361  		return rewriteValuePPC64_OpNeqB_0(v)
   362  	case OpNeqPtr:
   363  		return rewriteValuePPC64_OpNeqPtr_0(v)
   364  	case OpNilCheck:
   365  		return rewriteValuePPC64_OpNilCheck_0(v)
   366  	case OpNot:
   367  		return rewriteValuePPC64_OpNot_0(v)
   368  	case OpOffPtr:
   369  		return rewriteValuePPC64_OpOffPtr_0(v)
   370  	case OpOr16:
   371  		return rewriteValuePPC64_OpOr16_0(v)
   372  	case OpOr32:
   373  		return rewriteValuePPC64_OpOr32_0(v)
   374  	case OpOr64:
   375  		return rewriteValuePPC64_OpOr64_0(v)
   376  	case OpOr8:
   377  		return rewriteValuePPC64_OpOr8_0(v)
   378  	case OpOrB:
   379  		return rewriteValuePPC64_OpOrB_0(v)
   380  	case OpPPC64ADD:
   381  		return rewriteValuePPC64_OpPPC64ADD_0(v)
   382  	case OpPPC64ADDconst:
   383  		return rewriteValuePPC64_OpPPC64ADDconst_0(v)
   384  	case OpPPC64AND:
   385  		return rewriteValuePPC64_OpPPC64AND_0(v)
   386  	case OpPPC64ANDconst:
   387  		return rewriteValuePPC64_OpPPC64ANDconst_0(v)
   388  	case OpPPC64CMP:
   389  		return rewriteValuePPC64_OpPPC64CMP_0(v)
   390  	case OpPPC64CMPU:
   391  		return rewriteValuePPC64_OpPPC64CMPU_0(v)
   392  	case OpPPC64CMPUconst:
   393  		return rewriteValuePPC64_OpPPC64CMPUconst_0(v)
   394  	case OpPPC64CMPW:
   395  		return rewriteValuePPC64_OpPPC64CMPW_0(v)
   396  	case OpPPC64CMPWU:
   397  		return rewriteValuePPC64_OpPPC64CMPWU_0(v)
   398  	case OpPPC64CMPWUconst:
   399  		return rewriteValuePPC64_OpPPC64CMPWUconst_0(v)
   400  	case OpPPC64CMPWconst:
   401  		return rewriteValuePPC64_OpPPC64CMPWconst_0(v)
   402  	case OpPPC64CMPconst:
   403  		return rewriteValuePPC64_OpPPC64CMPconst_0(v)
   404  	case OpPPC64Equal:
   405  		return rewriteValuePPC64_OpPPC64Equal_0(v)
   406  	case OpPPC64FABS:
   407  		return rewriteValuePPC64_OpPPC64FABS_0(v)
   408  	case OpPPC64FADD:
   409  		return rewriteValuePPC64_OpPPC64FADD_0(v)
   410  	case OpPPC64FADDS:
   411  		return rewriteValuePPC64_OpPPC64FADDS_0(v)
   412  	case OpPPC64FCEIL:
   413  		return rewriteValuePPC64_OpPPC64FCEIL_0(v)
   414  	case OpPPC64FFLOOR:
   415  		return rewriteValuePPC64_OpPPC64FFLOOR_0(v)
   416  	case OpPPC64FMOVDload:
   417  		return rewriteValuePPC64_OpPPC64FMOVDload_0(v)
   418  	case OpPPC64FMOVDstore:
   419  		return rewriteValuePPC64_OpPPC64FMOVDstore_0(v)
   420  	case OpPPC64FMOVSload:
   421  		return rewriteValuePPC64_OpPPC64FMOVSload_0(v)
   422  	case OpPPC64FMOVSstore:
   423  		return rewriteValuePPC64_OpPPC64FMOVSstore_0(v)
   424  	case OpPPC64FNEG:
   425  		return rewriteValuePPC64_OpPPC64FNEG_0(v)
   426  	case OpPPC64FSQRT:
   427  		return rewriteValuePPC64_OpPPC64FSQRT_0(v)
   428  	case OpPPC64FSUB:
   429  		return rewriteValuePPC64_OpPPC64FSUB_0(v)
   430  	case OpPPC64FSUBS:
   431  		return rewriteValuePPC64_OpPPC64FSUBS_0(v)
   432  	case OpPPC64FTRUNC:
   433  		return rewriteValuePPC64_OpPPC64FTRUNC_0(v)
   434  	case OpPPC64GreaterEqual:
   435  		return rewriteValuePPC64_OpPPC64GreaterEqual_0(v)
   436  	case OpPPC64GreaterThan:
   437  		return rewriteValuePPC64_OpPPC64GreaterThan_0(v)
   438  	case OpPPC64LessEqual:
   439  		return rewriteValuePPC64_OpPPC64LessEqual_0(v)
   440  	case OpPPC64LessThan:
   441  		return rewriteValuePPC64_OpPPC64LessThan_0(v)
   442  	case OpPPC64MFVSRD:
   443  		return rewriteValuePPC64_OpPPC64MFVSRD_0(v)
   444  	case OpPPC64MOVBZload:
   445  		return rewriteValuePPC64_OpPPC64MOVBZload_0(v)
   446  	case OpPPC64MOVBZreg:
   447  		return rewriteValuePPC64_OpPPC64MOVBZreg_0(v)
   448  	case OpPPC64MOVBreg:
   449  		return rewriteValuePPC64_OpPPC64MOVBreg_0(v)
   450  	case OpPPC64MOVBstore:
   451  		return rewriteValuePPC64_OpPPC64MOVBstore_0(v)
   452  	case OpPPC64MOVBstorezero:
   453  		return rewriteValuePPC64_OpPPC64MOVBstorezero_0(v)
   454  	case OpPPC64MOVDload:
   455  		return rewriteValuePPC64_OpPPC64MOVDload_0(v)
   456  	case OpPPC64MOVDstore:
   457  		return rewriteValuePPC64_OpPPC64MOVDstore_0(v)
   458  	case OpPPC64MOVDstorezero:
   459  		return rewriteValuePPC64_OpPPC64MOVDstorezero_0(v)
   460  	case OpPPC64MOVHZload:
   461  		return rewriteValuePPC64_OpPPC64MOVHZload_0(v)
   462  	case OpPPC64MOVHZreg:
   463  		return rewriteValuePPC64_OpPPC64MOVHZreg_0(v)
   464  	case OpPPC64MOVHload:
   465  		return rewriteValuePPC64_OpPPC64MOVHload_0(v)
   466  	case OpPPC64MOVHreg:
   467  		return rewriteValuePPC64_OpPPC64MOVHreg_0(v)
   468  	case OpPPC64MOVHstore:
   469  		return rewriteValuePPC64_OpPPC64MOVHstore_0(v)
   470  	case OpPPC64MOVHstorezero:
   471  		return rewriteValuePPC64_OpPPC64MOVHstorezero_0(v)
   472  	case OpPPC64MOVWZload:
   473  		return rewriteValuePPC64_OpPPC64MOVWZload_0(v)
   474  	case OpPPC64MOVWZreg:
   475  		return rewriteValuePPC64_OpPPC64MOVWZreg_0(v)
   476  	case OpPPC64MOVWload:
   477  		return rewriteValuePPC64_OpPPC64MOVWload_0(v)
   478  	case OpPPC64MOVWreg:
   479  		return rewriteValuePPC64_OpPPC64MOVWreg_0(v)
   480  	case OpPPC64MOVWstore:
   481  		return rewriteValuePPC64_OpPPC64MOVWstore_0(v)
   482  	case OpPPC64MOVWstorezero:
   483  		return rewriteValuePPC64_OpPPC64MOVWstorezero_0(v)
   484  	case OpPPC64MTVSRD:
   485  		return rewriteValuePPC64_OpPPC64MTVSRD_0(v)
   486  	case OpPPC64MaskIfNotCarry:
   487  		return rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v)
   488  	case OpPPC64NotEqual:
   489  		return rewriteValuePPC64_OpPPC64NotEqual_0(v)
   490  	case OpPPC64OR:
   491  		return rewriteValuePPC64_OpPPC64OR_0(v) || rewriteValuePPC64_OpPPC64OR_10(v) || rewriteValuePPC64_OpPPC64OR_20(v) || rewriteValuePPC64_OpPPC64OR_30(v) || rewriteValuePPC64_OpPPC64OR_40(v) || rewriteValuePPC64_OpPPC64OR_50(v) || rewriteValuePPC64_OpPPC64OR_60(v) || rewriteValuePPC64_OpPPC64OR_70(v) || rewriteValuePPC64_OpPPC64OR_80(v) || rewriteValuePPC64_OpPPC64OR_90(v) || rewriteValuePPC64_OpPPC64OR_100(v) || rewriteValuePPC64_OpPPC64OR_110(v) || rewriteValuePPC64_OpPPC64OR_120(v) || rewriteValuePPC64_OpPPC64OR_130(v) || rewriteValuePPC64_OpPPC64OR_140(v)
   492  	case OpPPC64ORN:
   493  		return rewriteValuePPC64_OpPPC64ORN_0(v)
   494  	case OpPPC64ORconst:
   495  		return rewriteValuePPC64_OpPPC64ORconst_0(v)
   496  	case OpPPC64SUB:
   497  		return rewriteValuePPC64_OpPPC64SUB_0(v)
   498  	case OpPPC64XOR:
   499  		return rewriteValuePPC64_OpPPC64XOR_0(v) || rewriteValuePPC64_OpPPC64XOR_10(v)
   500  	case OpPPC64XORconst:
   501  		return rewriteValuePPC64_OpPPC64XORconst_0(v)
   502  	case OpPopCount16:
   503  		return rewriteValuePPC64_OpPopCount16_0(v)
   504  	case OpPopCount32:
   505  		return rewriteValuePPC64_OpPopCount32_0(v)
   506  	case OpPopCount64:
   507  		return rewriteValuePPC64_OpPopCount64_0(v)
   508  	case OpPopCount8:
   509  		return rewriteValuePPC64_OpPopCount8_0(v)
   510  	case OpRound32F:
   511  		return rewriteValuePPC64_OpRound32F_0(v)
   512  	case OpRound64F:
   513  		return rewriteValuePPC64_OpRound64F_0(v)
   514  	case OpRsh16Ux16:
   515  		return rewriteValuePPC64_OpRsh16Ux16_0(v)
   516  	case OpRsh16Ux32:
   517  		return rewriteValuePPC64_OpRsh16Ux32_0(v)
   518  	case OpRsh16Ux64:
   519  		return rewriteValuePPC64_OpRsh16Ux64_0(v)
   520  	case OpRsh16Ux8:
   521  		return rewriteValuePPC64_OpRsh16Ux8_0(v)
   522  	case OpRsh16x16:
   523  		return rewriteValuePPC64_OpRsh16x16_0(v)
   524  	case OpRsh16x32:
   525  		return rewriteValuePPC64_OpRsh16x32_0(v)
   526  	case OpRsh16x64:
   527  		return rewriteValuePPC64_OpRsh16x64_0(v)
   528  	case OpRsh16x8:
   529  		return rewriteValuePPC64_OpRsh16x8_0(v)
   530  	case OpRsh32Ux16:
   531  		return rewriteValuePPC64_OpRsh32Ux16_0(v)
   532  	case OpRsh32Ux32:
   533  		return rewriteValuePPC64_OpRsh32Ux32_0(v)
   534  	case OpRsh32Ux64:
   535  		return rewriteValuePPC64_OpRsh32Ux64_0(v)
   536  	case OpRsh32Ux8:
   537  		return rewriteValuePPC64_OpRsh32Ux8_0(v)
   538  	case OpRsh32x16:
   539  		return rewriteValuePPC64_OpRsh32x16_0(v)
   540  	case OpRsh32x32:
   541  		return rewriteValuePPC64_OpRsh32x32_0(v)
   542  	case OpRsh32x64:
   543  		return rewriteValuePPC64_OpRsh32x64_0(v)
   544  	case OpRsh32x8:
   545  		return rewriteValuePPC64_OpRsh32x8_0(v)
   546  	case OpRsh64Ux16:
   547  		return rewriteValuePPC64_OpRsh64Ux16_0(v)
   548  	case OpRsh64Ux32:
   549  		return rewriteValuePPC64_OpRsh64Ux32_0(v)
   550  	case OpRsh64Ux64:
   551  		return rewriteValuePPC64_OpRsh64Ux64_0(v)
   552  	case OpRsh64Ux8:
   553  		return rewriteValuePPC64_OpRsh64Ux8_0(v)
   554  	case OpRsh64x16:
   555  		return rewriteValuePPC64_OpRsh64x16_0(v)
   556  	case OpRsh64x32:
   557  		return rewriteValuePPC64_OpRsh64x32_0(v)
   558  	case OpRsh64x64:
   559  		return rewriteValuePPC64_OpRsh64x64_0(v)
   560  	case OpRsh64x8:
   561  		return rewriteValuePPC64_OpRsh64x8_0(v)
   562  	case OpRsh8Ux16:
   563  		return rewriteValuePPC64_OpRsh8Ux16_0(v)
   564  	case OpRsh8Ux32:
   565  		return rewriteValuePPC64_OpRsh8Ux32_0(v)
   566  	case OpRsh8Ux64:
   567  		return rewriteValuePPC64_OpRsh8Ux64_0(v)
   568  	case OpRsh8Ux8:
   569  		return rewriteValuePPC64_OpRsh8Ux8_0(v)
   570  	case OpRsh8x16:
   571  		return rewriteValuePPC64_OpRsh8x16_0(v)
   572  	case OpRsh8x32:
   573  		return rewriteValuePPC64_OpRsh8x32_0(v)
   574  	case OpRsh8x64:
   575  		return rewriteValuePPC64_OpRsh8x64_0(v)
   576  	case OpRsh8x8:
   577  		return rewriteValuePPC64_OpRsh8x8_0(v)
   578  	case OpSignExt16to32:
   579  		return rewriteValuePPC64_OpSignExt16to32_0(v)
   580  	case OpSignExt16to64:
   581  		return rewriteValuePPC64_OpSignExt16to64_0(v)
   582  	case OpSignExt32to64:
   583  		return rewriteValuePPC64_OpSignExt32to64_0(v)
   584  	case OpSignExt8to16:
   585  		return rewriteValuePPC64_OpSignExt8to16_0(v)
   586  	case OpSignExt8to32:
   587  		return rewriteValuePPC64_OpSignExt8to32_0(v)
   588  	case OpSignExt8to64:
   589  		return rewriteValuePPC64_OpSignExt8to64_0(v)
   590  	case OpSlicemask:
   591  		return rewriteValuePPC64_OpSlicemask_0(v)
   592  	case OpSqrt:
   593  		return rewriteValuePPC64_OpSqrt_0(v)
   594  	case OpStaticCall:
   595  		return rewriteValuePPC64_OpStaticCall_0(v)
   596  	case OpStore:
   597  		return rewriteValuePPC64_OpStore_0(v)
   598  	case OpSub16:
   599  		return rewriteValuePPC64_OpSub16_0(v)
   600  	case OpSub32:
   601  		return rewriteValuePPC64_OpSub32_0(v)
   602  	case OpSub32F:
   603  		return rewriteValuePPC64_OpSub32F_0(v)
   604  	case OpSub64:
   605  		return rewriteValuePPC64_OpSub64_0(v)
   606  	case OpSub64F:
   607  		return rewriteValuePPC64_OpSub64F_0(v)
   608  	case OpSub8:
   609  		return rewriteValuePPC64_OpSub8_0(v)
   610  	case OpSubPtr:
   611  		return rewriteValuePPC64_OpSubPtr_0(v)
   612  	case OpTrunc:
   613  		return rewriteValuePPC64_OpTrunc_0(v)
   614  	case OpTrunc16to8:
   615  		return rewriteValuePPC64_OpTrunc16to8_0(v)
   616  	case OpTrunc32to16:
   617  		return rewriteValuePPC64_OpTrunc32to16_0(v)
   618  	case OpTrunc32to8:
   619  		return rewriteValuePPC64_OpTrunc32to8_0(v)
   620  	case OpTrunc64to16:
   621  		return rewriteValuePPC64_OpTrunc64to16_0(v)
   622  	case OpTrunc64to32:
   623  		return rewriteValuePPC64_OpTrunc64to32_0(v)
   624  	case OpTrunc64to8:
   625  		return rewriteValuePPC64_OpTrunc64to8_0(v)
   626  	case OpXor16:
   627  		return rewriteValuePPC64_OpXor16_0(v)
   628  	case OpXor32:
   629  		return rewriteValuePPC64_OpXor32_0(v)
   630  	case OpXor64:
   631  		return rewriteValuePPC64_OpXor64_0(v)
   632  	case OpXor8:
   633  		return rewriteValuePPC64_OpXor8_0(v)
   634  	case OpZero:
   635  		return rewriteValuePPC64_OpZero_0(v) || rewriteValuePPC64_OpZero_10(v)
   636  	case OpZeroExt16to32:
   637  		return rewriteValuePPC64_OpZeroExt16to32_0(v)
   638  	case OpZeroExt16to64:
   639  		return rewriteValuePPC64_OpZeroExt16to64_0(v)
   640  	case OpZeroExt32to64:
   641  		return rewriteValuePPC64_OpZeroExt32to64_0(v)
   642  	case OpZeroExt8to16:
   643  		return rewriteValuePPC64_OpZeroExt8to16_0(v)
   644  	case OpZeroExt8to32:
   645  		return rewriteValuePPC64_OpZeroExt8to32_0(v)
   646  	case OpZeroExt8to64:
   647  		return rewriteValuePPC64_OpZeroExt8to64_0(v)
   648  	}
   649  	return false
   650  }
   651  func rewriteValuePPC64_OpAbs_0(v *Value) bool {
   652  	// match: (Abs x)
   653  	// cond:
   654  	// result: (FABS x)
   655  	for {
   656  		x := v.Args[0]
   657  		v.reset(OpPPC64FABS)
   658  		v.AddArg(x)
   659  		return true
   660  	}
   661  }
   662  func rewriteValuePPC64_OpAdd16_0(v *Value) bool {
   663  	// match: (Add16 x y)
   664  	// cond:
   665  	// result: (ADD x y)
   666  	for {
   667  		_ = v.Args[1]
   668  		x := v.Args[0]
   669  		y := v.Args[1]
   670  		v.reset(OpPPC64ADD)
   671  		v.AddArg(x)
   672  		v.AddArg(y)
   673  		return true
   674  	}
   675  }
   676  func rewriteValuePPC64_OpAdd32_0(v *Value) bool {
   677  	// match: (Add32 x y)
   678  	// cond:
   679  	// result: (ADD x y)
   680  	for {
   681  		_ = v.Args[1]
   682  		x := v.Args[0]
   683  		y := v.Args[1]
   684  		v.reset(OpPPC64ADD)
   685  		v.AddArg(x)
   686  		v.AddArg(y)
   687  		return true
   688  	}
   689  }
   690  func rewriteValuePPC64_OpAdd32F_0(v *Value) bool {
   691  	// match: (Add32F x y)
   692  	// cond:
   693  	// result: (FADDS x y)
   694  	for {
   695  		_ = v.Args[1]
   696  		x := v.Args[0]
   697  		y := v.Args[1]
   698  		v.reset(OpPPC64FADDS)
   699  		v.AddArg(x)
   700  		v.AddArg(y)
   701  		return true
   702  	}
   703  }
   704  func rewriteValuePPC64_OpAdd64_0(v *Value) bool {
   705  	// match: (Add64 x y)
   706  	// cond:
   707  	// result: (ADD  x y)
   708  	for {
   709  		_ = v.Args[1]
   710  		x := v.Args[0]
   711  		y := v.Args[1]
   712  		v.reset(OpPPC64ADD)
   713  		v.AddArg(x)
   714  		v.AddArg(y)
   715  		return true
   716  	}
   717  }
   718  func rewriteValuePPC64_OpAdd64F_0(v *Value) bool {
   719  	// match: (Add64F x y)
   720  	// cond:
   721  	// result: (FADD x y)
   722  	for {
   723  		_ = v.Args[1]
   724  		x := v.Args[0]
   725  		y := v.Args[1]
   726  		v.reset(OpPPC64FADD)
   727  		v.AddArg(x)
   728  		v.AddArg(y)
   729  		return true
   730  	}
   731  }
   732  func rewriteValuePPC64_OpAdd8_0(v *Value) bool {
   733  	// match: (Add8 x y)
   734  	// cond:
   735  	// result: (ADD x y)
   736  	for {
   737  		_ = v.Args[1]
   738  		x := v.Args[0]
   739  		y := v.Args[1]
   740  		v.reset(OpPPC64ADD)
   741  		v.AddArg(x)
   742  		v.AddArg(y)
   743  		return true
   744  	}
   745  }
   746  func rewriteValuePPC64_OpAddPtr_0(v *Value) bool {
   747  	// match: (AddPtr x y)
   748  	// cond:
   749  	// result: (ADD  x y)
   750  	for {
   751  		_ = v.Args[1]
   752  		x := v.Args[0]
   753  		y := v.Args[1]
   754  		v.reset(OpPPC64ADD)
   755  		v.AddArg(x)
   756  		v.AddArg(y)
   757  		return true
   758  	}
   759  }
   760  func rewriteValuePPC64_OpAddr_0(v *Value) bool {
   761  	// match: (Addr {sym} base)
   762  	// cond:
   763  	// result: (MOVDaddr {sym} base)
   764  	for {
   765  		sym := v.Aux
   766  		base := v.Args[0]
   767  		v.reset(OpPPC64MOVDaddr)
   768  		v.Aux = sym
   769  		v.AddArg(base)
   770  		return true
   771  	}
   772  }
   773  func rewriteValuePPC64_OpAnd16_0(v *Value) bool {
   774  	// match: (And16 x y)
   775  	// cond:
   776  	// result: (AND x y)
   777  	for {
   778  		_ = v.Args[1]
   779  		x := v.Args[0]
   780  		y := v.Args[1]
   781  		v.reset(OpPPC64AND)
   782  		v.AddArg(x)
   783  		v.AddArg(y)
   784  		return true
   785  	}
   786  }
   787  func rewriteValuePPC64_OpAnd32_0(v *Value) bool {
   788  	// match: (And32 x y)
   789  	// cond:
   790  	// result: (AND x y)
   791  	for {
   792  		_ = v.Args[1]
   793  		x := v.Args[0]
   794  		y := v.Args[1]
   795  		v.reset(OpPPC64AND)
   796  		v.AddArg(x)
   797  		v.AddArg(y)
   798  		return true
   799  	}
   800  }
   801  func rewriteValuePPC64_OpAnd64_0(v *Value) bool {
   802  	// match: (And64 x y)
   803  	// cond:
   804  	// result: (AND x y)
   805  	for {
   806  		_ = v.Args[1]
   807  		x := v.Args[0]
   808  		y := v.Args[1]
   809  		v.reset(OpPPC64AND)
   810  		v.AddArg(x)
   811  		v.AddArg(y)
   812  		return true
   813  	}
   814  }
   815  func rewriteValuePPC64_OpAnd8_0(v *Value) bool {
   816  	// match: (And8 x y)
   817  	// cond:
   818  	// result: (AND x y)
   819  	for {
   820  		_ = v.Args[1]
   821  		x := v.Args[0]
   822  		y := v.Args[1]
   823  		v.reset(OpPPC64AND)
   824  		v.AddArg(x)
   825  		v.AddArg(y)
   826  		return true
   827  	}
   828  }
   829  func rewriteValuePPC64_OpAndB_0(v *Value) bool {
   830  	// match: (AndB x y)
   831  	// cond:
   832  	// result: (AND x y)
   833  	for {
   834  		_ = v.Args[1]
   835  		x := v.Args[0]
   836  		y := v.Args[1]
   837  		v.reset(OpPPC64AND)
   838  		v.AddArg(x)
   839  		v.AddArg(y)
   840  		return true
   841  	}
   842  }
   843  func rewriteValuePPC64_OpAtomicAdd32_0(v *Value) bool {
   844  	// match: (AtomicAdd32 ptr val mem)
   845  	// cond:
   846  	// result: (LoweredAtomicAdd32 ptr val mem)
   847  	for {
   848  		_ = v.Args[2]
   849  		ptr := v.Args[0]
   850  		val := v.Args[1]
   851  		mem := v.Args[2]
   852  		v.reset(OpPPC64LoweredAtomicAdd32)
   853  		v.AddArg(ptr)
   854  		v.AddArg(val)
   855  		v.AddArg(mem)
   856  		return true
   857  	}
   858  }
   859  func rewriteValuePPC64_OpAtomicAdd64_0(v *Value) bool {
   860  	// match: (AtomicAdd64 ptr val mem)
   861  	// cond:
   862  	// result: (LoweredAtomicAdd64 ptr val mem)
   863  	for {
   864  		_ = v.Args[2]
   865  		ptr := v.Args[0]
   866  		val := v.Args[1]
   867  		mem := v.Args[2]
   868  		v.reset(OpPPC64LoweredAtomicAdd64)
   869  		v.AddArg(ptr)
   870  		v.AddArg(val)
   871  		v.AddArg(mem)
   872  		return true
   873  	}
   874  }
   875  func rewriteValuePPC64_OpAtomicAnd8_0(v *Value) bool {
   876  	// match: (AtomicAnd8 ptr val mem)
   877  	// cond:
   878  	// result: (LoweredAtomicAnd8 ptr val mem)
   879  	for {
   880  		_ = v.Args[2]
   881  		ptr := v.Args[0]
   882  		val := v.Args[1]
   883  		mem := v.Args[2]
   884  		v.reset(OpPPC64LoweredAtomicAnd8)
   885  		v.AddArg(ptr)
   886  		v.AddArg(val)
   887  		v.AddArg(mem)
   888  		return true
   889  	}
   890  }
   891  func rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v *Value) bool {
   892  	// match: (AtomicCompareAndSwap32 ptr old new_ mem)
   893  	// cond:
   894  	// result: (LoweredAtomicCas32 ptr old new_ mem)
   895  	for {
   896  		_ = v.Args[3]
   897  		ptr := v.Args[0]
   898  		old := v.Args[1]
   899  		new_ := v.Args[2]
   900  		mem := v.Args[3]
   901  		v.reset(OpPPC64LoweredAtomicCas32)
   902  		v.AddArg(ptr)
   903  		v.AddArg(old)
   904  		v.AddArg(new_)
   905  		v.AddArg(mem)
   906  		return true
   907  	}
   908  }
   909  func rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v *Value) bool {
   910  	// match: (AtomicCompareAndSwap64 ptr old new_ mem)
   911  	// cond:
   912  	// result: (LoweredAtomicCas64 ptr old new_ mem)
   913  	for {
   914  		_ = v.Args[3]
   915  		ptr := v.Args[0]
   916  		old := v.Args[1]
   917  		new_ := v.Args[2]
   918  		mem := v.Args[3]
   919  		v.reset(OpPPC64LoweredAtomicCas64)
   920  		v.AddArg(ptr)
   921  		v.AddArg(old)
   922  		v.AddArg(new_)
   923  		v.AddArg(mem)
   924  		return true
   925  	}
   926  }
   927  func rewriteValuePPC64_OpAtomicExchange32_0(v *Value) bool {
   928  	// match: (AtomicExchange32 ptr val mem)
   929  	// cond:
   930  	// result: (LoweredAtomicExchange32 ptr val mem)
   931  	for {
   932  		_ = v.Args[2]
   933  		ptr := v.Args[0]
   934  		val := v.Args[1]
   935  		mem := v.Args[2]
   936  		v.reset(OpPPC64LoweredAtomicExchange32)
   937  		v.AddArg(ptr)
   938  		v.AddArg(val)
   939  		v.AddArg(mem)
   940  		return true
   941  	}
   942  }
   943  func rewriteValuePPC64_OpAtomicExchange64_0(v *Value) bool {
   944  	// match: (AtomicExchange64 ptr val mem)
   945  	// cond:
   946  	// result: (LoweredAtomicExchange64 ptr val mem)
   947  	for {
   948  		_ = v.Args[2]
   949  		ptr := v.Args[0]
   950  		val := v.Args[1]
   951  		mem := v.Args[2]
   952  		v.reset(OpPPC64LoweredAtomicExchange64)
   953  		v.AddArg(ptr)
   954  		v.AddArg(val)
   955  		v.AddArg(mem)
   956  		return true
   957  	}
   958  }
   959  func rewriteValuePPC64_OpAtomicLoad32_0(v *Value) bool {
   960  	// match: (AtomicLoad32 ptr mem)
   961  	// cond:
   962  	// result: (LoweredAtomicLoad32 ptr mem)
   963  	for {
   964  		_ = v.Args[1]
   965  		ptr := v.Args[0]
   966  		mem := v.Args[1]
   967  		v.reset(OpPPC64LoweredAtomicLoad32)
   968  		v.AddArg(ptr)
   969  		v.AddArg(mem)
   970  		return true
   971  	}
   972  }
   973  func rewriteValuePPC64_OpAtomicLoad64_0(v *Value) bool {
   974  	// match: (AtomicLoad64 ptr mem)
   975  	// cond:
   976  	// result: (LoweredAtomicLoad64 ptr mem)
   977  	for {
   978  		_ = v.Args[1]
   979  		ptr := v.Args[0]
   980  		mem := v.Args[1]
   981  		v.reset(OpPPC64LoweredAtomicLoad64)
   982  		v.AddArg(ptr)
   983  		v.AddArg(mem)
   984  		return true
   985  	}
   986  }
   987  func rewriteValuePPC64_OpAtomicLoadPtr_0(v *Value) bool {
   988  	// match: (AtomicLoadPtr ptr mem)
   989  	// cond:
   990  	// result: (LoweredAtomicLoadPtr ptr mem)
   991  	for {
   992  		_ = v.Args[1]
   993  		ptr := v.Args[0]
   994  		mem := v.Args[1]
   995  		v.reset(OpPPC64LoweredAtomicLoadPtr)
   996  		v.AddArg(ptr)
   997  		v.AddArg(mem)
   998  		return true
   999  	}
  1000  }
  1001  func rewriteValuePPC64_OpAtomicOr8_0(v *Value) bool {
  1002  	// match: (AtomicOr8 ptr val mem)
  1003  	// cond:
  1004  	// result: (LoweredAtomicOr8  ptr val mem)
  1005  	for {
  1006  		_ = v.Args[2]
  1007  		ptr := v.Args[0]
  1008  		val := v.Args[1]
  1009  		mem := v.Args[2]
  1010  		v.reset(OpPPC64LoweredAtomicOr8)
  1011  		v.AddArg(ptr)
  1012  		v.AddArg(val)
  1013  		v.AddArg(mem)
  1014  		return true
  1015  	}
  1016  }
  1017  func rewriteValuePPC64_OpAtomicStore32_0(v *Value) bool {
  1018  	// match: (AtomicStore32 ptr val mem)
  1019  	// cond:
  1020  	// result: (LoweredAtomicStore32 ptr val mem)
  1021  	for {
  1022  		_ = v.Args[2]
  1023  		ptr := v.Args[0]
  1024  		val := v.Args[1]
  1025  		mem := v.Args[2]
  1026  		v.reset(OpPPC64LoweredAtomicStore32)
  1027  		v.AddArg(ptr)
  1028  		v.AddArg(val)
  1029  		v.AddArg(mem)
  1030  		return true
  1031  	}
  1032  }
  1033  func rewriteValuePPC64_OpAtomicStore64_0(v *Value) bool {
  1034  	// match: (AtomicStore64 ptr val mem)
  1035  	// cond:
  1036  	// result: (LoweredAtomicStore64 ptr val mem)
  1037  	for {
  1038  		_ = v.Args[2]
  1039  		ptr := v.Args[0]
  1040  		val := v.Args[1]
  1041  		mem := v.Args[2]
  1042  		v.reset(OpPPC64LoweredAtomicStore64)
  1043  		v.AddArg(ptr)
  1044  		v.AddArg(val)
  1045  		v.AddArg(mem)
  1046  		return true
  1047  	}
  1048  }
  1049  func rewriteValuePPC64_OpAvg64u_0(v *Value) bool {
  1050  	b := v.Block
  1051  	_ = b
  1052  	// match: (Avg64u <t> x y)
  1053  	// cond:
  1054  	// result: (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
  1055  	for {
  1056  		t := v.Type
  1057  		_ = v.Args[1]
  1058  		x := v.Args[0]
  1059  		y := v.Args[1]
  1060  		v.reset(OpPPC64ADD)
  1061  		v0 := b.NewValue0(v.Pos, OpPPC64SRDconst, t)
  1062  		v0.AuxInt = 1
  1063  		v1 := b.NewValue0(v.Pos, OpPPC64SUB, t)
  1064  		v1.AddArg(x)
  1065  		v1.AddArg(y)
  1066  		v0.AddArg(v1)
  1067  		v.AddArg(v0)
  1068  		v.AddArg(y)
  1069  		return true
  1070  	}
  1071  }
  1072  func rewriteValuePPC64_OpBitLen32_0(v *Value) bool {
  1073  	b := v.Block
  1074  	_ = b
  1075  	typ := &b.Func.Config.Types
  1076  	_ = typ
  1077  	// match: (BitLen32 x)
  1078  	// cond:
  1079  	// result: (SUB (MOVDconst [32]) (CNTLZW <typ.Int> x))
  1080  	for {
  1081  		x := v.Args[0]
  1082  		v.reset(OpPPC64SUB)
  1083  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1084  		v0.AuxInt = 32
  1085  		v.AddArg(v0)
  1086  		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZW, typ.Int)
  1087  		v1.AddArg(x)
  1088  		v.AddArg(v1)
  1089  		return true
  1090  	}
  1091  }
  1092  func rewriteValuePPC64_OpBitLen64_0(v *Value) bool {
  1093  	b := v.Block
  1094  	_ = b
  1095  	typ := &b.Func.Config.Types
  1096  	_ = typ
  1097  	// match: (BitLen64 x)
  1098  	// cond:
  1099  	// result: (SUB (MOVDconst [64]) (CNTLZD <typ.Int> x))
  1100  	for {
  1101  		x := v.Args[0]
  1102  		v.reset(OpPPC64SUB)
  1103  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  1104  		v0.AuxInt = 64
  1105  		v.AddArg(v0)
  1106  		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZD, typ.Int)
  1107  		v1.AddArg(x)
  1108  		v.AddArg(v1)
  1109  		return true
  1110  	}
  1111  }
  1112  func rewriteValuePPC64_OpCeil_0(v *Value) bool {
  1113  	// match: (Ceil x)
  1114  	// cond:
  1115  	// result: (FCEIL x)
  1116  	for {
  1117  		x := v.Args[0]
  1118  		v.reset(OpPPC64FCEIL)
  1119  		v.AddArg(x)
  1120  		return true
  1121  	}
  1122  }
  1123  func rewriteValuePPC64_OpClosureCall_0(v *Value) bool {
  1124  	// match: (ClosureCall [argwid] entry closure mem)
  1125  	// cond:
  1126  	// result: (CALLclosure [argwid] entry closure mem)
  1127  	for {
  1128  		argwid := v.AuxInt
  1129  		_ = v.Args[2]
  1130  		entry := v.Args[0]
  1131  		closure := v.Args[1]
  1132  		mem := v.Args[2]
  1133  		v.reset(OpPPC64CALLclosure)
  1134  		v.AuxInt = argwid
  1135  		v.AddArg(entry)
  1136  		v.AddArg(closure)
  1137  		v.AddArg(mem)
  1138  		return true
  1139  	}
  1140  }
  1141  func rewriteValuePPC64_OpCom16_0(v *Value) bool {
  1142  	// match: (Com16 x)
  1143  	// cond:
  1144  	// result: (NOR x x)
  1145  	for {
  1146  		x := v.Args[0]
  1147  		v.reset(OpPPC64NOR)
  1148  		v.AddArg(x)
  1149  		v.AddArg(x)
  1150  		return true
  1151  	}
  1152  }
  1153  func rewriteValuePPC64_OpCom32_0(v *Value) bool {
  1154  	// match: (Com32 x)
  1155  	// cond:
  1156  	// result: (NOR x x)
  1157  	for {
  1158  		x := v.Args[0]
  1159  		v.reset(OpPPC64NOR)
  1160  		v.AddArg(x)
  1161  		v.AddArg(x)
  1162  		return true
  1163  	}
  1164  }
  1165  func rewriteValuePPC64_OpCom64_0(v *Value) bool {
  1166  	// match: (Com64 x)
  1167  	// cond:
  1168  	// result: (NOR x x)
  1169  	for {
  1170  		x := v.Args[0]
  1171  		v.reset(OpPPC64NOR)
  1172  		v.AddArg(x)
  1173  		v.AddArg(x)
  1174  		return true
  1175  	}
  1176  }
  1177  func rewriteValuePPC64_OpCom8_0(v *Value) bool {
  1178  	// match: (Com8 x)
  1179  	// cond:
  1180  	// result: (NOR x x)
  1181  	for {
  1182  		x := v.Args[0]
  1183  		v.reset(OpPPC64NOR)
  1184  		v.AddArg(x)
  1185  		v.AddArg(x)
  1186  		return true
  1187  	}
  1188  }
  1189  func rewriteValuePPC64_OpConst16_0(v *Value) bool {
  1190  	// match: (Const16 [val])
  1191  	// cond:
  1192  	// result: (MOVDconst [val])
  1193  	for {
  1194  		val := v.AuxInt
  1195  		v.reset(OpPPC64MOVDconst)
  1196  		v.AuxInt = val
  1197  		return true
  1198  	}
  1199  }
  1200  func rewriteValuePPC64_OpConst32_0(v *Value) bool {
  1201  	// match: (Const32 [val])
  1202  	// cond:
  1203  	// result: (MOVDconst [val])
  1204  	for {
  1205  		val := v.AuxInt
  1206  		v.reset(OpPPC64MOVDconst)
  1207  		v.AuxInt = val
  1208  		return true
  1209  	}
  1210  }
  1211  func rewriteValuePPC64_OpConst32F_0(v *Value) bool {
  1212  	// match: (Const32F [val])
  1213  	// cond:
  1214  	// result: (FMOVSconst [val])
  1215  	for {
  1216  		val := v.AuxInt
  1217  		v.reset(OpPPC64FMOVSconst)
  1218  		v.AuxInt = val
  1219  		return true
  1220  	}
  1221  }
  1222  func rewriteValuePPC64_OpConst64_0(v *Value) bool {
  1223  	// match: (Const64 [val])
  1224  	// cond:
  1225  	// result: (MOVDconst [val])
  1226  	for {
  1227  		val := v.AuxInt
  1228  		v.reset(OpPPC64MOVDconst)
  1229  		v.AuxInt = val
  1230  		return true
  1231  	}
  1232  }
  1233  func rewriteValuePPC64_OpConst64F_0(v *Value) bool {
  1234  	// match: (Const64F [val])
  1235  	// cond:
  1236  	// result: (FMOVDconst [val])
  1237  	for {
  1238  		val := v.AuxInt
  1239  		v.reset(OpPPC64FMOVDconst)
  1240  		v.AuxInt = val
  1241  		return true
  1242  	}
  1243  }
  1244  func rewriteValuePPC64_OpConst8_0(v *Value) bool {
  1245  	// match: (Const8 [val])
  1246  	// cond:
  1247  	// result: (MOVDconst [val])
  1248  	for {
  1249  		val := v.AuxInt
  1250  		v.reset(OpPPC64MOVDconst)
  1251  		v.AuxInt = val
  1252  		return true
  1253  	}
  1254  }
  1255  func rewriteValuePPC64_OpConstBool_0(v *Value) bool {
  1256  	// match: (ConstBool [b])
  1257  	// cond:
  1258  	// result: (MOVDconst [b])
  1259  	for {
  1260  		b := v.AuxInt
  1261  		v.reset(OpPPC64MOVDconst)
  1262  		v.AuxInt = b
  1263  		return true
  1264  	}
  1265  }
  1266  func rewriteValuePPC64_OpConstNil_0(v *Value) bool {
  1267  	// match: (ConstNil)
  1268  	// cond:
  1269  	// result: (MOVDconst [0])
  1270  	for {
  1271  		v.reset(OpPPC64MOVDconst)
  1272  		v.AuxInt = 0
  1273  		return true
  1274  	}
  1275  }
  1276  func rewriteValuePPC64_OpConvert_0(v *Value) bool {
  1277  	// match: (Convert <t> x mem)
  1278  	// cond:
  1279  	// result: (MOVDconvert <t> x mem)
  1280  	for {
  1281  		t := v.Type
  1282  		_ = v.Args[1]
  1283  		x := v.Args[0]
  1284  		mem := v.Args[1]
  1285  		v.reset(OpPPC64MOVDconvert)
  1286  		v.Type = t
  1287  		v.AddArg(x)
  1288  		v.AddArg(mem)
  1289  		return true
  1290  	}
  1291  }
  1292  func rewriteValuePPC64_OpCopysign_0(v *Value) bool {
  1293  	// match: (Copysign x y)
  1294  	// cond:
  1295  	// result: (FCPSGN y x)
  1296  	for {
  1297  		_ = v.Args[1]
  1298  		x := v.Args[0]
  1299  		y := v.Args[1]
  1300  		v.reset(OpPPC64FCPSGN)
  1301  		v.AddArg(y)
  1302  		v.AddArg(x)
  1303  		return true
  1304  	}
  1305  }
  1306  func rewriteValuePPC64_OpCtz32_0(v *Value) bool {
  1307  	b := v.Block
  1308  	_ = b
  1309  	typ := &b.Func.Config.Types
  1310  	_ = typ
  1311  	// match: (Ctz32 x)
  1312  	// cond:
  1313  	// result: (POPCNTW (MOVWZreg (ANDN <typ.Int> (ADDconst <typ.Int> [-1] x) x)))
  1314  	for {
  1315  		x := v.Args[0]
  1316  		v.reset(OpPPC64POPCNTW)
  1317  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
  1318  		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int)
  1319  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int)
  1320  		v2.AuxInt = -1
  1321  		v2.AddArg(x)
  1322  		v1.AddArg(v2)
  1323  		v1.AddArg(x)
  1324  		v0.AddArg(v1)
  1325  		v.AddArg(v0)
  1326  		return true
  1327  	}
  1328  }
  1329  func rewriteValuePPC64_OpCtz64_0(v *Value) bool {
  1330  	b := v.Block
  1331  	_ = b
  1332  	typ := &b.Func.Config.Types
  1333  	_ = typ
  1334  	// match: (Ctz64 x)
  1335  	// cond:
  1336  	// result: (POPCNTD (ANDN <typ.Int64> (ADDconst <typ.Int64> [-1] x) x))
  1337  	for {
  1338  		x := v.Args[0]
  1339  		v.reset(OpPPC64POPCNTD)
  1340  		v0 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int64)
  1341  		v1 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int64)
  1342  		v1.AuxInt = -1
  1343  		v1.AddArg(x)
  1344  		v0.AddArg(v1)
  1345  		v0.AddArg(x)
  1346  		v.AddArg(v0)
  1347  		return true
  1348  	}
  1349  }
  1350  func rewriteValuePPC64_OpCvt32Fto32_0(v *Value) bool {
  1351  	b := v.Block
  1352  	_ = b
  1353  	typ := &b.Func.Config.Types
  1354  	_ = typ
  1355  	// match: (Cvt32Fto32 x)
  1356  	// cond:
  1357  	// result: (MFVSRD (FCTIWZ x))
  1358  	for {
  1359  		x := v.Args[0]
  1360  		v.reset(OpPPC64MFVSRD)
  1361  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1362  		v0.AddArg(x)
  1363  		v.AddArg(v0)
  1364  		return true
  1365  	}
  1366  }
  1367  func rewriteValuePPC64_OpCvt32Fto64_0(v *Value) bool {
  1368  	b := v.Block
  1369  	_ = b
  1370  	typ := &b.Func.Config.Types
  1371  	_ = typ
  1372  	// match: (Cvt32Fto64 x)
  1373  	// cond:
  1374  	// result: (MFVSRD (FCTIDZ x))
  1375  	for {
  1376  		x := v.Args[0]
  1377  		v.reset(OpPPC64MFVSRD)
  1378  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1379  		v0.AddArg(x)
  1380  		v.AddArg(v0)
  1381  		return true
  1382  	}
  1383  }
  1384  func rewriteValuePPC64_OpCvt32Fto64F_0(v *Value) bool {
  1385  	// match: (Cvt32Fto64F x)
  1386  	// cond:
  1387  	// result: x
  1388  	for {
  1389  		x := v.Args[0]
  1390  		v.reset(OpCopy)
  1391  		v.Type = x.Type
  1392  		v.AddArg(x)
  1393  		return true
  1394  	}
  1395  }
  1396  func rewriteValuePPC64_OpCvt32to32F_0(v *Value) bool {
  1397  	b := v.Block
  1398  	_ = b
  1399  	typ := &b.Func.Config.Types
  1400  	_ = typ
  1401  	// match: (Cvt32to32F x)
  1402  	// cond:
  1403  	// result: (FCFIDS (MTVSRD (SignExt32to64 x)))
  1404  	for {
  1405  		x := v.Args[0]
  1406  		v.reset(OpPPC64FCFIDS)
  1407  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1408  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1409  		v1.AddArg(x)
  1410  		v0.AddArg(v1)
  1411  		v.AddArg(v0)
  1412  		return true
  1413  	}
  1414  }
  1415  func rewriteValuePPC64_OpCvt32to64F_0(v *Value) bool {
  1416  	b := v.Block
  1417  	_ = b
  1418  	typ := &b.Func.Config.Types
  1419  	_ = typ
  1420  	// match: (Cvt32to64F x)
  1421  	// cond:
  1422  	// result: (FCFID (MTVSRD (SignExt32to64 x)))
  1423  	for {
  1424  		x := v.Args[0]
  1425  		v.reset(OpPPC64FCFID)
  1426  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1427  		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
  1428  		v1.AddArg(x)
  1429  		v0.AddArg(v1)
  1430  		v.AddArg(v0)
  1431  		return true
  1432  	}
  1433  }
  1434  func rewriteValuePPC64_OpCvt64Fto32_0(v *Value) bool {
  1435  	b := v.Block
  1436  	_ = b
  1437  	typ := &b.Func.Config.Types
  1438  	_ = typ
  1439  	// match: (Cvt64Fto32 x)
  1440  	// cond:
  1441  	// result: (MFVSRD (FCTIWZ x))
  1442  	for {
  1443  		x := v.Args[0]
  1444  		v.reset(OpPPC64MFVSRD)
  1445  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
  1446  		v0.AddArg(x)
  1447  		v.AddArg(v0)
  1448  		return true
  1449  	}
  1450  }
  1451  func rewriteValuePPC64_OpCvt64Fto32F_0(v *Value) bool {
  1452  	// match: (Cvt64Fto32F x)
  1453  	// cond:
  1454  	// result: (FRSP x)
  1455  	for {
  1456  		x := v.Args[0]
  1457  		v.reset(OpPPC64FRSP)
  1458  		v.AddArg(x)
  1459  		return true
  1460  	}
  1461  }
  1462  func rewriteValuePPC64_OpCvt64Fto64_0(v *Value) bool {
  1463  	b := v.Block
  1464  	_ = b
  1465  	typ := &b.Func.Config.Types
  1466  	_ = typ
  1467  	// match: (Cvt64Fto64 x)
  1468  	// cond:
  1469  	// result: (MFVSRD (FCTIDZ x))
  1470  	for {
  1471  		x := v.Args[0]
  1472  		v.reset(OpPPC64MFVSRD)
  1473  		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
  1474  		v0.AddArg(x)
  1475  		v.AddArg(v0)
  1476  		return true
  1477  	}
  1478  }
  1479  func rewriteValuePPC64_OpCvt64to32F_0(v *Value) bool {
  1480  	b := v.Block
  1481  	_ = b
  1482  	typ := &b.Func.Config.Types
  1483  	_ = typ
  1484  	// match: (Cvt64to32F x)
  1485  	// cond:
  1486  	// result: (FCFIDS (MTVSRD x))
  1487  	for {
  1488  		x := v.Args[0]
  1489  		v.reset(OpPPC64FCFIDS)
  1490  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1491  		v0.AddArg(x)
  1492  		v.AddArg(v0)
  1493  		return true
  1494  	}
  1495  }
  1496  func rewriteValuePPC64_OpCvt64to64F_0(v *Value) bool {
  1497  	b := v.Block
  1498  	_ = b
  1499  	typ := &b.Func.Config.Types
  1500  	_ = typ
  1501  	// match: (Cvt64to64F x)
  1502  	// cond:
  1503  	// result: (FCFID (MTVSRD x))
  1504  	for {
  1505  		x := v.Args[0]
  1506  		v.reset(OpPPC64FCFID)
  1507  		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
  1508  		v0.AddArg(x)
  1509  		v.AddArg(v0)
  1510  		return true
  1511  	}
  1512  }
  1513  func rewriteValuePPC64_OpDiv16_0(v *Value) bool {
  1514  	b := v.Block
  1515  	_ = b
  1516  	typ := &b.Func.Config.Types
  1517  	_ = typ
  1518  	// match: (Div16 x y)
  1519  	// cond:
  1520  	// result: (DIVW  (SignExt16to32 x) (SignExt16to32 y))
  1521  	for {
  1522  		_ = v.Args[1]
  1523  		x := v.Args[0]
  1524  		y := v.Args[1]
  1525  		v.reset(OpPPC64DIVW)
  1526  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1527  		v0.AddArg(x)
  1528  		v.AddArg(v0)
  1529  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1530  		v1.AddArg(y)
  1531  		v.AddArg(v1)
  1532  		return true
  1533  	}
  1534  }
  1535  func rewriteValuePPC64_OpDiv16u_0(v *Value) bool {
  1536  	b := v.Block
  1537  	_ = b
  1538  	typ := &b.Func.Config.Types
  1539  	_ = typ
  1540  	// match: (Div16u x y)
  1541  	// cond:
  1542  	// result: (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
  1543  	for {
  1544  		_ = v.Args[1]
  1545  		x := v.Args[0]
  1546  		y := v.Args[1]
  1547  		v.reset(OpPPC64DIVWU)
  1548  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1549  		v0.AddArg(x)
  1550  		v.AddArg(v0)
  1551  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1552  		v1.AddArg(y)
  1553  		v.AddArg(v1)
  1554  		return true
  1555  	}
  1556  }
  1557  func rewriteValuePPC64_OpDiv32_0(v *Value) bool {
  1558  	// match: (Div32 x y)
  1559  	// cond:
  1560  	// result: (DIVW  x y)
  1561  	for {
  1562  		_ = v.Args[1]
  1563  		x := v.Args[0]
  1564  		y := v.Args[1]
  1565  		v.reset(OpPPC64DIVW)
  1566  		v.AddArg(x)
  1567  		v.AddArg(y)
  1568  		return true
  1569  	}
  1570  }
  1571  func rewriteValuePPC64_OpDiv32F_0(v *Value) bool {
  1572  	// match: (Div32F x y)
  1573  	// cond:
  1574  	// result: (FDIVS x y)
  1575  	for {
  1576  		_ = v.Args[1]
  1577  		x := v.Args[0]
  1578  		y := v.Args[1]
  1579  		v.reset(OpPPC64FDIVS)
  1580  		v.AddArg(x)
  1581  		v.AddArg(y)
  1582  		return true
  1583  	}
  1584  }
  1585  func rewriteValuePPC64_OpDiv32u_0(v *Value) bool {
  1586  	// match: (Div32u x y)
  1587  	// cond:
  1588  	// result: (DIVWU x y)
  1589  	for {
  1590  		_ = v.Args[1]
  1591  		x := v.Args[0]
  1592  		y := v.Args[1]
  1593  		v.reset(OpPPC64DIVWU)
  1594  		v.AddArg(x)
  1595  		v.AddArg(y)
  1596  		return true
  1597  	}
  1598  }
  1599  func rewriteValuePPC64_OpDiv64_0(v *Value) bool {
  1600  	// match: (Div64 x y)
  1601  	// cond:
  1602  	// result: (DIVD  x y)
  1603  	for {
  1604  		_ = v.Args[1]
  1605  		x := v.Args[0]
  1606  		y := v.Args[1]
  1607  		v.reset(OpPPC64DIVD)
  1608  		v.AddArg(x)
  1609  		v.AddArg(y)
  1610  		return true
  1611  	}
  1612  }
  1613  func rewriteValuePPC64_OpDiv64F_0(v *Value) bool {
  1614  	// match: (Div64F x y)
  1615  	// cond:
  1616  	// result: (FDIV x y)
  1617  	for {
  1618  		_ = v.Args[1]
  1619  		x := v.Args[0]
  1620  		y := v.Args[1]
  1621  		v.reset(OpPPC64FDIV)
  1622  		v.AddArg(x)
  1623  		v.AddArg(y)
  1624  		return true
  1625  	}
  1626  }
  1627  func rewriteValuePPC64_OpDiv64u_0(v *Value) bool {
  1628  	// match: (Div64u x y)
  1629  	// cond:
  1630  	// result: (DIVDU x y)
  1631  	for {
  1632  		_ = v.Args[1]
  1633  		x := v.Args[0]
  1634  		y := v.Args[1]
  1635  		v.reset(OpPPC64DIVDU)
  1636  		v.AddArg(x)
  1637  		v.AddArg(y)
  1638  		return true
  1639  	}
  1640  }
  1641  func rewriteValuePPC64_OpDiv8_0(v *Value) bool {
  1642  	b := v.Block
  1643  	_ = b
  1644  	typ := &b.Func.Config.Types
  1645  	_ = typ
  1646  	// match: (Div8 x y)
  1647  	// cond:
  1648  	// result: (DIVW  (SignExt8to32 x) (SignExt8to32 y))
  1649  	for {
  1650  		_ = v.Args[1]
  1651  		x := v.Args[0]
  1652  		y := v.Args[1]
  1653  		v.reset(OpPPC64DIVW)
  1654  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1655  		v0.AddArg(x)
  1656  		v.AddArg(v0)
  1657  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1658  		v1.AddArg(y)
  1659  		v.AddArg(v1)
  1660  		return true
  1661  	}
  1662  }
  1663  func rewriteValuePPC64_OpDiv8u_0(v *Value) bool {
  1664  	b := v.Block
  1665  	_ = b
  1666  	typ := &b.Func.Config.Types
  1667  	_ = typ
  1668  	// match: (Div8u x y)
  1669  	// cond:
  1670  	// result: (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y))
  1671  	for {
  1672  		_ = v.Args[1]
  1673  		x := v.Args[0]
  1674  		y := v.Args[1]
  1675  		v.reset(OpPPC64DIVWU)
  1676  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1677  		v0.AddArg(x)
  1678  		v.AddArg(v0)
  1679  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1680  		v1.AddArg(y)
  1681  		v.AddArg(v1)
  1682  		return true
  1683  	}
  1684  }
  1685  func rewriteValuePPC64_OpEq16_0(v *Value) bool {
  1686  	b := v.Block
  1687  	_ = b
  1688  	typ := &b.Func.Config.Types
  1689  	_ = typ
  1690  	// match: (Eq16 x y)
  1691  	// cond: isSigned(x.Type) && isSigned(y.Type)
  1692  	// result: (Equal (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  1693  	for {
  1694  		_ = v.Args[1]
  1695  		x := v.Args[0]
  1696  		y := v.Args[1]
  1697  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  1698  			break
  1699  		}
  1700  		v.reset(OpPPC64Equal)
  1701  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1702  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1703  		v1.AddArg(x)
  1704  		v0.AddArg(v1)
  1705  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1706  		v2.AddArg(y)
  1707  		v0.AddArg(v2)
  1708  		v.AddArg(v0)
  1709  		return true
  1710  	}
  1711  	// match: (Eq16 x y)
  1712  	// cond:
  1713  	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1714  	for {
  1715  		_ = v.Args[1]
  1716  		x := v.Args[0]
  1717  		y := v.Args[1]
  1718  		v.reset(OpPPC64Equal)
  1719  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1720  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1721  		v1.AddArg(x)
  1722  		v0.AddArg(v1)
  1723  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1724  		v2.AddArg(y)
  1725  		v0.AddArg(v2)
  1726  		v.AddArg(v0)
  1727  		return true
  1728  	}
  1729  }
  1730  func rewriteValuePPC64_OpEq32_0(v *Value) bool {
  1731  	b := v.Block
  1732  	_ = b
  1733  	// match: (Eq32 x y)
  1734  	// cond:
  1735  	// result: (Equal (CMPW x y))
  1736  	for {
  1737  		_ = v.Args[1]
  1738  		x := v.Args[0]
  1739  		y := v.Args[1]
  1740  		v.reset(OpPPC64Equal)
  1741  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1742  		v0.AddArg(x)
  1743  		v0.AddArg(y)
  1744  		v.AddArg(v0)
  1745  		return true
  1746  	}
  1747  }
  1748  func rewriteValuePPC64_OpEq32F_0(v *Value) bool {
  1749  	b := v.Block
  1750  	_ = b
  1751  	// match: (Eq32F x y)
  1752  	// cond:
  1753  	// result: (Equal (FCMPU x y))
  1754  	for {
  1755  		_ = v.Args[1]
  1756  		x := v.Args[0]
  1757  		y := v.Args[1]
  1758  		v.reset(OpPPC64Equal)
  1759  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1760  		v0.AddArg(x)
  1761  		v0.AddArg(y)
  1762  		v.AddArg(v0)
  1763  		return true
  1764  	}
  1765  }
  1766  func rewriteValuePPC64_OpEq64_0(v *Value) bool {
  1767  	b := v.Block
  1768  	_ = b
  1769  	// match: (Eq64 x y)
  1770  	// cond:
  1771  	// result: (Equal (CMP x y))
  1772  	for {
  1773  		_ = v.Args[1]
  1774  		x := v.Args[0]
  1775  		y := v.Args[1]
  1776  		v.reset(OpPPC64Equal)
  1777  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  1778  		v0.AddArg(x)
  1779  		v0.AddArg(y)
  1780  		v.AddArg(v0)
  1781  		return true
  1782  	}
  1783  }
  1784  func rewriteValuePPC64_OpEq64F_0(v *Value) bool {
  1785  	b := v.Block
  1786  	_ = b
  1787  	// match: (Eq64F x y)
  1788  	// cond:
  1789  	// result: (Equal (FCMPU x y))
  1790  	for {
  1791  		_ = v.Args[1]
  1792  		x := v.Args[0]
  1793  		y := v.Args[1]
  1794  		v.reset(OpPPC64Equal)
  1795  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1796  		v0.AddArg(x)
  1797  		v0.AddArg(y)
  1798  		v.AddArg(v0)
  1799  		return true
  1800  	}
  1801  }
  1802  func rewriteValuePPC64_OpEq8_0(v *Value) bool {
  1803  	b := v.Block
  1804  	_ = b
  1805  	typ := &b.Func.Config.Types
  1806  	_ = typ
  1807  	// match: (Eq8 x y)
  1808  	// cond: isSigned(x.Type) && isSigned(y.Type)
  1809  	// result: (Equal (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  1810  	for {
  1811  		_ = v.Args[1]
  1812  		x := v.Args[0]
  1813  		y := v.Args[1]
  1814  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  1815  			break
  1816  		}
  1817  		v.reset(OpPPC64Equal)
  1818  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1819  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1820  		v1.AddArg(x)
  1821  		v0.AddArg(v1)
  1822  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1823  		v2.AddArg(y)
  1824  		v0.AddArg(v2)
  1825  		v.AddArg(v0)
  1826  		return true
  1827  	}
  1828  	// match: (Eq8 x y)
  1829  	// cond:
  1830  	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1831  	for {
  1832  		_ = v.Args[1]
  1833  		x := v.Args[0]
  1834  		y := v.Args[1]
  1835  		v.reset(OpPPC64Equal)
  1836  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1837  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1838  		v1.AddArg(x)
  1839  		v0.AddArg(v1)
  1840  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1841  		v2.AddArg(y)
  1842  		v0.AddArg(v2)
  1843  		v.AddArg(v0)
  1844  		return true
  1845  	}
  1846  }
  1847  func rewriteValuePPC64_OpEqB_0(v *Value) bool {
  1848  	b := v.Block
  1849  	_ = b
  1850  	typ := &b.Func.Config.Types
  1851  	_ = typ
  1852  	// match: (EqB x y)
  1853  	// cond:
  1854  	// result: (ANDconst [1] (EQV x y))
  1855  	for {
  1856  		_ = v.Args[1]
  1857  		x := v.Args[0]
  1858  		y := v.Args[1]
  1859  		v.reset(OpPPC64ANDconst)
  1860  		v.AuxInt = 1
  1861  		v0 := b.NewValue0(v.Pos, OpPPC64EQV, typ.Int64)
  1862  		v0.AddArg(x)
  1863  		v0.AddArg(y)
  1864  		v.AddArg(v0)
  1865  		return true
  1866  	}
  1867  }
  1868  func rewriteValuePPC64_OpEqPtr_0(v *Value) bool {
  1869  	b := v.Block
  1870  	_ = b
  1871  	// match: (EqPtr x y)
  1872  	// cond:
  1873  	// result: (Equal (CMP x y))
  1874  	for {
  1875  		_ = v.Args[1]
  1876  		x := v.Args[0]
  1877  		y := v.Args[1]
  1878  		v.reset(OpPPC64Equal)
  1879  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  1880  		v0.AddArg(x)
  1881  		v0.AddArg(y)
  1882  		v.AddArg(v0)
  1883  		return true
  1884  	}
  1885  }
  1886  func rewriteValuePPC64_OpFloor_0(v *Value) bool {
  1887  	// match: (Floor x)
  1888  	// cond:
  1889  	// result: (FFLOOR x)
  1890  	for {
  1891  		x := v.Args[0]
  1892  		v.reset(OpPPC64FFLOOR)
  1893  		v.AddArg(x)
  1894  		return true
  1895  	}
  1896  }
  1897  func rewriteValuePPC64_OpGeq16_0(v *Value) bool {
  1898  	b := v.Block
  1899  	_ = b
  1900  	typ := &b.Func.Config.Types
  1901  	_ = typ
  1902  	// match: (Geq16 x y)
  1903  	// cond:
  1904  	// result: (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  1905  	for {
  1906  		_ = v.Args[1]
  1907  		x := v.Args[0]
  1908  		y := v.Args[1]
  1909  		v.reset(OpPPC64GreaterEqual)
  1910  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1911  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1912  		v1.AddArg(x)
  1913  		v0.AddArg(v1)
  1914  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1915  		v2.AddArg(y)
  1916  		v0.AddArg(v2)
  1917  		v.AddArg(v0)
  1918  		return true
  1919  	}
  1920  }
  1921  func rewriteValuePPC64_OpGeq16U_0(v *Value) bool {
  1922  	b := v.Block
  1923  	_ = b
  1924  	typ := &b.Func.Config.Types
  1925  	_ = typ
  1926  	// match: (Geq16U x y)
  1927  	// cond:
  1928  	// result: (GreaterEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1929  	for {
  1930  		_ = v.Args[1]
  1931  		x := v.Args[0]
  1932  		y := v.Args[1]
  1933  		v.reset(OpPPC64GreaterEqual)
  1934  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  1935  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1936  		v1.AddArg(x)
  1937  		v0.AddArg(v1)
  1938  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1939  		v2.AddArg(y)
  1940  		v0.AddArg(v2)
  1941  		v.AddArg(v0)
  1942  		return true
  1943  	}
  1944  }
  1945  func rewriteValuePPC64_OpGeq32_0(v *Value) bool {
  1946  	b := v.Block
  1947  	_ = b
  1948  	// match: (Geq32 x y)
  1949  	// cond:
  1950  	// result: (GreaterEqual (CMPW x y))
  1951  	for {
  1952  		_ = v.Args[1]
  1953  		x := v.Args[0]
  1954  		y := v.Args[1]
  1955  		v.reset(OpPPC64GreaterEqual)
  1956  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  1957  		v0.AddArg(x)
  1958  		v0.AddArg(y)
  1959  		v.AddArg(v0)
  1960  		return true
  1961  	}
  1962  }
  1963  func rewriteValuePPC64_OpGeq32F_0(v *Value) bool {
  1964  	b := v.Block
  1965  	_ = b
  1966  	// match: (Geq32F x y)
  1967  	// cond:
  1968  	// result: (FGreaterEqual (FCMPU x y))
  1969  	for {
  1970  		_ = v.Args[1]
  1971  		x := v.Args[0]
  1972  		y := v.Args[1]
  1973  		v.reset(OpPPC64FGreaterEqual)
  1974  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  1975  		v0.AddArg(x)
  1976  		v0.AddArg(y)
  1977  		v.AddArg(v0)
  1978  		return true
  1979  	}
  1980  }
  1981  func rewriteValuePPC64_OpGeq32U_0(v *Value) bool {
  1982  	b := v.Block
  1983  	_ = b
  1984  	// match: (Geq32U x y)
  1985  	// cond:
  1986  	// result: (GreaterEqual (CMPWU x y))
  1987  	for {
  1988  		_ = v.Args[1]
  1989  		x := v.Args[0]
  1990  		y := v.Args[1]
  1991  		v.reset(OpPPC64GreaterEqual)
  1992  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  1993  		v0.AddArg(x)
  1994  		v0.AddArg(y)
  1995  		v.AddArg(v0)
  1996  		return true
  1997  	}
  1998  }
  1999  func rewriteValuePPC64_OpGeq64_0(v *Value) bool {
  2000  	b := v.Block
  2001  	_ = b
  2002  	// match: (Geq64 x y)
  2003  	// cond:
  2004  	// result: (GreaterEqual (CMP x y))
  2005  	for {
  2006  		_ = v.Args[1]
  2007  		x := v.Args[0]
  2008  		y := v.Args[1]
  2009  		v.reset(OpPPC64GreaterEqual)
  2010  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2011  		v0.AddArg(x)
  2012  		v0.AddArg(y)
  2013  		v.AddArg(v0)
  2014  		return true
  2015  	}
  2016  }
  2017  func rewriteValuePPC64_OpGeq64F_0(v *Value) bool {
  2018  	b := v.Block
  2019  	_ = b
  2020  	// match: (Geq64F x y)
  2021  	// cond:
  2022  	// result: (FGreaterEqual (FCMPU x y))
  2023  	for {
  2024  		_ = v.Args[1]
  2025  		x := v.Args[0]
  2026  		y := v.Args[1]
  2027  		v.reset(OpPPC64FGreaterEqual)
  2028  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2029  		v0.AddArg(x)
  2030  		v0.AddArg(y)
  2031  		v.AddArg(v0)
  2032  		return true
  2033  	}
  2034  }
  2035  func rewriteValuePPC64_OpGeq64U_0(v *Value) bool {
  2036  	b := v.Block
  2037  	_ = b
  2038  	// match: (Geq64U x y)
  2039  	// cond:
  2040  	// result: (GreaterEqual (CMPU x y))
  2041  	for {
  2042  		_ = v.Args[1]
  2043  		x := v.Args[0]
  2044  		y := v.Args[1]
  2045  		v.reset(OpPPC64GreaterEqual)
  2046  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2047  		v0.AddArg(x)
  2048  		v0.AddArg(y)
  2049  		v.AddArg(v0)
  2050  		return true
  2051  	}
  2052  }
  2053  func rewriteValuePPC64_OpGeq8_0(v *Value) bool {
  2054  	b := v.Block
  2055  	_ = b
  2056  	typ := &b.Func.Config.Types
  2057  	_ = typ
  2058  	// match: (Geq8 x y)
  2059  	// cond:
  2060  	// result: (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2061  	for {
  2062  		_ = v.Args[1]
  2063  		x := v.Args[0]
  2064  		y := v.Args[1]
  2065  		v.reset(OpPPC64GreaterEqual)
  2066  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2067  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2068  		v1.AddArg(x)
  2069  		v0.AddArg(v1)
  2070  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2071  		v2.AddArg(y)
  2072  		v0.AddArg(v2)
  2073  		v.AddArg(v0)
  2074  		return true
  2075  	}
  2076  }
  2077  func rewriteValuePPC64_OpGeq8U_0(v *Value) bool {
  2078  	b := v.Block
  2079  	_ = b
  2080  	typ := &b.Func.Config.Types
  2081  	_ = typ
  2082  	// match: (Geq8U x y)
  2083  	// cond:
  2084  	// result: (GreaterEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2085  	for {
  2086  		_ = v.Args[1]
  2087  		x := v.Args[0]
  2088  		y := v.Args[1]
  2089  		v.reset(OpPPC64GreaterEqual)
  2090  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2091  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2092  		v1.AddArg(x)
  2093  		v0.AddArg(v1)
  2094  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2095  		v2.AddArg(y)
  2096  		v0.AddArg(v2)
  2097  		v.AddArg(v0)
  2098  		return true
  2099  	}
  2100  }
  2101  func rewriteValuePPC64_OpGetCallerSP_0(v *Value) bool {
  2102  	// match: (GetCallerSP)
  2103  	// cond:
  2104  	// result: (LoweredGetCallerSP)
  2105  	for {
  2106  		v.reset(OpPPC64LoweredGetCallerSP)
  2107  		return true
  2108  	}
  2109  }
  2110  func rewriteValuePPC64_OpGetClosurePtr_0(v *Value) bool {
  2111  	// match: (GetClosurePtr)
  2112  	// cond:
  2113  	// result: (LoweredGetClosurePtr)
  2114  	for {
  2115  		v.reset(OpPPC64LoweredGetClosurePtr)
  2116  		return true
  2117  	}
  2118  }
  2119  func rewriteValuePPC64_OpGreater16_0(v *Value) bool {
  2120  	b := v.Block
  2121  	_ = b
  2122  	typ := &b.Func.Config.Types
  2123  	_ = typ
  2124  	// match: (Greater16 x y)
  2125  	// cond:
  2126  	// result: (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2127  	for {
  2128  		_ = v.Args[1]
  2129  		x := v.Args[0]
  2130  		y := v.Args[1]
  2131  		v.reset(OpPPC64GreaterThan)
  2132  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2133  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2134  		v1.AddArg(x)
  2135  		v0.AddArg(v1)
  2136  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2137  		v2.AddArg(y)
  2138  		v0.AddArg(v2)
  2139  		v.AddArg(v0)
  2140  		return true
  2141  	}
  2142  }
  2143  func rewriteValuePPC64_OpGreater16U_0(v *Value) bool {
  2144  	b := v.Block
  2145  	_ = b
  2146  	typ := &b.Func.Config.Types
  2147  	_ = typ
  2148  	// match: (Greater16U x y)
  2149  	// cond:
  2150  	// result: (GreaterThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2151  	for {
  2152  		_ = v.Args[1]
  2153  		x := v.Args[0]
  2154  		y := v.Args[1]
  2155  		v.reset(OpPPC64GreaterThan)
  2156  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2157  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2158  		v1.AddArg(x)
  2159  		v0.AddArg(v1)
  2160  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2161  		v2.AddArg(y)
  2162  		v0.AddArg(v2)
  2163  		v.AddArg(v0)
  2164  		return true
  2165  	}
  2166  }
  2167  func rewriteValuePPC64_OpGreater32_0(v *Value) bool {
  2168  	b := v.Block
  2169  	_ = b
  2170  	// match: (Greater32 x y)
  2171  	// cond:
  2172  	// result: (GreaterThan (CMPW x y))
  2173  	for {
  2174  		_ = v.Args[1]
  2175  		x := v.Args[0]
  2176  		y := v.Args[1]
  2177  		v.reset(OpPPC64GreaterThan)
  2178  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2179  		v0.AddArg(x)
  2180  		v0.AddArg(y)
  2181  		v.AddArg(v0)
  2182  		return true
  2183  	}
  2184  }
  2185  func rewriteValuePPC64_OpGreater32F_0(v *Value) bool {
  2186  	b := v.Block
  2187  	_ = b
  2188  	// match: (Greater32F x y)
  2189  	// cond:
  2190  	// result: (FGreaterThan (FCMPU x y))
  2191  	for {
  2192  		_ = v.Args[1]
  2193  		x := v.Args[0]
  2194  		y := v.Args[1]
  2195  		v.reset(OpPPC64FGreaterThan)
  2196  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2197  		v0.AddArg(x)
  2198  		v0.AddArg(y)
  2199  		v.AddArg(v0)
  2200  		return true
  2201  	}
  2202  }
  2203  func rewriteValuePPC64_OpGreater32U_0(v *Value) bool {
  2204  	b := v.Block
  2205  	_ = b
  2206  	// match: (Greater32U x y)
  2207  	// cond:
  2208  	// result: (GreaterThan (CMPWU x y))
  2209  	for {
  2210  		_ = v.Args[1]
  2211  		x := v.Args[0]
  2212  		y := v.Args[1]
  2213  		v.reset(OpPPC64GreaterThan)
  2214  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2215  		v0.AddArg(x)
  2216  		v0.AddArg(y)
  2217  		v.AddArg(v0)
  2218  		return true
  2219  	}
  2220  }
  2221  func rewriteValuePPC64_OpGreater64_0(v *Value) bool {
  2222  	b := v.Block
  2223  	_ = b
  2224  	// match: (Greater64 x y)
  2225  	// cond:
  2226  	// result: (GreaterThan (CMP x y))
  2227  	for {
  2228  		_ = v.Args[1]
  2229  		x := v.Args[0]
  2230  		y := v.Args[1]
  2231  		v.reset(OpPPC64GreaterThan)
  2232  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2233  		v0.AddArg(x)
  2234  		v0.AddArg(y)
  2235  		v.AddArg(v0)
  2236  		return true
  2237  	}
  2238  }
  2239  func rewriteValuePPC64_OpGreater64F_0(v *Value) bool {
  2240  	b := v.Block
  2241  	_ = b
  2242  	// match: (Greater64F x y)
  2243  	// cond:
  2244  	// result: (FGreaterThan (FCMPU x y))
  2245  	for {
  2246  		_ = v.Args[1]
  2247  		x := v.Args[0]
  2248  		y := v.Args[1]
  2249  		v.reset(OpPPC64FGreaterThan)
  2250  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2251  		v0.AddArg(x)
  2252  		v0.AddArg(y)
  2253  		v.AddArg(v0)
  2254  		return true
  2255  	}
  2256  }
  2257  func rewriteValuePPC64_OpGreater64U_0(v *Value) bool {
  2258  	b := v.Block
  2259  	_ = b
  2260  	// match: (Greater64U x y)
  2261  	// cond:
  2262  	// result: (GreaterThan (CMPU x y))
  2263  	for {
  2264  		_ = v.Args[1]
  2265  		x := v.Args[0]
  2266  		y := v.Args[1]
  2267  		v.reset(OpPPC64GreaterThan)
  2268  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2269  		v0.AddArg(x)
  2270  		v0.AddArg(y)
  2271  		v.AddArg(v0)
  2272  		return true
  2273  	}
  2274  }
  2275  func rewriteValuePPC64_OpGreater8_0(v *Value) bool {
  2276  	b := v.Block
  2277  	_ = b
  2278  	typ := &b.Func.Config.Types
  2279  	_ = typ
  2280  	// match: (Greater8 x y)
  2281  	// cond:
  2282  	// result: (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2283  	for {
  2284  		_ = v.Args[1]
  2285  		x := v.Args[0]
  2286  		y := v.Args[1]
  2287  		v.reset(OpPPC64GreaterThan)
  2288  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2289  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2290  		v1.AddArg(x)
  2291  		v0.AddArg(v1)
  2292  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2293  		v2.AddArg(y)
  2294  		v0.AddArg(v2)
  2295  		v.AddArg(v0)
  2296  		return true
  2297  	}
  2298  }
  2299  func rewriteValuePPC64_OpGreater8U_0(v *Value) bool {
  2300  	b := v.Block
  2301  	_ = b
  2302  	typ := &b.Func.Config.Types
  2303  	_ = typ
  2304  	// match: (Greater8U x y)
  2305  	// cond:
  2306  	// result: (GreaterThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2307  	for {
  2308  		_ = v.Args[1]
  2309  		x := v.Args[0]
  2310  		y := v.Args[1]
  2311  		v.reset(OpPPC64GreaterThan)
  2312  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2313  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2314  		v1.AddArg(x)
  2315  		v0.AddArg(v1)
  2316  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2317  		v2.AddArg(y)
  2318  		v0.AddArg(v2)
  2319  		v.AddArg(v0)
  2320  		return true
  2321  	}
  2322  }
  2323  func rewriteValuePPC64_OpHmul32_0(v *Value) bool {
  2324  	// match: (Hmul32 x y)
  2325  	// cond:
  2326  	// result: (MULHW  x y)
  2327  	for {
  2328  		_ = v.Args[1]
  2329  		x := v.Args[0]
  2330  		y := v.Args[1]
  2331  		v.reset(OpPPC64MULHW)
  2332  		v.AddArg(x)
  2333  		v.AddArg(y)
  2334  		return true
  2335  	}
  2336  }
  2337  func rewriteValuePPC64_OpHmul32u_0(v *Value) bool {
  2338  	// match: (Hmul32u x y)
  2339  	// cond:
  2340  	// result: (MULHWU x y)
  2341  	for {
  2342  		_ = v.Args[1]
  2343  		x := v.Args[0]
  2344  		y := v.Args[1]
  2345  		v.reset(OpPPC64MULHWU)
  2346  		v.AddArg(x)
  2347  		v.AddArg(y)
  2348  		return true
  2349  	}
  2350  }
  2351  func rewriteValuePPC64_OpHmul64_0(v *Value) bool {
  2352  	// match: (Hmul64 x y)
  2353  	// cond:
  2354  	// result: (MULHD  x y)
  2355  	for {
  2356  		_ = v.Args[1]
  2357  		x := v.Args[0]
  2358  		y := v.Args[1]
  2359  		v.reset(OpPPC64MULHD)
  2360  		v.AddArg(x)
  2361  		v.AddArg(y)
  2362  		return true
  2363  	}
  2364  }
  2365  func rewriteValuePPC64_OpHmul64u_0(v *Value) bool {
  2366  	// match: (Hmul64u x y)
  2367  	// cond:
  2368  	// result: (MULHDU x y)
  2369  	for {
  2370  		_ = v.Args[1]
  2371  		x := v.Args[0]
  2372  		y := v.Args[1]
  2373  		v.reset(OpPPC64MULHDU)
  2374  		v.AddArg(x)
  2375  		v.AddArg(y)
  2376  		return true
  2377  	}
  2378  }
  2379  func rewriteValuePPC64_OpInterCall_0(v *Value) bool {
  2380  	// match: (InterCall [argwid] entry mem)
  2381  	// cond:
  2382  	// result: (CALLinter [argwid] entry mem)
  2383  	for {
  2384  		argwid := v.AuxInt
  2385  		_ = v.Args[1]
  2386  		entry := v.Args[0]
  2387  		mem := v.Args[1]
  2388  		v.reset(OpPPC64CALLinter)
  2389  		v.AuxInt = argwid
  2390  		v.AddArg(entry)
  2391  		v.AddArg(mem)
  2392  		return true
  2393  	}
  2394  }
  2395  func rewriteValuePPC64_OpIsInBounds_0(v *Value) bool {
  2396  	b := v.Block
  2397  	_ = b
  2398  	// match: (IsInBounds idx len)
  2399  	// cond:
  2400  	// result: (LessThan (CMPU idx len))
  2401  	for {
  2402  		_ = v.Args[1]
  2403  		idx := v.Args[0]
  2404  		len := v.Args[1]
  2405  		v.reset(OpPPC64LessThan)
  2406  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2407  		v0.AddArg(idx)
  2408  		v0.AddArg(len)
  2409  		v.AddArg(v0)
  2410  		return true
  2411  	}
  2412  }
  2413  func rewriteValuePPC64_OpIsNonNil_0(v *Value) bool {
  2414  	b := v.Block
  2415  	_ = b
  2416  	// match: (IsNonNil ptr)
  2417  	// cond:
  2418  	// result: (NotEqual (CMPconst [0] ptr))
  2419  	for {
  2420  		ptr := v.Args[0]
  2421  		v.reset(OpPPC64NotEqual)
  2422  		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  2423  		v0.AuxInt = 0
  2424  		v0.AddArg(ptr)
  2425  		v.AddArg(v0)
  2426  		return true
  2427  	}
  2428  }
  2429  func rewriteValuePPC64_OpIsSliceInBounds_0(v *Value) bool {
  2430  	b := v.Block
  2431  	_ = b
  2432  	// match: (IsSliceInBounds idx len)
  2433  	// cond:
  2434  	// result: (LessEqual (CMPU idx len))
  2435  	for {
  2436  		_ = v.Args[1]
  2437  		idx := v.Args[0]
  2438  		len := v.Args[1]
  2439  		v.reset(OpPPC64LessEqual)
  2440  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2441  		v0.AddArg(idx)
  2442  		v0.AddArg(len)
  2443  		v.AddArg(v0)
  2444  		return true
  2445  	}
  2446  }
  2447  func rewriteValuePPC64_OpLeq16_0(v *Value) bool {
  2448  	b := v.Block
  2449  	_ = b
  2450  	typ := &b.Func.Config.Types
  2451  	_ = typ
  2452  	// match: (Leq16 x y)
  2453  	// cond:
  2454  	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2455  	for {
  2456  		_ = v.Args[1]
  2457  		x := v.Args[0]
  2458  		y := v.Args[1]
  2459  		v.reset(OpPPC64LessEqual)
  2460  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2461  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2462  		v1.AddArg(x)
  2463  		v0.AddArg(v1)
  2464  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2465  		v2.AddArg(y)
  2466  		v0.AddArg(v2)
  2467  		v.AddArg(v0)
  2468  		return true
  2469  	}
  2470  }
  2471  func rewriteValuePPC64_OpLeq16U_0(v *Value) bool {
  2472  	b := v.Block
  2473  	_ = b
  2474  	typ := &b.Func.Config.Types
  2475  	_ = typ
  2476  	// match: (Leq16U x y)
  2477  	// cond:
  2478  	// result: (LessEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2479  	for {
  2480  		_ = v.Args[1]
  2481  		x := v.Args[0]
  2482  		y := v.Args[1]
  2483  		v.reset(OpPPC64LessEqual)
  2484  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2485  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2486  		v1.AddArg(x)
  2487  		v0.AddArg(v1)
  2488  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2489  		v2.AddArg(y)
  2490  		v0.AddArg(v2)
  2491  		v.AddArg(v0)
  2492  		return true
  2493  	}
  2494  }
  2495  func rewriteValuePPC64_OpLeq32_0(v *Value) bool {
  2496  	b := v.Block
  2497  	_ = b
  2498  	// match: (Leq32 x y)
  2499  	// cond:
  2500  	// result: (LessEqual (CMPW x y))
  2501  	for {
  2502  		_ = v.Args[1]
  2503  		x := v.Args[0]
  2504  		y := v.Args[1]
  2505  		v.reset(OpPPC64LessEqual)
  2506  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2507  		v0.AddArg(x)
  2508  		v0.AddArg(y)
  2509  		v.AddArg(v0)
  2510  		return true
  2511  	}
  2512  }
  2513  func rewriteValuePPC64_OpLeq32F_0(v *Value) bool {
  2514  	b := v.Block
  2515  	_ = b
  2516  	// match: (Leq32F x y)
  2517  	// cond:
  2518  	// result: (FLessEqual (FCMPU x y))
  2519  	for {
  2520  		_ = v.Args[1]
  2521  		x := v.Args[0]
  2522  		y := v.Args[1]
  2523  		v.reset(OpPPC64FLessEqual)
  2524  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2525  		v0.AddArg(x)
  2526  		v0.AddArg(y)
  2527  		v.AddArg(v0)
  2528  		return true
  2529  	}
  2530  }
  2531  func rewriteValuePPC64_OpLeq32U_0(v *Value) bool {
  2532  	b := v.Block
  2533  	_ = b
  2534  	// match: (Leq32U x y)
  2535  	// cond:
  2536  	// result: (LessEqual (CMPWU x y))
  2537  	for {
  2538  		_ = v.Args[1]
  2539  		x := v.Args[0]
  2540  		y := v.Args[1]
  2541  		v.reset(OpPPC64LessEqual)
  2542  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2543  		v0.AddArg(x)
  2544  		v0.AddArg(y)
  2545  		v.AddArg(v0)
  2546  		return true
  2547  	}
  2548  }
  2549  func rewriteValuePPC64_OpLeq64_0(v *Value) bool {
  2550  	b := v.Block
  2551  	_ = b
  2552  	// match: (Leq64 x y)
  2553  	// cond:
  2554  	// result: (LessEqual (CMP x y))
  2555  	for {
  2556  		_ = v.Args[1]
  2557  		x := v.Args[0]
  2558  		y := v.Args[1]
  2559  		v.reset(OpPPC64LessEqual)
  2560  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2561  		v0.AddArg(x)
  2562  		v0.AddArg(y)
  2563  		v.AddArg(v0)
  2564  		return true
  2565  	}
  2566  }
  2567  func rewriteValuePPC64_OpLeq64F_0(v *Value) bool {
  2568  	b := v.Block
  2569  	_ = b
  2570  	// match: (Leq64F x y)
  2571  	// cond:
  2572  	// result: (FLessEqual (FCMPU x y))
  2573  	for {
  2574  		_ = v.Args[1]
  2575  		x := v.Args[0]
  2576  		y := v.Args[1]
  2577  		v.reset(OpPPC64FLessEqual)
  2578  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2579  		v0.AddArg(x)
  2580  		v0.AddArg(y)
  2581  		v.AddArg(v0)
  2582  		return true
  2583  	}
  2584  }
  2585  func rewriteValuePPC64_OpLeq64U_0(v *Value) bool {
  2586  	b := v.Block
  2587  	_ = b
  2588  	// match: (Leq64U x y)
  2589  	// cond:
  2590  	// result: (LessEqual (CMPU x y))
  2591  	for {
  2592  		_ = v.Args[1]
  2593  		x := v.Args[0]
  2594  		y := v.Args[1]
  2595  		v.reset(OpPPC64LessEqual)
  2596  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2597  		v0.AddArg(x)
  2598  		v0.AddArg(y)
  2599  		v.AddArg(v0)
  2600  		return true
  2601  	}
  2602  }
  2603  func rewriteValuePPC64_OpLeq8_0(v *Value) bool {
  2604  	b := v.Block
  2605  	_ = b
  2606  	typ := &b.Func.Config.Types
  2607  	_ = typ
  2608  	// match: (Leq8 x y)
  2609  	// cond:
  2610  	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2611  	for {
  2612  		_ = v.Args[1]
  2613  		x := v.Args[0]
  2614  		y := v.Args[1]
  2615  		v.reset(OpPPC64LessEqual)
  2616  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2617  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2618  		v1.AddArg(x)
  2619  		v0.AddArg(v1)
  2620  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2621  		v2.AddArg(y)
  2622  		v0.AddArg(v2)
  2623  		v.AddArg(v0)
  2624  		return true
  2625  	}
  2626  }
  2627  func rewriteValuePPC64_OpLeq8U_0(v *Value) bool {
  2628  	b := v.Block
  2629  	_ = b
  2630  	typ := &b.Func.Config.Types
  2631  	_ = typ
  2632  	// match: (Leq8U x y)
  2633  	// cond:
  2634  	// result: (LessEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2635  	for {
  2636  		_ = v.Args[1]
  2637  		x := v.Args[0]
  2638  		y := v.Args[1]
  2639  		v.reset(OpPPC64LessEqual)
  2640  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2641  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2642  		v1.AddArg(x)
  2643  		v0.AddArg(v1)
  2644  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2645  		v2.AddArg(y)
  2646  		v0.AddArg(v2)
  2647  		v.AddArg(v0)
  2648  		return true
  2649  	}
  2650  }
  2651  func rewriteValuePPC64_OpLess16_0(v *Value) bool {
  2652  	b := v.Block
  2653  	_ = b
  2654  	typ := &b.Func.Config.Types
  2655  	_ = typ
  2656  	// match: (Less16 x y)
  2657  	// cond:
  2658  	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  2659  	for {
  2660  		_ = v.Args[1]
  2661  		x := v.Args[0]
  2662  		y := v.Args[1]
  2663  		v.reset(OpPPC64LessThan)
  2664  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2665  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2666  		v1.AddArg(x)
  2667  		v0.AddArg(v1)
  2668  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  2669  		v2.AddArg(y)
  2670  		v0.AddArg(v2)
  2671  		v.AddArg(v0)
  2672  		return true
  2673  	}
  2674  }
  2675  func rewriteValuePPC64_OpLess16U_0(v *Value) bool {
  2676  	b := v.Block
  2677  	_ = b
  2678  	typ := &b.Func.Config.Types
  2679  	_ = typ
  2680  	// match: (Less16U x y)
  2681  	// cond:
  2682  	// result: (LessThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  2683  	for {
  2684  		_ = v.Args[1]
  2685  		x := v.Args[0]
  2686  		y := v.Args[1]
  2687  		v.reset(OpPPC64LessThan)
  2688  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2689  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2690  		v1.AddArg(x)
  2691  		v0.AddArg(v1)
  2692  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2693  		v2.AddArg(y)
  2694  		v0.AddArg(v2)
  2695  		v.AddArg(v0)
  2696  		return true
  2697  	}
  2698  }
  2699  func rewriteValuePPC64_OpLess32_0(v *Value) bool {
  2700  	b := v.Block
  2701  	_ = b
  2702  	// match: (Less32 x y)
  2703  	// cond:
  2704  	// result: (LessThan (CMPW x y))
  2705  	for {
  2706  		_ = v.Args[1]
  2707  		x := v.Args[0]
  2708  		y := v.Args[1]
  2709  		v.reset(OpPPC64LessThan)
  2710  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2711  		v0.AddArg(x)
  2712  		v0.AddArg(y)
  2713  		v.AddArg(v0)
  2714  		return true
  2715  	}
  2716  }
  2717  func rewriteValuePPC64_OpLess32F_0(v *Value) bool {
  2718  	b := v.Block
  2719  	_ = b
  2720  	// match: (Less32F x y)
  2721  	// cond:
  2722  	// result: (FLessThan (FCMPU x y))
  2723  	for {
  2724  		_ = v.Args[1]
  2725  		x := v.Args[0]
  2726  		y := v.Args[1]
  2727  		v.reset(OpPPC64FLessThan)
  2728  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2729  		v0.AddArg(x)
  2730  		v0.AddArg(y)
  2731  		v.AddArg(v0)
  2732  		return true
  2733  	}
  2734  }
  2735  func rewriteValuePPC64_OpLess32U_0(v *Value) bool {
  2736  	b := v.Block
  2737  	_ = b
  2738  	// match: (Less32U x y)
  2739  	// cond:
  2740  	// result: (LessThan (CMPWU x y))
  2741  	for {
  2742  		_ = v.Args[1]
  2743  		x := v.Args[0]
  2744  		y := v.Args[1]
  2745  		v.reset(OpPPC64LessThan)
  2746  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2747  		v0.AddArg(x)
  2748  		v0.AddArg(y)
  2749  		v.AddArg(v0)
  2750  		return true
  2751  	}
  2752  }
  2753  func rewriteValuePPC64_OpLess64_0(v *Value) bool {
  2754  	b := v.Block
  2755  	_ = b
  2756  	// match: (Less64 x y)
  2757  	// cond:
  2758  	// result: (LessThan (CMP x y))
  2759  	for {
  2760  		_ = v.Args[1]
  2761  		x := v.Args[0]
  2762  		y := v.Args[1]
  2763  		v.reset(OpPPC64LessThan)
  2764  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  2765  		v0.AddArg(x)
  2766  		v0.AddArg(y)
  2767  		v.AddArg(v0)
  2768  		return true
  2769  	}
  2770  }
  2771  func rewriteValuePPC64_OpLess64F_0(v *Value) bool {
  2772  	b := v.Block
  2773  	_ = b
  2774  	// match: (Less64F x y)
  2775  	// cond:
  2776  	// result: (FLessThan (FCMPU x y))
  2777  	for {
  2778  		_ = v.Args[1]
  2779  		x := v.Args[0]
  2780  		y := v.Args[1]
  2781  		v.reset(OpPPC64FLessThan)
  2782  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  2783  		v0.AddArg(x)
  2784  		v0.AddArg(y)
  2785  		v.AddArg(v0)
  2786  		return true
  2787  	}
  2788  }
  2789  func rewriteValuePPC64_OpLess64U_0(v *Value) bool {
  2790  	b := v.Block
  2791  	_ = b
  2792  	// match: (Less64U x y)
  2793  	// cond:
  2794  	// result: (LessThan (CMPU x y))
  2795  	for {
  2796  		_ = v.Args[1]
  2797  		x := v.Args[0]
  2798  		y := v.Args[1]
  2799  		v.reset(OpPPC64LessThan)
  2800  		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
  2801  		v0.AddArg(x)
  2802  		v0.AddArg(y)
  2803  		v.AddArg(v0)
  2804  		return true
  2805  	}
  2806  }
  2807  func rewriteValuePPC64_OpLess8_0(v *Value) bool {
  2808  	b := v.Block
  2809  	_ = b
  2810  	typ := &b.Func.Config.Types
  2811  	_ = typ
  2812  	// match: (Less8 x y)
  2813  	// cond:
  2814  	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  2815  	for {
  2816  		_ = v.Args[1]
  2817  		x := v.Args[0]
  2818  		y := v.Args[1]
  2819  		v.reset(OpPPC64LessThan)
  2820  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  2821  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2822  		v1.AddArg(x)
  2823  		v0.AddArg(v1)
  2824  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  2825  		v2.AddArg(y)
  2826  		v0.AddArg(v2)
  2827  		v.AddArg(v0)
  2828  		return true
  2829  	}
  2830  }
  2831  func rewriteValuePPC64_OpLess8U_0(v *Value) bool {
  2832  	b := v.Block
  2833  	_ = b
  2834  	typ := &b.Func.Config.Types
  2835  	_ = typ
  2836  	// match: (Less8U x y)
  2837  	// cond:
  2838  	// result: (LessThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  2839  	for {
  2840  		_ = v.Args[1]
  2841  		x := v.Args[0]
  2842  		y := v.Args[1]
  2843  		v.reset(OpPPC64LessThan)
  2844  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
  2845  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2846  		v1.AddArg(x)
  2847  		v0.AddArg(v1)
  2848  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2849  		v2.AddArg(y)
  2850  		v0.AddArg(v2)
  2851  		v.AddArg(v0)
  2852  		return true
  2853  	}
  2854  }
  2855  func rewriteValuePPC64_OpLoad_0(v *Value) bool {
  2856  	b := v.Block
  2857  	_ = b
  2858  	typ := &b.Func.Config.Types
  2859  	_ = typ
  2860  	// match: (Load <t> ptr mem)
  2861  	// cond: (is64BitInt(t) || isPtr(t))
  2862  	// result: (MOVDload ptr mem)
  2863  	for {
  2864  		t := v.Type
  2865  		_ = v.Args[1]
  2866  		ptr := v.Args[0]
  2867  		mem := v.Args[1]
  2868  		if !(is64BitInt(t) || isPtr(t)) {
  2869  			break
  2870  		}
  2871  		v.reset(OpPPC64MOVDload)
  2872  		v.AddArg(ptr)
  2873  		v.AddArg(mem)
  2874  		return true
  2875  	}
  2876  	// match: (Load <t> ptr mem)
  2877  	// cond: is32BitInt(t) && isSigned(t)
  2878  	// result: (MOVWload ptr mem)
  2879  	for {
  2880  		t := v.Type
  2881  		_ = v.Args[1]
  2882  		ptr := v.Args[0]
  2883  		mem := v.Args[1]
  2884  		if !(is32BitInt(t) && isSigned(t)) {
  2885  			break
  2886  		}
  2887  		v.reset(OpPPC64MOVWload)
  2888  		v.AddArg(ptr)
  2889  		v.AddArg(mem)
  2890  		return true
  2891  	}
  2892  	// match: (Load <t> ptr mem)
  2893  	// cond: is32BitInt(t) && !isSigned(t)
  2894  	// result: (MOVWZload ptr mem)
  2895  	for {
  2896  		t := v.Type
  2897  		_ = v.Args[1]
  2898  		ptr := v.Args[0]
  2899  		mem := v.Args[1]
  2900  		if !(is32BitInt(t) && !isSigned(t)) {
  2901  			break
  2902  		}
  2903  		v.reset(OpPPC64MOVWZload)
  2904  		v.AddArg(ptr)
  2905  		v.AddArg(mem)
  2906  		return true
  2907  	}
  2908  	// match: (Load <t> ptr mem)
  2909  	// cond: is16BitInt(t) && isSigned(t)
  2910  	// result: (MOVHload ptr mem)
  2911  	for {
  2912  		t := v.Type
  2913  		_ = v.Args[1]
  2914  		ptr := v.Args[0]
  2915  		mem := v.Args[1]
  2916  		if !(is16BitInt(t) && isSigned(t)) {
  2917  			break
  2918  		}
  2919  		v.reset(OpPPC64MOVHload)
  2920  		v.AddArg(ptr)
  2921  		v.AddArg(mem)
  2922  		return true
  2923  	}
  2924  	// match: (Load <t> ptr mem)
  2925  	// cond: is16BitInt(t) && !isSigned(t)
  2926  	// result: (MOVHZload ptr mem)
  2927  	for {
  2928  		t := v.Type
  2929  		_ = v.Args[1]
  2930  		ptr := v.Args[0]
  2931  		mem := v.Args[1]
  2932  		if !(is16BitInt(t) && !isSigned(t)) {
  2933  			break
  2934  		}
  2935  		v.reset(OpPPC64MOVHZload)
  2936  		v.AddArg(ptr)
  2937  		v.AddArg(mem)
  2938  		return true
  2939  	}
  2940  	// match: (Load <t> ptr mem)
  2941  	// cond: t.IsBoolean()
  2942  	// result: (MOVBZload ptr mem)
  2943  	for {
  2944  		t := v.Type
  2945  		_ = v.Args[1]
  2946  		ptr := v.Args[0]
  2947  		mem := v.Args[1]
  2948  		if !(t.IsBoolean()) {
  2949  			break
  2950  		}
  2951  		v.reset(OpPPC64MOVBZload)
  2952  		v.AddArg(ptr)
  2953  		v.AddArg(mem)
  2954  		return true
  2955  	}
  2956  	// match: (Load <t> ptr mem)
  2957  	// cond: is8BitInt(t) && isSigned(t)
  2958  	// result: (MOVBreg (MOVBZload ptr mem))
  2959  	for {
  2960  		t := v.Type
  2961  		_ = v.Args[1]
  2962  		ptr := v.Args[0]
  2963  		mem := v.Args[1]
  2964  		if !(is8BitInt(t) && isSigned(t)) {
  2965  			break
  2966  		}
  2967  		v.reset(OpPPC64MOVBreg)
  2968  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  2969  		v0.AddArg(ptr)
  2970  		v0.AddArg(mem)
  2971  		v.AddArg(v0)
  2972  		return true
  2973  	}
  2974  	// match: (Load <t> ptr mem)
  2975  	// cond: is8BitInt(t) && !isSigned(t)
  2976  	// result: (MOVBZload ptr mem)
  2977  	for {
  2978  		t := v.Type
  2979  		_ = v.Args[1]
  2980  		ptr := v.Args[0]
  2981  		mem := v.Args[1]
  2982  		if !(is8BitInt(t) && !isSigned(t)) {
  2983  			break
  2984  		}
  2985  		v.reset(OpPPC64MOVBZload)
  2986  		v.AddArg(ptr)
  2987  		v.AddArg(mem)
  2988  		return true
  2989  	}
  2990  	// match: (Load <t> ptr mem)
  2991  	// cond: is32BitFloat(t)
  2992  	// result: (FMOVSload ptr mem)
  2993  	for {
  2994  		t := v.Type
  2995  		_ = v.Args[1]
  2996  		ptr := v.Args[0]
  2997  		mem := v.Args[1]
  2998  		if !(is32BitFloat(t)) {
  2999  			break
  3000  		}
  3001  		v.reset(OpPPC64FMOVSload)
  3002  		v.AddArg(ptr)
  3003  		v.AddArg(mem)
  3004  		return true
  3005  	}
  3006  	// match: (Load <t> ptr mem)
  3007  	// cond: is64BitFloat(t)
  3008  	// result: (FMOVDload ptr mem)
  3009  	for {
  3010  		t := v.Type
  3011  		_ = v.Args[1]
  3012  		ptr := v.Args[0]
  3013  		mem := v.Args[1]
  3014  		if !(is64BitFloat(t)) {
  3015  			break
  3016  		}
  3017  		v.reset(OpPPC64FMOVDload)
  3018  		v.AddArg(ptr)
  3019  		v.AddArg(mem)
  3020  		return true
  3021  	}
  3022  	return false
  3023  }
  3024  func rewriteValuePPC64_OpLsh16x16_0(v *Value) bool {
  3025  	b := v.Block
  3026  	_ = b
  3027  	typ := &b.Func.Config.Types
  3028  	_ = typ
  3029  	// match: (Lsh16x16 x y)
  3030  	// cond:
  3031  	// result: (SLW  x                 (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
  3032  	for {
  3033  		_ = v.Args[1]
  3034  		x := v.Args[0]
  3035  		y := v.Args[1]
  3036  		v.reset(OpPPC64SLW)
  3037  		v.AddArg(x)
  3038  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3039  		v0.AddArg(y)
  3040  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3041  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3042  		v2.AuxInt = -16
  3043  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3044  		v3.AddArg(y)
  3045  		v2.AddArg(v3)
  3046  		v1.AddArg(v2)
  3047  		v0.AddArg(v1)
  3048  		v.AddArg(v0)
  3049  		return true
  3050  	}
  3051  }
  3052  func rewriteValuePPC64_OpLsh16x32_0(v *Value) bool {
  3053  	b := v.Block
  3054  	_ = b
  3055  	typ := &b.Func.Config.Types
  3056  	_ = typ
  3057  	// match: (Lsh16x32 x (Const64 [c]))
  3058  	// cond: uint32(c) < 16
  3059  	// result: (SLWconst x [c])
  3060  	for {
  3061  		_ = v.Args[1]
  3062  		x := v.Args[0]
  3063  		v_1 := v.Args[1]
  3064  		if v_1.Op != OpConst64 {
  3065  			break
  3066  		}
  3067  		c := v_1.AuxInt
  3068  		if !(uint32(c) < 16) {
  3069  			break
  3070  		}
  3071  		v.reset(OpPPC64SLWconst)
  3072  		v.AuxInt = c
  3073  		v.AddArg(x)
  3074  		return true
  3075  	}
  3076  	// match: (Lsh16x32 x (MOVDconst [c]))
  3077  	// cond: uint32(c) < 16
  3078  	// result: (SLWconst x [c])
  3079  	for {
  3080  		_ = v.Args[1]
  3081  		x := v.Args[0]
  3082  		v_1 := v.Args[1]
  3083  		if v_1.Op != OpPPC64MOVDconst {
  3084  			break
  3085  		}
  3086  		c := v_1.AuxInt
  3087  		if !(uint32(c) < 16) {
  3088  			break
  3089  		}
  3090  		v.reset(OpPPC64SLWconst)
  3091  		v.AuxInt = c
  3092  		v.AddArg(x)
  3093  		return true
  3094  	}
  3095  	// match: (Lsh16x32 x y)
  3096  	// cond:
  3097  	// result: (SLW  x                 (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
  3098  	for {
  3099  		_ = v.Args[1]
  3100  		x := v.Args[0]
  3101  		y := v.Args[1]
  3102  		v.reset(OpPPC64SLW)
  3103  		v.AddArg(x)
  3104  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3105  		v0.AddArg(y)
  3106  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3107  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3108  		v2.AuxInt = -16
  3109  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3110  		v3.AddArg(y)
  3111  		v2.AddArg(v3)
  3112  		v1.AddArg(v2)
  3113  		v0.AddArg(v1)
  3114  		v.AddArg(v0)
  3115  		return true
  3116  	}
  3117  }
  3118  func rewriteValuePPC64_OpLsh16x64_0(v *Value) bool {
  3119  	b := v.Block
  3120  	_ = b
  3121  	typ := &b.Func.Config.Types
  3122  	_ = typ
  3123  	// match: (Lsh16x64 x (Const64 [c]))
  3124  	// cond: uint64(c) < 16
  3125  	// result: (SLWconst x [c])
  3126  	for {
  3127  		_ = v.Args[1]
  3128  		x := v.Args[0]
  3129  		v_1 := v.Args[1]
  3130  		if v_1.Op != OpConst64 {
  3131  			break
  3132  		}
  3133  		c := v_1.AuxInt
  3134  		if !(uint64(c) < 16) {
  3135  			break
  3136  		}
  3137  		v.reset(OpPPC64SLWconst)
  3138  		v.AuxInt = c
  3139  		v.AddArg(x)
  3140  		return true
  3141  	}
  3142  	// match: (Lsh16x64 _ (Const64 [c]))
  3143  	// cond: uint64(c) >= 16
  3144  	// result: (MOVDconst [0])
  3145  	for {
  3146  		_ = v.Args[1]
  3147  		v_1 := v.Args[1]
  3148  		if v_1.Op != OpConst64 {
  3149  			break
  3150  		}
  3151  		c := v_1.AuxInt
  3152  		if !(uint64(c) >= 16) {
  3153  			break
  3154  		}
  3155  		v.reset(OpPPC64MOVDconst)
  3156  		v.AuxInt = 0
  3157  		return true
  3158  	}
  3159  	// match: (Lsh16x64 x (MOVDconst [c]))
  3160  	// cond: uint64(c) < 16
  3161  	// result: (SLWconst x [c])
  3162  	for {
  3163  		_ = v.Args[1]
  3164  		x := v.Args[0]
  3165  		v_1 := v.Args[1]
  3166  		if v_1.Op != OpPPC64MOVDconst {
  3167  			break
  3168  		}
  3169  		c := v_1.AuxInt
  3170  		if !(uint64(c) < 16) {
  3171  			break
  3172  		}
  3173  		v.reset(OpPPC64SLWconst)
  3174  		v.AuxInt = c
  3175  		v.AddArg(x)
  3176  		return true
  3177  	}
  3178  	// match: (Lsh16x64 x y)
  3179  	// cond:
  3180  	// result: (SLW  x                 (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
  3181  	for {
  3182  		_ = v.Args[1]
  3183  		x := v.Args[0]
  3184  		y := v.Args[1]
  3185  		v.reset(OpPPC64SLW)
  3186  		v.AddArg(x)
  3187  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3188  		v0.AddArg(y)
  3189  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3190  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3191  		v2.AuxInt = -16
  3192  		v2.AddArg(y)
  3193  		v1.AddArg(v2)
  3194  		v0.AddArg(v1)
  3195  		v.AddArg(v0)
  3196  		return true
  3197  	}
  3198  }
  3199  func rewriteValuePPC64_OpLsh16x8_0(v *Value) bool {
  3200  	b := v.Block
  3201  	_ = b
  3202  	typ := &b.Func.Config.Types
  3203  	_ = typ
  3204  	// match: (Lsh16x8 x y)
  3205  	// cond:
  3206  	// result: (SLW  x                 (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
  3207  	for {
  3208  		_ = v.Args[1]
  3209  		x := v.Args[0]
  3210  		y := v.Args[1]
  3211  		v.reset(OpPPC64SLW)
  3212  		v.AddArg(x)
  3213  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3214  		v0.AddArg(y)
  3215  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3216  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3217  		v2.AuxInt = -16
  3218  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3219  		v3.AddArg(y)
  3220  		v2.AddArg(v3)
  3221  		v1.AddArg(v2)
  3222  		v0.AddArg(v1)
  3223  		v.AddArg(v0)
  3224  		return true
  3225  	}
  3226  }
  3227  func rewriteValuePPC64_OpLsh32x16_0(v *Value) bool {
  3228  	b := v.Block
  3229  	_ = b
  3230  	typ := &b.Func.Config.Types
  3231  	_ = typ
  3232  	// match: (Lsh32x16 x y)
  3233  	// cond:
  3234  	// result: (SLW x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
  3235  	for {
  3236  		_ = v.Args[1]
  3237  		x := v.Args[0]
  3238  		y := v.Args[1]
  3239  		v.reset(OpPPC64SLW)
  3240  		v.AddArg(x)
  3241  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3242  		v0.AddArg(y)
  3243  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3244  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3245  		v2.AuxInt = -32
  3246  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3247  		v3.AddArg(y)
  3248  		v2.AddArg(v3)
  3249  		v1.AddArg(v2)
  3250  		v0.AddArg(v1)
  3251  		v.AddArg(v0)
  3252  		return true
  3253  	}
  3254  }
  3255  func rewriteValuePPC64_OpLsh32x32_0(v *Value) bool {
  3256  	b := v.Block
  3257  	_ = b
  3258  	typ := &b.Func.Config.Types
  3259  	_ = typ
  3260  	// match: (Lsh32x32 x (Const64 [c]))
  3261  	// cond: uint32(c) < 32
  3262  	// result: (SLWconst x [c])
  3263  	for {
  3264  		_ = v.Args[1]
  3265  		x := v.Args[0]
  3266  		v_1 := v.Args[1]
  3267  		if v_1.Op != OpConst64 {
  3268  			break
  3269  		}
  3270  		c := v_1.AuxInt
  3271  		if !(uint32(c) < 32) {
  3272  			break
  3273  		}
  3274  		v.reset(OpPPC64SLWconst)
  3275  		v.AuxInt = c
  3276  		v.AddArg(x)
  3277  		return true
  3278  	}
  3279  	// match: (Lsh32x32 x (MOVDconst [c]))
  3280  	// cond: uint32(c) < 32
  3281  	// result: (SLWconst x [c])
  3282  	for {
  3283  		_ = v.Args[1]
  3284  		x := v.Args[0]
  3285  		v_1 := v.Args[1]
  3286  		if v_1.Op != OpPPC64MOVDconst {
  3287  			break
  3288  		}
  3289  		c := v_1.AuxInt
  3290  		if !(uint32(c) < 32) {
  3291  			break
  3292  		}
  3293  		v.reset(OpPPC64SLWconst)
  3294  		v.AuxInt = c
  3295  		v.AddArg(x)
  3296  		return true
  3297  	}
  3298  	// match: (Lsh32x32 x y)
  3299  	// cond:
  3300  	// result: (SLW x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
  3301  	for {
  3302  		_ = v.Args[1]
  3303  		x := v.Args[0]
  3304  		y := v.Args[1]
  3305  		v.reset(OpPPC64SLW)
  3306  		v.AddArg(x)
  3307  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3308  		v0.AddArg(y)
  3309  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3310  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3311  		v2.AuxInt = -32
  3312  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3313  		v3.AddArg(y)
  3314  		v2.AddArg(v3)
  3315  		v1.AddArg(v2)
  3316  		v0.AddArg(v1)
  3317  		v.AddArg(v0)
  3318  		return true
  3319  	}
  3320  }
  3321  func rewriteValuePPC64_OpLsh32x64_0(v *Value) bool {
  3322  	b := v.Block
  3323  	_ = b
  3324  	typ := &b.Func.Config.Types
  3325  	_ = typ
  3326  	// match: (Lsh32x64 x (Const64 [c]))
  3327  	// cond: uint64(c) < 32
  3328  	// result: (SLWconst x [c])
  3329  	for {
  3330  		_ = v.Args[1]
  3331  		x := v.Args[0]
  3332  		v_1 := v.Args[1]
  3333  		if v_1.Op != OpConst64 {
  3334  			break
  3335  		}
  3336  		c := v_1.AuxInt
  3337  		if !(uint64(c) < 32) {
  3338  			break
  3339  		}
  3340  		v.reset(OpPPC64SLWconst)
  3341  		v.AuxInt = c
  3342  		v.AddArg(x)
  3343  		return true
  3344  	}
  3345  	// match: (Lsh32x64 _ (Const64 [c]))
  3346  	// cond: uint64(c) >= 32
  3347  	// result: (MOVDconst [0])
  3348  	for {
  3349  		_ = v.Args[1]
  3350  		v_1 := v.Args[1]
  3351  		if v_1.Op != OpConst64 {
  3352  			break
  3353  		}
  3354  		c := v_1.AuxInt
  3355  		if !(uint64(c) >= 32) {
  3356  			break
  3357  		}
  3358  		v.reset(OpPPC64MOVDconst)
  3359  		v.AuxInt = 0
  3360  		return true
  3361  	}
  3362  	// match: (Lsh32x64 x (MOVDconst [c]))
  3363  	// cond: uint64(c) < 32
  3364  	// result: (SLWconst x [c])
  3365  	for {
  3366  		_ = v.Args[1]
  3367  		x := v.Args[0]
  3368  		v_1 := v.Args[1]
  3369  		if v_1.Op != OpPPC64MOVDconst {
  3370  			break
  3371  		}
  3372  		c := v_1.AuxInt
  3373  		if !(uint64(c) < 32) {
  3374  			break
  3375  		}
  3376  		v.reset(OpPPC64SLWconst)
  3377  		v.AuxInt = c
  3378  		v.AddArg(x)
  3379  		return true
  3380  	}
  3381  	// match: (Lsh32x64 x (AND y (MOVDconst [31])))
  3382  	// cond:
  3383  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3384  	for {
  3385  		_ = v.Args[1]
  3386  		x := v.Args[0]
  3387  		v_1 := v.Args[1]
  3388  		if v_1.Op != OpPPC64AND {
  3389  			break
  3390  		}
  3391  		_ = v_1.Args[1]
  3392  		y := v_1.Args[0]
  3393  		v_1_1 := v_1.Args[1]
  3394  		if v_1_1.Op != OpPPC64MOVDconst {
  3395  			break
  3396  		}
  3397  		if v_1_1.AuxInt != 31 {
  3398  			break
  3399  		}
  3400  		v.reset(OpPPC64SLW)
  3401  		v.AddArg(x)
  3402  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3403  		v0.AuxInt = 31
  3404  		v0.AddArg(y)
  3405  		v.AddArg(v0)
  3406  		return true
  3407  	}
  3408  	// match: (Lsh32x64 x (AND (MOVDconst [31]) y))
  3409  	// cond:
  3410  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3411  	for {
  3412  		_ = v.Args[1]
  3413  		x := v.Args[0]
  3414  		v_1 := v.Args[1]
  3415  		if v_1.Op != OpPPC64AND {
  3416  			break
  3417  		}
  3418  		_ = v_1.Args[1]
  3419  		v_1_0 := v_1.Args[0]
  3420  		if v_1_0.Op != OpPPC64MOVDconst {
  3421  			break
  3422  		}
  3423  		if v_1_0.AuxInt != 31 {
  3424  			break
  3425  		}
  3426  		y := v_1.Args[1]
  3427  		v.reset(OpPPC64SLW)
  3428  		v.AddArg(x)
  3429  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3430  		v0.AuxInt = 31
  3431  		v0.AddArg(y)
  3432  		v.AddArg(v0)
  3433  		return true
  3434  	}
  3435  	// match: (Lsh32x64 x (ANDconst <typ.Int32> [31] y))
  3436  	// cond:
  3437  	// result: (SLW x (ANDconst <typ.Int32> [31] y))
  3438  	for {
  3439  		_ = v.Args[1]
  3440  		x := v.Args[0]
  3441  		v_1 := v.Args[1]
  3442  		if v_1.Op != OpPPC64ANDconst {
  3443  			break
  3444  		}
  3445  		if v_1.Type != typ.Int32 {
  3446  			break
  3447  		}
  3448  		if v_1.AuxInt != 31 {
  3449  			break
  3450  		}
  3451  		y := v_1.Args[0]
  3452  		v.reset(OpPPC64SLW)
  3453  		v.AddArg(x)
  3454  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
  3455  		v0.AuxInt = 31
  3456  		v0.AddArg(y)
  3457  		v.AddArg(v0)
  3458  		return true
  3459  	}
  3460  	// match: (Lsh32x64 x y)
  3461  	// cond:
  3462  	// result: (SLW  x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
  3463  	for {
  3464  		_ = v.Args[1]
  3465  		x := v.Args[0]
  3466  		y := v.Args[1]
  3467  		v.reset(OpPPC64SLW)
  3468  		v.AddArg(x)
  3469  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3470  		v0.AddArg(y)
  3471  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3472  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3473  		v2.AuxInt = -32
  3474  		v2.AddArg(y)
  3475  		v1.AddArg(v2)
  3476  		v0.AddArg(v1)
  3477  		v.AddArg(v0)
  3478  		return true
  3479  	}
  3480  }
  3481  func rewriteValuePPC64_OpLsh32x8_0(v *Value) bool {
  3482  	b := v.Block
  3483  	_ = b
  3484  	typ := &b.Func.Config.Types
  3485  	_ = typ
  3486  	// match: (Lsh32x8 x y)
  3487  	// cond:
  3488  	// result: (SLW x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
  3489  	for {
  3490  		_ = v.Args[1]
  3491  		x := v.Args[0]
  3492  		y := v.Args[1]
  3493  		v.reset(OpPPC64SLW)
  3494  		v.AddArg(x)
  3495  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3496  		v0.AddArg(y)
  3497  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3498  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3499  		v2.AuxInt = -32
  3500  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3501  		v3.AddArg(y)
  3502  		v2.AddArg(v3)
  3503  		v1.AddArg(v2)
  3504  		v0.AddArg(v1)
  3505  		v.AddArg(v0)
  3506  		return true
  3507  	}
  3508  }
  3509  func rewriteValuePPC64_OpLsh64x16_0(v *Value) bool {
  3510  	b := v.Block
  3511  	_ = b
  3512  	typ := &b.Func.Config.Types
  3513  	_ = typ
  3514  	// match: (Lsh64x16 x y)
  3515  	// cond:
  3516  	// result: (SLD x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
  3517  	for {
  3518  		_ = v.Args[1]
  3519  		x := v.Args[0]
  3520  		y := v.Args[1]
  3521  		v.reset(OpPPC64SLD)
  3522  		v.AddArg(x)
  3523  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3524  		v0.AddArg(y)
  3525  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3526  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3527  		v2.AuxInt = -64
  3528  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3529  		v3.AddArg(y)
  3530  		v2.AddArg(v3)
  3531  		v1.AddArg(v2)
  3532  		v0.AddArg(v1)
  3533  		v.AddArg(v0)
  3534  		return true
  3535  	}
  3536  }
  3537  func rewriteValuePPC64_OpLsh64x32_0(v *Value) bool {
  3538  	b := v.Block
  3539  	_ = b
  3540  	typ := &b.Func.Config.Types
  3541  	_ = typ
  3542  	// match: (Lsh64x32 x (Const64 [c]))
  3543  	// cond: uint32(c) < 64
  3544  	// result: (SLDconst x [c])
  3545  	for {
  3546  		_ = v.Args[1]
  3547  		x := v.Args[0]
  3548  		v_1 := v.Args[1]
  3549  		if v_1.Op != OpConst64 {
  3550  			break
  3551  		}
  3552  		c := v_1.AuxInt
  3553  		if !(uint32(c) < 64) {
  3554  			break
  3555  		}
  3556  		v.reset(OpPPC64SLDconst)
  3557  		v.AuxInt = c
  3558  		v.AddArg(x)
  3559  		return true
  3560  	}
  3561  	// match: (Lsh64x32 x (MOVDconst [c]))
  3562  	// cond: uint32(c) < 64
  3563  	// result: (SLDconst x [c])
  3564  	for {
  3565  		_ = v.Args[1]
  3566  		x := v.Args[0]
  3567  		v_1 := v.Args[1]
  3568  		if v_1.Op != OpPPC64MOVDconst {
  3569  			break
  3570  		}
  3571  		c := v_1.AuxInt
  3572  		if !(uint32(c) < 64) {
  3573  			break
  3574  		}
  3575  		v.reset(OpPPC64SLDconst)
  3576  		v.AuxInt = c
  3577  		v.AddArg(x)
  3578  		return true
  3579  	}
  3580  	// match: (Lsh64x32 x y)
  3581  	// cond:
  3582  	// result: (SLD x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
  3583  	for {
  3584  		_ = v.Args[1]
  3585  		x := v.Args[0]
  3586  		y := v.Args[1]
  3587  		v.reset(OpPPC64SLD)
  3588  		v.AddArg(x)
  3589  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3590  		v0.AddArg(y)
  3591  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3592  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3593  		v2.AuxInt = -64
  3594  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3595  		v3.AddArg(y)
  3596  		v2.AddArg(v3)
  3597  		v1.AddArg(v2)
  3598  		v0.AddArg(v1)
  3599  		v.AddArg(v0)
  3600  		return true
  3601  	}
  3602  }
  3603  func rewriteValuePPC64_OpLsh64x64_0(v *Value) bool {
  3604  	b := v.Block
  3605  	_ = b
  3606  	typ := &b.Func.Config.Types
  3607  	_ = typ
  3608  	// match: (Lsh64x64 x (Const64 [c]))
  3609  	// cond: uint64(c) < 64
  3610  	// result: (SLDconst x [c])
  3611  	for {
  3612  		_ = v.Args[1]
  3613  		x := v.Args[0]
  3614  		v_1 := v.Args[1]
  3615  		if v_1.Op != OpConst64 {
  3616  			break
  3617  		}
  3618  		c := v_1.AuxInt
  3619  		if !(uint64(c) < 64) {
  3620  			break
  3621  		}
  3622  		v.reset(OpPPC64SLDconst)
  3623  		v.AuxInt = c
  3624  		v.AddArg(x)
  3625  		return true
  3626  	}
  3627  	// match: (Lsh64x64 _ (Const64 [c]))
  3628  	// cond: uint64(c) >= 64
  3629  	// result: (MOVDconst [0])
  3630  	for {
  3631  		_ = v.Args[1]
  3632  		v_1 := v.Args[1]
  3633  		if v_1.Op != OpConst64 {
  3634  			break
  3635  		}
  3636  		c := v_1.AuxInt
  3637  		if !(uint64(c) >= 64) {
  3638  			break
  3639  		}
  3640  		v.reset(OpPPC64MOVDconst)
  3641  		v.AuxInt = 0
  3642  		return true
  3643  	}
  3644  	// match: (Lsh64x64 x (MOVDconst [c]))
  3645  	// cond: uint64(c) < 64
  3646  	// result: (SLDconst x [c])
  3647  	for {
  3648  		_ = v.Args[1]
  3649  		x := v.Args[0]
  3650  		v_1 := v.Args[1]
  3651  		if v_1.Op != OpPPC64MOVDconst {
  3652  			break
  3653  		}
  3654  		c := v_1.AuxInt
  3655  		if !(uint64(c) < 64) {
  3656  			break
  3657  		}
  3658  		v.reset(OpPPC64SLDconst)
  3659  		v.AuxInt = c
  3660  		v.AddArg(x)
  3661  		return true
  3662  	}
  3663  	// match: (Lsh64x64 x (AND y (MOVDconst [63])))
  3664  	// cond:
  3665  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  3666  	for {
  3667  		_ = v.Args[1]
  3668  		x := v.Args[0]
  3669  		v_1 := v.Args[1]
  3670  		if v_1.Op != OpPPC64AND {
  3671  			break
  3672  		}
  3673  		_ = v_1.Args[1]
  3674  		y := v_1.Args[0]
  3675  		v_1_1 := v_1.Args[1]
  3676  		if v_1_1.Op != OpPPC64MOVDconst {
  3677  			break
  3678  		}
  3679  		if v_1_1.AuxInt != 63 {
  3680  			break
  3681  		}
  3682  		v.reset(OpPPC64SLD)
  3683  		v.AddArg(x)
  3684  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  3685  		v0.AuxInt = 63
  3686  		v0.AddArg(y)
  3687  		v.AddArg(v0)
  3688  		return true
  3689  	}
  3690  	// match: (Lsh64x64 x (AND (MOVDconst [63]) y))
  3691  	// cond:
  3692  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  3693  	for {
  3694  		_ = v.Args[1]
  3695  		x := v.Args[0]
  3696  		v_1 := v.Args[1]
  3697  		if v_1.Op != OpPPC64AND {
  3698  			break
  3699  		}
  3700  		_ = v_1.Args[1]
  3701  		v_1_0 := v_1.Args[0]
  3702  		if v_1_0.Op != OpPPC64MOVDconst {
  3703  			break
  3704  		}
  3705  		if v_1_0.AuxInt != 63 {
  3706  			break
  3707  		}
  3708  		y := v_1.Args[1]
  3709  		v.reset(OpPPC64SLD)
  3710  		v.AddArg(x)
  3711  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  3712  		v0.AuxInt = 63
  3713  		v0.AddArg(y)
  3714  		v.AddArg(v0)
  3715  		return true
  3716  	}
  3717  	// match: (Lsh64x64 x (ANDconst <typ.Int64> [63] y))
  3718  	// cond:
  3719  	// result: (SLD x (ANDconst <typ.Int64> [63] y))
  3720  	for {
  3721  		_ = v.Args[1]
  3722  		x := v.Args[0]
  3723  		v_1 := v.Args[1]
  3724  		if v_1.Op != OpPPC64ANDconst {
  3725  			break
  3726  		}
  3727  		if v_1.Type != typ.Int64 {
  3728  			break
  3729  		}
  3730  		if v_1.AuxInt != 63 {
  3731  			break
  3732  		}
  3733  		y := v_1.Args[0]
  3734  		v.reset(OpPPC64SLD)
  3735  		v.AddArg(x)
  3736  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
  3737  		v0.AuxInt = 63
  3738  		v0.AddArg(y)
  3739  		v.AddArg(v0)
  3740  		return true
  3741  	}
  3742  	// match: (Lsh64x64 x y)
  3743  	// cond:
  3744  	// result: (SLD  x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
  3745  	for {
  3746  		_ = v.Args[1]
  3747  		x := v.Args[0]
  3748  		y := v.Args[1]
  3749  		v.reset(OpPPC64SLD)
  3750  		v.AddArg(x)
  3751  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3752  		v0.AddArg(y)
  3753  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3754  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3755  		v2.AuxInt = -64
  3756  		v2.AddArg(y)
  3757  		v1.AddArg(v2)
  3758  		v0.AddArg(v1)
  3759  		v.AddArg(v0)
  3760  		return true
  3761  	}
  3762  }
  3763  func rewriteValuePPC64_OpLsh64x8_0(v *Value) bool {
  3764  	b := v.Block
  3765  	_ = b
  3766  	typ := &b.Func.Config.Types
  3767  	_ = typ
  3768  	// match: (Lsh64x8 x y)
  3769  	// cond:
  3770  	// result: (SLD x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
  3771  	for {
  3772  		_ = v.Args[1]
  3773  		x := v.Args[0]
  3774  		y := v.Args[1]
  3775  		v.reset(OpPPC64SLD)
  3776  		v.AddArg(x)
  3777  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3778  		v0.AddArg(y)
  3779  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3780  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3781  		v2.AuxInt = -64
  3782  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3783  		v3.AddArg(y)
  3784  		v2.AddArg(v3)
  3785  		v1.AddArg(v2)
  3786  		v0.AddArg(v1)
  3787  		v.AddArg(v0)
  3788  		return true
  3789  	}
  3790  }
  3791  func rewriteValuePPC64_OpLsh8x16_0(v *Value) bool {
  3792  	b := v.Block
  3793  	_ = b
  3794  	typ := &b.Func.Config.Types
  3795  	_ = typ
  3796  	// match: (Lsh8x16 x y)
  3797  	// cond:
  3798  	// result: (SLW  x                (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
  3799  	for {
  3800  		_ = v.Args[1]
  3801  		x := v.Args[0]
  3802  		y := v.Args[1]
  3803  		v.reset(OpPPC64SLW)
  3804  		v.AddArg(x)
  3805  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3806  		v0.AddArg(y)
  3807  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3808  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3809  		v2.AuxInt = -8
  3810  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
  3811  		v3.AddArg(y)
  3812  		v2.AddArg(v3)
  3813  		v1.AddArg(v2)
  3814  		v0.AddArg(v1)
  3815  		v.AddArg(v0)
  3816  		return true
  3817  	}
  3818  }
  3819  func rewriteValuePPC64_OpLsh8x32_0(v *Value) bool {
  3820  	b := v.Block
  3821  	_ = b
  3822  	typ := &b.Func.Config.Types
  3823  	_ = typ
  3824  	// match: (Lsh8x32 x (Const64 [c]))
  3825  	// cond: uint32(c) < 8
  3826  	// result: (SLWconst x [c])
  3827  	for {
  3828  		_ = v.Args[1]
  3829  		x := v.Args[0]
  3830  		v_1 := v.Args[1]
  3831  		if v_1.Op != OpConst64 {
  3832  			break
  3833  		}
  3834  		c := v_1.AuxInt
  3835  		if !(uint32(c) < 8) {
  3836  			break
  3837  		}
  3838  		v.reset(OpPPC64SLWconst)
  3839  		v.AuxInt = c
  3840  		v.AddArg(x)
  3841  		return true
  3842  	}
  3843  	// match: (Lsh8x32 x (MOVDconst [c]))
  3844  	// cond: uint32(c) < 8
  3845  	// result: (SLWconst x [c])
  3846  	for {
  3847  		_ = v.Args[1]
  3848  		x := v.Args[0]
  3849  		v_1 := v.Args[1]
  3850  		if v_1.Op != OpPPC64MOVDconst {
  3851  			break
  3852  		}
  3853  		c := v_1.AuxInt
  3854  		if !(uint32(c) < 8) {
  3855  			break
  3856  		}
  3857  		v.reset(OpPPC64SLWconst)
  3858  		v.AuxInt = c
  3859  		v.AddArg(x)
  3860  		return true
  3861  	}
  3862  	// match: (Lsh8x32 x y)
  3863  	// cond:
  3864  	// result: (SLW  x                (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
  3865  	for {
  3866  		_ = v.Args[1]
  3867  		x := v.Args[0]
  3868  		y := v.Args[1]
  3869  		v.reset(OpPPC64SLW)
  3870  		v.AddArg(x)
  3871  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3872  		v0.AddArg(y)
  3873  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3874  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3875  		v2.AuxInt = -8
  3876  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
  3877  		v3.AddArg(y)
  3878  		v2.AddArg(v3)
  3879  		v1.AddArg(v2)
  3880  		v0.AddArg(v1)
  3881  		v.AddArg(v0)
  3882  		return true
  3883  	}
  3884  }
  3885  func rewriteValuePPC64_OpLsh8x64_0(v *Value) bool {
  3886  	b := v.Block
  3887  	_ = b
  3888  	typ := &b.Func.Config.Types
  3889  	_ = typ
  3890  	// match: (Lsh8x64 x (Const64 [c]))
  3891  	// cond: uint64(c) < 8
  3892  	// result: (SLWconst x [c])
  3893  	for {
  3894  		_ = v.Args[1]
  3895  		x := v.Args[0]
  3896  		v_1 := v.Args[1]
  3897  		if v_1.Op != OpConst64 {
  3898  			break
  3899  		}
  3900  		c := v_1.AuxInt
  3901  		if !(uint64(c) < 8) {
  3902  			break
  3903  		}
  3904  		v.reset(OpPPC64SLWconst)
  3905  		v.AuxInt = c
  3906  		v.AddArg(x)
  3907  		return true
  3908  	}
  3909  	// match: (Lsh8x64 _ (Const64 [c]))
  3910  	// cond: uint64(c) >= 8
  3911  	// result: (MOVDconst [0])
  3912  	for {
  3913  		_ = v.Args[1]
  3914  		v_1 := v.Args[1]
  3915  		if v_1.Op != OpConst64 {
  3916  			break
  3917  		}
  3918  		c := v_1.AuxInt
  3919  		if !(uint64(c) >= 8) {
  3920  			break
  3921  		}
  3922  		v.reset(OpPPC64MOVDconst)
  3923  		v.AuxInt = 0
  3924  		return true
  3925  	}
  3926  	// match: (Lsh8x64 x (MOVDconst [c]))
  3927  	// cond: uint64(c) < 8
  3928  	// result: (SLWconst x [c])
  3929  	for {
  3930  		_ = v.Args[1]
  3931  		x := v.Args[0]
  3932  		v_1 := v.Args[1]
  3933  		if v_1.Op != OpPPC64MOVDconst {
  3934  			break
  3935  		}
  3936  		c := v_1.AuxInt
  3937  		if !(uint64(c) < 8) {
  3938  			break
  3939  		}
  3940  		v.reset(OpPPC64SLWconst)
  3941  		v.AuxInt = c
  3942  		v.AddArg(x)
  3943  		return true
  3944  	}
  3945  	// match: (Lsh8x64 x y)
  3946  	// cond:
  3947  	// result: (SLW  x                (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
  3948  	for {
  3949  		_ = v.Args[1]
  3950  		x := v.Args[0]
  3951  		y := v.Args[1]
  3952  		v.reset(OpPPC64SLW)
  3953  		v.AddArg(x)
  3954  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3955  		v0.AddArg(y)
  3956  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3957  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3958  		v2.AuxInt = -8
  3959  		v2.AddArg(y)
  3960  		v1.AddArg(v2)
  3961  		v0.AddArg(v1)
  3962  		v.AddArg(v0)
  3963  		return true
  3964  	}
  3965  }
  3966  func rewriteValuePPC64_OpLsh8x8_0(v *Value) bool {
  3967  	b := v.Block
  3968  	_ = b
  3969  	typ := &b.Func.Config.Types
  3970  	_ = typ
  3971  	// match: (Lsh8x8 x y)
  3972  	// cond:
  3973  	// result: (SLW  x                (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
  3974  	for {
  3975  		_ = v.Args[1]
  3976  		x := v.Args[0]
  3977  		y := v.Args[1]
  3978  		v.reset(OpPPC64SLW)
  3979  		v.AddArg(x)
  3980  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
  3981  		v0.AddArg(y)
  3982  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
  3983  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
  3984  		v2.AuxInt = -8
  3985  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
  3986  		v3.AddArg(y)
  3987  		v2.AddArg(v3)
  3988  		v1.AddArg(v2)
  3989  		v0.AddArg(v1)
  3990  		v.AddArg(v0)
  3991  		return true
  3992  	}
  3993  }
  3994  func rewriteValuePPC64_OpMod16_0(v *Value) bool {
  3995  	b := v.Block
  3996  	_ = b
  3997  	typ := &b.Func.Config.Types
  3998  	_ = typ
  3999  	// match: (Mod16 x y)
  4000  	// cond:
  4001  	// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
  4002  	for {
  4003  		_ = v.Args[1]
  4004  		x := v.Args[0]
  4005  		y := v.Args[1]
  4006  		v.reset(OpMod32)
  4007  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4008  		v0.AddArg(x)
  4009  		v.AddArg(v0)
  4010  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4011  		v1.AddArg(y)
  4012  		v.AddArg(v1)
  4013  		return true
  4014  	}
  4015  }
  4016  func rewriteValuePPC64_OpMod16u_0(v *Value) bool {
  4017  	b := v.Block
  4018  	_ = b
  4019  	typ := &b.Func.Config.Types
  4020  	_ = typ
  4021  	// match: (Mod16u x y)
  4022  	// cond:
  4023  	// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
  4024  	for {
  4025  		_ = v.Args[1]
  4026  		x := v.Args[0]
  4027  		y := v.Args[1]
  4028  		v.reset(OpMod32u)
  4029  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4030  		v0.AddArg(x)
  4031  		v.AddArg(v0)
  4032  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4033  		v1.AddArg(y)
  4034  		v.AddArg(v1)
  4035  		return true
  4036  	}
  4037  }
  4038  func rewriteValuePPC64_OpMod32_0(v *Value) bool {
  4039  	b := v.Block
  4040  	_ = b
  4041  	typ := &b.Func.Config.Types
  4042  	_ = typ
  4043  	// match: (Mod32 x y)
  4044  	// cond:
  4045  	// result: (SUB x (MULLW y (DIVW x y)))
  4046  	for {
  4047  		_ = v.Args[1]
  4048  		x := v.Args[0]
  4049  		y := v.Args[1]
  4050  		v.reset(OpPPC64SUB)
  4051  		v.AddArg(x)
  4052  		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4053  		v0.AddArg(y)
  4054  		v1 := b.NewValue0(v.Pos, OpPPC64DIVW, typ.Int32)
  4055  		v1.AddArg(x)
  4056  		v1.AddArg(y)
  4057  		v0.AddArg(v1)
  4058  		v.AddArg(v0)
  4059  		return true
  4060  	}
  4061  }
  4062  func rewriteValuePPC64_OpMod32u_0(v *Value) bool {
  4063  	b := v.Block
  4064  	_ = b
  4065  	typ := &b.Func.Config.Types
  4066  	_ = typ
  4067  	// match: (Mod32u x y)
  4068  	// cond:
  4069  	// result: (SUB x (MULLW y (DIVWU x y)))
  4070  	for {
  4071  		_ = v.Args[1]
  4072  		x := v.Args[0]
  4073  		y := v.Args[1]
  4074  		v.reset(OpPPC64SUB)
  4075  		v.AddArg(x)
  4076  		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
  4077  		v0.AddArg(y)
  4078  		v1 := b.NewValue0(v.Pos, OpPPC64DIVWU, typ.Int32)
  4079  		v1.AddArg(x)
  4080  		v1.AddArg(y)
  4081  		v0.AddArg(v1)
  4082  		v.AddArg(v0)
  4083  		return true
  4084  	}
  4085  }
  4086  func rewriteValuePPC64_OpMod64_0(v *Value) bool {
  4087  	b := v.Block
  4088  	_ = b
  4089  	typ := &b.Func.Config.Types
  4090  	_ = typ
  4091  	// match: (Mod64 x y)
  4092  	// cond:
  4093  	// result: (SUB x (MULLD y (DIVD x y)))
  4094  	for {
  4095  		_ = v.Args[1]
  4096  		x := v.Args[0]
  4097  		y := v.Args[1]
  4098  		v.reset(OpPPC64SUB)
  4099  		v.AddArg(x)
  4100  		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4101  		v0.AddArg(y)
  4102  		v1 := b.NewValue0(v.Pos, OpPPC64DIVD, typ.Int64)
  4103  		v1.AddArg(x)
  4104  		v1.AddArg(y)
  4105  		v0.AddArg(v1)
  4106  		v.AddArg(v0)
  4107  		return true
  4108  	}
  4109  }
  4110  func rewriteValuePPC64_OpMod64u_0(v *Value) bool {
  4111  	b := v.Block
  4112  	_ = b
  4113  	typ := &b.Func.Config.Types
  4114  	_ = typ
  4115  	// match: (Mod64u x y)
  4116  	// cond:
  4117  	// result: (SUB x (MULLD y (DIVDU x y)))
  4118  	for {
  4119  		_ = v.Args[1]
  4120  		x := v.Args[0]
  4121  		y := v.Args[1]
  4122  		v.reset(OpPPC64SUB)
  4123  		v.AddArg(x)
  4124  		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
  4125  		v0.AddArg(y)
  4126  		v1 := b.NewValue0(v.Pos, OpPPC64DIVDU, typ.Int64)
  4127  		v1.AddArg(x)
  4128  		v1.AddArg(y)
  4129  		v0.AddArg(v1)
  4130  		v.AddArg(v0)
  4131  		return true
  4132  	}
  4133  }
  4134  func rewriteValuePPC64_OpMod8_0(v *Value) bool {
  4135  	b := v.Block
  4136  	_ = b
  4137  	typ := &b.Func.Config.Types
  4138  	_ = typ
  4139  	// match: (Mod8 x y)
  4140  	// cond:
  4141  	// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
  4142  	for {
  4143  		_ = v.Args[1]
  4144  		x := v.Args[0]
  4145  		y := v.Args[1]
  4146  		v.reset(OpMod32)
  4147  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4148  		v0.AddArg(x)
  4149  		v.AddArg(v0)
  4150  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4151  		v1.AddArg(y)
  4152  		v.AddArg(v1)
  4153  		return true
  4154  	}
  4155  }
  4156  func rewriteValuePPC64_OpMod8u_0(v *Value) bool {
  4157  	b := v.Block
  4158  	_ = b
  4159  	typ := &b.Func.Config.Types
  4160  	_ = typ
  4161  	// match: (Mod8u x y)
  4162  	// cond:
  4163  	// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
  4164  	for {
  4165  		_ = v.Args[1]
  4166  		x := v.Args[0]
  4167  		y := v.Args[1]
  4168  		v.reset(OpMod32u)
  4169  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4170  		v0.AddArg(x)
  4171  		v.AddArg(v0)
  4172  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4173  		v1.AddArg(y)
  4174  		v.AddArg(v1)
  4175  		return true
  4176  	}
  4177  }
  4178  func rewriteValuePPC64_OpMove_0(v *Value) bool {
  4179  	b := v.Block
  4180  	_ = b
  4181  	typ := &b.Func.Config.Types
  4182  	_ = typ
  4183  	// match: (Move [0] _ _ mem)
  4184  	// cond:
  4185  	// result: mem
  4186  	for {
  4187  		if v.AuxInt != 0 {
  4188  			break
  4189  		}
  4190  		_ = v.Args[2]
  4191  		mem := v.Args[2]
  4192  		v.reset(OpCopy)
  4193  		v.Type = mem.Type
  4194  		v.AddArg(mem)
  4195  		return true
  4196  	}
  4197  	// match: (Move [1] dst src mem)
  4198  	// cond:
  4199  	// result: (MOVBstore dst (MOVBZload src mem) mem)
  4200  	for {
  4201  		if v.AuxInt != 1 {
  4202  			break
  4203  		}
  4204  		_ = v.Args[2]
  4205  		dst := v.Args[0]
  4206  		src := v.Args[1]
  4207  		mem := v.Args[2]
  4208  		v.reset(OpPPC64MOVBstore)
  4209  		v.AddArg(dst)
  4210  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4211  		v0.AddArg(src)
  4212  		v0.AddArg(mem)
  4213  		v.AddArg(v0)
  4214  		v.AddArg(mem)
  4215  		return true
  4216  	}
  4217  	// match: (Move [2] dst src mem)
  4218  	// cond:
  4219  	// result: (MOVHstore dst (MOVHZload src mem) mem)
  4220  	for {
  4221  		if v.AuxInt != 2 {
  4222  			break
  4223  		}
  4224  		_ = v.Args[2]
  4225  		dst := v.Args[0]
  4226  		src := v.Args[1]
  4227  		mem := v.Args[2]
  4228  		v.reset(OpPPC64MOVHstore)
  4229  		v.AddArg(dst)
  4230  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4231  		v0.AddArg(src)
  4232  		v0.AddArg(mem)
  4233  		v.AddArg(v0)
  4234  		v.AddArg(mem)
  4235  		return true
  4236  	}
  4237  	// match: (Move [4] dst src mem)
  4238  	// cond:
  4239  	// result: (MOVWstore dst (MOVWZload src mem) mem)
  4240  	for {
  4241  		if v.AuxInt != 4 {
  4242  			break
  4243  		}
  4244  		_ = v.Args[2]
  4245  		dst := v.Args[0]
  4246  		src := v.Args[1]
  4247  		mem := v.Args[2]
  4248  		v.reset(OpPPC64MOVWstore)
  4249  		v.AddArg(dst)
  4250  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4251  		v0.AddArg(src)
  4252  		v0.AddArg(mem)
  4253  		v.AddArg(v0)
  4254  		v.AddArg(mem)
  4255  		return true
  4256  	}
  4257  	// match: (Move [8] {t} dst src mem)
  4258  	// cond: t.(*types.Type).Alignment()%4 == 0
  4259  	// result: (MOVDstore dst (MOVDload src mem) mem)
  4260  	for {
  4261  		if v.AuxInt != 8 {
  4262  			break
  4263  		}
  4264  		t := v.Aux
  4265  		_ = v.Args[2]
  4266  		dst := v.Args[0]
  4267  		src := v.Args[1]
  4268  		mem := v.Args[2]
  4269  		if !(t.(*types.Type).Alignment()%4 == 0) {
  4270  			break
  4271  		}
  4272  		v.reset(OpPPC64MOVDstore)
  4273  		v.AddArg(dst)
  4274  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
  4275  		v0.AddArg(src)
  4276  		v0.AddArg(mem)
  4277  		v.AddArg(v0)
  4278  		v.AddArg(mem)
  4279  		return true
  4280  	}
  4281  	// match: (Move [8] dst src mem)
  4282  	// cond:
  4283  	// result: (MOVWstore [4] dst (MOVWZload [4] src mem) 		(MOVWstore dst (MOVWZload src mem) mem))
  4284  	for {
  4285  		if v.AuxInt != 8 {
  4286  			break
  4287  		}
  4288  		_ = v.Args[2]
  4289  		dst := v.Args[0]
  4290  		src := v.Args[1]
  4291  		mem := v.Args[2]
  4292  		v.reset(OpPPC64MOVWstore)
  4293  		v.AuxInt = 4
  4294  		v.AddArg(dst)
  4295  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4296  		v0.AuxInt = 4
  4297  		v0.AddArg(src)
  4298  		v0.AddArg(mem)
  4299  		v.AddArg(v0)
  4300  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4301  		v1.AddArg(dst)
  4302  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4303  		v2.AddArg(src)
  4304  		v2.AddArg(mem)
  4305  		v1.AddArg(v2)
  4306  		v1.AddArg(mem)
  4307  		v.AddArg(v1)
  4308  		return true
  4309  	}
  4310  	// match: (Move [3] dst src mem)
  4311  	// cond:
  4312  	// result: (MOVBstore [2] dst (MOVBZload [2] src mem)                 (MOVHstore dst (MOVHload src mem) mem))
  4313  	for {
  4314  		if v.AuxInt != 3 {
  4315  			break
  4316  		}
  4317  		_ = v.Args[2]
  4318  		dst := v.Args[0]
  4319  		src := v.Args[1]
  4320  		mem := v.Args[2]
  4321  		v.reset(OpPPC64MOVBstore)
  4322  		v.AuxInt = 2
  4323  		v.AddArg(dst)
  4324  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4325  		v0.AuxInt = 2
  4326  		v0.AddArg(src)
  4327  		v0.AddArg(mem)
  4328  		v.AddArg(v0)
  4329  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4330  		v1.AddArg(dst)
  4331  		v2 := b.NewValue0(v.Pos, OpPPC64MOVHload, typ.Int16)
  4332  		v2.AddArg(src)
  4333  		v2.AddArg(mem)
  4334  		v1.AddArg(v2)
  4335  		v1.AddArg(mem)
  4336  		v.AddArg(v1)
  4337  		return true
  4338  	}
  4339  	// match: (Move [5] dst src mem)
  4340  	// cond:
  4341  	// result: (MOVBstore [4] dst (MOVBZload [4] src mem)                 (MOVWstore dst (MOVWZload src mem) mem))
  4342  	for {
  4343  		if v.AuxInt != 5 {
  4344  			break
  4345  		}
  4346  		_ = v.Args[2]
  4347  		dst := v.Args[0]
  4348  		src := v.Args[1]
  4349  		mem := v.Args[2]
  4350  		v.reset(OpPPC64MOVBstore)
  4351  		v.AuxInt = 4
  4352  		v.AddArg(dst)
  4353  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4354  		v0.AuxInt = 4
  4355  		v0.AddArg(src)
  4356  		v0.AddArg(mem)
  4357  		v.AddArg(v0)
  4358  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4359  		v1.AddArg(dst)
  4360  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4361  		v2.AddArg(src)
  4362  		v2.AddArg(mem)
  4363  		v1.AddArg(v2)
  4364  		v1.AddArg(mem)
  4365  		v.AddArg(v1)
  4366  		return true
  4367  	}
  4368  	// match: (Move [6] dst src mem)
  4369  	// cond:
  4370  	// result: (MOVHstore [4] dst (MOVHZload [4] src mem)                 (MOVWstore dst (MOVWZload src mem) mem))
  4371  	for {
  4372  		if v.AuxInt != 6 {
  4373  			break
  4374  		}
  4375  		_ = v.Args[2]
  4376  		dst := v.Args[0]
  4377  		src := v.Args[1]
  4378  		mem := v.Args[2]
  4379  		v.reset(OpPPC64MOVHstore)
  4380  		v.AuxInt = 4
  4381  		v.AddArg(dst)
  4382  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4383  		v0.AuxInt = 4
  4384  		v0.AddArg(src)
  4385  		v0.AddArg(mem)
  4386  		v.AddArg(v0)
  4387  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4388  		v1.AddArg(dst)
  4389  		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4390  		v2.AddArg(src)
  4391  		v2.AddArg(mem)
  4392  		v1.AddArg(v2)
  4393  		v1.AddArg(mem)
  4394  		v.AddArg(v1)
  4395  		return true
  4396  	}
  4397  	// match: (Move [7] dst src mem)
  4398  	// cond:
  4399  	// result: (MOVBstore [6] dst (MOVBZload [6] src mem)                 (MOVHstore [4] dst (MOVHZload [4] src mem)                         (MOVWstore dst (MOVWZload src mem) mem)))
  4400  	for {
  4401  		if v.AuxInt != 7 {
  4402  			break
  4403  		}
  4404  		_ = v.Args[2]
  4405  		dst := v.Args[0]
  4406  		src := v.Args[1]
  4407  		mem := v.Args[2]
  4408  		v.reset(OpPPC64MOVBstore)
  4409  		v.AuxInt = 6
  4410  		v.AddArg(dst)
  4411  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
  4412  		v0.AuxInt = 6
  4413  		v0.AddArg(src)
  4414  		v0.AddArg(mem)
  4415  		v.AddArg(v0)
  4416  		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
  4417  		v1.AuxInt = 4
  4418  		v1.AddArg(dst)
  4419  		v2 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
  4420  		v2.AuxInt = 4
  4421  		v2.AddArg(src)
  4422  		v2.AddArg(mem)
  4423  		v1.AddArg(v2)
  4424  		v3 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
  4425  		v3.AddArg(dst)
  4426  		v4 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
  4427  		v4.AddArg(src)
  4428  		v4.AddArg(mem)
  4429  		v3.AddArg(v4)
  4430  		v3.AddArg(mem)
  4431  		v1.AddArg(v3)
  4432  		v.AddArg(v1)
  4433  		return true
  4434  	}
  4435  	return false
  4436  }
  4437  func rewriteValuePPC64_OpMove_10(v *Value) bool {
  4438  	// match: (Move [s] dst src mem)
  4439  	// cond: s > 8
  4440  	// result: (LoweredMove [s] dst src mem)
  4441  	for {
  4442  		s := v.AuxInt
  4443  		_ = v.Args[2]
  4444  		dst := v.Args[0]
  4445  		src := v.Args[1]
  4446  		mem := v.Args[2]
  4447  		if !(s > 8) {
  4448  			break
  4449  		}
  4450  		v.reset(OpPPC64LoweredMove)
  4451  		v.AuxInt = s
  4452  		v.AddArg(dst)
  4453  		v.AddArg(src)
  4454  		v.AddArg(mem)
  4455  		return true
  4456  	}
  4457  	return false
  4458  }
  4459  func rewriteValuePPC64_OpMul16_0(v *Value) bool {
  4460  	// match: (Mul16 x y)
  4461  	// cond:
  4462  	// result: (MULLW x y)
  4463  	for {
  4464  		_ = v.Args[1]
  4465  		x := v.Args[0]
  4466  		y := v.Args[1]
  4467  		v.reset(OpPPC64MULLW)
  4468  		v.AddArg(x)
  4469  		v.AddArg(y)
  4470  		return true
  4471  	}
  4472  }
  4473  func rewriteValuePPC64_OpMul32_0(v *Value) bool {
  4474  	// match: (Mul32 x y)
  4475  	// cond:
  4476  	// result: (MULLW  x y)
  4477  	for {
  4478  		_ = v.Args[1]
  4479  		x := v.Args[0]
  4480  		y := v.Args[1]
  4481  		v.reset(OpPPC64MULLW)
  4482  		v.AddArg(x)
  4483  		v.AddArg(y)
  4484  		return true
  4485  	}
  4486  }
  4487  func rewriteValuePPC64_OpMul32F_0(v *Value) bool {
  4488  	// match: (Mul32F x y)
  4489  	// cond:
  4490  	// result: (FMULS x y)
  4491  	for {
  4492  		_ = v.Args[1]
  4493  		x := v.Args[0]
  4494  		y := v.Args[1]
  4495  		v.reset(OpPPC64FMULS)
  4496  		v.AddArg(x)
  4497  		v.AddArg(y)
  4498  		return true
  4499  	}
  4500  }
  4501  func rewriteValuePPC64_OpMul64_0(v *Value) bool {
  4502  	// match: (Mul64 x y)
  4503  	// cond:
  4504  	// result: (MULLD  x y)
  4505  	for {
  4506  		_ = v.Args[1]
  4507  		x := v.Args[0]
  4508  		y := v.Args[1]
  4509  		v.reset(OpPPC64MULLD)
  4510  		v.AddArg(x)
  4511  		v.AddArg(y)
  4512  		return true
  4513  	}
  4514  }
  4515  func rewriteValuePPC64_OpMul64F_0(v *Value) bool {
  4516  	// match: (Mul64F x y)
  4517  	// cond:
  4518  	// result: (FMUL x y)
  4519  	for {
  4520  		_ = v.Args[1]
  4521  		x := v.Args[0]
  4522  		y := v.Args[1]
  4523  		v.reset(OpPPC64FMUL)
  4524  		v.AddArg(x)
  4525  		v.AddArg(y)
  4526  		return true
  4527  	}
  4528  }
  4529  func rewriteValuePPC64_OpMul8_0(v *Value) bool {
  4530  	// match: (Mul8 x y)
  4531  	// cond:
  4532  	// result: (MULLW x y)
  4533  	for {
  4534  		_ = v.Args[1]
  4535  		x := v.Args[0]
  4536  		y := v.Args[1]
  4537  		v.reset(OpPPC64MULLW)
  4538  		v.AddArg(x)
  4539  		v.AddArg(y)
  4540  		return true
  4541  	}
  4542  }
  4543  func rewriteValuePPC64_OpNeg16_0(v *Value) bool {
  4544  	// match: (Neg16 x)
  4545  	// cond:
  4546  	// result: (NEG x)
  4547  	for {
  4548  		x := v.Args[0]
  4549  		v.reset(OpPPC64NEG)
  4550  		v.AddArg(x)
  4551  		return true
  4552  	}
  4553  }
  4554  func rewriteValuePPC64_OpNeg32_0(v *Value) bool {
  4555  	// match: (Neg32 x)
  4556  	// cond:
  4557  	// result: (NEG x)
  4558  	for {
  4559  		x := v.Args[0]
  4560  		v.reset(OpPPC64NEG)
  4561  		v.AddArg(x)
  4562  		return true
  4563  	}
  4564  }
  4565  func rewriteValuePPC64_OpNeg32F_0(v *Value) bool {
  4566  	// match: (Neg32F x)
  4567  	// cond:
  4568  	// result: (FNEG x)
  4569  	for {
  4570  		x := v.Args[0]
  4571  		v.reset(OpPPC64FNEG)
  4572  		v.AddArg(x)
  4573  		return true
  4574  	}
  4575  }
  4576  func rewriteValuePPC64_OpNeg64_0(v *Value) bool {
  4577  	// match: (Neg64 x)
  4578  	// cond:
  4579  	// result: (NEG x)
  4580  	for {
  4581  		x := v.Args[0]
  4582  		v.reset(OpPPC64NEG)
  4583  		v.AddArg(x)
  4584  		return true
  4585  	}
  4586  }
  4587  func rewriteValuePPC64_OpNeg64F_0(v *Value) bool {
  4588  	// match: (Neg64F x)
  4589  	// cond:
  4590  	// result: (FNEG x)
  4591  	for {
  4592  		x := v.Args[0]
  4593  		v.reset(OpPPC64FNEG)
  4594  		v.AddArg(x)
  4595  		return true
  4596  	}
  4597  }
  4598  func rewriteValuePPC64_OpNeg8_0(v *Value) bool {
  4599  	// match: (Neg8 x)
  4600  	// cond:
  4601  	// result: (NEG x)
  4602  	for {
  4603  		x := v.Args[0]
  4604  		v.reset(OpPPC64NEG)
  4605  		v.AddArg(x)
  4606  		return true
  4607  	}
  4608  }
  4609  func rewriteValuePPC64_OpNeq16_0(v *Value) bool {
  4610  	b := v.Block
  4611  	_ = b
  4612  	typ := &b.Func.Config.Types
  4613  	_ = typ
  4614  	// match: (Neq16 x y)
  4615  	// cond: isSigned(x.Type) && isSigned(y.Type)
  4616  	// result: (NotEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
  4617  	for {
  4618  		_ = v.Args[1]
  4619  		x := v.Args[0]
  4620  		y := v.Args[1]
  4621  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  4622  			break
  4623  		}
  4624  		v.reset(OpPPC64NotEqual)
  4625  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4626  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4627  		v1.AddArg(x)
  4628  		v0.AddArg(v1)
  4629  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4630  		v2.AddArg(y)
  4631  		v0.AddArg(v2)
  4632  		v.AddArg(v0)
  4633  		return true
  4634  	}
  4635  	// match: (Neq16 x y)
  4636  	// cond:
  4637  	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
  4638  	for {
  4639  		_ = v.Args[1]
  4640  		x := v.Args[0]
  4641  		y := v.Args[1]
  4642  		v.reset(OpPPC64NotEqual)
  4643  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4644  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4645  		v1.AddArg(x)
  4646  		v0.AddArg(v1)
  4647  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4648  		v2.AddArg(y)
  4649  		v0.AddArg(v2)
  4650  		v.AddArg(v0)
  4651  		return true
  4652  	}
  4653  }
  4654  func rewriteValuePPC64_OpNeq32_0(v *Value) bool {
  4655  	b := v.Block
  4656  	_ = b
  4657  	// match: (Neq32 x y)
  4658  	// cond:
  4659  	// result: (NotEqual (CMPW x y))
  4660  	for {
  4661  		_ = v.Args[1]
  4662  		x := v.Args[0]
  4663  		y := v.Args[1]
  4664  		v.reset(OpPPC64NotEqual)
  4665  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4666  		v0.AddArg(x)
  4667  		v0.AddArg(y)
  4668  		v.AddArg(v0)
  4669  		return true
  4670  	}
  4671  }
  4672  func rewriteValuePPC64_OpNeq32F_0(v *Value) bool {
  4673  	b := v.Block
  4674  	_ = b
  4675  	// match: (Neq32F x y)
  4676  	// cond:
  4677  	// result: (NotEqual (FCMPU x y))
  4678  	for {
  4679  		_ = v.Args[1]
  4680  		x := v.Args[0]
  4681  		y := v.Args[1]
  4682  		v.reset(OpPPC64NotEqual)
  4683  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  4684  		v0.AddArg(x)
  4685  		v0.AddArg(y)
  4686  		v.AddArg(v0)
  4687  		return true
  4688  	}
  4689  }
  4690  func rewriteValuePPC64_OpNeq64_0(v *Value) bool {
  4691  	b := v.Block
  4692  	_ = b
  4693  	// match: (Neq64 x y)
  4694  	// cond:
  4695  	// result: (NotEqual (CMP x y))
  4696  	for {
  4697  		_ = v.Args[1]
  4698  		x := v.Args[0]
  4699  		y := v.Args[1]
  4700  		v.reset(OpPPC64NotEqual)
  4701  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  4702  		v0.AddArg(x)
  4703  		v0.AddArg(y)
  4704  		v.AddArg(v0)
  4705  		return true
  4706  	}
  4707  }
  4708  func rewriteValuePPC64_OpNeq64F_0(v *Value) bool {
  4709  	b := v.Block
  4710  	_ = b
  4711  	// match: (Neq64F x y)
  4712  	// cond:
  4713  	// result: (NotEqual (FCMPU x y))
  4714  	for {
  4715  		_ = v.Args[1]
  4716  		x := v.Args[0]
  4717  		y := v.Args[1]
  4718  		v.reset(OpPPC64NotEqual)
  4719  		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
  4720  		v0.AddArg(x)
  4721  		v0.AddArg(y)
  4722  		v.AddArg(v0)
  4723  		return true
  4724  	}
  4725  }
  4726  func rewriteValuePPC64_OpNeq8_0(v *Value) bool {
  4727  	b := v.Block
  4728  	_ = b
  4729  	typ := &b.Func.Config.Types
  4730  	_ = typ
  4731  	// match: (Neq8 x y)
  4732  	// cond: isSigned(x.Type) && isSigned(y.Type)
  4733  	// result: (NotEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
  4734  	for {
  4735  		_ = v.Args[1]
  4736  		x := v.Args[0]
  4737  		y := v.Args[1]
  4738  		if !(isSigned(x.Type) && isSigned(y.Type)) {
  4739  			break
  4740  		}
  4741  		v.reset(OpPPC64NotEqual)
  4742  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4743  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4744  		v1.AddArg(x)
  4745  		v0.AddArg(v1)
  4746  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4747  		v2.AddArg(y)
  4748  		v0.AddArg(v2)
  4749  		v.AddArg(v0)
  4750  		return true
  4751  	}
  4752  	// match: (Neq8 x y)
  4753  	// cond:
  4754  	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
  4755  	for {
  4756  		_ = v.Args[1]
  4757  		x := v.Args[0]
  4758  		y := v.Args[1]
  4759  		v.reset(OpPPC64NotEqual)
  4760  		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
  4761  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4762  		v1.AddArg(x)
  4763  		v0.AddArg(v1)
  4764  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4765  		v2.AddArg(y)
  4766  		v0.AddArg(v2)
  4767  		v.AddArg(v0)
  4768  		return true
  4769  	}
  4770  }
  4771  func rewriteValuePPC64_OpNeqB_0(v *Value) bool {
  4772  	// match: (NeqB x y)
  4773  	// cond:
  4774  	// result: (XOR x y)
  4775  	for {
  4776  		_ = v.Args[1]
  4777  		x := v.Args[0]
  4778  		y := v.Args[1]
  4779  		v.reset(OpPPC64XOR)
  4780  		v.AddArg(x)
  4781  		v.AddArg(y)
  4782  		return true
  4783  	}
  4784  }
  4785  func rewriteValuePPC64_OpNeqPtr_0(v *Value) bool {
  4786  	b := v.Block
  4787  	_ = b
  4788  	// match: (NeqPtr x y)
  4789  	// cond:
  4790  	// result: (NotEqual (CMP x y))
  4791  	for {
  4792  		_ = v.Args[1]
  4793  		x := v.Args[0]
  4794  		y := v.Args[1]
  4795  		v.reset(OpPPC64NotEqual)
  4796  		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
  4797  		v0.AddArg(x)
  4798  		v0.AddArg(y)
  4799  		v.AddArg(v0)
  4800  		return true
  4801  	}
  4802  }
  4803  func rewriteValuePPC64_OpNilCheck_0(v *Value) bool {
  4804  	// match: (NilCheck ptr mem)
  4805  	// cond:
  4806  	// result: (LoweredNilCheck ptr mem)
  4807  	for {
  4808  		_ = v.Args[1]
  4809  		ptr := v.Args[0]
  4810  		mem := v.Args[1]
  4811  		v.reset(OpPPC64LoweredNilCheck)
  4812  		v.AddArg(ptr)
  4813  		v.AddArg(mem)
  4814  		return true
  4815  	}
  4816  }
  4817  func rewriteValuePPC64_OpNot_0(v *Value) bool {
  4818  	// match: (Not x)
  4819  	// cond:
  4820  	// result: (XORconst [1] x)
  4821  	for {
  4822  		x := v.Args[0]
  4823  		v.reset(OpPPC64XORconst)
  4824  		v.AuxInt = 1
  4825  		v.AddArg(x)
  4826  		return true
  4827  	}
  4828  }
  4829  func rewriteValuePPC64_OpOffPtr_0(v *Value) bool {
  4830  	b := v.Block
  4831  	_ = b
  4832  	typ := &b.Func.Config.Types
  4833  	_ = typ
  4834  	// match: (OffPtr [off] ptr)
  4835  	// cond:
  4836  	// result: (ADD (MOVDconst <typ.Int64> [off]) ptr)
  4837  	for {
  4838  		off := v.AuxInt
  4839  		ptr := v.Args[0]
  4840  		v.reset(OpPPC64ADD)
  4841  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
  4842  		v0.AuxInt = off
  4843  		v.AddArg(v0)
  4844  		v.AddArg(ptr)
  4845  		return true
  4846  	}
  4847  }
  4848  func rewriteValuePPC64_OpOr16_0(v *Value) bool {
  4849  	// match: (Or16 x y)
  4850  	// cond:
  4851  	// result: (OR x y)
  4852  	for {
  4853  		_ = v.Args[1]
  4854  		x := v.Args[0]
  4855  		y := v.Args[1]
  4856  		v.reset(OpPPC64OR)
  4857  		v.AddArg(x)
  4858  		v.AddArg(y)
  4859  		return true
  4860  	}
  4861  }
  4862  func rewriteValuePPC64_OpOr32_0(v *Value) bool {
  4863  	// match: (Or32 x y)
  4864  	// cond:
  4865  	// result: (OR x y)
  4866  	for {
  4867  		_ = v.Args[1]
  4868  		x := v.Args[0]
  4869  		y := v.Args[1]
  4870  		v.reset(OpPPC64OR)
  4871  		v.AddArg(x)
  4872  		v.AddArg(y)
  4873  		return true
  4874  	}
  4875  }
  4876  func rewriteValuePPC64_OpOr64_0(v *Value) bool {
  4877  	// match: (Or64 x y)
  4878  	// cond:
  4879  	// result: (OR x y)
  4880  	for {
  4881  		_ = v.Args[1]
  4882  		x := v.Args[0]
  4883  		y := v.Args[1]
  4884  		v.reset(OpPPC64OR)
  4885  		v.AddArg(x)
  4886  		v.AddArg(y)
  4887  		return true
  4888  	}
  4889  }
  4890  func rewriteValuePPC64_OpOr8_0(v *Value) bool {
  4891  	// match: (Or8 x y)
  4892  	// cond:
  4893  	// result: (OR x y)
  4894  	for {
  4895  		_ = v.Args[1]
  4896  		x := v.Args[0]
  4897  		y := v.Args[1]
  4898  		v.reset(OpPPC64OR)
  4899  		v.AddArg(x)
  4900  		v.AddArg(y)
  4901  		return true
  4902  	}
  4903  }
  4904  func rewriteValuePPC64_OpOrB_0(v *Value) bool {
  4905  	// match: (OrB x y)
  4906  	// cond:
  4907  	// result: (OR x y)
  4908  	for {
  4909  		_ = v.Args[1]
  4910  		x := v.Args[0]
  4911  		y := v.Args[1]
  4912  		v.reset(OpPPC64OR)
  4913  		v.AddArg(x)
  4914  		v.AddArg(y)
  4915  		return true
  4916  	}
  4917  }
  4918  func rewriteValuePPC64_OpPPC64ADD_0(v *Value) bool {
  4919  	b := v.Block
  4920  	_ = b
  4921  	typ := &b.Func.Config.Types
  4922  	_ = typ
  4923  	// match: (ADD (SLDconst x [c]) (SRDconst x [d]))
  4924  	// cond: d == 64-c
  4925  	// result: (ROTLconst [c] x)
  4926  	for {
  4927  		_ = v.Args[1]
  4928  		v_0 := v.Args[0]
  4929  		if v_0.Op != OpPPC64SLDconst {
  4930  			break
  4931  		}
  4932  		c := v_0.AuxInt
  4933  		x := v_0.Args[0]
  4934  		v_1 := v.Args[1]
  4935  		if v_1.Op != OpPPC64SRDconst {
  4936  			break
  4937  		}
  4938  		d := v_1.AuxInt
  4939  		if x != v_1.Args[0] {
  4940  			break
  4941  		}
  4942  		if !(d == 64-c) {
  4943  			break
  4944  		}
  4945  		v.reset(OpPPC64ROTLconst)
  4946  		v.AuxInt = c
  4947  		v.AddArg(x)
  4948  		return true
  4949  	}
  4950  	// match: (ADD (SRDconst x [d]) (SLDconst x [c]))
  4951  	// cond: d == 64-c
  4952  	// result: (ROTLconst [c] x)
  4953  	for {
  4954  		_ = v.Args[1]
  4955  		v_0 := v.Args[0]
  4956  		if v_0.Op != OpPPC64SRDconst {
  4957  			break
  4958  		}
  4959  		d := v_0.AuxInt
  4960  		x := v_0.Args[0]
  4961  		v_1 := v.Args[1]
  4962  		if v_1.Op != OpPPC64SLDconst {
  4963  			break
  4964  		}
  4965  		c := v_1.AuxInt
  4966  		if x != v_1.Args[0] {
  4967  			break
  4968  		}
  4969  		if !(d == 64-c) {
  4970  			break
  4971  		}
  4972  		v.reset(OpPPC64ROTLconst)
  4973  		v.AuxInt = c
  4974  		v.AddArg(x)
  4975  		return true
  4976  	}
  4977  	// match: (ADD (SLWconst x [c]) (SRWconst x [d]))
  4978  	// cond: d == 32-c
  4979  	// result: (ROTLWconst [c] x)
  4980  	for {
  4981  		_ = v.Args[1]
  4982  		v_0 := v.Args[0]
  4983  		if v_0.Op != OpPPC64SLWconst {
  4984  			break
  4985  		}
  4986  		c := v_0.AuxInt
  4987  		x := v_0.Args[0]
  4988  		v_1 := v.Args[1]
  4989  		if v_1.Op != OpPPC64SRWconst {
  4990  			break
  4991  		}
  4992  		d := v_1.AuxInt
  4993  		if x != v_1.Args[0] {
  4994  			break
  4995  		}
  4996  		if !(d == 32-c) {
  4997  			break
  4998  		}
  4999  		v.reset(OpPPC64ROTLWconst)
  5000  		v.AuxInt = c
  5001  		v.AddArg(x)
  5002  		return true
  5003  	}
  5004  	// match: (ADD (SRWconst x [d]) (SLWconst x [c]))
  5005  	// cond: d == 32-c
  5006  	// result: (ROTLWconst [c] x)
  5007  	for {
  5008  		_ = v.Args[1]
  5009  		v_0 := v.Args[0]
  5010  		if v_0.Op != OpPPC64SRWconst {
  5011  			break
  5012  		}
  5013  		d := v_0.AuxInt
  5014  		x := v_0.Args[0]
  5015  		v_1 := v.Args[1]
  5016  		if v_1.Op != OpPPC64SLWconst {
  5017  			break
  5018  		}
  5019  		c := v_1.AuxInt
  5020  		if x != v_1.Args[0] {
  5021  			break
  5022  		}
  5023  		if !(d == 32-c) {
  5024  			break
  5025  		}
  5026  		v.reset(OpPPC64ROTLWconst)
  5027  		v.AuxInt = c
  5028  		v.AddArg(x)
  5029  		return true
  5030  	}
  5031  	// match: (ADD (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
  5032  	// cond:
  5033  	// result: (ROTL x y)
  5034  	for {
  5035  		_ = v.Args[1]
  5036  		v_0 := v.Args[0]
  5037  		if v_0.Op != OpPPC64SLD {
  5038  			break
  5039  		}
  5040  		_ = v_0.Args[1]
  5041  		x := v_0.Args[0]
  5042  		v_0_1 := v_0.Args[1]
  5043  		if v_0_1.Op != OpPPC64ANDconst {
  5044  			break
  5045  		}
  5046  		if v_0_1.Type != typ.Int64 {
  5047  			break
  5048  		}
  5049  		if v_0_1.AuxInt != 63 {
  5050  			break
  5051  		}
  5052  		y := v_0_1.Args[0]
  5053  		v_1 := v.Args[1]
  5054  		if v_1.Op != OpPPC64SRD {
  5055  			break
  5056  		}
  5057  		_ = v_1.Args[1]
  5058  		if x != v_1.Args[0] {
  5059  			break
  5060  		}
  5061  		v_1_1 := v_1.Args[1]
  5062  		if v_1_1.Op != OpPPC64SUB {
  5063  			break
  5064  		}
  5065  		if v_1_1.Type != typ.UInt {
  5066  			break
  5067  		}
  5068  		_ = v_1_1.Args[1]
  5069  		v_1_1_0 := v_1_1.Args[0]
  5070  		if v_1_1_0.Op != OpPPC64MOVDconst {
  5071  			break
  5072  		}
  5073  		if v_1_1_0.AuxInt != 64 {
  5074  			break
  5075  		}
  5076  		v_1_1_1 := v_1_1.Args[1]
  5077  		if v_1_1_1.Op != OpPPC64ANDconst {
  5078  			break
  5079  		}
  5080  		if v_1_1_1.Type != typ.UInt {
  5081  			break
  5082  		}
  5083  		if v_1_1_1.AuxInt != 63 {
  5084  			break
  5085  		}
  5086  		if y != v_1_1_1.Args[0] {
  5087  			break
  5088  		}
  5089  		v.reset(OpPPC64ROTL)
  5090  		v.AddArg(x)
  5091  		v.AddArg(y)
  5092  		return true
  5093  	}
  5094  	// match: (ADD (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
  5095  	// cond:
  5096  	// result: (ROTL x y)
  5097  	for {
  5098  		_ = v.Args[1]
  5099  		v_0 := v.Args[0]
  5100  		if v_0.Op != OpPPC64SRD {
  5101  			break
  5102  		}
  5103  		_ = v_0.Args[1]
  5104  		x := v_0.Args[0]
  5105  		v_0_1 := v_0.Args[1]
  5106  		if v_0_1.Op != OpPPC64SUB {
  5107  			break
  5108  		}
  5109  		if v_0_1.Type != typ.UInt {
  5110  			break
  5111  		}
  5112  		_ = v_0_1.Args[1]
  5113  		v_0_1_0 := v_0_1.Args[0]
  5114  		if v_0_1_0.Op != OpPPC64MOVDconst {
  5115  			break
  5116  		}
  5117  		if v_0_1_0.AuxInt != 64 {
  5118  			break
  5119  		}
  5120  		v_0_1_1 := v_0_1.Args[1]
  5121  		if v_0_1_1.Op != OpPPC64ANDconst {
  5122  			break
  5123  		}
  5124  		if v_0_1_1.Type != typ.UInt {
  5125  			break
  5126  		}
  5127  		if v_0_1_1.AuxInt != 63 {
  5128  			break
  5129  		}
  5130  		y := v_0_1_1.Args[0]
  5131  		v_1 := v.Args[1]
  5132  		if v_1.Op != OpPPC64SLD {
  5133  			break
  5134  		}
  5135  		_ = v_1.Args[1]
  5136  		if x != v_1.Args[0] {
  5137  			break
  5138  		}
  5139  		v_1_1 := v_1.Args[1]
  5140  		if v_1_1.Op != OpPPC64ANDconst {
  5141  			break
  5142  		}
  5143  		if v_1_1.Type != typ.Int64 {
  5144  			break
  5145  		}
  5146  		if v_1_1.AuxInt != 63 {
  5147  			break
  5148  		}
  5149  		if y != v_1_1.Args[0] {
  5150  			break
  5151  		}
  5152  		v.reset(OpPPC64ROTL)
  5153  		v.AddArg(x)
  5154  		v.AddArg(y)
  5155  		return true
  5156  	}
  5157  	// match: (ADD (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
  5158  	// cond:
  5159  	// result: (ROTLW x y)
  5160  	for {
  5161  		_ = v.Args[1]
  5162  		v_0 := v.Args[0]
  5163  		if v_0.Op != OpPPC64SLW {
  5164  			break
  5165  		}
  5166  		_ = v_0.Args[1]
  5167  		x := v_0.Args[0]
  5168  		v_0_1 := v_0.Args[1]
  5169  		if v_0_1.Op != OpPPC64ANDconst {
  5170  			break
  5171  		}
  5172  		if v_0_1.Type != typ.Int32 {
  5173  			break
  5174  		}
  5175  		if v_0_1.AuxInt != 31 {
  5176  			break
  5177  		}
  5178  		y := v_0_1.Args[0]
  5179  		v_1 := v.Args[1]
  5180  		if v_1.Op != OpPPC64SRW {
  5181  			break
  5182  		}
  5183  		_ = v_1.Args[1]
  5184  		if x != v_1.Args[0] {
  5185  			break
  5186  		}
  5187  		v_1_1 := v_1.Args[1]
  5188  		if v_1_1.Op != OpPPC64SUB {
  5189  			break
  5190  		}
  5191  		if v_1_1.Type != typ.UInt {
  5192  			break
  5193  		}
  5194  		_ = v_1_1.Args[1]
  5195  		v_1_1_0 := v_1_1.Args[0]
  5196  		if v_1_1_0.Op != OpPPC64MOVDconst {
  5197  			break
  5198  		}
  5199  		if v_1_1_0.AuxInt != 32 {
  5200  			break
  5201  		}
  5202  		v_1_1_1 := v_1_1.Args[1]
  5203  		if v_1_1_1.Op != OpPPC64ANDconst {
  5204  			break
  5205  		}
  5206  		if v_1_1_1.Type != typ.UInt {
  5207  			break
  5208  		}
  5209  		if v_1_1_1.AuxInt != 31 {
  5210  			break
  5211  		}
  5212  		if y != v_1_1_1.Args[0] {
  5213  			break
  5214  		}
  5215  		v.reset(OpPPC64ROTLW)
  5216  		v.AddArg(x)
  5217  		v.AddArg(y)
  5218  		return true
  5219  	}
  5220  	// match: (ADD (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
  5221  	// cond:
  5222  	// result: (ROTLW x y)
  5223  	for {
  5224  		_ = v.Args[1]
  5225  		v_0 := v.Args[0]
  5226  		if v_0.Op != OpPPC64SRW {
  5227  			break
  5228  		}
  5229  		_ = v_0.Args[1]
  5230  		x := v_0.Args[0]
  5231  		v_0_1 := v_0.Args[1]
  5232  		if v_0_1.Op != OpPPC64SUB {
  5233  			break
  5234  		}
  5235  		if v_0_1.Type != typ.UInt {
  5236  			break
  5237  		}
  5238  		_ = v_0_1.Args[1]
  5239  		v_0_1_0 := v_0_1.Args[0]
  5240  		if v_0_1_0.Op != OpPPC64MOVDconst {
  5241  			break
  5242  		}
  5243  		if v_0_1_0.AuxInt != 32 {
  5244  			break
  5245  		}
  5246  		v_0_1_1 := v_0_1.Args[1]
  5247  		if v_0_1_1.Op != OpPPC64ANDconst {
  5248  			break
  5249  		}
  5250  		if v_0_1_1.Type != typ.UInt {
  5251  			break
  5252  		}
  5253  		if v_0_1_1.AuxInt != 31 {
  5254  			break
  5255  		}
  5256  		y := v_0_1_1.Args[0]
  5257  		v_1 := v.Args[1]
  5258  		if v_1.Op != OpPPC64SLW {
  5259  			break
  5260  		}
  5261  		_ = v_1.Args[1]
  5262  		if x != v_1.Args[0] {
  5263  			break
  5264  		}
  5265  		v_1_1 := v_1.Args[1]
  5266  		if v_1_1.Op != OpPPC64ANDconst {
  5267  			break
  5268  		}
  5269  		if v_1_1.Type != typ.Int32 {
  5270  			break
  5271  		}
  5272  		if v_1_1.AuxInt != 31 {
  5273  			break
  5274  		}
  5275  		if y != v_1_1.Args[0] {
  5276  			break
  5277  		}
  5278  		v.reset(OpPPC64ROTLW)
  5279  		v.AddArg(x)
  5280  		v.AddArg(y)
  5281  		return true
  5282  	}
  5283  	// match: (ADD x (MOVDconst [c]))
  5284  	// cond: is32Bit(c)
  5285  	// result: (ADDconst [c] x)
  5286  	for {
  5287  		_ = v.Args[1]
  5288  		x := v.Args[0]
  5289  		v_1 := v.Args[1]
  5290  		if v_1.Op != OpPPC64MOVDconst {
  5291  			break
  5292  		}
  5293  		c := v_1.AuxInt
  5294  		if !(is32Bit(c)) {
  5295  			break
  5296  		}
  5297  		v.reset(OpPPC64ADDconst)
  5298  		v.AuxInt = c
  5299  		v.AddArg(x)
  5300  		return true
  5301  	}
  5302  	// match: (ADD (MOVDconst [c]) x)
  5303  	// cond: is32Bit(c)
  5304  	// result: (ADDconst [c] x)
  5305  	for {
  5306  		_ = v.Args[1]
  5307  		v_0 := v.Args[0]
  5308  		if v_0.Op != OpPPC64MOVDconst {
  5309  			break
  5310  		}
  5311  		c := v_0.AuxInt
  5312  		x := v.Args[1]
  5313  		if !(is32Bit(c)) {
  5314  			break
  5315  		}
  5316  		v.reset(OpPPC64ADDconst)
  5317  		v.AuxInt = c
  5318  		v.AddArg(x)
  5319  		return true
  5320  	}
  5321  	return false
  5322  }
  5323  func rewriteValuePPC64_OpPPC64ADDconst_0(v *Value) bool {
  5324  	// match: (ADDconst [c] (ADDconst [d] x))
  5325  	// cond: is32Bit(c+d)
  5326  	// result: (ADDconst [c+d] x)
  5327  	for {
  5328  		c := v.AuxInt
  5329  		v_0 := v.Args[0]
  5330  		if v_0.Op != OpPPC64ADDconst {
  5331  			break
  5332  		}
  5333  		d := v_0.AuxInt
  5334  		x := v_0.Args[0]
  5335  		if !(is32Bit(c + d)) {
  5336  			break
  5337  		}
  5338  		v.reset(OpPPC64ADDconst)
  5339  		v.AuxInt = c + d
  5340  		v.AddArg(x)
  5341  		return true
  5342  	}
  5343  	// match: (ADDconst [0] x)
  5344  	// cond:
  5345  	// result: x
  5346  	for {
  5347  		if v.AuxInt != 0 {
  5348  			break
  5349  		}
  5350  		x := v.Args[0]
  5351  		v.reset(OpCopy)
  5352  		v.Type = x.Type
  5353  		v.AddArg(x)
  5354  		return true
  5355  	}
  5356  	// match: (ADDconst [c] (MOVDaddr [d] {sym} x))
  5357  	// cond:
  5358  	// result: (MOVDaddr [c+d] {sym} x)
  5359  	for {
  5360  		c := v.AuxInt
  5361  		v_0 := v.Args[0]
  5362  		if v_0.Op != OpPPC64MOVDaddr {
  5363  			break
  5364  		}
  5365  		d := v_0.AuxInt
  5366  		sym := v_0.Aux
  5367  		x := v_0.Args[0]
  5368  		v.reset(OpPPC64MOVDaddr)
  5369  		v.AuxInt = c + d
  5370  		v.Aux = sym
  5371  		v.AddArg(x)
  5372  		return true
  5373  	}
  5374  	return false
  5375  }
  5376  func rewriteValuePPC64_OpPPC64AND_0(v *Value) bool {
  5377  	// match: (AND x (NOR y y))
  5378  	// cond:
  5379  	// result: (ANDN x y)
  5380  	for {
  5381  		_ = v.Args[1]
  5382  		x := v.Args[0]
  5383  		v_1 := v.Args[1]
  5384  		if v_1.Op != OpPPC64NOR {
  5385  			break
  5386  		}
  5387  		_ = v_1.Args[1]
  5388  		y := v_1.Args[0]
  5389  		if y != v_1.Args[1] {
  5390  			break
  5391  		}
  5392  		v.reset(OpPPC64ANDN)
  5393  		v.AddArg(x)
  5394  		v.AddArg(y)
  5395  		return true
  5396  	}
  5397  	// match: (AND (NOR y y) x)
  5398  	// cond:
  5399  	// result: (ANDN x y)
  5400  	for {
  5401  		_ = v.Args[1]
  5402  		v_0 := v.Args[0]
  5403  		if v_0.Op != OpPPC64NOR {
  5404  			break
  5405  		}
  5406  		_ = v_0.Args[1]
  5407  		y := v_0.Args[0]
  5408  		if y != v_0.Args[1] {
  5409  			break
  5410  		}
  5411  		x := v.Args[1]
  5412  		v.reset(OpPPC64ANDN)
  5413  		v.AddArg(x)
  5414  		v.AddArg(y)
  5415  		return true
  5416  	}
  5417  	// match: (AND (MOVDconst [c]) (MOVDconst [d]))
  5418  	// cond:
  5419  	// result: (MOVDconst [c&d])
  5420  	for {
  5421  		_ = v.Args[1]
  5422  		v_0 := v.Args[0]
  5423  		if v_0.Op != OpPPC64MOVDconst {
  5424  			break
  5425  		}
  5426  		c := v_0.AuxInt
  5427  		v_1 := v.Args[1]
  5428  		if v_1.Op != OpPPC64MOVDconst {
  5429  			break
  5430  		}
  5431  		d := v_1.AuxInt
  5432  		v.reset(OpPPC64MOVDconst)
  5433  		v.AuxInt = c & d
  5434  		return true
  5435  	}
  5436  	// match: (AND (MOVDconst [d]) (MOVDconst [c]))
  5437  	// cond:
  5438  	// result: (MOVDconst [c&d])
  5439  	for {
  5440  		_ = v.Args[1]
  5441  		v_0 := v.Args[0]
  5442  		if v_0.Op != OpPPC64MOVDconst {
  5443  			break
  5444  		}
  5445  		d := v_0.AuxInt
  5446  		v_1 := v.Args[1]
  5447  		if v_1.Op != OpPPC64MOVDconst {
  5448  			break
  5449  		}
  5450  		c := v_1.AuxInt
  5451  		v.reset(OpPPC64MOVDconst)
  5452  		v.AuxInt = c & d
  5453  		return true
  5454  	}
  5455  	// match: (AND x (MOVDconst [c]))
  5456  	// cond: isU16Bit(c)
  5457  	// result: (ANDconst [c] x)
  5458  	for {
  5459  		_ = v.Args[1]
  5460  		x := v.Args[0]
  5461  		v_1 := v.Args[1]
  5462  		if v_1.Op != OpPPC64MOVDconst {
  5463  			break
  5464  		}
  5465  		c := v_1.AuxInt
  5466  		if !(isU16Bit(c)) {
  5467  			break
  5468  		}
  5469  		v.reset(OpPPC64ANDconst)
  5470  		v.AuxInt = c
  5471  		v.AddArg(x)
  5472  		return true
  5473  	}
  5474  	// match: (AND (MOVDconst [c]) x)
  5475  	// cond: isU16Bit(c)
  5476  	// result: (ANDconst [c] x)
  5477  	for {
  5478  		_ = v.Args[1]
  5479  		v_0 := v.Args[0]
  5480  		if v_0.Op != OpPPC64MOVDconst {
  5481  			break
  5482  		}
  5483  		c := v_0.AuxInt
  5484  		x := v.Args[1]
  5485  		if !(isU16Bit(c)) {
  5486  			break
  5487  		}
  5488  		v.reset(OpPPC64ANDconst)
  5489  		v.AuxInt = c
  5490  		v.AddArg(x)
  5491  		return true
  5492  	}
  5493  	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  5494  	// cond:
  5495  	// result: (ANDconst [c&0xFF] x)
  5496  	for {
  5497  		_ = v.Args[1]
  5498  		v_0 := v.Args[0]
  5499  		if v_0.Op != OpPPC64MOVDconst {
  5500  			break
  5501  		}
  5502  		c := v_0.AuxInt
  5503  		x := v.Args[1]
  5504  		if x.Op != OpPPC64MOVBZload {
  5505  			break
  5506  		}
  5507  		_ = x.Args[1]
  5508  		v.reset(OpPPC64ANDconst)
  5509  		v.AuxInt = c & 0xFF
  5510  		v.AddArg(x)
  5511  		return true
  5512  	}
  5513  	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  5514  	// cond:
  5515  	// result: (ANDconst [c&0xFF] x)
  5516  	for {
  5517  		_ = v.Args[1]
  5518  		x := v.Args[0]
  5519  		if x.Op != OpPPC64MOVBZload {
  5520  			break
  5521  		}
  5522  		_ = x.Args[1]
  5523  		v_1 := v.Args[1]
  5524  		if v_1.Op != OpPPC64MOVDconst {
  5525  			break
  5526  		}
  5527  		c := v_1.AuxInt
  5528  		v.reset(OpPPC64ANDconst)
  5529  		v.AuxInt = c & 0xFF
  5530  		v.AddArg(x)
  5531  		return true
  5532  	}
  5533  	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
  5534  	// cond:
  5535  	// result: (ANDconst [c&0xFF] x)
  5536  	for {
  5537  		_ = v.Args[1]
  5538  		x := v.Args[0]
  5539  		if x.Op != OpPPC64MOVBZload {
  5540  			break
  5541  		}
  5542  		_ = x.Args[1]
  5543  		v_1 := v.Args[1]
  5544  		if v_1.Op != OpPPC64MOVDconst {
  5545  			break
  5546  		}
  5547  		c := v_1.AuxInt
  5548  		v.reset(OpPPC64ANDconst)
  5549  		v.AuxInt = c & 0xFF
  5550  		v.AddArg(x)
  5551  		return true
  5552  	}
  5553  	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
  5554  	// cond:
  5555  	// result: (ANDconst [c&0xFF] x)
  5556  	for {
  5557  		_ = v.Args[1]
  5558  		v_0 := v.Args[0]
  5559  		if v_0.Op != OpPPC64MOVDconst {
  5560  			break
  5561  		}
  5562  		c := v_0.AuxInt
  5563  		x := v.Args[1]
  5564  		if x.Op != OpPPC64MOVBZload {
  5565  			break
  5566  		}
  5567  		_ = x.Args[1]
  5568  		v.reset(OpPPC64ANDconst)
  5569  		v.AuxInt = c & 0xFF
  5570  		v.AddArg(x)
  5571  		return true
  5572  	}
  5573  	return false
  5574  }
  5575  func rewriteValuePPC64_OpPPC64ANDconst_0(v *Value) bool {
  5576  	// match: (ANDconst [c] (ANDconst [d] x))
  5577  	// cond:
  5578  	// result: (ANDconst [c&d] x)
  5579  	for {
  5580  		c := v.AuxInt
  5581  		v_0 := v.Args[0]
  5582  		if v_0.Op != OpPPC64ANDconst {
  5583  			break
  5584  		}
  5585  		d := v_0.AuxInt
  5586  		x := v_0.Args[0]
  5587  		v.reset(OpPPC64ANDconst)
  5588  		v.AuxInt = c & d
  5589  		v.AddArg(x)
  5590  		return true
  5591  	}
  5592  	// match: (ANDconst [-1] x)
  5593  	// cond:
  5594  	// result: x
  5595  	for {
  5596  		if v.AuxInt != -1 {
  5597  			break
  5598  		}
  5599  		x := v.Args[0]
  5600  		v.reset(OpCopy)
  5601  		v.Type = x.Type
  5602  		v.AddArg(x)
  5603  		return true
  5604  	}
  5605  	// match: (ANDconst [0] _)
  5606  	// cond:
  5607  	// result: (MOVDconst [0])
  5608  	for {
  5609  		if v.AuxInt != 0 {
  5610  			break
  5611  		}
  5612  		v.reset(OpPPC64MOVDconst)
  5613  		v.AuxInt = 0
  5614  		return true
  5615  	}
  5616  	// match: (ANDconst [c] y:(MOVBZreg _))
  5617  	// cond: c&0xFF == 0xFF
  5618  	// result: y
  5619  	for {
  5620  		c := v.AuxInt
  5621  		y := v.Args[0]
  5622  		if y.Op != OpPPC64MOVBZreg {
  5623  			break
  5624  		}
  5625  		if !(c&0xFF == 0xFF) {
  5626  			break
  5627  		}
  5628  		v.reset(OpCopy)
  5629  		v.Type = y.Type
  5630  		v.AddArg(y)
  5631  		return true
  5632  	}
  5633  	// match: (ANDconst [c] y:(MOVHZreg _))
  5634  	// cond: c&0xFFFF == 0xFFFF
  5635  	// result: y
  5636  	for {
  5637  		c := v.AuxInt
  5638  		y := v.Args[0]
  5639  		if y.Op != OpPPC64MOVHZreg {
  5640  			break
  5641  		}
  5642  		if !(c&0xFFFF == 0xFFFF) {
  5643  			break
  5644  		}
  5645  		v.reset(OpCopy)
  5646  		v.Type = y.Type
  5647  		v.AddArg(y)
  5648  		return true
  5649  	}
  5650  	// match: (ANDconst [c] y:(MOVWZreg _))
  5651  	// cond: c&0xFFFFFFFF == 0xFFFFFFFF
  5652  	// result: y
  5653  	for {
  5654  		c := v.AuxInt
  5655  		y := v.Args[0]
  5656  		if y.Op != OpPPC64MOVWZreg {
  5657  			break
  5658  		}
  5659  		if !(c&0xFFFFFFFF == 0xFFFFFFFF) {
  5660  			break
  5661  		}
  5662  		v.reset(OpCopy)
  5663  		v.Type = y.Type
  5664  		v.AddArg(y)
  5665  		return true
  5666  	}
  5667  	// match: (ANDconst [c] (MOVBZreg x))
  5668  	// cond:
  5669  	// result: (ANDconst [c&0xFF] x)
  5670  	for {
  5671  		c := v.AuxInt
  5672  		v_0 := v.Args[0]
  5673  		if v_0.Op != OpPPC64MOVBZreg {
  5674  			break
  5675  		}
  5676  		x := v_0.Args[0]
  5677  		v.reset(OpPPC64ANDconst)
  5678  		v.AuxInt = c & 0xFF
  5679  		v.AddArg(x)
  5680  		return true
  5681  	}
  5682  	// match: (ANDconst [c] (MOVHZreg x))
  5683  	// cond:
  5684  	// result: (ANDconst [c&0xFFFF] x)
  5685  	for {
  5686  		c := v.AuxInt
  5687  		v_0 := v.Args[0]
  5688  		if v_0.Op != OpPPC64MOVHZreg {
  5689  			break
  5690  		}
  5691  		x := v_0.Args[0]
  5692  		v.reset(OpPPC64ANDconst)
  5693  		v.AuxInt = c & 0xFFFF
  5694  		v.AddArg(x)
  5695  		return true
  5696  	}
  5697  	// match: (ANDconst [c] (MOVWZreg x))
  5698  	// cond:
  5699  	// result: (ANDconst [c&0xFFFFFFFF] x)
  5700  	for {
  5701  		c := v.AuxInt
  5702  		v_0 := v.Args[0]
  5703  		if v_0.Op != OpPPC64MOVWZreg {
  5704  			break
  5705  		}
  5706  		x := v_0.Args[0]
  5707  		v.reset(OpPPC64ANDconst)
  5708  		v.AuxInt = c & 0xFFFFFFFF
  5709  		v.AddArg(x)
  5710  		return true
  5711  	}
  5712  	return false
  5713  }
  5714  func rewriteValuePPC64_OpPPC64CMP_0(v *Value) bool {
  5715  	b := v.Block
  5716  	_ = b
  5717  	// match: (CMP x (MOVDconst [c]))
  5718  	// cond: is16Bit(c)
  5719  	// result: (CMPconst x [c])
  5720  	for {
  5721  		_ = v.Args[1]
  5722  		x := v.Args[0]
  5723  		v_1 := v.Args[1]
  5724  		if v_1.Op != OpPPC64MOVDconst {
  5725  			break
  5726  		}
  5727  		c := v_1.AuxInt
  5728  		if !(is16Bit(c)) {
  5729  			break
  5730  		}
  5731  		v.reset(OpPPC64CMPconst)
  5732  		v.AuxInt = c
  5733  		v.AddArg(x)
  5734  		return true
  5735  	}
  5736  	// match: (CMP (MOVDconst [c]) y)
  5737  	// cond: is16Bit(c)
  5738  	// result: (InvertFlags (CMPconst y [c]))
  5739  	for {
  5740  		_ = v.Args[1]
  5741  		v_0 := v.Args[0]
  5742  		if v_0.Op != OpPPC64MOVDconst {
  5743  			break
  5744  		}
  5745  		c := v_0.AuxInt
  5746  		y := v.Args[1]
  5747  		if !(is16Bit(c)) {
  5748  			break
  5749  		}
  5750  		v.reset(OpPPC64InvertFlags)
  5751  		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
  5752  		v0.AuxInt = c
  5753  		v0.AddArg(y)
  5754  		v.AddArg(v0)
  5755  		return true
  5756  	}
  5757  	return false
  5758  }
  5759  func rewriteValuePPC64_OpPPC64CMPU_0(v *Value) bool {
  5760  	b := v.Block
  5761  	_ = b
  5762  	// match: (CMPU x (MOVDconst [c]))
  5763  	// cond: isU16Bit(c)
  5764  	// result: (CMPUconst x [c])
  5765  	for {
  5766  		_ = v.Args[1]
  5767  		x := v.Args[0]
  5768  		v_1 := v.Args[1]
  5769  		if v_1.Op != OpPPC64MOVDconst {
  5770  			break
  5771  		}
  5772  		c := v_1.AuxInt
  5773  		if !(isU16Bit(c)) {
  5774  			break
  5775  		}
  5776  		v.reset(OpPPC64CMPUconst)
  5777  		v.AuxInt = c
  5778  		v.AddArg(x)
  5779  		return true
  5780  	}
  5781  	// match: (CMPU (MOVDconst [c]) y)
  5782  	// cond: isU16Bit(c)
  5783  	// result: (InvertFlags (CMPUconst y [c]))
  5784  	for {
  5785  		_ = v.Args[1]
  5786  		v_0 := v.Args[0]
  5787  		if v_0.Op != OpPPC64MOVDconst {
  5788  			break
  5789  		}
  5790  		c := v_0.AuxInt
  5791  		y := v.Args[1]
  5792  		if !(isU16Bit(c)) {
  5793  			break
  5794  		}
  5795  		v.reset(OpPPC64InvertFlags)
  5796  		v0 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
  5797  		v0.AuxInt = c
  5798  		v0.AddArg(y)
  5799  		v.AddArg(v0)
  5800  		return true
  5801  	}
  5802  	return false
  5803  }
  5804  func rewriteValuePPC64_OpPPC64CMPUconst_0(v *Value) bool {
  5805  	// match: (CMPUconst (MOVDconst [x]) [y])
  5806  	// cond: int64(x)==int64(y)
  5807  	// result: (FlagEQ)
  5808  	for {
  5809  		y := v.AuxInt
  5810  		v_0 := v.Args[0]
  5811  		if v_0.Op != OpPPC64MOVDconst {
  5812  			break
  5813  		}
  5814  		x := v_0.AuxInt
  5815  		if !(int64(x) == int64(y)) {
  5816  			break
  5817  		}
  5818  		v.reset(OpPPC64FlagEQ)
  5819  		return true
  5820  	}
  5821  	// match: (CMPUconst (MOVDconst [x]) [y])
  5822  	// cond: uint64(x)<uint64(y)
  5823  	// result: (FlagLT)
  5824  	for {
  5825  		y := v.AuxInt
  5826  		v_0 := v.Args[0]
  5827  		if v_0.Op != OpPPC64MOVDconst {
  5828  			break
  5829  		}
  5830  		x := v_0.AuxInt
  5831  		if !(uint64(x) < uint64(y)) {
  5832  			break
  5833  		}
  5834  		v.reset(OpPPC64FlagLT)
  5835  		return true
  5836  	}
  5837  	// match: (CMPUconst (MOVDconst [x]) [y])
  5838  	// cond: uint64(x)>uint64(y)
  5839  	// result: (FlagGT)
  5840  	for {
  5841  		y := v.AuxInt
  5842  		v_0 := v.Args[0]
  5843  		if v_0.Op != OpPPC64MOVDconst {
  5844  			break
  5845  		}
  5846  		x := v_0.AuxInt
  5847  		if !(uint64(x) > uint64(y)) {
  5848  			break
  5849  		}
  5850  		v.reset(OpPPC64FlagGT)
  5851  		return true
  5852  	}
  5853  	return false
  5854  }
  5855  func rewriteValuePPC64_OpPPC64CMPW_0(v *Value) bool {
  5856  	b := v.Block
  5857  	_ = b
  5858  	// match: (CMPW x (MOVWreg y))
  5859  	// cond:
  5860  	// result: (CMPW x y)
  5861  	for {
  5862  		_ = v.Args[1]
  5863  		x := v.Args[0]
  5864  		v_1 := v.Args[1]
  5865  		if v_1.Op != OpPPC64MOVWreg {
  5866  			break
  5867  		}
  5868  		y := v_1.Args[0]
  5869  		v.reset(OpPPC64CMPW)
  5870  		v.AddArg(x)
  5871  		v.AddArg(y)
  5872  		return true
  5873  	}
  5874  	// match: (CMPW (MOVWreg x) y)
  5875  	// cond:
  5876  	// result: (CMPW x y)
  5877  	for {
  5878  		_ = v.Args[1]
  5879  		v_0 := v.Args[0]
  5880  		if v_0.Op != OpPPC64MOVWreg {
  5881  			break
  5882  		}
  5883  		x := v_0.Args[0]
  5884  		y := v.Args[1]
  5885  		v.reset(OpPPC64CMPW)
  5886  		v.AddArg(x)
  5887  		v.AddArg(y)
  5888  		return true
  5889  	}
  5890  	// match: (CMPW x (MOVDconst [c]))
  5891  	// cond: is16Bit(c)
  5892  	// result: (CMPWconst x [c])
  5893  	for {
  5894  		_ = v.Args[1]
  5895  		x := v.Args[0]
  5896  		v_1 := v.Args[1]
  5897  		if v_1.Op != OpPPC64MOVDconst {
  5898  			break
  5899  		}
  5900  		c := v_1.AuxInt
  5901  		if !(is16Bit(c)) {
  5902  			break
  5903  		}
  5904  		v.reset(OpPPC64CMPWconst)
  5905  		v.AuxInt = c
  5906  		v.AddArg(x)
  5907  		return true
  5908  	}
  5909  	// match: (CMPW (MOVDconst [c]) y)
  5910  	// cond: is16Bit(c)
  5911  	// result: (InvertFlags (CMPWconst y [c]))
  5912  	for {
  5913  		_ = v.Args[1]
  5914  		v_0 := v.Args[0]
  5915  		if v_0.Op != OpPPC64MOVDconst {
  5916  			break
  5917  		}
  5918  		c := v_0.AuxInt
  5919  		y := v.Args[1]
  5920  		if !(is16Bit(c)) {
  5921  			break
  5922  		}
  5923  		v.reset(OpPPC64InvertFlags)
  5924  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
  5925  		v0.AuxInt = c
  5926  		v0.AddArg(y)
  5927  		v.AddArg(v0)
  5928  		return true
  5929  	}
  5930  	return false
  5931  }
  5932  func rewriteValuePPC64_OpPPC64CMPWU_0(v *Value) bool {
  5933  	b := v.Block
  5934  	_ = b
  5935  	// match: (CMPWU x (MOVWZreg y))
  5936  	// cond:
  5937  	// result: (CMPWU x y)
  5938  	for {
  5939  		_ = v.Args[1]
  5940  		x := v.Args[0]
  5941  		v_1 := v.Args[1]
  5942  		if v_1.Op != OpPPC64MOVWZreg {
  5943  			break
  5944  		}
  5945  		y := v_1.Args[0]
  5946  		v.reset(OpPPC64CMPWU)
  5947  		v.AddArg(x)
  5948  		v.AddArg(y)
  5949  		return true
  5950  	}
  5951  	// match: (CMPWU (MOVWZreg x) y)
  5952  	// cond:
  5953  	// result: (CMPWU x y)
  5954  	for {
  5955  		_ = v.Args[1]
  5956  		v_0 := v.Args[0]
  5957  		if v_0.Op != OpPPC64MOVWZreg {
  5958  			break
  5959  		}
  5960  		x := v_0.Args[0]
  5961  		y := v.Args[1]
  5962  		v.reset(OpPPC64CMPWU)
  5963  		v.AddArg(x)
  5964  		v.AddArg(y)
  5965  		return true
  5966  	}
  5967  	// match: (CMPWU x (MOVDconst [c]))
  5968  	// cond: isU16Bit(c)
  5969  	// result: (CMPWUconst x [c])
  5970  	for {
  5971  		_ = v.Args[1]
  5972  		x := v.Args[0]
  5973  		v_1 := v.Args[1]
  5974  		if v_1.Op != OpPPC64MOVDconst {
  5975  			break
  5976  		}
  5977  		c := v_1.AuxInt
  5978  		if !(isU16Bit(c)) {
  5979  			break
  5980  		}
  5981  		v.reset(OpPPC64CMPWUconst)
  5982  		v.AuxInt = c
  5983  		v.AddArg(x)
  5984  		return true
  5985  	}
  5986  	// match: (CMPWU (MOVDconst [c]) y)
  5987  	// cond: isU16Bit(c)
  5988  	// result: (InvertFlags (CMPWUconst y [c]))
  5989  	for {
  5990  		_ = v.Args[1]
  5991  		v_0 := v.Args[0]
  5992  		if v_0.Op != OpPPC64MOVDconst {
  5993  			break
  5994  		}
  5995  		c := v_0.AuxInt
  5996  		y := v.Args[1]
  5997  		if !(isU16Bit(c)) {
  5998  			break
  5999  		}
  6000  		v.reset(OpPPC64InvertFlags)
  6001  		v0 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
  6002  		v0.AuxInt = c
  6003  		v0.AddArg(y)
  6004  		v.AddArg(v0)
  6005  		return true
  6006  	}
  6007  	return false
  6008  }
  6009  func rewriteValuePPC64_OpPPC64CMPWUconst_0(v *Value) bool {
  6010  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6011  	// cond: int32(x)==int32(y)
  6012  	// result: (FlagEQ)
  6013  	for {
  6014  		y := v.AuxInt
  6015  		v_0 := v.Args[0]
  6016  		if v_0.Op != OpPPC64MOVDconst {
  6017  			break
  6018  		}
  6019  		x := v_0.AuxInt
  6020  		if !(int32(x) == int32(y)) {
  6021  			break
  6022  		}
  6023  		v.reset(OpPPC64FlagEQ)
  6024  		return true
  6025  	}
  6026  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6027  	// cond: uint32(x)<uint32(y)
  6028  	// result: (FlagLT)
  6029  	for {
  6030  		y := v.AuxInt
  6031  		v_0 := v.Args[0]
  6032  		if v_0.Op != OpPPC64MOVDconst {
  6033  			break
  6034  		}
  6035  		x := v_0.AuxInt
  6036  		if !(uint32(x) < uint32(y)) {
  6037  			break
  6038  		}
  6039  		v.reset(OpPPC64FlagLT)
  6040  		return true
  6041  	}
  6042  	// match: (CMPWUconst (MOVDconst [x]) [y])
  6043  	// cond: uint32(x)>uint32(y)
  6044  	// result: (FlagGT)
  6045  	for {
  6046  		y := v.AuxInt
  6047  		v_0 := v.Args[0]
  6048  		if v_0.Op != OpPPC64MOVDconst {
  6049  			break
  6050  		}
  6051  		x := v_0.AuxInt
  6052  		if !(uint32(x) > uint32(y)) {
  6053  			break
  6054  		}
  6055  		v.reset(OpPPC64FlagGT)
  6056  		return true
  6057  	}
  6058  	return false
  6059  }
  6060  func rewriteValuePPC64_OpPPC64CMPWconst_0(v *Value) bool {
  6061  	// match: (CMPWconst (MOVDconst [x]) [y])
  6062  	// cond: int32(x)==int32(y)
  6063  	// result: (FlagEQ)
  6064  	for {
  6065  		y := v.AuxInt
  6066  		v_0 := v.Args[0]
  6067  		if v_0.Op != OpPPC64MOVDconst {
  6068  			break
  6069  		}
  6070  		x := v_0.AuxInt
  6071  		if !(int32(x) == int32(y)) {
  6072  			break
  6073  		}
  6074  		v.reset(OpPPC64FlagEQ)
  6075  		return true
  6076  	}
  6077  	// match: (CMPWconst (MOVDconst [x]) [y])
  6078  	// cond: int32(x)<int32(y)
  6079  	// result: (FlagLT)
  6080  	for {
  6081  		y := v.AuxInt
  6082  		v_0 := v.Args[0]
  6083  		if v_0.Op != OpPPC64MOVDconst {
  6084  			break
  6085  		}
  6086  		x := v_0.AuxInt
  6087  		if !(int32(x) < int32(y)) {
  6088  			break
  6089  		}
  6090  		v.reset(OpPPC64FlagLT)
  6091  		return true
  6092  	}
  6093  	// match: (CMPWconst (MOVDconst [x]) [y])
  6094  	// cond: int32(x)>int32(y)
  6095  	// result: (FlagGT)
  6096  	for {
  6097  		y := v.AuxInt
  6098  		v_0 := v.Args[0]
  6099  		if v_0.Op != OpPPC64MOVDconst {
  6100  			break
  6101  		}
  6102  		x := v_0.AuxInt
  6103  		if !(int32(x) > int32(y)) {
  6104  			break
  6105  		}
  6106  		v.reset(OpPPC64FlagGT)
  6107  		return true
  6108  	}
  6109  	return false
  6110  }
  6111  func rewriteValuePPC64_OpPPC64CMPconst_0(v *Value) bool {
  6112  	// match: (CMPconst (MOVDconst [x]) [y])
  6113  	// cond: int64(x)==int64(y)
  6114  	// result: (FlagEQ)
  6115  	for {
  6116  		y := v.AuxInt
  6117  		v_0 := v.Args[0]
  6118  		if v_0.Op != OpPPC64MOVDconst {
  6119  			break
  6120  		}
  6121  		x := v_0.AuxInt
  6122  		if !(int64(x) == int64(y)) {
  6123  			break
  6124  		}
  6125  		v.reset(OpPPC64FlagEQ)
  6126  		return true
  6127  	}
  6128  	// match: (CMPconst (MOVDconst [x]) [y])
  6129  	// cond: int64(x)<int64(y)
  6130  	// result: (FlagLT)
  6131  	for {
  6132  		y := v.AuxInt
  6133  		v_0 := v.Args[0]
  6134  		if v_0.Op != OpPPC64MOVDconst {
  6135  			break
  6136  		}
  6137  		x := v_0.AuxInt
  6138  		if !(int64(x) < int64(y)) {
  6139  			break
  6140  		}
  6141  		v.reset(OpPPC64FlagLT)
  6142  		return true
  6143  	}
  6144  	// match: (CMPconst (MOVDconst [x]) [y])
  6145  	// cond: int64(x)>int64(y)
  6146  	// result: (FlagGT)
  6147  	for {
  6148  		y := v.AuxInt
  6149  		v_0 := v.Args[0]
  6150  		if v_0.Op != OpPPC64MOVDconst {
  6151  			break
  6152  		}
  6153  		x := v_0.AuxInt
  6154  		if !(int64(x) > int64(y)) {
  6155  			break
  6156  		}
  6157  		v.reset(OpPPC64FlagGT)
  6158  		return true
  6159  	}
  6160  	return false
  6161  }
  6162  func rewriteValuePPC64_OpPPC64Equal_0(v *Value) bool {
  6163  	// match: (Equal (FlagEQ))
  6164  	// cond:
  6165  	// result: (MOVDconst [1])
  6166  	for {
  6167  		v_0 := v.Args[0]
  6168  		if v_0.Op != OpPPC64FlagEQ {
  6169  			break
  6170  		}
  6171  		v.reset(OpPPC64MOVDconst)
  6172  		v.AuxInt = 1
  6173  		return true
  6174  	}
  6175  	// match: (Equal (FlagLT))
  6176  	// cond:
  6177  	// result: (MOVDconst [0])
  6178  	for {
  6179  		v_0 := v.Args[0]
  6180  		if v_0.Op != OpPPC64FlagLT {
  6181  			break
  6182  		}
  6183  		v.reset(OpPPC64MOVDconst)
  6184  		v.AuxInt = 0
  6185  		return true
  6186  	}
  6187  	// match: (Equal (FlagGT))
  6188  	// cond:
  6189  	// result: (MOVDconst [0])
  6190  	for {
  6191  		v_0 := v.Args[0]
  6192  		if v_0.Op != OpPPC64FlagGT {
  6193  			break
  6194  		}
  6195  		v.reset(OpPPC64MOVDconst)
  6196  		v.AuxInt = 0
  6197  		return true
  6198  	}
  6199  	// match: (Equal (InvertFlags x))
  6200  	// cond:
  6201  	// result: (Equal x)
  6202  	for {
  6203  		v_0 := v.Args[0]
  6204  		if v_0.Op != OpPPC64InvertFlags {
  6205  			break
  6206  		}
  6207  		x := v_0.Args[0]
  6208  		v.reset(OpPPC64Equal)
  6209  		v.AddArg(x)
  6210  		return true
  6211  	}
  6212  	return false
  6213  }
  6214  func rewriteValuePPC64_OpPPC64FABS_0(v *Value) bool {
  6215  	// match: (FABS (FMOVDconst [x]))
  6216  	// cond:
  6217  	// result: (FMOVDconst [f2i(math.Abs(i2f(x)))])
  6218  	for {
  6219  		v_0 := v.Args[0]
  6220  		if v_0.Op != OpPPC64FMOVDconst {
  6221  			break
  6222  		}
  6223  		x := v_0.AuxInt
  6224  		v.reset(OpPPC64FMOVDconst)
  6225  		v.AuxInt = f2i(math.Abs(i2f(x)))
  6226  		return true
  6227  	}
  6228  	return false
  6229  }
  6230  func rewriteValuePPC64_OpPPC64FADD_0(v *Value) bool {
  6231  	// match: (FADD (FMUL x y) z)
  6232  	// cond:
  6233  	// result: (FMADD x y z)
  6234  	for {
  6235  		_ = v.Args[1]
  6236  		v_0 := v.Args[0]
  6237  		if v_0.Op != OpPPC64FMUL {
  6238  			break
  6239  		}
  6240  		_ = v_0.Args[1]
  6241  		x := v_0.Args[0]
  6242  		y := v_0.Args[1]
  6243  		z := v.Args[1]
  6244  		v.reset(OpPPC64FMADD)
  6245  		v.AddArg(x)
  6246  		v.AddArg(y)
  6247  		v.AddArg(z)
  6248  		return true
  6249  	}
  6250  	// match: (FADD z (FMUL x y))
  6251  	// cond:
  6252  	// result: (FMADD x y z)
  6253  	for {
  6254  		_ = v.Args[1]
  6255  		z := v.Args[0]
  6256  		v_1 := v.Args[1]
  6257  		if v_1.Op != OpPPC64FMUL {
  6258  			break
  6259  		}
  6260  		_ = v_1.Args[1]
  6261  		x := v_1.Args[0]
  6262  		y := v_1.Args[1]
  6263  		v.reset(OpPPC64FMADD)
  6264  		v.AddArg(x)
  6265  		v.AddArg(y)
  6266  		v.AddArg(z)
  6267  		return true
  6268  	}
  6269  	return false
  6270  }
  6271  func rewriteValuePPC64_OpPPC64FADDS_0(v *Value) bool {
  6272  	// match: (FADDS (FMULS x y) z)
  6273  	// cond:
  6274  	// result: (FMADDS x y z)
  6275  	for {
  6276  		_ = v.Args[1]
  6277  		v_0 := v.Args[0]
  6278  		if v_0.Op != OpPPC64FMULS {
  6279  			break
  6280  		}
  6281  		_ = v_0.Args[1]
  6282  		x := v_0.Args[0]
  6283  		y := v_0.Args[1]
  6284  		z := v.Args[1]
  6285  		v.reset(OpPPC64FMADDS)
  6286  		v.AddArg(x)
  6287  		v.AddArg(y)
  6288  		v.AddArg(z)
  6289  		return true
  6290  	}
  6291  	// match: (FADDS z (FMULS x y))
  6292  	// cond:
  6293  	// result: (FMADDS x y z)
  6294  	for {
  6295  		_ = v.Args[1]
  6296  		z := v.Args[0]
  6297  		v_1 := v.Args[1]
  6298  		if v_1.Op != OpPPC64FMULS {
  6299  			break
  6300  		}
  6301  		_ = v_1.Args[1]
  6302  		x := v_1.Args[0]
  6303  		y := v_1.Args[1]
  6304  		v.reset(OpPPC64FMADDS)
  6305  		v.AddArg(x)
  6306  		v.AddArg(y)
  6307  		v.AddArg(z)
  6308  		return true
  6309  	}
  6310  	return false
  6311  }
  6312  func rewriteValuePPC64_OpPPC64FCEIL_0(v *Value) bool {
  6313  	// match: (FCEIL (FMOVDconst [x]))
  6314  	// cond:
  6315  	// result: (FMOVDconst [f2i(math.Ceil(i2f(x)))])
  6316  	for {
  6317  		v_0 := v.Args[0]
  6318  		if v_0.Op != OpPPC64FMOVDconst {
  6319  			break
  6320  		}
  6321  		x := v_0.AuxInt
  6322  		v.reset(OpPPC64FMOVDconst)
  6323  		v.AuxInt = f2i(math.Ceil(i2f(x)))
  6324  		return true
  6325  	}
  6326  	return false
  6327  }
  6328  func rewriteValuePPC64_OpPPC64FFLOOR_0(v *Value) bool {
  6329  	// match: (FFLOOR (FMOVDconst [x]))
  6330  	// cond:
  6331  	// result: (FMOVDconst [f2i(math.Floor(i2f(x)))])
  6332  	for {
  6333  		v_0 := v.Args[0]
  6334  		if v_0.Op != OpPPC64FMOVDconst {
  6335  			break
  6336  		}
  6337  		x := v_0.AuxInt
  6338  		v.reset(OpPPC64FMOVDconst)
  6339  		v.AuxInt = f2i(math.Floor(i2f(x)))
  6340  		return true
  6341  	}
  6342  	return false
  6343  }
  6344  func rewriteValuePPC64_OpPPC64FMOVDload_0(v *Value) bool {
  6345  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr x _))
  6346  	// cond:
  6347  	// result: (MTVSRD x)
  6348  	for {
  6349  		off := v.AuxInt
  6350  		sym := v.Aux
  6351  		_ = v.Args[1]
  6352  		ptr := v.Args[0]
  6353  		v_1 := v.Args[1]
  6354  		if v_1.Op != OpPPC64MOVDstore {
  6355  			break
  6356  		}
  6357  		if v_1.AuxInt != off {
  6358  			break
  6359  		}
  6360  		if v_1.Aux != sym {
  6361  			break
  6362  		}
  6363  		_ = v_1.Args[2]
  6364  		if ptr != v_1.Args[0] {
  6365  			break
  6366  		}
  6367  		x := v_1.Args[1]
  6368  		v.reset(OpPPC64MTVSRD)
  6369  		v.AddArg(x)
  6370  		return true
  6371  	}
  6372  	// match: (FMOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6373  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  6374  	// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6375  	for {
  6376  		off1 := v.AuxInt
  6377  		sym1 := v.Aux
  6378  		_ = v.Args[1]
  6379  		p := v.Args[0]
  6380  		if p.Op != OpPPC64MOVDaddr {
  6381  			break
  6382  		}
  6383  		off2 := p.AuxInt
  6384  		sym2 := p.Aux
  6385  		ptr := p.Args[0]
  6386  		mem := v.Args[1]
  6387  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6388  			break
  6389  		}
  6390  		v.reset(OpPPC64FMOVDload)
  6391  		v.AuxInt = off1 + off2
  6392  		v.Aux = mergeSym(sym1, sym2)
  6393  		v.AddArg(ptr)
  6394  		v.AddArg(mem)
  6395  		return true
  6396  	}
  6397  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  6398  	// cond: is16Bit(off1+off2)
  6399  	// result: (FMOVDload [off1+off2] {sym} ptr mem)
  6400  	for {
  6401  		off1 := v.AuxInt
  6402  		sym := v.Aux
  6403  		_ = v.Args[1]
  6404  		v_0 := v.Args[0]
  6405  		if v_0.Op != OpPPC64ADDconst {
  6406  			break
  6407  		}
  6408  		off2 := v_0.AuxInt
  6409  		ptr := v_0.Args[0]
  6410  		mem := v.Args[1]
  6411  		if !(is16Bit(off1 + off2)) {
  6412  			break
  6413  		}
  6414  		v.reset(OpPPC64FMOVDload)
  6415  		v.AuxInt = off1 + off2
  6416  		v.Aux = sym
  6417  		v.AddArg(ptr)
  6418  		v.AddArg(mem)
  6419  		return true
  6420  	}
  6421  	return false
  6422  }
  6423  func rewriteValuePPC64_OpPPC64FMOVDstore_0(v *Value) bool {
  6424  	// match: (FMOVDstore [off] {sym} ptr (MTVSRD x) mem)
  6425  	// cond:
  6426  	// result: (MOVDstore [off] {sym} ptr x mem)
  6427  	for {
  6428  		off := v.AuxInt
  6429  		sym := v.Aux
  6430  		_ = v.Args[2]
  6431  		ptr := v.Args[0]
  6432  		v_1 := v.Args[1]
  6433  		if v_1.Op != OpPPC64MTVSRD {
  6434  			break
  6435  		}
  6436  		x := v_1.Args[0]
  6437  		mem := v.Args[2]
  6438  		v.reset(OpPPC64MOVDstore)
  6439  		v.AuxInt = off
  6440  		v.Aux = sym
  6441  		v.AddArg(ptr)
  6442  		v.AddArg(x)
  6443  		v.AddArg(mem)
  6444  		return true
  6445  	}
  6446  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6447  	// cond: is16Bit(off1+off2)
  6448  	// result: (FMOVDstore [off1+off2] {sym} ptr val mem)
  6449  	for {
  6450  		off1 := v.AuxInt
  6451  		sym := v.Aux
  6452  		_ = v.Args[2]
  6453  		v_0 := v.Args[0]
  6454  		if v_0.Op != OpPPC64ADDconst {
  6455  			break
  6456  		}
  6457  		off2 := v_0.AuxInt
  6458  		ptr := v_0.Args[0]
  6459  		val := v.Args[1]
  6460  		mem := v.Args[2]
  6461  		if !(is16Bit(off1 + off2)) {
  6462  			break
  6463  		}
  6464  		v.reset(OpPPC64FMOVDstore)
  6465  		v.AuxInt = off1 + off2
  6466  		v.Aux = sym
  6467  		v.AddArg(ptr)
  6468  		v.AddArg(val)
  6469  		v.AddArg(mem)
  6470  		return true
  6471  	}
  6472  	// match: (FMOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  6473  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  6474  	// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  6475  	for {
  6476  		off1 := v.AuxInt
  6477  		sym1 := v.Aux
  6478  		_ = v.Args[2]
  6479  		p := v.Args[0]
  6480  		if p.Op != OpPPC64MOVDaddr {
  6481  			break
  6482  		}
  6483  		off2 := p.AuxInt
  6484  		sym2 := p.Aux
  6485  		ptr := p.Args[0]
  6486  		val := v.Args[1]
  6487  		mem := v.Args[2]
  6488  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6489  			break
  6490  		}
  6491  		v.reset(OpPPC64FMOVDstore)
  6492  		v.AuxInt = off1 + off2
  6493  		v.Aux = mergeSym(sym1, sym2)
  6494  		v.AddArg(ptr)
  6495  		v.AddArg(val)
  6496  		v.AddArg(mem)
  6497  		return true
  6498  	}
  6499  	return false
  6500  }
  6501  func rewriteValuePPC64_OpPPC64FMOVSload_0(v *Value) bool {
  6502  	// match: (FMOVSload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6503  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  6504  	// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6505  	for {
  6506  		off1 := v.AuxInt
  6507  		sym1 := v.Aux
  6508  		_ = v.Args[1]
  6509  		p := v.Args[0]
  6510  		if p.Op != OpPPC64MOVDaddr {
  6511  			break
  6512  		}
  6513  		off2 := p.AuxInt
  6514  		sym2 := p.Aux
  6515  		ptr := p.Args[0]
  6516  		mem := v.Args[1]
  6517  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6518  			break
  6519  		}
  6520  		v.reset(OpPPC64FMOVSload)
  6521  		v.AuxInt = off1 + off2
  6522  		v.Aux = mergeSym(sym1, sym2)
  6523  		v.AddArg(ptr)
  6524  		v.AddArg(mem)
  6525  		return true
  6526  	}
  6527  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  6528  	// cond: is16Bit(off1+off2)
  6529  	// result: (FMOVSload [off1+off2] {sym} ptr mem)
  6530  	for {
  6531  		off1 := v.AuxInt
  6532  		sym := v.Aux
  6533  		_ = v.Args[1]
  6534  		v_0 := v.Args[0]
  6535  		if v_0.Op != OpPPC64ADDconst {
  6536  			break
  6537  		}
  6538  		off2 := v_0.AuxInt
  6539  		ptr := v_0.Args[0]
  6540  		mem := v.Args[1]
  6541  		if !(is16Bit(off1 + off2)) {
  6542  			break
  6543  		}
  6544  		v.reset(OpPPC64FMOVSload)
  6545  		v.AuxInt = off1 + off2
  6546  		v.Aux = sym
  6547  		v.AddArg(ptr)
  6548  		v.AddArg(mem)
  6549  		return true
  6550  	}
  6551  	return false
  6552  }
  6553  func rewriteValuePPC64_OpPPC64FMOVSstore_0(v *Value) bool {
  6554  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6555  	// cond: is16Bit(off1+off2)
  6556  	// result: (FMOVSstore [off1+off2] {sym} ptr val mem)
  6557  	for {
  6558  		off1 := v.AuxInt
  6559  		sym := v.Aux
  6560  		_ = v.Args[2]
  6561  		v_0 := v.Args[0]
  6562  		if v_0.Op != OpPPC64ADDconst {
  6563  			break
  6564  		}
  6565  		off2 := v_0.AuxInt
  6566  		ptr := v_0.Args[0]
  6567  		val := v.Args[1]
  6568  		mem := v.Args[2]
  6569  		if !(is16Bit(off1 + off2)) {
  6570  			break
  6571  		}
  6572  		v.reset(OpPPC64FMOVSstore)
  6573  		v.AuxInt = off1 + off2
  6574  		v.Aux = sym
  6575  		v.AddArg(ptr)
  6576  		v.AddArg(val)
  6577  		v.AddArg(mem)
  6578  		return true
  6579  	}
  6580  	// match: (FMOVSstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  6581  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  6582  	// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  6583  	for {
  6584  		off1 := v.AuxInt
  6585  		sym1 := v.Aux
  6586  		_ = v.Args[2]
  6587  		p := v.Args[0]
  6588  		if p.Op != OpPPC64MOVDaddr {
  6589  			break
  6590  		}
  6591  		off2 := p.AuxInt
  6592  		sym2 := p.Aux
  6593  		ptr := p.Args[0]
  6594  		val := v.Args[1]
  6595  		mem := v.Args[2]
  6596  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6597  			break
  6598  		}
  6599  		v.reset(OpPPC64FMOVSstore)
  6600  		v.AuxInt = off1 + off2
  6601  		v.Aux = mergeSym(sym1, sym2)
  6602  		v.AddArg(ptr)
  6603  		v.AddArg(val)
  6604  		v.AddArg(mem)
  6605  		return true
  6606  	}
  6607  	return false
  6608  }
  6609  func rewriteValuePPC64_OpPPC64FNEG_0(v *Value) bool {
  6610  	// match: (FNEG (FABS x))
  6611  	// cond:
  6612  	// result: (FNABS x)
  6613  	for {
  6614  		v_0 := v.Args[0]
  6615  		if v_0.Op != OpPPC64FABS {
  6616  			break
  6617  		}
  6618  		x := v_0.Args[0]
  6619  		v.reset(OpPPC64FNABS)
  6620  		v.AddArg(x)
  6621  		return true
  6622  	}
  6623  	// match: (FNEG (FNABS x))
  6624  	// cond:
  6625  	// result: (FABS x)
  6626  	for {
  6627  		v_0 := v.Args[0]
  6628  		if v_0.Op != OpPPC64FNABS {
  6629  			break
  6630  		}
  6631  		x := v_0.Args[0]
  6632  		v.reset(OpPPC64FABS)
  6633  		v.AddArg(x)
  6634  		return true
  6635  	}
  6636  	return false
  6637  }
  6638  func rewriteValuePPC64_OpPPC64FSQRT_0(v *Value) bool {
  6639  	// match: (FSQRT (FMOVDconst [x]))
  6640  	// cond:
  6641  	// result: (FMOVDconst [f2i(math.Sqrt(i2f(x)))])
  6642  	for {
  6643  		v_0 := v.Args[0]
  6644  		if v_0.Op != OpPPC64FMOVDconst {
  6645  			break
  6646  		}
  6647  		x := v_0.AuxInt
  6648  		v.reset(OpPPC64FMOVDconst)
  6649  		v.AuxInt = f2i(math.Sqrt(i2f(x)))
  6650  		return true
  6651  	}
  6652  	return false
  6653  }
  6654  func rewriteValuePPC64_OpPPC64FSUB_0(v *Value) bool {
  6655  	// match: (FSUB (FMUL x y) z)
  6656  	// cond:
  6657  	// result: (FMSUB x y z)
  6658  	for {
  6659  		_ = v.Args[1]
  6660  		v_0 := v.Args[0]
  6661  		if v_0.Op != OpPPC64FMUL {
  6662  			break
  6663  		}
  6664  		_ = v_0.Args[1]
  6665  		x := v_0.Args[0]
  6666  		y := v_0.Args[1]
  6667  		z := v.Args[1]
  6668  		v.reset(OpPPC64FMSUB)
  6669  		v.AddArg(x)
  6670  		v.AddArg(y)
  6671  		v.AddArg(z)
  6672  		return true
  6673  	}
  6674  	return false
  6675  }
  6676  func rewriteValuePPC64_OpPPC64FSUBS_0(v *Value) bool {
  6677  	// match: (FSUBS (FMULS x y) z)
  6678  	// cond:
  6679  	// result: (FMSUBS x y z)
  6680  	for {
  6681  		_ = v.Args[1]
  6682  		v_0 := v.Args[0]
  6683  		if v_0.Op != OpPPC64FMULS {
  6684  			break
  6685  		}
  6686  		_ = v_0.Args[1]
  6687  		x := v_0.Args[0]
  6688  		y := v_0.Args[1]
  6689  		z := v.Args[1]
  6690  		v.reset(OpPPC64FMSUBS)
  6691  		v.AddArg(x)
  6692  		v.AddArg(y)
  6693  		v.AddArg(z)
  6694  		return true
  6695  	}
  6696  	return false
  6697  }
  6698  func rewriteValuePPC64_OpPPC64FTRUNC_0(v *Value) bool {
  6699  	// match: (FTRUNC (FMOVDconst [x]))
  6700  	// cond:
  6701  	// result: (FMOVDconst [f2i(math.Trunc(i2f(x)))])
  6702  	for {
  6703  		v_0 := v.Args[0]
  6704  		if v_0.Op != OpPPC64FMOVDconst {
  6705  			break
  6706  		}
  6707  		x := v_0.AuxInt
  6708  		v.reset(OpPPC64FMOVDconst)
  6709  		v.AuxInt = f2i(math.Trunc(i2f(x)))
  6710  		return true
  6711  	}
  6712  	return false
  6713  }
  6714  func rewriteValuePPC64_OpPPC64GreaterEqual_0(v *Value) bool {
  6715  	// match: (GreaterEqual (FlagEQ))
  6716  	// cond:
  6717  	// result: (MOVDconst [1])
  6718  	for {
  6719  		v_0 := v.Args[0]
  6720  		if v_0.Op != OpPPC64FlagEQ {
  6721  			break
  6722  		}
  6723  		v.reset(OpPPC64MOVDconst)
  6724  		v.AuxInt = 1
  6725  		return true
  6726  	}
  6727  	// match: (GreaterEqual (FlagLT))
  6728  	// cond:
  6729  	// result: (MOVDconst [0])
  6730  	for {
  6731  		v_0 := v.Args[0]
  6732  		if v_0.Op != OpPPC64FlagLT {
  6733  			break
  6734  		}
  6735  		v.reset(OpPPC64MOVDconst)
  6736  		v.AuxInt = 0
  6737  		return true
  6738  	}
  6739  	// match: (GreaterEqual (FlagGT))
  6740  	// cond:
  6741  	// result: (MOVDconst [1])
  6742  	for {
  6743  		v_0 := v.Args[0]
  6744  		if v_0.Op != OpPPC64FlagGT {
  6745  			break
  6746  		}
  6747  		v.reset(OpPPC64MOVDconst)
  6748  		v.AuxInt = 1
  6749  		return true
  6750  	}
  6751  	// match: (GreaterEqual (InvertFlags x))
  6752  	// cond:
  6753  	// result: (LessEqual x)
  6754  	for {
  6755  		v_0 := v.Args[0]
  6756  		if v_0.Op != OpPPC64InvertFlags {
  6757  			break
  6758  		}
  6759  		x := v_0.Args[0]
  6760  		v.reset(OpPPC64LessEqual)
  6761  		v.AddArg(x)
  6762  		return true
  6763  	}
  6764  	return false
  6765  }
  6766  func rewriteValuePPC64_OpPPC64GreaterThan_0(v *Value) bool {
  6767  	// match: (GreaterThan (FlagEQ))
  6768  	// cond:
  6769  	// result: (MOVDconst [0])
  6770  	for {
  6771  		v_0 := v.Args[0]
  6772  		if v_0.Op != OpPPC64FlagEQ {
  6773  			break
  6774  		}
  6775  		v.reset(OpPPC64MOVDconst)
  6776  		v.AuxInt = 0
  6777  		return true
  6778  	}
  6779  	// match: (GreaterThan (FlagLT))
  6780  	// cond:
  6781  	// result: (MOVDconst [0])
  6782  	for {
  6783  		v_0 := v.Args[0]
  6784  		if v_0.Op != OpPPC64FlagLT {
  6785  			break
  6786  		}
  6787  		v.reset(OpPPC64MOVDconst)
  6788  		v.AuxInt = 0
  6789  		return true
  6790  	}
  6791  	// match: (GreaterThan (FlagGT))
  6792  	// cond:
  6793  	// result: (MOVDconst [1])
  6794  	for {
  6795  		v_0 := v.Args[0]
  6796  		if v_0.Op != OpPPC64FlagGT {
  6797  			break
  6798  		}
  6799  		v.reset(OpPPC64MOVDconst)
  6800  		v.AuxInt = 1
  6801  		return true
  6802  	}
  6803  	// match: (GreaterThan (InvertFlags x))
  6804  	// cond:
  6805  	// result: (LessThan x)
  6806  	for {
  6807  		v_0 := v.Args[0]
  6808  		if v_0.Op != OpPPC64InvertFlags {
  6809  			break
  6810  		}
  6811  		x := v_0.Args[0]
  6812  		v.reset(OpPPC64LessThan)
  6813  		v.AddArg(x)
  6814  		return true
  6815  	}
  6816  	return false
  6817  }
  6818  func rewriteValuePPC64_OpPPC64LessEqual_0(v *Value) bool {
  6819  	// match: (LessEqual (FlagEQ))
  6820  	// cond:
  6821  	// result: (MOVDconst [1])
  6822  	for {
  6823  		v_0 := v.Args[0]
  6824  		if v_0.Op != OpPPC64FlagEQ {
  6825  			break
  6826  		}
  6827  		v.reset(OpPPC64MOVDconst)
  6828  		v.AuxInt = 1
  6829  		return true
  6830  	}
  6831  	// match: (LessEqual (FlagLT))
  6832  	// cond:
  6833  	// result: (MOVDconst [1])
  6834  	for {
  6835  		v_0 := v.Args[0]
  6836  		if v_0.Op != OpPPC64FlagLT {
  6837  			break
  6838  		}
  6839  		v.reset(OpPPC64MOVDconst)
  6840  		v.AuxInt = 1
  6841  		return true
  6842  	}
  6843  	// match: (LessEqual (FlagGT))
  6844  	// cond:
  6845  	// result: (MOVDconst [0])
  6846  	for {
  6847  		v_0 := v.Args[0]
  6848  		if v_0.Op != OpPPC64FlagGT {
  6849  			break
  6850  		}
  6851  		v.reset(OpPPC64MOVDconst)
  6852  		v.AuxInt = 0
  6853  		return true
  6854  	}
  6855  	// match: (LessEqual (InvertFlags x))
  6856  	// cond:
  6857  	// result: (GreaterEqual x)
  6858  	for {
  6859  		v_0 := v.Args[0]
  6860  		if v_0.Op != OpPPC64InvertFlags {
  6861  			break
  6862  		}
  6863  		x := v_0.Args[0]
  6864  		v.reset(OpPPC64GreaterEqual)
  6865  		v.AddArg(x)
  6866  		return true
  6867  	}
  6868  	return false
  6869  }
  6870  func rewriteValuePPC64_OpPPC64LessThan_0(v *Value) bool {
  6871  	// match: (LessThan (FlagEQ))
  6872  	// cond:
  6873  	// result: (MOVDconst [0])
  6874  	for {
  6875  		v_0 := v.Args[0]
  6876  		if v_0.Op != OpPPC64FlagEQ {
  6877  			break
  6878  		}
  6879  		v.reset(OpPPC64MOVDconst)
  6880  		v.AuxInt = 0
  6881  		return true
  6882  	}
  6883  	// match: (LessThan (FlagLT))
  6884  	// cond:
  6885  	// result: (MOVDconst [1])
  6886  	for {
  6887  		v_0 := v.Args[0]
  6888  		if v_0.Op != OpPPC64FlagLT {
  6889  			break
  6890  		}
  6891  		v.reset(OpPPC64MOVDconst)
  6892  		v.AuxInt = 1
  6893  		return true
  6894  	}
  6895  	// match: (LessThan (FlagGT))
  6896  	// cond:
  6897  	// result: (MOVDconst [0])
  6898  	for {
  6899  		v_0 := v.Args[0]
  6900  		if v_0.Op != OpPPC64FlagGT {
  6901  			break
  6902  		}
  6903  		v.reset(OpPPC64MOVDconst)
  6904  		v.AuxInt = 0
  6905  		return true
  6906  	}
  6907  	// match: (LessThan (InvertFlags x))
  6908  	// cond:
  6909  	// result: (GreaterThan x)
  6910  	for {
  6911  		v_0 := v.Args[0]
  6912  		if v_0.Op != OpPPC64InvertFlags {
  6913  			break
  6914  		}
  6915  		x := v_0.Args[0]
  6916  		v.reset(OpPPC64GreaterThan)
  6917  		v.AddArg(x)
  6918  		return true
  6919  	}
  6920  	return false
  6921  }
  6922  func rewriteValuePPC64_OpPPC64MFVSRD_0(v *Value) bool {
  6923  	b := v.Block
  6924  	_ = b
  6925  	typ := &b.Func.Config.Types
  6926  	_ = typ
  6927  	// match: (MFVSRD (FMOVDconst [c]))
  6928  	// cond:
  6929  	// result: (MOVDconst [c])
  6930  	for {
  6931  		v_0 := v.Args[0]
  6932  		if v_0.Op != OpPPC64FMOVDconst {
  6933  			break
  6934  		}
  6935  		c := v_0.AuxInt
  6936  		v.reset(OpPPC64MOVDconst)
  6937  		v.AuxInt = c
  6938  		return true
  6939  	}
  6940  	// match: (MFVSRD x:(FMOVDload [off] {sym} ptr mem))
  6941  	// cond: x.Uses == 1 && clobber(x)
  6942  	// result: @x.Block (MOVDload [off] {sym} ptr mem)
  6943  	for {
  6944  		x := v.Args[0]
  6945  		if x.Op != OpPPC64FMOVDload {
  6946  			break
  6947  		}
  6948  		off := x.AuxInt
  6949  		sym := x.Aux
  6950  		_ = x.Args[1]
  6951  		ptr := x.Args[0]
  6952  		mem := x.Args[1]
  6953  		if !(x.Uses == 1 && clobber(x)) {
  6954  			break
  6955  		}
  6956  		b = x.Block
  6957  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
  6958  		v.reset(OpCopy)
  6959  		v.AddArg(v0)
  6960  		v0.AuxInt = off
  6961  		v0.Aux = sym
  6962  		v0.AddArg(ptr)
  6963  		v0.AddArg(mem)
  6964  		return true
  6965  	}
  6966  	return false
  6967  }
  6968  func rewriteValuePPC64_OpPPC64MOVBZload_0(v *Value) bool {
  6969  	// match: (MOVBZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  6970  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  6971  	// result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  6972  	for {
  6973  		off1 := v.AuxInt
  6974  		sym1 := v.Aux
  6975  		_ = v.Args[1]
  6976  		p := v.Args[0]
  6977  		if p.Op != OpPPC64MOVDaddr {
  6978  			break
  6979  		}
  6980  		off2 := p.AuxInt
  6981  		sym2 := p.Aux
  6982  		ptr := p.Args[0]
  6983  		mem := v.Args[1]
  6984  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  6985  			break
  6986  		}
  6987  		v.reset(OpPPC64MOVBZload)
  6988  		v.AuxInt = off1 + off2
  6989  		v.Aux = mergeSym(sym1, sym2)
  6990  		v.AddArg(ptr)
  6991  		v.AddArg(mem)
  6992  		return true
  6993  	}
  6994  	// match: (MOVBZload [off1] {sym} (ADDconst [off2] x) mem)
  6995  	// cond: is16Bit(off1+off2)
  6996  	// result: (MOVBZload [off1+off2] {sym} x mem)
  6997  	for {
  6998  		off1 := v.AuxInt
  6999  		sym := v.Aux
  7000  		_ = v.Args[1]
  7001  		v_0 := v.Args[0]
  7002  		if v_0.Op != OpPPC64ADDconst {
  7003  			break
  7004  		}
  7005  		off2 := v_0.AuxInt
  7006  		x := v_0.Args[0]
  7007  		mem := v.Args[1]
  7008  		if !(is16Bit(off1 + off2)) {
  7009  			break
  7010  		}
  7011  		v.reset(OpPPC64MOVBZload)
  7012  		v.AuxInt = off1 + off2
  7013  		v.Aux = sym
  7014  		v.AddArg(x)
  7015  		v.AddArg(mem)
  7016  		return true
  7017  	}
  7018  	return false
  7019  }
  7020  func rewriteValuePPC64_OpPPC64MOVBZreg_0(v *Value) bool {
  7021  	// match: (MOVBZreg y:(ANDconst [c] _))
  7022  	// cond: uint64(c) <= 0xFF
  7023  	// result: y
  7024  	for {
  7025  		y := v.Args[0]
  7026  		if y.Op != OpPPC64ANDconst {
  7027  			break
  7028  		}
  7029  		c := y.AuxInt
  7030  		if !(uint64(c) <= 0xFF) {
  7031  			break
  7032  		}
  7033  		v.reset(OpCopy)
  7034  		v.Type = y.Type
  7035  		v.AddArg(y)
  7036  		return true
  7037  	}
  7038  	// match: (MOVBZreg y:(MOVBZreg _))
  7039  	// cond:
  7040  	// result: y
  7041  	for {
  7042  		y := v.Args[0]
  7043  		if y.Op != OpPPC64MOVBZreg {
  7044  			break
  7045  		}
  7046  		v.reset(OpCopy)
  7047  		v.Type = y.Type
  7048  		v.AddArg(y)
  7049  		return true
  7050  	}
  7051  	// match: (MOVBZreg (MOVBreg x))
  7052  	// cond:
  7053  	// result: (MOVBZreg x)
  7054  	for {
  7055  		v_0 := v.Args[0]
  7056  		if v_0.Op != OpPPC64MOVBreg {
  7057  			break
  7058  		}
  7059  		x := v_0.Args[0]
  7060  		v.reset(OpPPC64MOVBZreg)
  7061  		v.AddArg(x)
  7062  		return true
  7063  	}
  7064  	// match: (MOVBZreg x:(MOVBZload _ _))
  7065  	// cond:
  7066  	// result: x
  7067  	for {
  7068  		x := v.Args[0]
  7069  		if x.Op != OpPPC64MOVBZload {
  7070  			break
  7071  		}
  7072  		_ = x.Args[1]
  7073  		v.reset(OpCopy)
  7074  		v.Type = x.Type
  7075  		v.AddArg(x)
  7076  		return true
  7077  	}
  7078  	// match: (MOVBZreg (MOVDconst [c]))
  7079  	// cond:
  7080  	// result: (MOVDconst [int64(uint8(c))])
  7081  	for {
  7082  		v_0 := v.Args[0]
  7083  		if v_0.Op != OpPPC64MOVDconst {
  7084  			break
  7085  		}
  7086  		c := v_0.AuxInt
  7087  		v.reset(OpPPC64MOVDconst)
  7088  		v.AuxInt = int64(uint8(c))
  7089  		return true
  7090  	}
  7091  	return false
  7092  }
  7093  func rewriteValuePPC64_OpPPC64MOVBreg_0(v *Value) bool {
  7094  	// match: (MOVBreg y:(ANDconst [c] _))
  7095  	// cond: uint64(c) <= 0x7F
  7096  	// result: y
  7097  	for {
  7098  		y := v.Args[0]
  7099  		if y.Op != OpPPC64ANDconst {
  7100  			break
  7101  		}
  7102  		c := y.AuxInt
  7103  		if !(uint64(c) <= 0x7F) {
  7104  			break
  7105  		}
  7106  		v.reset(OpCopy)
  7107  		v.Type = y.Type
  7108  		v.AddArg(y)
  7109  		return true
  7110  	}
  7111  	// match: (MOVBreg y:(MOVBreg _))
  7112  	// cond:
  7113  	// result: y
  7114  	for {
  7115  		y := v.Args[0]
  7116  		if y.Op != OpPPC64MOVBreg {
  7117  			break
  7118  		}
  7119  		v.reset(OpCopy)
  7120  		v.Type = y.Type
  7121  		v.AddArg(y)
  7122  		return true
  7123  	}
  7124  	// match: (MOVBreg (MOVBZreg x))
  7125  	// cond:
  7126  	// result: (MOVBreg x)
  7127  	for {
  7128  		v_0 := v.Args[0]
  7129  		if v_0.Op != OpPPC64MOVBZreg {
  7130  			break
  7131  		}
  7132  		x := v_0.Args[0]
  7133  		v.reset(OpPPC64MOVBreg)
  7134  		v.AddArg(x)
  7135  		return true
  7136  	}
  7137  	// match: (MOVBreg (MOVDconst [c]))
  7138  	// cond:
  7139  	// result: (MOVDconst [int64(int8(c))])
  7140  	for {
  7141  		v_0 := v.Args[0]
  7142  		if v_0.Op != OpPPC64MOVDconst {
  7143  			break
  7144  		}
  7145  		c := v_0.AuxInt
  7146  		v.reset(OpPPC64MOVDconst)
  7147  		v.AuxInt = int64(int8(c))
  7148  		return true
  7149  	}
  7150  	return false
  7151  }
  7152  func rewriteValuePPC64_OpPPC64MOVBstore_0(v *Value) bool {
  7153  	b := v.Block
  7154  	_ = b
  7155  	config := b.Func.Config
  7156  	_ = config
  7157  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] x) val mem)
  7158  	// cond: is16Bit(off1+off2)
  7159  	// result: (MOVBstore [off1+off2] {sym} x val mem)
  7160  	for {
  7161  		off1 := v.AuxInt
  7162  		sym := v.Aux
  7163  		_ = v.Args[2]
  7164  		v_0 := v.Args[0]
  7165  		if v_0.Op != OpPPC64ADDconst {
  7166  			break
  7167  		}
  7168  		off2 := v_0.AuxInt
  7169  		x := v_0.Args[0]
  7170  		val := v.Args[1]
  7171  		mem := v.Args[2]
  7172  		if !(is16Bit(off1 + off2)) {
  7173  			break
  7174  		}
  7175  		v.reset(OpPPC64MOVBstore)
  7176  		v.AuxInt = off1 + off2
  7177  		v.Aux = sym
  7178  		v.AddArg(x)
  7179  		v.AddArg(val)
  7180  		v.AddArg(mem)
  7181  		return true
  7182  	}
  7183  	// match: (MOVBstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  7184  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  7185  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  7186  	for {
  7187  		off1 := v.AuxInt
  7188  		sym1 := v.Aux
  7189  		_ = v.Args[2]
  7190  		p := v.Args[0]
  7191  		if p.Op != OpPPC64MOVDaddr {
  7192  			break
  7193  		}
  7194  		off2 := p.AuxInt
  7195  		sym2 := p.Aux
  7196  		ptr := p.Args[0]
  7197  		val := v.Args[1]
  7198  		mem := v.Args[2]
  7199  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7200  			break
  7201  		}
  7202  		v.reset(OpPPC64MOVBstore)
  7203  		v.AuxInt = off1 + off2
  7204  		v.Aux = mergeSym(sym1, sym2)
  7205  		v.AddArg(ptr)
  7206  		v.AddArg(val)
  7207  		v.AddArg(mem)
  7208  		return true
  7209  	}
  7210  	// match: (MOVBstore [off] {sym} ptr (MOVDconst [c]) mem)
  7211  	// cond: c == 0
  7212  	// result: (MOVBstorezero [off] {sym} ptr mem)
  7213  	for {
  7214  		off := v.AuxInt
  7215  		sym := v.Aux
  7216  		_ = v.Args[2]
  7217  		ptr := v.Args[0]
  7218  		v_1 := v.Args[1]
  7219  		if v_1.Op != OpPPC64MOVDconst {
  7220  			break
  7221  		}
  7222  		c := v_1.AuxInt
  7223  		mem := v.Args[2]
  7224  		if !(c == 0) {
  7225  			break
  7226  		}
  7227  		v.reset(OpPPC64MOVBstorezero)
  7228  		v.AuxInt = off
  7229  		v.Aux = sym
  7230  		v.AddArg(ptr)
  7231  		v.AddArg(mem)
  7232  		return true
  7233  	}
  7234  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  7235  	// cond:
  7236  	// result: (MOVBstore [off] {sym} ptr x mem)
  7237  	for {
  7238  		off := v.AuxInt
  7239  		sym := v.Aux
  7240  		_ = v.Args[2]
  7241  		ptr := v.Args[0]
  7242  		v_1 := v.Args[1]
  7243  		if v_1.Op != OpPPC64MOVBreg {
  7244  			break
  7245  		}
  7246  		x := v_1.Args[0]
  7247  		mem := v.Args[2]
  7248  		v.reset(OpPPC64MOVBstore)
  7249  		v.AuxInt = off
  7250  		v.Aux = sym
  7251  		v.AddArg(ptr)
  7252  		v.AddArg(x)
  7253  		v.AddArg(mem)
  7254  		return true
  7255  	}
  7256  	// match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem)
  7257  	// cond:
  7258  	// result: (MOVBstore [off] {sym} ptr x mem)
  7259  	for {
  7260  		off := v.AuxInt
  7261  		sym := v.Aux
  7262  		_ = v.Args[2]
  7263  		ptr := v.Args[0]
  7264  		v_1 := v.Args[1]
  7265  		if v_1.Op != OpPPC64MOVBZreg {
  7266  			break
  7267  		}
  7268  		x := v_1.Args[0]
  7269  		mem := v.Args[2]
  7270  		v.reset(OpPPC64MOVBstore)
  7271  		v.AuxInt = off
  7272  		v.Aux = sym
  7273  		v.AddArg(ptr)
  7274  		v.AddArg(x)
  7275  		v.AddArg(mem)
  7276  		return true
  7277  	}
  7278  	// match: (MOVBstore [i1] {s} p (SRWconst (MOVHZreg w) [8]) x0:(MOVBstore [i0] {s} p w mem))
  7279  	// cond: !config.BigEndian 	&& x0.Uses == 1 	&& i1 == i0+1 	&& clobber(x0)
  7280  	// result: (MOVHstore [i0] {s} p w mem)
  7281  	for {
  7282  		i1 := v.AuxInt
  7283  		s := v.Aux
  7284  		_ = v.Args[2]
  7285  		p := v.Args[0]
  7286  		v_1 := v.Args[1]
  7287  		if v_1.Op != OpPPC64SRWconst {
  7288  			break
  7289  		}
  7290  		if v_1.AuxInt != 8 {
  7291  			break
  7292  		}
  7293  		v_1_0 := v_1.Args[0]
  7294  		if v_1_0.Op != OpPPC64MOVHZreg {
  7295  			break
  7296  		}
  7297  		w := v_1_0.Args[0]
  7298  		x0 := v.Args[2]
  7299  		if x0.Op != OpPPC64MOVBstore {
  7300  			break
  7301  		}
  7302  		i0 := x0.AuxInt
  7303  		if x0.Aux != s {
  7304  			break
  7305  		}
  7306  		_ = x0.Args[2]
  7307  		if p != x0.Args[0] {
  7308  			break
  7309  		}
  7310  		if w != x0.Args[1] {
  7311  			break
  7312  		}
  7313  		mem := x0.Args[2]
  7314  		if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
  7315  			break
  7316  		}
  7317  		v.reset(OpPPC64MOVHstore)
  7318  		v.AuxInt = i0
  7319  		v.Aux = s
  7320  		v.AddArg(p)
  7321  		v.AddArg(w)
  7322  		v.AddArg(mem)
  7323  		return true
  7324  	}
  7325  	// match: (MOVBstore [i3] {s} p (SRWconst w [24]) x0:(MOVBstore [i2] {s} p (SRWconst w [16]) x1:(MOVBstore [i1] {s} p (SRWconst w [8]) x2:(MOVBstore [i0] {s} p w mem))))
  7326  	// cond: !config.BigEndian 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 	&& i1 == i0+1 && i2 == i0+2 && i3 == i0+3 	&& clobber(x0) && clobber(x1) && clobber(x2)
  7327  	// result: (MOVWstore [i0] {s} p w mem)
  7328  	for {
  7329  		i3 := v.AuxInt
  7330  		s := v.Aux
  7331  		_ = v.Args[2]
  7332  		p := v.Args[0]
  7333  		v_1 := v.Args[1]
  7334  		if v_1.Op != OpPPC64SRWconst {
  7335  			break
  7336  		}
  7337  		if v_1.AuxInt != 24 {
  7338  			break
  7339  		}
  7340  		w := v_1.Args[0]
  7341  		x0 := v.Args[2]
  7342  		if x0.Op != OpPPC64MOVBstore {
  7343  			break
  7344  		}
  7345  		i2 := x0.AuxInt
  7346  		if x0.Aux != s {
  7347  			break
  7348  		}
  7349  		_ = x0.Args[2]
  7350  		if p != x0.Args[0] {
  7351  			break
  7352  		}
  7353  		x0_1 := x0.Args[1]
  7354  		if x0_1.Op != OpPPC64SRWconst {
  7355  			break
  7356  		}
  7357  		if x0_1.AuxInt != 16 {
  7358  			break
  7359  		}
  7360  		if w != x0_1.Args[0] {
  7361  			break
  7362  		}
  7363  		x1 := x0.Args[2]
  7364  		if x1.Op != OpPPC64MOVBstore {
  7365  			break
  7366  		}
  7367  		i1 := x1.AuxInt
  7368  		if x1.Aux != s {
  7369  			break
  7370  		}
  7371  		_ = x1.Args[2]
  7372  		if p != x1.Args[0] {
  7373  			break
  7374  		}
  7375  		x1_1 := x1.Args[1]
  7376  		if x1_1.Op != OpPPC64SRWconst {
  7377  			break
  7378  		}
  7379  		if x1_1.AuxInt != 8 {
  7380  			break
  7381  		}
  7382  		if w != x1_1.Args[0] {
  7383  			break
  7384  		}
  7385  		x2 := x1.Args[2]
  7386  		if x2.Op != OpPPC64MOVBstore {
  7387  			break
  7388  		}
  7389  		i0 := x2.AuxInt
  7390  		if x2.Aux != s {
  7391  			break
  7392  		}
  7393  		_ = x2.Args[2]
  7394  		if p != x2.Args[0] {
  7395  			break
  7396  		}
  7397  		if w != x2.Args[1] {
  7398  			break
  7399  		}
  7400  		mem := x2.Args[2]
  7401  		if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)) {
  7402  			break
  7403  		}
  7404  		v.reset(OpPPC64MOVWstore)
  7405  		v.AuxInt = i0
  7406  		v.Aux = s
  7407  		v.AddArg(p)
  7408  		v.AddArg(w)
  7409  		v.AddArg(mem)
  7410  		return true
  7411  	}
  7412  	// match: (MOVBstore [i7] {s} p (SRDconst w [56]) x0:(MOVBstore [i6] {s} p (SRDconst w [48]) x1:(MOVBstore [i5] {s} p (SRDconst w [40]) x2:(MOVBstore [i4] {s} p (SRDconst w [32]) x3:(MOVBstore [i3] {s} p (SRDconst w [24]) x4:(MOVBstore [i2] {s} p (SRDconst w [16]) x5:(MOVBstore [i1] {s} p (SRDconst w [8]) x6:(MOVBstore [i0] {s} p w mem))))))))
  7413  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 	&& i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)
  7414  	// result: (MOVDstore [i0] {s} p w mem)
  7415  	for {
  7416  		i7 := v.AuxInt
  7417  		s := v.Aux
  7418  		_ = v.Args[2]
  7419  		p := v.Args[0]
  7420  		v_1 := v.Args[1]
  7421  		if v_1.Op != OpPPC64SRDconst {
  7422  			break
  7423  		}
  7424  		if v_1.AuxInt != 56 {
  7425  			break
  7426  		}
  7427  		w := v_1.Args[0]
  7428  		x0 := v.Args[2]
  7429  		if x0.Op != OpPPC64MOVBstore {
  7430  			break
  7431  		}
  7432  		i6 := x0.AuxInt
  7433  		if x0.Aux != s {
  7434  			break
  7435  		}
  7436  		_ = x0.Args[2]
  7437  		if p != x0.Args[0] {
  7438  			break
  7439  		}
  7440  		x0_1 := x0.Args[1]
  7441  		if x0_1.Op != OpPPC64SRDconst {
  7442  			break
  7443  		}
  7444  		if x0_1.AuxInt != 48 {
  7445  			break
  7446  		}
  7447  		if w != x0_1.Args[0] {
  7448  			break
  7449  		}
  7450  		x1 := x0.Args[2]
  7451  		if x1.Op != OpPPC64MOVBstore {
  7452  			break
  7453  		}
  7454  		i5 := x1.AuxInt
  7455  		if x1.Aux != s {
  7456  			break
  7457  		}
  7458  		_ = x1.Args[2]
  7459  		if p != x1.Args[0] {
  7460  			break
  7461  		}
  7462  		x1_1 := x1.Args[1]
  7463  		if x1_1.Op != OpPPC64SRDconst {
  7464  			break
  7465  		}
  7466  		if x1_1.AuxInt != 40 {
  7467  			break
  7468  		}
  7469  		if w != x1_1.Args[0] {
  7470  			break
  7471  		}
  7472  		x2 := x1.Args[2]
  7473  		if x2.Op != OpPPC64MOVBstore {
  7474  			break
  7475  		}
  7476  		i4 := x2.AuxInt
  7477  		if x2.Aux != s {
  7478  			break
  7479  		}
  7480  		_ = x2.Args[2]
  7481  		if p != x2.Args[0] {
  7482  			break
  7483  		}
  7484  		x2_1 := x2.Args[1]
  7485  		if x2_1.Op != OpPPC64SRDconst {
  7486  			break
  7487  		}
  7488  		if x2_1.AuxInt != 32 {
  7489  			break
  7490  		}
  7491  		if w != x2_1.Args[0] {
  7492  			break
  7493  		}
  7494  		x3 := x2.Args[2]
  7495  		if x3.Op != OpPPC64MOVBstore {
  7496  			break
  7497  		}
  7498  		i3 := x3.AuxInt
  7499  		if x3.Aux != s {
  7500  			break
  7501  		}
  7502  		_ = x3.Args[2]
  7503  		if p != x3.Args[0] {
  7504  			break
  7505  		}
  7506  		x3_1 := x3.Args[1]
  7507  		if x3_1.Op != OpPPC64SRDconst {
  7508  			break
  7509  		}
  7510  		if x3_1.AuxInt != 24 {
  7511  			break
  7512  		}
  7513  		if w != x3_1.Args[0] {
  7514  			break
  7515  		}
  7516  		x4 := x3.Args[2]
  7517  		if x4.Op != OpPPC64MOVBstore {
  7518  			break
  7519  		}
  7520  		i2 := x4.AuxInt
  7521  		if x4.Aux != s {
  7522  			break
  7523  		}
  7524  		_ = x4.Args[2]
  7525  		if p != x4.Args[0] {
  7526  			break
  7527  		}
  7528  		x4_1 := x4.Args[1]
  7529  		if x4_1.Op != OpPPC64SRDconst {
  7530  			break
  7531  		}
  7532  		if x4_1.AuxInt != 16 {
  7533  			break
  7534  		}
  7535  		if w != x4_1.Args[0] {
  7536  			break
  7537  		}
  7538  		x5 := x4.Args[2]
  7539  		if x5.Op != OpPPC64MOVBstore {
  7540  			break
  7541  		}
  7542  		i1 := x5.AuxInt
  7543  		if x5.Aux != s {
  7544  			break
  7545  		}
  7546  		_ = x5.Args[2]
  7547  		if p != x5.Args[0] {
  7548  			break
  7549  		}
  7550  		x5_1 := x5.Args[1]
  7551  		if x5_1.Op != OpPPC64SRDconst {
  7552  			break
  7553  		}
  7554  		if x5_1.AuxInt != 8 {
  7555  			break
  7556  		}
  7557  		if w != x5_1.Args[0] {
  7558  			break
  7559  		}
  7560  		x6 := x5.Args[2]
  7561  		if x6.Op != OpPPC64MOVBstore {
  7562  			break
  7563  		}
  7564  		i0 := x6.AuxInt
  7565  		if x6.Aux != s {
  7566  			break
  7567  		}
  7568  		_ = x6.Args[2]
  7569  		if p != x6.Args[0] {
  7570  			break
  7571  		}
  7572  		if w != x6.Args[1] {
  7573  			break
  7574  		}
  7575  		mem := x6.Args[2]
  7576  		if !(!config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
  7577  			break
  7578  		}
  7579  		v.reset(OpPPC64MOVDstore)
  7580  		v.AuxInt = i0
  7581  		v.Aux = s
  7582  		v.AddArg(p)
  7583  		v.AddArg(w)
  7584  		v.AddArg(mem)
  7585  		return true
  7586  	}
  7587  	return false
  7588  }
  7589  func rewriteValuePPC64_OpPPC64MOVBstorezero_0(v *Value) bool {
  7590  	// match: (MOVBstorezero [off1] {sym} (ADDconst [off2] x) mem)
  7591  	// cond: is16Bit(off1+off2)
  7592  	// result: (MOVBstorezero [off1+off2] {sym} x mem)
  7593  	for {
  7594  		off1 := v.AuxInt
  7595  		sym := v.Aux
  7596  		_ = v.Args[1]
  7597  		v_0 := v.Args[0]
  7598  		if v_0.Op != OpPPC64ADDconst {
  7599  			break
  7600  		}
  7601  		off2 := v_0.AuxInt
  7602  		x := v_0.Args[0]
  7603  		mem := v.Args[1]
  7604  		if !(is16Bit(off1 + off2)) {
  7605  			break
  7606  		}
  7607  		v.reset(OpPPC64MOVBstorezero)
  7608  		v.AuxInt = off1 + off2
  7609  		v.Aux = sym
  7610  		v.AddArg(x)
  7611  		v.AddArg(mem)
  7612  		return true
  7613  	}
  7614  	// match: (MOVBstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  7615  	// cond: canMergeSym(sym1,sym2) 	&& (x.Op != OpSB || p.Uses == 1)
  7616  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  7617  	for {
  7618  		off1 := v.AuxInt
  7619  		sym1 := v.Aux
  7620  		_ = v.Args[1]
  7621  		p := v.Args[0]
  7622  		if p.Op != OpPPC64MOVDaddr {
  7623  			break
  7624  		}
  7625  		off2 := p.AuxInt
  7626  		sym2 := p.Aux
  7627  		x := p.Args[0]
  7628  		mem := v.Args[1]
  7629  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  7630  			break
  7631  		}
  7632  		v.reset(OpPPC64MOVBstorezero)
  7633  		v.AuxInt = off1 + off2
  7634  		v.Aux = mergeSym(sym1, sym2)
  7635  		v.AddArg(x)
  7636  		v.AddArg(mem)
  7637  		return true
  7638  	}
  7639  	return false
  7640  }
  7641  func rewriteValuePPC64_OpPPC64MOVDload_0(v *Value) bool {
  7642  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr x _))
  7643  	// cond:
  7644  	// result: (MFVSRD x)
  7645  	for {
  7646  		off := v.AuxInt
  7647  		sym := v.Aux
  7648  		_ = v.Args[1]
  7649  		ptr := v.Args[0]
  7650  		v_1 := v.Args[1]
  7651  		if v_1.Op != OpPPC64FMOVDstore {
  7652  			break
  7653  		}
  7654  		if v_1.AuxInt != off {
  7655  			break
  7656  		}
  7657  		if v_1.Aux != sym {
  7658  			break
  7659  		}
  7660  		_ = v_1.Args[2]
  7661  		if ptr != v_1.Args[0] {
  7662  			break
  7663  		}
  7664  		x := v_1.Args[1]
  7665  		v.reset(OpPPC64MFVSRD)
  7666  		v.AddArg(x)
  7667  		return true
  7668  	}
  7669  	// match: (MOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  7670  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  7671  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  7672  	for {
  7673  		off1 := v.AuxInt
  7674  		sym1 := v.Aux
  7675  		_ = v.Args[1]
  7676  		p := v.Args[0]
  7677  		if p.Op != OpPPC64MOVDaddr {
  7678  			break
  7679  		}
  7680  		off2 := p.AuxInt
  7681  		sym2 := p.Aux
  7682  		ptr := p.Args[0]
  7683  		mem := v.Args[1]
  7684  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7685  			break
  7686  		}
  7687  		v.reset(OpPPC64MOVDload)
  7688  		v.AuxInt = off1 + off2
  7689  		v.Aux = mergeSym(sym1, sym2)
  7690  		v.AddArg(ptr)
  7691  		v.AddArg(mem)
  7692  		return true
  7693  	}
  7694  	// match: (MOVDload [off1] {sym} (ADDconst [off2] x) mem)
  7695  	// cond: is16Bit(off1+off2)
  7696  	// result: (MOVDload [off1+off2] {sym} x mem)
  7697  	for {
  7698  		off1 := v.AuxInt
  7699  		sym := v.Aux
  7700  		_ = v.Args[1]
  7701  		v_0 := v.Args[0]
  7702  		if v_0.Op != OpPPC64ADDconst {
  7703  			break
  7704  		}
  7705  		off2 := v_0.AuxInt
  7706  		x := v_0.Args[0]
  7707  		mem := v.Args[1]
  7708  		if !(is16Bit(off1 + off2)) {
  7709  			break
  7710  		}
  7711  		v.reset(OpPPC64MOVDload)
  7712  		v.AuxInt = off1 + off2
  7713  		v.Aux = sym
  7714  		v.AddArg(x)
  7715  		v.AddArg(mem)
  7716  		return true
  7717  	}
  7718  	return false
  7719  }
  7720  func rewriteValuePPC64_OpPPC64MOVDstore_0(v *Value) bool {
  7721  	// match: (MOVDstore [off] {sym} ptr (MFVSRD x) mem)
  7722  	// cond:
  7723  	// result: (FMOVDstore [off] {sym} ptr x mem)
  7724  	for {
  7725  		off := v.AuxInt
  7726  		sym := v.Aux
  7727  		_ = v.Args[2]
  7728  		ptr := v.Args[0]
  7729  		v_1 := v.Args[1]
  7730  		if v_1.Op != OpPPC64MFVSRD {
  7731  			break
  7732  		}
  7733  		x := v_1.Args[0]
  7734  		mem := v.Args[2]
  7735  		v.reset(OpPPC64FMOVDstore)
  7736  		v.AuxInt = off
  7737  		v.Aux = sym
  7738  		v.AddArg(ptr)
  7739  		v.AddArg(x)
  7740  		v.AddArg(mem)
  7741  		return true
  7742  	}
  7743  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] x) val mem)
  7744  	// cond: is16Bit(off1+off2)
  7745  	// result: (MOVDstore [off1+off2] {sym} x val mem)
  7746  	for {
  7747  		off1 := v.AuxInt
  7748  		sym := v.Aux
  7749  		_ = v.Args[2]
  7750  		v_0 := v.Args[0]
  7751  		if v_0.Op != OpPPC64ADDconst {
  7752  			break
  7753  		}
  7754  		off2 := v_0.AuxInt
  7755  		x := v_0.Args[0]
  7756  		val := v.Args[1]
  7757  		mem := v.Args[2]
  7758  		if !(is16Bit(off1 + off2)) {
  7759  			break
  7760  		}
  7761  		v.reset(OpPPC64MOVDstore)
  7762  		v.AuxInt = off1 + off2
  7763  		v.Aux = sym
  7764  		v.AddArg(x)
  7765  		v.AddArg(val)
  7766  		v.AddArg(mem)
  7767  		return true
  7768  	}
  7769  	// match: (MOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  7770  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  7771  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  7772  	for {
  7773  		off1 := v.AuxInt
  7774  		sym1 := v.Aux
  7775  		_ = v.Args[2]
  7776  		p := v.Args[0]
  7777  		if p.Op != OpPPC64MOVDaddr {
  7778  			break
  7779  		}
  7780  		off2 := p.AuxInt
  7781  		sym2 := p.Aux
  7782  		ptr := p.Args[0]
  7783  		val := v.Args[1]
  7784  		mem := v.Args[2]
  7785  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7786  			break
  7787  		}
  7788  		v.reset(OpPPC64MOVDstore)
  7789  		v.AuxInt = off1 + off2
  7790  		v.Aux = mergeSym(sym1, sym2)
  7791  		v.AddArg(ptr)
  7792  		v.AddArg(val)
  7793  		v.AddArg(mem)
  7794  		return true
  7795  	}
  7796  	// match: (MOVDstore [off] {sym} ptr (MOVDconst [c]) mem)
  7797  	// cond: c == 0
  7798  	// result: (MOVDstorezero [off] {sym} ptr mem)
  7799  	for {
  7800  		off := v.AuxInt
  7801  		sym := v.Aux
  7802  		_ = v.Args[2]
  7803  		ptr := v.Args[0]
  7804  		v_1 := v.Args[1]
  7805  		if v_1.Op != OpPPC64MOVDconst {
  7806  			break
  7807  		}
  7808  		c := v_1.AuxInt
  7809  		mem := v.Args[2]
  7810  		if !(c == 0) {
  7811  			break
  7812  		}
  7813  		v.reset(OpPPC64MOVDstorezero)
  7814  		v.AuxInt = off
  7815  		v.Aux = sym
  7816  		v.AddArg(ptr)
  7817  		v.AddArg(mem)
  7818  		return true
  7819  	}
  7820  	return false
  7821  }
  7822  func rewriteValuePPC64_OpPPC64MOVDstorezero_0(v *Value) bool {
  7823  	// match: (MOVDstorezero [off1] {sym} (ADDconst [off2] x) mem)
  7824  	// cond: is16Bit(off1+off2)
  7825  	// result: (MOVDstorezero [off1+off2] {sym} x mem)
  7826  	for {
  7827  		off1 := v.AuxInt
  7828  		sym := v.Aux
  7829  		_ = v.Args[1]
  7830  		v_0 := v.Args[0]
  7831  		if v_0.Op != OpPPC64ADDconst {
  7832  			break
  7833  		}
  7834  		off2 := v_0.AuxInt
  7835  		x := v_0.Args[0]
  7836  		mem := v.Args[1]
  7837  		if !(is16Bit(off1 + off2)) {
  7838  			break
  7839  		}
  7840  		v.reset(OpPPC64MOVDstorezero)
  7841  		v.AuxInt = off1 + off2
  7842  		v.Aux = sym
  7843  		v.AddArg(x)
  7844  		v.AddArg(mem)
  7845  		return true
  7846  	}
  7847  	// match: (MOVDstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  7848  	// cond: canMergeSym(sym1,sym2) 	&& (x.Op != OpSB || p.Uses == 1)
  7849  	// result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  7850  	for {
  7851  		off1 := v.AuxInt
  7852  		sym1 := v.Aux
  7853  		_ = v.Args[1]
  7854  		p := v.Args[0]
  7855  		if p.Op != OpPPC64MOVDaddr {
  7856  			break
  7857  		}
  7858  		off2 := p.AuxInt
  7859  		sym2 := p.Aux
  7860  		x := p.Args[0]
  7861  		mem := v.Args[1]
  7862  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  7863  			break
  7864  		}
  7865  		v.reset(OpPPC64MOVDstorezero)
  7866  		v.AuxInt = off1 + off2
  7867  		v.Aux = mergeSym(sym1, sym2)
  7868  		v.AddArg(x)
  7869  		v.AddArg(mem)
  7870  		return true
  7871  	}
  7872  	return false
  7873  }
  7874  func rewriteValuePPC64_OpPPC64MOVHZload_0(v *Value) bool {
  7875  	// match: (MOVHZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  7876  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  7877  	// result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  7878  	for {
  7879  		off1 := v.AuxInt
  7880  		sym1 := v.Aux
  7881  		_ = v.Args[1]
  7882  		p := v.Args[0]
  7883  		if p.Op != OpPPC64MOVDaddr {
  7884  			break
  7885  		}
  7886  		off2 := p.AuxInt
  7887  		sym2 := p.Aux
  7888  		ptr := p.Args[0]
  7889  		mem := v.Args[1]
  7890  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  7891  			break
  7892  		}
  7893  		v.reset(OpPPC64MOVHZload)
  7894  		v.AuxInt = off1 + off2
  7895  		v.Aux = mergeSym(sym1, sym2)
  7896  		v.AddArg(ptr)
  7897  		v.AddArg(mem)
  7898  		return true
  7899  	}
  7900  	// match: (MOVHZload [off1] {sym} (ADDconst [off2] x) mem)
  7901  	// cond: is16Bit(off1+off2)
  7902  	// result: (MOVHZload [off1+off2] {sym} x mem)
  7903  	for {
  7904  		off1 := v.AuxInt
  7905  		sym := v.Aux
  7906  		_ = v.Args[1]
  7907  		v_0 := v.Args[0]
  7908  		if v_0.Op != OpPPC64ADDconst {
  7909  			break
  7910  		}
  7911  		off2 := v_0.AuxInt
  7912  		x := v_0.Args[0]
  7913  		mem := v.Args[1]
  7914  		if !(is16Bit(off1 + off2)) {
  7915  			break
  7916  		}
  7917  		v.reset(OpPPC64MOVHZload)
  7918  		v.AuxInt = off1 + off2
  7919  		v.Aux = sym
  7920  		v.AddArg(x)
  7921  		v.AddArg(mem)
  7922  		return true
  7923  	}
  7924  	return false
  7925  }
  7926  func rewriteValuePPC64_OpPPC64MOVHZreg_0(v *Value) bool {
  7927  	// match: (MOVHZreg y:(ANDconst [c] _))
  7928  	// cond: uint64(c) <= 0xFFFF
  7929  	// result: y
  7930  	for {
  7931  		y := v.Args[0]
  7932  		if y.Op != OpPPC64ANDconst {
  7933  			break
  7934  		}
  7935  		c := y.AuxInt
  7936  		if !(uint64(c) <= 0xFFFF) {
  7937  			break
  7938  		}
  7939  		v.reset(OpCopy)
  7940  		v.Type = y.Type
  7941  		v.AddArg(y)
  7942  		return true
  7943  	}
  7944  	// match: (MOVHZreg y:(MOVHZreg _))
  7945  	// cond:
  7946  	// result: y
  7947  	for {
  7948  		y := v.Args[0]
  7949  		if y.Op != OpPPC64MOVHZreg {
  7950  			break
  7951  		}
  7952  		v.reset(OpCopy)
  7953  		v.Type = y.Type
  7954  		v.AddArg(y)
  7955  		return true
  7956  	}
  7957  	// match: (MOVHZreg y:(MOVBZreg _))
  7958  	// cond:
  7959  	// result: y
  7960  	for {
  7961  		y := v.Args[0]
  7962  		if y.Op != OpPPC64MOVBZreg {
  7963  			break
  7964  		}
  7965  		v.reset(OpCopy)
  7966  		v.Type = y.Type
  7967  		v.AddArg(y)
  7968  		return true
  7969  	}
  7970  	// match: (MOVHZreg y:(MOVHreg x))
  7971  	// cond:
  7972  	// result: (MOVHZreg x)
  7973  	for {
  7974  		y := v.Args[0]
  7975  		if y.Op != OpPPC64MOVHreg {
  7976  			break
  7977  		}
  7978  		x := y.Args[0]
  7979  		v.reset(OpPPC64MOVHZreg)
  7980  		v.AddArg(x)
  7981  		return true
  7982  	}
  7983  	// match: (MOVHZreg x:(MOVHZload _ _))
  7984  	// cond:
  7985  	// result: x
  7986  	for {
  7987  		x := v.Args[0]
  7988  		if x.Op != OpPPC64MOVHZload {
  7989  			break
  7990  		}
  7991  		_ = x.Args[1]
  7992  		v.reset(OpCopy)
  7993  		v.Type = x.Type
  7994  		v.AddArg(x)
  7995  		return true
  7996  	}
  7997  	// match: (MOVHZreg (MOVDconst [c]))
  7998  	// cond:
  7999  	// result: (MOVDconst [int64(uint16(c))])
  8000  	for {
  8001  		v_0 := v.Args[0]
  8002  		if v_0.Op != OpPPC64MOVDconst {
  8003  			break
  8004  		}
  8005  		c := v_0.AuxInt
  8006  		v.reset(OpPPC64MOVDconst)
  8007  		v.AuxInt = int64(uint16(c))
  8008  		return true
  8009  	}
  8010  	return false
  8011  }
  8012  func rewriteValuePPC64_OpPPC64MOVHload_0(v *Value) bool {
  8013  	// match: (MOVHload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  8014  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  8015  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  8016  	for {
  8017  		off1 := v.AuxInt
  8018  		sym1 := v.Aux
  8019  		_ = v.Args[1]
  8020  		p := v.Args[0]
  8021  		if p.Op != OpPPC64MOVDaddr {
  8022  			break
  8023  		}
  8024  		off2 := p.AuxInt
  8025  		sym2 := p.Aux
  8026  		ptr := p.Args[0]
  8027  		mem := v.Args[1]
  8028  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8029  			break
  8030  		}
  8031  		v.reset(OpPPC64MOVHload)
  8032  		v.AuxInt = off1 + off2
  8033  		v.Aux = mergeSym(sym1, sym2)
  8034  		v.AddArg(ptr)
  8035  		v.AddArg(mem)
  8036  		return true
  8037  	}
  8038  	// match: (MOVHload [off1] {sym} (ADDconst [off2] x) mem)
  8039  	// cond: is16Bit(off1+off2)
  8040  	// result: (MOVHload [off1+off2] {sym} x mem)
  8041  	for {
  8042  		off1 := v.AuxInt
  8043  		sym := v.Aux
  8044  		_ = v.Args[1]
  8045  		v_0 := v.Args[0]
  8046  		if v_0.Op != OpPPC64ADDconst {
  8047  			break
  8048  		}
  8049  		off2 := v_0.AuxInt
  8050  		x := v_0.Args[0]
  8051  		mem := v.Args[1]
  8052  		if !(is16Bit(off1 + off2)) {
  8053  			break
  8054  		}
  8055  		v.reset(OpPPC64MOVHload)
  8056  		v.AuxInt = off1 + off2
  8057  		v.Aux = sym
  8058  		v.AddArg(x)
  8059  		v.AddArg(mem)
  8060  		return true
  8061  	}
  8062  	return false
  8063  }
  8064  func rewriteValuePPC64_OpPPC64MOVHreg_0(v *Value) bool {
  8065  	// match: (MOVHreg y:(ANDconst [c] _))
  8066  	// cond: uint64(c) <= 0x7FFF
  8067  	// result: y
  8068  	for {
  8069  		y := v.Args[0]
  8070  		if y.Op != OpPPC64ANDconst {
  8071  			break
  8072  		}
  8073  		c := y.AuxInt
  8074  		if !(uint64(c) <= 0x7FFF) {
  8075  			break
  8076  		}
  8077  		v.reset(OpCopy)
  8078  		v.Type = y.Type
  8079  		v.AddArg(y)
  8080  		return true
  8081  	}
  8082  	// match: (MOVHreg y:(MOVHreg _))
  8083  	// cond:
  8084  	// result: y
  8085  	for {
  8086  		y := v.Args[0]
  8087  		if y.Op != OpPPC64MOVHreg {
  8088  			break
  8089  		}
  8090  		v.reset(OpCopy)
  8091  		v.Type = y.Type
  8092  		v.AddArg(y)
  8093  		return true
  8094  	}
  8095  	// match: (MOVHreg y:(MOVBreg _))
  8096  	// cond:
  8097  	// result: y
  8098  	for {
  8099  		y := v.Args[0]
  8100  		if y.Op != OpPPC64MOVBreg {
  8101  			break
  8102  		}
  8103  		v.reset(OpCopy)
  8104  		v.Type = y.Type
  8105  		v.AddArg(y)
  8106  		return true
  8107  	}
  8108  	// match: (MOVHreg y:(MOVHZreg x))
  8109  	// cond:
  8110  	// result: (MOVHreg x)
  8111  	for {
  8112  		y := v.Args[0]
  8113  		if y.Op != OpPPC64MOVHZreg {
  8114  			break
  8115  		}
  8116  		x := y.Args[0]
  8117  		v.reset(OpPPC64MOVHreg)
  8118  		v.AddArg(x)
  8119  		return true
  8120  	}
  8121  	// match: (MOVHreg x:(MOVHload _ _))
  8122  	// cond:
  8123  	// result: x
  8124  	for {
  8125  		x := v.Args[0]
  8126  		if x.Op != OpPPC64MOVHload {
  8127  			break
  8128  		}
  8129  		_ = x.Args[1]
  8130  		v.reset(OpCopy)
  8131  		v.Type = x.Type
  8132  		v.AddArg(x)
  8133  		return true
  8134  	}
  8135  	// match: (MOVHreg (MOVDconst [c]))
  8136  	// cond:
  8137  	// result: (MOVDconst [int64(int16(c))])
  8138  	for {
  8139  		v_0 := v.Args[0]
  8140  		if v_0.Op != OpPPC64MOVDconst {
  8141  			break
  8142  		}
  8143  		c := v_0.AuxInt
  8144  		v.reset(OpPPC64MOVDconst)
  8145  		v.AuxInt = int64(int16(c))
  8146  		return true
  8147  	}
  8148  	return false
  8149  }
  8150  func rewriteValuePPC64_OpPPC64MOVHstore_0(v *Value) bool {
  8151  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] x) val mem)
  8152  	// cond: is16Bit(off1+off2)
  8153  	// result: (MOVHstore [off1+off2] {sym} x val mem)
  8154  	for {
  8155  		off1 := v.AuxInt
  8156  		sym := v.Aux
  8157  		_ = v.Args[2]
  8158  		v_0 := v.Args[0]
  8159  		if v_0.Op != OpPPC64ADDconst {
  8160  			break
  8161  		}
  8162  		off2 := v_0.AuxInt
  8163  		x := v_0.Args[0]
  8164  		val := v.Args[1]
  8165  		mem := v.Args[2]
  8166  		if !(is16Bit(off1 + off2)) {
  8167  			break
  8168  		}
  8169  		v.reset(OpPPC64MOVHstore)
  8170  		v.AuxInt = off1 + off2
  8171  		v.Aux = sym
  8172  		v.AddArg(x)
  8173  		v.AddArg(val)
  8174  		v.AddArg(mem)
  8175  		return true
  8176  	}
  8177  	// match: (MOVHstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  8178  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  8179  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  8180  	for {
  8181  		off1 := v.AuxInt
  8182  		sym1 := v.Aux
  8183  		_ = v.Args[2]
  8184  		p := v.Args[0]
  8185  		if p.Op != OpPPC64MOVDaddr {
  8186  			break
  8187  		}
  8188  		off2 := p.AuxInt
  8189  		sym2 := p.Aux
  8190  		ptr := p.Args[0]
  8191  		val := v.Args[1]
  8192  		mem := v.Args[2]
  8193  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8194  			break
  8195  		}
  8196  		v.reset(OpPPC64MOVHstore)
  8197  		v.AuxInt = off1 + off2
  8198  		v.Aux = mergeSym(sym1, sym2)
  8199  		v.AddArg(ptr)
  8200  		v.AddArg(val)
  8201  		v.AddArg(mem)
  8202  		return true
  8203  	}
  8204  	// match: (MOVHstore [off] {sym} ptr (MOVDconst [c]) mem)
  8205  	// cond: c == 0
  8206  	// result: (MOVHstorezero [off] {sym} ptr mem)
  8207  	for {
  8208  		off := v.AuxInt
  8209  		sym := v.Aux
  8210  		_ = v.Args[2]
  8211  		ptr := v.Args[0]
  8212  		v_1 := v.Args[1]
  8213  		if v_1.Op != OpPPC64MOVDconst {
  8214  			break
  8215  		}
  8216  		c := v_1.AuxInt
  8217  		mem := v.Args[2]
  8218  		if !(c == 0) {
  8219  			break
  8220  		}
  8221  		v.reset(OpPPC64MOVHstorezero)
  8222  		v.AuxInt = off
  8223  		v.Aux = sym
  8224  		v.AddArg(ptr)
  8225  		v.AddArg(mem)
  8226  		return true
  8227  	}
  8228  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  8229  	// cond:
  8230  	// result: (MOVHstore [off] {sym} ptr x mem)
  8231  	for {
  8232  		off := v.AuxInt
  8233  		sym := v.Aux
  8234  		_ = v.Args[2]
  8235  		ptr := v.Args[0]
  8236  		v_1 := v.Args[1]
  8237  		if v_1.Op != OpPPC64MOVHreg {
  8238  			break
  8239  		}
  8240  		x := v_1.Args[0]
  8241  		mem := v.Args[2]
  8242  		v.reset(OpPPC64MOVHstore)
  8243  		v.AuxInt = off
  8244  		v.Aux = sym
  8245  		v.AddArg(ptr)
  8246  		v.AddArg(x)
  8247  		v.AddArg(mem)
  8248  		return true
  8249  	}
  8250  	// match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem)
  8251  	// cond:
  8252  	// result: (MOVHstore [off] {sym} ptr x mem)
  8253  	for {
  8254  		off := v.AuxInt
  8255  		sym := v.Aux
  8256  		_ = v.Args[2]
  8257  		ptr := v.Args[0]
  8258  		v_1 := v.Args[1]
  8259  		if v_1.Op != OpPPC64MOVHZreg {
  8260  			break
  8261  		}
  8262  		x := v_1.Args[0]
  8263  		mem := v.Args[2]
  8264  		v.reset(OpPPC64MOVHstore)
  8265  		v.AuxInt = off
  8266  		v.Aux = sym
  8267  		v.AddArg(ptr)
  8268  		v.AddArg(x)
  8269  		v.AddArg(mem)
  8270  		return true
  8271  	}
  8272  	return false
  8273  }
  8274  func rewriteValuePPC64_OpPPC64MOVHstorezero_0(v *Value) bool {
  8275  	// match: (MOVHstorezero [off1] {sym} (ADDconst [off2] x) mem)
  8276  	// cond: is16Bit(off1+off2)
  8277  	// result: (MOVHstorezero [off1+off2] {sym} x mem)
  8278  	for {
  8279  		off1 := v.AuxInt
  8280  		sym := v.Aux
  8281  		_ = v.Args[1]
  8282  		v_0 := v.Args[0]
  8283  		if v_0.Op != OpPPC64ADDconst {
  8284  			break
  8285  		}
  8286  		off2 := v_0.AuxInt
  8287  		x := v_0.Args[0]
  8288  		mem := v.Args[1]
  8289  		if !(is16Bit(off1 + off2)) {
  8290  			break
  8291  		}
  8292  		v.reset(OpPPC64MOVHstorezero)
  8293  		v.AuxInt = off1 + off2
  8294  		v.Aux = sym
  8295  		v.AddArg(x)
  8296  		v.AddArg(mem)
  8297  		return true
  8298  	}
  8299  	// match: (MOVHstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  8300  	// cond: canMergeSym(sym1,sym2) 	&& (x.Op != OpSB || p.Uses == 1)
  8301  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  8302  	for {
  8303  		off1 := v.AuxInt
  8304  		sym1 := v.Aux
  8305  		_ = v.Args[1]
  8306  		p := v.Args[0]
  8307  		if p.Op != OpPPC64MOVDaddr {
  8308  			break
  8309  		}
  8310  		off2 := p.AuxInt
  8311  		sym2 := p.Aux
  8312  		x := p.Args[0]
  8313  		mem := v.Args[1]
  8314  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  8315  			break
  8316  		}
  8317  		v.reset(OpPPC64MOVHstorezero)
  8318  		v.AuxInt = off1 + off2
  8319  		v.Aux = mergeSym(sym1, sym2)
  8320  		v.AddArg(x)
  8321  		v.AddArg(mem)
  8322  		return true
  8323  	}
  8324  	return false
  8325  }
  8326  func rewriteValuePPC64_OpPPC64MOVWZload_0(v *Value) bool {
  8327  	// match: (MOVWZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  8328  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  8329  	// result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  8330  	for {
  8331  		off1 := v.AuxInt
  8332  		sym1 := v.Aux
  8333  		_ = v.Args[1]
  8334  		p := v.Args[0]
  8335  		if p.Op != OpPPC64MOVDaddr {
  8336  			break
  8337  		}
  8338  		off2 := p.AuxInt
  8339  		sym2 := p.Aux
  8340  		ptr := p.Args[0]
  8341  		mem := v.Args[1]
  8342  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8343  			break
  8344  		}
  8345  		v.reset(OpPPC64MOVWZload)
  8346  		v.AuxInt = off1 + off2
  8347  		v.Aux = mergeSym(sym1, sym2)
  8348  		v.AddArg(ptr)
  8349  		v.AddArg(mem)
  8350  		return true
  8351  	}
  8352  	// match: (MOVWZload [off1] {sym} (ADDconst [off2] x) mem)
  8353  	// cond: is16Bit(off1+off2)
  8354  	// result: (MOVWZload [off1+off2] {sym} x mem)
  8355  	for {
  8356  		off1 := v.AuxInt
  8357  		sym := v.Aux
  8358  		_ = v.Args[1]
  8359  		v_0 := v.Args[0]
  8360  		if v_0.Op != OpPPC64ADDconst {
  8361  			break
  8362  		}
  8363  		off2 := v_0.AuxInt
  8364  		x := v_0.Args[0]
  8365  		mem := v.Args[1]
  8366  		if !(is16Bit(off1 + off2)) {
  8367  			break
  8368  		}
  8369  		v.reset(OpPPC64MOVWZload)
  8370  		v.AuxInt = off1 + off2
  8371  		v.Aux = sym
  8372  		v.AddArg(x)
  8373  		v.AddArg(mem)
  8374  		return true
  8375  	}
  8376  	return false
  8377  }
  8378  func rewriteValuePPC64_OpPPC64MOVWZreg_0(v *Value) bool {
  8379  	// match: (MOVWZreg y:(ANDconst [c] _))
  8380  	// cond: uint64(c) <= 0xFFFFFFFF
  8381  	// result: y
  8382  	for {
  8383  		y := v.Args[0]
  8384  		if y.Op != OpPPC64ANDconst {
  8385  			break
  8386  		}
  8387  		c := y.AuxInt
  8388  		if !(uint64(c) <= 0xFFFFFFFF) {
  8389  			break
  8390  		}
  8391  		v.reset(OpCopy)
  8392  		v.Type = y.Type
  8393  		v.AddArg(y)
  8394  		return true
  8395  	}
  8396  	// match: (MOVWZreg y:(AND (MOVDconst [c]) _))
  8397  	// cond: uint64(c) <= 0xFFFFFFFF
  8398  	// result: y
  8399  	for {
  8400  		y := v.Args[0]
  8401  		if y.Op != OpPPC64AND {
  8402  			break
  8403  		}
  8404  		_ = y.Args[1]
  8405  		y_0 := y.Args[0]
  8406  		if y_0.Op != OpPPC64MOVDconst {
  8407  			break
  8408  		}
  8409  		c := y_0.AuxInt
  8410  		if !(uint64(c) <= 0xFFFFFFFF) {
  8411  			break
  8412  		}
  8413  		v.reset(OpCopy)
  8414  		v.Type = y.Type
  8415  		v.AddArg(y)
  8416  		return true
  8417  	}
  8418  	// match: (MOVWZreg y:(AND _ (MOVDconst [c])))
  8419  	// cond: uint64(c) <= 0xFFFFFFFF
  8420  	// result: y
  8421  	for {
  8422  		y := v.Args[0]
  8423  		if y.Op != OpPPC64AND {
  8424  			break
  8425  		}
  8426  		_ = y.Args[1]
  8427  		y_1 := y.Args[1]
  8428  		if y_1.Op != OpPPC64MOVDconst {
  8429  			break
  8430  		}
  8431  		c := y_1.AuxInt
  8432  		if !(uint64(c) <= 0xFFFFFFFF) {
  8433  			break
  8434  		}
  8435  		v.reset(OpCopy)
  8436  		v.Type = y.Type
  8437  		v.AddArg(y)
  8438  		return true
  8439  	}
  8440  	// match: (MOVWZreg y:(MOVWZreg _))
  8441  	// cond:
  8442  	// result: y
  8443  	for {
  8444  		y := v.Args[0]
  8445  		if y.Op != OpPPC64MOVWZreg {
  8446  			break
  8447  		}
  8448  		v.reset(OpCopy)
  8449  		v.Type = y.Type
  8450  		v.AddArg(y)
  8451  		return true
  8452  	}
  8453  	// match: (MOVWZreg y:(MOVHZreg _))
  8454  	// cond:
  8455  	// result: y
  8456  	for {
  8457  		y := v.Args[0]
  8458  		if y.Op != OpPPC64MOVHZreg {
  8459  			break
  8460  		}
  8461  		v.reset(OpCopy)
  8462  		v.Type = y.Type
  8463  		v.AddArg(y)
  8464  		return true
  8465  	}
  8466  	// match: (MOVWZreg y:(MOVBZreg _))
  8467  	// cond:
  8468  	// result: y
  8469  	for {
  8470  		y := v.Args[0]
  8471  		if y.Op != OpPPC64MOVBZreg {
  8472  			break
  8473  		}
  8474  		v.reset(OpCopy)
  8475  		v.Type = y.Type
  8476  		v.AddArg(y)
  8477  		return true
  8478  	}
  8479  	// match: (MOVWZreg y:(MOVWreg x))
  8480  	// cond:
  8481  	// result: (MOVWZreg x)
  8482  	for {
  8483  		y := v.Args[0]
  8484  		if y.Op != OpPPC64MOVWreg {
  8485  			break
  8486  		}
  8487  		x := y.Args[0]
  8488  		v.reset(OpPPC64MOVWZreg)
  8489  		v.AddArg(x)
  8490  		return true
  8491  	}
  8492  	return false
  8493  }
  8494  func rewriteValuePPC64_OpPPC64MOVWload_0(v *Value) bool {
  8495  	// match: (MOVWload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
  8496  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  8497  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  8498  	for {
  8499  		off1 := v.AuxInt
  8500  		sym1 := v.Aux
  8501  		_ = v.Args[1]
  8502  		p := v.Args[0]
  8503  		if p.Op != OpPPC64MOVDaddr {
  8504  			break
  8505  		}
  8506  		off2 := p.AuxInt
  8507  		sym2 := p.Aux
  8508  		ptr := p.Args[0]
  8509  		mem := v.Args[1]
  8510  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8511  			break
  8512  		}
  8513  		v.reset(OpPPC64MOVWload)
  8514  		v.AuxInt = off1 + off2
  8515  		v.Aux = mergeSym(sym1, sym2)
  8516  		v.AddArg(ptr)
  8517  		v.AddArg(mem)
  8518  		return true
  8519  	}
  8520  	// match: (MOVWload [off1] {sym} (ADDconst [off2] x) mem)
  8521  	// cond: is16Bit(off1+off2)
  8522  	// result: (MOVWload [off1+off2] {sym} x mem)
  8523  	for {
  8524  		off1 := v.AuxInt
  8525  		sym := v.Aux
  8526  		_ = v.Args[1]
  8527  		v_0 := v.Args[0]
  8528  		if v_0.Op != OpPPC64ADDconst {
  8529  			break
  8530  		}
  8531  		off2 := v_0.AuxInt
  8532  		x := v_0.Args[0]
  8533  		mem := v.Args[1]
  8534  		if !(is16Bit(off1 + off2)) {
  8535  			break
  8536  		}
  8537  		v.reset(OpPPC64MOVWload)
  8538  		v.AuxInt = off1 + off2
  8539  		v.Aux = sym
  8540  		v.AddArg(x)
  8541  		v.AddArg(mem)
  8542  		return true
  8543  	}
  8544  	return false
  8545  }
  8546  func rewriteValuePPC64_OpPPC64MOVWreg_0(v *Value) bool {
  8547  	// match: (MOVWreg y:(ANDconst [c] _))
  8548  	// cond: uint64(c) <= 0xFFFF
  8549  	// result: y
  8550  	for {
  8551  		y := v.Args[0]
  8552  		if y.Op != OpPPC64ANDconst {
  8553  			break
  8554  		}
  8555  		c := y.AuxInt
  8556  		if !(uint64(c) <= 0xFFFF) {
  8557  			break
  8558  		}
  8559  		v.reset(OpCopy)
  8560  		v.Type = y.Type
  8561  		v.AddArg(y)
  8562  		return true
  8563  	}
  8564  	// match: (MOVWreg y:(AND (MOVDconst [c]) _))
  8565  	// cond: uint64(c) <= 0x7FFFFFFF
  8566  	// result: y
  8567  	for {
  8568  		y := v.Args[0]
  8569  		if y.Op != OpPPC64AND {
  8570  			break
  8571  		}
  8572  		_ = y.Args[1]
  8573  		y_0 := y.Args[0]
  8574  		if y_0.Op != OpPPC64MOVDconst {
  8575  			break
  8576  		}
  8577  		c := y_0.AuxInt
  8578  		if !(uint64(c) <= 0x7FFFFFFF) {
  8579  			break
  8580  		}
  8581  		v.reset(OpCopy)
  8582  		v.Type = y.Type
  8583  		v.AddArg(y)
  8584  		return true
  8585  	}
  8586  	// match: (MOVWreg y:(AND _ (MOVDconst [c])))
  8587  	// cond: uint64(c) <= 0x7FFFFFFF
  8588  	// result: y
  8589  	for {
  8590  		y := v.Args[0]
  8591  		if y.Op != OpPPC64AND {
  8592  			break
  8593  		}
  8594  		_ = y.Args[1]
  8595  		y_1 := y.Args[1]
  8596  		if y_1.Op != OpPPC64MOVDconst {
  8597  			break
  8598  		}
  8599  		c := y_1.AuxInt
  8600  		if !(uint64(c) <= 0x7FFFFFFF) {
  8601  			break
  8602  		}
  8603  		v.reset(OpCopy)
  8604  		v.Type = y.Type
  8605  		v.AddArg(y)
  8606  		return true
  8607  	}
  8608  	// match: (MOVWreg y:(MOVWreg _))
  8609  	// cond:
  8610  	// result: y
  8611  	for {
  8612  		y := v.Args[0]
  8613  		if y.Op != OpPPC64MOVWreg {
  8614  			break
  8615  		}
  8616  		v.reset(OpCopy)
  8617  		v.Type = y.Type
  8618  		v.AddArg(y)
  8619  		return true
  8620  	}
  8621  	// match: (MOVWreg y:(MOVHreg _))
  8622  	// cond:
  8623  	// result: y
  8624  	for {
  8625  		y := v.Args[0]
  8626  		if y.Op != OpPPC64MOVHreg {
  8627  			break
  8628  		}
  8629  		v.reset(OpCopy)
  8630  		v.Type = y.Type
  8631  		v.AddArg(y)
  8632  		return true
  8633  	}
  8634  	// match: (MOVWreg y:(MOVBreg _))
  8635  	// cond:
  8636  	// result: y
  8637  	for {
  8638  		y := v.Args[0]
  8639  		if y.Op != OpPPC64MOVBreg {
  8640  			break
  8641  		}
  8642  		v.reset(OpCopy)
  8643  		v.Type = y.Type
  8644  		v.AddArg(y)
  8645  		return true
  8646  	}
  8647  	// match: (MOVWreg y:(MOVWZreg x))
  8648  	// cond:
  8649  	// result: (MOVWreg x)
  8650  	for {
  8651  		y := v.Args[0]
  8652  		if y.Op != OpPPC64MOVWZreg {
  8653  			break
  8654  		}
  8655  		x := y.Args[0]
  8656  		v.reset(OpPPC64MOVWreg)
  8657  		v.AddArg(x)
  8658  		return true
  8659  	}
  8660  	return false
  8661  }
  8662  func rewriteValuePPC64_OpPPC64MOVWstore_0(v *Value) bool {
  8663  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] x) val mem)
  8664  	// cond: is16Bit(off1+off2)
  8665  	// result: (MOVWstore [off1+off2] {sym} x val mem)
  8666  	for {
  8667  		off1 := v.AuxInt
  8668  		sym := v.Aux
  8669  		_ = v.Args[2]
  8670  		v_0 := v.Args[0]
  8671  		if v_0.Op != OpPPC64ADDconst {
  8672  			break
  8673  		}
  8674  		off2 := v_0.AuxInt
  8675  		x := v_0.Args[0]
  8676  		val := v.Args[1]
  8677  		mem := v.Args[2]
  8678  		if !(is16Bit(off1 + off2)) {
  8679  			break
  8680  		}
  8681  		v.reset(OpPPC64MOVWstore)
  8682  		v.AuxInt = off1 + off2
  8683  		v.Aux = sym
  8684  		v.AddArg(x)
  8685  		v.AddArg(val)
  8686  		v.AddArg(mem)
  8687  		return true
  8688  	}
  8689  	// match: (MOVWstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
  8690  	// cond: canMergeSym(sym1,sym2) 	&& (ptr.Op != OpSB || p.Uses == 1)
  8691  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  8692  	for {
  8693  		off1 := v.AuxInt
  8694  		sym1 := v.Aux
  8695  		_ = v.Args[2]
  8696  		p := v.Args[0]
  8697  		if p.Op != OpPPC64MOVDaddr {
  8698  			break
  8699  		}
  8700  		off2 := p.AuxInt
  8701  		sym2 := p.Aux
  8702  		ptr := p.Args[0]
  8703  		val := v.Args[1]
  8704  		mem := v.Args[2]
  8705  		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
  8706  			break
  8707  		}
  8708  		v.reset(OpPPC64MOVWstore)
  8709  		v.AuxInt = off1 + off2
  8710  		v.Aux = mergeSym(sym1, sym2)
  8711  		v.AddArg(ptr)
  8712  		v.AddArg(val)
  8713  		v.AddArg(mem)
  8714  		return true
  8715  	}
  8716  	// match: (MOVWstore [off] {sym} ptr (MOVDconst [c]) mem)
  8717  	// cond: c == 0
  8718  	// result: (MOVWstorezero [off] {sym} ptr mem)
  8719  	for {
  8720  		off := v.AuxInt
  8721  		sym := v.Aux
  8722  		_ = v.Args[2]
  8723  		ptr := v.Args[0]
  8724  		v_1 := v.Args[1]
  8725  		if v_1.Op != OpPPC64MOVDconst {
  8726  			break
  8727  		}
  8728  		c := v_1.AuxInt
  8729  		mem := v.Args[2]
  8730  		if !(c == 0) {
  8731  			break
  8732  		}
  8733  		v.reset(OpPPC64MOVWstorezero)
  8734  		v.AuxInt = off
  8735  		v.Aux = sym
  8736  		v.AddArg(ptr)
  8737  		v.AddArg(mem)
  8738  		return true
  8739  	}
  8740  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  8741  	// cond:
  8742  	// result: (MOVWstore [off] {sym} ptr x mem)
  8743  	for {
  8744  		off := v.AuxInt
  8745  		sym := v.Aux
  8746  		_ = v.Args[2]
  8747  		ptr := v.Args[0]
  8748  		v_1 := v.Args[1]
  8749  		if v_1.Op != OpPPC64MOVWreg {
  8750  			break
  8751  		}
  8752  		x := v_1.Args[0]
  8753  		mem := v.Args[2]
  8754  		v.reset(OpPPC64MOVWstore)
  8755  		v.AuxInt = off
  8756  		v.Aux = sym
  8757  		v.AddArg(ptr)
  8758  		v.AddArg(x)
  8759  		v.AddArg(mem)
  8760  		return true
  8761  	}
  8762  	// match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem)
  8763  	// cond:
  8764  	// result: (MOVWstore [off] {sym} ptr x mem)
  8765  	for {
  8766  		off := v.AuxInt
  8767  		sym := v.Aux
  8768  		_ = v.Args[2]
  8769  		ptr := v.Args[0]
  8770  		v_1 := v.Args[1]
  8771  		if v_1.Op != OpPPC64MOVWZreg {
  8772  			break
  8773  		}
  8774  		x := v_1.Args[0]
  8775  		mem := v.Args[2]
  8776  		v.reset(OpPPC64MOVWstore)
  8777  		v.AuxInt = off
  8778  		v.Aux = sym
  8779  		v.AddArg(ptr)
  8780  		v.AddArg(x)
  8781  		v.AddArg(mem)
  8782  		return true
  8783  	}
  8784  	return false
  8785  }
  8786  func rewriteValuePPC64_OpPPC64MOVWstorezero_0(v *Value) bool {
  8787  	// match: (MOVWstorezero [off1] {sym} (ADDconst [off2] x) mem)
  8788  	// cond: is16Bit(off1+off2)
  8789  	// result: (MOVWstorezero [off1+off2] {sym} x mem)
  8790  	for {
  8791  		off1 := v.AuxInt
  8792  		sym := v.Aux
  8793  		_ = v.Args[1]
  8794  		v_0 := v.Args[0]
  8795  		if v_0.Op != OpPPC64ADDconst {
  8796  			break
  8797  		}
  8798  		off2 := v_0.AuxInt
  8799  		x := v_0.Args[0]
  8800  		mem := v.Args[1]
  8801  		if !(is16Bit(off1 + off2)) {
  8802  			break
  8803  		}
  8804  		v.reset(OpPPC64MOVWstorezero)
  8805  		v.AuxInt = off1 + off2
  8806  		v.Aux = sym
  8807  		v.AddArg(x)
  8808  		v.AddArg(mem)
  8809  		return true
  8810  	}
  8811  	// match: (MOVWstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
  8812  	// cond: canMergeSym(sym1,sym2) 	&& (x.Op != OpSB || p.Uses == 1)
  8813  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
  8814  	for {
  8815  		off1 := v.AuxInt
  8816  		sym1 := v.Aux
  8817  		_ = v.Args[1]
  8818  		p := v.Args[0]
  8819  		if p.Op != OpPPC64MOVDaddr {
  8820  			break
  8821  		}
  8822  		off2 := p.AuxInt
  8823  		sym2 := p.Aux
  8824  		x := p.Args[0]
  8825  		mem := v.Args[1]
  8826  		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
  8827  			break
  8828  		}
  8829  		v.reset(OpPPC64MOVWstorezero)
  8830  		v.AuxInt = off1 + off2
  8831  		v.Aux = mergeSym(sym1, sym2)
  8832  		v.AddArg(x)
  8833  		v.AddArg(mem)
  8834  		return true
  8835  	}
  8836  	return false
  8837  }
  8838  func rewriteValuePPC64_OpPPC64MTVSRD_0(v *Value) bool {
  8839  	b := v.Block
  8840  	_ = b
  8841  	typ := &b.Func.Config.Types
  8842  	_ = typ
  8843  	// match: (MTVSRD (MOVDconst [c]))
  8844  	// cond:
  8845  	// result: (FMOVDconst [c])
  8846  	for {
  8847  		v_0 := v.Args[0]
  8848  		if v_0.Op != OpPPC64MOVDconst {
  8849  			break
  8850  		}
  8851  		c := v_0.AuxInt
  8852  		v.reset(OpPPC64FMOVDconst)
  8853  		v.AuxInt = c
  8854  		return true
  8855  	}
  8856  	// match: (MTVSRD x:(MOVDload [off] {sym} ptr mem))
  8857  	// cond: x.Uses == 1 && clobber(x)
  8858  	// result: @x.Block (FMOVDload [off] {sym} ptr mem)
  8859  	for {
  8860  		x := v.Args[0]
  8861  		if x.Op != OpPPC64MOVDload {
  8862  			break
  8863  		}
  8864  		off := x.AuxInt
  8865  		sym := x.Aux
  8866  		_ = x.Args[1]
  8867  		ptr := x.Args[0]
  8868  		mem := x.Args[1]
  8869  		if !(x.Uses == 1 && clobber(x)) {
  8870  			break
  8871  		}
  8872  		b = x.Block
  8873  		v0 := b.NewValue0(v.Pos, OpPPC64FMOVDload, typ.Float64)
  8874  		v.reset(OpCopy)
  8875  		v.AddArg(v0)
  8876  		v0.AuxInt = off
  8877  		v0.Aux = sym
  8878  		v0.AddArg(ptr)
  8879  		v0.AddArg(mem)
  8880  		return true
  8881  	}
  8882  	return false
  8883  }
  8884  func rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v *Value) bool {
  8885  	// match: (MaskIfNotCarry (ADDconstForCarry [c] (ANDconst [d] _)))
  8886  	// cond: c < 0 && d > 0 && c + d < 0
  8887  	// result: (MOVDconst [-1])
  8888  	for {
  8889  		v_0 := v.Args[0]
  8890  		if v_0.Op != OpPPC64ADDconstForCarry {
  8891  			break
  8892  		}
  8893  		c := v_0.AuxInt
  8894  		v_0_0 := v_0.Args[0]
  8895  		if v_0_0.Op != OpPPC64ANDconst {
  8896  			break
  8897  		}
  8898  		d := v_0_0.AuxInt
  8899  		if !(c < 0 && d > 0 && c+d < 0) {
  8900  			break
  8901  		}
  8902  		v.reset(OpPPC64MOVDconst)
  8903  		v.AuxInt = -1
  8904  		return true
  8905  	}
  8906  	return false
  8907  }
  8908  func rewriteValuePPC64_OpPPC64NotEqual_0(v *Value) bool {
  8909  	// match: (NotEqual (FlagEQ))
  8910  	// cond:
  8911  	// result: (MOVDconst [0])
  8912  	for {
  8913  		v_0 := v.Args[0]
  8914  		if v_0.Op != OpPPC64FlagEQ {
  8915  			break
  8916  		}
  8917  		v.reset(OpPPC64MOVDconst)
  8918  		v.AuxInt = 0
  8919  		return true
  8920  	}
  8921  	// match: (NotEqual (FlagLT))
  8922  	// cond:
  8923  	// result: (MOVDconst [1])
  8924  	for {
  8925  		v_0 := v.Args[0]
  8926  		if v_0.Op != OpPPC64FlagLT {
  8927  			break
  8928  		}
  8929  		v.reset(OpPPC64MOVDconst)
  8930  		v.AuxInt = 1
  8931  		return true
  8932  	}
  8933  	// match: (NotEqual (FlagGT))
  8934  	// cond:
  8935  	// result: (MOVDconst [1])
  8936  	for {
  8937  		v_0 := v.Args[0]
  8938  		if v_0.Op != OpPPC64FlagGT {
  8939  			break
  8940  		}
  8941  		v.reset(OpPPC64MOVDconst)
  8942  		v.AuxInt = 1
  8943  		return true
  8944  	}
  8945  	// match: (NotEqual (InvertFlags x))
  8946  	// cond:
  8947  	// result: (NotEqual x)
  8948  	for {
  8949  		v_0 := v.Args[0]
  8950  		if v_0.Op != OpPPC64InvertFlags {
  8951  			break
  8952  		}
  8953  		x := v_0.Args[0]
  8954  		v.reset(OpPPC64NotEqual)
  8955  		v.AddArg(x)
  8956  		return true
  8957  	}
  8958  	return false
  8959  }
  8960  func rewriteValuePPC64_OpPPC64OR_0(v *Value) bool {
  8961  	b := v.Block
  8962  	_ = b
  8963  	typ := &b.Func.Config.Types
  8964  	_ = typ
  8965  	// match: (OR (SLDconst x [c]) (SRDconst x [d]))
  8966  	// cond: d == 64-c
  8967  	// result: (ROTLconst [c] x)
  8968  	for {
  8969  		_ = v.Args[1]
  8970  		v_0 := v.Args[0]
  8971  		if v_0.Op != OpPPC64SLDconst {
  8972  			break
  8973  		}
  8974  		c := v_0.AuxInt
  8975  		x := v_0.Args[0]
  8976  		v_1 := v.Args[1]
  8977  		if v_1.Op != OpPPC64SRDconst {
  8978  			break
  8979  		}
  8980  		d := v_1.AuxInt
  8981  		if x != v_1.Args[0] {
  8982  			break
  8983  		}
  8984  		if !(d == 64-c) {
  8985  			break
  8986  		}
  8987  		v.reset(OpPPC64ROTLconst)
  8988  		v.AuxInt = c
  8989  		v.AddArg(x)
  8990  		return true
  8991  	}
  8992  	// match: (OR (SRDconst x [d]) (SLDconst x [c]))
  8993  	// cond: d == 64-c
  8994  	// result: (ROTLconst [c] x)
  8995  	for {
  8996  		_ = v.Args[1]
  8997  		v_0 := v.Args[0]
  8998  		if v_0.Op != OpPPC64SRDconst {
  8999  			break
  9000  		}
  9001  		d := v_0.AuxInt
  9002  		x := v_0.Args[0]
  9003  		v_1 := v.Args[1]
  9004  		if v_1.Op != OpPPC64SLDconst {
  9005  			break
  9006  		}
  9007  		c := v_1.AuxInt
  9008  		if x != v_1.Args[0] {
  9009  			break
  9010  		}
  9011  		if !(d == 64-c) {
  9012  			break
  9013  		}
  9014  		v.reset(OpPPC64ROTLconst)
  9015  		v.AuxInt = c
  9016  		v.AddArg(x)
  9017  		return true
  9018  	}
  9019  	// match: (OR (SLWconst x [c]) (SRWconst x [d]))
  9020  	// cond: d == 32-c
  9021  	// result: (ROTLWconst [c] x)
  9022  	for {
  9023  		_ = v.Args[1]
  9024  		v_0 := v.Args[0]
  9025  		if v_0.Op != OpPPC64SLWconst {
  9026  			break
  9027  		}
  9028  		c := v_0.AuxInt
  9029  		x := v_0.Args[0]
  9030  		v_1 := v.Args[1]
  9031  		if v_1.Op != OpPPC64SRWconst {
  9032  			break
  9033  		}
  9034  		d := v_1.AuxInt
  9035  		if x != v_1.Args[0] {
  9036  			break
  9037  		}
  9038  		if !(d == 32-c) {
  9039  			break
  9040  		}
  9041  		v.reset(OpPPC64ROTLWconst)
  9042  		v.AuxInt = c
  9043  		v.AddArg(x)
  9044  		return true
  9045  	}
  9046  	// match: (OR (SRWconst x [d]) (SLWconst x [c]))
  9047  	// cond: d == 32-c
  9048  	// result: (ROTLWconst [c] x)
  9049  	for {
  9050  		_ = v.Args[1]
  9051  		v_0 := v.Args[0]
  9052  		if v_0.Op != OpPPC64SRWconst {
  9053  			break
  9054  		}
  9055  		d := v_0.AuxInt
  9056  		x := v_0.Args[0]
  9057  		v_1 := v.Args[1]
  9058  		if v_1.Op != OpPPC64SLWconst {
  9059  			break
  9060  		}
  9061  		c := v_1.AuxInt
  9062  		if x != v_1.Args[0] {
  9063  			break
  9064  		}
  9065  		if !(d == 32-c) {
  9066  			break
  9067  		}
  9068  		v.reset(OpPPC64ROTLWconst)
  9069  		v.AuxInt = c
  9070  		v.AddArg(x)
  9071  		return true
  9072  	}
  9073  	// match: (OR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
  9074  	// cond:
  9075  	// result: (ROTL x y)
  9076  	for {
  9077  		_ = v.Args[1]
  9078  		v_0 := v.Args[0]
  9079  		if v_0.Op != OpPPC64SLD {
  9080  			break
  9081  		}
  9082  		_ = v_0.Args[1]
  9083  		x := v_0.Args[0]
  9084  		v_0_1 := v_0.Args[1]
  9085  		if v_0_1.Op != OpPPC64ANDconst {
  9086  			break
  9087  		}
  9088  		if v_0_1.Type != typ.Int64 {
  9089  			break
  9090  		}
  9091  		if v_0_1.AuxInt != 63 {
  9092  			break
  9093  		}
  9094  		y := v_0_1.Args[0]
  9095  		v_1 := v.Args[1]
  9096  		if v_1.Op != OpPPC64SRD {
  9097  			break
  9098  		}
  9099  		_ = v_1.Args[1]
  9100  		if x != v_1.Args[0] {
  9101  			break
  9102  		}
  9103  		v_1_1 := v_1.Args[1]
  9104  		if v_1_1.Op != OpPPC64SUB {
  9105  			break
  9106  		}
  9107  		if v_1_1.Type != typ.UInt {
  9108  			break
  9109  		}
  9110  		_ = v_1_1.Args[1]
  9111  		v_1_1_0 := v_1_1.Args[0]
  9112  		if v_1_1_0.Op != OpPPC64MOVDconst {
  9113  			break
  9114  		}
  9115  		if v_1_1_0.AuxInt != 64 {
  9116  			break
  9117  		}
  9118  		v_1_1_1 := v_1_1.Args[1]
  9119  		if v_1_1_1.Op != OpPPC64ANDconst {
  9120  			break
  9121  		}
  9122  		if v_1_1_1.Type != typ.UInt {
  9123  			break
  9124  		}
  9125  		if v_1_1_1.AuxInt != 63 {
  9126  			break
  9127  		}
  9128  		if y != v_1_1_1.Args[0] {
  9129  			break
  9130  		}
  9131  		v.reset(OpPPC64ROTL)
  9132  		v.AddArg(x)
  9133  		v.AddArg(y)
  9134  		return true
  9135  	}
  9136  	// match: (OR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
  9137  	// cond:
  9138  	// result: (ROTL x y)
  9139  	for {
  9140  		_ = v.Args[1]
  9141  		v_0 := v.Args[0]
  9142  		if v_0.Op != OpPPC64SRD {
  9143  			break
  9144  		}
  9145  		_ = v_0.Args[1]
  9146  		x := v_0.Args[0]
  9147  		v_0_1 := v_0.Args[1]
  9148  		if v_0_1.Op != OpPPC64SUB {
  9149  			break
  9150  		}
  9151  		if v_0_1.Type != typ.UInt {
  9152  			break
  9153  		}
  9154  		_ = v_0_1.Args[1]
  9155  		v_0_1_0 := v_0_1.Args[0]
  9156  		if v_0_1_0.Op != OpPPC64MOVDconst {
  9157  			break
  9158  		}
  9159  		if v_0_1_0.AuxInt != 64 {
  9160  			break
  9161  		}
  9162  		v_0_1_1 := v_0_1.Args[1]
  9163  		if v_0_1_1.Op != OpPPC64ANDconst {
  9164  			break
  9165  		}
  9166  		if v_0_1_1.Type != typ.UInt {
  9167  			break
  9168  		}
  9169  		if v_0_1_1.AuxInt != 63 {
  9170  			break
  9171  		}
  9172  		y := v_0_1_1.Args[0]
  9173  		v_1 := v.Args[1]
  9174  		if v_1.Op != OpPPC64SLD {
  9175  			break
  9176  		}
  9177  		_ = v_1.Args[1]
  9178  		if x != v_1.Args[0] {
  9179  			break
  9180  		}
  9181  		v_1_1 := v_1.Args[1]
  9182  		if v_1_1.Op != OpPPC64ANDconst {
  9183  			break
  9184  		}
  9185  		if v_1_1.Type != typ.Int64 {
  9186  			break
  9187  		}
  9188  		if v_1_1.AuxInt != 63 {
  9189  			break
  9190  		}
  9191  		if y != v_1_1.Args[0] {
  9192  			break
  9193  		}
  9194  		v.reset(OpPPC64ROTL)
  9195  		v.AddArg(x)
  9196  		v.AddArg(y)
  9197  		return true
  9198  	}
  9199  	// match: (OR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
  9200  	// cond:
  9201  	// result: (ROTLW x y)
  9202  	for {
  9203  		_ = v.Args[1]
  9204  		v_0 := v.Args[0]
  9205  		if v_0.Op != OpPPC64SLW {
  9206  			break
  9207  		}
  9208  		_ = v_0.Args[1]
  9209  		x := v_0.Args[0]
  9210  		v_0_1 := v_0.Args[1]
  9211  		if v_0_1.Op != OpPPC64ANDconst {
  9212  			break
  9213  		}
  9214  		if v_0_1.Type != typ.Int32 {
  9215  			break
  9216  		}
  9217  		if v_0_1.AuxInt != 31 {
  9218  			break
  9219  		}
  9220  		y := v_0_1.Args[0]
  9221  		v_1 := v.Args[1]
  9222  		if v_1.Op != OpPPC64SRW {
  9223  			break
  9224  		}
  9225  		_ = v_1.Args[1]
  9226  		if x != v_1.Args[0] {
  9227  			break
  9228  		}
  9229  		v_1_1 := v_1.Args[1]
  9230  		if v_1_1.Op != OpPPC64SUB {
  9231  			break
  9232  		}
  9233  		if v_1_1.Type != typ.UInt {
  9234  			break
  9235  		}
  9236  		_ = v_1_1.Args[1]
  9237  		v_1_1_0 := v_1_1.Args[0]
  9238  		if v_1_1_0.Op != OpPPC64MOVDconst {
  9239  			break
  9240  		}
  9241  		if v_1_1_0.AuxInt != 32 {
  9242  			break
  9243  		}
  9244  		v_1_1_1 := v_1_1.Args[1]
  9245  		if v_1_1_1.Op != OpPPC64ANDconst {
  9246  			break
  9247  		}
  9248  		if v_1_1_1.Type != typ.UInt {
  9249  			break
  9250  		}
  9251  		if v_1_1_1.AuxInt != 31 {
  9252  			break
  9253  		}
  9254  		if y != v_1_1_1.Args[0] {
  9255  			break
  9256  		}
  9257  		v.reset(OpPPC64ROTLW)
  9258  		v.AddArg(x)
  9259  		v.AddArg(y)
  9260  		return true
  9261  	}
  9262  	// match: (OR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
  9263  	// cond:
  9264  	// result: (ROTLW x y)
  9265  	for {
  9266  		_ = v.Args[1]
  9267  		v_0 := v.Args[0]
  9268  		if v_0.Op != OpPPC64SRW {
  9269  			break
  9270  		}
  9271  		_ = v_0.Args[1]
  9272  		x := v_0.Args[0]
  9273  		v_0_1 := v_0.Args[1]
  9274  		if v_0_1.Op != OpPPC64SUB {
  9275  			break
  9276  		}
  9277  		if v_0_1.Type != typ.UInt {
  9278  			break
  9279  		}
  9280  		_ = v_0_1.Args[1]
  9281  		v_0_1_0 := v_0_1.Args[0]
  9282  		if v_0_1_0.Op != OpPPC64MOVDconst {
  9283  			break
  9284  		}
  9285  		if v_0_1_0.AuxInt != 32 {
  9286  			break
  9287  		}
  9288  		v_0_1_1 := v_0_1.Args[1]
  9289  		if v_0_1_1.Op != OpPPC64ANDconst {
  9290  			break
  9291  		}
  9292  		if v_0_1_1.Type != typ.UInt {
  9293  			break
  9294  		}
  9295  		if v_0_1_1.AuxInt != 31 {
  9296  			break
  9297  		}
  9298  		y := v_0_1_1.Args[0]
  9299  		v_1 := v.Args[1]
  9300  		if v_1.Op != OpPPC64SLW {
  9301  			break
  9302  		}
  9303  		_ = v_1.Args[1]
  9304  		if x != v_1.Args[0] {
  9305  			break
  9306  		}
  9307  		v_1_1 := v_1.Args[1]
  9308  		if v_1_1.Op != OpPPC64ANDconst {
  9309  			break
  9310  		}
  9311  		if v_1_1.Type != typ.Int32 {
  9312  			break
  9313  		}
  9314  		if v_1_1.AuxInt != 31 {
  9315  			break
  9316  		}
  9317  		if y != v_1_1.Args[0] {
  9318  			break
  9319  		}
  9320  		v.reset(OpPPC64ROTLW)
  9321  		v.AddArg(x)
  9322  		v.AddArg(y)
  9323  		return true
  9324  	}
  9325  	// match: (OR (MOVDconst [c]) (MOVDconst [d]))
  9326  	// cond:
  9327  	// result: (MOVDconst [c|d])
  9328  	for {
  9329  		_ = v.Args[1]
  9330  		v_0 := v.Args[0]
  9331  		if v_0.Op != OpPPC64MOVDconst {
  9332  			break
  9333  		}
  9334  		c := v_0.AuxInt
  9335  		v_1 := v.Args[1]
  9336  		if v_1.Op != OpPPC64MOVDconst {
  9337  			break
  9338  		}
  9339  		d := v_1.AuxInt
  9340  		v.reset(OpPPC64MOVDconst)
  9341  		v.AuxInt = c | d
  9342  		return true
  9343  	}
  9344  	// match: (OR (MOVDconst [d]) (MOVDconst [c]))
  9345  	// cond:
  9346  	// result: (MOVDconst [c|d])
  9347  	for {
  9348  		_ = v.Args[1]
  9349  		v_0 := v.Args[0]
  9350  		if v_0.Op != OpPPC64MOVDconst {
  9351  			break
  9352  		}
  9353  		d := v_0.AuxInt
  9354  		v_1 := v.Args[1]
  9355  		if v_1.Op != OpPPC64MOVDconst {
  9356  			break
  9357  		}
  9358  		c := v_1.AuxInt
  9359  		v.reset(OpPPC64MOVDconst)
  9360  		v.AuxInt = c | d
  9361  		return true
  9362  	}
  9363  	return false
  9364  }
  9365  func rewriteValuePPC64_OpPPC64OR_10(v *Value) bool {
  9366  	b := v.Block
  9367  	_ = b
  9368  	config := b.Func.Config
  9369  	_ = config
  9370  	// match: (OR x (MOVDconst [c]))
  9371  	// cond: isU32Bit(c)
  9372  	// result: (ORconst [c] x)
  9373  	for {
  9374  		_ = v.Args[1]
  9375  		x := v.Args[0]
  9376  		v_1 := v.Args[1]
  9377  		if v_1.Op != OpPPC64MOVDconst {
  9378  			break
  9379  		}
  9380  		c := v_1.AuxInt
  9381  		if !(isU32Bit(c)) {
  9382  			break
  9383  		}
  9384  		v.reset(OpPPC64ORconst)
  9385  		v.AuxInt = c
  9386  		v.AddArg(x)
  9387  		return true
  9388  	}
  9389  	// match: (OR (MOVDconst [c]) x)
  9390  	// cond: isU32Bit(c)
  9391  	// result: (ORconst [c] x)
  9392  	for {
  9393  		_ = v.Args[1]
  9394  		v_0 := v.Args[0]
  9395  		if v_0.Op != OpPPC64MOVDconst {
  9396  			break
  9397  		}
  9398  		c := v_0.AuxInt
  9399  		x := v.Args[1]
  9400  		if !(isU32Bit(c)) {
  9401  			break
  9402  		}
  9403  		v.reset(OpPPC64ORconst)
  9404  		v.AuxInt = c
  9405  		v.AddArg(x)
  9406  		return true
  9407  	}
  9408  	// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]))
  9409  	// cond: !config.BigEndian 	&& i1 == i0+1 	&& x0.Uses ==1 && x1.Uses == 1 	&& o1.Uses == 1 	&& mergePoint(b, x0, x1) != nil 	&& clobber(x0) && clobber(x1) && clobber(o1)
  9410  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
  9411  	for {
  9412  		t := v.Type
  9413  		_ = v.Args[1]
  9414  		x0 := v.Args[0]
  9415  		if x0.Op != OpPPC64MOVBZload {
  9416  			break
  9417  		}
  9418  		i0 := x0.AuxInt
  9419  		s := x0.Aux
  9420  		_ = x0.Args[1]
  9421  		p := x0.Args[0]
  9422  		mem := x0.Args[1]
  9423  		o1 := v.Args[1]
  9424  		if o1.Op != OpPPC64SLWconst {
  9425  			break
  9426  		}
  9427  		if o1.AuxInt != 8 {
  9428  			break
  9429  		}
  9430  		x1 := o1.Args[0]
  9431  		if x1.Op != OpPPC64MOVBZload {
  9432  			break
  9433  		}
  9434  		i1 := x1.AuxInt
  9435  		if x1.Aux != s {
  9436  			break
  9437  		}
  9438  		_ = x1.Args[1]
  9439  		if p != x1.Args[0] {
  9440  			break
  9441  		}
  9442  		if mem != x1.Args[1] {
  9443  			break
  9444  		}
  9445  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
  9446  			break
  9447  		}
  9448  		b = mergePoint(b, x0, x1)
  9449  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, t)
  9450  		v.reset(OpCopy)
  9451  		v.AddArg(v0)
  9452  		v0.AuxInt = i0
  9453  		v0.Aux = s
  9454  		v0.AddArg(p)
  9455  		v0.AddArg(mem)
  9456  		return true
  9457  	}
  9458  	// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
  9459  	// cond: !config.BigEndian 	&& i1 == i0+1 	&& x0.Uses ==1 && x1.Uses == 1 	&& o1.Uses == 1 	&& mergePoint(b, x0, x1) != nil 	&& clobber(x0) && clobber(x1) && clobber(o1)
  9460  	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
  9461  	for {
  9462  		t := v.Type
  9463  		_ = v.Args[1]
  9464  		o1 := v.Args[0]
  9465  		if o1.Op != OpPPC64SLWconst {
  9466  			break
  9467  		}
  9468  		if o1.AuxInt != 8 {
  9469  			break
  9470  		}
  9471  		x1 := o1.Args[0]
  9472  		if x1.Op != OpPPC64MOVBZload {
  9473  			break
  9474  		}
  9475  		i1 := x1.AuxInt
  9476  		s := x1.Aux
  9477  		_ = x1.Args[1]
  9478  		p := x1.Args[0]
  9479  		mem := x1.Args[1]
  9480  		x0 := v.Args[1]
  9481  		if x0.Op != OpPPC64MOVBZload {
  9482  			break
  9483  		}
  9484  		i0 := x0.AuxInt
  9485  		if x0.Aux != s {
  9486  			break
  9487  		}
  9488  		_ = x0.Args[1]
  9489  		if p != x0.Args[0] {
  9490  			break
  9491  		}
  9492  		if mem != x0.Args[1] {
  9493  			break
  9494  		}
  9495  		if !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
  9496  			break
  9497  		}
  9498  		b = mergePoint(b, x0, x1)
  9499  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, t)
  9500  		v.reset(OpCopy)
  9501  		v.AddArg(v0)
  9502  		v0.AuxInt = i0
  9503  		v0.Aux = s
  9504  		v0.AddArg(p)
  9505  		v0.AddArg(mem)
  9506  		return true
  9507  	}
  9508  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
  9509  	// cond: !config.BigEndian 	&& i2 == i0+2 	&& i3 == i0+3 	&& x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 	&& o0.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 	&& mergePoint(b, x0, x1, x2) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) 	&& clobber(s0) && clobber(s1) 	&& clobber(o0)
  9510  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
  9511  	for {
  9512  		t := v.Type
  9513  		_ = v.Args[1]
  9514  		s1 := v.Args[0]
  9515  		if s1.Op != OpPPC64SLWconst {
  9516  			break
  9517  		}
  9518  		if s1.AuxInt != 24 {
  9519  			break
  9520  		}
  9521  		x2 := s1.Args[0]
  9522  		if x2.Op != OpPPC64MOVBZload {
  9523  			break
  9524  		}
  9525  		i3 := x2.AuxInt
  9526  		s := x2.Aux
  9527  		_ = x2.Args[1]
  9528  		p := x2.Args[0]
  9529  		mem := x2.Args[1]
  9530  		o0 := v.Args[1]
  9531  		if o0.Op != OpPPC64OR {
  9532  			break
  9533  		}
  9534  		if o0.Type != t {
  9535  			break
  9536  		}
  9537  		_ = o0.Args[1]
  9538  		s0 := o0.Args[0]
  9539  		if s0.Op != OpPPC64SLWconst {
  9540  			break
  9541  		}
  9542  		if s0.AuxInt != 16 {
  9543  			break
  9544  		}
  9545  		x1 := s0.Args[0]
  9546  		if x1.Op != OpPPC64MOVBZload {
  9547  			break
  9548  		}
  9549  		i2 := x1.AuxInt
  9550  		if x1.Aux != s {
  9551  			break
  9552  		}
  9553  		_ = x1.Args[1]
  9554  		if p != x1.Args[0] {
  9555  			break
  9556  		}
  9557  		if mem != x1.Args[1] {
  9558  			break
  9559  		}
  9560  		x0 := o0.Args[1]
  9561  		if x0.Op != OpPPC64MOVHZload {
  9562  			break
  9563  		}
  9564  		i0 := x0.AuxInt
  9565  		if x0.Aux != s {
  9566  			break
  9567  		}
  9568  		_ = x0.Args[1]
  9569  		if p != x0.Args[0] {
  9570  			break
  9571  		}
  9572  		if mem != x0.Args[1] {
  9573  			break
  9574  		}
  9575  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
  9576  			break
  9577  		}
  9578  		b = mergePoint(b, x0, x1, x2)
  9579  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
  9580  		v.reset(OpCopy)
  9581  		v.AddArg(v0)
  9582  		v0.AuxInt = i0
  9583  		v0.Aux = s
  9584  		v0.AddArg(p)
  9585  		v0.AddArg(mem)
  9586  		return true
  9587  	}
  9588  	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])))
  9589  	// cond: !config.BigEndian 	&& i2 == i0+2 	&& i3 == i0+3 	&& x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 	&& o0.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 	&& mergePoint(b, x0, x1, x2) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) 	&& clobber(s0) && clobber(s1) 	&& clobber(o0)
  9590  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
  9591  	for {
  9592  		t := v.Type
  9593  		_ = v.Args[1]
  9594  		s1 := v.Args[0]
  9595  		if s1.Op != OpPPC64SLWconst {
  9596  			break
  9597  		}
  9598  		if s1.AuxInt != 24 {
  9599  			break
  9600  		}
  9601  		x2 := s1.Args[0]
  9602  		if x2.Op != OpPPC64MOVBZload {
  9603  			break
  9604  		}
  9605  		i3 := x2.AuxInt
  9606  		s := x2.Aux
  9607  		_ = x2.Args[1]
  9608  		p := x2.Args[0]
  9609  		mem := x2.Args[1]
  9610  		o0 := v.Args[1]
  9611  		if o0.Op != OpPPC64OR {
  9612  			break
  9613  		}
  9614  		if o0.Type != t {
  9615  			break
  9616  		}
  9617  		_ = o0.Args[1]
  9618  		x0 := o0.Args[0]
  9619  		if x0.Op != OpPPC64MOVHZload {
  9620  			break
  9621  		}
  9622  		i0 := x0.AuxInt
  9623  		if x0.Aux != s {
  9624  			break
  9625  		}
  9626  		_ = x0.Args[1]
  9627  		if p != x0.Args[0] {
  9628  			break
  9629  		}
  9630  		if mem != x0.Args[1] {
  9631  			break
  9632  		}
  9633  		s0 := o0.Args[1]
  9634  		if s0.Op != OpPPC64SLWconst {
  9635  			break
  9636  		}
  9637  		if s0.AuxInt != 16 {
  9638  			break
  9639  		}
  9640  		x1 := s0.Args[0]
  9641  		if x1.Op != OpPPC64MOVBZload {
  9642  			break
  9643  		}
  9644  		i2 := x1.AuxInt
  9645  		if x1.Aux != s {
  9646  			break
  9647  		}
  9648  		_ = x1.Args[1]
  9649  		if p != x1.Args[0] {
  9650  			break
  9651  		}
  9652  		if mem != x1.Args[1] {
  9653  			break
  9654  		}
  9655  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
  9656  			break
  9657  		}
  9658  		b = mergePoint(b, x0, x1, x2)
  9659  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
  9660  		v.reset(OpCopy)
  9661  		v.AddArg(v0)
  9662  		v0.AuxInt = i0
  9663  		v0.Aux = s
  9664  		v0.AddArg(p)
  9665  		v0.AddArg(mem)
  9666  		return true
  9667  	}
  9668  	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
  9669  	// cond: !config.BigEndian 	&& i2 == i0+2 	&& i3 == i0+3 	&& x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 	&& o0.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 	&& mergePoint(b, x0, x1, x2) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) 	&& clobber(s0) && clobber(s1) 	&& clobber(o0)
  9670  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
  9671  	for {
  9672  		t := v.Type
  9673  		_ = v.Args[1]
  9674  		o0 := v.Args[0]
  9675  		if o0.Op != OpPPC64OR {
  9676  			break
  9677  		}
  9678  		if o0.Type != t {
  9679  			break
  9680  		}
  9681  		_ = o0.Args[1]
  9682  		s0 := o0.Args[0]
  9683  		if s0.Op != OpPPC64SLWconst {
  9684  			break
  9685  		}
  9686  		if s0.AuxInt != 16 {
  9687  			break
  9688  		}
  9689  		x1 := s0.Args[0]
  9690  		if x1.Op != OpPPC64MOVBZload {
  9691  			break
  9692  		}
  9693  		i2 := x1.AuxInt
  9694  		s := x1.Aux
  9695  		_ = x1.Args[1]
  9696  		p := x1.Args[0]
  9697  		mem := x1.Args[1]
  9698  		x0 := o0.Args[1]
  9699  		if x0.Op != OpPPC64MOVHZload {
  9700  			break
  9701  		}
  9702  		i0 := x0.AuxInt
  9703  		if x0.Aux != s {
  9704  			break
  9705  		}
  9706  		_ = x0.Args[1]
  9707  		if p != x0.Args[0] {
  9708  			break
  9709  		}
  9710  		if mem != x0.Args[1] {
  9711  			break
  9712  		}
  9713  		s1 := v.Args[1]
  9714  		if s1.Op != OpPPC64SLWconst {
  9715  			break
  9716  		}
  9717  		if s1.AuxInt != 24 {
  9718  			break
  9719  		}
  9720  		x2 := s1.Args[0]
  9721  		if x2.Op != OpPPC64MOVBZload {
  9722  			break
  9723  		}
  9724  		i3 := x2.AuxInt
  9725  		if x2.Aux != s {
  9726  			break
  9727  		}
  9728  		_ = x2.Args[1]
  9729  		if p != x2.Args[0] {
  9730  			break
  9731  		}
  9732  		if mem != x2.Args[1] {
  9733  			break
  9734  		}
  9735  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
  9736  			break
  9737  		}
  9738  		b = mergePoint(b, x0, x1, x2)
  9739  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
  9740  		v.reset(OpCopy)
  9741  		v.AddArg(v0)
  9742  		v0.AuxInt = i0
  9743  		v0.Aux = s
  9744  		v0.AddArg(p)
  9745  		v0.AddArg(mem)
  9746  		return true
  9747  	}
  9748  	// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
  9749  	// cond: !config.BigEndian 	&& i2 == i0+2 	&& i3 == i0+3 	&& x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 	&& o0.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 	&& mergePoint(b, x0, x1, x2) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) 	&& clobber(s0) && clobber(s1) 	&& clobber(o0)
  9750  	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
  9751  	for {
  9752  		t := v.Type
  9753  		_ = v.Args[1]
  9754  		o0 := v.Args[0]
  9755  		if o0.Op != OpPPC64OR {
  9756  			break
  9757  		}
  9758  		if o0.Type != t {
  9759  			break
  9760  		}
  9761  		_ = o0.Args[1]
  9762  		x0 := o0.Args[0]
  9763  		if x0.Op != OpPPC64MOVHZload {
  9764  			break
  9765  		}
  9766  		i0 := x0.AuxInt
  9767  		s := x0.Aux
  9768  		_ = x0.Args[1]
  9769  		p := x0.Args[0]
  9770  		mem := x0.Args[1]
  9771  		s0 := o0.Args[1]
  9772  		if s0.Op != OpPPC64SLWconst {
  9773  			break
  9774  		}
  9775  		if s0.AuxInt != 16 {
  9776  			break
  9777  		}
  9778  		x1 := s0.Args[0]
  9779  		if x1.Op != OpPPC64MOVBZload {
  9780  			break
  9781  		}
  9782  		i2 := x1.AuxInt
  9783  		if x1.Aux != s {
  9784  			break
  9785  		}
  9786  		_ = x1.Args[1]
  9787  		if p != x1.Args[0] {
  9788  			break
  9789  		}
  9790  		if mem != x1.Args[1] {
  9791  			break
  9792  		}
  9793  		s1 := v.Args[1]
  9794  		if s1.Op != OpPPC64SLWconst {
  9795  			break
  9796  		}
  9797  		if s1.AuxInt != 24 {
  9798  			break
  9799  		}
  9800  		x2 := s1.Args[0]
  9801  		if x2.Op != OpPPC64MOVBZload {
  9802  			break
  9803  		}
  9804  		i3 := x2.AuxInt
  9805  		if x2.Aux != s {
  9806  			break
  9807  		}
  9808  		_ = x2.Args[1]
  9809  		if p != x2.Args[0] {
  9810  			break
  9811  		}
  9812  		if mem != x2.Args[1] {
  9813  			break
  9814  		}
  9815  		if !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
  9816  			break
  9817  		}
  9818  		b = mergePoint(b, x0, x1, x2)
  9819  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, t)
  9820  		v.reset(OpCopy)
  9821  		v.AddArg(v0)
  9822  		v0.AuxInt = i0
  9823  		v0.Aux = s
  9824  		v0.AddArg(p)
  9825  		v0.AddArg(mem)
  9826  		return true
  9827  	}
  9828  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))))))
  9829  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
  9830  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
  9831  	for {
  9832  		t := v.Type
  9833  		_ = v.Args[1]
  9834  		s6 := v.Args[0]
  9835  		if s6.Op != OpPPC64SLDconst {
  9836  			break
  9837  		}
  9838  		if s6.AuxInt != 56 {
  9839  			break
  9840  		}
  9841  		x7 := s6.Args[0]
  9842  		if x7.Op != OpPPC64MOVBZload {
  9843  			break
  9844  		}
  9845  		i7 := x7.AuxInt
  9846  		s := x7.Aux
  9847  		_ = x7.Args[1]
  9848  		p := x7.Args[0]
  9849  		mem := x7.Args[1]
  9850  		o5 := v.Args[1]
  9851  		if o5.Op != OpPPC64OR {
  9852  			break
  9853  		}
  9854  		if o5.Type != t {
  9855  			break
  9856  		}
  9857  		_ = o5.Args[1]
  9858  		s5 := o5.Args[0]
  9859  		if s5.Op != OpPPC64SLDconst {
  9860  			break
  9861  		}
  9862  		if s5.AuxInt != 48 {
  9863  			break
  9864  		}
  9865  		x6 := s5.Args[0]
  9866  		if x6.Op != OpPPC64MOVBZload {
  9867  			break
  9868  		}
  9869  		i6 := x6.AuxInt
  9870  		if x6.Aux != s {
  9871  			break
  9872  		}
  9873  		_ = x6.Args[1]
  9874  		if p != x6.Args[0] {
  9875  			break
  9876  		}
  9877  		if mem != x6.Args[1] {
  9878  			break
  9879  		}
  9880  		o4 := o5.Args[1]
  9881  		if o4.Op != OpPPC64OR {
  9882  			break
  9883  		}
  9884  		if o4.Type != t {
  9885  			break
  9886  		}
  9887  		_ = o4.Args[1]
  9888  		s4 := o4.Args[0]
  9889  		if s4.Op != OpPPC64SLDconst {
  9890  			break
  9891  		}
  9892  		if s4.AuxInt != 40 {
  9893  			break
  9894  		}
  9895  		x5 := s4.Args[0]
  9896  		if x5.Op != OpPPC64MOVBZload {
  9897  			break
  9898  		}
  9899  		i5 := x5.AuxInt
  9900  		if x5.Aux != s {
  9901  			break
  9902  		}
  9903  		_ = x5.Args[1]
  9904  		if p != x5.Args[0] {
  9905  			break
  9906  		}
  9907  		if mem != x5.Args[1] {
  9908  			break
  9909  		}
  9910  		o3 := o4.Args[1]
  9911  		if o3.Op != OpPPC64OR {
  9912  			break
  9913  		}
  9914  		if o3.Type != t {
  9915  			break
  9916  		}
  9917  		_ = o3.Args[1]
  9918  		s3 := o3.Args[0]
  9919  		if s3.Op != OpPPC64SLDconst {
  9920  			break
  9921  		}
  9922  		if s3.AuxInt != 32 {
  9923  			break
  9924  		}
  9925  		x4 := s3.Args[0]
  9926  		if x4.Op != OpPPC64MOVBZload {
  9927  			break
  9928  		}
  9929  		i4 := x4.AuxInt
  9930  		if x4.Aux != s {
  9931  			break
  9932  		}
  9933  		_ = x4.Args[1]
  9934  		if p != x4.Args[0] {
  9935  			break
  9936  		}
  9937  		if mem != x4.Args[1] {
  9938  			break
  9939  		}
  9940  		o2 := o3.Args[1]
  9941  		if o2.Op != OpPPC64OR {
  9942  			break
  9943  		}
  9944  		if o2.Type != t {
  9945  			break
  9946  		}
  9947  		_ = o2.Args[1]
  9948  		s2 := o2.Args[0]
  9949  		if s2.Op != OpPPC64SLDconst {
  9950  			break
  9951  		}
  9952  		if s2.AuxInt != 24 {
  9953  			break
  9954  		}
  9955  		x3 := s2.Args[0]
  9956  		if x3.Op != OpPPC64MOVBZload {
  9957  			break
  9958  		}
  9959  		i3 := x3.AuxInt
  9960  		if x3.Aux != s {
  9961  			break
  9962  		}
  9963  		_ = x3.Args[1]
  9964  		if p != x3.Args[0] {
  9965  			break
  9966  		}
  9967  		if mem != x3.Args[1] {
  9968  			break
  9969  		}
  9970  		o1 := o2.Args[1]
  9971  		if o1.Op != OpPPC64OR {
  9972  			break
  9973  		}
  9974  		if o1.Type != t {
  9975  			break
  9976  		}
  9977  		_ = o1.Args[1]
  9978  		s1 := o1.Args[0]
  9979  		if s1.Op != OpPPC64SLDconst {
  9980  			break
  9981  		}
  9982  		if s1.AuxInt != 16 {
  9983  			break
  9984  		}
  9985  		x2 := s1.Args[0]
  9986  		if x2.Op != OpPPC64MOVBZload {
  9987  			break
  9988  		}
  9989  		i2 := x2.AuxInt
  9990  		if x2.Aux != s {
  9991  			break
  9992  		}
  9993  		_ = x2.Args[1]
  9994  		if p != x2.Args[0] {
  9995  			break
  9996  		}
  9997  		if mem != x2.Args[1] {
  9998  			break
  9999  		}
 10000  		o0 := o1.Args[1]
 10001  		if o0.Op != OpPPC64OR {
 10002  			break
 10003  		}
 10004  		if o0.Type != t {
 10005  			break
 10006  		}
 10007  		_ = o0.Args[1]
 10008  		s0 := o0.Args[0]
 10009  		if s0.Op != OpPPC64SLDconst {
 10010  			break
 10011  		}
 10012  		if s0.AuxInt != 8 {
 10013  			break
 10014  		}
 10015  		x1 := s0.Args[0]
 10016  		if x1.Op != OpPPC64MOVBZload {
 10017  			break
 10018  		}
 10019  		i1 := x1.AuxInt
 10020  		if x1.Aux != s {
 10021  			break
 10022  		}
 10023  		_ = x1.Args[1]
 10024  		if p != x1.Args[0] {
 10025  			break
 10026  		}
 10027  		if mem != x1.Args[1] {
 10028  			break
 10029  		}
 10030  		x0 := o0.Args[1]
 10031  		if x0.Op != OpPPC64MOVBZload {
 10032  			break
 10033  		}
 10034  		i0 := x0.AuxInt
 10035  		if x0.Aux != s {
 10036  			break
 10037  		}
 10038  		_ = x0.Args[1]
 10039  		if p != x0.Args[0] {
 10040  			break
 10041  		}
 10042  		if mem != x0.Args[1] {
 10043  			break
 10044  		}
 10045  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10046  			break
 10047  		}
 10048  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10049  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10050  		v.reset(OpCopy)
 10051  		v.AddArg(v0)
 10052  		v0.AuxInt = i0
 10053  		v0.Aux = s
 10054  		v0.AddArg(p)
 10055  		v0.AddArg(mem)
 10056  		return true
 10057  	}
 10058  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))))))
 10059  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10060  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10061  	for {
 10062  		t := v.Type
 10063  		_ = v.Args[1]
 10064  		s6 := v.Args[0]
 10065  		if s6.Op != OpPPC64SLDconst {
 10066  			break
 10067  		}
 10068  		if s6.AuxInt != 56 {
 10069  			break
 10070  		}
 10071  		x7 := s6.Args[0]
 10072  		if x7.Op != OpPPC64MOVBZload {
 10073  			break
 10074  		}
 10075  		i7 := x7.AuxInt
 10076  		s := x7.Aux
 10077  		_ = x7.Args[1]
 10078  		p := x7.Args[0]
 10079  		mem := x7.Args[1]
 10080  		o5 := v.Args[1]
 10081  		if o5.Op != OpPPC64OR {
 10082  			break
 10083  		}
 10084  		if o5.Type != t {
 10085  			break
 10086  		}
 10087  		_ = o5.Args[1]
 10088  		s5 := o5.Args[0]
 10089  		if s5.Op != OpPPC64SLDconst {
 10090  			break
 10091  		}
 10092  		if s5.AuxInt != 48 {
 10093  			break
 10094  		}
 10095  		x6 := s5.Args[0]
 10096  		if x6.Op != OpPPC64MOVBZload {
 10097  			break
 10098  		}
 10099  		i6 := x6.AuxInt
 10100  		if x6.Aux != s {
 10101  			break
 10102  		}
 10103  		_ = x6.Args[1]
 10104  		if p != x6.Args[0] {
 10105  			break
 10106  		}
 10107  		if mem != x6.Args[1] {
 10108  			break
 10109  		}
 10110  		o4 := o5.Args[1]
 10111  		if o4.Op != OpPPC64OR {
 10112  			break
 10113  		}
 10114  		if o4.Type != t {
 10115  			break
 10116  		}
 10117  		_ = o4.Args[1]
 10118  		s4 := o4.Args[0]
 10119  		if s4.Op != OpPPC64SLDconst {
 10120  			break
 10121  		}
 10122  		if s4.AuxInt != 40 {
 10123  			break
 10124  		}
 10125  		x5 := s4.Args[0]
 10126  		if x5.Op != OpPPC64MOVBZload {
 10127  			break
 10128  		}
 10129  		i5 := x5.AuxInt
 10130  		if x5.Aux != s {
 10131  			break
 10132  		}
 10133  		_ = x5.Args[1]
 10134  		if p != x5.Args[0] {
 10135  			break
 10136  		}
 10137  		if mem != x5.Args[1] {
 10138  			break
 10139  		}
 10140  		o3 := o4.Args[1]
 10141  		if o3.Op != OpPPC64OR {
 10142  			break
 10143  		}
 10144  		if o3.Type != t {
 10145  			break
 10146  		}
 10147  		_ = o3.Args[1]
 10148  		s3 := o3.Args[0]
 10149  		if s3.Op != OpPPC64SLDconst {
 10150  			break
 10151  		}
 10152  		if s3.AuxInt != 32 {
 10153  			break
 10154  		}
 10155  		x4 := s3.Args[0]
 10156  		if x4.Op != OpPPC64MOVBZload {
 10157  			break
 10158  		}
 10159  		i4 := x4.AuxInt
 10160  		if x4.Aux != s {
 10161  			break
 10162  		}
 10163  		_ = x4.Args[1]
 10164  		if p != x4.Args[0] {
 10165  			break
 10166  		}
 10167  		if mem != x4.Args[1] {
 10168  			break
 10169  		}
 10170  		o2 := o3.Args[1]
 10171  		if o2.Op != OpPPC64OR {
 10172  			break
 10173  		}
 10174  		if o2.Type != t {
 10175  			break
 10176  		}
 10177  		_ = o2.Args[1]
 10178  		s2 := o2.Args[0]
 10179  		if s2.Op != OpPPC64SLDconst {
 10180  			break
 10181  		}
 10182  		if s2.AuxInt != 24 {
 10183  			break
 10184  		}
 10185  		x3 := s2.Args[0]
 10186  		if x3.Op != OpPPC64MOVBZload {
 10187  			break
 10188  		}
 10189  		i3 := x3.AuxInt
 10190  		if x3.Aux != s {
 10191  			break
 10192  		}
 10193  		_ = x3.Args[1]
 10194  		if p != x3.Args[0] {
 10195  			break
 10196  		}
 10197  		if mem != x3.Args[1] {
 10198  			break
 10199  		}
 10200  		o1 := o2.Args[1]
 10201  		if o1.Op != OpPPC64OR {
 10202  			break
 10203  		}
 10204  		if o1.Type != t {
 10205  			break
 10206  		}
 10207  		_ = o1.Args[1]
 10208  		s1 := o1.Args[0]
 10209  		if s1.Op != OpPPC64SLDconst {
 10210  			break
 10211  		}
 10212  		if s1.AuxInt != 16 {
 10213  			break
 10214  		}
 10215  		x2 := s1.Args[0]
 10216  		if x2.Op != OpPPC64MOVBZload {
 10217  			break
 10218  		}
 10219  		i2 := x2.AuxInt
 10220  		if x2.Aux != s {
 10221  			break
 10222  		}
 10223  		_ = x2.Args[1]
 10224  		if p != x2.Args[0] {
 10225  			break
 10226  		}
 10227  		if mem != x2.Args[1] {
 10228  			break
 10229  		}
 10230  		o0 := o1.Args[1]
 10231  		if o0.Op != OpPPC64OR {
 10232  			break
 10233  		}
 10234  		if o0.Type != t {
 10235  			break
 10236  		}
 10237  		_ = o0.Args[1]
 10238  		x0 := o0.Args[0]
 10239  		if x0.Op != OpPPC64MOVBZload {
 10240  			break
 10241  		}
 10242  		i0 := x0.AuxInt
 10243  		if x0.Aux != s {
 10244  			break
 10245  		}
 10246  		_ = x0.Args[1]
 10247  		if p != x0.Args[0] {
 10248  			break
 10249  		}
 10250  		if mem != x0.Args[1] {
 10251  			break
 10252  		}
 10253  		s0 := o0.Args[1]
 10254  		if s0.Op != OpPPC64SLDconst {
 10255  			break
 10256  		}
 10257  		if s0.AuxInt != 8 {
 10258  			break
 10259  		}
 10260  		x1 := s0.Args[0]
 10261  		if x1.Op != OpPPC64MOVBZload {
 10262  			break
 10263  		}
 10264  		i1 := x1.AuxInt
 10265  		if x1.Aux != s {
 10266  			break
 10267  		}
 10268  		_ = x1.Args[1]
 10269  		if p != x1.Args[0] {
 10270  			break
 10271  		}
 10272  		if mem != x1.Args[1] {
 10273  			break
 10274  		}
 10275  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10276  			break
 10277  		}
 10278  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10279  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10280  		v.reset(OpCopy)
 10281  		v.AddArg(v0)
 10282  		v0.AuxInt = i0
 10283  		v0.Aux = s
 10284  		v0.AddArg(p)
 10285  		v0.AddArg(mem)
 10286  		return true
 10287  	}
 10288  	return false
 10289  }
 10290  func rewriteValuePPC64_OpPPC64OR_20(v *Value) bool {
 10291  	b := v.Block
 10292  	_ = b
 10293  	config := b.Func.Config
 10294  	_ = config
 10295  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))))))
 10296  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10297  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10298  	for {
 10299  		t := v.Type
 10300  		_ = v.Args[1]
 10301  		s6 := v.Args[0]
 10302  		if s6.Op != OpPPC64SLDconst {
 10303  			break
 10304  		}
 10305  		if s6.AuxInt != 56 {
 10306  			break
 10307  		}
 10308  		x7 := s6.Args[0]
 10309  		if x7.Op != OpPPC64MOVBZload {
 10310  			break
 10311  		}
 10312  		i7 := x7.AuxInt
 10313  		s := x7.Aux
 10314  		_ = x7.Args[1]
 10315  		p := x7.Args[0]
 10316  		mem := x7.Args[1]
 10317  		o5 := v.Args[1]
 10318  		if o5.Op != OpPPC64OR {
 10319  			break
 10320  		}
 10321  		if o5.Type != t {
 10322  			break
 10323  		}
 10324  		_ = o5.Args[1]
 10325  		s5 := o5.Args[0]
 10326  		if s5.Op != OpPPC64SLDconst {
 10327  			break
 10328  		}
 10329  		if s5.AuxInt != 48 {
 10330  			break
 10331  		}
 10332  		x6 := s5.Args[0]
 10333  		if x6.Op != OpPPC64MOVBZload {
 10334  			break
 10335  		}
 10336  		i6 := x6.AuxInt
 10337  		if x6.Aux != s {
 10338  			break
 10339  		}
 10340  		_ = x6.Args[1]
 10341  		if p != x6.Args[0] {
 10342  			break
 10343  		}
 10344  		if mem != x6.Args[1] {
 10345  			break
 10346  		}
 10347  		o4 := o5.Args[1]
 10348  		if o4.Op != OpPPC64OR {
 10349  			break
 10350  		}
 10351  		if o4.Type != t {
 10352  			break
 10353  		}
 10354  		_ = o4.Args[1]
 10355  		s4 := o4.Args[0]
 10356  		if s4.Op != OpPPC64SLDconst {
 10357  			break
 10358  		}
 10359  		if s4.AuxInt != 40 {
 10360  			break
 10361  		}
 10362  		x5 := s4.Args[0]
 10363  		if x5.Op != OpPPC64MOVBZload {
 10364  			break
 10365  		}
 10366  		i5 := x5.AuxInt
 10367  		if x5.Aux != s {
 10368  			break
 10369  		}
 10370  		_ = x5.Args[1]
 10371  		if p != x5.Args[0] {
 10372  			break
 10373  		}
 10374  		if mem != x5.Args[1] {
 10375  			break
 10376  		}
 10377  		o3 := o4.Args[1]
 10378  		if o3.Op != OpPPC64OR {
 10379  			break
 10380  		}
 10381  		if o3.Type != t {
 10382  			break
 10383  		}
 10384  		_ = o3.Args[1]
 10385  		s3 := o3.Args[0]
 10386  		if s3.Op != OpPPC64SLDconst {
 10387  			break
 10388  		}
 10389  		if s3.AuxInt != 32 {
 10390  			break
 10391  		}
 10392  		x4 := s3.Args[0]
 10393  		if x4.Op != OpPPC64MOVBZload {
 10394  			break
 10395  		}
 10396  		i4 := x4.AuxInt
 10397  		if x4.Aux != s {
 10398  			break
 10399  		}
 10400  		_ = x4.Args[1]
 10401  		if p != x4.Args[0] {
 10402  			break
 10403  		}
 10404  		if mem != x4.Args[1] {
 10405  			break
 10406  		}
 10407  		o2 := o3.Args[1]
 10408  		if o2.Op != OpPPC64OR {
 10409  			break
 10410  		}
 10411  		if o2.Type != t {
 10412  			break
 10413  		}
 10414  		_ = o2.Args[1]
 10415  		s2 := o2.Args[0]
 10416  		if s2.Op != OpPPC64SLDconst {
 10417  			break
 10418  		}
 10419  		if s2.AuxInt != 24 {
 10420  			break
 10421  		}
 10422  		x3 := s2.Args[0]
 10423  		if x3.Op != OpPPC64MOVBZload {
 10424  			break
 10425  		}
 10426  		i3 := x3.AuxInt
 10427  		if x3.Aux != s {
 10428  			break
 10429  		}
 10430  		_ = x3.Args[1]
 10431  		if p != x3.Args[0] {
 10432  			break
 10433  		}
 10434  		if mem != x3.Args[1] {
 10435  			break
 10436  		}
 10437  		o1 := o2.Args[1]
 10438  		if o1.Op != OpPPC64OR {
 10439  			break
 10440  		}
 10441  		if o1.Type != t {
 10442  			break
 10443  		}
 10444  		_ = o1.Args[1]
 10445  		o0 := o1.Args[0]
 10446  		if o0.Op != OpPPC64OR {
 10447  			break
 10448  		}
 10449  		if o0.Type != t {
 10450  			break
 10451  		}
 10452  		_ = o0.Args[1]
 10453  		s0 := o0.Args[0]
 10454  		if s0.Op != OpPPC64SLDconst {
 10455  			break
 10456  		}
 10457  		if s0.AuxInt != 8 {
 10458  			break
 10459  		}
 10460  		x1 := s0.Args[0]
 10461  		if x1.Op != OpPPC64MOVBZload {
 10462  			break
 10463  		}
 10464  		i1 := x1.AuxInt
 10465  		if x1.Aux != s {
 10466  			break
 10467  		}
 10468  		_ = x1.Args[1]
 10469  		if p != x1.Args[0] {
 10470  			break
 10471  		}
 10472  		if mem != x1.Args[1] {
 10473  			break
 10474  		}
 10475  		x0 := o0.Args[1]
 10476  		if x0.Op != OpPPC64MOVBZload {
 10477  			break
 10478  		}
 10479  		i0 := x0.AuxInt
 10480  		if x0.Aux != s {
 10481  			break
 10482  		}
 10483  		_ = x0.Args[1]
 10484  		if p != x0.Args[0] {
 10485  			break
 10486  		}
 10487  		if mem != x0.Args[1] {
 10488  			break
 10489  		}
 10490  		s1 := o1.Args[1]
 10491  		if s1.Op != OpPPC64SLDconst {
 10492  			break
 10493  		}
 10494  		if s1.AuxInt != 16 {
 10495  			break
 10496  		}
 10497  		x2 := s1.Args[0]
 10498  		if x2.Op != OpPPC64MOVBZload {
 10499  			break
 10500  		}
 10501  		i2 := x2.AuxInt
 10502  		if x2.Aux != s {
 10503  			break
 10504  		}
 10505  		_ = x2.Args[1]
 10506  		if p != x2.Args[0] {
 10507  			break
 10508  		}
 10509  		if mem != x2.Args[1] {
 10510  			break
 10511  		}
 10512  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10513  			break
 10514  		}
 10515  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10516  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10517  		v.reset(OpCopy)
 10518  		v.AddArg(v0)
 10519  		v0.AuxInt = i0
 10520  		v0.Aux = s
 10521  		v0.AddArg(p)
 10522  		v0.AddArg(mem)
 10523  		return true
 10524  	}
 10525  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))))))
 10526  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10527  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10528  	for {
 10529  		t := v.Type
 10530  		_ = v.Args[1]
 10531  		s6 := v.Args[0]
 10532  		if s6.Op != OpPPC64SLDconst {
 10533  			break
 10534  		}
 10535  		if s6.AuxInt != 56 {
 10536  			break
 10537  		}
 10538  		x7 := s6.Args[0]
 10539  		if x7.Op != OpPPC64MOVBZload {
 10540  			break
 10541  		}
 10542  		i7 := x7.AuxInt
 10543  		s := x7.Aux
 10544  		_ = x7.Args[1]
 10545  		p := x7.Args[0]
 10546  		mem := x7.Args[1]
 10547  		o5 := v.Args[1]
 10548  		if o5.Op != OpPPC64OR {
 10549  			break
 10550  		}
 10551  		if o5.Type != t {
 10552  			break
 10553  		}
 10554  		_ = o5.Args[1]
 10555  		s5 := o5.Args[0]
 10556  		if s5.Op != OpPPC64SLDconst {
 10557  			break
 10558  		}
 10559  		if s5.AuxInt != 48 {
 10560  			break
 10561  		}
 10562  		x6 := s5.Args[0]
 10563  		if x6.Op != OpPPC64MOVBZload {
 10564  			break
 10565  		}
 10566  		i6 := x6.AuxInt
 10567  		if x6.Aux != s {
 10568  			break
 10569  		}
 10570  		_ = x6.Args[1]
 10571  		if p != x6.Args[0] {
 10572  			break
 10573  		}
 10574  		if mem != x6.Args[1] {
 10575  			break
 10576  		}
 10577  		o4 := o5.Args[1]
 10578  		if o4.Op != OpPPC64OR {
 10579  			break
 10580  		}
 10581  		if o4.Type != t {
 10582  			break
 10583  		}
 10584  		_ = o4.Args[1]
 10585  		s4 := o4.Args[0]
 10586  		if s4.Op != OpPPC64SLDconst {
 10587  			break
 10588  		}
 10589  		if s4.AuxInt != 40 {
 10590  			break
 10591  		}
 10592  		x5 := s4.Args[0]
 10593  		if x5.Op != OpPPC64MOVBZload {
 10594  			break
 10595  		}
 10596  		i5 := x5.AuxInt
 10597  		if x5.Aux != s {
 10598  			break
 10599  		}
 10600  		_ = x5.Args[1]
 10601  		if p != x5.Args[0] {
 10602  			break
 10603  		}
 10604  		if mem != x5.Args[1] {
 10605  			break
 10606  		}
 10607  		o3 := o4.Args[1]
 10608  		if o3.Op != OpPPC64OR {
 10609  			break
 10610  		}
 10611  		if o3.Type != t {
 10612  			break
 10613  		}
 10614  		_ = o3.Args[1]
 10615  		s3 := o3.Args[0]
 10616  		if s3.Op != OpPPC64SLDconst {
 10617  			break
 10618  		}
 10619  		if s3.AuxInt != 32 {
 10620  			break
 10621  		}
 10622  		x4 := s3.Args[0]
 10623  		if x4.Op != OpPPC64MOVBZload {
 10624  			break
 10625  		}
 10626  		i4 := x4.AuxInt
 10627  		if x4.Aux != s {
 10628  			break
 10629  		}
 10630  		_ = x4.Args[1]
 10631  		if p != x4.Args[0] {
 10632  			break
 10633  		}
 10634  		if mem != x4.Args[1] {
 10635  			break
 10636  		}
 10637  		o2 := o3.Args[1]
 10638  		if o2.Op != OpPPC64OR {
 10639  			break
 10640  		}
 10641  		if o2.Type != t {
 10642  			break
 10643  		}
 10644  		_ = o2.Args[1]
 10645  		s2 := o2.Args[0]
 10646  		if s2.Op != OpPPC64SLDconst {
 10647  			break
 10648  		}
 10649  		if s2.AuxInt != 24 {
 10650  			break
 10651  		}
 10652  		x3 := s2.Args[0]
 10653  		if x3.Op != OpPPC64MOVBZload {
 10654  			break
 10655  		}
 10656  		i3 := x3.AuxInt
 10657  		if x3.Aux != s {
 10658  			break
 10659  		}
 10660  		_ = x3.Args[1]
 10661  		if p != x3.Args[0] {
 10662  			break
 10663  		}
 10664  		if mem != x3.Args[1] {
 10665  			break
 10666  		}
 10667  		o1 := o2.Args[1]
 10668  		if o1.Op != OpPPC64OR {
 10669  			break
 10670  		}
 10671  		if o1.Type != t {
 10672  			break
 10673  		}
 10674  		_ = o1.Args[1]
 10675  		o0 := o1.Args[0]
 10676  		if o0.Op != OpPPC64OR {
 10677  			break
 10678  		}
 10679  		if o0.Type != t {
 10680  			break
 10681  		}
 10682  		_ = o0.Args[1]
 10683  		x0 := o0.Args[0]
 10684  		if x0.Op != OpPPC64MOVBZload {
 10685  			break
 10686  		}
 10687  		i0 := x0.AuxInt
 10688  		if x0.Aux != s {
 10689  			break
 10690  		}
 10691  		_ = x0.Args[1]
 10692  		if p != x0.Args[0] {
 10693  			break
 10694  		}
 10695  		if mem != x0.Args[1] {
 10696  			break
 10697  		}
 10698  		s0 := o0.Args[1]
 10699  		if s0.Op != OpPPC64SLDconst {
 10700  			break
 10701  		}
 10702  		if s0.AuxInt != 8 {
 10703  			break
 10704  		}
 10705  		x1 := s0.Args[0]
 10706  		if x1.Op != OpPPC64MOVBZload {
 10707  			break
 10708  		}
 10709  		i1 := x1.AuxInt
 10710  		if x1.Aux != s {
 10711  			break
 10712  		}
 10713  		_ = x1.Args[1]
 10714  		if p != x1.Args[0] {
 10715  			break
 10716  		}
 10717  		if mem != x1.Args[1] {
 10718  			break
 10719  		}
 10720  		s1 := o1.Args[1]
 10721  		if s1.Op != OpPPC64SLDconst {
 10722  			break
 10723  		}
 10724  		if s1.AuxInt != 16 {
 10725  			break
 10726  		}
 10727  		x2 := s1.Args[0]
 10728  		if x2.Op != OpPPC64MOVBZload {
 10729  			break
 10730  		}
 10731  		i2 := x2.AuxInt
 10732  		if x2.Aux != s {
 10733  			break
 10734  		}
 10735  		_ = x2.Args[1]
 10736  		if p != x2.Args[0] {
 10737  			break
 10738  		}
 10739  		if mem != x2.Args[1] {
 10740  			break
 10741  		}
 10742  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10743  			break
 10744  		}
 10745  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10746  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10747  		v.reset(OpCopy)
 10748  		v.AddArg(v0)
 10749  		v0.AuxInt = i0
 10750  		v0.Aux = s
 10751  		v0.AddArg(p)
 10752  		v0.AddArg(mem)
 10753  		return true
 10754  	}
 10755  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))))
 10756  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10757  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10758  	for {
 10759  		t := v.Type
 10760  		_ = v.Args[1]
 10761  		s6 := v.Args[0]
 10762  		if s6.Op != OpPPC64SLDconst {
 10763  			break
 10764  		}
 10765  		if s6.AuxInt != 56 {
 10766  			break
 10767  		}
 10768  		x7 := s6.Args[0]
 10769  		if x7.Op != OpPPC64MOVBZload {
 10770  			break
 10771  		}
 10772  		i7 := x7.AuxInt
 10773  		s := x7.Aux
 10774  		_ = x7.Args[1]
 10775  		p := x7.Args[0]
 10776  		mem := x7.Args[1]
 10777  		o5 := v.Args[1]
 10778  		if o5.Op != OpPPC64OR {
 10779  			break
 10780  		}
 10781  		if o5.Type != t {
 10782  			break
 10783  		}
 10784  		_ = o5.Args[1]
 10785  		s5 := o5.Args[0]
 10786  		if s5.Op != OpPPC64SLDconst {
 10787  			break
 10788  		}
 10789  		if s5.AuxInt != 48 {
 10790  			break
 10791  		}
 10792  		x6 := s5.Args[0]
 10793  		if x6.Op != OpPPC64MOVBZload {
 10794  			break
 10795  		}
 10796  		i6 := x6.AuxInt
 10797  		if x6.Aux != s {
 10798  			break
 10799  		}
 10800  		_ = x6.Args[1]
 10801  		if p != x6.Args[0] {
 10802  			break
 10803  		}
 10804  		if mem != x6.Args[1] {
 10805  			break
 10806  		}
 10807  		o4 := o5.Args[1]
 10808  		if o4.Op != OpPPC64OR {
 10809  			break
 10810  		}
 10811  		if o4.Type != t {
 10812  			break
 10813  		}
 10814  		_ = o4.Args[1]
 10815  		s4 := o4.Args[0]
 10816  		if s4.Op != OpPPC64SLDconst {
 10817  			break
 10818  		}
 10819  		if s4.AuxInt != 40 {
 10820  			break
 10821  		}
 10822  		x5 := s4.Args[0]
 10823  		if x5.Op != OpPPC64MOVBZload {
 10824  			break
 10825  		}
 10826  		i5 := x5.AuxInt
 10827  		if x5.Aux != s {
 10828  			break
 10829  		}
 10830  		_ = x5.Args[1]
 10831  		if p != x5.Args[0] {
 10832  			break
 10833  		}
 10834  		if mem != x5.Args[1] {
 10835  			break
 10836  		}
 10837  		o3 := o4.Args[1]
 10838  		if o3.Op != OpPPC64OR {
 10839  			break
 10840  		}
 10841  		if o3.Type != t {
 10842  			break
 10843  		}
 10844  		_ = o3.Args[1]
 10845  		s3 := o3.Args[0]
 10846  		if s3.Op != OpPPC64SLDconst {
 10847  			break
 10848  		}
 10849  		if s3.AuxInt != 32 {
 10850  			break
 10851  		}
 10852  		x4 := s3.Args[0]
 10853  		if x4.Op != OpPPC64MOVBZload {
 10854  			break
 10855  		}
 10856  		i4 := x4.AuxInt
 10857  		if x4.Aux != s {
 10858  			break
 10859  		}
 10860  		_ = x4.Args[1]
 10861  		if p != x4.Args[0] {
 10862  			break
 10863  		}
 10864  		if mem != x4.Args[1] {
 10865  			break
 10866  		}
 10867  		o2 := o3.Args[1]
 10868  		if o2.Op != OpPPC64OR {
 10869  			break
 10870  		}
 10871  		if o2.Type != t {
 10872  			break
 10873  		}
 10874  		_ = o2.Args[1]
 10875  		o1 := o2.Args[0]
 10876  		if o1.Op != OpPPC64OR {
 10877  			break
 10878  		}
 10879  		if o1.Type != t {
 10880  			break
 10881  		}
 10882  		_ = o1.Args[1]
 10883  		s1 := o1.Args[0]
 10884  		if s1.Op != OpPPC64SLDconst {
 10885  			break
 10886  		}
 10887  		if s1.AuxInt != 16 {
 10888  			break
 10889  		}
 10890  		x2 := s1.Args[0]
 10891  		if x2.Op != OpPPC64MOVBZload {
 10892  			break
 10893  		}
 10894  		i2 := x2.AuxInt
 10895  		if x2.Aux != s {
 10896  			break
 10897  		}
 10898  		_ = x2.Args[1]
 10899  		if p != x2.Args[0] {
 10900  			break
 10901  		}
 10902  		if mem != x2.Args[1] {
 10903  			break
 10904  		}
 10905  		o0 := o1.Args[1]
 10906  		if o0.Op != OpPPC64OR {
 10907  			break
 10908  		}
 10909  		if o0.Type != t {
 10910  			break
 10911  		}
 10912  		_ = o0.Args[1]
 10913  		s0 := o0.Args[0]
 10914  		if s0.Op != OpPPC64SLDconst {
 10915  			break
 10916  		}
 10917  		if s0.AuxInt != 8 {
 10918  			break
 10919  		}
 10920  		x1 := s0.Args[0]
 10921  		if x1.Op != OpPPC64MOVBZload {
 10922  			break
 10923  		}
 10924  		i1 := x1.AuxInt
 10925  		if x1.Aux != s {
 10926  			break
 10927  		}
 10928  		_ = x1.Args[1]
 10929  		if p != x1.Args[0] {
 10930  			break
 10931  		}
 10932  		if mem != x1.Args[1] {
 10933  			break
 10934  		}
 10935  		x0 := o0.Args[1]
 10936  		if x0.Op != OpPPC64MOVBZload {
 10937  			break
 10938  		}
 10939  		i0 := x0.AuxInt
 10940  		if x0.Aux != s {
 10941  			break
 10942  		}
 10943  		_ = x0.Args[1]
 10944  		if p != x0.Args[0] {
 10945  			break
 10946  		}
 10947  		if mem != x0.Args[1] {
 10948  			break
 10949  		}
 10950  		s2 := o2.Args[1]
 10951  		if s2.Op != OpPPC64SLDconst {
 10952  			break
 10953  		}
 10954  		if s2.AuxInt != 24 {
 10955  			break
 10956  		}
 10957  		x3 := s2.Args[0]
 10958  		if x3.Op != OpPPC64MOVBZload {
 10959  			break
 10960  		}
 10961  		i3 := x3.AuxInt
 10962  		if x3.Aux != s {
 10963  			break
 10964  		}
 10965  		_ = x3.Args[1]
 10966  		if p != x3.Args[0] {
 10967  			break
 10968  		}
 10969  		if mem != x3.Args[1] {
 10970  			break
 10971  		}
 10972  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 10973  			break
 10974  		}
 10975  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 10976  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 10977  		v.reset(OpCopy)
 10978  		v.AddArg(v0)
 10979  		v0.AuxInt = i0
 10980  		v0.Aux = s
 10981  		v0.AddArg(p)
 10982  		v0.AddArg(mem)
 10983  		return true
 10984  	}
 10985  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))))
 10986  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 10987  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 10988  	for {
 10989  		t := v.Type
 10990  		_ = v.Args[1]
 10991  		s6 := v.Args[0]
 10992  		if s6.Op != OpPPC64SLDconst {
 10993  			break
 10994  		}
 10995  		if s6.AuxInt != 56 {
 10996  			break
 10997  		}
 10998  		x7 := s6.Args[0]
 10999  		if x7.Op != OpPPC64MOVBZload {
 11000  			break
 11001  		}
 11002  		i7 := x7.AuxInt
 11003  		s := x7.Aux
 11004  		_ = x7.Args[1]
 11005  		p := x7.Args[0]
 11006  		mem := x7.Args[1]
 11007  		o5 := v.Args[1]
 11008  		if o5.Op != OpPPC64OR {
 11009  			break
 11010  		}
 11011  		if o5.Type != t {
 11012  			break
 11013  		}
 11014  		_ = o5.Args[1]
 11015  		s5 := o5.Args[0]
 11016  		if s5.Op != OpPPC64SLDconst {
 11017  			break
 11018  		}
 11019  		if s5.AuxInt != 48 {
 11020  			break
 11021  		}
 11022  		x6 := s5.Args[0]
 11023  		if x6.Op != OpPPC64MOVBZload {
 11024  			break
 11025  		}
 11026  		i6 := x6.AuxInt
 11027  		if x6.Aux != s {
 11028  			break
 11029  		}
 11030  		_ = x6.Args[1]
 11031  		if p != x6.Args[0] {
 11032  			break
 11033  		}
 11034  		if mem != x6.Args[1] {
 11035  			break
 11036  		}
 11037  		o4 := o5.Args[1]
 11038  		if o4.Op != OpPPC64OR {
 11039  			break
 11040  		}
 11041  		if o4.Type != t {
 11042  			break
 11043  		}
 11044  		_ = o4.Args[1]
 11045  		s4 := o4.Args[0]
 11046  		if s4.Op != OpPPC64SLDconst {
 11047  			break
 11048  		}
 11049  		if s4.AuxInt != 40 {
 11050  			break
 11051  		}
 11052  		x5 := s4.Args[0]
 11053  		if x5.Op != OpPPC64MOVBZload {
 11054  			break
 11055  		}
 11056  		i5 := x5.AuxInt
 11057  		if x5.Aux != s {
 11058  			break
 11059  		}
 11060  		_ = x5.Args[1]
 11061  		if p != x5.Args[0] {
 11062  			break
 11063  		}
 11064  		if mem != x5.Args[1] {
 11065  			break
 11066  		}
 11067  		o3 := o4.Args[1]
 11068  		if o3.Op != OpPPC64OR {
 11069  			break
 11070  		}
 11071  		if o3.Type != t {
 11072  			break
 11073  		}
 11074  		_ = o3.Args[1]
 11075  		s3 := o3.Args[0]
 11076  		if s3.Op != OpPPC64SLDconst {
 11077  			break
 11078  		}
 11079  		if s3.AuxInt != 32 {
 11080  			break
 11081  		}
 11082  		x4 := s3.Args[0]
 11083  		if x4.Op != OpPPC64MOVBZload {
 11084  			break
 11085  		}
 11086  		i4 := x4.AuxInt
 11087  		if x4.Aux != s {
 11088  			break
 11089  		}
 11090  		_ = x4.Args[1]
 11091  		if p != x4.Args[0] {
 11092  			break
 11093  		}
 11094  		if mem != x4.Args[1] {
 11095  			break
 11096  		}
 11097  		o2 := o3.Args[1]
 11098  		if o2.Op != OpPPC64OR {
 11099  			break
 11100  		}
 11101  		if o2.Type != t {
 11102  			break
 11103  		}
 11104  		_ = o2.Args[1]
 11105  		o1 := o2.Args[0]
 11106  		if o1.Op != OpPPC64OR {
 11107  			break
 11108  		}
 11109  		if o1.Type != t {
 11110  			break
 11111  		}
 11112  		_ = o1.Args[1]
 11113  		s1 := o1.Args[0]
 11114  		if s1.Op != OpPPC64SLDconst {
 11115  			break
 11116  		}
 11117  		if s1.AuxInt != 16 {
 11118  			break
 11119  		}
 11120  		x2 := s1.Args[0]
 11121  		if x2.Op != OpPPC64MOVBZload {
 11122  			break
 11123  		}
 11124  		i2 := x2.AuxInt
 11125  		if x2.Aux != s {
 11126  			break
 11127  		}
 11128  		_ = x2.Args[1]
 11129  		if p != x2.Args[0] {
 11130  			break
 11131  		}
 11132  		if mem != x2.Args[1] {
 11133  			break
 11134  		}
 11135  		o0 := o1.Args[1]
 11136  		if o0.Op != OpPPC64OR {
 11137  			break
 11138  		}
 11139  		if o0.Type != t {
 11140  			break
 11141  		}
 11142  		_ = o0.Args[1]
 11143  		x0 := o0.Args[0]
 11144  		if x0.Op != OpPPC64MOVBZload {
 11145  			break
 11146  		}
 11147  		i0 := x0.AuxInt
 11148  		if x0.Aux != s {
 11149  			break
 11150  		}
 11151  		_ = x0.Args[1]
 11152  		if p != x0.Args[0] {
 11153  			break
 11154  		}
 11155  		if mem != x0.Args[1] {
 11156  			break
 11157  		}
 11158  		s0 := o0.Args[1]
 11159  		if s0.Op != OpPPC64SLDconst {
 11160  			break
 11161  		}
 11162  		if s0.AuxInt != 8 {
 11163  			break
 11164  		}
 11165  		x1 := s0.Args[0]
 11166  		if x1.Op != OpPPC64MOVBZload {
 11167  			break
 11168  		}
 11169  		i1 := x1.AuxInt
 11170  		if x1.Aux != s {
 11171  			break
 11172  		}
 11173  		_ = x1.Args[1]
 11174  		if p != x1.Args[0] {
 11175  			break
 11176  		}
 11177  		if mem != x1.Args[1] {
 11178  			break
 11179  		}
 11180  		s2 := o2.Args[1]
 11181  		if s2.Op != OpPPC64SLDconst {
 11182  			break
 11183  		}
 11184  		if s2.AuxInt != 24 {
 11185  			break
 11186  		}
 11187  		x3 := s2.Args[0]
 11188  		if x3.Op != OpPPC64MOVBZload {
 11189  			break
 11190  		}
 11191  		i3 := x3.AuxInt
 11192  		if x3.Aux != s {
 11193  			break
 11194  		}
 11195  		_ = x3.Args[1]
 11196  		if p != x3.Args[0] {
 11197  			break
 11198  		}
 11199  		if mem != x3.Args[1] {
 11200  			break
 11201  		}
 11202  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 11203  			break
 11204  		}
 11205  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 11206  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 11207  		v.reset(OpCopy)
 11208  		v.AddArg(v0)
 11209  		v0.AuxInt = i0
 11210  		v0.Aux = s
 11211  		v0.AddArg(p)
 11212  		v0.AddArg(mem)
 11213  		return true
 11214  	}
 11215  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))))
 11216  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 11217  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 11218  	for {
 11219  		t := v.Type
 11220  		_ = v.Args[1]
 11221  		s6 := v.Args[0]
 11222  		if s6.Op != OpPPC64SLDconst {
 11223  			break
 11224  		}
 11225  		if s6.AuxInt != 56 {
 11226  			break
 11227  		}
 11228  		x7 := s6.Args[0]
 11229  		if x7.Op != OpPPC64MOVBZload {
 11230  			break
 11231  		}
 11232  		i7 := x7.AuxInt
 11233  		s := x7.Aux
 11234  		_ = x7.Args[1]
 11235  		p := x7.Args[0]
 11236  		mem := x7.Args[1]
 11237  		o5 := v.Args[1]
 11238  		if o5.Op != OpPPC64OR {
 11239  			break
 11240  		}
 11241  		if o5.Type != t {
 11242  			break
 11243  		}
 11244  		_ = o5.Args[1]
 11245  		s5 := o5.Args[0]
 11246  		if s5.Op != OpPPC64SLDconst {
 11247  			break
 11248  		}
 11249  		if s5.AuxInt != 48 {
 11250  			break
 11251  		}
 11252  		x6 := s5.Args[0]
 11253  		if x6.Op != OpPPC64MOVBZload {
 11254  			break
 11255  		}
 11256  		i6 := x6.AuxInt
 11257  		if x6.Aux != s {
 11258  			break
 11259  		}
 11260  		_ = x6.Args[1]
 11261  		if p != x6.Args[0] {
 11262  			break
 11263  		}
 11264  		if mem != x6.Args[1] {
 11265  			break
 11266  		}
 11267  		o4 := o5.Args[1]
 11268  		if o4.Op != OpPPC64OR {
 11269  			break
 11270  		}
 11271  		if o4.Type != t {
 11272  			break
 11273  		}
 11274  		_ = o4.Args[1]
 11275  		s4 := o4.Args[0]
 11276  		if s4.Op != OpPPC64SLDconst {
 11277  			break
 11278  		}
 11279  		if s4.AuxInt != 40 {
 11280  			break
 11281  		}
 11282  		x5 := s4.Args[0]
 11283  		if x5.Op != OpPPC64MOVBZload {
 11284  			break
 11285  		}
 11286  		i5 := x5.AuxInt
 11287  		if x5.Aux != s {
 11288  			break
 11289  		}
 11290  		_ = x5.Args[1]
 11291  		if p != x5.Args[0] {
 11292  			break
 11293  		}
 11294  		if mem != x5.Args[1] {
 11295  			break
 11296  		}
 11297  		o3 := o4.Args[1]
 11298  		if o3.Op != OpPPC64OR {
 11299  			break
 11300  		}
 11301  		if o3.Type != t {
 11302  			break
 11303  		}
 11304  		_ = o3.Args[1]
 11305  		s3 := o3.Args[0]
 11306  		if s3.Op != OpPPC64SLDconst {
 11307  			break
 11308  		}
 11309  		if s3.AuxInt != 32 {
 11310  			break
 11311  		}
 11312  		x4 := s3.Args[0]
 11313  		if x4.Op != OpPPC64MOVBZload {
 11314  			break
 11315  		}
 11316  		i4 := x4.AuxInt
 11317  		if x4.Aux != s {
 11318  			break
 11319  		}
 11320  		_ = x4.Args[1]
 11321  		if p != x4.Args[0] {
 11322  			break
 11323  		}
 11324  		if mem != x4.Args[1] {
 11325  			break
 11326  		}
 11327  		o2 := o3.Args[1]
 11328  		if o2.Op != OpPPC64OR {
 11329  			break
 11330  		}
 11331  		if o2.Type != t {
 11332  			break
 11333  		}
 11334  		_ = o2.Args[1]
 11335  		o1 := o2.Args[0]
 11336  		if o1.Op != OpPPC64OR {
 11337  			break
 11338  		}
 11339  		if o1.Type != t {
 11340  			break
 11341  		}
 11342  		_ = o1.Args[1]
 11343  		o0 := o1.Args[0]
 11344  		if o0.Op != OpPPC64OR {
 11345  			break
 11346  		}
 11347  		if o0.Type != t {
 11348  			break
 11349  		}
 11350  		_ = o0.Args[1]
 11351  		s0 := o0.Args[0]
 11352  		if s0.Op != OpPPC64SLDconst {
 11353  			break
 11354  		}
 11355  		if s0.AuxInt != 8 {
 11356  			break
 11357  		}
 11358  		x1 := s0.Args[0]
 11359  		if x1.Op != OpPPC64MOVBZload {
 11360  			break
 11361  		}
 11362  		i1 := x1.AuxInt
 11363  		if x1.Aux != s {
 11364  			break
 11365  		}
 11366  		_ = x1.Args[1]
 11367  		if p != x1.Args[0] {
 11368  			break
 11369  		}
 11370  		if mem != x1.Args[1] {
 11371  			break
 11372  		}
 11373  		x0 := o0.Args[1]
 11374  		if x0.Op != OpPPC64MOVBZload {
 11375  			break
 11376  		}
 11377  		i0 := x0.AuxInt
 11378  		if x0.Aux != s {
 11379  			break
 11380  		}
 11381  		_ = x0.Args[1]
 11382  		if p != x0.Args[0] {
 11383  			break
 11384  		}
 11385  		if mem != x0.Args[1] {
 11386  			break
 11387  		}
 11388  		s1 := o1.Args[1]
 11389  		if s1.Op != OpPPC64SLDconst {
 11390  			break
 11391  		}
 11392  		if s1.AuxInt != 16 {
 11393  			break
 11394  		}
 11395  		x2 := s1.Args[0]
 11396  		if x2.Op != OpPPC64MOVBZload {
 11397  			break
 11398  		}
 11399  		i2 := x2.AuxInt
 11400  		if x2.Aux != s {
 11401  			break
 11402  		}
 11403  		_ = x2.Args[1]
 11404  		if p != x2.Args[0] {
 11405  			break
 11406  		}
 11407  		if mem != x2.Args[1] {
 11408  			break
 11409  		}
 11410  		s2 := o2.Args[1]
 11411  		if s2.Op != OpPPC64SLDconst {
 11412  			break
 11413  		}
 11414  		if s2.AuxInt != 24 {
 11415  			break
 11416  		}
 11417  		x3 := s2.Args[0]
 11418  		if x3.Op != OpPPC64MOVBZload {
 11419  			break
 11420  		}
 11421  		i3 := x3.AuxInt
 11422  		if x3.Aux != s {
 11423  			break
 11424  		}
 11425  		_ = x3.Args[1]
 11426  		if p != x3.Args[0] {
 11427  			break
 11428  		}
 11429  		if mem != x3.Args[1] {
 11430  			break
 11431  		}
 11432  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 11433  			break
 11434  		}
 11435  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 11436  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 11437  		v.reset(OpCopy)
 11438  		v.AddArg(v0)
 11439  		v0.AuxInt = i0
 11440  		v0.Aux = s
 11441  		v0.AddArg(p)
 11442  		v0.AddArg(mem)
 11443  		return true
 11444  	}
 11445  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))))
 11446  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 11447  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 11448  	for {
 11449  		t := v.Type
 11450  		_ = v.Args[1]
 11451  		s6 := v.Args[0]
 11452  		if s6.Op != OpPPC64SLDconst {
 11453  			break
 11454  		}
 11455  		if s6.AuxInt != 56 {
 11456  			break
 11457  		}
 11458  		x7 := s6.Args[0]
 11459  		if x7.Op != OpPPC64MOVBZload {
 11460  			break
 11461  		}
 11462  		i7 := x7.AuxInt
 11463  		s := x7.Aux
 11464  		_ = x7.Args[1]
 11465  		p := x7.Args[0]
 11466  		mem := x7.Args[1]
 11467  		o5 := v.Args[1]
 11468  		if o5.Op != OpPPC64OR {
 11469  			break
 11470  		}
 11471  		if o5.Type != t {
 11472  			break
 11473  		}
 11474  		_ = o5.Args[1]
 11475  		s5 := o5.Args[0]
 11476  		if s5.Op != OpPPC64SLDconst {
 11477  			break
 11478  		}
 11479  		if s5.AuxInt != 48 {
 11480  			break
 11481  		}
 11482  		x6 := s5.Args[0]
 11483  		if x6.Op != OpPPC64MOVBZload {
 11484  			break
 11485  		}
 11486  		i6 := x6.AuxInt
 11487  		if x6.Aux != s {
 11488  			break
 11489  		}
 11490  		_ = x6.Args[1]
 11491  		if p != x6.Args[0] {
 11492  			break
 11493  		}
 11494  		if mem != x6.Args[1] {
 11495  			break
 11496  		}
 11497  		o4 := o5.Args[1]
 11498  		if o4.Op != OpPPC64OR {
 11499  			break
 11500  		}
 11501  		if o4.Type != t {
 11502  			break
 11503  		}
 11504  		_ = o4.Args[1]
 11505  		s4 := o4.Args[0]
 11506  		if s4.Op != OpPPC64SLDconst {
 11507  			break
 11508  		}
 11509  		if s4.AuxInt != 40 {
 11510  			break
 11511  		}
 11512  		x5 := s4.Args[0]
 11513  		if x5.Op != OpPPC64MOVBZload {
 11514  			break
 11515  		}
 11516  		i5 := x5.AuxInt
 11517  		if x5.Aux != s {
 11518  			break
 11519  		}
 11520  		_ = x5.Args[1]
 11521  		if p != x5.Args[0] {
 11522  			break
 11523  		}
 11524  		if mem != x5.Args[1] {
 11525  			break
 11526  		}
 11527  		o3 := o4.Args[1]
 11528  		if o3.Op != OpPPC64OR {
 11529  			break
 11530  		}
 11531  		if o3.Type != t {
 11532  			break
 11533  		}
 11534  		_ = o3.Args[1]
 11535  		s3 := o3.Args[0]
 11536  		if s3.Op != OpPPC64SLDconst {
 11537  			break
 11538  		}
 11539  		if s3.AuxInt != 32 {
 11540  			break
 11541  		}
 11542  		x4 := s3.Args[0]
 11543  		if x4.Op != OpPPC64MOVBZload {
 11544  			break
 11545  		}
 11546  		i4 := x4.AuxInt
 11547  		if x4.Aux != s {
 11548  			break
 11549  		}
 11550  		_ = x4.Args[1]
 11551  		if p != x4.Args[0] {
 11552  			break
 11553  		}
 11554  		if mem != x4.Args[1] {
 11555  			break
 11556  		}
 11557  		o2 := o3.Args[1]
 11558  		if o2.Op != OpPPC64OR {
 11559  			break
 11560  		}
 11561  		if o2.Type != t {
 11562  			break
 11563  		}
 11564  		_ = o2.Args[1]
 11565  		o1 := o2.Args[0]
 11566  		if o1.Op != OpPPC64OR {
 11567  			break
 11568  		}
 11569  		if o1.Type != t {
 11570  			break
 11571  		}
 11572  		_ = o1.Args[1]
 11573  		o0 := o1.Args[0]
 11574  		if o0.Op != OpPPC64OR {
 11575  			break
 11576  		}
 11577  		if o0.Type != t {
 11578  			break
 11579  		}
 11580  		_ = o0.Args[1]
 11581  		x0 := o0.Args[0]
 11582  		if x0.Op != OpPPC64MOVBZload {
 11583  			break
 11584  		}
 11585  		i0 := x0.AuxInt
 11586  		if x0.Aux != s {
 11587  			break
 11588  		}
 11589  		_ = x0.Args[1]
 11590  		if p != x0.Args[0] {
 11591  			break
 11592  		}
 11593  		if mem != x0.Args[1] {
 11594  			break
 11595  		}
 11596  		s0 := o0.Args[1]
 11597  		if s0.Op != OpPPC64SLDconst {
 11598  			break
 11599  		}
 11600  		if s0.AuxInt != 8 {
 11601  			break
 11602  		}
 11603  		x1 := s0.Args[0]
 11604  		if x1.Op != OpPPC64MOVBZload {
 11605  			break
 11606  		}
 11607  		i1 := x1.AuxInt
 11608  		if x1.Aux != s {
 11609  			break
 11610  		}
 11611  		_ = x1.Args[1]
 11612  		if p != x1.Args[0] {
 11613  			break
 11614  		}
 11615  		if mem != x1.Args[1] {
 11616  			break
 11617  		}
 11618  		s1 := o1.Args[1]
 11619  		if s1.Op != OpPPC64SLDconst {
 11620  			break
 11621  		}
 11622  		if s1.AuxInt != 16 {
 11623  			break
 11624  		}
 11625  		x2 := s1.Args[0]
 11626  		if x2.Op != OpPPC64MOVBZload {
 11627  			break
 11628  		}
 11629  		i2 := x2.AuxInt
 11630  		if x2.Aux != s {
 11631  			break
 11632  		}
 11633  		_ = x2.Args[1]
 11634  		if p != x2.Args[0] {
 11635  			break
 11636  		}
 11637  		if mem != x2.Args[1] {
 11638  			break
 11639  		}
 11640  		s2 := o2.Args[1]
 11641  		if s2.Op != OpPPC64SLDconst {
 11642  			break
 11643  		}
 11644  		if s2.AuxInt != 24 {
 11645  			break
 11646  		}
 11647  		x3 := s2.Args[0]
 11648  		if x3.Op != OpPPC64MOVBZload {
 11649  			break
 11650  		}
 11651  		i3 := x3.AuxInt
 11652  		if x3.Aux != s {
 11653  			break
 11654  		}
 11655  		_ = x3.Args[1]
 11656  		if p != x3.Args[0] {
 11657  			break
 11658  		}
 11659  		if mem != x3.Args[1] {
 11660  			break
 11661  		}
 11662  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 11663  			break
 11664  		}
 11665  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 11666  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 11667  		v.reset(OpCopy)
 11668  		v.AddArg(v0)
 11669  		v0.AuxInt = i0
 11670  		v0.Aux = s
 11671  		v0.AddArg(p)
 11672  		v0.AddArg(mem)
 11673  		return true
 11674  	}
 11675  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 11676  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 11677  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 11678  	for {
 11679  		t := v.Type
 11680  		_ = v.Args[1]
 11681  		s6 := v.Args[0]
 11682  		if s6.Op != OpPPC64SLDconst {
 11683  			break
 11684  		}
 11685  		if s6.AuxInt != 56 {
 11686  			break
 11687  		}
 11688  		x7 := s6.Args[0]
 11689  		if x7.Op != OpPPC64MOVBZload {
 11690  			break
 11691  		}
 11692  		i7 := x7.AuxInt
 11693  		s := x7.Aux
 11694  		_ = x7.Args[1]
 11695  		p := x7.Args[0]
 11696  		mem := x7.Args[1]
 11697  		o5 := v.Args[1]
 11698  		if o5.Op != OpPPC64OR {
 11699  			break
 11700  		}
 11701  		if o5.Type != t {
 11702  			break
 11703  		}
 11704  		_ = o5.Args[1]
 11705  		s5 := o5.Args[0]
 11706  		if s5.Op != OpPPC64SLDconst {
 11707  			break
 11708  		}
 11709  		if s5.AuxInt != 48 {
 11710  			break
 11711  		}
 11712  		x6 := s5.Args[0]
 11713  		if x6.Op != OpPPC64MOVBZload {
 11714  			break
 11715  		}
 11716  		i6 := x6.AuxInt
 11717  		if x6.Aux != s {
 11718  			break
 11719  		}
 11720  		_ = x6.Args[1]
 11721  		if p != x6.Args[0] {
 11722  			break
 11723  		}
 11724  		if mem != x6.Args[1] {
 11725  			break
 11726  		}
 11727  		o4 := o5.Args[1]
 11728  		if o4.Op != OpPPC64OR {
 11729  			break
 11730  		}
 11731  		if o4.Type != t {
 11732  			break
 11733  		}
 11734  		_ = o4.Args[1]
 11735  		s4 := o4.Args[0]
 11736  		if s4.Op != OpPPC64SLDconst {
 11737  			break
 11738  		}
 11739  		if s4.AuxInt != 40 {
 11740  			break
 11741  		}
 11742  		x5 := s4.Args[0]
 11743  		if x5.Op != OpPPC64MOVBZload {
 11744  			break
 11745  		}
 11746  		i5 := x5.AuxInt
 11747  		if x5.Aux != s {
 11748  			break
 11749  		}
 11750  		_ = x5.Args[1]
 11751  		if p != x5.Args[0] {
 11752  			break
 11753  		}
 11754  		if mem != x5.Args[1] {
 11755  			break
 11756  		}
 11757  		o3 := o4.Args[1]
 11758  		if o3.Op != OpPPC64OR {
 11759  			break
 11760  		}
 11761  		if o3.Type != t {
 11762  			break
 11763  		}
 11764  		_ = o3.Args[1]
 11765  		o2 := o3.Args[0]
 11766  		if o2.Op != OpPPC64OR {
 11767  			break
 11768  		}
 11769  		if o2.Type != t {
 11770  			break
 11771  		}
 11772  		_ = o2.Args[1]
 11773  		s2 := o2.Args[0]
 11774  		if s2.Op != OpPPC64SLDconst {
 11775  			break
 11776  		}
 11777  		if s2.AuxInt != 24 {
 11778  			break
 11779  		}
 11780  		x3 := s2.Args[0]
 11781  		if x3.Op != OpPPC64MOVBZload {
 11782  			break
 11783  		}
 11784  		i3 := x3.AuxInt
 11785  		if x3.Aux != s {
 11786  			break
 11787  		}
 11788  		_ = x3.Args[1]
 11789  		if p != x3.Args[0] {
 11790  			break
 11791  		}
 11792  		if mem != x3.Args[1] {
 11793  			break
 11794  		}
 11795  		o1 := o2.Args[1]
 11796  		if o1.Op != OpPPC64OR {
 11797  			break
 11798  		}
 11799  		if o1.Type != t {
 11800  			break
 11801  		}
 11802  		_ = o1.Args[1]
 11803  		s1 := o1.Args[0]
 11804  		if s1.Op != OpPPC64SLDconst {
 11805  			break
 11806  		}
 11807  		if s1.AuxInt != 16 {
 11808  			break
 11809  		}
 11810  		x2 := s1.Args[0]
 11811  		if x2.Op != OpPPC64MOVBZload {
 11812  			break
 11813  		}
 11814  		i2 := x2.AuxInt
 11815  		if x2.Aux != s {
 11816  			break
 11817  		}
 11818  		_ = x2.Args[1]
 11819  		if p != x2.Args[0] {
 11820  			break
 11821  		}
 11822  		if mem != x2.Args[1] {
 11823  			break
 11824  		}
 11825  		o0 := o1.Args[1]
 11826  		if o0.Op != OpPPC64OR {
 11827  			break
 11828  		}
 11829  		if o0.Type != t {
 11830  			break
 11831  		}
 11832  		_ = o0.Args[1]
 11833  		s0 := o0.Args[0]
 11834  		if s0.Op != OpPPC64SLDconst {
 11835  			break
 11836  		}
 11837  		if s0.AuxInt != 8 {
 11838  			break
 11839  		}
 11840  		x1 := s0.Args[0]
 11841  		if x1.Op != OpPPC64MOVBZload {
 11842  			break
 11843  		}
 11844  		i1 := x1.AuxInt
 11845  		if x1.Aux != s {
 11846  			break
 11847  		}
 11848  		_ = x1.Args[1]
 11849  		if p != x1.Args[0] {
 11850  			break
 11851  		}
 11852  		if mem != x1.Args[1] {
 11853  			break
 11854  		}
 11855  		x0 := o0.Args[1]
 11856  		if x0.Op != OpPPC64MOVBZload {
 11857  			break
 11858  		}
 11859  		i0 := x0.AuxInt
 11860  		if x0.Aux != s {
 11861  			break
 11862  		}
 11863  		_ = x0.Args[1]
 11864  		if p != x0.Args[0] {
 11865  			break
 11866  		}
 11867  		if mem != x0.Args[1] {
 11868  			break
 11869  		}
 11870  		s3 := o3.Args[1]
 11871  		if s3.Op != OpPPC64SLDconst {
 11872  			break
 11873  		}
 11874  		if s3.AuxInt != 32 {
 11875  			break
 11876  		}
 11877  		x4 := s3.Args[0]
 11878  		if x4.Op != OpPPC64MOVBZload {
 11879  			break
 11880  		}
 11881  		i4 := x4.AuxInt
 11882  		if x4.Aux != s {
 11883  			break
 11884  		}
 11885  		_ = x4.Args[1]
 11886  		if p != x4.Args[0] {
 11887  			break
 11888  		}
 11889  		if mem != x4.Args[1] {
 11890  			break
 11891  		}
 11892  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 11893  			break
 11894  		}
 11895  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 11896  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 11897  		v.reset(OpCopy)
 11898  		v.AddArg(v0)
 11899  		v0.AuxInt = i0
 11900  		v0.Aux = s
 11901  		v0.AddArg(p)
 11902  		v0.AddArg(mem)
 11903  		return true
 11904  	}
 11905  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 11906  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 11907  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 11908  	for {
 11909  		t := v.Type
 11910  		_ = v.Args[1]
 11911  		s6 := v.Args[0]
 11912  		if s6.Op != OpPPC64SLDconst {
 11913  			break
 11914  		}
 11915  		if s6.AuxInt != 56 {
 11916  			break
 11917  		}
 11918  		x7 := s6.Args[0]
 11919  		if x7.Op != OpPPC64MOVBZload {
 11920  			break
 11921  		}
 11922  		i7 := x7.AuxInt
 11923  		s := x7.Aux
 11924  		_ = x7.Args[1]
 11925  		p := x7.Args[0]
 11926  		mem := x7.Args[1]
 11927  		o5 := v.Args[1]
 11928  		if o5.Op != OpPPC64OR {
 11929  			break
 11930  		}
 11931  		if o5.Type != t {
 11932  			break
 11933  		}
 11934  		_ = o5.Args[1]
 11935  		s5 := o5.Args[0]
 11936  		if s5.Op != OpPPC64SLDconst {
 11937  			break
 11938  		}
 11939  		if s5.AuxInt != 48 {
 11940  			break
 11941  		}
 11942  		x6 := s5.Args[0]
 11943  		if x6.Op != OpPPC64MOVBZload {
 11944  			break
 11945  		}
 11946  		i6 := x6.AuxInt
 11947  		if x6.Aux != s {
 11948  			break
 11949  		}
 11950  		_ = x6.Args[1]
 11951  		if p != x6.Args[0] {
 11952  			break
 11953  		}
 11954  		if mem != x6.Args[1] {
 11955  			break
 11956  		}
 11957  		o4 := o5.Args[1]
 11958  		if o4.Op != OpPPC64OR {
 11959  			break
 11960  		}
 11961  		if o4.Type != t {
 11962  			break
 11963  		}
 11964  		_ = o4.Args[1]
 11965  		s4 := o4.Args[0]
 11966  		if s4.Op != OpPPC64SLDconst {
 11967  			break
 11968  		}
 11969  		if s4.AuxInt != 40 {
 11970  			break
 11971  		}
 11972  		x5 := s4.Args[0]
 11973  		if x5.Op != OpPPC64MOVBZload {
 11974  			break
 11975  		}
 11976  		i5 := x5.AuxInt
 11977  		if x5.Aux != s {
 11978  			break
 11979  		}
 11980  		_ = x5.Args[1]
 11981  		if p != x5.Args[0] {
 11982  			break
 11983  		}
 11984  		if mem != x5.Args[1] {
 11985  			break
 11986  		}
 11987  		o3 := o4.Args[1]
 11988  		if o3.Op != OpPPC64OR {
 11989  			break
 11990  		}
 11991  		if o3.Type != t {
 11992  			break
 11993  		}
 11994  		_ = o3.Args[1]
 11995  		o2 := o3.Args[0]
 11996  		if o2.Op != OpPPC64OR {
 11997  			break
 11998  		}
 11999  		if o2.Type != t {
 12000  			break
 12001  		}
 12002  		_ = o2.Args[1]
 12003  		s2 := o2.Args[0]
 12004  		if s2.Op != OpPPC64SLDconst {
 12005  			break
 12006  		}
 12007  		if s2.AuxInt != 24 {
 12008  			break
 12009  		}
 12010  		x3 := s2.Args[0]
 12011  		if x3.Op != OpPPC64MOVBZload {
 12012  			break
 12013  		}
 12014  		i3 := x3.AuxInt
 12015  		if x3.Aux != s {
 12016  			break
 12017  		}
 12018  		_ = x3.Args[1]
 12019  		if p != x3.Args[0] {
 12020  			break
 12021  		}
 12022  		if mem != x3.Args[1] {
 12023  			break
 12024  		}
 12025  		o1 := o2.Args[1]
 12026  		if o1.Op != OpPPC64OR {
 12027  			break
 12028  		}
 12029  		if o1.Type != t {
 12030  			break
 12031  		}
 12032  		_ = o1.Args[1]
 12033  		s1 := o1.Args[0]
 12034  		if s1.Op != OpPPC64SLDconst {
 12035  			break
 12036  		}
 12037  		if s1.AuxInt != 16 {
 12038  			break
 12039  		}
 12040  		x2 := s1.Args[0]
 12041  		if x2.Op != OpPPC64MOVBZload {
 12042  			break
 12043  		}
 12044  		i2 := x2.AuxInt
 12045  		if x2.Aux != s {
 12046  			break
 12047  		}
 12048  		_ = x2.Args[1]
 12049  		if p != x2.Args[0] {
 12050  			break
 12051  		}
 12052  		if mem != x2.Args[1] {
 12053  			break
 12054  		}
 12055  		o0 := o1.Args[1]
 12056  		if o0.Op != OpPPC64OR {
 12057  			break
 12058  		}
 12059  		if o0.Type != t {
 12060  			break
 12061  		}
 12062  		_ = o0.Args[1]
 12063  		x0 := o0.Args[0]
 12064  		if x0.Op != OpPPC64MOVBZload {
 12065  			break
 12066  		}
 12067  		i0 := x0.AuxInt
 12068  		if x0.Aux != s {
 12069  			break
 12070  		}
 12071  		_ = x0.Args[1]
 12072  		if p != x0.Args[0] {
 12073  			break
 12074  		}
 12075  		if mem != x0.Args[1] {
 12076  			break
 12077  		}
 12078  		s0 := o0.Args[1]
 12079  		if s0.Op != OpPPC64SLDconst {
 12080  			break
 12081  		}
 12082  		if s0.AuxInt != 8 {
 12083  			break
 12084  		}
 12085  		x1 := s0.Args[0]
 12086  		if x1.Op != OpPPC64MOVBZload {
 12087  			break
 12088  		}
 12089  		i1 := x1.AuxInt
 12090  		if x1.Aux != s {
 12091  			break
 12092  		}
 12093  		_ = x1.Args[1]
 12094  		if p != x1.Args[0] {
 12095  			break
 12096  		}
 12097  		if mem != x1.Args[1] {
 12098  			break
 12099  		}
 12100  		s3 := o3.Args[1]
 12101  		if s3.Op != OpPPC64SLDconst {
 12102  			break
 12103  		}
 12104  		if s3.AuxInt != 32 {
 12105  			break
 12106  		}
 12107  		x4 := s3.Args[0]
 12108  		if x4.Op != OpPPC64MOVBZload {
 12109  			break
 12110  		}
 12111  		i4 := x4.AuxInt
 12112  		if x4.Aux != s {
 12113  			break
 12114  		}
 12115  		_ = x4.Args[1]
 12116  		if p != x4.Args[0] {
 12117  			break
 12118  		}
 12119  		if mem != x4.Args[1] {
 12120  			break
 12121  		}
 12122  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 12123  			break
 12124  		}
 12125  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 12126  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 12127  		v.reset(OpCopy)
 12128  		v.AddArg(v0)
 12129  		v0.AuxInt = i0
 12130  		v0.Aux = s
 12131  		v0.AddArg(p)
 12132  		v0.AddArg(mem)
 12133  		return true
 12134  	}
 12135  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 12136  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 12137  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 12138  	for {
 12139  		t := v.Type
 12140  		_ = v.Args[1]
 12141  		s6 := v.Args[0]
 12142  		if s6.Op != OpPPC64SLDconst {
 12143  			break
 12144  		}
 12145  		if s6.AuxInt != 56 {
 12146  			break
 12147  		}
 12148  		x7 := s6.Args[0]
 12149  		if x7.Op != OpPPC64MOVBZload {
 12150  			break
 12151  		}
 12152  		i7 := x7.AuxInt
 12153  		s := x7.Aux
 12154  		_ = x7.Args[1]
 12155  		p := x7.Args[0]
 12156  		mem := x7.Args[1]
 12157  		o5 := v.Args[1]
 12158  		if o5.Op != OpPPC64OR {
 12159  			break
 12160  		}
 12161  		if o5.Type != t {
 12162  			break
 12163  		}
 12164  		_ = o5.Args[1]
 12165  		s5 := o5.Args[0]
 12166  		if s5.Op != OpPPC64SLDconst {
 12167  			break
 12168  		}
 12169  		if s5.AuxInt != 48 {
 12170  			break
 12171  		}
 12172  		x6 := s5.Args[0]
 12173  		if x6.Op != OpPPC64MOVBZload {
 12174  			break
 12175  		}
 12176  		i6 := x6.AuxInt
 12177  		if x6.Aux != s {
 12178  			break
 12179  		}
 12180  		_ = x6.Args[1]
 12181  		if p != x6.Args[0] {
 12182  			break
 12183  		}
 12184  		if mem != x6.Args[1] {
 12185  			break
 12186  		}
 12187  		o4 := o5.Args[1]
 12188  		if o4.Op != OpPPC64OR {
 12189  			break
 12190  		}
 12191  		if o4.Type != t {
 12192  			break
 12193  		}
 12194  		_ = o4.Args[1]
 12195  		s4 := o4.Args[0]
 12196  		if s4.Op != OpPPC64SLDconst {
 12197  			break
 12198  		}
 12199  		if s4.AuxInt != 40 {
 12200  			break
 12201  		}
 12202  		x5 := s4.Args[0]
 12203  		if x5.Op != OpPPC64MOVBZload {
 12204  			break
 12205  		}
 12206  		i5 := x5.AuxInt
 12207  		if x5.Aux != s {
 12208  			break
 12209  		}
 12210  		_ = x5.Args[1]
 12211  		if p != x5.Args[0] {
 12212  			break
 12213  		}
 12214  		if mem != x5.Args[1] {
 12215  			break
 12216  		}
 12217  		o3 := o4.Args[1]
 12218  		if o3.Op != OpPPC64OR {
 12219  			break
 12220  		}
 12221  		if o3.Type != t {
 12222  			break
 12223  		}
 12224  		_ = o3.Args[1]
 12225  		o2 := o3.Args[0]
 12226  		if o2.Op != OpPPC64OR {
 12227  			break
 12228  		}
 12229  		if o2.Type != t {
 12230  			break
 12231  		}
 12232  		_ = o2.Args[1]
 12233  		s2 := o2.Args[0]
 12234  		if s2.Op != OpPPC64SLDconst {
 12235  			break
 12236  		}
 12237  		if s2.AuxInt != 24 {
 12238  			break
 12239  		}
 12240  		x3 := s2.Args[0]
 12241  		if x3.Op != OpPPC64MOVBZload {
 12242  			break
 12243  		}
 12244  		i3 := x3.AuxInt
 12245  		if x3.Aux != s {
 12246  			break
 12247  		}
 12248  		_ = x3.Args[1]
 12249  		if p != x3.Args[0] {
 12250  			break
 12251  		}
 12252  		if mem != x3.Args[1] {
 12253  			break
 12254  		}
 12255  		o1 := o2.Args[1]
 12256  		if o1.Op != OpPPC64OR {
 12257  			break
 12258  		}
 12259  		if o1.Type != t {
 12260  			break
 12261  		}
 12262  		_ = o1.Args[1]
 12263  		o0 := o1.Args[0]
 12264  		if o0.Op != OpPPC64OR {
 12265  			break
 12266  		}
 12267  		if o0.Type != t {
 12268  			break
 12269  		}
 12270  		_ = o0.Args[1]
 12271  		s0 := o0.Args[0]
 12272  		if s0.Op != OpPPC64SLDconst {
 12273  			break
 12274  		}
 12275  		if s0.AuxInt != 8 {
 12276  			break
 12277  		}
 12278  		x1 := s0.Args[0]
 12279  		if x1.Op != OpPPC64MOVBZload {
 12280  			break
 12281  		}
 12282  		i1 := x1.AuxInt
 12283  		if x1.Aux != s {
 12284  			break
 12285  		}
 12286  		_ = x1.Args[1]
 12287  		if p != x1.Args[0] {
 12288  			break
 12289  		}
 12290  		if mem != x1.Args[1] {
 12291  			break
 12292  		}
 12293  		x0 := o0.Args[1]
 12294  		if x0.Op != OpPPC64MOVBZload {
 12295  			break
 12296  		}
 12297  		i0 := x0.AuxInt
 12298  		if x0.Aux != s {
 12299  			break
 12300  		}
 12301  		_ = x0.Args[1]
 12302  		if p != x0.Args[0] {
 12303  			break
 12304  		}
 12305  		if mem != x0.Args[1] {
 12306  			break
 12307  		}
 12308  		s1 := o1.Args[1]
 12309  		if s1.Op != OpPPC64SLDconst {
 12310  			break
 12311  		}
 12312  		if s1.AuxInt != 16 {
 12313  			break
 12314  		}
 12315  		x2 := s1.Args[0]
 12316  		if x2.Op != OpPPC64MOVBZload {
 12317  			break
 12318  		}
 12319  		i2 := x2.AuxInt
 12320  		if x2.Aux != s {
 12321  			break
 12322  		}
 12323  		_ = x2.Args[1]
 12324  		if p != x2.Args[0] {
 12325  			break
 12326  		}
 12327  		if mem != x2.Args[1] {
 12328  			break
 12329  		}
 12330  		s3 := o3.Args[1]
 12331  		if s3.Op != OpPPC64SLDconst {
 12332  			break
 12333  		}
 12334  		if s3.AuxInt != 32 {
 12335  			break
 12336  		}
 12337  		x4 := s3.Args[0]
 12338  		if x4.Op != OpPPC64MOVBZload {
 12339  			break
 12340  		}
 12341  		i4 := x4.AuxInt
 12342  		if x4.Aux != s {
 12343  			break
 12344  		}
 12345  		_ = x4.Args[1]
 12346  		if p != x4.Args[0] {
 12347  			break
 12348  		}
 12349  		if mem != x4.Args[1] {
 12350  			break
 12351  		}
 12352  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 12353  			break
 12354  		}
 12355  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 12356  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 12357  		v.reset(OpCopy)
 12358  		v.AddArg(v0)
 12359  		v0.AuxInt = i0
 12360  		v0.Aux = s
 12361  		v0.AddArg(p)
 12362  		v0.AddArg(mem)
 12363  		return true
 12364  	}
 12365  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 12366  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 12367  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 12368  	for {
 12369  		t := v.Type
 12370  		_ = v.Args[1]
 12371  		s6 := v.Args[0]
 12372  		if s6.Op != OpPPC64SLDconst {
 12373  			break
 12374  		}
 12375  		if s6.AuxInt != 56 {
 12376  			break
 12377  		}
 12378  		x7 := s6.Args[0]
 12379  		if x7.Op != OpPPC64MOVBZload {
 12380  			break
 12381  		}
 12382  		i7 := x7.AuxInt
 12383  		s := x7.Aux
 12384  		_ = x7.Args[1]
 12385  		p := x7.Args[0]
 12386  		mem := x7.Args[1]
 12387  		o5 := v.Args[1]
 12388  		if o5.Op != OpPPC64OR {
 12389  			break
 12390  		}
 12391  		if o5.Type != t {
 12392  			break
 12393  		}
 12394  		_ = o5.Args[1]
 12395  		s5 := o5.Args[0]
 12396  		if s5.Op != OpPPC64SLDconst {
 12397  			break
 12398  		}
 12399  		if s5.AuxInt != 48 {
 12400  			break
 12401  		}
 12402  		x6 := s5.Args[0]
 12403  		if x6.Op != OpPPC64MOVBZload {
 12404  			break
 12405  		}
 12406  		i6 := x6.AuxInt
 12407  		if x6.Aux != s {
 12408  			break
 12409  		}
 12410  		_ = x6.Args[1]
 12411  		if p != x6.Args[0] {
 12412  			break
 12413  		}
 12414  		if mem != x6.Args[1] {
 12415  			break
 12416  		}
 12417  		o4 := o5.Args[1]
 12418  		if o4.Op != OpPPC64OR {
 12419  			break
 12420  		}
 12421  		if o4.Type != t {
 12422  			break
 12423  		}
 12424  		_ = o4.Args[1]
 12425  		s4 := o4.Args[0]
 12426  		if s4.Op != OpPPC64SLDconst {
 12427  			break
 12428  		}
 12429  		if s4.AuxInt != 40 {
 12430  			break
 12431  		}
 12432  		x5 := s4.Args[0]
 12433  		if x5.Op != OpPPC64MOVBZload {
 12434  			break
 12435  		}
 12436  		i5 := x5.AuxInt
 12437  		if x5.Aux != s {
 12438  			break
 12439  		}
 12440  		_ = x5.Args[1]
 12441  		if p != x5.Args[0] {
 12442  			break
 12443  		}
 12444  		if mem != x5.Args[1] {
 12445  			break
 12446  		}
 12447  		o3 := o4.Args[1]
 12448  		if o3.Op != OpPPC64OR {
 12449  			break
 12450  		}
 12451  		if o3.Type != t {
 12452  			break
 12453  		}
 12454  		_ = o3.Args[1]
 12455  		o2 := o3.Args[0]
 12456  		if o2.Op != OpPPC64OR {
 12457  			break
 12458  		}
 12459  		if o2.Type != t {
 12460  			break
 12461  		}
 12462  		_ = o2.Args[1]
 12463  		s2 := o2.Args[0]
 12464  		if s2.Op != OpPPC64SLDconst {
 12465  			break
 12466  		}
 12467  		if s2.AuxInt != 24 {
 12468  			break
 12469  		}
 12470  		x3 := s2.Args[0]
 12471  		if x3.Op != OpPPC64MOVBZload {
 12472  			break
 12473  		}
 12474  		i3 := x3.AuxInt
 12475  		if x3.Aux != s {
 12476  			break
 12477  		}
 12478  		_ = x3.Args[1]
 12479  		if p != x3.Args[0] {
 12480  			break
 12481  		}
 12482  		if mem != x3.Args[1] {
 12483  			break
 12484  		}
 12485  		o1 := o2.Args[1]
 12486  		if o1.Op != OpPPC64OR {
 12487  			break
 12488  		}
 12489  		if o1.Type != t {
 12490  			break
 12491  		}
 12492  		_ = o1.Args[1]
 12493  		o0 := o1.Args[0]
 12494  		if o0.Op != OpPPC64OR {
 12495  			break
 12496  		}
 12497  		if o0.Type != t {
 12498  			break
 12499  		}
 12500  		_ = o0.Args[1]
 12501  		x0 := o0.Args[0]
 12502  		if x0.Op != OpPPC64MOVBZload {
 12503  			break
 12504  		}
 12505  		i0 := x0.AuxInt
 12506  		if x0.Aux != s {
 12507  			break
 12508  		}
 12509  		_ = x0.Args[1]
 12510  		if p != x0.Args[0] {
 12511  			break
 12512  		}
 12513  		if mem != x0.Args[1] {
 12514  			break
 12515  		}
 12516  		s0 := o0.Args[1]
 12517  		if s0.Op != OpPPC64SLDconst {
 12518  			break
 12519  		}
 12520  		if s0.AuxInt != 8 {
 12521  			break
 12522  		}
 12523  		x1 := s0.Args[0]
 12524  		if x1.Op != OpPPC64MOVBZload {
 12525  			break
 12526  		}
 12527  		i1 := x1.AuxInt
 12528  		if x1.Aux != s {
 12529  			break
 12530  		}
 12531  		_ = x1.Args[1]
 12532  		if p != x1.Args[0] {
 12533  			break
 12534  		}
 12535  		if mem != x1.Args[1] {
 12536  			break
 12537  		}
 12538  		s1 := o1.Args[1]
 12539  		if s1.Op != OpPPC64SLDconst {
 12540  			break
 12541  		}
 12542  		if s1.AuxInt != 16 {
 12543  			break
 12544  		}
 12545  		x2 := s1.Args[0]
 12546  		if x2.Op != OpPPC64MOVBZload {
 12547  			break
 12548  		}
 12549  		i2 := x2.AuxInt
 12550  		if x2.Aux != s {
 12551  			break
 12552  		}
 12553  		_ = x2.Args[1]
 12554  		if p != x2.Args[0] {
 12555  			break
 12556  		}
 12557  		if mem != x2.Args[1] {
 12558  			break
 12559  		}
 12560  		s3 := o3.Args[1]
 12561  		if s3.Op != OpPPC64SLDconst {
 12562  			break
 12563  		}
 12564  		if s3.AuxInt != 32 {
 12565  			break
 12566  		}
 12567  		x4 := s3.Args[0]
 12568  		if x4.Op != OpPPC64MOVBZload {
 12569  			break
 12570  		}
 12571  		i4 := x4.AuxInt
 12572  		if x4.Aux != s {
 12573  			break
 12574  		}
 12575  		_ = x4.Args[1]
 12576  		if p != x4.Args[0] {
 12577  			break
 12578  		}
 12579  		if mem != x4.Args[1] {
 12580  			break
 12581  		}
 12582  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 12583  			break
 12584  		}
 12585  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 12586  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 12587  		v.reset(OpCopy)
 12588  		v.AddArg(v0)
 12589  		v0.AuxInt = i0
 12590  		v0.Aux = s
 12591  		v0.AddArg(p)
 12592  		v0.AddArg(mem)
 12593  		return true
 12594  	}
 12595  	return false
 12596  }
 12597  func rewriteValuePPC64_OpPPC64OR_30(v *Value) bool {
 12598  	b := v.Block
 12599  	_ = b
 12600  	config := b.Func.Config
 12601  	_ = config
 12602  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 12603  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 12604  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 12605  	for {
 12606  		t := v.Type
 12607  		_ = v.Args[1]
 12608  		s6 := v.Args[0]
 12609  		if s6.Op != OpPPC64SLDconst {
 12610  			break
 12611  		}
 12612  		if s6.AuxInt != 56 {
 12613  			break
 12614  		}
 12615  		x7 := s6.Args[0]
 12616  		if x7.Op != OpPPC64MOVBZload {
 12617  			break
 12618  		}
 12619  		i7 := x7.AuxInt
 12620  		s := x7.Aux
 12621  		_ = x7.Args[1]
 12622  		p := x7.Args[0]
 12623  		mem := x7.Args[1]
 12624  		o5 := v.Args[1]
 12625  		if o5.Op != OpPPC64OR {
 12626  			break
 12627  		}
 12628  		if o5.Type != t {
 12629  			break
 12630  		}
 12631  		_ = o5.Args[1]
 12632  		s5 := o5.Args[0]
 12633  		if s5.Op != OpPPC64SLDconst {
 12634  			break
 12635  		}
 12636  		if s5.AuxInt != 48 {
 12637  			break
 12638  		}
 12639  		x6 := s5.Args[0]
 12640  		if x6.Op != OpPPC64MOVBZload {
 12641  			break
 12642  		}
 12643  		i6 := x6.AuxInt
 12644  		if x6.Aux != s {
 12645  			break
 12646  		}
 12647  		_ = x6.Args[1]
 12648  		if p != x6.Args[0] {
 12649  			break
 12650  		}
 12651  		if mem != x6.Args[1] {
 12652  			break
 12653  		}
 12654  		o4 := o5.Args[1]
 12655  		if o4.Op != OpPPC64OR {
 12656  			break
 12657  		}
 12658  		if o4.Type != t {
 12659  			break
 12660  		}
 12661  		_ = o4.Args[1]
 12662  		s4 := o4.Args[0]
 12663  		if s4.Op != OpPPC64SLDconst {
 12664  			break
 12665  		}
 12666  		if s4.AuxInt != 40 {
 12667  			break
 12668  		}
 12669  		x5 := s4.Args[0]
 12670  		if x5.Op != OpPPC64MOVBZload {
 12671  			break
 12672  		}
 12673  		i5 := x5.AuxInt
 12674  		if x5.Aux != s {
 12675  			break
 12676  		}
 12677  		_ = x5.Args[1]
 12678  		if p != x5.Args[0] {
 12679  			break
 12680  		}
 12681  		if mem != x5.Args[1] {
 12682  			break
 12683  		}
 12684  		o3 := o4.Args[1]
 12685  		if o3.Op != OpPPC64OR {
 12686  			break
 12687  		}
 12688  		if o3.Type != t {
 12689  			break
 12690  		}
 12691  		_ = o3.Args[1]
 12692  		o2 := o3.Args[0]
 12693  		if o2.Op != OpPPC64OR {
 12694  			break
 12695  		}
 12696  		if o2.Type != t {
 12697  			break
 12698  		}
 12699  		_ = o2.Args[1]
 12700  		o1 := o2.Args[0]
 12701  		if o1.Op != OpPPC64OR {
 12702  			break
 12703  		}
 12704  		if o1.Type != t {
 12705  			break
 12706  		}
 12707  		_ = o1.Args[1]
 12708  		s1 := o1.Args[0]
 12709  		if s1.Op != OpPPC64SLDconst {
 12710  			break
 12711  		}
 12712  		if s1.AuxInt != 16 {
 12713  			break
 12714  		}
 12715  		x2 := s1.Args[0]
 12716  		if x2.Op != OpPPC64MOVBZload {
 12717  			break
 12718  		}
 12719  		i2 := x2.AuxInt
 12720  		if x2.Aux != s {
 12721  			break
 12722  		}
 12723  		_ = x2.Args[1]
 12724  		if p != x2.Args[0] {
 12725  			break
 12726  		}
 12727  		if mem != x2.Args[1] {
 12728  			break
 12729  		}
 12730  		o0 := o1.Args[1]
 12731  		if o0.Op != OpPPC64OR {
 12732  			break
 12733  		}
 12734  		if o0.Type != t {
 12735  			break
 12736  		}
 12737  		_ = o0.Args[1]
 12738  		s0 := o0.Args[0]
 12739  		if s0.Op != OpPPC64SLDconst {
 12740  			break
 12741  		}
 12742  		if s0.AuxInt != 8 {
 12743  			break
 12744  		}
 12745  		x1 := s0.Args[0]
 12746  		if x1.Op != OpPPC64MOVBZload {
 12747  			break
 12748  		}
 12749  		i1 := x1.AuxInt
 12750  		if x1.Aux != s {
 12751  			break
 12752  		}
 12753  		_ = x1.Args[1]
 12754  		if p != x1.Args[0] {
 12755  			break
 12756  		}
 12757  		if mem != x1.Args[1] {
 12758  			break
 12759  		}
 12760  		x0 := o0.Args[1]
 12761  		if x0.Op != OpPPC64MOVBZload {
 12762  			break
 12763  		}
 12764  		i0 := x0.AuxInt
 12765  		if x0.Aux != s {
 12766  			break
 12767  		}
 12768  		_ = x0.Args[1]
 12769  		if p != x0.Args[0] {
 12770  			break
 12771  		}
 12772  		if mem != x0.Args[1] {
 12773  			break
 12774  		}
 12775  		s2 := o2.Args[1]
 12776  		if s2.Op != OpPPC64SLDconst {
 12777  			break
 12778  		}
 12779  		if s2.AuxInt != 24 {
 12780  			break
 12781  		}
 12782  		x3 := s2.Args[0]
 12783  		if x3.Op != OpPPC64MOVBZload {
 12784  			break
 12785  		}
 12786  		i3 := x3.AuxInt
 12787  		if x3.Aux != s {
 12788  			break
 12789  		}
 12790  		_ = x3.Args[1]
 12791  		if p != x3.Args[0] {
 12792  			break
 12793  		}
 12794  		if mem != x3.Args[1] {
 12795  			break
 12796  		}
 12797  		s3 := o3.Args[1]
 12798  		if s3.Op != OpPPC64SLDconst {
 12799  			break
 12800  		}
 12801  		if s3.AuxInt != 32 {
 12802  			break
 12803  		}
 12804  		x4 := s3.Args[0]
 12805  		if x4.Op != OpPPC64MOVBZload {
 12806  			break
 12807  		}
 12808  		i4 := x4.AuxInt
 12809  		if x4.Aux != s {
 12810  			break
 12811  		}
 12812  		_ = x4.Args[1]
 12813  		if p != x4.Args[0] {
 12814  			break
 12815  		}
 12816  		if mem != x4.Args[1] {
 12817  			break
 12818  		}
 12819  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 12820  			break
 12821  		}
 12822  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 12823  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 12824  		v.reset(OpCopy)
 12825  		v.AddArg(v0)
 12826  		v0.AuxInt = i0
 12827  		v0.Aux = s
 12828  		v0.AddArg(p)
 12829  		v0.AddArg(mem)
 12830  		return true
 12831  	}
 12832  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 12833  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 12834  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 12835  	for {
 12836  		t := v.Type
 12837  		_ = v.Args[1]
 12838  		s6 := v.Args[0]
 12839  		if s6.Op != OpPPC64SLDconst {
 12840  			break
 12841  		}
 12842  		if s6.AuxInt != 56 {
 12843  			break
 12844  		}
 12845  		x7 := s6.Args[0]
 12846  		if x7.Op != OpPPC64MOVBZload {
 12847  			break
 12848  		}
 12849  		i7 := x7.AuxInt
 12850  		s := x7.Aux
 12851  		_ = x7.Args[1]
 12852  		p := x7.Args[0]
 12853  		mem := x7.Args[1]
 12854  		o5 := v.Args[1]
 12855  		if o5.Op != OpPPC64OR {
 12856  			break
 12857  		}
 12858  		if o5.Type != t {
 12859  			break
 12860  		}
 12861  		_ = o5.Args[1]
 12862  		s5 := o5.Args[0]
 12863  		if s5.Op != OpPPC64SLDconst {
 12864  			break
 12865  		}
 12866  		if s5.AuxInt != 48 {
 12867  			break
 12868  		}
 12869  		x6 := s5.Args[0]
 12870  		if x6.Op != OpPPC64MOVBZload {
 12871  			break
 12872  		}
 12873  		i6 := x6.AuxInt
 12874  		if x6.Aux != s {
 12875  			break
 12876  		}
 12877  		_ = x6.Args[1]
 12878  		if p != x6.Args[0] {
 12879  			break
 12880  		}
 12881  		if mem != x6.Args[1] {
 12882  			break
 12883  		}
 12884  		o4 := o5.Args[1]
 12885  		if o4.Op != OpPPC64OR {
 12886  			break
 12887  		}
 12888  		if o4.Type != t {
 12889  			break
 12890  		}
 12891  		_ = o4.Args[1]
 12892  		s4 := o4.Args[0]
 12893  		if s4.Op != OpPPC64SLDconst {
 12894  			break
 12895  		}
 12896  		if s4.AuxInt != 40 {
 12897  			break
 12898  		}
 12899  		x5 := s4.Args[0]
 12900  		if x5.Op != OpPPC64MOVBZload {
 12901  			break
 12902  		}
 12903  		i5 := x5.AuxInt
 12904  		if x5.Aux != s {
 12905  			break
 12906  		}
 12907  		_ = x5.Args[1]
 12908  		if p != x5.Args[0] {
 12909  			break
 12910  		}
 12911  		if mem != x5.Args[1] {
 12912  			break
 12913  		}
 12914  		o3 := o4.Args[1]
 12915  		if o3.Op != OpPPC64OR {
 12916  			break
 12917  		}
 12918  		if o3.Type != t {
 12919  			break
 12920  		}
 12921  		_ = o3.Args[1]
 12922  		o2 := o3.Args[0]
 12923  		if o2.Op != OpPPC64OR {
 12924  			break
 12925  		}
 12926  		if o2.Type != t {
 12927  			break
 12928  		}
 12929  		_ = o2.Args[1]
 12930  		o1 := o2.Args[0]
 12931  		if o1.Op != OpPPC64OR {
 12932  			break
 12933  		}
 12934  		if o1.Type != t {
 12935  			break
 12936  		}
 12937  		_ = o1.Args[1]
 12938  		s1 := o1.Args[0]
 12939  		if s1.Op != OpPPC64SLDconst {
 12940  			break
 12941  		}
 12942  		if s1.AuxInt != 16 {
 12943  			break
 12944  		}
 12945  		x2 := s1.Args[0]
 12946  		if x2.Op != OpPPC64MOVBZload {
 12947  			break
 12948  		}
 12949  		i2 := x2.AuxInt
 12950  		if x2.Aux != s {
 12951  			break
 12952  		}
 12953  		_ = x2.Args[1]
 12954  		if p != x2.Args[0] {
 12955  			break
 12956  		}
 12957  		if mem != x2.Args[1] {
 12958  			break
 12959  		}
 12960  		o0 := o1.Args[1]
 12961  		if o0.Op != OpPPC64OR {
 12962  			break
 12963  		}
 12964  		if o0.Type != t {
 12965  			break
 12966  		}
 12967  		_ = o0.Args[1]
 12968  		x0 := o0.Args[0]
 12969  		if x0.Op != OpPPC64MOVBZload {
 12970  			break
 12971  		}
 12972  		i0 := x0.AuxInt
 12973  		if x0.Aux != s {
 12974  			break
 12975  		}
 12976  		_ = x0.Args[1]
 12977  		if p != x0.Args[0] {
 12978  			break
 12979  		}
 12980  		if mem != x0.Args[1] {
 12981  			break
 12982  		}
 12983  		s0 := o0.Args[1]
 12984  		if s0.Op != OpPPC64SLDconst {
 12985  			break
 12986  		}
 12987  		if s0.AuxInt != 8 {
 12988  			break
 12989  		}
 12990  		x1 := s0.Args[0]
 12991  		if x1.Op != OpPPC64MOVBZload {
 12992  			break
 12993  		}
 12994  		i1 := x1.AuxInt
 12995  		if x1.Aux != s {
 12996  			break
 12997  		}
 12998  		_ = x1.Args[1]
 12999  		if p != x1.Args[0] {
 13000  			break
 13001  		}
 13002  		if mem != x1.Args[1] {
 13003  			break
 13004  		}
 13005  		s2 := o2.Args[1]
 13006  		if s2.Op != OpPPC64SLDconst {
 13007  			break
 13008  		}
 13009  		if s2.AuxInt != 24 {
 13010  			break
 13011  		}
 13012  		x3 := s2.Args[0]
 13013  		if x3.Op != OpPPC64MOVBZload {
 13014  			break
 13015  		}
 13016  		i3 := x3.AuxInt
 13017  		if x3.Aux != s {
 13018  			break
 13019  		}
 13020  		_ = x3.Args[1]
 13021  		if p != x3.Args[0] {
 13022  			break
 13023  		}
 13024  		if mem != x3.Args[1] {
 13025  			break
 13026  		}
 13027  		s3 := o3.Args[1]
 13028  		if s3.Op != OpPPC64SLDconst {
 13029  			break
 13030  		}
 13031  		if s3.AuxInt != 32 {
 13032  			break
 13033  		}
 13034  		x4 := s3.Args[0]
 13035  		if x4.Op != OpPPC64MOVBZload {
 13036  			break
 13037  		}
 13038  		i4 := x4.AuxInt
 13039  		if x4.Aux != s {
 13040  			break
 13041  		}
 13042  		_ = x4.Args[1]
 13043  		if p != x4.Args[0] {
 13044  			break
 13045  		}
 13046  		if mem != x4.Args[1] {
 13047  			break
 13048  		}
 13049  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13050  			break
 13051  		}
 13052  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13053  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13054  		v.reset(OpCopy)
 13055  		v.AddArg(v0)
 13056  		v0.AuxInt = i0
 13057  		v0.Aux = s
 13058  		v0.AddArg(p)
 13059  		v0.AddArg(mem)
 13060  		return true
 13061  	}
 13062  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 13063  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13064  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13065  	for {
 13066  		t := v.Type
 13067  		_ = v.Args[1]
 13068  		s6 := v.Args[0]
 13069  		if s6.Op != OpPPC64SLDconst {
 13070  			break
 13071  		}
 13072  		if s6.AuxInt != 56 {
 13073  			break
 13074  		}
 13075  		x7 := s6.Args[0]
 13076  		if x7.Op != OpPPC64MOVBZload {
 13077  			break
 13078  		}
 13079  		i7 := x7.AuxInt
 13080  		s := x7.Aux
 13081  		_ = x7.Args[1]
 13082  		p := x7.Args[0]
 13083  		mem := x7.Args[1]
 13084  		o5 := v.Args[1]
 13085  		if o5.Op != OpPPC64OR {
 13086  			break
 13087  		}
 13088  		if o5.Type != t {
 13089  			break
 13090  		}
 13091  		_ = o5.Args[1]
 13092  		s5 := o5.Args[0]
 13093  		if s5.Op != OpPPC64SLDconst {
 13094  			break
 13095  		}
 13096  		if s5.AuxInt != 48 {
 13097  			break
 13098  		}
 13099  		x6 := s5.Args[0]
 13100  		if x6.Op != OpPPC64MOVBZload {
 13101  			break
 13102  		}
 13103  		i6 := x6.AuxInt
 13104  		if x6.Aux != s {
 13105  			break
 13106  		}
 13107  		_ = x6.Args[1]
 13108  		if p != x6.Args[0] {
 13109  			break
 13110  		}
 13111  		if mem != x6.Args[1] {
 13112  			break
 13113  		}
 13114  		o4 := o5.Args[1]
 13115  		if o4.Op != OpPPC64OR {
 13116  			break
 13117  		}
 13118  		if o4.Type != t {
 13119  			break
 13120  		}
 13121  		_ = o4.Args[1]
 13122  		s4 := o4.Args[0]
 13123  		if s4.Op != OpPPC64SLDconst {
 13124  			break
 13125  		}
 13126  		if s4.AuxInt != 40 {
 13127  			break
 13128  		}
 13129  		x5 := s4.Args[0]
 13130  		if x5.Op != OpPPC64MOVBZload {
 13131  			break
 13132  		}
 13133  		i5 := x5.AuxInt
 13134  		if x5.Aux != s {
 13135  			break
 13136  		}
 13137  		_ = x5.Args[1]
 13138  		if p != x5.Args[0] {
 13139  			break
 13140  		}
 13141  		if mem != x5.Args[1] {
 13142  			break
 13143  		}
 13144  		o3 := o4.Args[1]
 13145  		if o3.Op != OpPPC64OR {
 13146  			break
 13147  		}
 13148  		if o3.Type != t {
 13149  			break
 13150  		}
 13151  		_ = o3.Args[1]
 13152  		o2 := o3.Args[0]
 13153  		if o2.Op != OpPPC64OR {
 13154  			break
 13155  		}
 13156  		if o2.Type != t {
 13157  			break
 13158  		}
 13159  		_ = o2.Args[1]
 13160  		o1 := o2.Args[0]
 13161  		if o1.Op != OpPPC64OR {
 13162  			break
 13163  		}
 13164  		if o1.Type != t {
 13165  			break
 13166  		}
 13167  		_ = o1.Args[1]
 13168  		o0 := o1.Args[0]
 13169  		if o0.Op != OpPPC64OR {
 13170  			break
 13171  		}
 13172  		if o0.Type != t {
 13173  			break
 13174  		}
 13175  		_ = o0.Args[1]
 13176  		s0 := o0.Args[0]
 13177  		if s0.Op != OpPPC64SLDconst {
 13178  			break
 13179  		}
 13180  		if s0.AuxInt != 8 {
 13181  			break
 13182  		}
 13183  		x1 := s0.Args[0]
 13184  		if x1.Op != OpPPC64MOVBZload {
 13185  			break
 13186  		}
 13187  		i1 := x1.AuxInt
 13188  		if x1.Aux != s {
 13189  			break
 13190  		}
 13191  		_ = x1.Args[1]
 13192  		if p != x1.Args[0] {
 13193  			break
 13194  		}
 13195  		if mem != x1.Args[1] {
 13196  			break
 13197  		}
 13198  		x0 := o0.Args[1]
 13199  		if x0.Op != OpPPC64MOVBZload {
 13200  			break
 13201  		}
 13202  		i0 := x0.AuxInt
 13203  		if x0.Aux != s {
 13204  			break
 13205  		}
 13206  		_ = x0.Args[1]
 13207  		if p != x0.Args[0] {
 13208  			break
 13209  		}
 13210  		if mem != x0.Args[1] {
 13211  			break
 13212  		}
 13213  		s1 := o1.Args[1]
 13214  		if s1.Op != OpPPC64SLDconst {
 13215  			break
 13216  		}
 13217  		if s1.AuxInt != 16 {
 13218  			break
 13219  		}
 13220  		x2 := s1.Args[0]
 13221  		if x2.Op != OpPPC64MOVBZload {
 13222  			break
 13223  		}
 13224  		i2 := x2.AuxInt
 13225  		if x2.Aux != s {
 13226  			break
 13227  		}
 13228  		_ = x2.Args[1]
 13229  		if p != x2.Args[0] {
 13230  			break
 13231  		}
 13232  		if mem != x2.Args[1] {
 13233  			break
 13234  		}
 13235  		s2 := o2.Args[1]
 13236  		if s2.Op != OpPPC64SLDconst {
 13237  			break
 13238  		}
 13239  		if s2.AuxInt != 24 {
 13240  			break
 13241  		}
 13242  		x3 := s2.Args[0]
 13243  		if x3.Op != OpPPC64MOVBZload {
 13244  			break
 13245  		}
 13246  		i3 := x3.AuxInt
 13247  		if x3.Aux != s {
 13248  			break
 13249  		}
 13250  		_ = x3.Args[1]
 13251  		if p != x3.Args[0] {
 13252  			break
 13253  		}
 13254  		if mem != x3.Args[1] {
 13255  			break
 13256  		}
 13257  		s3 := o3.Args[1]
 13258  		if s3.Op != OpPPC64SLDconst {
 13259  			break
 13260  		}
 13261  		if s3.AuxInt != 32 {
 13262  			break
 13263  		}
 13264  		x4 := s3.Args[0]
 13265  		if x4.Op != OpPPC64MOVBZload {
 13266  			break
 13267  		}
 13268  		i4 := x4.AuxInt
 13269  		if x4.Aux != s {
 13270  			break
 13271  		}
 13272  		_ = x4.Args[1]
 13273  		if p != x4.Args[0] {
 13274  			break
 13275  		}
 13276  		if mem != x4.Args[1] {
 13277  			break
 13278  		}
 13279  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13280  			break
 13281  		}
 13282  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13283  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13284  		v.reset(OpCopy)
 13285  		v.AddArg(v0)
 13286  		v0.AuxInt = i0
 13287  		v0.Aux = s
 13288  		v0.AddArg(p)
 13289  		v0.AddArg(mem)
 13290  		return true
 13291  	}
 13292  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
 13293  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13294  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13295  	for {
 13296  		t := v.Type
 13297  		_ = v.Args[1]
 13298  		s6 := v.Args[0]
 13299  		if s6.Op != OpPPC64SLDconst {
 13300  			break
 13301  		}
 13302  		if s6.AuxInt != 56 {
 13303  			break
 13304  		}
 13305  		x7 := s6.Args[0]
 13306  		if x7.Op != OpPPC64MOVBZload {
 13307  			break
 13308  		}
 13309  		i7 := x7.AuxInt
 13310  		s := x7.Aux
 13311  		_ = x7.Args[1]
 13312  		p := x7.Args[0]
 13313  		mem := x7.Args[1]
 13314  		o5 := v.Args[1]
 13315  		if o5.Op != OpPPC64OR {
 13316  			break
 13317  		}
 13318  		if o5.Type != t {
 13319  			break
 13320  		}
 13321  		_ = o5.Args[1]
 13322  		s5 := o5.Args[0]
 13323  		if s5.Op != OpPPC64SLDconst {
 13324  			break
 13325  		}
 13326  		if s5.AuxInt != 48 {
 13327  			break
 13328  		}
 13329  		x6 := s5.Args[0]
 13330  		if x6.Op != OpPPC64MOVBZload {
 13331  			break
 13332  		}
 13333  		i6 := x6.AuxInt
 13334  		if x6.Aux != s {
 13335  			break
 13336  		}
 13337  		_ = x6.Args[1]
 13338  		if p != x6.Args[0] {
 13339  			break
 13340  		}
 13341  		if mem != x6.Args[1] {
 13342  			break
 13343  		}
 13344  		o4 := o5.Args[1]
 13345  		if o4.Op != OpPPC64OR {
 13346  			break
 13347  		}
 13348  		if o4.Type != t {
 13349  			break
 13350  		}
 13351  		_ = o4.Args[1]
 13352  		s4 := o4.Args[0]
 13353  		if s4.Op != OpPPC64SLDconst {
 13354  			break
 13355  		}
 13356  		if s4.AuxInt != 40 {
 13357  			break
 13358  		}
 13359  		x5 := s4.Args[0]
 13360  		if x5.Op != OpPPC64MOVBZload {
 13361  			break
 13362  		}
 13363  		i5 := x5.AuxInt
 13364  		if x5.Aux != s {
 13365  			break
 13366  		}
 13367  		_ = x5.Args[1]
 13368  		if p != x5.Args[0] {
 13369  			break
 13370  		}
 13371  		if mem != x5.Args[1] {
 13372  			break
 13373  		}
 13374  		o3 := o4.Args[1]
 13375  		if o3.Op != OpPPC64OR {
 13376  			break
 13377  		}
 13378  		if o3.Type != t {
 13379  			break
 13380  		}
 13381  		_ = o3.Args[1]
 13382  		o2 := o3.Args[0]
 13383  		if o2.Op != OpPPC64OR {
 13384  			break
 13385  		}
 13386  		if o2.Type != t {
 13387  			break
 13388  		}
 13389  		_ = o2.Args[1]
 13390  		o1 := o2.Args[0]
 13391  		if o1.Op != OpPPC64OR {
 13392  			break
 13393  		}
 13394  		if o1.Type != t {
 13395  			break
 13396  		}
 13397  		_ = o1.Args[1]
 13398  		o0 := o1.Args[0]
 13399  		if o0.Op != OpPPC64OR {
 13400  			break
 13401  		}
 13402  		if o0.Type != t {
 13403  			break
 13404  		}
 13405  		_ = o0.Args[1]
 13406  		x0 := o0.Args[0]
 13407  		if x0.Op != OpPPC64MOVBZload {
 13408  			break
 13409  		}
 13410  		i0 := x0.AuxInt
 13411  		if x0.Aux != s {
 13412  			break
 13413  		}
 13414  		_ = x0.Args[1]
 13415  		if p != x0.Args[0] {
 13416  			break
 13417  		}
 13418  		if mem != x0.Args[1] {
 13419  			break
 13420  		}
 13421  		s0 := o0.Args[1]
 13422  		if s0.Op != OpPPC64SLDconst {
 13423  			break
 13424  		}
 13425  		if s0.AuxInt != 8 {
 13426  			break
 13427  		}
 13428  		x1 := s0.Args[0]
 13429  		if x1.Op != OpPPC64MOVBZload {
 13430  			break
 13431  		}
 13432  		i1 := x1.AuxInt
 13433  		if x1.Aux != s {
 13434  			break
 13435  		}
 13436  		_ = x1.Args[1]
 13437  		if p != x1.Args[0] {
 13438  			break
 13439  		}
 13440  		if mem != x1.Args[1] {
 13441  			break
 13442  		}
 13443  		s1 := o1.Args[1]
 13444  		if s1.Op != OpPPC64SLDconst {
 13445  			break
 13446  		}
 13447  		if s1.AuxInt != 16 {
 13448  			break
 13449  		}
 13450  		x2 := s1.Args[0]
 13451  		if x2.Op != OpPPC64MOVBZload {
 13452  			break
 13453  		}
 13454  		i2 := x2.AuxInt
 13455  		if x2.Aux != s {
 13456  			break
 13457  		}
 13458  		_ = x2.Args[1]
 13459  		if p != x2.Args[0] {
 13460  			break
 13461  		}
 13462  		if mem != x2.Args[1] {
 13463  			break
 13464  		}
 13465  		s2 := o2.Args[1]
 13466  		if s2.Op != OpPPC64SLDconst {
 13467  			break
 13468  		}
 13469  		if s2.AuxInt != 24 {
 13470  			break
 13471  		}
 13472  		x3 := s2.Args[0]
 13473  		if x3.Op != OpPPC64MOVBZload {
 13474  			break
 13475  		}
 13476  		i3 := x3.AuxInt
 13477  		if x3.Aux != s {
 13478  			break
 13479  		}
 13480  		_ = x3.Args[1]
 13481  		if p != x3.Args[0] {
 13482  			break
 13483  		}
 13484  		if mem != x3.Args[1] {
 13485  			break
 13486  		}
 13487  		s3 := o3.Args[1]
 13488  		if s3.Op != OpPPC64SLDconst {
 13489  			break
 13490  		}
 13491  		if s3.AuxInt != 32 {
 13492  			break
 13493  		}
 13494  		x4 := s3.Args[0]
 13495  		if x4.Op != OpPPC64MOVBZload {
 13496  			break
 13497  		}
 13498  		i4 := x4.AuxInt
 13499  		if x4.Aux != s {
 13500  			break
 13501  		}
 13502  		_ = x4.Args[1]
 13503  		if p != x4.Args[0] {
 13504  			break
 13505  		}
 13506  		if mem != x4.Args[1] {
 13507  			break
 13508  		}
 13509  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13510  			break
 13511  		}
 13512  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13513  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13514  		v.reset(OpCopy)
 13515  		v.AddArg(v0)
 13516  		v0.AuxInt = i0
 13517  		v0.Aux = s
 13518  		v0.AddArg(p)
 13519  		v0.AddArg(mem)
 13520  		return true
 13521  	}
 13522  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 13523  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13524  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13525  	for {
 13526  		t := v.Type
 13527  		_ = v.Args[1]
 13528  		s6 := v.Args[0]
 13529  		if s6.Op != OpPPC64SLDconst {
 13530  			break
 13531  		}
 13532  		if s6.AuxInt != 56 {
 13533  			break
 13534  		}
 13535  		x7 := s6.Args[0]
 13536  		if x7.Op != OpPPC64MOVBZload {
 13537  			break
 13538  		}
 13539  		i7 := x7.AuxInt
 13540  		s := x7.Aux
 13541  		_ = x7.Args[1]
 13542  		p := x7.Args[0]
 13543  		mem := x7.Args[1]
 13544  		o5 := v.Args[1]
 13545  		if o5.Op != OpPPC64OR {
 13546  			break
 13547  		}
 13548  		if o5.Type != t {
 13549  			break
 13550  		}
 13551  		_ = o5.Args[1]
 13552  		s5 := o5.Args[0]
 13553  		if s5.Op != OpPPC64SLDconst {
 13554  			break
 13555  		}
 13556  		if s5.AuxInt != 48 {
 13557  			break
 13558  		}
 13559  		x6 := s5.Args[0]
 13560  		if x6.Op != OpPPC64MOVBZload {
 13561  			break
 13562  		}
 13563  		i6 := x6.AuxInt
 13564  		if x6.Aux != s {
 13565  			break
 13566  		}
 13567  		_ = x6.Args[1]
 13568  		if p != x6.Args[0] {
 13569  			break
 13570  		}
 13571  		if mem != x6.Args[1] {
 13572  			break
 13573  		}
 13574  		o4 := o5.Args[1]
 13575  		if o4.Op != OpPPC64OR {
 13576  			break
 13577  		}
 13578  		if o4.Type != t {
 13579  			break
 13580  		}
 13581  		_ = o4.Args[1]
 13582  		o3 := o4.Args[0]
 13583  		if o3.Op != OpPPC64OR {
 13584  			break
 13585  		}
 13586  		if o3.Type != t {
 13587  			break
 13588  		}
 13589  		_ = o3.Args[1]
 13590  		s3 := o3.Args[0]
 13591  		if s3.Op != OpPPC64SLDconst {
 13592  			break
 13593  		}
 13594  		if s3.AuxInt != 32 {
 13595  			break
 13596  		}
 13597  		x4 := s3.Args[0]
 13598  		if x4.Op != OpPPC64MOVBZload {
 13599  			break
 13600  		}
 13601  		i4 := x4.AuxInt
 13602  		if x4.Aux != s {
 13603  			break
 13604  		}
 13605  		_ = x4.Args[1]
 13606  		if p != x4.Args[0] {
 13607  			break
 13608  		}
 13609  		if mem != x4.Args[1] {
 13610  			break
 13611  		}
 13612  		o2 := o3.Args[1]
 13613  		if o2.Op != OpPPC64OR {
 13614  			break
 13615  		}
 13616  		if o2.Type != t {
 13617  			break
 13618  		}
 13619  		_ = o2.Args[1]
 13620  		s2 := o2.Args[0]
 13621  		if s2.Op != OpPPC64SLDconst {
 13622  			break
 13623  		}
 13624  		if s2.AuxInt != 24 {
 13625  			break
 13626  		}
 13627  		x3 := s2.Args[0]
 13628  		if x3.Op != OpPPC64MOVBZload {
 13629  			break
 13630  		}
 13631  		i3 := x3.AuxInt
 13632  		if x3.Aux != s {
 13633  			break
 13634  		}
 13635  		_ = x3.Args[1]
 13636  		if p != x3.Args[0] {
 13637  			break
 13638  		}
 13639  		if mem != x3.Args[1] {
 13640  			break
 13641  		}
 13642  		o1 := o2.Args[1]
 13643  		if o1.Op != OpPPC64OR {
 13644  			break
 13645  		}
 13646  		if o1.Type != t {
 13647  			break
 13648  		}
 13649  		_ = o1.Args[1]
 13650  		s1 := o1.Args[0]
 13651  		if s1.Op != OpPPC64SLDconst {
 13652  			break
 13653  		}
 13654  		if s1.AuxInt != 16 {
 13655  			break
 13656  		}
 13657  		x2 := s1.Args[0]
 13658  		if x2.Op != OpPPC64MOVBZload {
 13659  			break
 13660  		}
 13661  		i2 := x2.AuxInt
 13662  		if x2.Aux != s {
 13663  			break
 13664  		}
 13665  		_ = x2.Args[1]
 13666  		if p != x2.Args[0] {
 13667  			break
 13668  		}
 13669  		if mem != x2.Args[1] {
 13670  			break
 13671  		}
 13672  		o0 := o1.Args[1]
 13673  		if o0.Op != OpPPC64OR {
 13674  			break
 13675  		}
 13676  		if o0.Type != t {
 13677  			break
 13678  		}
 13679  		_ = o0.Args[1]
 13680  		s0 := o0.Args[0]
 13681  		if s0.Op != OpPPC64SLDconst {
 13682  			break
 13683  		}
 13684  		if s0.AuxInt != 8 {
 13685  			break
 13686  		}
 13687  		x1 := s0.Args[0]
 13688  		if x1.Op != OpPPC64MOVBZload {
 13689  			break
 13690  		}
 13691  		i1 := x1.AuxInt
 13692  		if x1.Aux != s {
 13693  			break
 13694  		}
 13695  		_ = x1.Args[1]
 13696  		if p != x1.Args[0] {
 13697  			break
 13698  		}
 13699  		if mem != x1.Args[1] {
 13700  			break
 13701  		}
 13702  		x0 := o0.Args[1]
 13703  		if x0.Op != OpPPC64MOVBZload {
 13704  			break
 13705  		}
 13706  		i0 := x0.AuxInt
 13707  		if x0.Aux != s {
 13708  			break
 13709  		}
 13710  		_ = x0.Args[1]
 13711  		if p != x0.Args[0] {
 13712  			break
 13713  		}
 13714  		if mem != x0.Args[1] {
 13715  			break
 13716  		}
 13717  		s4 := o4.Args[1]
 13718  		if s4.Op != OpPPC64SLDconst {
 13719  			break
 13720  		}
 13721  		if s4.AuxInt != 40 {
 13722  			break
 13723  		}
 13724  		x5 := s4.Args[0]
 13725  		if x5.Op != OpPPC64MOVBZload {
 13726  			break
 13727  		}
 13728  		i5 := x5.AuxInt
 13729  		if x5.Aux != s {
 13730  			break
 13731  		}
 13732  		_ = x5.Args[1]
 13733  		if p != x5.Args[0] {
 13734  			break
 13735  		}
 13736  		if mem != x5.Args[1] {
 13737  			break
 13738  		}
 13739  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13740  			break
 13741  		}
 13742  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13743  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13744  		v.reset(OpCopy)
 13745  		v.AddArg(v0)
 13746  		v0.AuxInt = i0
 13747  		v0.Aux = s
 13748  		v0.AddArg(p)
 13749  		v0.AddArg(mem)
 13750  		return true
 13751  	}
 13752  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 13753  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13754  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13755  	for {
 13756  		t := v.Type
 13757  		_ = v.Args[1]
 13758  		s6 := v.Args[0]
 13759  		if s6.Op != OpPPC64SLDconst {
 13760  			break
 13761  		}
 13762  		if s6.AuxInt != 56 {
 13763  			break
 13764  		}
 13765  		x7 := s6.Args[0]
 13766  		if x7.Op != OpPPC64MOVBZload {
 13767  			break
 13768  		}
 13769  		i7 := x7.AuxInt
 13770  		s := x7.Aux
 13771  		_ = x7.Args[1]
 13772  		p := x7.Args[0]
 13773  		mem := x7.Args[1]
 13774  		o5 := v.Args[1]
 13775  		if o5.Op != OpPPC64OR {
 13776  			break
 13777  		}
 13778  		if o5.Type != t {
 13779  			break
 13780  		}
 13781  		_ = o5.Args[1]
 13782  		s5 := o5.Args[0]
 13783  		if s5.Op != OpPPC64SLDconst {
 13784  			break
 13785  		}
 13786  		if s5.AuxInt != 48 {
 13787  			break
 13788  		}
 13789  		x6 := s5.Args[0]
 13790  		if x6.Op != OpPPC64MOVBZload {
 13791  			break
 13792  		}
 13793  		i6 := x6.AuxInt
 13794  		if x6.Aux != s {
 13795  			break
 13796  		}
 13797  		_ = x6.Args[1]
 13798  		if p != x6.Args[0] {
 13799  			break
 13800  		}
 13801  		if mem != x6.Args[1] {
 13802  			break
 13803  		}
 13804  		o4 := o5.Args[1]
 13805  		if o4.Op != OpPPC64OR {
 13806  			break
 13807  		}
 13808  		if o4.Type != t {
 13809  			break
 13810  		}
 13811  		_ = o4.Args[1]
 13812  		o3 := o4.Args[0]
 13813  		if o3.Op != OpPPC64OR {
 13814  			break
 13815  		}
 13816  		if o3.Type != t {
 13817  			break
 13818  		}
 13819  		_ = o3.Args[1]
 13820  		s3 := o3.Args[0]
 13821  		if s3.Op != OpPPC64SLDconst {
 13822  			break
 13823  		}
 13824  		if s3.AuxInt != 32 {
 13825  			break
 13826  		}
 13827  		x4 := s3.Args[0]
 13828  		if x4.Op != OpPPC64MOVBZload {
 13829  			break
 13830  		}
 13831  		i4 := x4.AuxInt
 13832  		if x4.Aux != s {
 13833  			break
 13834  		}
 13835  		_ = x4.Args[1]
 13836  		if p != x4.Args[0] {
 13837  			break
 13838  		}
 13839  		if mem != x4.Args[1] {
 13840  			break
 13841  		}
 13842  		o2 := o3.Args[1]
 13843  		if o2.Op != OpPPC64OR {
 13844  			break
 13845  		}
 13846  		if o2.Type != t {
 13847  			break
 13848  		}
 13849  		_ = o2.Args[1]
 13850  		s2 := o2.Args[0]
 13851  		if s2.Op != OpPPC64SLDconst {
 13852  			break
 13853  		}
 13854  		if s2.AuxInt != 24 {
 13855  			break
 13856  		}
 13857  		x3 := s2.Args[0]
 13858  		if x3.Op != OpPPC64MOVBZload {
 13859  			break
 13860  		}
 13861  		i3 := x3.AuxInt
 13862  		if x3.Aux != s {
 13863  			break
 13864  		}
 13865  		_ = x3.Args[1]
 13866  		if p != x3.Args[0] {
 13867  			break
 13868  		}
 13869  		if mem != x3.Args[1] {
 13870  			break
 13871  		}
 13872  		o1 := o2.Args[1]
 13873  		if o1.Op != OpPPC64OR {
 13874  			break
 13875  		}
 13876  		if o1.Type != t {
 13877  			break
 13878  		}
 13879  		_ = o1.Args[1]
 13880  		s1 := o1.Args[0]
 13881  		if s1.Op != OpPPC64SLDconst {
 13882  			break
 13883  		}
 13884  		if s1.AuxInt != 16 {
 13885  			break
 13886  		}
 13887  		x2 := s1.Args[0]
 13888  		if x2.Op != OpPPC64MOVBZload {
 13889  			break
 13890  		}
 13891  		i2 := x2.AuxInt
 13892  		if x2.Aux != s {
 13893  			break
 13894  		}
 13895  		_ = x2.Args[1]
 13896  		if p != x2.Args[0] {
 13897  			break
 13898  		}
 13899  		if mem != x2.Args[1] {
 13900  			break
 13901  		}
 13902  		o0 := o1.Args[1]
 13903  		if o0.Op != OpPPC64OR {
 13904  			break
 13905  		}
 13906  		if o0.Type != t {
 13907  			break
 13908  		}
 13909  		_ = o0.Args[1]
 13910  		x0 := o0.Args[0]
 13911  		if x0.Op != OpPPC64MOVBZload {
 13912  			break
 13913  		}
 13914  		i0 := x0.AuxInt
 13915  		if x0.Aux != s {
 13916  			break
 13917  		}
 13918  		_ = x0.Args[1]
 13919  		if p != x0.Args[0] {
 13920  			break
 13921  		}
 13922  		if mem != x0.Args[1] {
 13923  			break
 13924  		}
 13925  		s0 := o0.Args[1]
 13926  		if s0.Op != OpPPC64SLDconst {
 13927  			break
 13928  		}
 13929  		if s0.AuxInt != 8 {
 13930  			break
 13931  		}
 13932  		x1 := s0.Args[0]
 13933  		if x1.Op != OpPPC64MOVBZload {
 13934  			break
 13935  		}
 13936  		i1 := x1.AuxInt
 13937  		if x1.Aux != s {
 13938  			break
 13939  		}
 13940  		_ = x1.Args[1]
 13941  		if p != x1.Args[0] {
 13942  			break
 13943  		}
 13944  		if mem != x1.Args[1] {
 13945  			break
 13946  		}
 13947  		s4 := o4.Args[1]
 13948  		if s4.Op != OpPPC64SLDconst {
 13949  			break
 13950  		}
 13951  		if s4.AuxInt != 40 {
 13952  			break
 13953  		}
 13954  		x5 := s4.Args[0]
 13955  		if x5.Op != OpPPC64MOVBZload {
 13956  			break
 13957  		}
 13958  		i5 := x5.AuxInt
 13959  		if x5.Aux != s {
 13960  			break
 13961  		}
 13962  		_ = x5.Args[1]
 13963  		if p != x5.Args[0] {
 13964  			break
 13965  		}
 13966  		if mem != x5.Args[1] {
 13967  			break
 13968  		}
 13969  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 13970  			break
 13971  		}
 13972  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 13973  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 13974  		v.reset(OpCopy)
 13975  		v.AddArg(v0)
 13976  		v0.AuxInt = i0
 13977  		v0.Aux = s
 13978  		v0.AddArg(p)
 13979  		v0.AddArg(mem)
 13980  		return true
 13981  	}
 13982  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 13983  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 13984  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 13985  	for {
 13986  		t := v.Type
 13987  		_ = v.Args[1]
 13988  		s6 := v.Args[0]
 13989  		if s6.Op != OpPPC64SLDconst {
 13990  			break
 13991  		}
 13992  		if s6.AuxInt != 56 {
 13993  			break
 13994  		}
 13995  		x7 := s6.Args[0]
 13996  		if x7.Op != OpPPC64MOVBZload {
 13997  			break
 13998  		}
 13999  		i7 := x7.AuxInt
 14000  		s := x7.Aux
 14001  		_ = x7.Args[1]
 14002  		p := x7.Args[0]
 14003  		mem := x7.Args[1]
 14004  		o5 := v.Args[1]
 14005  		if o5.Op != OpPPC64OR {
 14006  			break
 14007  		}
 14008  		if o5.Type != t {
 14009  			break
 14010  		}
 14011  		_ = o5.Args[1]
 14012  		s5 := o5.Args[0]
 14013  		if s5.Op != OpPPC64SLDconst {
 14014  			break
 14015  		}
 14016  		if s5.AuxInt != 48 {
 14017  			break
 14018  		}
 14019  		x6 := s5.Args[0]
 14020  		if x6.Op != OpPPC64MOVBZload {
 14021  			break
 14022  		}
 14023  		i6 := x6.AuxInt
 14024  		if x6.Aux != s {
 14025  			break
 14026  		}
 14027  		_ = x6.Args[1]
 14028  		if p != x6.Args[0] {
 14029  			break
 14030  		}
 14031  		if mem != x6.Args[1] {
 14032  			break
 14033  		}
 14034  		o4 := o5.Args[1]
 14035  		if o4.Op != OpPPC64OR {
 14036  			break
 14037  		}
 14038  		if o4.Type != t {
 14039  			break
 14040  		}
 14041  		_ = o4.Args[1]
 14042  		o3 := o4.Args[0]
 14043  		if o3.Op != OpPPC64OR {
 14044  			break
 14045  		}
 14046  		if o3.Type != t {
 14047  			break
 14048  		}
 14049  		_ = o3.Args[1]
 14050  		s3 := o3.Args[0]
 14051  		if s3.Op != OpPPC64SLDconst {
 14052  			break
 14053  		}
 14054  		if s3.AuxInt != 32 {
 14055  			break
 14056  		}
 14057  		x4 := s3.Args[0]
 14058  		if x4.Op != OpPPC64MOVBZload {
 14059  			break
 14060  		}
 14061  		i4 := x4.AuxInt
 14062  		if x4.Aux != s {
 14063  			break
 14064  		}
 14065  		_ = x4.Args[1]
 14066  		if p != x4.Args[0] {
 14067  			break
 14068  		}
 14069  		if mem != x4.Args[1] {
 14070  			break
 14071  		}
 14072  		o2 := o3.Args[1]
 14073  		if o2.Op != OpPPC64OR {
 14074  			break
 14075  		}
 14076  		if o2.Type != t {
 14077  			break
 14078  		}
 14079  		_ = o2.Args[1]
 14080  		s2 := o2.Args[0]
 14081  		if s2.Op != OpPPC64SLDconst {
 14082  			break
 14083  		}
 14084  		if s2.AuxInt != 24 {
 14085  			break
 14086  		}
 14087  		x3 := s2.Args[0]
 14088  		if x3.Op != OpPPC64MOVBZload {
 14089  			break
 14090  		}
 14091  		i3 := x3.AuxInt
 14092  		if x3.Aux != s {
 14093  			break
 14094  		}
 14095  		_ = x3.Args[1]
 14096  		if p != x3.Args[0] {
 14097  			break
 14098  		}
 14099  		if mem != x3.Args[1] {
 14100  			break
 14101  		}
 14102  		o1 := o2.Args[1]
 14103  		if o1.Op != OpPPC64OR {
 14104  			break
 14105  		}
 14106  		if o1.Type != t {
 14107  			break
 14108  		}
 14109  		_ = o1.Args[1]
 14110  		o0 := o1.Args[0]
 14111  		if o0.Op != OpPPC64OR {
 14112  			break
 14113  		}
 14114  		if o0.Type != t {
 14115  			break
 14116  		}
 14117  		_ = o0.Args[1]
 14118  		s0 := o0.Args[0]
 14119  		if s0.Op != OpPPC64SLDconst {
 14120  			break
 14121  		}
 14122  		if s0.AuxInt != 8 {
 14123  			break
 14124  		}
 14125  		x1 := s0.Args[0]
 14126  		if x1.Op != OpPPC64MOVBZload {
 14127  			break
 14128  		}
 14129  		i1 := x1.AuxInt
 14130  		if x1.Aux != s {
 14131  			break
 14132  		}
 14133  		_ = x1.Args[1]
 14134  		if p != x1.Args[0] {
 14135  			break
 14136  		}
 14137  		if mem != x1.Args[1] {
 14138  			break
 14139  		}
 14140  		x0 := o0.Args[1]
 14141  		if x0.Op != OpPPC64MOVBZload {
 14142  			break
 14143  		}
 14144  		i0 := x0.AuxInt
 14145  		if x0.Aux != s {
 14146  			break
 14147  		}
 14148  		_ = x0.Args[1]
 14149  		if p != x0.Args[0] {
 14150  			break
 14151  		}
 14152  		if mem != x0.Args[1] {
 14153  			break
 14154  		}
 14155  		s1 := o1.Args[1]
 14156  		if s1.Op != OpPPC64SLDconst {
 14157  			break
 14158  		}
 14159  		if s1.AuxInt != 16 {
 14160  			break
 14161  		}
 14162  		x2 := s1.Args[0]
 14163  		if x2.Op != OpPPC64MOVBZload {
 14164  			break
 14165  		}
 14166  		i2 := x2.AuxInt
 14167  		if x2.Aux != s {
 14168  			break
 14169  		}
 14170  		_ = x2.Args[1]
 14171  		if p != x2.Args[0] {
 14172  			break
 14173  		}
 14174  		if mem != x2.Args[1] {
 14175  			break
 14176  		}
 14177  		s4 := o4.Args[1]
 14178  		if s4.Op != OpPPC64SLDconst {
 14179  			break
 14180  		}
 14181  		if s4.AuxInt != 40 {
 14182  			break
 14183  		}
 14184  		x5 := s4.Args[0]
 14185  		if x5.Op != OpPPC64MOVBZload {
 14186  			break
 14187  		}
 14188  		i5 := x5.AuxInt
 14189  		if x5.Aux != s {
 14190  			break
 14191  		}
 14192  		_ = x5.Args[1]
 14193  		if p != x5.Args[0] {
 14194  			break
 14195  		}
 14196  		if mem != x5.Args[1] {
 14197  			break
 14198  		}
 14199  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 14200  			break
 14201  		}
 14202  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 14203  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 14204  		v.reset(OpCopy)
 14205  		v.AddArg(v0)
 14206  		v0.AuxInt = i0
 14207  		v0.Aux = s
 14208  		v0.AddArg(p)
 14209  		v0.AddArg(mem)
 14210  		return true
 14211  	}
 14212  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 14213  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 14214  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 14215  	for {
 14216  		t := v.Type
 14217  		_ = v.Args[1]
 14218  		s6 := v.Args[0]
 14219  		if s6.Op != OpPPC64SLDconst {
 14220  			break
 14221  		}
 14222  		if s6.AuxInt != 56 {
 14223  			break
 14224  		}
 14225  		x7 := s6.Args[0]
 14226  		if x7.Op != OpPPC64MOVBZload {
 14227  			break
 14228  		}
 14229  		i7 := x7.AuxInt
 14230  		s := x7.Aux
 14231  		_ = x7.Args[1]
 14232  		p := x7.Args[0]
 14233  		mem := x7.Args[1]
 14234  		o5 := v.Args[1]
 14235  		if o5.Op != OpPPC64OR {
 14236  			break
 14237  		}
 14238  		if o5.Type != t {
 14239  			break
 14240  		}
 14241  		_ = o5.Args[1]
 14242  		s5 := o5.Args[0]
 14243  		if s5.Op != OpPPC64SLDconst {
 14244  			break
 14245  		}
 14246  		if s5.AuxInt != 48 {
 14247  			break
 14248  		}
 14249  		x6 := s5.Args[0]
 14250  		if x6.Op != OpPPC64MOVBZload {
 14251  			break
 14252  		}
 14253  		i6 := x6.AuxInt
 14254  		if x6.Aux != s {
 14255  			break
 14256  		}
 14257  		_ = x6.Args[1]
 14258  		if p != x6.Args[0] {
 14259  			break
 14260  		}
 14261  		if mem != x6.Args[1] {
 14262  			break
 14263  		}
 14264  		o4 := o5.Args[1]
 14265  		if o4.Op != OpPPC64OR {
 14266  			break
 14267  		}
 14268  		if o4.Type != t {
 14269  			break
 14270  		}
 14271  		_ = o4.Args[1]
 14272  		o3 := o4.Args[0]
 14273  		if o3.Op != OpPPC64OR {
 14274  			break
 14275  		}
 14276  		if o3.Type != t {
 14277  			break
 14278  		}
 14279  		_ = o3.Args[1]
 14280  		s3 := o3.Args[0]
 14281  		if s3.Op != OpPPC64SLDconst {
 14282  			break
 14283  		}
 14284  		if s3.AuxInt != 32 {
 14285  			break
 14286  		}
 14287  		x4 := s3.Args[0]
 14288  		if x4.Op != OpPPC64MOVBZload {
 14289  			break
 14290  		}
 14291  		i4 := x4.AuxInt
 14292  		if x4.Aux != s {
 14293  			break
 14294  		}
 14295  		_ = x4.Args[1]
 14296  		if p != x4.Args[0] {
 14297  			break
 14298  		}
 14299  		if mem != x4.Args[1] {
 14300  			break
 14301  		}
 14302  		o2 := o3.Args[1]
 14303  		if o2.Op != OpPPC64OR {
 14304  			break
 14305  		}
 14306  		if o2.Type != t {
 14307  			break
 14308  		}
 14309  		_ = o2.Args[1]
 14310  		s2 := o2.Args[0]
 14311  		if s2.Op != OpPPC64SLDconst {
 14312  			break
 14313  		}
 14314  		if s2.AuxInt != 24 {
 14315  			break
 14316  		}
 14317  		x3 := s2.Args[0]
 14318  		if x3.Op != OpPPC64MOVBZload {
 14319  			break
 14320  		}
 14321  		i3 := x3.AuxInt
 14322  		if x3.Aux != s {
 14323  			break
 14324  		}
 14325  		_ = x3.Args[1]
 14326  		if p != x3.Args[0] {
 14327  			break
 14328  		}
 14329  		if mem != x3.Args[1] {
 14330  			break
 14331  		}
 14332  		o1 := o2.Args[1]
 14333  		if o1.Op != OpPPC64OR {
 14334  			break
 14335  		}
 14336  		if o1.Type != t {
 14337  			break
 14338  		}
 14339  		_ = o1.Args[1]
 14340  		o0 := o1.Args[0]
 14341  		if o0.Op != OpPPC64OR {
 14342  			break
 14343  		}
 14344  		if o0.Type != t {
 14345  			break
 14346  		}
 14347  		_ = o0.Args[1]
 14348  		x0 := o0.Args[0]
 14349  		if x0.Op != OpPPC64MOVBZload {
 14350  			break
 14351  		}
 14352  		i0 := x0.AuxInt
 14353  		if x0.Aux != s {
 14354  			break
 14355  		}
 14356  		_ = x0.Args[1]
 14357  		if p != x0.Args[0] {
 14358  			break
 14359  		}
 14360  		if mem != x0.Args[1] {
 14361  			break
 14362  		}
 14363  		s0 := o0.Args[1]
 14364  		if s0.Op != OpPPC64SLDconst {
 14365  			break
 14366  		}
 14367  		if s0.AuxInt != 8 {
 14368  			break
 14369  		}
 14370  		x1 := s0.Args[0]
 14371  		if x1.Op != OpPPC64MOVBZload {
 14372  			break
 14373  		}
 14374  		i1 := x1.AuxInt
 14375  		if x1.Aux != s {
 14376  			break
 14377  		}
 14378  		_ = x1.Args[1]
 14379  		if p != x1.Args[0] {
 14380  			break
 14381  		}
 14382  		if mem != x1.Args[1] {
 14383  			break
 14384  		}
 14385  		s1 := o1.Args[1]
 14386  		if s1.Op != OpPPC64SLDconst {
 14387  			break
 14388  		}
 14389  		if s1.AuxInt != 16 {
 14390  			break
 14391  		}
 14392  		x2 := s1.Args[0]
 14393  		if x2.Op != OpPPC64MOVBZload {
 14394  			break
 14395  		}
 14396  		i2 := x2.AuxInt
 14397  		if x2.Aux != s {
 14398  			break
 14399  		}
 14400  		_ = x2.Args[1]
 14401  		if p != x2.Args[0] {
 14402  			break
 14403  		}
 14404  		if mem != x2.Args[1] {
 14405  			break
 14406  		}
 14407  		s4 := o4.Args[1]
 14408  		if s4.Op != OpPPC64SLDconst {
 14409  			break
 14410  		}
 14411  		if s4.AuxInt != 40 {
 14412  			break
 14413  		}
 14414  		x5 := s4.Args[0]
 14415  		if x5.Op != OpPPC64MOVBZload {
 14416  			break
 14417  		}
 14418  		i5 := x5.AuxInt
 14419  		if x5.Aux != s {
 14420  			break
 14421  		}
 14422  		_ = x5.Args[1]
 14423  		if p != x5.Args[0] {
 14424  			break
 14425  		}
 14426  		if mem != x5.Args[1] {
 14427  			break
 14428  		}
 14429  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 14430  			break
 14431  		}
 14432  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 14433  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 14434  		v.reset(OpCopy)
 14435  		v.AddArg(v0)
 14436  		v0.AuxInt = i0
 14437  		v0.Aux = s
 14438  		v0.AddArg(p)
 14439  		v0.AddArg(mem)
 14440  		return true
 14441  	}
 14442  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 14443  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 14444  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 14445  	for {
 14446  		t := v.Type
 14447  		_ = v.Args[1]
 14448  		s6 := v.Args[0]
 14449  		if s6.Op != OpPPC64SLDconst {
 14450  			break
 14451  		}
 14452  		if s6.AuxInt != 56 {
 14453  			break
 14454  		}
 14455  		x7 := s6.Args[0]
 14456  		if x7.Op != OpPPC64MOVBZload {
 14457  			break
 14458  		}
 14459  		i7 := x7.AuxInt
 14460  		s := x7.Aux
 14461  		_ = x7.Args[1]
 14462  		p := x7.Args[0]
 14463  		mem := x7.Args[1]
 14464  		o5 := v.Args[1]
 14465  		if o5.Op != OpPPC64OR {
 14466  			break
 14467  		}
 14468  		if o5.Type != t {
 14469  			break
 14470  		}
 14471  		_ = o5.Args[1]
 14472  		s5 := o5.Args[0]
 14473  		if s5.Op != OpPPC64SLDconst {
 14474  			break
 14475  		}
 14476  		if s5.AuxInt != 48 {
 14477  			break
 14478  		}
 14479  		x6 := s5.Args[0]
 14480  		if x6.Op != OpPPC64MOVBZload {
 14481  			break
 14482  		}
 14483  		i6 := x6.AuxInt
 14484  		if x6.Aux != s {
 14485  			break
 14486  		}
 14487  		_ = x6.Args[1]
 14488  		if p != x6.Args[0] {
 14489  			break
 14490  		}
 14491  		if mem != x6.Args[1] {
 14492  			break
 14493  		}
 14494  		o4 := o5.Args[1]
 14495  		if o4.Op != OpPPC64OR {
 14496  			break
 14497  		}
 14498  		if o4.Type != t {
 14499  			break
 14500  		}
 14501  		_ = o4.Args[1]
 14502  		o3 := o4.Args[0]
 14503  		if o3.Op != OpPPC64OR {
 14504  			break
 14505  		}
 14506  		if o3.Type != t {
 14507  			break
 14508  		}
 14509  		_ = o3.Args[1]
 14510  		s3 := o3.Args[0]
 14511  		if s3.Op != OpPPC64SLDconst {
 14512  			break
 14513  		}
 14514  		if s3.AuxInt != 32 {
 14515  			break
 14516  		}
 14517  		x4 := s3.Args[0]
 14518  		if x4.Op != OpPPC64MOVBZload {
 14519  			break
 14520  		}
 14521  		i4 := x4.AuxInt
 14522  		if x4.Aux != s {
 14523  			break
 14524  		}
 14525  		_ = x4.Args[1]
 14526  		if p != x4.Args[0] {
 14527  			break
 14528  		}
 14529  		if mem != x4.Args[1] {
 14530  			break
 14531  		}
 14532  		o2 := o3.Args[1]
 14533  		if o2.Op != OpPPC64OR {
 14534  			break
 14535  		}
 14536  		if o2.Type != t {
 14537  			break
 14538  		}
 14539  		_ = o2.Args[1]
 14540  		o1 := o2.Args[0]
 14541  		if o1.Op != OpPPC64OR {
 14542  			break
 14543  		}
 14544  		if o1.Type != t {
 14545  			break
 14546  		}
 14547  		_ = o1.Args[1]
 14548  		s1 := o1.Args[0]
 14549  		if s1.Op != OpPPC64SLDconst {
 14550  			break
 14551  		}
 14552  		if s1.AuxInt != 16 {
 14553  			break
 14554  		}
 14555  		x2 := s1.Args[0]
 14556  		if x2.Op != OpPPC64MOVBZload {
 14557  			break
 14558  		}
 14559  		i2 := x2.AuxInt
 14560  		if x2.Aux != s {
 14561  			break
 14562  		}
 14563  		_ = x2.Args[1]
 14564  		if p != x2.Args[0] {
 14565  			break
 14566  		}
 14567  		if mem != x2.Args[1] {
 14568  			break
 14569  		}
 14570  		o0 := o1.Args[1]
 14571  		if o0.Op != OpPPC64OR {
 14572  			break
 14573  		}
 14574  		if o0.Type != t {
 14575  			break
 14576  		}
 14577  		_ = o0.Args[1]
 14578  		s0 := o0.Args[0]
 14579  		if s0.Op != OpPPC64SLDconst {
 14580  			break
 14581  		}
 14582  		if s0.AuxInt != 8 {
 14583  			break
 14584  		}
 14585  		x1 := s0.Args[0]
 14586  		if x1.Op != OpPPC64MOVBZload {
 14587  			break
 14588  		}
 14589  		i1 := x1.AuxInt
 14590  		if x1.Aux != s {
 14591  			break
 14592  		}
 14593  		_ = x1.Args[1]
 14594  		if p != x1.Args[0] {
 14595  			break
 14596  		}
 14597  		if mem != x1.Args[1] {
 14598  			break
 14599  		}
 14600  		x0 := o0.Args[1]
 14601  		if x0.Op != OpPPC64MOVBZload {
 14602  			break
 14603  		}
 14604  		i0 := x0.AuxInt
 14605  		if x0.Aux != s {
 14606  			break
 14607  		}
 14608  		_ = x0.Args[1]
 14609  		if p != x0.Args[0] {
 14610  			break
 14611  		}
 14612  		if mem != x0.Args[1] {
 14613  			break
 14614  		}
 14615  		s2 := o2.Args[1]
 14616  		if s2.Op != OpPPC64SLDconst {
 14617  			break
 14618  		}
 14619  		if s2.AuxInt != 24 {
 14620  			break
 14621  		}
 14622  		x3 := s2.Args[0]
 14623  		if x3.Op != OpPPC64MOVBZload {
 14624  			break
 14625  		}
 14626  		i3 := x3.AuxInt
 14627  		if x3.Aux != s {
 14628  			break
 14629  		}
 14630  		_ = x3.Args[1]
 14631  		if p != x3.Args[0] {
 14632  			break
 14633  		}
 14634  		if mem != x3.Args[1] {
 14635  			break
 14636  		}
 14637  		s4 := o4.Args[1]
 14638  		if s4.Op != OpPPC64SLDconst {
 14639  			break
 14640  		}
 14641  		if s4.AuxInt != 40 {
 14642  			break
 14643  		}
 14644  		x5 := s4.Args[0]
 14645  		if x5.Op != OpPPC64MOVBZload {
 14646  			break
 14647  		}
 14648  		i5 := x5.AuxInt
 14649  		if x5.Aux != s {
 14650  			break
 14651  		}
 14652  		_ = x5.Args[1]
 14653  		if p != x5.Args[0] {
 14654  			break
 14655  		}
 14656  		if mem != x5.Args[1] {
 14657  			break
 14658  		}
 14659  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 14660  			break
 14661  		}
 14662  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 14663  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 14664  		v.reset(OpCopy)
 14665  		v.AddArg(v0)
 14666  		v0.AuxInt = i0
 14667  		v0.Aux = s
 14668  		v0.AddArg(p)
 14669  		v0.AddArg(mem)
 14670  		return true
 14671  	}
 14672  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 14673  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 14674  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 14675  	for {
 14676  		t := v.Type
 14677  		_ = v.Args[1]
 14678  		s6 := v.Args[0]
 14679  		if s6.Op != OpPPC64SLDconst {
 14680  			break
 14681  		}
 14682  		if s6.AuxInt != 56 {
 14683  			break
 14684  		}
 14685  		x7 := s6.Args[0]
 14686  		if x7.Op != OpPPC64MOVBZload {
 14687  			break
 14688  		}
 14689  		i7 := x7.AuxInt
 14690  		s := x7.Aux
 14691  		_ = x7.Args[1]
 14692  		p := x7.Args[0]
 14693  		mem := x7.Args[1]
 14694  		o5 := v.Args[1]
 14695  		if o5.Op != OpPPC64OR {
 14696  			break
 14697  		}
 14698  		if o5.Type != t {
 14699  			break
 14700  		}
 14701  		_ = o5.Args[1]
 14702  		s5 := o5.Args[0]
 14703  		if s5.Op != OpPPC64SLDconst {
 14704  			break
 14705  		}
 14706  		if s5.AuxInt != 48 {
 14707  			break
 14708  		}
 14709  		x6 := s5.Args[0]
 14710  		if x6.Op != OpPPC64MOVBZload {
 14711  			break
 14712  		}
 14713  		i6 := x6.AuxInt
 14714  		if x6.Aux != s {
 14715  			break
 14716  		}
 14717  		_ = x6.Args[1]
 14718  		if p != x6.Args[0] {
 14719  			break
 14720  		}
 14721  		if mem != x6.Args[1] {
 14722  			break
 14723  		}
 14724  		o4 := o5.Args[1]
 14725  		if o4.Op != OpPPC64OR {
 14726  			break
 14727  		}
 14728  		if o4.Type != t {
 14729  			break
 14730  		}
 14731  		_ = o4.Args[1]
 14732  		o3 := o4.Args[0]
 14733  		if o3.Op != OpPPC64OR {
 14734  			break
 14735  		}
 14736  		if o3.Type != t {
 14737  			break
 14738  		}
 14739  		_ = o3.Args[1]
 14740  		s3 := o3.Args[0]
 14741  		if s3.Op != OpPPC64SLDconst {
 14742  			break
 14743  		}
 14744  		if s3.AuxInt != 32 {
 14745  			break
 14746  		}
 14747  		x4 := s3.Args[0]
 14748  		if x4.Op != OpPPC64MOVBZload {
 14749  			break
 14750  		}
 14751  		i4 := x4.AuxInt
 14752  		if x4.Aux != s {
 14753  			break
 14754  		}
 14755  		_ = x4.Args[1]
 14756  		if p != x4.Args[0] {
 14757  			break
 14758  		}
 14759  		if mem != x4.Args[1] {
 14760  			break
 14761  		}
 14762  		o2 := o3.Args[1]
 14763  		if o2.Op != OpPPC64OR {
 14764  			break
 14765  		}
 14766  		if o2.Type != t {
 14767  			break
 14768  		}
 14769  		_ = o2.Args[1]
 14770  		o1 := o2.Args[0]
 14771  		if o1.Op != OpPPC64OR {
 14772  			break
 14773  		}
 14774  		if o1.Type != t {
 14775  			break
 14776  		}
 14777  		_ = o1.Args[1]
 14778  		s1 := o1.Args[0]
 14779  		if s1.Op != OpPPC64SLDconst {
 14780  			break
 14781  		}
 14782  		if s1.AuxInt != 16 {
 14783  			break
 14784  		}
 14785  		x2 := s1.Args[0]
 14786  		if x2.Op != OpPPC64MOVBZload {
 14787  			break
 14788  		}
 14789  		i2 := x2.AuxInt
 14790  		if x2.Aux != s {
 14791  			break
 14792  		}
 14793  		_ = x2.Args[1]
 14794  		if p != x2.Args[0] {
 14795  			break
 14796  		}
 14797  		if mem != x2.Args[1] {
 14798  			break
 14799  		}
 14800  		o0 := o1.Args[1]
 14801  		if o0.Op != OpPPC64OR {
 14802  			break
 14803  		}
 14804  		if o0.Type != t {
 14805  			break
 14806  		}
 14807  		_ = o0.Args[1]
 14808  		x0 := o0.Args[0]
 14809  		if x0.Op != OpPPC64MOVBZload {
 14810  			break
 14811  		}
 14812  		i0 := x0.AuxInt
 14813  		if x0.Aux != s {
 14814  			break
 14815  		}
 14816  		_ = x0.Args[1]
 14817  		if p != x0.Args[0] {
 14818  			break
 14819  		}
 14820  		if mem != x0.Args[1] {
 14821  			break
 14822  		}
 14823  		s0 := o0.Args[1]
 14824  		if s0.Op != OpPPC64SLDconst {
 14825  			break
 14826  		}
 14827  		if s0.AuxInt != 8 {
 14828  			break
 14829  		}
 14830  		x1 := s0.Args[0]
 14831  		if x1.Op != OpPPC64MOVBZload {
 14832  			break
 14833  		}
 14834  		i1 := x1.AuxInt
 14835  		if x1.Aux != s {
 14836  			break
 14837  		}
 14838  		_ = x1.Args[1]
 14839  		if p != x1.Args[0] {
 14840  			break
 14841  		}
 14842  		if mem != x1.Args[1] {
 14843  			break
 14844  		}
 14845  		s2 := o2.Args[1]
 14846  		if s2.Op != OpPPC64SLDconst {
 14847  			break
 14848  		}
 14849  		if s2.AuxInt != 24 {
 14850  			break
 14851  		}
 14852  		x3 := s2.Args[0]
 14853  		if x3.Op != OpPPC64MOVBZload {
 14854  			break
 14855  		}
 14856  		i3 := x3.AuxInt
 14857  		if x3.Aux != s {
 14858  			break
 14859  		}
 14860  		_ = x3.Args[1]
 14861  		if p != x3.Args[0] {
 14862  			break
 14863  		}
 14864  		if mem != x3.Args[1] {
 14865  			break
 14866  		}
 14867  		s4 := o4.Args[1]
 14868  		if s4.Op != OpPPC64SLDconst {
 14869  			break
 14870  		}
 14871  		if s4.AuxInt != 40 {
 14872  			break
 14873  		}
 14874  		x5 := s4.Args[0]
 14875  		if x5.Op != OpPPC64MOVBZload {
 14876  			break
 14877  		}
 14878  		i5 := x5.AuxInt
 14879  		if x5.Aux != s {
 14880  			break
 14881  		}
 14882  		_ = x5.Args[1]
 14883  		if p != x5.Args[0] {
 14884  			break
 14885  		}
 14886  		if mem != x5.Args[1] {
 14887  			break
 14888  		}
 14889  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 14890  			break
 14891  		}
 14892  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 14893  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 14894  		v.reset(OpCopy)
 14895  		v.AddArg(v0)
 14896  		v0.AuxInt = i0
 14897  		v0.Aux = s
 14898  		v0.AddArg(p)
 14899  		v0.AddArg(mem)
 14900  		return true
 14901  	}
 14902  	return false
 14903  }
 14904  func rewriteValuePPC64_OpPPC64OR_40(v *Value) bool {
 14905  	b := v.Block
 14906  	_ = b
 14907  	config := b.Func.Config
 14908  	_ = config
 14909  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 14910  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 14911  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 14912  	for {
 14913  		t := v.Type
 14914  		_ = v.Args[1]
 14915  		s6 := v.Args[0]
 14916  		if s6.Op != OpPPC64SLDconst {
 14917  			break
 14918  		}
 14919  		if s6.AuxInt != 56 {
 14920  			break
 14921  		}
 14922  		x7 := s6.Args[0]
 14923  		if x7.Op != OpPPC64MOVBZload {
 14924  			break
 14925  		}
 14926  		i7 := x7.AuxInt
 14927  		s := x7.Aux
 14928  		_ = x7.Args[1]
 14929  		p := x7.Args[0]
 14930  		mem := x7.Args[1]
 14931  		o5 := v.Args[1]
 14932  		if o5.Op != OpPPC64OR {
 14933  			break
 14934  		}
 14935  		if o5.Type != t {
 14936  			break
 14937  		}
 14938  		_ = o5.Args[1]
 14939  		s5 := o5.Args[0]
 14940  		if s5.Op != OpPPC64SLDconst {
 14941  			break
 14942  		}
 14943  		if s5.AuxInt != 48 {
 14944  			break
 14945  		}
 14946  		x6 := s5.Args[0]
 14947  		if x6.Op != OpPPC64MOVBZload {
 14948  			break
 14949  		}
 14950  		i6 := x6.AuxInt
 14951  		if x6.Aux != s {
 14952  			break
 14953  		}
 14954  		_ = x6.Args[1]
 14955  		if p != x6.Args[0] {
 14956  			break
 14957  		}
 14958  		if mem != x6.Args[1] {
 14959  			break
 14960  		}
 14961  		o4 := o5.Args[1]
 14962  		if o4.Op != OpPPC64OR {
 14963  			break
 14964  		}
 14965  		if o4.Type != t {
 14966  			break
 14967  		}
 14968  		_ = o4.Args[1]
 14969  		o3 := o4.Args[0]
 14970  		if o3.Op != OpPPC64OR {
 14971  			break
 14972  		}
 14973  		if o3.Type != t {
 14974  			break
 14975  		}
 14976  		_ = o3.Args[1]
 14977  		s3 := o3.Args[0]
 14978  		if s3.Op != OpPPC64SLDconst {
 14979  			break
 14980  		}
 14981  		if s3.AuxInt != 32 {
 14982  			break
 14983  		}
 14984  		x4 := s3.Args[0]
 14985  		if x4.Op != OpPPC64MOVBZload {
 14986  			break
 14987  		}
 14988  		i4 := x4.AuxInt
 14989  		if x4.Aux != s {
 14990  			break
 14991  		}
 14992  		_ = x4.Args[1]
 14993  		if p != x4.Args[0] {
 14994  			break
 14995  		}
 14996  		if mem != x4.Args[1] {
 14997  			break
 14998  		}
 14999  		o2 := o3.Args[1]
 15000  		if o2.Op != OpPPC64OR {
 15001  			break
 15002  		}
 15003  		if o2.Type != t {
 15004  			break
 15005  		}
 15006  		_ = o2.Args[1]
 15007  		o1 := o2.Args[0]
 15008  		if o1.Op != OpPPC64OR {
 15009  			break
 15010  		}
 15011  		if o1.Type != t {
 15012  			break
 15013  		}
 15014  		_ = o1.Args[1]
 15015  		o0 := o1.Args[0]
 15016  		if o0.Op != OpPPC64OR {
 15017  			break
 15018  		}
 15019  		if o0.Type != t {
 15020  			break
 15021  		}
 15022  		_ = o0.Args[1]
 15023  		s0 := o0.Args[0]
 15024  		if s0.Op != OpPPC64SLDconst {
 15025  			break
 15026  		}
 15027  		if s0.AuxInt != 8 {
 15028  			break
 15029  		}
 15030  		x1 := s0.Args[0]
 15031  		if x1.Op != OpPPC64MOVBZload {
 15032  			break
 15033  		}
 15034  		i1 := x1.AuxInt
 15035  		if x1.Aux != s {
 15036  			break
 15037  		}
 15038  		_ = x1.Args[1]
 15039  		if p != x1.Args[0] {
 15040  			break
 15041  		}
 15042  		if mem != x1.Args[1] {
 15043  			break
 15044  		}
 15045  		x0 := o0.Args[1]
 15046  		if x0.Op != OpPPC64MOVBZload {
 15047  			break
 15048  		}
 15049  		i0 := x0.AuxInt
 15050  		if x0.Aux != s {
 15051  			break
 15052  		}
 15053  		_ = x0.Args[1]
 15054  		if p != x0.Args[0] {
 15055  			break
 15056  		}
 15057  		if mem != x0.Args[1] {
 15058  			break
 15059  		}
 15060  		s1 := o1.Args[1]
 15061  		if s1.Op != OpPPC64SLDconst {
 15062  			break
 15063  		}
 15064  		if s1.AuxInt != 16 {
 15065  			break
 15066  		}
 15067  		x2 := s1.Args[0]
 15068  		if x2.Op != OpPPC64MOVBZload {
 15069  			break
 15070  		}
 15071  		i2 := x2.AuxInt
 15072  		if x2.Aux != s {
 15073  			break
 15074  		}
 15075  		_ = x2.Args[1]
 15076  		if p != x2.Args[0] {
 15077  			break
 15078  		}
 15079  		if mem != x2.Args[1] {
 15080  			break
 15081  		}
 15082  		s2 := o2.Args[1]
 15083  		if s2.Op != OpPPC64SLDconst {
 15084  			break
 15085  		}
 15086  		if s2.AuxInt != 24 {
 15087  			break
 15088  		}
 15089  		x3 := s2.Args[0]
 15090  		if x3.Op != OpPPC64MOVBZload {
 15091  			break
 15092  		}
 15093  		i3 := x3.AuxInt
 15094  		if x3.Aux != s {
 15095  			break
 15096  		}
 15097  		_ = x3.Args[1]
 15098  		if p != x3.Args[0] {
 15099  			break
 15100  		}
 15101  		if mem != x3.Args[1] {
 15102  			break
 15103  		}
 15104  		s4 := o4.Args[1]
 15105  		if s4.Op != OpPPC64SLDconst {
 15106  			break
 15107  		}
 15108  		if s4.AuxInt != 40 {
 15109  			break
 15110  		}
 15111  		x5 := s4.Args[0]
 15112  		if x5.Op != OpPPC64MOVBZload {
 15113  			break
 15114  		}
 15115  		i5 := x5.AuxInt
 15116  		if x5.Aux != s {
 15117  			break
 15118  		}
 15119  		_ = x5.Args[1]
 15120  		if p != x5.Args[0] {
 15121  			break
 15122  		}
 15123  		if mem != x5.Args[1] {
 15124  			break
 15125  		}
 15126  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 15127  			break
 15128  		}
 15129  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 15130  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 15131  		v.reset(OpCopy)
 15132  		v.AddArg(v0)
 15133  		v0.AuxInt = i0
 15134  		v0.Aux = s
 15135  		v0.AddArg(p)
 15136  		v0.AddArg(mem)
 15137  		return true
 15138  	}
 15139  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 15140  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 15141  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 15142  	for {
 15143  		t := v.Type
 15144  		_ = v.Args[1]
 15145  		s6 := v.Args[0]
 15146  		if s6.Op != OpPPC64SLDconst {
 15147  			break
 15148  		}
 15149  		if s6.AuxInt != 56 {
 15150  			break
 15151  		}
 15152  		x7 := s6.Args[0]
 15153  		if x7.Op != OpPPC64MOVBZload {
 15154  			break
 15155  		}
 15156  		i7 := x7.AuxInt
 15157  		s := x7.Aux
 15158  		_ = x7.Args[1]
 15159  		p := x7.Args[0]
 15160  		mem := x7.Args[1]
 15161  		o5 := v.Args[1]
 15162  		if o5.Op != OpPPC64OR {
 15163  			break
 15164  		}
 15165  		if o5.Type != t {
 15166  			break
 15167  		}
 15168  		_ = o5.Args[1]
 15169  		s5 := o5.Args[0]
 15170  		if s5.Op != OpPPC64SLDconst {
 15171  			break
 15172  		}
 15173  		if s5.AuxInt != 48 {
 15174  			break
 15175  		}
 15176  		x6 := s5.Args[0]
 15177  		if x6.Op != OpPPC64MOVBZload {
 15178  			break
 15179  		}
 15180  		i6 := x6.AuxInt
 15181  		if x6.Aux != s {
 15182  			break
 15183  		}
 15184  		_ = x6.Args[1]
 15185  		if p != x6.Args[0] {
 15186  			break
 15187  		}
 15188  		if mem != x6.Args[1] {
 15189  			break
 15190  		}
 15191  		o4 := o5.Args[1]
 15192  		if o4.Op != OpPPC64OR {
 15193  			break
 15194  		}
 15195  		if o4.Type != t {
 15196  			break
 15197  		}
 15198  		_ = o4.Args[1]
 15199  		o3 := o4.Args[0]
 15200  		if o3.Op != OpPPC64OR {
 15201  			break
 15202  		}
 15203  		if o3.Type != t {
 15204  			break
 15205  		}
 15206  		_ = o3.Args[1]
 15207  		s3 := o3.Args[0]
 15208  		if s3.Op != OpPPC64SLDconst {
 15209  			break
 15210  		}
 15211  		if s3.AuxInt != 32 {
 15212  			break
 15213  		}
 15214  		x4 := s3.Args[0]
 15215  		if x4.Op != OpPPC64MOVBZload {
 15216  			break
 15217  		}
 15218  		i4 := x4.AuxInt
 15219  		if x4.Aux != s {
 15220  			break
 15221  		}
 15222  		_ = x4.Args[1]
 15223  		if p != x4.Args[0] {
 15224  			break
 15225  		}
 15226  		if mem != x4.Args[1] {
 15227  			break
 15228  		}
 15229  		o2 := o3.Args[1]
 15230  		if o2.Op != OpPPC64OR {
 15231  			break
 15232  		}
 15233  		if o2.Type != t {
 15234  			break
 15235  		}
 15236  		_ = o2.Args[1]
 15237  		o1 := o2.Args[0]
 15238  		if o1.Op != OpPPC64OR {
 15239  			break
 15240  		}
 15241  		if o1.Type != t {
 15242  			break
 15243  		}
 15244  		_ = o1.Args[1]
 15245  		o0 := o1.Args[0]
 15246  		if o0.Op != OpPPC64OR {
 15247  			break
 15248  		}
 15249  		if o0.Type != t {
 15250  			break
 15251  		}
 15252  		_ = o0.Args[1]
 15253  		x0 := o0.Args[0]
 15254  		if x0.Op != OpPPC64MOVBZload {
 15255  			break
 15256  		}
 15257  		i0 := x0.AuxInt
 15258  		if x0.Aux != s {
 15259  			break
 15260  		}
 15261  		_ = x0.Args[1]
 15262  		if p != x0.Args[0] {
 15263  			break
 15264  		}
 15265  		if mem != x0.Args[1] {
 15266  			break
 15267  		}
 15268  		s0 := o0.Args[1]
 15269  		if s0.Op != OpPPC64SLDconst {
 15270  			break
 15271  		}
 15272  		if s0.AuxInt != 8 {
 15273  			break
 15274  		}
 15275  		x1 := s0.Args[0]
 15276  		if x1.Op != OpPPC64MOVBZload {
 15277  			break
 15278  		}
 15279  		i1 := x1.AuxInt
 15280  		if x1.Aux != s {
 15281  			break
 15282  		}
 15283  		_ = x1.Args[1]
 15284  		if p != x1.Args[0] {
 15285  			break
 15286  		}
 15287  		if mem != x1.Args[1] {
 15288  			break
 15289  		}
 15290  		s1 := o1.Args[1]
 15291  		if s1.Op != OpPPC64SLDconst {
 15292  			break
 15293  		}
 15294  		if s1.AuxInt != 16 {
 15295  			break
 15296  		}
 15297  		x2 := s1.Args[0]
 15298  		if x2.Op != OpPPC64MOVBZload {
 15299  			break
 15300  		}
 15301  		i2 := x2.AuxInt
 15302  		if x2.Aux != s {
 15303  			break
 15304  		}
 15305  		_ = x2.Args[1]
 15306  		if p != x2.Args[0] {
 15307  			break
 15308  		}
 15309  		if mem != x2.Args[1] {
 15310  			break
 15311  		}
 15312  		s2 := o2.Args[1]
 15313  		if s2.Op != OpPPC64SLDconst {
 15314  			break
 15315  		}
 15316  		if s2.AuxInt != 24 {
 15317  			break
 15318  		}
 15319  		x3 := s2.Args[0]
 15320  		if x3.Op != OpPPC64MOVBZload {
 15321  			break
 15322  		}
 15323  		i3 := x3.AuxInt
 15324  		if x3.Aux != s {
 15325  			break
 15326  		}
 15327  		_ = x3.Args[1]
 15328  		if p != x3.Args[0] {
 15329  			break
 15330  		}
 15331  		if mem != x3.Args[1] {
 15332  			break
 15333  		}
 15334  		s4 := o4.Args[1]
 15335  		if s4.Op != OpPPC64SLDconst {
 15336  			break
 15337  		}
 15338  		if s4.AuxInt != 40 {
 15339  			break
 15340  		}
 15341  		x5 := s4.Args[0]
 15342  		if x5.Op != OpPPC64MOVBZload {
 15343  			break
 15344  		}
 15345  		i5 := x5.AuxInt
 15346  		if x5.Aux != s {
 15347  			break
 15348  		}
 15349  		_ = x5.Args[1]
 15350  		if p != x5.Args[0] {
 15351  			break
 15352  		}
 15353  		if mem != x5.Args[1] {
 15354  			break
 15355  		}
 15356  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 15357  			break
 15358  		}
 15359  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 15360  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 15361  		v.reset(OpCopy)
 15362  		v.AddArg(v0)
 15363  		v0.AuxInt = i0
 15364  		v0.Aux = s
 15365  		v0.AddArg(p)
 15366  		v0.AddArg(mem)
 15367  		return true
 15368  	}
 15369  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 15370  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 15371  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 15372  	for {
 15373  		t := v.Type
 15374  		_ = v.Args[1]
 15375  		s6 := v.Args[0]
 15376  		if s6.Op != OpPPC64SLDconst {
 15377  			break
 15378  		}
 15379  		if s6.AuxInt != 56 {
 15380  			break
 15381  		}
 15382  		x7 := s6.Args[0]
 15383  		if x7.Op != OpPPC64MOVBZload {
 15384  			break
 15385  		}
 15386  		i7 := x7.AuxInt
 15387  		s := x7.Aux
 15388  		_ = x7.Args[1]
 15389  		p := x7.Args[0]
 15390  		mem := x7.Args[1]
 15391  		o5 := v.Args[1]
 15392  		if o5.Op != OpPPC64OR {
 15393  			break
 15394  		}
 15395  		if o5.Type != t {
 15396  			break
 15397  		}
 15398  		_ = o5.Args[1]
 15399  		s5 := o5.Args[0]
 15400  		if s5.Op != OpPPC64SLDconst {
 15401  			break
 15402  		}
 15403  		if s5.AuxInt != 48 {
 15404  			break
 15405  		}
 15406  		x6 := s5.Args[0]
 15407  		if x6.Op != OpPPC64MOVBZload {
 15408  			break
 15409  		}
 15410  		i6 := x6.AuxInt
 15411  		if x6.Aux != s {
 15412  			break
 15413  		}
 15414  		_ = x6.Args[1]
 15415  		if p != x6.Args[0] {
 15416  			break
 15417  		}
 15418  		if mem != x6.Args[1] {
 15419  			break
 15420  		}
 15421  		o4 := o5.Args[1]
 15422  		if o4.Op != OpPPC64OR {
 15423  			break
 15424  		}
 15425  		if o4.Type != t {
 15426  			break
 15427  		}
 15428  		_ = o4.Args[1]
 15429  		o3 := o4.Args[0]
 15430  		if o3.Op != OpPPC64OR {
 15431  			break
 15432  		}
 15433  		if o3.Type != t {
 15434  			break
 15435  		}
 15436  		_ = o3.Args[1]
 15437  		o2 := o3.Args[0]
 15438  		if o2.Op != OpPPC64OR {
 15439  			break
 15440  		}
 15441  		if o2.Type != t {
 15442  			break
 15443  		}
 15444  		_ = o2.Args[1]
 15445  		s2 := o2.Args[0]
 15446  		if s2.Op != OpPPC64SLDconst {
 15447  			break
 15448  		}
 15449  		if s2.AuxInt != 24 {
 15450  			break
 15451  		}
 15452  		x3 := s2.Args[0]
 15453  		if x3.Op != OpPPC64MOVBZload {
 15454  			break
 15455  		}
 15456  		i3 := x3.AuxInt
 15457  		if x3.Aux != s {
 15458  			break
 15459  		}
 15460  		_ = x3.Args[1]
 15461  		if p != x3.Args[0] {
 15462  			break
 15463  		}
 15464  		if mem != x3.Args[1] {
 15465  			break
 15466  		}
 15467  		o1 := o2.Args[1]
 15468  		if o1.Op != OpPPC64OR {
 15469  			break
 15470  		}
 15471  		if o1.Type != t {
 15472  			break
 15473  		}
 15474  		_ = o1.Args[1]
 15475  		s1 := o1.Args[0]
 15476  		if s1.Op != OpPPC64SLDconst {
 15477  			break
 15478  		}
 15479  		if s1.AuxInt != 16 {
 15480  			break
 15481  		}
 15482  		x2 := s1.Args[0]
 15483  		if x2.Op != OpPPC64MOVBZload {
 15484  			break
 15485  		}
 15486  		i2 := x2.AuxInt
 15487  		if x2.Aux != s {
 15488  			break
 15489  		}
 15490  		_ = x2.Args[1]
 15491  		if p != x2.Args[0] {
 15492  			break
 15493  		}
 15494  		if mem != x2.Args[1] {
 15495  			break
 15496  		}
 15497  		o0 := o1.Args[1]
 15498  		if o0.Op != OpPPC64OR {
 15499  			break
 15500  		}
 15501  		if o0.Type != t {
 15502  			break
 15503  		}
 15504  		_ = o0.Args[1]
 15505  		s0 := o0.Args[0]
 15506  		if s0.Op != OpPPC64SLDconst {
 15507  			break
 15508  		}
 15509  		if s0.AuxInt != 8 {
 15510  			break
 15511  		}
 15512  		x1 := s0.Args[0]
 15513  		if x1.Op != OpPPC64MOVBZload {
 15514  			break
 15515  		}
 15516  		i1 := x1.AuxInt
 15517  		if x1.Aux != s {
 15518  			break
 15519  		}
 15520  		_ = x1.Args[1]
 15521  		if p != x1.Args[0] {
 15522  			break
 15523  		}
 15524  		if mem != x1.Args[1] {
 15525  			break
 15526  		}
 15527  		x0 := o0.Args[1]
 15528  		if x0.Op != OpPPC64MOVBZload {
 15529  			break
 15530  		}
 15531  		i0 := x0.AuxInt
 15532  		if x0.Aux != s {
 15533  			break
 15534  		}
 15535  		_ = x0.Args[1]
 15536  		if p != x0.Args[0] {
 15537  			break
 15538  		}
 15539  		if mem != x0.Args[1] {
 15540  			break
 15541  		}
 15542  		s3 := o3.Args[1]
 15543  		if s3.Op != OpPPC64SLDconst {
 15544  			break
 15545  		}
 15546  		if s3.AuxInt != 32 {
 15547  			break
 15548  		}
 15549  		x4 := s3.Args[0]
 15550  		if x4.Op != OpPPC64MOVBZload {
 15551  			break
 15552  		}
 15553  		i4 := x4.AuxInt
 15554  		if x4.Aux != s {
 15555  			break
 15556  		}
 15557  		_ = x4.Args[1]
 15558  		if p != x4.Args[0] {
 15559  			break
 15560  		}
 15561  		if mem != x4.Args[1] {
 15562  			break
 15563  		}
 15564  		s4 := o4.Args[1]
 15565  		if s4.Op != OpPPC64SLDconst {
 15566  			break
 15567  		}
 15568  		if s4.AuxInt != 40 {
 15569  			break
 15570  		}
 15571  		x5 := s4.Args[0]
 15572  		if x5.Op != OpPPC64MOVBZload {
 15573  			break
 15574  		}
 15575  		i5 := x5.AuxInt
 15576  		if x5.Aux != s {
 15577  			break
 15578  		}
 15579  		_ = x5.Args[1]
 15580  		if p != x5.Args[0] {
 15581  			break
 15582  		}
 15583  		if mem != x5.Args[1] {
 15584  			break
 15585  		}
 15586  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 15587  			break
 15588  		}
 15589  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 15590  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 15591  		v.reset(OpCopy)
 15592  		v.AddArg(v0)
 15593  		v0.AuxInt = i0
 15594  		v0.Aux = s
 15595  		v0.AddArg(p)
 15596  		v0.AddArg(mem)
 15597  		return true
 15598  	}
 15599  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 15600  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 15601  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 15602  	for {
 15603  		t := v.Type
 15604  		_ = v.Args[1]
 15605  		s6 := v.Args[0]
 15606  		if s6.Op != OpPPC64SLDconst {
 15607  			break
 15608  		}
 15609  		if s6.AuxInt != 56 {
 15610  			break
 15611  		}
 15612  		x7 := s6.Args[0]
 15613  		if x7.Op != OpPPC64MOVBZload {
 15614  			break
 15615  		}
 15616  		i7 := x7.AuxInt
 15617  		s := x7.Aux
 15618  		_ = x7.Args[1]
 15619  		p := x7.Args[0]
 15620  		mem := x7.Args[1]
 15621  		o5 := v.Args[1]
 15622  		if o5.Op != OpPPC64OR {
 15623  			break
 15624  		}
 15625  		if o5.Type != t {
 15626  			break
 15627  		}
 15628  		_ = o5.Args[1]
 15629  		s5 := o5.Args[0]
 15630  		if s5.Op != OpPPC64SLDconst {
 15631  			break
 15632  		}
 15633  		if s5.AuxInt != 48 {
 15634  			break
 15635  		}
 15636  		x6 := s5.Args[0]
 15637  		if x6.Op != OpPPC64MOVBZload {
 15638  			break
 15639  		}
 15640  		i6 := x6.AuxInt
 15641  		if x6.Aux != s {
 15642  			break
 15643  		}
 15644  		_ = x6.Args[1]
 15645  		if p != x6.Args[0] {
 15646  			break
 15647  		}
 15648  		if mem != x6.Args[1] {
 15649  			break
 15650  		}
 15651  		o4 := o5.Args[1]
 15652  		if o4.Op != OpPPC64OR {
 15653  			break
 15654  		}
 15655  		if o4.Type != t {
 15656  			break
 15657  		}
 15658  		_ = o4.Args[1]
 15659  		o3 := o4.Args[0]
 15660  		if o3.Op != OpPPC64OR {
 15661  			break
 15662  		}
 15663  		if o3.Type != t {
 15664  			break
 15665  		}
 15666  		_ = o3.Args[1]
 15667  		o2 := o3.Args[0]
 15668  		if o2.Op != OpPPC64OR {
 15669  			break
 15670  		}
 15671  		if o2.Type != t {
 15672  			break
 15673  		}
 15674  		_ = o2.Args[1]
 15675  		s2 := o2.Args[0]
 15676  		if s2.Op != OpPPC64SLDconst {
 15677  			break
 15678  		}
 15679  		if s2.AuxInt != 24 {
 15680  			break
 15681  		}
 15682  		x3 := s2.Args[0]
 15683  		if x3.Op != OpPPC64MOVBZload {
 15684  			break
 15685  		}
 15686  		i3 := x3.AuxInt
 15687  		if x3.Aux != s {
 15688  			break
 15689  		}
 15690  		_ = x3.Args[1]
 15691  		if p != x3.Args[0] {
 15692  			break
 15693  		}
 15694  		if mem != x3.Args[1] {
 15695  			break
 15696  		}
 15697  		o1 := o2.Args[1]
 15698  		if o1.Op != OpPPC64OR {
 15699  			break
 15700  		}
 15701  		if o1.Type != t {
 15702  			break
 15703  		}
 15704  		_ = o1.Args[1]
 15705  		s1 := o1.Args[0]
 15706  		if s1.Op != OpPPC64SLDconst {
 15707  			break
 15708  		}
 15709  		if s1.AuxInt != 16 {
 15710  			break
 15711  		}
 15712  		x2 := s1.Args[0]
 15713  		if x2.Op != OpPPC64MOVBZload {
 15714  			break
 15715  		}
 15716  		i2 := x2.AuxInt
 15717  		if x2.Aux != s {
 15718  			break
 15719  		}
 15720  		_ = x2.Args[1]
 15721  		if p != x2.Args[0] {
 15722  			break
 15723  		}
 15724  		if mem != x2.Args[1] {
 15725  			break
 15726  		}
 15727  		o0 := o1.Args[1]
 15728  		if o0.Op != OpPPC64OR {
 15729  			break
 15730  		}
 15731  		if o0.Type != t {
 15732  			break
 15733  		}
 15734  		_ = o0.Args[1]
 15735  		x0 := o0.Args[0]
 15736  		if x0.Op != OpPPC64MOVBZload {
 15737  			break
 15738  		}
 15739  		i0 := x0.AuxInt
 15740  		if x0.Aux != s {
 15741  			break
 15742  		}
 15743  		_ = x0.Args[1]
 15744  		if p != x0.Args[0] {
 15745  			break
 15746  		}
 15747  		if mem != x0.Args[1] {
 15748  			break
 15749  		}
 15750  		s0 := o0.Args[1]
 15751  		if s0.Op != OpPPC64SLDconst {
 15752  			break
 15753  		}
 15754  		if s0.AuxInt != 8 {
 15755  			break
 15756  		}
 15757  		x1 := s0.Args[0]
 15758  		if x1.Op != OpPPC64MOVBZload {
 15759  			break
 15760  		}
 15761  		i1 := x1.AuxInt
 15762  		if x1.Aux != s {
 15763  			break
 15764  		}
 15765  		_ = x1.Args[1]
 15766  		if p != x1.Args[0] {
 15767  			break
 15768  		}
 15769  		if mem != x1.Args[1] {
 15770  			break
 15771  		}
 15772  		s3 := o3.Args[1]
 15773  		if s3.Op != OpPPC64SLDconst {
 15774  			break
 15775  		}
 15776  		if s3.AuxInt != 32 {
 15777  			break
 15778  		}
 15779  		x4 := s3.Args[0]
 15780  		if x4.Op != OpPPC64MOVBZload {
 15781  			break
 15782  		}
 15783  		i4 := x4.AuxInt
 15784  		if x4.Aux != s {
 15785  			break
 15786  		}
 15787  		_ = x4.Args[1]
 15788  		if p != x4.Args[0] {
 15789  			break
 15790  		}
 15791  		if mem != x4.Args[1] {
 15792  			break
 15793  		}
 15794  		s4 := o4.Args[1]
 15795  		if s4.Op != OpPPC64SLDconst {
 15796  			break
 15797  		}
 15798  		if s4.AuxInt != 40 {
 15799  			break
 15800  		}
 15801  		x5 := s4.Args[0]
 15802  		if x5.Op != OpPPC64MOVBZload {
 15803  			break
 15804  		}
 15805  		i5 := x5.AuxInt
 15806  		if x5.Aux != s {
 15807  			break
 15808  		}
 15809  		_ = x5.Args[1]
 15810  		if p != x5.Args[0] {
 15811  			break
 15812  		}
 15813  		if mem != x5.Args[1] {
 15814  			break
 15815  		}
 15816  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 15817  			break
 15818  		}
 15819  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 15820  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 15821  		v.reset(OpCopy)
 15822  		v.AddArg(v0)
 15823  		v0.AuxInt = i0
 15824  		v0.Aux = s
 15825  		v0.AddArg(p)
 15826  		v0.AddArg(mem)
 15827  		return true
 15828  	}
 15829  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 15830  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 15831  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 15832  	for {
 15833  		t := v.Type
 15834  		_ = v.Args[1]
 15835  		s6 := v.Args[0]
 15836  		if s6.Op != OpPPC64SLDconst {
 15837  			break
 15838  		}
 15839  		if s6.AuxInt != 56 {
 15840  			break
 15841  		}
 15842  		x7 := s6.Args[0]
 15843  		if x7.Op != OpPPC64MOVBZload {
 15844  			break
 15845  		}
 15846  		i7 := x7.AuxInt
 15847  		s := x7.Aux
 15848  		_ = x7.Args[1]
 15849  		p := x7.Args[0]
 15850  		mem := x7.Args[1]
 15851  		o5 := v.Args[1]
 15852  		if o5.Op != OpPPC64OR {
 15853  			break
 15854  		}
 15855  		if o5.Type != t {
 15856  			break
 15857  		}
 15858  		_ = o5.Args[1]
 15859  		s5 := o5.Args[0]
 15860  		if s5.Op != OpPPC64SLDconst {
 15861  			break
 15862  		}
 15863  		if s5.AuxInt != 48 {
 15864  			break
 15865  		}
 15866  		x6 := s5.Args[0]
 15867  		if x6.Op != OpPPC64MOVBZload {
 15868  			break
 15869  		}
 15870  		i6 := x6.AuxInt
 15871  		if x6.Aux != s {
 15872  			break
 15873  		}
 15874  		_ = x6.Args[1]
 15875  		if p != x6.Args[0] {
 15876  			break
 15877  		}
 15878  		if mem != x6.Args[1] {
 15879  			break
 15880  		}
 15881  		o4 := o5.Args[1]
 15882  		if o4.Op != OpPPC64OR {
 15883  			break
 15884  		}
 15885  		if o4.Type != t {
 15886  			break
 15887  		}
 15888  		_ = o4.Args[1]
 15889  		o3 := o4.Args[0]
 15890  		if o3.Op != OpPPC64OR {
 15891  			break
 15892  		}
 15893  		if o3.Type != t {
 15894  			break
 15895  		}
 15896  		_ = o3.Args[1]
 15897  		o2 := o3.Args[0]
 15898  		if o2.Op != OpPPC64OR {
 15899  			break
 15900  		}
 15901  		if o2.Type != t {
 15902  			break
 15903  		}
 15904  		_ = o2.Args[1]
 15905  		s2 := o2.Args[0]
 15906  		if s2.Op != OpPPC64SLDconst {
 15907  			break
 15908  		}
 15909  		if s2.AuxInt != 24 {
 15910  			break
 15911  		}
 15912  		x3 := s2.Args[0]
 15913  		if x3.Op != OpPPC64MOVBZload {
 15914  			break
 15915  		}
 15916  		i3 := x3.AuxInt
 15917  		if x3.Aux != s {
 15918  			break
 15919  		}
 15920  		_ = x3.Args[1]
 15921  		if p != x3.Args[0] {
 15922  			break
 15923  		}
 15924  		if mem != x3.Args[1] {
 15925  			break
 15926  		}
 15927  		o1 := o2.Args[1]
 15928  		if o1.Op != OpPPC64OR {
 15929  			break
 15930  		}
 15931  		if o1.Type != t {
 15932  			break
 15933  		}
 15934  		_ = o1.Args[1]
 15935  		o0 := o1.Args[0]
 15936  		if o0.Op != OpPPC64OR {
 15937  			break
 15938  		}
 15939  		if o0.Type != t {
 15940  			break
 15941  		}
 15942  		_ = o0.Args[1]
 15943  		s0 := o0.Args[0]
 15944  		if s0.Op != OpPPC64SLDconst {
 15945  			break
 15946  		}
 15947  		if s0.AuxInt != 8 {
 15948  			break
 15949  		}
 15950  		x1 := s0.Args[0]
 15951  		if x1.Op != OpPPC64MOVBZload {
 15952  			break
 15953  		}
 15954  		i1 := x1.AuxInt
 15955  		if x1.Aux != s {
 15956  			break
 15957  		}
 15958  		_ = x1.Args[1]
 15959  		if p != x1.Args[0] {
 15960  			break
 15961  		}
 15962  		if mem != x1.Args[1] {
 15963  			break
 15964  		}
 15965  		x0 := o0.Args[1]
 15966  		if x0.Op != OpPPC64MOVBZload {
 15967  			break
 15968  		}
 15969  		i0 := x0.AuxInt
 15970  		if x0.Aux != s {
 15971  			break
 15972  		}
 15973  		_ = x0.Args[1]
 15974  		if p != x0.Args[0] {
 15975  			break
 15976  		}
 15977  		if mem != x0.Args[1] {
 15978  			break
 15979  		}
 15980  		s1 := o1.Args[1]
 15981  		if s1.Op != OpPPC64SLDconst {
 15982  			break
 15983  		}
 15984  		if s1.AuxInt != 16 {
 15985  			break
 15986  		}
 15987  		x2 := s1.Args[0]
 15988  		if x2.Op != OpPPC64MOVBZload {
 15989  			break
 15990  		}
 15991  		i2 := x2.AuxInt
 15992  		if x2.Aux != s {
 15993  			break
 15994  		}
 15995  		_ = x2.Args[1]
 15996  		if p != x2.Args[0] {
 15997  			break
 15998  		}
 15999  		if mem != x2.Args[1] {
 16000  			break
 16001  		}
 16002  		s3 := o3.Args[1]
 16003  		if s3.Op != OpPPC64SLDconst {
 16004  			break
 16005  		}
 16006  		if s3.AuxInt != 32 {
 16007  			break
 16008  		}
 16009  		x4 := s3.Args[0]
 16010  		if x4.Op != OpPPC64MOVBZload {
 16011  			break
 16012  		}
 16013  		i4 := x4.AuxInt
 16014  		if x4.Aux != s {
 16015  			break
 16016  		}
 16017  		_ = x4.Args[1]
 16018  		if p != x4.Args[0] {
 16019  			break
 16020  		}
 16021  		if mem != x4.Args[1] {
 16022  			break
 16023  		}
 16024  		s4 := o4.Args[1]
 16025  		if s4.Op != OpPPC64SLDconst {
 16026  			break
 16027  		}
 16028  		if s4.AuxInt != 40 {
 16029  			break
 16030  		}
 16031  		x5 := s4.Args[0]
 16032  		if x5.Op != OpPPC64MOVBZload {
 16033  			break
 16034  		}
 16035  		i5 := x5.AuxInt
 16036  		if x5.Aux != s {
 16037  			break
 16038  		}
 16039  		_ = x5.Args[1]
 16040  		if p != x5.Args[0] {
 16041  			break
 16042  		}
 16043  		if mem != x5.Args[1] {
 16044  			break
 16045  		}
 16046  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16047  			break
 16048  		}
 16049  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16050  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16051  		v.reset(OpCopy)
 16052  		v.AddArg(v0)
 16053  		v0.AuxInt = i0
 16054  		v0.Aux = s
 16055  		v0.AddArg(p)
 16056  		v0.AddArg(mem)
 16057  		return true
 16058  	}
 16059  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16060  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16061  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16062  	for {
 16063  		t := v.Type
 16064  		_ = v.Args[1]
 16065  		s6 := v.Args[0]
 16066  		if s6.Op != OpPPC64SLDconst {
 16067  			break
 16068  		}
 16069  		if s6.AuxInt != 56 {
 16070  			break
 16071  		}
 16072  		x7 := s6.Args[0]
 16073  		if x7.Op != OpPPC64MOVBZload {
 16074  			break
 16075  		}
 16076  		i7 := x7.AuxInt
 16077  		s := x7.Aux
 16078  		_ = x7.Args[1]
 16079  		p := x7.Args[0]
 16080  		mem := x7.Args[1]
 16081  		o5 := v.Args[1]
 16082  		if o5.Op != OpPPC64OR {
 16083  			break
 16084  		}
 16085  		if o5.Type != t {
 16086  			break
 16087  		}
 16088  		_ = o5.Args[1]
 16089  		s5 := o5.Args[0]
 16090  		if s5.Op != OpPPC64SLDconst {
 16091  			break
 16092  		}
 16093  		if s5.AuxInt != 48 {
 16094  			break
 16095  		}
 16096  		x6 := s5.Args[0]
 16097  		if x6.Op != OpPPC64MOVBZload {
 16098  			break
 16099  		}
 16100  		i6 := x6.AuxInt
 16101  		if x6.Aux != s {
 16102  			break
 16103  		}
 16104  		_ = x6.Args[1]
 16105  		if p != x6.Args[0] {
 16106  			break
 16107  		}
 16108  		if mem != x6.Args[1] {
 16109  			break
 16110  		}
 16111  		o4 := o5.Args[1]
 16112  		if o4.Op != OpPPC64OR {
 16113  			break
 16114  		}
 16115  		if o4.Type != t {
 16116  			break
 16117  		}
 16118  		_ = o4.Args[1]
 16119  		o3 := o4.Args[0]
 16120  		if o3.Op != OpPPC64OR {
 16121  			break
 16122  		}
 16123  		if o3.Type != t {
 16124  			break
 16125  		}
 16126  		_ = o3.Args[1]
 16127  		o2 := o3.Args[0]
 16128  		if o2.Op != OpPPC64OR {
 16129  			break
 16130  		}
 16131  		if o2.Type != t {
 16132  			break
 16133  		}
 16134  		_ = o2.Args[1]
 16135  		s2 := o2.Args[0]
 16136  		if s2.Op != OpPPC64SLDconst {
 16137  			break
 16138  		}
 16139  		if s2.AuxInt != 24 {
 16140  			break
 16141  		}
 16142  		x3 := s2.Args[0]
 16143  		if x3.Op != OpPPC64MOVBZload {
 16144  			break
 16145  		}
 16146  		i3 := x3.AuxInt
 16147  		if x3.Aux != s {
 16148  			break
 16149  		}
 16150  		_ = x3.Args[1]
 16151  		if p != x3.Args[0] {
 16152  			break
 16153  		}
 16154  		if mem != x3.Args[1] {
 16155  			break
 16156  		}
 16157  		o1 := o2.Args[1]
 16158  		if o1.Op != OpPPC64OR {
 16159  			break
 16160  		}
 16161  		if o1.Type != t {
 16162  			break
 16163  		}
 16164  		_ = o1.Args[1]
 16165  		o0 := o1.Args[0]
 16166  		if o0.Op != OpPPC64OR {
 16167  			break
 16168  		}
 16169  		if o0.Type != t {
 16170  			break
 16171  		}
 16172  		_ = o0.Args[1]
 16173  		x0 := o0.Args[0]
 16174  		if x0.Op != OpPPC64MOVBZload {
 16175  			break
 16176  		}
 16177  		i0 := x0.AuxInt
 16178  		if x0.Aux != s {
 16179  			break
 16180  		}
 16181  		_ = x0.Args[1]
 16182  		if p != x0.Args[0] {
 16183  			break
 16184  		}
 16185  		if mem != x0.Args[1] {
 16186  			break
 16187  		}
 16188  		s0 := o0.Args[1]
 16189  		if s0.Op != OpPPC64SLDconst {
 16190  			break
 16191  		}
 16192  		if s0.AuxInt != 8 {
 16193  			break
 16194  		}
 16195  		x1 := s0.Args[0]
 16196  		if x1.Op != OpPPC64MOVBZload {
 16197  			break
 16198  		}
 16199  		i1 := x1.AuxInt
 16200  		if x1.Aux != s {
 16201  			break
 16202  		}
 16203  		_ = x1.Args[1]
 16204  		if p != x1.Args[0] {
 16205  			break
 16206  		}
 16207  		if mem != x1.Args[1] {
 16208  			break
 16209  		}
 16210  		s1 := o1.Args[1]
 16211  		if s1.Op != OpPPC64SLDconst {
 16212  			break
 16213  		}
 16214  		if s1.AuxInt != 16 {
 16215  			break
 16216  		}
 16217  		x2 := s1.Args[0]
 16218  		if x2.Op != OpPPC64MOVBZload {
 16219  			break
 16220  		}
 16221  		i2 := x2.AuxInt
 16222  		if x2.Aux != s {
 16223  			break
 16224  		}
 16225  		_ = x2.Args[1]
 16226  		if p != x2.Args[0] {
 16227  			break
 16228  		}
 16229  		if mem != x2.Args[1] {
 16230  			break
 16231  		}
 16232  		s3 := o3.Args[1]
 16233  		if s3.Op != OpPPC64SLDconst {
 16234  			break
 16235  		}
 16236  		if s3.AuxInt != 32 {
 16237  			break
 16238  		}
 16239  		x4 := s3.Args[0]
 16240  		if x4.Op != OpPPC64MOVBZload {
 16241  			break
 16242  		}
 16243  		i4 := x4.AuxInt
 16244  		if x4.Aux != s {
 16245  			break
 16246  		}
 16247  		_ = x4.Args[1]
 16248  		if p != x4.Args[0] {
 16249  			break
 16250  		}
 16251  		if mem != x4.Args[1] {
 16252  			break
 16253  		}
 16254  		s4 := o4.Args[1]
 16255  		if s4.Op != OpPPC64SLDconst {
 16256  			break
 16257  		}
 16258  		if s4.AuxInt != 40 {
 16259  			break
 16260  		}
 16261  		x5 := s4.Args[0]
 16262  		if x5.Op != OpPPC64MOVBZload {
 16263  			break
 16264  		}
 16265  		i5 := x5.AuxInt
 16266  		if x5.Aux != s {
 16267  			break
 16268  		}
 16269  		_ = x5.Args[1]
 16270  		if p != x5.Args[0] {
 16271  			break
 16272  		}
 16273  		if mem != x5.Args[1] {
 16274  			break
 16275  		}
 16276  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16277  			break
 16278  		}
 16279  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16280  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16281  		v.reset(OpCopy)
 16282  		v.AddArg(v0)
 16283  		v0.AuxInt = i0
 16284  		v0.Aux = s
 16285  		v0.AddArg(p)
 16286  		v0.AddArg(mem)
 16287  		return true
 16288  	}
 16289  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16290  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16291  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16292  	for {
 16293  		t := v.Type
 16294  		_ = v.Args[1]
 16295  		s6 := v.Args[0]
 16296  		if s6.Op != OpPPC64SLDconst {
 16297  			break
 16298  		}
 16299  		if s6.AuxInt != 56 {
 16300  			break
 16301  		}
 16302  		x7 := s6.Args[0]
 16303  		if x7.Op != OpPPC64MOVBZload {
 16304  			break
 16305  		}
 16306  		i7 := x7.AuxInt
 16307  		s := x7.Aux
 16308  		_ = x7.Args[1]
 16309  		p := x7.Args[0]
 16310  		mem := x7.Args[1]
 16311  		o5 := v.Args[1]
 16312  		if o5.Op != OpPPC64OR {
 16313  			break
 16314  		}
 16315  		if o5.Type != t {
 16316  			break
 16317  		}
 16318  		_ = o5.Args[1]
 16319  		s5 := o5.Args[0]
 16320  		if s5.Op != OpPPC64SLDconst {
 16321  			break
 16322  		}
 16323  		if s5.AuxInt != 48 {
 16324  			break
 16325  		}
 16326  		x6 := s5.Args[0]
 16327  		if x6.Op != OpPPC64MOVBZload {
 16328  			break
 16329  		}
 16330  		i6 := x6.AuxInt
 16331  		if x6.Aux != s {
 16332  			break
 16333  		}
 16334  		_ = x6.Args[1]
 16335  		if p != x6.Args[0] {
 16336  			break
 16337  		}
 16338  		if mem != x6.Args[1] {
 16339  			break
 16340  		}
 16341  		o4 := o5.Args[1]
 16342  		if o4.Op != OpPPC64OR {
 16343  			break
 16344  		}
 16345  		if o4.Type != t {
 16346  			break
 16347  		}
 16348  		_ = o4.Args[1]
 16349  		o3 := o4.Args[0]
 16350  		if o3.Op != OpPPC64OR {
 16351  			break
 16352  		}
 16353  		if o3.Type != t {
 16354  			break
 16355  		}
 16356  		_ = o3.Args[1]
 16357  		o2 := o3.Args[0]
 16358  		if o2.Op != OpPPC64OR {
 16359  			break
 16360  		}
 16361  		if o2.Type != t {
 16362  			break
 16363  		}
 16364  		_ = o2.Args[1]
 16365  		o1 := o2.Args[0]
 16366  		if o1.Op != OpPPC64OR {
 16367  			break
 16368  		}
 16369  		if o1.Type != t {
 16370  			break
 16371  		}
 16372  		_ = o1.Args[1]
 16373  		s1 := o1.Args[0]
 16374  		if s1.Op != OpPPC64SLDconst {
 16375  			break
 16376  		}
 16377  		if s1.AuxInt != 16 {
 16378  			break
 16379  		}
 16380  		x2 := s1.Args[0]
 16381  		if x2.Op != OpPPC64MOVBZload {
 16382  			break
 16383  		}
 16384  		i2 := x2.AuxInt
 16385  		if x2.Aux != s {
 16386  			break
 16387  		}
 16388  		_ = x2.Args[1]
 16389  		if p != x2.Args[0] {
 16390  			break
 16391  		}
 16392  		if mem != x2.Args[1] {
 16393  			break
 16394  		}
 16395  		o0 := o1.Args[1]
 16396  		if o0.Op != OpPPC64OR {
 16397  			break
 16398  		}
 16399  		if o0.Type != t {
 16400  			break
 16401  		}
 16402  		_ = o0.Args[1]
 16403  		s0 := o0.Args[0]
 16404  		if s0.Op != OpPPC64SLDconst {
 16405  			break
 16406  		}
 16407  		if s0.AuxInt != 8 {
 16408  			break
 16409  		}
 16410  		x1 := s0.Args[0]
 16411  		if x1.Op != OpPPC64MOVBZload {
 16412  			break
 16413  		}
 16414  		i1 := x1.AuxInt
 16415  		if x1.Aux != s {
 16416  			break
 16417  		}
 16418  		_ = x1.Args[1]
 16419  		if p != x1.Args[0] {
 16420  			break
 16421  		}
 16422  		if mem != x1.Args[1] {
 16423  			break
 16424  		}
 16425  		x0 := o0.Args[1]
 16426  		if x0.Op != OpPPC64MOVBZload {
 16427  			break
 16428  		}
 16429  		i0 := x0.AuxInt
 16430  		if x0.Aux != s {
 16431  			break
 16432  		}
 16433  		_ = x0.Args[1]
 16434  		if p != x0.Args[0] {
 16435  			break
 16436  		}
 16437  		if mem != x0.Args[1] {
 16438  			break
 16439  		}
 16440  		s2 := o2.Args[1]
 16441  		if s2.Op != OpPPC64SLDconst {
 16442  			break
 16443  		}
 16444  		if s2.AuxInt != 24 {
 16445  			break
 16446  		}
 16447  		x3 := s2.Args[0]
 16448  		if x3.Op != OpPPC64MOVBZload {
 16449  			break
 16450  		}
 16451  		i3 := x3.AuxInt
 16452  		if x3.Aux != s {
 16453  			break
 16454  		}
 16455  		_ = x3.Args[1]
 16456  		if p != x3.Args[0] {
 16457  			break
 16458  		}
 16459  		if mem != x3.Args[1] {
 16460  			break
 16461  		}
 16462  		s3 := o3.Args[1]
 16463  		if s3.Op != OpPPC64SLDconst {
 16464  			break
 16465  		}
 16466  		if s3.AuxInt != 32 {
 16467  			break
 16468  		}
 16469  		x4 := s3.Args[0]
 16470  		if x4.Op != OpPPC64MOVBZload {
 16471  			break
 16472  		}
 16473  		i4 := x4.AuxInt
 16474  		if x4.Aux != s {
 16475  			break
 16476  		}
 16477  		_ = x4.Args[1]
 16478  		if p != x4.Args[0] {
 16479  			break
 16480  		}
 16481  		if mem != x4.Args[1] {
 16482  			break
 16483  		}
 16484  		s4 := o4.Args[1]
 16485  		if s4.Op != OpPPC64SLDconst {
 16486  			break
 16487  		}
 16488  		if s4.AuxInt != 40 {
 16489  			break
 16490  		}
 16491  		x5 := s4.Args[0]
 16492  		if x5.Op != OpPPC64MOVBZload {
 16493  			break
 16494  		}
 16495  		i5 := x5.AuxInt
 16496  		if x5.Aux != s {
 16497  			break
 16498  		}
 16499  		_ = x5.Args[1]
 16500  		if p != x5.Args[0] {
 16501  			break
 16502  		}
 16503  		if mem != x5.Args[1] {
 16504  			break
 16505  		}
 16506  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16507  			break
 16508  		}
 16509  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16510  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16511  		v.reset(OpCopy)
 16512  		v.AddArg(v0)
 16513  		v0.AuxInt = i0
 16514  		v0.Aux = s
 16515  		v0.AddArg(p)
 16516  		v0.AddArg(mem)
 16517  		return true
 16518  	}
 16519  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16520  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16521  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16522  	for {
 16523  		t := v.Type
 16524  		_ = v.Args[1]
 16525  		s6 := v.Args[0]
 16526  		if s6.Op != OpPPC64SLDconst {
 16527  			break
 16528  		}
 16529  		if s6.AuxInt != 56 {
 16530  			break
 16531  		}
 16532  		x7 := s6.Args[0]
 16533  		if x7.Op != OpPPC64MOVBZload {
 16534  			break
 16535  		}
 16536  		i7 := x7.AuxInt
 16537  		s := x7.Aux
 16538  		_ = x7.Args[1]
 16539  		p := x7.Args[0]
 16540  		mem := x7.Args[1]
 16541  		o5 := v.Args[1]
 16542  		if o5.Op != OpPPC64OR {
 16543  			break
 16544  		}
 16545  		if o5.Type != t {
 16546  			break
 16547  		}
 16548  		_ = o5.Args[1]
 16549  		s5 := o5.Args[0]
 16550  		if s5.Op != OpPPC64SLDconst {
 16551  			break
 16552  		}
 16553  		if s5.AuxInt != 48 {
 16554  			break
 16555  		}
 16556  		x6 := s5.Args[0]
 16557  		if x6.Op != OpPPC64MOVBZload {
 16558  			break
 16559  		}
 16560  		i6 := x6.AuxInt
 16561  		if x6.Aux != s {
 16562  			break
 16563  		}
 16564  		_ = x6.Args[1]
 16565  		if p != x6.Args[0] {
 16566  			break
 16567  		}
 16568  		if mem != x6.Args[1] {
 16569  			break
 16570  		}
 16571  		o4 := o5.Args[1]
 16572  		if o4.Op != OpPPC64OR {
 16573  			break
 16574  		}
 16575  		if o4.Type != t {
 16576  			break
 16577  		}
 16578  		_ = o4.Args[1]
 16579  		o3 := o4.Args[0]
 16580  		if o3.Op != OpPPC64OR {
 16581  			break
 16582  		}
 16583  		if o3.Type != t {
 16584  			break
 16585  		}
 16586  		_ = o3.Args[1]
 16587  		o2 := o3.Args[0]
 16588  		if o2.Op != OpPPC64OR {
 16589  			break
 16590  		}
 16591  		if o2.Type != t {
 16592  			break
 16593  		}
 16594  		_ = o2.Args[1]
 16595  		o1 := o2.Args[0]
 16596  		if o1.Op != OpPPC64OR {
 16597  			break
 16598  		}
 16599  		if o1.Type != t {
 16600  			break
 16601  		}
 16602  		_ = o1.Args[1]
 16603  		s1 := o1.Args[0]
 16604  		if s1.Op != OpPPC64SLDconst {
 16605  			break
 16606  		}
 16607  		if s1.AuxInt != 16 {
 16608  			break
 16609  		}
 16610  		x2 := s1.Args[0]
 16611  		if x2.Op != OpPPC64MOVBZload {
 16612  			break
 16613  		}
 16614  		i2 := x2.AuxInt
 16615  		if x2.Aux != s {
 16616  			break
 16617  		}
 16618  		_ = x2.Args[1]
 16619  		if p != x2.Args[0] {
 16620  			break
 16621  		}
 16622  		if mem != x2.Args[1] {
 16623  			break
 16624  		}
 16625  		o0 := o1.Args[1]
 16626  		if o0.Op != OpPPC64OR {
 16627  			break
 16628  		}
 16629  		if o0.Type != t {
 16630  			break
 16631  		}
 16632  		_ = o0.Args[1]
 16633  		x0 := o0.Args[0]
 16634  		if x0.Op != OpPPC64MOVBZload {
 16635  			break
 16636  		}
 16637  		i0 := x0.AuxInt
 16638  		if x0.Aux != s {
 16639  			break
 16640  		}
 16641  		_ = x0.Args[1]
 16642  		if p != x0.Args[0] {
 16643  			break
 16644  		}
 16645  		if mem != x0.Args[1] {
 16646  			break
 16647  		}
 16648  		s0 := o0.Args[1]
 16649  		if s0.Op != OpPPC64SLDconst {
 16650  			break
 16651  		}
 16652  		if s0.AuxInt != 8 {
 16653  			break
 16654  		}
 16655  		x1 := s0.Args[0]
 16656  		if x1.Op != OpPPC64MOVBZload {
 16657  			break
 16658  		}
 16659  		i1 := x1.AuxInt
 16660  		if x1.Aux != s {
 16661  			break
 16662  		}
 16663  		_ = x1.Args[1]
 16664  		if p != x1.Args[0] {
 16665  			break
 16666  		}
 16667  		if mem != x1.Args[1] {
 16668  			break
 16669  		}
 16670  		s2 := o2.Args[1]
 16671  		if s2.Op != OpPPC64SLDconst {
 16672  			break
 16673  		}
 16674  		if s2.AuxInt != 24 {
 16675  			break
 16676  		}
 16677  		x3 := s2.Args[0]
 16678  		if x3.Op != OpPPC64MOVBZload {
 16679  			break
 16680  		}
 16681  		i3 := x3.AuxInt
 16682  		if x3.Aux != s {
 16683  			break
 16684  		}
 16685  		_ = x3.Args[1]
 16686  		if p != x3.Args[0] {
 16687  			break
 16688  		}
 16689  		if mem != x3.Args[1] {
 16690  			break
 16691  		}
 16692  		s3 := o3.Args[1]
 16693  		if s3.Op != OpPPC64SLDconst {
 16694  			break
 16695  		}
 16696  		if s3.AuxInt != 32 {
 16697  			break
 16698  		}
 16699  		x4 := s3.Args[0]
 16700  		if x4.Op != OpPPC64MOVBZload {
 16701  			break
 16702  		}
 16703  		i4 := x4.AuxInt
 16704  		if x4.Aux != s {
 16705  			break
 16706  		}
 16707  		_ = x4.Args[1]
 16708  		if p != x4.Args[0] {
 16709  			break
 16710  		}
 16711  		if mem != x4.Args[1] {
 16712  			break
 16713  		}
 16714  		s4 := o4.Args[1]
 16715  		if s4.Op != OpPPC64SLDconst {
 16716  			break
 16717  		}
 16718  		if s4.AuxInt != 40 {
 16719  			break
 16720  		}
 16721  		x5 := s4.Args[0]
 16722  		if x5.Op != OpPPC64MOVBZload {
 16723  			break
 16724  		}
 16725  		i5 := x5.AuxInt
 16726  		if x5.Aux != s {
 16727  			break
 16728  		}
 16729  		_ = x5.Args[1]
 16730  		if p != x5.Args[0] {
 16731  			break
 16732  		}
 16733  		if mem != x5.Args[1] {
 16734  			break
 16735  		}
 16736  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16737  			break
 16738  		}
 16739  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16740  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16741  		v.reset(OpCopy)
 16742  		v.AddArg(v0)
 16743  		v0.AuxInt = i0
 16744  		v0.Aux = s
 16745  		v0.AddArg(p)
 16746  		v0.AddArg(mem)
 16747  		return true
 16748  	}
 16749  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16750  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16751  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16752  	for {
 16753  		t := v.Type
 16754  		_ = v.Args[1]
 16755  		s6 := v.Args[0]
 16756  		if s6.Op != OpPPC64SLDconst {
 16757  			break
 16758  		}
 16759  		if s6.AuxInt != 56 {
 16760  			break
 16761  		}
 16762  		x7 := s6.Args[0]
 16763  		if x7.Op != OpPPC64MOVBZload {
 16764  			break
 16765  		}
 16766  		i7 := x7.AuxInt
 16767  		s := x7.Aux
 16768  		_ = x7.Args[1]
 16769  		p := x7.Args[0]
 16770  		mem := x7.Args[1]
 16771  		o5 := v.Args[1]
 16772  		if o5.Op != OpPPC64OR {
 16773  			break
 16774  		}
 16775  		if o5.Type != t {
 16776  			break
 16777  		}
 16778  		_ = o5.Args[1]
 16779  		s5 := o5.Args[0]
 16780  		if s5.Op != OpPPC64SLDconst {
 16781  			break
 16782  		}
 16783  		if s5.AuxInt != 48 {
 16784  			break
 16785  		}
 16786  		x6 := s5.Args[0]
 16787  		if x6.Op != OpPPC64MOVBZload {
 16788  			break
 16789  		}
 16790  		i6 := x6.AuxInt
 16791  		if x6.Aux != s {
 16792  			break
 16793  		}
 16794  		_ = x6.Args[1]
 16795  		if p != x6.Args[0] {
 16796  			break
 16797  		}
 16798  		if mem != x6.Args[1] {
 16799  			break
 16800  		}
 16801  		o4 := o5.Args[1]
 16802  		if o4.Op != OpPPC64OR {
 16803  			break
 16804  		}
 16805  		if o4.Type != t {
 16806  			break
 16807  		}
 16808  		_ = o4.Args[1]
 16809  		o3 := o4.Args[0]
 16810  		if o3.Op != OpPPC64OR {
 16811  			break
 16812  		}
 16813  		if o3.Type != t {
 16814  			break
 16815  		}
 16816  		_ = o3.Args[1]
 16817  		o2 := o3.Args[0]
 16818  		if o2.Op != OpPPC64OR {
 16819  			break
 16820  		}
 16821  		if o2.Type != t {
 16822  			break
 16823  		}
 16824  		_ = o2.Args[1]
 16825  		o1 := o2.Args[0]
 16826  		if o1.Op != OpPPC64OR {
 16827  			break
 16828  		}
 16829  		if o1.Type != t {
 16830  			break
 16831  		}
 16832  		_ = o1.Args[1]
 16833  		o0 := o1.Args[0]
 16834  		if o0.Op != OpPPC64OR {
 16835  			break
 16836  		}
 16837  		if o0.Type != t {
 16838  			break
 16839  		}
 16840  		_ = o0.Args[1]
 16841  		s0 := o0.Args[0]
 16842  		if s0.Op != OpPPC64SLDconst {
 16843  			break
 16844  		}
 16845  		if s0.AuxInt != 8 {
 16846  			break
 16847  		}
 16848  		x1 := s0.Args[0]
 16849  		if x1.Op != OpPPC64MOVBZload {
 16850  			break
 16851  		}
 16852  		i1 := x1.AuxInt
 16853  		if x1.Aux != s {
 16854  			break
 16855  		}
 16856  		_ = x1.Args[1]
 16857  		if p != x1.Args[0] {
 16858  			break
 16859  		}
 16860  		if mem != x1.Args[1] {
 16861  			break
 16862  		}
 16863  		x0 := o0.Args[1]
 16864  		if x0.Op != OpPPC64MOVBZload {
 16865  			break
 16866  		}
 16867  		i0 := x0.AuxInt
 16868  		if x0.Aux != s {
 16869  			break
 16870  		}
 16871  		_ = x0.Args[1]
 16872  		if p != x0.Args[0] {
 16873  			break
 16874  		}
 16875  		if mem != x0.Args[1] {
 16876  			break
 16877  		}
 16878  		s1 := o1.Args[1]
 16879  		if s1.Op != OpPPC64SLDconst {
 16880  			break
 16881  		}
 16882  		if s1.AuxInt != 16 {
 16883  			break
 16884  		}
 16885  		x2 := s1.Args[0]
 16886  		if x2.Op != OpPPC64MOVBZload {
 16887  			break
 16888  		}
 16889  		i2 := x2.AuxInt
 16890  		if x2.Aux != s {
 16891  			break
 16892  		}
 16893  		_ = x2.Args[1]
 16894  		if p != x2.Args[0] {
 16895  			break
 16896  		}
 16897  		if mem != x2.Args[1] {
 16898  			break
 16899  		}
 16900  		s2 := o2.Args[1]
 16901  		if s2.Op != OpPPC64SLDconst {
 16902  			break
 16903  		}
 16904  		if s2.AuxInt != 24 {
 16905  			break
 16906  		}
 16907  		x3 := s2.Args[0]
 16908  		if x3.Op != OpPPC64MOVBZload {
 16909  			break
 16910  		}
 16911  		i3 := x3.AuxInt
 16912  		if x3.Aux != s {
 16913  			break
 16914  		}
 16915  		_ = x3.Args[1]
 16916  		if p != x3.Args[0] {
 16917  			break
 16918  		}
 16919  		if mem != x3.Args[1] {
 16920  			break
 16921  		}
 16922  		s3 := o3.Args[1]
 16923  		if s3.Op != OpPPC64SLDconst {
 16924  			break
 16925  		}
 16926  		if s3.AuxInt != 32 {
 16927  			break
 16928  		}
 16929  		x4 := s3.Args[0]
 16930  		if x4.Op != OpPPC64MOVBZload {
 16931  			break
 16932  		}
 16933  		i4 := x4.AuxInt
 16934  		if x4.Aux != s {
 16935  			break
 16936  		}
 16937  		_ = x4.Args[1]
 16938  		if p != x4.Args[0] {
 16939  			break
 16940  		}
 16941  		if mem != x4.Args[1] {
 16942  			break
 16943  		}
 16944  		s4 := o4.Args[1]
 16945  		if s4.Op != OpPPC64SLDconst {
 16946  			break
 16947  		}
 16948  		if s4.AuxInt != 40 {
 16949  			break
 16950  		}
 16951  		x5 := s4.Args[0]
 16952  		if x5.Op != OpPPC64MOVBZload {
 16953  			break
 16954  		}
 16955  		i5 := x5.AuxInt
 16956  		if x5.Aux != s {
 16957  			break
 16958  		}
 16959  		_ = x5.Args[1]
 16960  		if p != x5.Args[0] {
 16961  			break
 16962  		}
 16963  		if mem != x5.Args[1] {
 16964  			break
 16965  		}
 16966  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 16967  			break
 16968  		}
 16969  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 16970  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 16971  		v.reset(OpCopy)
 16972  		v.AddArg(v0)
 16973  		v0.AuxInt = i0
 16974  		v0.Aux = s
 16975  		v0.AddArg(p)
 16976  		v0.AddArg(mem)
 16977  		return true
 16978  	}
 16979  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
 16980  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 16981  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 16982  	for {
 16983  		t := v.Type
 16984  		_ = v.Args[1]
 16985  		s6 := v.Args[0]
 16986  		if s6.Op != OpPPC64SLDconst {
 16987  			break
 16988  		}
 16989  		if s6.AuxInt != 56 {
 16990  			break
 16991  		}
 16992  		x7 := s6.Args[0]
 16993  		if x7.Op != OpPPC64MOVBZload {
 16994  			break
 16995  		}
 16996  		i7 := x7.AuxInt
 16997  		s := x7.Aux
 16998  		_ = x7.Args[1]
 16999  		p := x7.Args[0]
 17000  		mem := x7.Args[1]
 17001  		o5 := v.Args[1]
 17002  		if o5.Op != OpPPC64OR {
 17003  			break
 17004  		}
 17005  		if o5.Type != t {
 17006  			break
 17007  		}
 17008  		_ = o5.Args[1]
 17009  		s5 := o5.Args[0]
 17010  		if s5.Op != OpPPC64SLDconst {
 17011  			break
 17012  		}
 17013  		if s5.AuxInt != 48 {
 17014  			break
 17015  		}
 17016  		x6 := s5.Args[0]
 17017  		if x6.Op != OpPPC64MOVBZload {
 17018  			break
 17019  		}
 17020  		i6 := x6.AuxInt
 17021  		if x6.Aux != s {
 17022  			break
 17023  		}
 17024  		_ = x6.Args[1]
 17025  		if p != x6.Args[0] {
 17026  			break
 17027  		}
 17028  		if mem != x6.Args[1] {
 17029  			break
 17030  		}
 17031  		o4 := o5.Args[1]
 17032  		if o4.Op != OpPPC64OR {
 17033  			break
 17034  		}
 17035  		if o4.Type != t {
 17036  			break
 17037  		}
 17038  		_ = o4.Args[1]
 17039  		o3 := o4.Args[0]
 17040  		if o3.Op != OpPPC64OR {
 17041  			break
 17042  		}
 17043  		if o3.Type != t {
 17044  			break
 17045  		}
 17046  		_ = o3.Args[1]
 17047  		o2 := o3.Args[0]
 17048  		if o2.Op != OpPPC64OR {
 17049  			break
 17050  		}
 17051  		if o2.Type != t {
 17052  			break
 17053  		}
 17054  		_ = o2.Args[1]
 17055  		o1 := o2.Args[0]
 17056  		if o1.Op != OpPPC64OR {
 17057  			break
 17058  		}
 17059  		if o1.Type != t {
 17060  			break
 17061  		}
 17062  		_ = o1.Args[1]
 17063  		o0 := o1.Args[0]
 17064  		if o0.Op != OpPPC64OR {
 17065  			break
 17066  		}
 17067  		if o0.Type != t {
 17068  			break
 17069  		}
 17070  		_ = o0.Args[1]
 17071  		x0 := o0.Args[0]
 17072  		if x0.Op != OpPPC64MOVBZload {
 17073  			break
 17074  		}
 17075  		i0 := x0.AuxInt
 17076  		if x0.Aux != s {
 17077  			break
 17078  		}
 17079  		_ = x0.Args[1]
 17080  		if p != x0.Args[0] {
 17081  			break
 17082  		}
 17083  		if mem != x0.Args[1] {
 17084  			break
 17085  		}
 17086  		s0 := o0.Args[1]
 17087  		if s0.Op != OpPPC64SLDconst {
 17088  			break
 17089  		}
 17090  		if s0.AuxInt != 8 {
 17091  			break
 17092  		}
 17093  		x1 := s0.Args[0]
 17094  		if x1.Op != OpPPC64MOVBZload {
 17095  			break
 17096  		}
 17097  		i1 := x1.AuxInt
 17098  		if x1.Aux != s {
 17099  			break
 17100  		}
 17101  		_ = x1.Args[1]
 17102  		if p != x1.Args[0] {
 17103  			break
 17104  		}
 17105  		if mem != x1.Args[1] {
 17106  			break
 17107  		}
 17108  		s1 := o1.Args[1]
 17109  		if s1.Op != OpPPC64SLDconst {
 17110  			break
 17111  		}
 17112  		if s1.AuxInt != 16 {
 17113  			break
 17114  		}
 17115  		x2 := s1.Args[0]
 17116  		if x2.Op != OpPPC64MOVBZload {
 17117  			break
 17118  		}
 17119  		i2 := x2.AuxInt
 17120  		if x2.Aux != s {
 17121  			break
 17122  		}
 17123  		_ = x2.Args[1]
 17124  		if p != x2.Args[0] {
 17125  			break
 17126  		}
 17127  		if mem != x2.Args[1] {
 17128  			break
 17129  		}
 17130  		s2 := o2.Args[1]
 17131  		if s2.Op != OpPPC64SLDconst {
 17132  			break
 17133  		}
 17134  		if s2.AuxInt != 24 {
 17135  			break
 17136  		}
 17137  		x3 := s2.Args[0]
 17138  		if x3.Op != OpPPC64MOVBZload {
 17139  			break
 17140  		}
 17141  		i3 := x3.AuxInt
 17142  		if x3.Aux != s {
 17143  			break
 17144  		}
 17145  		_ = x3.Args[1]
 17146  		if p != x3.Args[0] {
 17147  			break
 17148  		}
 17149  		if mem != x3.Args[1] {
 17150  			break
 17151  		}
 17152  		s3 := o3.Args[1]
 17153  		if s3.Op != OpPPC64SLDconst {
 17154  			break
 17155  		}
 17156  		if s3.AuxInt != 32 {
 17157  			break
 17158  		}
 17159  		x4 := s3.Args[0]
 17160  		if x4.Op != OpPPC64MOVBZload {
 17161  			break
 17162  		}
 17163  		i4 := x4.AuxInt
 17164  		if x4.Aux != s {
 17165  			break
 17166  		}
 17167  		_ = x4.Args[1]
 17168  		if p != x4.Args[0] {
 17169  			break
 17170  		}
 17171  		if mem != x4.Args[1] {
 17172  			break
 17173  		}
 17174  		s4 := o4.Args[1]
 17175  		if s4.Op != OpPPC64SLDconst {
 17176  			break
 17177  		}
 17178  		if s4.AuxInt != 40 {
 17179  			break
 17180  		}
 17181  		x5 := s4.Args[0]
 17182  		if x5.Op != OpPPC64MOVBZload {
 17183  			break
 17184  		}
 17185  		i5 := x5.AuxInt
 17186  		if x5.Aux != s {
 17187  			break
 17188  		}
 17189  		_ = x5.Args[1]
 17190  		if p != x5.Args[0] {
 17191  			break
 17192  		}
 17193  		if mem != x5.Args[1] {
 17194  			break
 17195  		}
 17196  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17197  			break
 17198  		}
 17199  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 17200  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17201  		v.reset(OpCopy)
 17202  		v.AddArg(v0)
 17203  		v0.AuxInt = i0
 17204  		v0.Aux = s
 17205  		v0.AddArg(p)
 17206  		v0.AddArg(mem)
 17207  		return true
 17208  	}
 17209  	return false
 17210  }
 17211  func rewriteValuePPC64_OpPPC64OR_50(v *Value) bool {
 17212  	b := v.Block
 17213  	_ = b
 17214  	config := b.Func.Config
 17215  	_ = config
 17216  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17217  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 17218  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17219  	for {
 17220  		t := v.Type
 17221  		_ = v.Args[1]
 17222  		s6 := v.Args[0]
 17223  		if s6.Op != OpPPC64SLDconst {
 17224  			break
 17225  		}
 17226  		if s6.AuxInt != 56 {
 17227  			break
 17228  		}
 17229  		x7 := s6.Args[0]
 17230  		if x7.Op != OpPPC64MOVBZload {
 17231  			break
 17232  		}
 17233  		i7 := x7.AuxInt
 17234  		s := x7.Aux
 17235  		_ = x7.Args[1]
 17236  		p := x7.Args[0]
 17237  		mem := x7.Args[1]
 17238  		o5 := v.Args[1]
 17239  		if o5.Op != OpPPC64OR {
 17240  			break
 17241  		}
 17242  		if o5.Type != t {
 17243  			break
 17244  		}
 17245  		_ = o5.Args[1]
 17246  		o4 := o5.Args[0]
 17247  		if o4.Op != OpPPC64OR {
 17248  			break
 17249  		}
 17250  		if o4.Type != t {
 17251  			break
 17252  		}
 17253  		_ = o4.Args[1]
 17254  		s4 := o4.Args[0]
 17255  		if s4.Op != OpPPC64SLDconst {
 17256  			break
 17257  		}
 17258  		if s4.AuxInt != 40 {
 17259  			break
 17260  		}
 17261  		x5 := s4.Args[0]
 17262  		if x5.Op != OpPPC64MOVBZload {
 17263  			break
 17264  		}
 17265  		i5 := x5.AuxInt
 17266  		if x5.Aux != s {
 17267  			break
 17268  		}
 17269  		_ = x5.Args[1]
 17270  		if p != x5.Args[0] {
 17271  			break
 17272  		}
 17273  		if mem != x5.Args[1] {
 17274  			break
 17275  		}
 17276  		o3 := o4.Args[1]
 17277  		if o3.Op != OpPPC64OR {
 17278  			break
 17279  		}
 17280  		if o3.Type != t {
 17281  			break
 17282  		}
 17283  		_ = o3.Args[1]
 17284  		s3 := o3.Args[0]
 17285  		if s3.Op != OpPPC64SLDconst {
 17286  			break
 17287  		}
 17288  		if s3.AuxInt != 32 {
 17289  			break
 17290  		}
 17291  		x4 := s3.Args[0]
 17292  		if x4.Op != OpPPC64MOVBZload {
 17293  			break
 17294  		}
 17295  		i4 := x4.AuxInt
 17296  		if x4.Aux != s {
 17297  			break
 17298  		}
 17299  		_ = x4.Args[1]
 17300  		if p != x4.Args[0] {
 17301  			break
 17302  		}
 17303  		if mem != x4.Args[1] {
 17304  			break
 17305  		}
 17306  		o2 := o3.Args[1]
 17307  		if o2.Op != OpPPC64OR {
 17308  			break
 17309  		}
 17310  		if o2.Type != t {
 17311  			break
 17312  		}
 17313  		_ = o2.Args[1]
 17314  		s2 := o2.Args[0]
 17315  		if s2.Op != OpPPC64SLDconst {
 17316  			break
 17317  		}
 17318  		if s2.AuxInt != 24 {
 17319  			break
 17320  		}
 17321  		x3 := s2.Args[0]
 17322  		if x3.Op != OpPPC64MOVBZload {
 17323  			break
 17324  		}
 17325  		i3 := x3.AuxInt
 17326  		if x3.Aux != s {
 17327  			break
 17328  		}
 17329  		_ = x3.Args[1]
 17330  		if p != x3.Args[0] {
 17331  			break
 17332  		}
 17333  		if mem != x3.Args[1] {
 17334  			break
 17335  		}
 17336  		o1 := o2.Args[1]
 17337  		if o1.Op != OpPPC64OR {
 17338  			break
 17339  		}
 17340  		if o1.Type != t {
 17341  			break
 17342  		}
 17343  		_ = o1.Args[1]
 17344  		s1 := o1.Args[0]
 17345  		if s1.Op != OpPPC64SLDconst {
 17346  			break
 17347  		}
 17348  		if s1.AuxInt != 16 {
 17349  			break
 17350  		}
 17351  		x2 := s1.Args[0]
 17352  		if x2.Op != OpPPC64MOVBZload {
 17353  			break
 17354  		}
 17355  		i2 := x2.AuxInt
 17356  		if x2.Aux != s {
 17357  			break
 17358  		}
 17359  		_ = x2.Args[1]
 17360  		if p != x2.Args[0] {
 17361  			break
 17362  		}
 17363  		if mem != x2.Args[1] {
 17364  			break
 17365  		}
 17366  		o0 := o1.Args[1]
 17367  		if o0.Op != OpPPC64OR {
 17368  			break
 17369  		}
 17370  		if o0.Type != t {
 17371  			break
 17372  		}
 17373  		_ = o0.Args[1]
 17374  		s0 := o0.Args[0]
 17375  		if s0.Op != OpPPC64SLDconst {
 17376  			break
 17377  		}
 17378  		if s0.AuxInt != 8 {
 17379  			break
 17380  		}
 17381  		x1 := s0.Args[0]
 17382  		if x1.Op != OpPPC64MOVBZload {
 17383  			break
 17384  		}
 17385  		i1 := x1.AuxInt
 17386  		if x1.Aux != s {
 17387  			break
 17388  		}
 17389  		_ = x1.Args[1]
 17390  		if p != x1.Args[0] {
 17391  			break
 17392  		}
 17393  		if mem != x1.Args[1] {
 17394  			break
 17395  		}
 17396  		x0 := o0.Args[1]
 17397  		if x0.Op != OpPPC64MOVBZload {
 17398  			break
 17399  		}
 17400  		i0 := x0.AuxInt
 17401  		if x0.Aux != s {
 17402  			break
 17403  		}
 17404  		_ = x0.Args[1]
 17405  		if p != x0.Args[0] {
 17406  			break
 17407  		}
 17408  		if mem != x0.Args[1] {
 17409  			break
 17410  		}
 17411  		s5 := o5.Args[1]
 17412  		if s5.Op != OpPPC64SLDconst {
 17413  			break
 17414  		}
 17415  		if s5.AuxInt != 48 {
 17416  			break
 17417  		}
 17418  		x6 := s5.Args[0]
 17419  		if x6.Op != OpPPC64MOVBZload {
 17420  			break
 17421  		}
 17422  		i6 := x6.AuxInt
 17423  		if x6.Aux != s {
 17424  			break
 17425  		}
 17426  		_ = x6.Args[1]
 17427  		if p != x6.Args[0] {
 17428  			break
 17429  		}
 17430  		if mem != x6.Args[1] {
 17431  			break
 17432  		}
 17433  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17434  			break
 17435  		}
 17436  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 17437  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17438  		v.reset(OpCopy)
 17439  		v.AddArg(v0)
 17440  		v0.AuxInt = i0
 17441  		v0.Aux = s
 17442  		v0.AddArg(p)
 17443  		v0.AddArg(mem)
 17444  		return true
 17445  	}
 17446  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17447  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 17448  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17449  	for {
 17450  		t := v.Type
 17451  		_ = v.Args[1]
 17452  		s6 := v.Args[0]
 17453  		if s6.Op != OpPPC64SLDconst {
 17454  			break
 17455  		}
 17456  		if s6.AuxInt != 56 {
 17457  			break
 17458  		}
 17459  		x7 := s6.Args[0]
 17460  		if x7.Op != OpPPC64MOVBZload {
 17461  			break
 17462  		}
 17463  		i7 := x7.AuxInt
 17464  		s := x7.Aux
 17465  		_ = x7.Args[1]
 17466  		p := x7.Args[0]
 17467  		mem := x7.Args[1]
 17468  		o5 := v.Args[1]
 17469  		if o5.Op != OpPPC64OR {
 17470  			break
 17471  		}
 17472  		if o5.Type != t {
 17473  			break
 17474  		}
 17475  		_ = o5.Args[1]
 17476  		o4 := o5.Args[0]
 17477  		if o4.Op != OpPPC64OR {
 17478  			break
 17479  		}
 17480  		if o4.Type != t {
 17481  			break
 17482  		}
 17483  		_ = o4.Args[1]
 17484  		s4 := o4.Args[0]
 17485  		if s4.Op != OpPPC64SLDconst {
 17486  			break
 17487  		}
 17488  		if s4.AuxInt != 40 {
 17489  			break
 17490  		}
 17491  		x5 := s4.Args[0]
 17492  		if x5.Op != OpPPC64MOVBZload {
 17493  			break
 17494  		}
 17495  		i5 := x5.AuxInt
 17496  		if x5.Aux != s {
 17497  			break
 17498  		}
 17499  		_ = x5.Args[1]
 17500  		if p != x5.Args[0] {
 17501  			break
 17502  		}
 17503  		if mem != x5.Args[1] {
 17504  			break
 17505  		}
 17506  		o3 := o4.Args[1]
 17507  		if o3.Op != OpPPC64OR {
 17508  			break
 17509  		}
 17510  		if o3.Type != t {
 17511  			break
 17512  		}
 17513  		_ = o3.Args[1]
 17514  		s3 := o3.Args[0]
 17515  		if s3.Op != OpPPC64SLDconst {
 17516  			break
 17517  		}
 17518  		if s3.AuxInt != 32 {
 17519  			break
 17520  		}
 17521  		x4 := s3.Args[0]
 17522  		if x4.Op != OpPPC64MOVBZload {
 17523  			break
 17524  		}
 17525  		i4 := x4.AuxInt
 17526  		if x4.Aux != s {
 17527  			break
 17528  		}
 17529  		_ = x4.Args[1]
 17530  		if p != x4.Args[0] {
 17531  			break
 17532  		}
 17533  		if mem != x4.Args[1] {
 17534  			break
 17535  		}
 17536  		o2 := o3.Args[1]
 17537  		if o2.Op != OpPPC64OR {
 17538  			break
 17539  		}
 17540  		if o2.Type != t {
 17541  			break
 17542  		}
 17543  		_ = o2.Args[1]
 17544  		s2 := o2.Args[0]
 17545  		if s2.Op != OpPPC64SLDconst {
 17546  			break
 17547  		}
 17548  		if s2.AuxInt != 24 {
 17549  			break
 17550  		}
 17551  		x3 := s2.Args[0]
 17552  		if x3.Op != OpPPC64MOVBZload {
 17553  			break
 17554  		}
 17555  		i3 := x3.AuxInt
 17556  		if x3.Aux != s {
 17557  			break
 17558  		}
 17559  		_ = x3.Args[1]
 17560  		if p != x3.Args[0] {
 17561  			break
 17562  		}
 17563  		if mem != x3.Args[1] {
 17564  			break
 17565  		}
 17566  		o1 := o2.Args[1]
 17567  		if o1.Op != OpPPC64OR {
 17568  			break
 17569  		}
 17570  		if o1.Type != t {
 17571  			break
 17572  		}
 17573  		_ = o1.Args[1]
 17574  		s1 := o1.Args[0]
 17575  		if s1.Op != OpPPC64SLDconst {
 17576  			break
 17577  		}
 17578  		if s1.AuxInt != 16 {
 17579  			break
 17580  		}
 17581  		x2 := s1.Args[0]
 17582  		if x2.Op != OpPPC64MOVBZload {
 17583  			break
 17584  		}
 17585  		i2 := x2.AuxInt
 17586  		if x2.Aux != s {
 17587  			break
 17588  		}
 17589  		_ = x2.Args[1]
 17590  		if p != x2.Args[0] {
 17591  			break
 17592  		}
 17593  		if mem != x2.Args[1] {
 17594  			break
 17595  		}
 17596  		o0 := o1.Args[1]
 17597  		if o0.Op != OpPPC64OR {
 17598  			break
 17599  		}
 17600  		if o0.Type != t {
 17601  			break
 17602  		}
 17603  		_ = o0.Args[1]
 17604  		x0 := o0.Args[0]
 17605  		if x0.Op != OpPPC64MOVBZload {
 17606  			break
 17607  		}
 17608  		i0 := x0.AuxInt
 17609  		if x0.Aux != s {
 17610  			break
 17611  		}
 17612  		_ = x0.Args[1]
 17613  		if p != x0.Args[0] {
 17614  			break
 17615  		}
 17616  		if mem != x0.Args[1] {
 17617  			break
 17618  		}
 17619  		s0 := o0.Args[1]
 17620  		if s0.Op != OpPPC64SLDconst {
 17621  			break
 17622  		}
 17623  		if s0.AuxInt != 8 {
 17624  			break
 17625  		}
 17626  		x1 := s0.Args[0]
 17627  		if x1.Op != OpPPC64MOVBZload {
 17628  			break
 17629  		}
 17630  		i1 := x1.AuxInt
 17631  		if x1.Aux != s {
 17632  			break
 17633  		}
 17634  		_ = x1.Args[1]
 17635  		if p != x1.Args[0] {
 17636  			break
 17637  		}
 17638  		if mem != x1.Args[1] {
 17639  			break
 17640  		}
 17641  		s5 := o5.Args[1]
 17642  		if s5.Op != OpPPC64SLDconst {
 17643  			break
 17644  		}
 17645  		if s5.AuxInt != 48 {
 17646  			break
 17647  		}
 17648  		x6 := s5.Args[0]
 17649  		if x6.Op != OpPPC64MOVBZload {
 17650  			break
 17651  		}
 17652  		i6 := x6.AuxInt
 17653  		if x6.Aux != s {
 17654  			break
 17655  		}
 17656  		_ = x6.Args[1]
 17657  		if p != x6.Args[0] {
 17658  			break
 17659  		}
 17660  		if mem != x6.Args[1] {
 17661  			break
 17662  		}
 17663  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17664  			break
 17665  		}
 17666  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 17667  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17668  		v.reset(OpCopy)
 17669  		v.AddArg(v0)
 17670  		v0.AuxInt = i0
 17671  		v0.Aux = s
 17672  		v0.AddArg(p)
 17673  		v0.AddArg(mem)
 17674  		return true
 17675  	}
 17676  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17677  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 17678  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17679  	for {
 17680  		t := v.Type
 17681  		_ = v.Args[1]
 17682  		s6 := v.Args[0]
 17683  		if s6.Op != OpPPC64SLDconst {
 17684  			break
 17685  		}
 17686  		if s6.AuxInt != 56 {
 17687  			break
 17688  		}
 17689  		x7 := s6.Args[0]
 17690  		if x7.Op != OpPPC64MOVBZload {
 17691  			break
 17692  		}
 17693  		i7 := x7.AuxInt
 17694  		s := x7.Aux
 17695  		_ = x7.Args[1]
 17696  		p := x7.Args[0]
 17697  		mem := x7.Args[1]
 17698  		o5 := v.Args[1]
 17699  		if o5.Op != OpPPC64OR {
 17700  			break
 17701  		}
 17702  		if o5.Type != t {
 17703  			break
 17704  		}
 17705  		_ = o5.Args[1]
 17706  		o4 := o5.Args[0]
 17707  		if o4.Op != OpPPC64OR {
 17708  			break
 17709  		}
 17710  		if o4.Type != t {
 17711  			break
 17712  		}
 17713  		_ = o4.Args[1]
 17714  		s4 := o4.Args[0]
 17715  		if s4.Op != OpPPC64SLDconst {
 17716  			break
 17717  		}
 17718  		if s4.AuxInt != 40 {
 17719  			break
 17720  		}
 17721  		x5 := s4.Args[0]
 17722  		if x5.Op != OpPPC64MOVBZload {
 17723  			break
 17724  		}
 17725  		i5 := x5.AuxInt
 17726  		if x5.Aux != s {
 17727  			break
 17728  		}
 17729  		_ = x5.Args[1]
 17730  		if p != x5.Args[0] {
 17731  			break
 17732  		}
 17733  		if mem != x5.Args[1] {
 17734  			break
 17735  		}
 17736  		o3 := o4.Args[1]
 17737  		if o3.Op != OpPPC64OR {
 17738  			break
 17739  		}
 17740  		if o3.Type != t {
 17741  			break
 17742  		}
 17743  		_ = o3.Args[1]
 17744  		s3 := o3.Args[0]
 17745  		if s3.Op != OpPPC64SLDconst {
 17746  			break
 17747  		}
 17748  		if s3.AuxInt != 32 {
 17749  			break
 17750  		}
 17751  		x4 := s3.Args[0]
 17752  		if x4.Op != OpPPC64MOVBZload {
 17753  			break
 17754  		}
 17755  		i4 := x4.AuxInt
 17756  		if x4.Aux != s {
 17757  			break
 17758  		}
 17759  		_ = x4.Args[1]
 17760  		if p != x4.Args[0] {
 17761  			break
 17762  		}
 17763  		if mem != x4.Args[1] {
 17764  			break
 17765  		}
 17766  		o2 := o3.Args[1]
 17767  		if o2.Op != OpPPC64OR {
 17768  			break
 17769  		}
 17770  		if o2.Type != t {
 17771  			break
 17772  		}
 17773  		_ = o2.Args[1]
 17774  		s2 := o2.Args[0]
 17775  		if s2.Op != OpPPC64SLDconst {
 17776  			break
 17777  		}
 17778  		if s2.AuxInt != 24 {
 17779  			break
 17780  		}
 17781  		x3 := s2.Args[0]
 17782  		if x3.Op != OpPPC64MOVBZload {
 17783  			break
 17784  		}
 17785  		i3 := x3.AuxInt
 17786  		if x3.Aux != s {
 17787  			break
 17788  		}
 17789  		_ = x3.Args[1]
 17790  		if p != x3.Args[0] {
 17791  			break
 17792  		}
 17793  		if mem != x3.Args[1] {
 17794  			break
 17795  		}
 17796  		o1 := o2.Args[1]
 17797  		if o1.Op != OpPPC64OR {
 17798  			break
 17799  		}
 17800  		if o1.Type != t {
 17801  			break
 17802  		}
 17803  		_ = o1.Args[1]
 17804  		o0 := o1.Args[0]
 17805  		if o0.Op != OpPPC64OR {
 17806  			break
 17807  		}
 17808  		if o0.Type != t {
 17809  			break
 17810  		}
 17811  		_ = o0.Args[1]
 17812  		s0 := o0.Args[0]
 17813  		if s0.Op != OpPPC64SLDconst {
 17814  			break
 17815  		}
 17816  		if s0.AuxInt != 8 {
 17817  			break
 17818  		}
 17819  		x1 := s0.Args[0]
 17820  		if x1.Op != OpPPC64MOVBZload {
 17821  			break
 17822  		}
 17823  		i1 := x1.AuxInt
 17824  		if x1.Aux != s {
 17825  			break
 17826  		}
 17827  		_ = x1.Args[1]
 17828  		if p != x1.Args[0] {
 17829  			break
 17830  		}
 17831  		if mem != x1.Args[1] {
 17832  			break
 17833  		}
 17834  		x0 := o0.Args[1]
 17835  		if x0.Op != OpPPC64MOVBZload {
 17836  			break
 17837  		}
 17838  		i0 := x0.AuxInt
 17839  		if x0.Aux != s {
 17840  			break
 17841  		}
 17842  		_ = x0.Args[1]
 17843  		if p != x0.Args[0] {
 17844  			break
 17845  		}
 17846  		if mem != x0.Args[1] {
 17847  			break
 17848  		}
 17849  		s1 := o1.Args[1]
 17850  		if s1.Op != OpPPC64SLDconst {
 17851  			break
 17852  		}
 17853  		if s1.AuxInt != 16 {
 17854  			break
 17855  		}
 17856  		x2 := s1.Args[0]
 17857  		if x2.Op != OpPPC64MOVBZload {
 17858  			break
 17859  		}
 17860  		i2 := x2.AuxInt
 17861  		if x2.Aux != s {
 17862  			break
 17863  		}
 17864  		_ = x2.Args[1]
 17865  		if p != x2.Args[0] {
 17866  			break
 17867  		}
 17868  		if mem != x2.Args[1] {
 17869  			break
 17870  		}
 17871  		s5 := o5.Args[1]
 17872  		if s5.Op != OpPPC64SLDconst {
 17873  			break
 17874  		}
 17875  		if s5.AuxInt != 48 {
 17876  			break
 17877  		}
 17878  		x6 := s5.Args[0]
 17879  		if x6.Op != OpPPC64MOVBZload {
 17880  			break
 17881  		}
 17882  		i6 := x6.AuxInt
 17883  		if x6.Aux != s {
 17884  			break
 17885  		}
 17886  		_ = x6.Args[1]
 17887  		if p != x6.Args[0] {
 17888  			break
 17889  		}
 17890  		if mem != x6.Args[1] {
 17891  			break
 17892  		}
 17893  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 17894  			break
 17895  		}
 17896  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 17897  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 17898  		v.reset(OpCopy)
 17899  		v.AddArg(v0)
 17900  		v0.AuxInt = i0
 17901  		v0.Aux = s
 17902  		v0.AddArg(p)
 17903  		v0.AddArg(mem)
 17904  		return true
 17905  	}
 17906  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 17907  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 17908  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 17909  	for {
 17910  		t := v.Type
 17911  		_ = v.Args[1]
 17912  		s6 := v.Args[0]
 17913  		if s6.Op != OpPPC64SLDconst {
 17914  			break
 17915  		}
 17916  		if s6.AuxInt != 56 {
 17917  			break
 17918  		}
 17919  		x7 := s6.Args[0]
 17920  		if x7.Op != OpPPC64MOVBZload {
 17921  			break
 17922  		}
 17923  		i7 := x7.AuxInt
 17924  		s := x7.Aux
 17925  		_ = x7.Args[1]
 17926  		p := x7.Args[0]
 17927  		mem := x7.Args[1]
 17928  		o5 := v.Args[1]
 17929  		if o5.Op != OpPPC64OR {
 17930  			break
 17931  		}
 17932  		if o5.Type != t {
 17933  			break
 17934  		}
 17935  		_ = o5.Args[1]
 17936  		o4 := o5.Args[0]
 17937  		if o4.Op != OpPPC64OR {
 17938  			break
 17939  		}
 17940  		if o4.Type != t {
 17941  			break
 17942  		}
 17943  		_ = o4.Args[1]
 17944  		s4 := o4.Args[0]
 17945  		if s4.Op != OpPPC64SLDconst {
 17946  			break
 17947  		}
 17948  		if s4.AuxInt != 40 {
 17949  			break
 17950  		}
 17951  		x5 := s4.Args[0]
 17952  		if x5.Op != OpPPC64MOVBZload {
 17953  			break
 17954  		}
 17955  		i5 := x5.AuxInt
 17956  		if x5.Aux != s {
 17957  			break
 17958  		}
 17959  		_ = x5.Args[1]
 17960  		if p != x5.Args[0] {
 17961  			break
 17962  		}
 17963  		if mem != x5.Args[1] {
 17964  			break
 17965  		}
 17966  		o3 := o4.Args[1]
 17967  		if o3.Op != OpPPC64OR {
 17968  			break
 17969  		}
 17970  		if o3.Type != t {
 17971  			break
 17972  		}
 17973  		_ = o3.Args[1]
 17974  		s3 := o3.Args[0]
 17975  		if s3.Op != OpPPC64SLDconst {
 17976  			break
 17977  		}
 17978  		if s3.AuxInt != 32 {
 17979  			break
 17980  		}
 17981  		x4 := s3.Args[0]
 17982  		if x4.Op != OpPPC64MOVBZload {
 17983  			break
 17984  		}
 17985  		i4 := x4.AuxInt
 17986  		if x4.Aux != s {
 17987  			break
 17988  		}
 17989  		_ = x4.Args[1]
 17990  		if p != x4.Args[0] {
 17991  			break
 17992  		}
 17993  		if mem != x4.Args[1] {
 17994  			break
 17995  		}
 17996  		o2 := o3.Args[1]
 17997  		if o2.Op != OpPPC64OR {
 17998  			break
 17999  		}
 18000  		if o2.Type != t {
 18001  			break
 18002  		}
 18003  		_ = o2.Args[1]
 18004  		s2 := o2.Args[0]
 18005  		if s2.Op != OpPPC64SLDconst {
 18006  			break
 18007  		}
 18008  		if s2.AuxInt != 24 {
 18009  			break
 18010  		}
 18011  		x3 := s2.Args[0]
 18012  		if x3.Op != OpPPC64MOVBZload {
 18013  			break
 18014  		}
 18015  		i3 := x3.AuxInt
 18016  		if x3.Aux != s {
 18017  			break
 18018  		}
 18019  		_ = x3.Args[1]
 18020  		if p != x3.Args[0] {
 18021  			break
 18022  		}
 18023  		if mem != x3.Args[1] {
 18024  			break
 18025  		}
 18026  		o1 := o2.Args[1]
 18027  		if o1.Op != OpPPC64OR {
 18028  			break
 18029  		}
 18030  		if o1.Type != t {
 18031  			break
 18032  		}
 18033  		_ = o1.Args[1]
 18034  		o0 := o1.Args[0]
 18035  		if o0.Op != OpPPC64OR {
 18036  			break
 18037  		}
 18038  		if o0.Type != t {
 18039  			break
 18040  		}
 18041  		_ = o0.Args[1]
 18042  		x0 := o0.Args[0]
 18043  		if x0.Op != OpPPC64MOVBZload {
 18044  			break
 18045  		}
 18046  		i0 := x0.AuxInt
 18047  		if x0.Aux != s {
 18048  			break
 18049  		}
 18050  		_ = x0.Args[1]
 18051  		if p != x0.Args[0] {
 18052  			break
 18053  		}
 18054  		if mem != x0.Args[1] {
 18055  			break
 18056  		}
 18057  		s0 := o0.Args[1]
 18058  		if s0.Op != OpPPC64SLDconst {
 18059  			break
 18060  		}
 18061  		if s0.AuxInt != 8 {
 18062  			break
 18063  		}
 18064  		x1 := s0.Args[0]
 18065  		if x1.Op != OpPPC64MOVBZload {
 18066  			break
 18067  		}
 18068  		i1 := x1.AuxInt
 18069  		if x1.Aux != s {
 18070  			break
 18071  		}
 18072  		_ = x1.Args[1]
 18073  		if p != x1.Args[0] {
 18074  			break
 18075  		}
 18076  		if mem != x1.Args[1] {
 18077  			break
 18078  		}
 18079  		s1 := o1.Args[1]
 18080  		if s1.Op != OpPPC64SLDconst {
 18081  			break
 18082  		}
 18083  		if s1.AuxInt != 16 {
 18084  			break
 18085  		}
 18086  		x2 := s1.Args[0]
 18087  		if x2.Op != OpPPC64MOVBZload {
 18088  			break
 18089  		}
 18090  		i2 := x2.AuxInt
 18091  		if x2.Aux != s {
 18092  			break
 18093  		}
 18094  		_ = x2.Args[1]
 18095  		if p != x2.Args[0] {
 18096  			break
 18097  		}
 18098  		if mem != x2.Args[1] {
 18099  			break
 18100  		}
 18101  		s5 := o5.Args[1]
 18102  		if s5.Op != OpPPC64SLDconst {
 18103  			break
 18104  		}
 18105  		if s5.AuxInt != 48 {
 18106  			break
 18107  		}
 18108  		x6 := s5.Args[0]
 18109  		if x6.Op != OpPPC64MOVBZload {
 18110  			break
 18111  		}
 18112  		i6 := x6.AuxInt
 18113  		if x6.Aux != s {
 18114  			break
 18115  		}
 18116  		_ = x6.Args[1]
 18117  		if p != x6.Args[0] {
 18118  			break
 18119  		}
 18120  		if mem != x6.Args[1] {
 18121  			break
 18122  		}
 18123  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18124  			break
 18125  		}
 18126  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 18127  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18128  		v.reset(OpCopy)
 18129  		v.AddArg(v0)
 18130  		v0.AuxInt = i0
 18131  		v0.Aux = s
 18132  		v0.AddArg(p)
 18133  		v0.AddArg(mem)
 18134  		return true
 18135  	}
 18136  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 18137  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 18138  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18139  	for {
 18140  		t := v.Type
 18141  		_ = v.Args[1]
 18142  		s6 := v.Args[0]
 18143  		if s6.Op != OpPPC64SLDconst {
 18144  			break
 18145  		}
 18146  		if s6.AuxInt != 56 {
 18147  			break
 18148  		}
 18149  		x7 := s6.Args[0]
 18150  		if x7.Op != OpPPC64MOVBZload {
 18151  			break
 18152  		}
 18153  		i7 := x7.AuxInt
 18154  		s := x7.Aux
 18155  		_ = x7.Args[1]
 18156  		p := x7.Args[0]
 18157  		mem := x7.Args[1]
 18158  		o5 := v.Args[1]
 18159  		if o5.Op != OpPPC64OR {
 18160  			break
 18161  		}
 18162  		if o5.Type != t {
 18163  			break
 18164  		}
 18165  		_ = o5.Args[1]
 18166  		o4 := o5.Args[0]
 18167  		if o4.Op != OpPPC64OR {
 18168  			break
 18169  		}
 18170  		if o4.Type != t {
 18171  			break
 18172  		}
 18173  		_ = o4.Args[1]
 18174  		s4 := o4.Args[0]
 18175  		if s4.Op != OpPPC64SLDconst {
 18176  			break
 18177  		}
 18178  		if s4.AuxInt != 40 {
 18179  			break
 18180  		}
 18181  		x5 := s4.Args[0]
 18182  		if x5.Op != OpPPC64MOVBZload {
 18183  			break
 18184  		}
 18185  		i5 := x5.AuxInt
 18186  		if x5.Aux != s {
 18187  			break
 18188  		}
 18189  		_ = x5.Args[1]
 18190  		if p != x5.Args[0] {
 18191  			break
 18192  		}
 18193  		if mem != x5.Args[1] {
 18194  			break
 18195  		}
 18196  		o3 := o4.Args[1]
 18197  		if o3.Op != OpPPC64OR {
 18198  			break
 18199  		}
 18200  		if o3.Type != t {
 18201  			break
 18202  		}
 18203  		_ = o3.Args[1]
 18204  		s3 := o3.Args[0]
 18205  		if s3.Op != OpPPC64SLDconst {
 18206  			break
 18207  		}
 18208  		if s3.AuxInt != 32 {
 18209  			break
 18210  		}
 18211  		x4 := s3.Args[0]
 18212  		if x4.Op != OpPPC64MOVBZload {
 18213  			break
 18214  		}
 18215  		i4 := x4.AuxInt
 18216  		if x4.Aux != s {
 18217  			break
 18218  		}
 18219  		_ = x4.Args[1]
 18220  		if p != x4.Args[0] {
 18221  			break
 18222  		}
 18223  		if mem != x4.Args[1] {
 18224  			break
 18225  		}
 18226  		o2 := o3.Args[1]
 18227  		if o2.Op != OpPPC64OR {
 18228  			break
 18229  		}
 18230  		if o2.Type != t {
 18231  			break
 18232  		}
 18233  		_ = o2.Args[1]
 18234  		o1 := o2.Args[0]
 18235  		if o1.Op != OpPPC64OR {
 18236  			break
 18237  		}
 18238  		if o1.Type != t {
 18239  			break
 18240  		}
 18241  		_ = o1.Args[1]
 18242  		s1 := o1.Args[0]
 18243  		if s1.Op != OpPPC64SLDconst {
 18244  			break
 18245  		}
 18246  		if s1.AuxInt != 16 {
 18247  			break
 18248  		}
 18249  		x2 := s1.Args[0]
 18250  		if x2.Op != OpPPC64MOVBZload {
 18251  			break
 18252  		}
 18253  		i2 := x2.AuxInt
 18254  		if x2.Aux != s {
 18255  			break
 18256  		}
 18257  		_ = x2.Args[1]
 18258  		if p != x2.Args[0] {
 18259  			break
 18260  		}
 18261  		if mem != x2.Args[1] {
 18262  			break
 18263  		}
 18264  		o0 := o1.Args[1]
 18265  		if o0.Op != OpPPC64OR {
 18266  			break
 18267  		}
 18268  		if o0.Type != t {
 18269  			break
 18270  		}
 18271  		_ = o0.Args[1]
 18272  		s0 := o0.Args[0]
 18273  		if s0.Op != OpPPC64SLDconst {
 18274  			break
 18275  		}
 18276  		if s0.AuxInt != 8 {
 18277  			break
 18278  		}
 18279  		x1 := s0.Args[0]
 18280  		if x1.Op != OpPPC64MOVBZload {
 18281  			break
 18282  		}
 18283  		i1 := x1.AuxInt
 18284  		if x1.Aux != s {
 18285  			break
 18286  		}
 18287  		_ = x1.Args[1]
 18288  		if p != x1.Args[0] {
 18289  			break
 18290  		}
 18291  		if mem != x1.Args[1] {
 18292  			break
 18293  		}
 18294  		x0 := o0.Args[1]
 18295  		if x0.Op != OpPPC64MOVBZload {
 18296  			break
 18297  		}
 18298  		i0 := x0.AuxInt
 18299  		if x0.Aux != s {
 18300  			break
 18301  		}
 18302  		_ = x0.Args[1]
 18303  		if p != x0.Args[0] {
 18304  			break
 18305  		}
 18306  		if mem != x0.Args[1] {
 18307  			break
 18308  		}
 18309  		s2 := o2.Args[1]
 18310  		if s2.Op != OpPPC64SLDconst {
 18311  			break
 18312  		}
 18313  		if s2.AuxInt != 24 {
 18314  			break
 18315  		}
 18316  		x3 := s2.Args[0]
 18317  		if x3.Op != OpPPC64MOVBZload {
 18318  			break
 18319  		}
 18320  		i3 := x3.AuxInt
 18321  		if x3.Aux != s {
 18322  			break
 18323  		}
 18324  		_ = x3.Args[1]
 18325  		if p != x3.Args[0] {
 18326  			break
 18327  		}
 18328  		if mem != x3.Args[1] {
 18329  			break
 18330  		}
 18331  		s5 := o5.Args[1]
 18332  		if s5.Op != OpPPC64SLDconst {
 18333  			break
 18334  		}
 18335  		if s5.AuxInt != 48 {
 18336  			break
 18337  		}
 18338  		x6 := s5.Args[0]
 18339  		if x6.Op != OpPPC64MOVBZload {
 18340  			break
 18341  		}
 18342  		i6 := x6.AuxInt
 18343  		if x6.Aux != s {
 18344  			break
 18345  		}
 18346  		_ = x6.Args[1]
 18347  		if p != x6.Args[0] {
 18348  			break
 18349  		}
 18350  		if mem != x6.Args[1] {
 18351  			break
 18352  		}
 18353  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18354  			break
 18355  		}
 18356  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 18357  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18358  		v.reset(OpCopy)
 18359  		v.AddArg(v0)
 18360  		v0.AuxInt = i0
 18361  		v0.Aux = s
 18362  		v0.AddArg(p)
 18363  		v0.AddArg(mem)
 18364  		return true
 18365  	}
 18366  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 18367  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 18368  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18369  	for {
 18370  		t := v.Type
 18371  		_ = v.Args[1]
 18372  		s6 := v.Args[0]
 18373  		if s6.Op != OpPPC64SLDconst {
 18374  			break
 18375  		}
 18376  		if s6.AuxInt != 56 {
 18377  			break
 18378  		}
 18379  		x7 := s6.Args[0]
 18380  		if x7.Op != OpPPC64MOVBZload {
 18381  			break
 18382  		}
 18383  		i7 := x7.AuxInt
 18384  		s := x7.Aux
 18385  		_ = x7.Args[1]
 18386  		p := x7.Args[0]
 18387  		mem := x7.Args[1]
 18388  		o5 := v.Args[1]
 18389  		if o5.Op != OpPPC64OR {
 18390  			break
 18391  		}
 18392  		if o5.Type != t {
 18393  			break
 18394  		}
 18395  		_ = o5.Args[1]
 18396  		o4 := o5.Args[0]
 18397  		if o4.Op != OpPPC64OR {
 18398  			break
 18399  		}
 18400  		if o4.Type != t {
 18401  			break
 18402  		}
 18403  		_ = o4.Args[1]
 18404  		s4 := o4.Args[0]
 18405  		if s4.Op != OpPPC64SLDconst {
 18406  			break
 18407  		}
 18408  		if s4.AuxInt != 40 {
 18409  			break
 18410  		}
 18411  		x5 := s4.Args[0]
 18412  		if x5.Op != OpPPC64MOVBZload {
 18413  			break
 18414  		}
 18415  		i5 := x5.AuxInt
 18416  		if x5.Aux != s {
 18417  			break
 18418  		}
 18419  		_ = x5.Args[1]
 18420  		if p != x5.Args[0] {
 18421  			break
 18422  		}
 18423  		if mem != x5.Args[1] {
 18424  			break
 18425  		}
 18426  		o3 := o4.Args[1]
 18427  		if o3.Op != OpPPC64OR {
 18428  			break
 18429  		}
 18430  		if o3.Type != t {
 18431  			break
 18432  		}
 18433  		_ = o3.Args[1]
 18434  		s3 := o3.Args[0]
 18435  		if s3.Op != OpPPC64SLDconst {
 18436  			break
 18437  		}
 18438  		if s3.AuxInt != 32 {
 18439  			break
 18440  		}
 18441  		x4 := s3.Args[0]
 18442  		if x4.Op != OpPPC64MOVBZload {
 18443  			break
 18444  		}
 18445  		i4 := x4.AuxInt
 18446  		if x4.Aux != s {
 18447  			break
 18448  		}
 18449  		_ = x4.Args[1]
 18450  		if p != x4.Args[0] {
 18451  			break
 18452  		}
 18453  		if mem != x4.Args[1] {
 18454  			break
 18455  		}
 18456  		o2 := o3.Args[1]
 18457  		if o2.Op != OpPPC64OR {
 18458  			break
 18459  		}
 18460  		if o2.Type != t {
 18461  			break
 18462  		}
 18463  		_ = o2.Args[1]
 18464  		o1 := o2.Args[0]
 18465  		if o1.Op != OpPPC64OR {
 18466  			break
 18467  		}
 18468  		if o1.Type != t {
 18469  			break
 18470  		}
 18471  		_ = o1.Args[1]
 18472  		s1 := o1.Args[0]
 18473  		if s1.Op != OpPPC64SLDconst {
 18474  			break
 18475  		}
 18476  		if s1.AuxInt != 16 {
 18477  			break
 18478  		}
 18479  		x2 := s1.Args[0]
 18480  		if x2.Op != OpPPC64MOVBZload {
 18481  			break
 18482  		}
 18483  		i2 := x2.AuxInt
 18484  		if x2.Aux != s {
 18485  			break
 18486  		}
 18487  		_ = x2.Args[1]
 18488  		if p != x2.Args[0] {
 18489  			break
 18490  		}
 18491  		if mem != x2.Args[1] {
 18492  			break
 18493  		}
 18494  		o0 := o1.Args[1]
 18495  		if o0.Op != OpPPC64OR {
 18496  			break
 18497  		}
 18498  		if o0.Type != t {
 18499  			break
 18500  		}
 18501  		_ = o0.Args[1]
 18502  		x0 := o0.Args[0]
 18503  		if x0.Op != OpPPC64MOVBZload {
 18504  			break
 18505  		}
 18506  		i0 := x0.AuxInt
 18507  		if x0.Aux != s {
 18508  			break
 18509  		}
 18510  		_ = x0.Args[1]
 18511  		if p != x0.Args[0] {
 18512  			break
 18513  		}
 18514  		if mem != x0.Args[1] {
 18515  			break
 18516  		}
 18517  		s0 := o0.Args[1]
 18518  		if s0.Op != OpPPC64SLDconst {
 18519  			break
 18520  		}
 18521  		if s0.AuxInt != 8 {
 18522  			break
 18523  		}
 18524  		x1 := s0.Args[0]
 18525  		if x1.Op != OpPPC64MOVBZload {
 18526  			break
 18527  		}
 18528  		i1 := x1.AuxInt
 18529  		if x1.Aux != s {
 18530  			break
 18531  		}
 18532  		_ = x1.Args[1]
 18533  		if p != x1.Args[0] {
 18534  			break
 18535  		}
 18536  		if mem != x1.Args[1] {
 18537  			break
 18538  		}
 18539  		s2 := o2.Args[1]
 18540  		if s2.Op != OpPPC64SLDconst {
 18541  			break
 18542  		}
 18543  		if s2.AuxInt != 24 {
 18544  			break
 18545  		}
 18546  		x3 := s2.Args[0]
 18547  		if x3.Op != OpPPC64MOVBZload {
 18548  			break
 18549  		}
 18550  		i3 := x3.AuxInt
 18551  		if x3.Aux != s {
 18552  			break
 18553  		}
 18554  		_ = x3.Args[1]
 18555  		if p != x3.Args[0] {
 18556  			break
 18557  		}
 18558  		if mem != x3.Args[1] {
 18559  			break
 18560  		}
 18561  		s5 := o5.Args[1]
 18562  		if s5.Op != OpPPC64SLDconst {
 18563  			break
 18564  		}
 18565  		if s5.AuxInt != 48 {
 18566  			break
 18567  		}
 18568  		x6 := s5.Args[0]
 18569  		if x6.Op != OpPPC64MOVBZload {
 18570  			break
 18571  		}
 18572  		i6 := x6.AuxInt
 18573  		if x6.Aux != s {
 18574  			break
 18575  		}
 18576  		_ = x6.Args[1]
 18577  		if p != x6.Args[0] {
 18578  			break
 18579  		}
 18580  		if mem != x6.Args[1] {
 18581  			break
 18582  		}
 18583  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18584  			break
 18585  		}
 18586  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 18587  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18588  		v.reset(OpCopy)
 18589  		v.AddArg(v0)
 18590  		v0.AuxInt = i0
 18591  		v0.Aux = s
 18592  		v0.AddArg(p)
 18593  		v0.AddArg(mem)
 18594  		return true
 18595  	}
 18596  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 18597  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 18598  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18599  	for {
 18600  		t := v.Type
 18601  		_ = v.Args[1]
 18602  		s6 := v.Args[0]
 18603  		if s6.Op != OpPPC64SLDconst {
 18604  			break
 18605  		}
 18606  		if s6.AuxInt != 56 {
 18607  			break
 18608  		}
 18609  		x7 := s6.Args[0]
 18610  		if x7.Op != OpPPC64MOVBZload {
 18611  			break
 18612  		}
 18613  		i7 := x7.AuxInt
 18614  		s := x7.Aux
 18615  		_ = x7.Args[1]
 18616  		p := x7.Args[0]
 18617  		mem := x7.Args[1]
 18618  		o5 := v.Args[1]
 18619  		if o5.Op != OpPPC64OR {
 18620  			break
 18621  		}
 18622  		if o5.Type != t {
 18623  			break
 18624  		}
 18625  		_ = o5.Args[1]
 18626  		o4 := o5.Args[0]
 18627  		if o4.Op != OpPPC64OR {
 18628  			break
 18629  		}
 18630  		if o4.Type != t {
 18631  			break
 18632  		}
 18633  		_ = o4.Args[1]
 18634  		s4 := o4.Args[0]
 18635  		if s4.Op != OpPPC64SLDconst {
 18636  			break
 18637  		}
 18638  		if s4.AuxInt != 40 {
 18639  			break
 18640  		}
 18641  		x5 := s4.Args[0]
 18642  		if x5.Op != OpPPC64MOVBZload {
 18643  			break
 18644  		}
 18645  		i5 := x5.AuxInt
 18646  		if x5.Aux != s {
 18647  			break
 18648  		}
 18649  		_ = x5.Args[1]
 18650  		if p != x5.Args[0] {
 18651  			break
 18652  		}
 18653  		if mem != x5.Args[1] {
 18654  			break
 18655  		}
 18656  		o3 := o4.Args[1]
 18657  		if o3.Op != OpPPC64OR {
 18658  			break
 18659  		}
 18660  		if o3.Type != t {
 18661  			break
 18662  		}
 18663  		_ = o3.Args[1]
 18664  		s3 := o3.Args[0]
 18665  		if s3.Op != OpPPC64SLDconst {
 18666  			break
 18667  		}
 18668  		if s3.AuxInt != 32 {
 18669  			break
 18670  		}
 18671  		x4 := s3.Args[0]
 18672  		if x4.Op != OpPPC64MOVBZload {
 18673  			break
 18674  		}
 18675  		i4 := x4.AuxInt
 18676  		if x4.Aux != s {
 18677  			break
 18678  		}
 18679  		_ = x4.Args[1]
 18680  		if p != x4.Args[0] {
 18681  			break
 18682  		}
 18683  		if mem != x4.Args[1] {
 18684  			break
 18685  		}
 18686  		o2 := o3.Args[1]
 18687  		if o2.Op != OpPPC64OR {
 18688  			break
 18689  		}
 18690  		if o2.Type != t {
 18691  			break
 18692  		}
 18693  		_ = o2.Args[1]
 18694  		o1 := o2.Args[0]
 18695  		if o1.Op != OpPPC64OR {
 18696  			break
 18697  		}
 18698  		if o1.Type != t {
 18699  			break
 18700  		}
 18701  		_ = o1.Args[1]
 18702  		o0 := o1.Args[0]
 18703  		if o0.Op != OpPPC64OR {
 18704  			break
 18705  		}
 18706  		if o0.Type != t {
 18707  			break
 18708  		}
 18709  		_ = o0.Args[1]
 18710  		s0 := o0.Args[0]
 18711  		if s0.Op != OpPPC64SLDconst {
 18712  			break
 18713  		}
 18714  		if s0.AuxInt != 8 {
 18715  			break
 18716  		}
 18717  		x1 := s0.Args[0]
 18718  		if x1.Op != OpPPC64MOVBZload {
 18719  			break
 18720  		}
 18721  		i1 := x1.AuxInt
 18722  		if x1.Aux != s {
 18723  			break
 18724  		}
 18725  		_ = x1.Args[1]
 18726  		if p != x1.Args[0] {
 18727  			break
 18728  		}
 18729  		if mem != x1.Args[1] {
 18730  			break
 18731  		}
 18732  		x0 := o0.Args[1]
 18733  		if x0.Op != OpPPC64MOVBZload {
 18734  			break
 18735  		}
 18736  		i0 := x0.AuxInt
 18737  		if x0.Aux != s {
 18738  			break
 18739  		}
 18740  		_ = x0.Args[1]
 18741  		if p != x0.Args[0] {
 18742  			break
 18743  		}
 18744  		if mem != x0.Args[1] {
 18745  			break
 18746  		}
 18747  		s1 := o1.Args[1]
 18748  		if s1.Op != OpPPC64SLDconst {
 18749  			break
 18750  		}
 18751  		if s1.AuxInt != 16 {
 18752  			break
 18753  		}
 18754  		x2 := s1.Args[0]
 18755  		if x2.Op != OpPPC64MOVBZload {
 18756  			break
 18757  		}
 18758  		i2 := x2.AuxInt
 18759  		if x2.Aux != s {
 18760  			break
 18761  		}
 18762  		_ = x2.Args[1]
 18763  		if p != x2.Args[0] {
 18764  			break
 18765  		}
 18766  		if mem != x2.Args[1] {
 18767  			break
 18768  		}
 18769  		s2 := o2.Args[1]
 18770  		if s2.Op != OpPPC64SLDconst {
 18771  			break
 18772  		}
 18773  		if s2.AuxInt != 24 {
 18774  			break
 18775  		}
 18776  		x3 := s2.Args[0]
 18777  		if x3.Op != OpPPC64MOVBZload {
 18778  			break
 18779  		}
 18780  		i3 := x3.AuxInt
 18781  		if x3.Aux != s {
 18782  			break
 18783  		}
 18784  		_ = x3.Args[1]
 18785  		if p != x3.Args[0] {
 18786  			break
 18787  		}
 18788  		if mem != x3.Args[1] {
 18789  			break
 18790  		}
 18791  		s5 := o5.Args[1]
 18792  		if s5.Op != OpPPC64SLDconst {
 18793  			break
 18794  		}
 18795  		if s5.AuxInt != 48 {
 18796  			break
 18797  		}
 18798  		x6 := s5.Args[0]
 18799  		if x6.Op != OpPPC64MOVBZload {
 18800  			break
 18801  		}
 18802  		i6 := x6.AuxInt
 18803  		if x6.Aux != s {
 18804  			break
 18805  		}
 18806  		_ = x6.Args[1]
 18807  		if p != x6.Args[0] {
 18808  			break
 18809  		}
 18810  		if mem != x6.Args[1] {
 18811  			break
 18812  		}
 18813  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 18814  			break
 18815  		}
 18816  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 18817  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 18818  		v.reset(OpCopy)
 18819  		v.AddArg(v0)
 18820  		v0.AuxInt = i0
 18821  		v0.Aux = s
 18822  		v0.AddArg(p)
 18823  		v0.AddArg(mem)
 18824  		return true
 18825  	}
 18826  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 18827  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 18828  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 18829  	for {
 18830  		t := v.Type
 18831  		_ = v.Args[1]
 18832  		s6 := v.Args[0]
 18833  		if s6.Op != OpPPC64SLDconst {
 18834  			break
 18835  		}
 18836  		if s6.AuxInt != 56 {
 18837  			break
 18838  		}
 18839  		x7 := s6.Args[0]
 18840  		if x7.Op != OpPPC64MOVBZload {
 18841  			break
 18842  		}
 18843  		i7 := x7.AuxInt
 18844  		s := x7.Aux
 18845  		_ = x7.Args[1]
 18846  		p := x7.Args[0]
 18847  		mem := x7.Args[1]
 18848  		o5 := v.Args[1]
 18849  		if o5.Op != OpPPC64OR {
 18850  			break
 18851  		}
 18852  		if o5.Type != t {
 18853  			break
 18854  		}
 18855  		_ = o5.Args[1]
 18856  		o4 := o5.Args[0]
 18857  		if o4.Op != OpPPC64OR {
 18858  			break
 18859  		}
 18860  		if o4.Type != t {
 18861  			break
 18862  		}
 18863  		_ = o4.Args[1]
 18864  		s4 := o4.Args[0]
 18865  		if s4.Op != OpPPC64SLDconst {
 18866  			break
 18867  		}
 18868  		if s4.AuxInt != 40 {
 18869  			break
 18870  		}
 18871  		x5 := s4.Args[0]
 18872  		if x5.Op != OpPPC64MOVBZload {
 18873  			break
 18874  		}
 18875  		i5 := x5.AuxInt
 18876  		if x5.Aux != s {
 18877  			break
 18878  		}
 18879  		_ = x5.Args[1]
 18880  		if p != x5.Args[0] {
 18881  			break
 18882  		}
 18883  		if mem != x5.Args[1] {
 18884  			break
 18885  		}
 18886  		o3 := o4.Args[1]
 18887  		if o3.Op != OpPPC64OR {
 18888  			break
 18889  		}
 18890  		if o3.Type != t {
 18891  			break
 18892  		}
 18893  		_ = o3.Args[1]
 18894  		s3 := o3.Args[0]
 18895  		if s3.Op != OpPPC64SLDconst {
 18896  			break
 18897  		}
 18898  		if s3.AuxInt != 32 {
 18899  			break
 18900  		}
 18901  		x4 := s3.Args[0]
 18902  		if x4.Op != OpPPC64MOVBZload {
 18903  			break
 18904  		}
 18905  		i4 := x4.AuxInt
 18906  		if x4.Aux != s {
 18907  			break
 18908  		}
 18909  		_ = x4.Args[1]
 18910  		if p != x4.Args[0] {
 18911  			break
 18912  		}
 18913  		if mem != x4.Args[1] {
 18914  			break
 18915  		}
 18916  		o2 := o3.Args[1]
 18917  		if o2.Op != OpPPC64OR {
 18918  			break
 18919  		}
 18920  		if o2.Type != t {
 18921  			break
 18922  		}
 18923  		_ = o2.Args[1]
 18924  		o1 := o2.Args[0]
 18925  		if o1.Op != OpPPC64OR {
 18926  			break
 18927  		}
 18928  		if o1.Type != t {
 18929  			break
 18930  		}
 18931  		_ = o1.Args[1]
 18932  		o0 := o1.Args[0]
 18933  		if o0.Op != OpPPC64OR {
 18934  			break
 18935  		}
 18936  		if o0.Type != t {
 18937  			break
 18938  		}
 18939  		_ = o0.Args[1]
 18940  		x0 := o0.Args[0]
 18941  		if x0.Op != OpPPC64MOVBZload {
 18942  			break
 18943  		}
 18944  		i0 := x0.AuxInt
 18945  		if x0.Aux != s {
 18946  			break
 18947  		}
 18948  		_ = x0.Args[1]
 18949  		if p != x0.Args[0] {
 18950  			break
 18951  		}
 18952  		if mem != x0.Args[1] {
 18953  			break
 18954  		}
 18955  		s0 := o0.Args[1]
 18956  		if s0.Op != OpPPC64SLDconst {
 18957  			break
 18958  		}
 18959  		if s0.AuxInt != 8 {
 18960  			break
 18961  		}
 18962  		x1 := s0.Args[0]
 18963  		if x1.Op != OpPPC64MOVBZload {
 18964  			break
 18965  		}
 18966  		i1 := x1.AuxInt
 18967  		if x1.Aux != s {
 18968  			break
 18969  		}
 18970  		_ = x1.Args[1]
 18971  		if p != x1.Args[0] {
 18972  			break
 18973  		}
 18974  		if mem != x1.Args[1] {
 18975  			break
 18976  		}
 18977  		s1 := o1.Args[1]
 18978  		if s1.Op != OpPPC64SLDconst {
 18979  			break
 18980  		}
 18981  		if s1.AuxInt != 16 {
 18982  			break
 18983  		}
 18984  		x2 := s1.Args[0]
 18985  		if x2.Op != OpPPC64MOVBZload {
 18986  			break
 18987  		}
 18988  		i2 := x2.AuxInt
 18989  		if x2.Aux != s {
 18990  			break
 18991  		}
 18992  		_ = x2.Args[1]
 18993  		if p != x2.Args[0] {
 18994  			break
 18995  		}
 18996  		if mem != x2.Args[1] {
 18997  			break
 18998  		}
 18999  		s2 := o2.Args[1]
 19000  		if s2.Op != OpPPC64SLDconst {
 19001  			break
 19002  		}
 19003  		if s2.AuxInt != 24 {
 19004  			break
 19005  		}
 19006  		x3 := s2.Args[0]
 19007  		if x3.Op != OpPPC64MOVBZload {
 19008  			break
 19009  		}
 19010  		i3 := x3.AuxInt
 19011  		if x3.Aux != s {
 19012  			break
 19013  		}
 19014  		_ = x3.Args[1]
 19015  		if p != x3.Args[0] {
 19016  			break
 19017  		}
 19018  		if mem != x3.Args[1] {
 19019  			break
 19020  		}
 19021  		s5 := o5.Args[1]
 19022  		if s5.Op != OpPPC64SLDconst {
 19023  			break
 19024  		}
 19025  		if s5.AuxInt != 48 {
 19026  			break
 19027  		}
 19028  		x6 := s5.Args[0]
 19029  		if x6.Op != OpPPC64MOVBZload {
 19030  			break
 19031  		}
 19032  		i6 := x6.AuxInt
 19033  		if x6.Aux != s {
 19034  			break
 19035  		}
 19036  		_ = x6.Args[1]
 19037  		if p != x6.Args[0] {
 19038  			break
 19039  		}
 19040  		if mem != x6.Args[1] {
 19041  			break
 19042  		}
 19043  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19044  			break
 19045  		}
 19046  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19047  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19048  		v.reset(OpCopy)
 19049  		v.AddArg(v0)
 19050  		v0.AuxInt = i0
 19051  		v0.Aux = s
 19052  		v0.AddArg(p)
 19053  		v0.AddArg(mem)
 19054  		return true
 19055  	}
 19056  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19057  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19058  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19059  	for {
 19060  		t := v.Type
 19061  		_ = v.Args[1]
 19062  		s6 := v.Args[0]
 19063  		if s6.Op != OpPPC64SLDconst {
 19064  			break
 19065  		}
 19066  		if s6.AuxInt != 56 {
 19067  			break
 19068  		}
 19069  		x7 := s6.Args[0]
 19070  		if x7.Op != OpPPC64MOVBZload {
 19071  			break
 19072  		}
 19073  		i7 := x7.AuxInt
 19074  		s := x7.Aux
 19075  		_ = x7.Args[1]
 19076  		p := x7.Args[0]
 19077  		mem := x7.Args[1]
 19078  		o5 := v.Args[1]
 19079  		if o5.Op != OpPPC64OR {
 19080  			break
 19081  		}
 19082  		if o5.Type != t {
 19083  			break
 19084  		}
 19085  		_ = o5.Args[1]
 19086  		o4 := o5.Args[0]
 19087  		if o4.Op != OpPPC64OR {
 19088  			break
 19089  		}
 19090  		if o4.Type != t {
 19091  			break
 19092  		}
 19093  		_ = o4.Args[1]
 19094  		s4 := o4.Args[0]
 19095  		if s4.Op != OpPPC64SLDconst {
 19096  			break
 19097  		}
 19098  		if s4.AuxInt != 40 {
 19099  			break
 19100  		}
 19101  		x5 := s4.Args[0]
 19102  		if x5.Op != OpPPC64MOVBZload {
 19103  			break
 19104  		}
 19105  		i5 := x5.AuxInt
 19106  		if x5.Aux != s {
 19107  			break
 19108  		}
 19109  		_ = x5.Args[1]
 19110  		if p != x5.Args[0] {
 19111  			break
 19112  		}
 19113  		if mem != x5.Args[1] {
 19114  			break
 19115  		}
 19116  		o3 := o4.Args[1]
 19117  		if o3.Op != OpPPC64OR {
 19118  			break
 19119  		}
 19120  		if o3.Type != t {
 19121  			break
 19122  		}
 19123  		_ = o3.Args[1]
 19124  		o2 := o3.Args[0]
 19125  		if o2.Op != OpPPC64OR {
 19126  			break
 19127  		}
 19128  		if o2.Type != t {
 19129  			break
 19130  		}
 19131  		_ = o2.Args[1]
 19132  		s2 := o2.Args[0]
 19133  		if s2.Op != OpPPC64SLDconst {
 19134  			break
 19135  		}
 19136  		if s2.AuxInt != 24 {
 19137  			break
 19138  		}
 19139  		x3 := s2.Args[0]
 19140  		if x3.Op != OpPPC64MOVBZload {
 19141  			break
 19142  		}
 19143  		i3 := x3.AuxInt
 19144  		if x3.Aux != s {
 19145  			break
 19146  		}
 19147  		_ = x3.Args[1]
 19148  		if p != x3.Args[0] {
 19149  			break
 19150  		}
 19151  		if mem != x3.Args[1] {
 19152  			break
 19153  		}
 19154  		o1 := o2.Args[1]
 19155  		if o1.Op != OpPPC64OR {
 19156  			break
 19157  		}
 19158  		if o1.Type != t {
 19159  			break
 19160  		}
 19161  		_ = o1.Args[1]
 19162  		s1 := o1.Args[0]
 19163  		if s1.Op != OpPPC64SLDconst {
 19164  			break
 19165  		}
 19166  		if s1.AuxInt != 16 {
 19167  			break
 19168  		}
 19169  		x2 := s1.Args[0]
 19170  		if x2.Op != OpPPC64MOVBZload {
 19171  			break
 19172  		}
 19173  		i2 := x2.AuxInt
 19174  		if x2.Aux != s {
 19175  			break
 19176  		}
 19177  		_ = x2.Args[1]
 19178  		if p != x2.Args[0] {
 19179  			break
 19180  		}
 19181  		if mem != x2.Args[1] {
 19182  			break
 19183  		}
 19184  		o0 := o1.Args[1]
 19185  		if o0.Op != OpPPC64OR {
 19186  			break
 19187  		}
 19188  		if o0.Type != t {
 19189  			break
 19190  		}
 19191  		_ = o0.Args[1]
 19192  		s0 := o0.Args[0]
 19193  		if s0.Op != OpPPC64SLDconst {
 19194  			break
 19195  		}
 19196  		if s0.AuxInt != 8 {
 19197  			break
 19198  		}
 19199  		x1 := s0.Args[0]
 19200  		if x1.Op != OpPPC64MOVBZload {
 19201  			break
 19202  		}
 19203  		i1 := x1.AuxInt
 19204  		if x1.Aux != s {
 19205  			break
 19206  		}
 19207  		_ = x1.Args[1]
 19208  		if p != x1.Args[0] {
 19209  			break
 19210  		}
 19211  		if mem != x1.Args[1] {
 19212  			break
 19213  		}
 19214  		x0 := o0.Args[1]
 19215  		if x0.Op != OpPPC64MOVBZload {
 19216  			break
 19217  		}
 19218  		i0 := x0.AuxInt
 19219  		if x0.Aux != s {
 19220  			break
 19221  		}
 19222  		_ = x0.Args[1]
 19223  		if p != x0.Args[0] {
 19224  			break
 19225  		}
 19226  		if mem != x0.Args[1] {
 19227  			break
 19228  		}
 19229  		s3 := o3.Args[1]
 19230  		if s3.Op != OpPPC64SLDconst {
 19231  			break
 19232  		}
 19233  		if s3.AuxInt != 32 {
 19234  			break
 19235  		}
 19236  		x4 := s3.Args[0]
 19237  		if x4.Op != OpPPC64MOVBZload {
 19238  			break
 19239  		}
 19240  		i4 := x4.AuxInt
 19241  		if x4.Aux != s {
 19242  			break
 19243  		}
 19244  		_ = x4.Args[1]
 19245  		if p != x4.Args[0] {
 19246  			break
 19247  		}
 19248  		if mem != x4.Args[1] {
 19249  			break
 19250  		}
 19251  		s5 := o5.Args[1]
 19252  		if s5.Op != OpPPC64SLDconst {
 19253  			break
 19254  		}
 19255  		if s5.AuxInt != 48 {
 19256  			break
 19257  		}
 19258  		x6 := s5.Args[0]
 19259  		if x6.Op != OpPPC64MOVBZload {
 19260  			break
 19261  		}
 19262  		i6 := x6.AuxInt
 19263  		if x6.Aux != s {
 19264  			break
 19265  		}
 19266  		_ = x6.Args[1]
 19267  		if p != x6.Args[0] {
 19268  			break
 19269  		}
 19270  		if mem != x6.Args[1] {
 19271  			break
 19272  		}
 19273  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19274  			break
 19275  		}
 19276  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19277  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19278  		v.reset(OpCopy)
 19279  		v.AddArg(v0)
 19280  		v0.AuxInt = i0
 19281  		v0.Aux = s
 19282  		v0.AddArg(p)
 19283  		v0.AddArg(mem)
 19284  		return true
 19285  	}
 19286  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19287  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19288  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19289  	for {
 19290  		t := v.Type
 19291  		_ = v.Args[1]
 19292  		s6 := v.Args[0]
 19293  		if s6.Op != OpPPC64SLDconst {
 19294  			break
 19295  		}
 19296  		if s6.AuxInt != 56 {
 19297  			break
 19298  		}
 19299  		x7 := s6.Args[0]
 19300  		if x7.Op != OpPPC64MOVBZload {
 19301  			break
 19302  		}
 19303  		i7 := x7.AuxInt
 19304  		s := x7.Aux
 19305  		_ = x7.Args[1]
 19306  		p := x7.Args[0]
 19307  		mem := x7.Args[1]
 19308  		o5 := v.Args[1]
 19309  		if o5.Op != OpPPC64OR {
 19310  			break
 19311  		}
 19312  		if o5.Type != t {
 19313  			break
 19314  		}
 19315  		_ = o5.Args[1]
 19316  		o4 := o5.Args[0]
 19317  		if o4.Op != OpPPC64OR {
 19318  			break
 19319  		}
 19320  		if o4.Type != t {
 19321  			break
 19322  		}
 19323  		_ = o4.Args[1]
 19324  		s4 := o4.Args[0]
 19325  		if s4.Op != OpPPC64SLDconst {
 19326  			break
 19327  		}
 19328  		if s4.AuxInt != 40 {
 19329  			break
 19330  		}
 19331  		x5 := s4.Args[0]
 19332  		if x5.Op != OpPPC64MOVBZload {
 19333  			break
 19334  		}
 19335  		i5 := x5.AuxInt
 19336  		if x5.Aux != s {
 19337  			break
 19338  		}
 19339  		_ = x5.Args[1]
 19340  		if p != x5.Args[0] {
 19341  			break
 19342  		}
 19343  		if mem != x5.Args[1] {
 19344  			break
 19345  		}
 19346  		o3 := o4.Args[1]
 19347  		if o3.Op != OpPPC64OR {
 19348  			break
 19349  		}
 19350  		if o3.Type != t {
 19351  			break
 19352  		}
 19353  		_ = o3.Args[1]
 19354  		o2 := o3.Args[0]
 19355  		if o2.Op != OpPPC64OR {
 19356  			break
 19357  		}
 19358  		if o2.Type != t {
 19359  			break
 19360  		}
 19361  		_ = o2.Args[1]
 19362  		s2 := o2.Args[0]
 19363  		if s2.Op != OpPPC64SLDconst {
 19364  			break
 19365  		}
 19366  		if s2.AuxInt != 24 {
 19367  			break
 19368  		}
 19369  		x3 := s2.Args[0]
 19370  		if x3.Op != OpPPC64MOVBZload {
 19371  			break
 19372  		}
 19373  		i3 := x3.AuxInt
 19374  		if x3.Aux != s {
 19375  			break
 19376  		}
 19377  		_ = x3.Args[1]
 19378  		if p != x3.Args[0] {
 19379  			break
 19380  		}
 19381  		if mem != x3.Args[1] {
 19382  			break
 19383  		}
 19384  		o1 := o2.Args[1]
 19385  		if o1.Op != OpPPC64OR {
 19386  			break
 19387  		}
 19388  		if o1.Type != t {
 19389  			break
 19390  		}
 19391  		_ = o1.Args[1]
 19392  		s1 := o1.Args[0]
 19393  		if s1.Op != OpPPC64SLDconst {
 19394  			break
 19395  		}
 19396  		if s1.AuxInt != 16 {
 19397  			break
 19398  		}
 19399  		x2 := s1.Args[0]
 19400  		if x2.Op != OpPPC64MOVBZload {
 19401  			break
 19402  		}
 19403  		i2 := x2.AuxInt
 19404  		if x2.Aux != s {
 19405  			break
 19406  		}
 19407  		_ = x2.Args[1]
 19408  		if p != x2.Args[0] {
 19409  			break
 19410  		}
 19411  		if mem != x2.Args[1] {
 19412  			break
 19413  		}
 19414  		o0 := o1.Args[1]
 19415  		if o0.Op != OpPPC64OR {
 19416  			break
 19417  		}
 19418  		if o0.Type != t {
 19419  			break
 19420  		}
 19421  		_ = o0.Args[1]
 19422  		x0 := o0.Args[0]
 19423  		if x0.Op != OpPPC64MOVBZload {
 19424  			break
 19425  		}
 19426  		i0 := x0.AuxInt
 19427  		if x0.Aux != s {
 19428  			break
 19429  		}
 19430  		_ = x0.Args[1]
 19431  		if p != x0.Args[0] {
 19432  			break
 19433  		}
 19434  		if mem != x0.Args[1] {
 19435  			break
 19436  		}
 19437  		s0 := o0.Args[1]
 19438  		if s0.Op != OpPPC64SLDconst {
 19439  			break
 19440  		}
 19441  		if s0.AuxInt != 8 {
 19442  			break
 19443  		}
 19444  		x1 := s0.Args[0]
 19445  		if x1.Op != OpPPC64MOVBZload {
 19446  			break
 19447  		}
 19448  		i1 := x1.AuxInt
 19449  		if x1.Aux != s {
 19450  			break
 19451  		}
 19452  		_ = x1.Args[1]
 19453  		if p != x1.Args[0] {
 19454  			break
 19455  		}
 19456  		if mem != x1.Args[1] {
 19457  			break
 19458  		}
 19459  		s3 := o3.Args[1]
 19460  		if s3.Op != OpPPC64SLDconst {
 19461  			break
 19462  		}
 19463  		if s3.AuxInt != 32 {
 19464  			break
 19465  		}
 19466  		x4 := s3.Args[0]
 19467  		if x4.Op != OpPPC64MOVBZload {
 19468  			break
 19469  		}
 19470  		i4 := x4.AuxInt
 19471  		if x4.Aux != s {
 19472  			break
 19473  		}
 19474  		_ = x4.Args[1]
 19475  		if p != x4.Args[0] {
 19476  			break
 19477  		}
 19478  		if mem != x4.Args[1] {
 19479  			break
 19480  		}
 19481  		s5 := o5.Args[1]
 19482  		if s5.Op != OpPPC64SLDconst {
 19483  			break
 19484  		}
 19485  		if s5.AuxInt != 48 {
 19486  			break
 19487  		}
 19488  		x6 := s5.Args[0]
 19489  		if x6.Op != OpPPC64MOVBZload {
 19490  			break
 19491  		}
 19492  		i6 := x6.AuxInt
 19493  		if x6.Aux != s {
 19494  			break
 19495  		}
 19496  		_ = x6.Args[1]
 19497  		if p != x6.Args[0] {
 19498  			break
 19499  		}
 19500  		if mem != x6.Args[1] {
 19501  			break
 19502  		}
 19503  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19504  			break
 19505  		}
 19506  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19507  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19508  		v.reset(OpCopy)
 19509  		v.AddArg(v0)
 19510  		v0.AuxInt = i0
 19511  		v0.Aux = s
 19512  		v0.AddArg(p)
 19513  		v0.AddArg(mem)
 19514  		return true
 19515  	}
 19516  	return false
 19517  }
 19518  func rewriteValuePPC64_OpPPC64OR_60(v *Value) bool {
 19519  	b := v.Block
 19520  	_ = b
 19521  	config := b.Func.Config
 19522  	_ = config
 19523  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19524  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19525  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19526  	for {
 19527  		t := v.Type
 19528  		_ = v.Args[1]
 19529  		s6 := v.Args[0]
 19530  		if s6.Op != OpPPC64SLDconst {
 19531  			break
 19532  		}
 19533  		if s6.AuxInt != 56 {
 19534  			break
 19535  		}
 19536  		x7 := s6.Args[0]
 19537  		if x7.Op != OpPPC64MOVBZload {
 19538  			break
 19539  		}
 19540  		i7 := x7.AuxInt
 19541  		s := x7.Aux
 19542  		_ = x7.Args[1]
 19543  		p := x7.Args[0]
 19544  		mem := x7.Args[1]
 19545  		o5 := v.Args[1]
 19546  		if o5.Op != OpPPC64OR {
 19547  			break
 19548  		}
 19549  		if o5.Type != t {
 19550  			break
 19551  		}
 19552  		_ = o5.Args[1]
 19553  		o4 := o5.Args[0]
 19554  		if o4.Op != OpPPC64OR {
 19555  			break
 19556  		}
 19557  		if o4.Type != t {
 19558  			break
 19559  		}
 19560  		_ = o4.Args[1]
 19561  		s4 := o4.Args[0]
 19562  		if s4.Op != OpPPC64SLDconst {
 19563  			break
 19564  		}
 19565  		if s4.AuxInt != 40 {
 19566  			break
 19567  		}
 19568  		x5 := s4.Args[0]
 19569  		if x5.Op != OpPPC64MOVBZload {
 19570  			break
 19571  		}
 19572  		i5 := x5.AuxInt
 19573  		if x5.Aux != s {
 19574  			break
 19575  		}
 19576  		_ = x5.Args[1]
 19577  		if p != x5.Args[0] {
 19578  			break
 19579  		}
 19580  		if mem != x5.Args[1] {
 19581  			break
 19582  		}
 19583  		o3 := o4.Args[1]
 19584  		if o3.Op != OpPPC64OR {
 19585  			break
 19586  		}
 19587  		if o3.Type != t {
 19588  			break
 19589  		}
 19590  		_ = o3.Args[1]
 19591  		o2 := o3.Args[0]
 19592  		if o2.Op != OpPPC64OR {
 19593  			break
 19594  		}
 19595  		if o2.Type != t {
 19596  			break
 19597  		}
 19598  		_ = o2.Args[1]
 19599  		s2 := o2.Args[0]
 19600  		if s2.Op != OpPPC64SLDconst {
 19601  			break
 19602  		}
 19603  		if s2.AuxInt != 24 {
 19604  			break
 19605  		}
 19606  		x3 := s2.Args[0]
 19607  		if x3.Op != OpPPC64MOVBZload {
 19608  			break
 19609  		}
 19610  		i3 := x3.AuxInt
 19611  		if x3.Aux != s {
 19612  			break
 19613  		}
 19614  		_ = x3.Args[1]
 19615  		if p != x3.Args[0] {
 19616  			break
 19617  		}
 19618  		if mem != x3.Args[1] {
 19619  			break
 19620  		}
 19621  		o1 := o2.Args[1]
 19622  		if o1.Op != OpPPC64OR {
 19623  			break
 19624  		}
 19625  		if o1.Type != t {
 19626  			break
 19627  		}
 19628  		_ = o1.Args[1]
 19629  		o0 := o1.Args[0]
 19630  		if o0.Op != OpPPC64OR {
 19631  			break
 19632  		}
 19633  		if o0.Type != t {
 19634  			break
 19635  		}
 19636  		_ = o0.Args[1]
 19637  		s0 := o0.Args[0]
 19638  		if s0.Op != OpPPC64SLDconst {
 19639  			break
 19640  		}
 19641  		if s0.AuxInt != 8 {
 19642  			break
 19643  		}
 19644  		x1 := s0.Args[0]
 19645  		if x1.Op != OpPPC64MOVBZload {
 19646  			break
 19647  		}
 19648  		i1 := x1.AuxInt
 19649  		if x1.Aux != s {
 19650  			break
 19651  		}
 19652  		_ = x1.Args[1]
 19653  		if p != x1.Args[0] {
 19654  			break
 19655  		}
 19656  		if mem != x1.Args[1] {
 19657  			break
 19658  		}
 19659  		x0 := o0.Args[1]
 19660  		if x0.Op != OpPPC64MOVBZload {
 19661  			break
 19662  		}
 19663  		i0 := x0.AuxInt
 19664  		if x0.Aux != s {
 19665  			break
 19666  		}
 19667  		_ = x0.Args[1]
 19668  		if p != x0.Args[0] {
 19669  			break
 19670  		}
 19671  		if mem != x0.Args[1] {
 19672  			break
 19673  		}
 19674  		s1 := o1.Args[1]
 19675  		if s1.Op != OpPPC64SLDconst {
 19676  			break
 19677  		}
 19678  		if s1.AuxInt != 16 {
 19679  			break
 19680  		}
 19681  		x2 := s1.Args[0]
 19682  		if x2.Op != OpPPC64MOVBZload {
 19683  			break
 19684  		}
 19685  		i2 := x2.AuxInt
 19686  		if x2.Aux != s {
 19687  			break
 19688  		}
 19689  		_ = x2.Args[1]
 19690  		if p != x2.Args[0] {
 19691  			break
 19692  		}
 19693  		if mem != x2.Args[1] {
 19694  			break
 19695  		}
 19696  		s3 := o3.Args[1]
 19697  		if s3.Op != OpPPC64SLDconst {
 19698  			break
 19699  		}
 19700  		if s3.AuxInt != 32 {
 19701  			break
 19702  		}
 19703  		x4 := s3.Args[0]
 19704  		if x4.Op != OpPPC64MOVBZload {
 19705  			break
 19706  		}
 19707  		i4 := x4.AuxInt
 19708  		if x4.Aux != s {
 19709  			break
 19710  		}
 19711  		_ = x4.Args[1]
 19712  		if p != x4.Args[0] {
 19713  			break
 19714  		}
 19715  		if mem != x4.Args[1] {
 19716  			break
 19717  		}
 19718  		s5 := o5.Args[1]
 19719  		if s5.Op != OpPPC64SLDconst {
 19720  			break
 19721  		}
 19722  		if s5.AuxInt != 48 {
 19723  			break
 19724  		}
 19725  		x6 := s5.Args[0]
 19726  		if x6.Op != OpPPC64MOVBZload {
 19727  			break
 19728  		}
 19729  		i6 := x6.AuxInt
 19730  		if x6.Aux != s {
 19731  			break
 19732  		}
 19733  		_ = x6.Args[1]
 19734  		if p != x6.Args[0] {
 19735  			break
 19736  		}
 19737  		if mem != x6.Args[1] {
 19738  			break
 19739  		}
 19740  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19741  			break
 19742  		}
 19743  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19744  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19745  		v.reset(OpCopy)
 19746  		v.AddArg(v0)
 19747  		v0.AuxInt = i0
 19748  		v0.Aux = s
 19749  		v0.AddArg(p)
 19750  		v0.AddArg(mem)
 19751  		return true
 19752  	}
 19753  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19754  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19755  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19756  	for {
 19757  		t := v.Type
 19758  		_ = v.Args[1]
 19759  		s6 := v.Args[0]
 19760  		if s6.Op != OpPPC64SLDconst {
 19761  			break
 19762  		}
 19763  		if s6.AuxInt != 56 {
 19764  			break
 19765  		}
 19766  		x7 := s6.Args[0]
 19767  		if x7.Op != OpPPC64MOVBZload {
 19768  			break
 19769  		}
 19770  		i7 := x7.AuxInt
 19771  		s := x7.Aux
 19772  		_ = x7.Args[1]
 19773  		p := x7.Args[0]
 19774  		mem := x7.Args[1]
 19775  		o5 := v.Args[1]
 19776  		if o5.Op != OpPPC64OR {
 19777  			break
 19778  		}
 19779  		if o5.Type != t {
 19780  			break
 19781  		}
 19782  		_ = o5.Args[1]
 19783  		o4 := o5.Args[0]
 19784  		if o4.Op != OpPPC64OR {
 19785  			break
 19786  		}
 19787  		if o4.Type != t {
 19788  			break
 19789  		}
 19790  		_ = o4.Args[1]
 19791  		s4 := o4.Args[0]
 19792  		if s4.Op != OpPPC64SLDconst {
 19793  			break
 19794  		}
 19795  		if s4.AuxInt != 40 {
 19796  			break
 19797  		}
 19798  		x5 := s4.Args[0]
 19799  		if x5.Op != OpPPC64MOVBZload {
 19800  			break
 19801  		}
 19802  		i5 := x5.AuxInt
 19803  		if x5.Aux != s {
 19804  			break
 19805  		}
 19806  		_ = x5.Args[1]
 19807  		if p != x5.Args[0] {
 19808  			break
 19809  		}
 19810  		if mem != x5.Args[1] {
 19811  			break
 19812  		}
 19813  		o3 := o4.Args[1]
 19814  		if o3.Op != OpPPC64OR {
 19815  			break
 19816  		}
 19817  		if o3.Type != t {
 19818  			break
 19819  		}
 19820  		_ = o3.Args[1]
 19821  		o2 := o3.Args[0]
 19822  		if o2.Op != OpPPC64OR {
 19823  			break
 19824  		}
 19825  		if o2.Type != t {
 19826  			break
 19827  		}
 19828  		_ = o2.Args[1]
 19829  		s2 := o2.Args[0]
 19830  		if s2.Op != OpPPC64SLDconst {
 19831  			break
 19832  		}
 19833  		if s2.AuxInt != 24 {
 19834  			break
 19835  		}
 19836  		x3 := s2.Args[0]
 19837  		if x3.Op != OpPPC64MOVBZload {
 19838  			break
 19839  		}
 19840  		i3 := x3.AuxInt
 19841  		if x3.Aux != s {
 19842  			break
 19843  		}
 19844  		_ = x3.Args[1]
 19845  		if p != x3.Args[0] {
 19846  			break
 19847  		}
 19848  		if mem != x3.Args[1] {
 19849  			break
 19850  		}
 19851  		o1 := o2.Args[1]
 19852  		if o1.Op != OpPPC64OR {
 19853  			break
 19854  		}
 19855  		if o1.Type != t {
 19856  			break
 19857  		}
 19858  		_ = o1.Args[1]
 19859  		o0 := o1.Args[0]
 19860  		if o0.Op != OpPPC64OR {
 19861  			break
 19862  		}
 19863  		if o0.Type != t {
 19864  			break
 19865  		}
 19866  		_ = o0.Args[1]
 19867  		x0 := o0.Args[0]
 19868  		if x0.Op != OpPPC64MOVBZload {
 19869  			break
 19870  		}
 19871  		i0 := x0.AuxInt
 19872  		if x0.Aux != s {
 19873  			break
 19874  		}
 19875  		_ = x0.Args[1]
 19876  		if p != x0.Args[0] {
 19877  			break
 19878  		}
 19879  		if mem != x0.Args[1] {
 19880  			break
 19881  		}
 19882  		s0 := o0.Args[1]
 19883  		if s0.Op != OpPPC64SLDconst {
 19884  			break
 19885  		}
 19886  		if s0.AuxInt != 8 {
 19887  			break
 19888  		}
 19889  		x1 := s0.Args[0]
 19890  		if x1.Op != OpPPC64MOVBZload {
 19891  			break
 19892  		}
 19893  		i1 := x1.AuxInt
 19894  		if x1.Aux != s {
 19895  			break
 19896  		}
 19897  		_ = x1.Args[1]
 19898  		if p != x1.Args[0] {
 19899  			break
 19900  		}
 19901  		if mem != x1.Args[1] {
 19902  			break
 19903  		}
 19904  		s1 := o1.Args[1]
 19905  		if s1.Op != OpPPC64SLDconst {
 19906  			break
 19907  		}
 19908  		if s1.AuxInt != 16 {
 19909  			break
 19910  		}
 19911  		x2 := s1.Args[0]
 19912  		if x2.Op != OpPPC64MOVBZload {
 19913  			break
 19914  		}
 19915  		i2 := x2.AuxInt
 19916  		if x2.Aux != s {
 19917  			break
 19918  		}
 19919  		_ = x2.Args[1]
 19920  		if p != x2.Args[0] {
 19921  			break
 19922  		}
 19923  		if mem != x2.Args[1] {
 19924  			break
 19925  		}
 19926  		s3 := o3.Args[1]
 19927  		if s3.Op != OpPPC64SLDconst {
 19928  			break
 19929  		}
 19930  		if s3.AuxInt != 32 {
 19931  			break
 19932  		}
 19933  		x4 := s3.Args[0]
 19934  		if x4.Op != OpPPC64MOVBZload {
 19935  			break
 19936  		}
 19937  		i4 := x4.AuxInt
 19938  		if x4.Aux != s {
 19939  			break
 19940  		}
 19941  		_ = x4.Args[1]
 19942  		if p != x4.Args[0] {
 19943  			break
 19944  		}
 19945  		if mem != x4.Args[1] {
 19946  			break
 19947  		}
 19948  		s5 := o5.Args[1]
 19949  		if s5.Op != OpPPC64SLDconst {
 19950  			break
 19951  		}
 19952  		if s5.AuxInt != 48 {
 19953  			break
 19954  		}
 19955  		x6 := s5.Args[0]
 19956  		if x6.Op != OpPPC64MOVBZload {
 19957  			break
 19958  		}
 19959  		i6 := x6.AuxInt
 19960  		if x6.Aux != s {
 19961  			break
 19962  		}
 19963  		_ = x6.Args[1]
 19964  		if p != x6.Args[0] {
 19965  			break
 19966  		}
 19967  		if mem != x6.Args[1] {
 19968  			break
 19969  		}
 19970  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 19971  			break
 19972  		}
 19973  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 19974  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 19975  		v.reset(OpCopy)
 19976  		v.AddArg(v0)
 19977  		v0.AuxInt = i0
 19978  		v0.Aux = s
 19979  		v0.AddArg(p)
 19980  		v0.AddArg(mem)
 19981  		return true
 19982  	}
 19983  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 19984  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 19985  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 19986  	for {
 19987  		t := v.Type
 19988  		_ = v.Args[1]
 19989  		s6 := v.Args[0]
 19990  		if s6.Op != OpPPC64SLDconst {
 19991  			break
 19992  		}
 19993  		if s6.AuxInt != 56 {
 19994  			break
 19995  		}
 19996  		x7 := s6.Args[0]
 19997  		if x7.Op != OpPPC64MOVBZload {
 19998  			break
 19999  		}
 20000  		i7 := x7.AuxInt
 20001  		s := x7.Aux
 20002  		_ = x7.Args[1]
 20003  		p := x7.Args[0]
 20004  		mem := x7.Args[1]
 20005  		o5 := v.Args[1]
 20006  		if o5.Op != OpPPC64OR {
 20007  			break
 20008  		}
 20009  		if o5.Type != t {
 20010  			break
 20011  		}
 20012  		_ = o5.Args[1]
 20013  		o4 := o5.Args[0]
 20014  		if o4.Op != OpPPC64OR {
 20015  			break
 20016  		}
 20017  		if o4.Type != t {
 20018  			break
 20019  		}
 20020  		_ = o4.Args[1]
 20021  		s4 := o4.Args[0]
 20022  		if s4.Op != OpPPC64SLDconst {
 20023  			break
 20024  		}
 20025  		if s4.AuxInt != 40 {
 20026  			break
 20027  		}
 20028  		x5 := s4.Args[0]
 20029  		if x5.Op != OpPPC64MOVBZload {
 20030  			break
 20031  		}
 20032  		i5 := x5.AuxInt
 20033  		if x5.Aux != s {
 20034  			break
 20035  		}
 20036  		_ = x5.Args[1]
 20037  		if p != x5.Args[0] {
 20038  			break
 20039  		}
 20040  		if mem != x5.Args[1] {
 20041  			break
 20042  		}
 20043  		o3 := o4.Args[1]
 20044  		if o3.Op != OpPPC64OR {
 20045  			break
 20046  		}
 20047  		if o3.Type != t {
 20048  			break
 20049  		}
 20050  		_ = o3.Args[1]
 20051  		o2 := o3.Args[0]
 20052  		if o2.Op != OpPPC64OR {
 20053  			break
 20054  		}
 20055  		if o2.Type != t {
 20056  			break
 20057  		}
 20058  		_ = o2.Args[1]
 20059  		o1 := o2.Args[0]
 20060  		if o1.Op != OpPPC64OR {
 20061  			break
 20062  		}
 20063  		if o1.Type != t {
 20064  			break
 20065  		}
 20066  		_ = o1.Args[1]
 20067  		s1 := o1.Args[0]
 20068  		if s1.Op != OpPPC64SLDconst {
 20069  			break
 20070  		}
 20071  		if s1.AuxInt != 16 {
 20072  			break
 20073  		}
 20074  		x2 := s1.Args[0]
 20075  		if x2.Op != OpPPC64MOVBZload {
 20076  			break
 20077  		}
 20078  		i2 := x2.AuxInt
 20079  		if x2.Aux != s {
 20080  			break
 20081  		}
 20082  		_ = x2.Args[1]
 20083  		if p != x2.Args[0] {
 20084  			break
 20085  		}
 20086  		if mem != x2.Args[1] {
 20087  			break
 20088  		}
 20089  		o0 := o1.Args[1]
 20090  		if o0.Op != OpPPC64OR {
 20091  			break
 20092  		}
 20093  		if o0.Type != t {
 20094  			break
 20095  		}
 20096  		_ = o0.Args[1]
 20097  		s0 := o0.Args[0]
 20098  		if s0.Op != OpPPC64SLDconst {
 20099  			break
 20100  		}
 20101  		if s0.AuxInt != 8 {
 20102  			break
 20103  		}
 20104  		x1 := s0.Args[0]
 20105  		if x1.Op != OpPPC64MOVBZload {
 20106  			break
 20107  		}
 20108  		i1 := x1.AuxInt
 20109  		if x1.Aux != s {
 20110  			break
 20111  		}
 20112  		_ = x1.Args[1]
 20113  		if p != x1.Args[0] {
 20114  			break
 20115  		}
 20116  		if mem != x1.Args[1] {
 20117  			break
 20118  		}
 20119  		x0 := o0.Args[1]
 20120  		if x0.Op != OpPPC64MOVBZload {
 20121  			break
 20122  		}
 20123  		i0 := x0.AuxInt
 20124  		if x0.Aux != s {
 20125  			break
 20126  		}
 20127  		_ = x0.Args[1]
 20128  		if p != x0.Args[0] {
 20129  			break
 20130  		}
 20131  		if mem != x0.Args[1] {
 20132  			break
 20133  		}
 20134  		s2 := o2.Args[1]
 20135  		if s2.Op != OpPPC64SLDconst {
 20136  			break
 20137  		}
 20138  		if s2.AuxInt != 24 {
 20139  			break
 20140  		}
 20141  		x3 := s2.Args[0]
 20142  		if x3.Op != OpPPC64MOVBZload {
 20143  			break
 20144  		}
 20145  		i3 := x3.AuxInt
 20146  		if x3.Aux != s {
 20147  			break
 20148  		}
 20149  		_ = x3.Args[1]
 20150  		if p != x3.Args[0] {
 20151  			break
 20152  		}
 20153  		if mem != x3.Args[1] {
 20154  			break
 20155  		}
 20156  		s3 := o3.Args[1]
 20157  		if s3.Op != OpPPC64SLDconst {
 20158  			break
 20159  		}
 20160  		if s3.AuxInt != 32 {
 20161  			break
 20162  		}
 20163  		x4 := s3.Args[0]
 20164  		if x4.Op != OpPPC64MOVBZload {
 20165  			break
 20166  		}
 20167  		i4 := x4.AuxInt
 20168  		if x4.Aux != s {
 20169  			break
 20170  		}
 20171  		_ = x4.Args[1]
 20172  		if p != x4.Args[0] {
 20173  			break
 20174  		}
 20175  		if mem != x4.Args[1] {
 20176  			break
 20177  		}
 20178  		s5 := o5.Args[1]
 20179  		if s5.Op != OpPPC64SLDconst {
 20180  			break
 20181  		}
 20182  		if s5.AuxInt != 48 {
 20183  			break
 20184  		}
 20185  		x6 := s5.Args[0]
 20186  		if x6.Op != OpPPC64MOVBZload {
 20187  			break
 20188  		}
 20189  		i6 := x6.AuxInt
 20190  		if x6.Aux != s {
 20191  			break
 20192  		}
 20193  		_ = x6.Args[1]
 20194  		if p != x6.Args[0] {
 20195  			break
 20196  		}
 20197  		if mem != x6.Args[1] {
 20198  			break
 20199  		}
 20200  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 20201  			break
 20202  		}
 20203  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 20204  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 20205  		v.reset(OpCopy)
 20206  		v.AddArg(v0)
 20207  		v0.AuxInt = i0
 20208  		v0.Aux = s
 20209  		v0.AddArg(p)
 20210  		v0.AddArg(mem)
 20211  		return true
 20212  	}
 20213  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 20214  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 20215  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 20216  	for {
 20217  		t := v.Type
 20218  		_ = v.Args[1]
 20219  		s6 := v.Args[0]
 20220  		if s6.Op != OpPPC64SLDconst {
 20221  			break
 20222  		}
 20223  		if s6.AuxInt != 56 {
 20224  			break
 20225  		}
 20226  		x7 := s6.Args[0]
 20227  		if x7.Op != OpPPC64MOVBZload {
 20228  			break
 20229  		}
 20230  		i7 := x7.AuxInt
 20231  		s := x7.Aux
 20232  		_ = x7.Args[1]
 20233  		p := x7.Args[0]
 20234  		mem := x7.Args[1]
 20235  		o5 := v.Args[1]
 20236  		if o5.Op != OpPPC64OR {
 20237  			break
 20238  		}
 20239  		if o5.Type != t {
 20240  			break
 20241  		}
 20242  		_ = o5.Args[1]
 20243  		o4 := o5.Args[0]
 20244  		if o4.Op != OpPPC64OR {
 20245  			break
 20246  		}
 20247  		if o4.Type != t {
 20248  			break
 20249  		}
 20250  		_ = o4.Args[1]
 20251  		s4 := o4.Args[0]
 20252  		if s4.Op != OpPPC64SLDconst {
 20253  			break
 20254  		}
 20255  		if s4.AuxInt != 40 {
 20256  			break
 20257  		}
 20258  		x5 := s4.Args[0]
 20259  		if x5.Op != OpPPC64MOVBZload {
 20260  			break
 20261  		}
 20262  		i5 := x5.AuxInt
 20263  		if x5.Aux != s {
 20264  			break
 20265  		}
 20266  		_ = x5.Args[1]
 20267  		if p != x5.Args[0] {
 20268  			break
 20269  		}
 20270  		if mem != x5.Args[1] {
 20271  			break
 20272  		}
 20273  		o3 := o4.Args[1]
 20274  		if o3.Op != OpPPC64OR {
 20275  			break
 20276  		}
 20277  		if o3.Type != t {
 20278  			break
 20279  		}
 20280  		_ = o3.Args[1]
 20281  		o2 := o3.Args[0]
 20282  		if o2.Op != OpPPC64OR {
 20283  			break
 20284  		}
 20285  		if o2.Type != t {
 20286  			break
 20287  		}
 20288  		_ = o2.Args[1]
 20289  		o1 := o2.Args[0]
 20290  		if o1.Op != OpPPC64OR {
 20291  			break
 20292  		}
 20293  		if o1.Type != t {
 20294  			break
 20295  		}
 20296  		_ = o1.Args[1]
 20297  		s1 := o1.Args[0]
 20298  		if s1.Op != OpPPC64SLDconst {
 20299  			break
 20300  		}
 20301  		if s1.AuxInt != 16 {
 20302  			break
 20303  		}
 20304  		x2 := s1.Args[0]
 20305  		if x2.Op != OpPPC64MOVBZload {
 20306  			break
 20307  		}
 20308  		i2 := x2.AuxInt
 20309  		if x2.Aux != s {
 20310  			break
 20311  		}
 20312  		_ = x2.Args[1]
 20313  		if p != x2.Args[0] {
 20314  			break
 20315  		}
 20316  		if mem != x2.Args[1] {
 20317  			break
 20318  		}
 20319  		o0 := o1.Args[1]
 20320  		if o0.Op != OpPPC64OR {
 20321  			break
 20322  		}
 20323  		if o0.Type != t {
 20324  			break
 20325  		}
 20326  		_ = o0.Args[1]
 20327  		x0 := o0.Args[0]
 20328  		if x0.Op != OpPPC64MOVBZload {
 20329  			break
 20330  		}
 20331  		i0 := x0.AuxInt
 20332  		if x0.Aux != s {
 20333  			break
 20334  		}
 20335  		_ = x0.Args[1]
 20336  		if p != x0.Args[0] {
 20337  			break
 20338  		}
 20339  		if mem != x0.Args[1] {
 20340  			break
 20341  		}
 20342  		s0 := o0.Args[1]
 20343  		if s0.Op != OpPPC64SLDconst {
 20344  			break
 20345  		}
 20346  		if s0.AuxInt != 8 {
 20347  			break
 20348  		}
 20349  		x1 := s0.Args[0]
 20350  		if x1.Op != OpPPC64MOVBZload {
 20351  			break
 20352  		}
 20353  		i1 := x1.AuxInt
 20354  		if x1.Aux != s {
 20355  			break
 20356  		}
 20357  		_ = x1.Args[1]
 20358  		if p != x1.Args[0] {
 20359  			break
 20360  		}
 20361  		if mem != x1.Args[1] {
 20362  			break
 20363  		}
 20364  		s2 := o2.Args[1]
 20365  		if s2.Op != OpPPC64SLDconst {
 20366  			break
 20367  		}
 20368  		if s2.AuxInt != 24 {
 20369  			break
 20370  		}
 20371  		x3 := s2.Args[0]
 20372  		if x3.Op != OpPPC64MOVBZload {
 20373  			break
 20374  		}
 20375  		i3 := x3.AuxInt
 20376  		if x3.Aux != s {
 20377  			break
 20378  		}
 20379  		_ = x3.Args[1]
 20380  		if p != x3.Args[0] {
 20381  			break
 20382  		}
 20383  		if mem != x3.Args[1] {
 20384  			break
 20385  		}
 20386  		s3 := o3.Args[1]
 20387  		if s3.Op != OpPPC64SLDconst {
 20388  			break
 20389  		}
 20390  		if s3.AuxInt != 32 {
 20391  			break
 20392  		}
 20393  		x4 := s3.Args[0]
 20394  		if x4.Op != OpPPC64MOVBZload {
 20395  			break
 20396  		}
 20397  		i4 := x4.AuxInt
 20398  		if x4.Aux != s {
 20399  			break
 20400  		}
 20401  		_ = x4.Args[1]
 20402  		if p != x4.Args[0] {
 20403  			break
 20404  		}
 20405  		if mem != x4.Args[1] {
 20406  			break
 20407  		}
 20408  		s5 := o5.Args[1]
 20409  		if s5.Op != OpPPC64SLDconst {
 20410  			break
 20411  		}
 20412  		if s5.AuxInt != 48 {
 20413  			break
 20414  		}
 20415  		x6 := s5.Args[0]
 20416  		if x6.Op != OpPPC64MOVBZload {
 20417  			break
 20418  		}
 20419  		i6 := x6.AuxInt
 20420  		if x6.Aux != s {
 20421  			break
 20422  		}
 20423  		_ = x6.Args[1]
 20424  		if p != x6.Args[0] {
 20425  			break
 20426  		}
 20427  		if mem != x6.Args[1] {
 20428  			break
 20429  		}
 20430  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 20431  			break
 20432  		}
 20433  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 20434  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 20435  		v.reset(OpCopy)
 20436  		v.AddArg(v0)
 20437  		v0.AuxInt = i0
 20438  		v0.Aux = s
 20439  		v0.AddArg(p)
 20440  		v0.AddArg(mem)
 20441  		return true
 20442  	}
 20443  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 20444  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 20445  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 20446  	for {
 20447  		t := v.Type
 20448  		_ = v.Args[1]
 20449  		s6 := v.Args[0]
 20450  		if s6.Op != OpPPC64SLDconst {
 20451  			break
 20452  		}
 20453  		if s6.AuxInt != 56 {
 20454  			break
 20455  		}
 20456  		x7 := s6.Args[0]
 20457  		if x7.Op != OpPPC64MOVBZload {
 20458  			break
 20459  		}
 20460  		i7 := x7.AuxInt
 20461  		s := x7.Aux
 20462  		_ = x7.Args[1]
 20463  		p := x7.Args[0]
 20464  		mem := x7.Args[1]
 20465  		o5 := v.Args[1]
 20466  		if o5.Op != OpPPC64OR {
 20467  			break
 20468  		}
 20469  		if o5.Type != t {
 20470  			break
 20471  		}
 20472  		_ = o5.Args[1]
 20473  		o4 := o5.Args[0]
 20474  		if o4.Op != OpPPC64OR {
 20475  			break
 20476  		}
 20477  		if o4.Type != t {
 20478  			break
 20479  		}
 20480  		_ = o4.Args[1]
 20481  		s4 := o4.Args[0]
 20482  		if s4.Op != OpPPC64SLDconst {
 20483  			break
 20484  		}
 20485  		if s4.AuxInt != 40 {
 20486  			break
 20487  		}
 20488  		x5 := s4.Args[0]
 20489  		if x5.Op != OpPPC64MOVBZload {
 20490  			break
 20491  		}
 20492  		i5 := x5.AuxInt
 20493  		if x5.Aux != s {
 20494  			break
 20495  		}
 20496  		_ = x5.Args[1]
 20497  		if p != x5.Args[0] {
 20498  			break
 20499  		}
 20500  		if mem != x5.Args[1] {
 20501  			break
 20502  		}
 20503  		o3 := o4.Args[1]
 20504  		if o3.Op != OpPPC64OR {
 20505  			break
 20506  		}
 20507  		if o3.Type != t {
 20508  			break
 20509  		}
 20510  		_ = o3.Args[1]
 20511  		o2 := o3.Args[0]
 20512  		if o2.Op != OpPPC64OR {
 20513  			break
 20514  		}
 20515  		if o2.Type != t {
 20516  			break
 20517  		}
 20518  		_ = o2.Args[1]
 20519  		o1 := o2.Args[0]
 20520  		if o1.Op != OpPPC64OR {
 20521  			break
 20522  		}
 20523  		if o1.Type != t {
 20524  			break
 20525  		}
 20526  		_ = o1.Args[1]
 20527  		o0 := o1.Args[0]
 20528  		if o0.Op != OpPPC64OR {
 20529  			break
 20530  		}
 20531  		if o0.Type != t {
 20532  			break
 20533  		}
 20534  		_ = o0.Args[1]
 20535  		s0 := o0.Args[0]
 20536  		if s0.Op != OpPPC64SLDconst {
 20537  			break
 20538  		}
 20539  		if s0.AuxInt != 8 {
 20540  			break
 20541  		}
 20542  		x1 := s0.Args[0]
 20543  		if x1.Op != OpPPC64MOVBZload {
 20544  			break
 20545  		}
 20546  		i1 := x1.AuxInt
 20547  		if x1.Aux != s {
 20548  			break
 20549  		}
 20550  		_ = x1.Args[1]
 20551  		if p != x1.Args[0] {
 20552  			break
 20553  		}
 20554  		if mem != x1.Args[1] {
 20555  			break
 20556  		}
 20557  		x0 := o0.Args[1]
 20558  		if x0.Op != OpPPC64MOVBZload {
 20559  			break
 20560  		}
 20561  		i0 := x0.AuxInt
 20562  		if x0.Aux != s {
 20563  			break
 20564  		}
 20565  		_ = x0.Args[1]
 20566  		if p != x0.Args[0] {
 20567  			break
 20568  		}
 20569  		if mem != x0.Args[1] {
 20570  			break
 20571  		}
 20572  		s1 := o1.Args[1]
 20573  		if s1.Op != OpPPC64SLDconst {
 20574  			break
 20575  		}
 20576  		if s1.AuxInt != 16 {
 20577  			break
 20578  		}
 20579  		x2 := s1.Args[0]
 20580  		if x2.Op != OpPPC64MOVBZload {
 20581  			break
 20582  		}
 20583  		i2 := x2.AuxInt
 20584  		if x2.Aux != s {
 20585  			break
 20586  		}
 20587  		_ = x2.Args[1]
 20588  		if p != x2.Args[0] {
 20589  			break
 20590  		}
 20591  		if mem != x2.Args[1] {
 20592  			break
 20593  		}
 20594  		s2 := o2.Args[1]
 20595  		if s2.Op != OpPPC64SLDconst {
 20596  			break
 20597  		}
 20598  		if s2.AuxInt != 24 {
 20599  			break
 20600  		}
 20601  		x3 := s2.Args[0]
 20602  		if x3.Op != OpPPC64MOVBZload {
 20603  			break
 20604  		}
 20605  		i3 := x3.AuxInt
 20606  		if x3.Aux != s {
 20607  			break
 20608  		}
 20609  		_ = x3.Args[1]
 20610  		if p != x3.Args[0] {
 20611  			break
 20612  		}
 20613  		if mem != x3.Args[1] {
 20614  			break
 20615  		}
 20616  		s3 := o3.Args[1]
 20617  		if s3.Op != OpPPC64SLDconst {
 20618  			break
 20619  		}
 20620  		if s3.AuxInt != 32 {
 20621  			break
 20622  		}
 20623  		x4 := s3.Args[0]
 20624  		if x4.Op != OpPPC64MOVBZload {
 20625  			break
 20626  		}
 20627  		i4 := x4.AuxInt
 20628  		if x4.Aux != s {
 20629  			break
 20630  		}
 20631  		_ = x4.Args[1]
 20632  		if p != x4.Args[0] {
 20633  			break
 20634  		}
 20635  		if mem != x4.Args[1] {
 20636  			break
 20637  		}
 20638  		s5 := o5.Args[1]
 20639  		if s5.Op != OpPPC64SLDconst {
 20640  			break
 20641  		}
 20642  		if s5.AuxInt != 48 {
 20643  			break
 20644  		}
 20645  		x6 := s5.Args[0]
 20646  		if x6.Op != OpPPC64MOVBZload {
 20647  			break
 20648  		}
 20649  		i6 := x6.AuxInt
 20650  		if x6.Aux != s {
 20651  			break
 20652  		}
 20653  		_ = x6.Args[1]
 20654  		if p != x6.Args[0] {
 20655  			break
 20656  		}
 20657  		if mem != x6.Args[1] {
 20658  			break
 20659  		}
 20660  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 20661  			break
 20662  		}
 20663  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 20664  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 20665  		v.reset(OpCopy)
 20666  		v.AddArg(v0)
 20667  		v0.AuxInt = i0
 20668  		v0.Aux = s
 20669  		v0.AddArg(p)
 20670  		v0.AddArg(mem)
 20671  		return true
 20672  	}
 20673  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 20674  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 20675  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 20676  	for {
 20677  		t := v.Type
 20678  		_ = v.Args[1]
 20679  		s6 := v.Args[0]
 20680  		if s6.Op != OpPPC64SLDconst {
 20681  			break
 20682  		}
 20683  		if s6.AuxInt != 56 {
 20684  			break
 20685  		}
 20686  		x7 := s6.Args[0]
 20687  		if x7.Op != OpPPC64MOVBZload {
 20688  			break
 20689  		}
 20690  		i7 := x7.AuxInt
 20691  		s := x7.Aux
 20692  		_ = x7.Args[1]
 20693  		p := x7.Args[0]
 20694  		mem := x7.Args[1]
 20695  		o5 := v.Args[1]
 20696  		if o5.Op != OpPPC64OR {
 20697  			break
 20698  		}
 20699  		if o5.Type != t {
 20700  			break
 20701  		}
 20702  		_ = o5.Args[1]
 20703  		o4 := o5.Args[0]
 20704  		if o4.Op != OpPPC64OR {
 20705  			break
 20706  		}
 20707  		if o4.Type != t {
 20708  			break
 20709  		}
 20710  		_ = o4.Args[1]
 20711  		s4 := o4.Args[0]
 20712  		if s4.Op != OpPPC64SLDconst {
 20713  			break
 20714  		}
 20715  		if s4.AuxInt != 40 {
 20716  			break
 20717  		}
 20718  		x5 := s4.Args[0]
 20719  		if x5.Op != OpPPC64MOVBZload {
 20720  			break
 20721  		}
 20722  		i5 := x5.AuxInt
 20723  		if x5.Aux != s {
 20724  			break
 20725  		}
 20726  		_ = x5.Args[1]
 20727  		if p != x5.Args[0] {
 20728  			break
 20729  		}
 20730  		if mem != x5.Args[1] {
 20731  			break
 20732  		}
 20733  		o3 := o4.Args[1]
 20734  		if o3.Op != OpPPC64OR {
 20735  			break
 20736  		}
 20737  		if o3.Type != t {
 20738  			break
 20739  		}
 20740  		_ = o3.Args[1]
 20741  		o2 := o3.Args[0]
 20742  		if o2.Op != OpPPC64OR {
 20743  			break
 20744  		}
 20745  		if o2.Type != t {
 20746  			break
 20747  		}
 20748  		_ = o2.Args[1]
 20749  		o1 := o2.Args[0]
 20750  		if o1.Op != OpPPC64OR {
 20751  			break
 20752  		}
 20753  		if o1.Type != t {
 20754  			break
 20755  		}
 20756  		_ = o1.Args[1]
 20757  		o0 := o1.Args[0]
 20758  		if o0.Op != OpPPC64OR {
 20759  			break
 20760  		}
 20761  		if o0.Type != t {
 20762  			break
 20763  		}
 20764  		_ = o0.Args[1]
 20765  		x0 := o0.Args[0]
 20766  		if x0.Op != OpPPC64MOVBZload {
 20767  			break
 20768  		}
 20769  		i0 := x0.AuxInt
 20770  		if x0.Aux != s {
 20771  			break
 20772  		}
 20773  		_ = x0.Args[1]
 20774  		if p != x0.Args[0] {
 20775  			break
 20776  		}
 20777  		if mem != x0.Args[1] {
 20778  			break
 20779  		}
 20780  		s0 := o0.Args[1]
 20781  		if s0.Op != OpPPC64SLDconst {
 20782  			break
 20783  		}
 20784  		if s0.AuxInt != 8 {
 20785  			break
 20786  		}
 20787  		x1 := s0.Args[0]
 20788  		if x1.Op != OpPPC64MOVBZload {
 20789  			break
 20790  		}
 20791  		i1 := x1.AuxInt
 20792  		if x1.Aux != s {
 20793  			break
 20794  		}
 20795  		_ = x1.Args[1]
 20796  		if p != x1.Args[0] {
 20797  			break
 20798  		}
 20799  		if mem != x1.Args[1] {
 20800  			break
 20801  		}
 20802  		s1 := o1.Args[1]
 20803  		if s1.Op != OpPPC64SLDconst {
 20804  			break
 20805  		}
 20806  		if s1.AuxInt != 16 {
 20807  			break
 20808  		}
 20809  		x2 := s1.Args[0]
 20810  		if x2.Op != OpPPC64MOVBZload {
 20811  			break
 20812  		}
 20813  		i2 := x2.AuxInt
 20814  		if x2.Aux != s {
 20815  			break
 20816  		}
 20817  		_ = x2.Args[1]
 20818  		if p != x2.Args[0] {
 20819  			break
 20820  		}
 20821  		if mem != x2.Args[1] {
 20822  			break
 20823  		}
 20824  		s2 := o2.Args[1]
 20825  		if s2.Op != OpPPC64SLDconst {
 20826  			break
 20827  		}
 20828  		if s2.AuxInt != 24 {
 20829  			break
 20830  		}
 20831  		x3 := s2.Args[0]
 20832  		if x3.Op != OpPPC64MOVBZload {
 20833  			break
 20834  		}
 20835  		i3 := x3.AuxInt
 20836  		if x3.Aux != s {
 20837  			break
 20838  		}
 20839  		_ = x3.Args[1]
 20840  		if p != x3.Args[0] {
 20841  			break
 20842  		}
 20843  		if mem != x3.Args[1] {
 20844  			break
 20845  		}
 20846  		s3 := o3.Args[1]
 20847  		if s3.Op != OpPPC64SLDconst {
 20848  			break
 20849  		}
 20850  		if s3.AuxInt != 32 {
 20851  			break
 20852  		}
 20853  		x4 := s3.Args[0]
 20854  		if x4.Op != OpPPC64MOVBZload {
 20855  			break
 20856  		}
 20857  		i4 := x4.AuxInt
 20858  		if x4.Aux != s {
 20859  			break
 20860  		}
 20861  		_ = x4.Args[1]
 20862  		if p != x4.Args[0] {
 20863  			break
 20864  		}
 20865  		if mem != x4.Args[1] {
 20866  			break
 20867  		}
 20868  		s5 := o5.Args[1]
 20869  		if s5.Op != OpPPC64SLDconst {
 20870  			break
 20871  		}
 20872  		if s5.AuxInt != 48 {
 20873  			break
 20874  		}
 20875  		x6 := s5.Args[0]
 20876  		if x6.Op != OpPPC64MOVBZload {
 20877  			break
 20878  		}
 20879  		i6 := x6.AuxInt
 20880  		if x6.Aux != s {
 20881  			break
 20882  		}
 20883  		_ = x6.Args[1]
 20884  		if p != x6.Args[0] {
 20885  			break
 20886  		}
 20887  		if mem != x6.Args[1] {
 20888  			break
 20889  		}
 20890  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 20891  			break
 20892  		}
 20893  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 20894  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 20895  		v.reset(OpCopy)
 20896  		v.AddArg(v0)
 20897  		v0.AuxInt = i0
 20898  		v0.Aux = s
 20899  		v0.AddArg(p)
 20900  		v0.AddArg(mem)
 20901  		return true
 20902  	}
 20903  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 20904  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 20905  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 20906  	for {
 20907  		t := v.Type
 20908  		_ = v.Args[1]
 20909  		s6 := v.Args[0]
 20910  		if s6.Op != OpPPC64SLDconst {
 20911  			break
 20912  		}
 20913  		if s6.AuxInt != 56 {
 20914  			break
 20915  		}
 20916  		x7 := s6.Args[0]
 20917  		if x7.Op != OpPPC64MOVBZload {
 20918  			break
 20919  		}
 20920  		i7 := x7.AuxInt
 20921  		s := x7.Aux
 20922  		_ = x7.Args[1]
 20923  		p := x7.Args[0]
 20924  		mem := x7.Args[1]
 20925  		o5 := v.Args[1]
 20926  		if o5.Op != OpPPC64OR {
 20927  			break
 20928  		}
 20929  		if o5.Type != t {
 20930  			break
 20931  		}
 20932  		_ = o5.Args[1]
 20933  		o4 := o5.Args[0]
 20934  		if o4.Op != OpPPC64OR {
 20935  			break
 20936  		}
 20937  		if o4.Type != t {
 20938  			break
 20939  		}
 20940  		_ = o4.Args[1]
 20941  		o3 := o4.Args[0]
 20942  		if o3.Op != OpPPC64OR {
 20943  			break
 20944  		}
 20945  		if o3.Type != t {
 20946  			break
 20947  		}
 20948  		_ = o3.Args[1]
 20949  		s3 := o3.Args[0]
 20950  		if s3.Op != OpPPC64SLDconst {
 20951  			break
 20952  		}
 20953  		if s3.AuxInt != 32 {
 20954  			break
 20955  		}
 20956  		x4 := s3.Args[0]
 20957  		if x4.Op != OpPPC64MOVBZload {
 20958  			break
 20959  		}
 20960  		i4 := x4.AuxInt
 20961  		if x4.Aux != s {
 20962  			break
 20963  		}
 20964  		_ = x4.Args[1]
 20965  		if p != x4.Args[0] {
 20966  			break
 20967  		}
 20968  		if mem != x4.Args[1] {
 20969  			break
 20970  		}
 20971  		o2 := o3.Args[1]
 20972  		if o2.Op != OpPPC64OR {
 20973  			break
 20974  		}
 20975  		if o2.Type != t {
 20976  			break
 20977  		}
 20978  		_ = o2.Args[1]
 20979  		s2 := o2.Args[0]
 20980  		if s2.Op != OpPPC64SLDconst {
 20981  			break
 20982  		}
 20983  		if s2.AuxInt != 24 {
 20984  			break
 20985  		}
 20986  		x3 := s2.Args[0]
 20987  		if x3.Op != OpPPC64MOVBZload {
 20988  			break
 20989  		}
 20990  		i3 := x3.AuxInt
 20991  		if x3.Aux != s {
 20992  			break
 20993  		}
 20994  		_ = x3.Args[1]
 20995  		if p != x3.Args[0] {
 20996  			break
 20997  		}
 20998  		if mem != x3.Args[1] {
 20999  			break
 21000  		}
 21001  		o1 := o2.Args[1]
 21002  		if o1.Op != OpPPC64OR {
 21003  			break
 21004  		}
 21005  		if o1.Type != t {
 21006  			break
 21007  		}
 21008  		_ = o1.Args[1]
 21009  		s1 := o1.Args[0]
 21010  		if s1.Op != OpPPC64SLDconst {
 21011  			break
 21012  		}
 21013  		if s1.AuxInt != 16 {
 21014  			break
 21015  		}
 21016  		x2 := s1.Args[0]
 21017  		if x2.Op != OpPPC64MOVBZload {
 21018  			break
 21019  		}
 21020  		i2 := x2.AuxInt
 21021  		if x2.Aux != s {
 21022  			break
 21023  		}
 21024  		_ = x2.Args[1]
 21025  		if p != x2.Args[0] {
 21026  			break
 21027  		}
 21028  		if mem != x2.Args[1] {
 21029  			break
 21030  		}
 21031  		o0 := o1.Args[1]
 21032  		if o0.Op != OpPPC64OR {
 21033  			break
 21034  		}
 21035  		if o0.Type != t {
 21036  			break
 21037  		}
 21038  		_ = o0.Args[1]
 21039  		s0 := o0.Args[0]
 21040  		if s0.Op != OpPPC64SLDconst {
 21041  			break
 21042  		}
 21043  		if s0.AuxInt != 8 {
 21044  			break
 21045  		}
 21046  		x1 := s0.Args[0]
 21047  		if x1.Op != OpPPC64MOVBZload {
 21048  			break
 21049  		}
 21050  		i1 := x1.AuxInt
 21051  		if x1.Aux != s {
 21052  			break
 21053  		}
 21054  		_ = x1.Args[1]
 21055  		if p != x1.Args[0] {
 21056  			break
 21057  		}
 21058  		if mem != x1.Args[1] {
 21059  			break
 21060  		}
 21061  		x0 := o0.Args[1]
 21062  		if x0.Op != OpPPC64MOVBZload {
 21063  			break
 21064  		}
 21065  		i0 := x0.AuxInt
 21066  		if x0.Aux != s {
 21067  			break
 21068  		}
 21069  		_ = x0.Args[1]
 21070  		if p != x0.Args[0] {
 21071  			break
 21072  		}
 21073  		if mem != x0.Args[1] {
 21074  			break
 21075  		}
 21076  		s4 := o4.Args[1]
 21077  		if s4.Op != OpPPC64SLDconst {
 21078  			break
 21079  		}
 21080  		if s4.AuxInt != 40 {
 21081  			break
 21082  		}
 21083  		x5 := s4.Args[0]
 21084  		if x5.Op != OpPPC64MOVBZload {
 21085  			break
 21086  		}
 21087  		i5 := x5.AuxInt
 21088  		if x5.Aux != s {
 21089  			break
 21090  		}
 21091  		_ = x5.Args[1]
 21092  		if p != x5.Args[0] {
 21093  			break
 21094  		}
 21095  		if mem != x5.Args[1] {
 21096  			break
 21097  		}
 21098  		s5 := o5.Args[1]
 21099  		if s5.Op != OpPPC64SLDconst {
 21100  			break
 21101  		}
 21102  		if s5.AuxInt != 48 {
 21103  			break
 21104  		}
 21105  		x6 := s5.Args[0]
 21106  		if x6.Op != OpPPC64MOVBZload {
 21107  			break
 21108  		}
 21109  		i6 := x6.AuxInt
 21110  		if x6.Aux != s {
 21111  			break
 21112  		}
 21113  		_ = x6.Args[1]
 21114  		if p != x6.Args[0] {
 21115  			break
 21116  		}
 21117  		if mem != x6.Args[1] {
 21118  			break
 21119  		}
 21120  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 21121  			break
 21122  		}
 21123  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 21124  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 21125  		v.reset(OpCopy)
 21126  		v.AddArg(v0)
 21127  		v0.AuxInt = i0
 21128  		v0.Aux = s
 21129  		v0.AddArg(p)
 21130  		v0.AddArg(mem)
 21131  		return true
 21132  	}
 21133  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 21134  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 21135  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 21136  	for {
 21137  		t := v.Type
 21138  		_ = v.Args[1]
 21139  		s6 := v.Args[0]
 21140  		if s6.Op != OpPPC64SLDconst {
 21141  			break
 21142  		}
 21143  		if s6.AuxInt != 56 {
 21144  			break
 21145  		}
 21146  		x7 := s6.Args[0]
 21147  		if x7.Op != OpPPC64MOVBZload {
 21148  			break
 21149  		}
 21150  		i7 := x7.AuxInt
 21151  		s := x7.Aux
 21152  		_ = x7.Args[1]
 21153  		p := x7.Args[0]
 21154  		mem := x7.Args[1]
 21155  		o5 := v.Args[1]
 21156  		if o5.Op != OpPPC64OR {
 21157  			break
 21158  		}
 21159  		if o5.Type != t {
 21160  			break
 21161  		}
 21162  		_ = o5.Args[1]
 21163  		o4 := o5.Args[0]
 21164  		if o4.Op != OpPPC64OR {
 21165  			break
 21166  		}
 21167  		if o4.Type != t {
 21168  			break
 21169  		}
 21170  		_ = o4.Args[1]
 21171  		o3 := o4.Args[0]
 21172  		if o3.Op != OpPPC64OR {
 21173  			break
 21174  		}
 21175  		if o3.Type != t {
 21176  			break
 21177  		}
 21178  		_ = o3.Args[1]
 21179  		s3 := o3.Args[0]
 21180  		if s3.Op != OpPPC64SLDconst {
 21181  			break
 21182  		}
 21183  		if s3.AuxInt != 32 {
 21184  			break
 21185  		}
 21186  		x4 := s3.Args[0]
 21187  		if x4.Op != OpPPC64MOVBZload {
 21188  			break
 21189  		}
 21190  		i4 := x4.AuxInt
 21191  		if x4.Aux != s {
 21192  			break
 21193  		}
 21194  		_ = x4.Args[1]
 21195  		if p != x4.Args[0] {
 21196  			break
 21197  		}
 21198  		if mem != x4.Args[1] {
 21199  			break
 21200  		}
 21201  		o2 := o3.Args[1]
 21202  		if o2.Op != OpPPC64OR {
 21203  			break
 21204  		}
 21205  		if o2.Type != t {
 21206  			break
 21207  		}
 21208  		_ = o2.Args[1]
 21209  		s2 := o2.Args[0]
 21210  		if s2.Op != OpPPC64SLDconst {
 21211  			break
 21212  		}
 21213  		if s2.AuxInt != 24 {
 21214  			break
 21215  		}
 21216  		x3 := s2.Args[0]
 21217  		if x3.Op != OpPPC64MOVBZload {
 21218  			break
 21219  		}
 21220  		i3 := x3.AuxInt
 21221  		if x3.Aux != s {
 21222  			break
 21223  		}
 21224  		_ = x3.Args[1]
 21225  		if p != x3.Args[0] {
 21226  			break
 21227  		}
 21228  		if mem != x3.Args[1] {
 21229  			break
 21230  		}
 21231  		o1 := o2.Args[1]
 21232  		if o1.Op != OpPPC64OR {
 21233  			break
 21234  		}
 21235  		if o1.Type != t {
 21236  			break
 21237  		}
 21238  		_ = o1.Args[1]
 21239  		s1 := o1.Args[0]
 21240  		if s1.Op != OpPPC64SLDconst {
 21241  			break
 21242  		}
 21243  		if s1.AuxInt != 16 {
 21244  			break
 21245  		}
 21246  		x2 := s1.Args[0]
 21247  		if x2.Op != OpPPC64MOVBZload {
 21248  			break
 21249  		}
 21250  		i2 := x2.AuxInt
 21251  		if x2.Aux != s {
 21252  			break
 21253  		}
 21254  		_ = x2.Args[1]
 21255  		if p != x2.Args[0] {
 21256  			break
 21257  		}
 21258  		if mem != x2.Args[1] {
 21259  			break
 21260  		}
 21261  		o0 := o1.Args[1]
 21262  		if o0.Op != OpPPC64OR {
 21263  			break
 21264  		}
 21265  		if o0.Type != t {
 21266  			break
 21267  		}
 21268  		_ = o0.Args[1]
 21269  		x0 := o0.Args[0]
 21270  		if x0.Op != OpPPC64MOVBZload {
 21271  			break
 21272  		}
 21273  		i0 := x0.AuxInt
 21274  		if x0.Aux != s {
 21275  			break
 21276  		}
 21277  		_ = x0.Args[1]
 21278  		if p != x0.Args[0] {
 21279  			break
 21280  		}
 21281  		if mem != x0.Args[1] {
 21282  			break
 21283  		}
 21284  		s0 := o0.Args[1]
 21285  		if s0.Op != OpPPC64SLDconst {
 21286  			break
 21287  		}
 21288  		if s0.AuxInt != 8 {
 21289  			break
 21290  		}
 21291  		x1 := s0.Args[0]
 21292  		if x1.Op != OpPPC64MOVBZload {
 21293  			break
 21294  		}
 21295  		i1 := x1.AuxInt
 21296  		if x1.Aux != s {
 21297  			break
 21298  		}
 21299  		_ = x1.Args[1]
 21300  		if p != x1.Args[0] {
 21301  			break
 21302  		}
 21303  		if mem != x1.Args[1] {
 21304  			break
 21305  		}
 21306  		s4 := o4.Args[1]
 21307  		if s4.Op != OpPPC64SLDconst {
 21308  			break
 21309  		}
 21310  		if s4.AuxInt != 40 {
 21311  			break
 21312  		}
 21313  		x5 := s4.Args[0]
 21314  		if x5.Op != OpPPC64MOVBZload {
 21315  			break
 21316  		}
 21317  		i5 := x5.AuxInt
 21318  		if x5.Aux != s {
 21319  			break
 21320  		}
 21321  		_ = x5.Args[1]
 21322  		if p != x5.Args[0] {
 21323  			break
 21324  		}
 21325  		if mem != x5.Args[1] {
 21326  			break
 21327  		}
 21328  		s5 := o5.Args[1]
 21329  		if s5.Op != OpPPC64SLDconst {
 21330  			break
 21331  		}
 21332  		if s5.AuxInt != 48 {
 21333  			break
 21334  		}
 21335  		x6 := s5.Args[0]
 21336  		if x6.Op != OpPPC64MOVBZload {
 21337  			break
 21338  		}
 21339  		i6 := x6.AuxInt
 21340  		if x6.Aux != s {
 21341  			break
 21342  		}
 21343  		_ = x6.Args[1]
 21344  		if p != x6.Args[0] {
 21345  			break
 21346  		}
 21347  		if mem != x6.Args[1] {
 21348  			break
 21349  		}
 21350  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 21351  			break
 21352  		}
 21353  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 21354  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 21355  		v.reset(OpCopy)
 21356  		v.AddArg(v0)
 21357  		v0.AuxInt = i0
 21358  		v0.Aux = s
 21359  		v0.AddArg(p)
 21360  		v0.AddArg(mem)
 21361  		return true
 21362  	}
 21363  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 21364  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 21365  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 21366  	for {
 21367  		t := v.Type
 21368  		_ = v.Args[1]
 21369  		s6 := v.Args[0]
 21370  		if s6.Op != OpPPC64SLDconst {
 21371  			break
 21372  		}
 21373  		if s6.AuxInt != 56 {
 21374  			break
 21375  		}
 21376  		x7 := s6.Args[0]
 21377  		if x7.Op != OpPPC64MOVBZload {
 21378  			break
 21379  		}
 21380  		i7 := x7.AuxInt
 21381  		s := x7.Aux
 21382  		_ = x7.Args[1]
 21383  		p := x7.Args[0]
 21384  		mem := x7.Args[1]
 21385  		o5 := v.Args[1]
 21386  		if o5.Op != OpPPC64OR {
 21387  			break
 21388  		}
 21389  		if o5.Type != t {
 21390  			break
 21391  		}
 21392  		_ = o5.Args[1]
 21393  		o4 := o5.Args[0]
 21394  		if o4.Op != OpPPC64OR {
 21395  			break
 21396  		}
 21397  		if o4.Type != t {
 21398  			break
 21399  		}
 21400  		_ = o4.Args[1]
 21401  		o3 := o4.Args[0]
 21402  		if o3.Op != OpPPC64OR {
 21403  			break
 21404  		}
 21405  		if o3.Type != t {
 21406  			break
 21407  		}
 21408  		_ = o3.Args[1]
 21409  		s3 := o3.Args[0]
 21410  		if s3.Op != OpPPC64SLDconst {
 21411  			break
 21412  		}
 21413  		if s3.AuxInt != 32 {
 21414  			break
 21415  		}
 21416  		x4 := s3.Args[0]
 21417  		if x4.Op != OpPPC64MOVBZload {
 21418  			break
 21419  		}
 21420  		i4 := x4.AuxInt
 21421  		if x4.Aux != s {
 21422  			break
 21423  		}
 21424  		_ = x4.Args[1]
 21425  		if p != x4.Args[0] {
 21426  			break
 21427  		}
 21428  		if mem != x4.Args[1] {
 21429  			break
 21430  		}
 21431  		o2 := o3.Args[1]
 21432  		if o2.Op != OpPPC64OR {
 21433  			break
 21434  		}
 21435  		if o2.Type != t {
 21436  			break
 21437  		}
 21438  		_ = o2.Args[1]
 21439  		s2 := o2.Args[0]
 21440  		if s2.Op != OpPPC64SLDconst {
 21441  			break
 21442  		}
 21443  		if s2.AuxInt != 24 {
 21444  			break
 21445  		}
 21446  		x3 := s2.Args[0]
 21447  		if x3.Op != OpPPC64MOVBZload {
 21448  			break
 21449  		}
 21450  		i3 := x3.AuxInt
 21451  		if x3.Aux != s {
 21452  			break
 21453  		}
 21454  		_ = x3.Args[1]
 21455  		if p != x3.Args[0] {
 21456  			break
 21457  		}
 21458  		if mem != x3.Args[1] {
 21459  			break
 21460  		}
 21461  		o1 := o2.Args[1]
 21462  		if o1.Op != OpPPC64OR {
 21463  			break
 21464  		}
 21465  		if o1.Type != t {
 21466  			break
 21467  		}
 21468  		_ = o1.Args[1]
 21469  		o0 := o1.Args[0]
 21470  		if o0.Op != OpPPC64OR {
 21471  			break
 21472  		}
 21473  		if o0.Type != t {
 21474  			break
 21475  		}
 21476  		_ = o0.Args[1]
 21477  		s0 := o0.Args[0]
 21478  		if s0.Op != OpPPC64SLDconst {
 21479  			break
 21480  		}
 21481  		if s0.AuxInt != 8 {
 21482  			break
 21483  		}
 21484  		x1 := s0.Args[0]
 21485  		if x1.Op != OpPPC64MOVBZload {
 21486  			break
 21487  		}
 21488  		i1 := x1.AuxInt
 21489  		if x1.Aux != s {
 21490  			break
 21491  		}
 21492  		_ = x1.Args[1]
 21493  		if p != x1.Args[0] {
 21494  			break
 21495  		}
 21496  		if mem != x1.Args[1] {
 21497  			break
 21498  		}
 21499  		x0 := o0.Args[1]
 21500  		if x0.Op != OpPPC64MOVBZload {
 21501  			break
 21502  		}
 21503  		i0 := x0.AuxInt
 21504  		if x0.Aux != s {
 21505  			break
 21506  		}
 21507  		_ = x0.Args[1]
 21508  		if p != x0.Args[0] {
 21509  			break
 21510  		}
 21511  		if mem != x0.Args[1] {
 21512  			break
 21513  		}
 21514  		s1 := o1.Args[1]
 21515  		if s1.Op != OpPPC64SLDconst {
 21516  			break
 21517  		}
 21518  		if s1.AuxInt != 16 {
 21519  			break
 21520  		}
 21521  		x2 := s1.Args[0]
 21522  		if x2.Op != OpPPC64MOVBZload {
 21523  			break
 21524  		}
 21525  		i2 := x2.AuxInt
 21526  		if x2.Aux != s {
 21527  			break
 21528  		}
 21529  		_ = x2.Args[1]
 21530  		if p != x2.Args[0] {
 21531  			break
 21532  		}
 21533  		if mem != x2.Args[1] {
 21534  			break
 21535  		}
 21536  		s4 := o4.Args[1]
 21537  		if s4.Op != OpPPC64SLDconst {
 21538  			break
 21539  		}
 21540  		if s4.AuxInt != 40 {
 21541  			break
 21542  		}
 21543  		x5 := s4.Args[0]
 21544  		if x5.Op != OpPPC64MOVBZload {
 21545  			break
 21546  		}
 21547  		i5 := x5.AuxInt
 21548  		if x5.Aux != s {
 21549  			break
 21550  		}
 21551  		_ = x5.Args[1]
 21552  		if p != x5.Args[0] {
 21553  			break
 21554  		}
 21555  		if mem != x5.Args[1] {
 21556  			break
 21557  		}
 21558  		s5 := o5.Args[1]
 21559  		if s5.Op != OpPPC64SLDconst {
 21560  			break
 21561  		}
 21562  		if s5.AuxInt != 48 {
 21563  			break
 21564  		}
 21565  		x6 := s5.Args[0]
 21566  		if x6.Op != OpPPC64MOVBZload {
 21567  			break
 21568  		}
 21569  		i6 := x6.AuxInt
 21570  		if x6.Aux != s {
 21571  			break
 21572  		}
 21573  		_ = x6.Args[1]
 21574  		if p != x6.Args[0] {
 21575  			break
 21576  		}
 21577  		if mem != x6.Args[1] {
 21578  			break
 21579  		}
 21580  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 21581  			break
 21582  		}
 21583  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 21584  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 21585  		v.reset(OpCopy)
 21586  		v.AddArg(v0)
 21587  		v0.AuxInt = i0
 21588  		v0.Aux = s
 21589  		v0.AddArg(p)
 21590  		v0.AddArg(mem)
 21591  		return true
 21592  	}
 21593  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 21594  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 21595  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 21596  	for {
 21597  		t := v.Type
 21598  		_ = v.Args[1]
 21599  		s6 := v.Args[0]
 21600  		if s6.Op != OpPPC64SLDconst {
 21601  			break
 21602  		}
 21603  		if s6.AuxInt != 56 {
 21604  			break
 21605  		}
 21606  		x7 := s6.Args[0]
 21607  		if x7.Op != OpPPC64MOVBZload {
 21608  			break
 21609  		}
 21610  		i7 := x7.AuxInt
 21611  		s := x7.Aux
 21612  		_ = x7.Args[1]
 21613  		p := x7.Args[0]
 21614  		mem := x7.Args[1]
 21615  		o5 := v.Args[1]
 21616  		if o5.Op != OpPPC64OR {
 21617  			break
 21618  		}
 21619  		if o5.Type != t {
 21620  			break
 21621  		}
 21622  		_ = o5.Args[1]
 21623  		o4 := o5.Args[0]
 21624  		if o4.Op != OpPPC64OR {
 21625  			break
 21626  		}
 21627  		if o4.Type != t {
 21628  			break
 21629  		}
 21630  		_ = o4.Args[1]
 21631  		o3 := o4.Args[0]
 21632  		if o3.Op != OpPPC64OR {
 21633  			break
 21634  		}
 21635  		if o3.Type != t {
 21636  			break
 21637  		}
 21638  		_ = o3.Args[1]
 21639  		s3 := o3.Args[0]
 21640  		if s3.Op != OpPPC64SLDconst {
 21641  			break
 21642  		}
 21643  		if s3.AuxInt != 32 {
 21644  			break
 21645  		}
 21646  		x4 := s3.Args[0]
 21647  		if x4.Op != OpPPC64MOVBZload {
 21648  			break
 21649  		}
 21650  		i4 := x4.AuxInt
 21651  		if x4.Aux != s {
 21652  			break
 21653  		}
 21654  		_ = x4.Args[1]
 21655  		if p != x4.Args[0] {
 21656  			break
 21657  		}
 21658  		if mem != x4.Args[1] {
 21659  			break
 21660  		}
 21661  		o2 := o3.Args[1]
 21662  		if o2.Op != OpPPC64OR {
 21663  			break
 21664  		}
 21665  		if o2.Type != t {
 21666  			break
 21667  		}
 21668  		_ = o2.Args[1]
 21669  		s2 := o2.Args[0]
 21670  		if s2.Op != OpPPC64SLDconst {
 21671  			break
 21672  		}
 21673  		if s2.AuxInt != 24 {
 21674  			break
 21675  		}
 21676  		x3 := s2.Args[0]
 21677  		if x3.Op != OpPPC64MOVBZload {
 21678  			break
 21679  		}
 21680  		i3 := x3.AuxInt
 21681  		if x3.Aux != s {
 21682  			break
 21683  		}
 21684  		_ = x3.Args[1]
 21685  		if p != x3.Args[0] {
 21686  			break
 21687  		}
 21688  		if mem != x3.Args[1] {
 21689  			break
 21690  		}
 21691  		o1 := o2.Args[1]
 21692  		if o1.Op != OpPPC64OR {
 21693  			break
 21694  		}
 21695  		if o1.Type != t {
 21696  			break
 21697  		}
 21698  		_ = o1.Args[1]
 21699  		o0 := o1.Args[0]
 21700  		if o0.Op != OpPPC64OR {
 21701  			break
 21702  		}
 21703  		if o0.Type != t {
 21704  			break
 21705  		}
 21706  		_ = o0.Args[1]
 21707  		x0 := o0.Args[0]
 21708  		if x0.Op != OpPPC64MOVBZload {
 21709  			break
 21710  		}
 21711  		i0 := x0.AuxInt
 21712  		if x0.Aux != s {
 21713  			break
 21714  		}
 21715  		_ = x0.Args[1]
 21716  		if p != x0.Args[0] {
 21717  			break
 21718  		}
 21719  		if mem != x0.Args[1] {
 21720  			break
 21721  		}
 21722  		s0 := o0.Args[1]
 21723  		if s0.Op != OpPPC64SLDconst {
 21724  			break
 21725  		}
 21726  		if s0.AuxInt != 8 {
 21727  			break
 21728  		}
 21729  		x1 := s0.Args[0]
 21730  		if x1.Op != OpPPC64MOVBZload {
 21731  			break
 21732  		}
 21733  		i1 := x1.AuxInt
 21734  		if x1.Aux != s {
 21735  			break
 21736  		}
 21737  		_ = x1.Args[1]
 21738  		if p != x1.Args[0] {
 21739  			break
 21740  		}
 21741  		if mem != x1.Args[1] {
 21742  			break
 21743  		}
 21744  		s1 := o1.Args[1]
 21745  		if s1.Op != OpPPC64SLDconst {
 21746  			break
 21747  		}
 21748  		if s1.AuxInt != 16 {
 21749  			break
 21750  		}
 21751  		x2 := s1.Args[0]
 21752  		if x2.Op != OpPPC64MOVBZload {
 21753  			break
 21754  		}
 21755  		i2 := x2.AuxInt
 21756  		if x2.Aux != s {
 21757  			break
 21758  		}
 21759  		_ = x2.Args[1]
 21760  		if p != x2.Args[0] {
 21761  			break
 21762  		}
 21763  		if mem != x2.Args[1] {
 21764  			break
 21765  		}
 21766  		s4 := o4.Args[1]
 21767  		if s4.Op != OpPPC64SLDconst {
 21768  			break
 21769  		}
 21770  		if s4.AuxInt != 40 {
 21771  			break
 21772  		}
 21773  		x5 := s4.Args[0]
 21774  		if x5.Op != OpPPC64MOVBZload {
 21775  			break
 21776  		}
 21777  		i5 := x5.AuxInt
 21778  		if x5.Aux != s {
 21779  			break
 21780  		}
 21781  		_ = x5.Args[1]
 21782  		if p != x5.Args[0] {
 21783  			break
 21784  		}
 21785  		if mem != x5.Args[1] {
 21786  			break
 21787  		}
 21788  		s5 := o5.Args[1]
 21789  		if s5.Op != OpPPC64SLDconst {
 21790  			break
 21791  		}
 21792  		if s5.AuxInt != 48 {
 21793  			break
 21794  		}
 21795  		x6 := s5.Args[0]
 21796  		if x6.Op != OpPPC64MOVBZload {
 21797  			break
 21798  		}
 21799  		i6 := x6.AuxInt
 21800  		if x6.Aux != s {
 21801  			break
 21802  		}
 21803  		_ = x6.Args[1]
 21804  		if p != x6.Args[0] {
 21805  			break
 21806  		}
 21807  		if mem != x6.Args[1] {
 21808  			break
 21809  		}
 21810  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 21811  			break
 21812  		}
 21813  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 21814  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 21815  		v.reset(OpCopy)
 21816  		v.AddArg(v0)
 21817  		v0.AuxInt = i0
 21818  		v0.Aux = s
 21819  		v0.AddArg(p)
 21820  		v0.AddArg(mem)
 21821  		return true
 21822  	}
 21823  	return false
 21824  }
 21825  func rewriteValuePPC64_OpPPC64OR_70(v *Value) bool {
 21826  	b := v.Block
 21827  	_ = b
 21828  	config := b.Func.Config
 21829  	_ = config
 21830  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 21831  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 21832  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 21833  	for {
 21834  		t := v.Type
 21835  		_ = v.Args[1]
 21836  		s6 := v.Args[0]
 21837  		if s6.Op != OpPPC64SLDconst {
 21838  			break
 21839  		}
 21840  		if s6.AuxInt != 56 {
 21841  			break
 21842  		}
 21843  		x7 := s6.Args[0]
 21844  		if x7.Op != OpPPC64MOVBZload {
 21845  			break
 21846  		}
 21847  		i7 := x7.AuxInt
 21848  		s := x7.Aux
 21849  		_ = x7.Args[1]
 21850  		p := x7.Args[0]
 21851  		mem := x7.Args[1]
 21852  		o5 := v.Args[1]
 21853  		if o5.Op != OpPPC64OR {
 21854  			break
 21855  		}
 21856  		if o5.Type != t {
 21857  			break
 21858  		}
 21859  		_ = o5.Args[1]
 21860  		o4 := o5.Args[0]
 21861  		if o4.Op != OpPPC64OR {
 21862  			break
 21863  		}
 21864  		if o4.Type != t {
 21865  			break
 21866  		}
 21867  		_ = o4.Args[1]
 21868  		o3 := o4.Args[0]
 21869  		if o3.Op != OpPPC64OR {
 21870  			break
 21871  		}
 21872  		if o3.Type != t {
 21873  			break
 21874  		}
 21875  		_ = o3.Args[1]
 21876  		s3 := o3.Args[0]
 21877  		if s3.Op != OpPPC64SLDconst {
 21878  			break
 21879  		}
 21880  		if s3.AuxInt != 32 {
 21881  			break
 21882  		}
 21883  		x4 := s3.Args[0]
 21884  		if x4.Op != OpPPC64MOVBZload {
 21885  			break
 21886  		}
 21887  		i4 := x4.AuxInt
 21888  		if x4.Aux != s {
 21889  			break
 21890  		}
 21891  		_ = x4.Args[1]
 21892  		if p != x4.Args[0] {
 21893  			break
 21894  		}
 21895  		if mem != x4.Args[1] {
 21896  			break
 21897  		}
 21898  		o2 := o3.Args[1]
 21899  		if o2.Op != OpPPC64OR {
 21900  			break
 21901  		}
 21902  		if o2.Type != t {
 21903  			break
 21904  		}
 21905  		_ = o2.Args[1]
 21906  		o1 := o2.Args[0]
 21907  		if o1.Op != OpPPC64OR {
 21908  			break
 21909  		}
 21910  		if o1.Type != t {
 21911  			break
 21912  		}
 21913  		_ = o1.Args[1]
 21914  		s1 := o1.Args[0]
 21915  		if s1.Op != OpPPC64SLDconst {
 21916  			break
 21917  		}
 21918  		if s1.AuxInt != 16 {
 21919  			break
 21920  		}
 21921  		x2 := s1.Args[0]
 21922  		if x2.Op != OpPPC64MOVBZload {
 21923  			break
 21924  		}
 21925  		i2 := x2.AuxInt
 21926  		if x2.Aux != s {
 21927  			break
 21928  		}
 21929  		_ = x2.Args[1]
 21930  		if p != x2.Args[0] {
 21931  			break
 21932  		}
 21933  		if mem != x2.Args[1] {
 21934  			break
 21935  		}
 21936  		o0 := o1.Args[1]
 21937  		if o0.Op != OpPPC64OR {
 21938  			break
 21939  		}
 21940  		if o0.Type != t {
 21941  			break
 21942  		}
 21943  		_ = o0.Args[1]
 21944  		s0 := o0.Args[0]
 21945  		if s0.Op != OpPPC64SLDconst {
 21946  			break
 21947  		}
 21948  		if s0.AuxInt != 8 {
 21949  			break
 21950  		}
 21951  		x1 := s0.Args[0]
 21952  		if x1.Op != OpPPC64MOVBZload {
 21953  			break
 21954  		}
 21955  		i1 := x1.AuxInt
 21956  		if x1.Aux != s {
 21957  			break
 21958  		}
 21959  		_ = x1.Args[1]
 21960  		if p != x1.Args[0] {
 21961  			break
 21962  		}
 21963  		if mem != x1.Args[1] {
 21964  			break
 21965  		}
 21966  		x0 := o0.Args[1]
 21967  		if x0.Op != OpPPC64MOVBZload {
 21968  			break
 21969  		}
 21970  		i0 := x0.AuxInt
 21971  		if x0.Aux != s {
 21972  			break
 21973  		}
 21974  		_ = x0.Args[1]
 21975  		if p != x0.Args[0] {
 21976  			break
 21977  		}
 21978  		if mem != x0.Args[1] {
 21979  			break
 21980  		}
 21981  		s2 := o2.Args[1]
 21982  		if s2.Op != OpPPC64SLDconst {
 21983  			break
 21984  		}
 21985  		if s2.AuxInt != 24 {
 21986  			break
 21987  		}
 21988  		x3 := s2.Args[0]
 21989  		if x3.Op != OpPPC64MOVBZload {
 21990  			break
 21991  		}
 21992  		i3 := x3.AuxInt
 21993  		if x3.Aux != s {
 21994  			break
 21995  		}
 21996  		_ = x3.Args[1]
 21997  		if p != x3.Args[0] {
 21998  			break
 21999  		}
 22000  		if mem != x3.Args[1] {
 22001  			break
 22002  		}
 22003  		s4 := o4.Args[1]
 22004  		if s4.Op != OpPPC64SLDconst {
 22005  			break
 22006  		}
 22007  		if s4.AuxInt != 40 {
 22008  			break
 22009  		}
 22010  		x5 := s4.Args[0]
 22011  		if x5.Op != OpPPC64MOVBZload {
 22012  			break
 22013  		}
 22014  		i5 := x5.AuxInt
 22015  		if x5.Aux != s {
 22016  			break
 22017  		}
 22018  		_ = x5.Args[1]
 22019  		if p != x5.Args[0] {
 22020  			break
 22021  		}
 22022  		if mem != x5.Args[1] {
 22023  			break
 22024  		}
 22025  		s5 := o5.Args[1]
 22026  		if s5.Op != OpPPC64SLDconst {
 22027  			break
 22028  		}
 22029  		if s5.AuxInt != 48 {
 22030  			break
 22031  		}
 22032  		x6 := s5.Args[0]
 22033  		if x6.Op != OpPPC64MOVBZload {
 22034  			break
 22035  		}
 22036  		i6 := x6.AuxInt
 22037  		if x6.Aux != s {
 22038  			break
 22039  		}
 22040  		_ = x6.Args[1]
 22041  		if p != x6.Args[0] {
 22042  			break
 22043  		}
 22044  		if mem != x6.Args[1] {
 22045  			break
 22046  		}
 22047  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22048  			break
 22049  		}
 22050  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22051  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22052  		v.reset(OpCopy)
 22053  		v.AddArg(v0)
 22054  		v0.AuxInt = i0
 22055  		v0.Aux = s
 22056  		v0.AddArg(p)
 22057  		v0.AddArg(mem)
 22058  		return true
 22059  	}
 22060  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22061  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22062  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22063  	for {
 22064  		t := v.Type
 22065  		_ = v.Args[1]
 22066  		s6 := v.Args[0]
 22067  		if s6.Op != OpPPC64SLDconst {
 22068  			break
 22069  		}
 22070  		if s6.AuxInt != 56 {
 22071  			break
 22072  		}
 22073  		x7 := s6.Args[0]
 22074  		if x7.Op != OpPPC64MOVBZload {
 22075  			break
 22076  		}
 22077  		i7 := x7.AuxInt
 22078  		s := x7.Aux
 22079  		_ = x7.Args[1]
 22080  		p := x7.Args[0]
 22081  		mem := x7.Args[1]
 22082  		o5 := v.Args[1]
 22083  		if o5.Op != OpPPC64OR {
 22084  			break
 22085  		}
 22086  		if o5.Type != t {
 22087  			break
 22088  		}
 22089  		_ = o5.Args[1]
 22090  		o4 := o5.Args[0]
 22091  		if o4.Op != OpPPC64OR {
 22092  			break
 22093  		}
 22094  		if o4.Type != t {
 22095  			break
 22096  		}
 22097  		_ = o4.Args[1]
 22098  		o3 := o4.Args[0]
 22099  		if o3.Op != OpPPC64OR {
 22100  			break
 22101  		}
 22102  		if o3.Type != t {
 22103  			break
 22104  		}
 22105  		_ = o3.Args[1]
 22106  		s3 := o3.Args[0]
 22107  		if s3.Op != OpPPC64SLDconst {
 22108  			break
 22109  		}
 22110  		if s3.AuxInt != 32 {
 22111  			break
 22112  		}
 22113  		x4 := s3.Args[0]
 22114  		if x4.Op != OpPPC64MOVBZload {
 22115  			break
 22116  		}
 22117  		i4 := x4.AuxInt
 22118  		if x4.Aux != s {
 22119  			break
 22120  		}
 22121  		_ = x4.Args[1]
 22122  		if p != x4.Args[0] {
 22123  			break
 22124  		}
 22125  		if mem != x4.Args[1] {
 22126  			break
 22127  		}
 22128  		o2 := o3.Args[1]
 22129  		if o2.Op != OpPPC64OR {
 22130  			break
 22131  		}
 22132  		if o2.Type != t {
 22133  			break
 22134  		}
 22135  		_ = o2.Args[1]
 22136  		o1 := o2.Args[0]
 22137  		if o1.Op != OpPPC64OR {
 22138  			break
 22139  		}
 22140  		if o1.Type != t {
 22141  			break
 22142  		}
 22143  		_ = o1.Args[1]
 22144  		s1 := o1.Args[0]
 22145  		if s1.Op != OpPPC64SLDconst {
 22146  			break
 22147  		}
 22148  		if s1.AuxInt != 16 {
 22149  			break
 22150  		}
 22151  		x2 := s1.Args[0]
 22152  		if x2.Op != OpPPC64MOVBZload {
 22153  			break
 22154  		}
 22155  		i2 := x2.AuxInt
 22156  		if x2.Aux != s {
 22157  			break
 22158  		}
 22159  		_ = x2.Args[1]
 22160  		if p != x2.Args[0] {
 22161  			break
 22162  		}
 22163  		if mem != x2.Args[1] {
 22164  			break
 22165  		}
 22166  		o0 := o1.Args[1]
 22167  		if o0.Op != OpPPC64OR {
 22168  			break
 22169  		}
 22170  		if o0.Type != t {
 22171  			break
 22172  		}
 22173  		_ = o0.Args[1]
 22174  		x0 := o0.Args[0]
 22175  		if x0.Op != OpPPC64MOVBZload {
 22176  			break
 22177  		}
 22178  		i0 := x0.AuxInt
 22179  		if x0.Aux != s {
 22180  			break
 22181  		}
 22182  		_ = x0.Args[1]
 22183  		if p != x0.Args[0] {
 22184  			break
 22185  		}
 22186  		if mem != x0.Args[1] {
 22187  			break
 22188  		}
 22189  		s0 := o0.Args[1]
 22190  		if s0.Op != OpPPC64SLDconst {
 22191  			break
 22192  		}
 22193  		if s0.AuxInt != 8 {
 22194  			break
 22195  		}
 22196  		x1 := s0.Args[0]
 22197  		if x1.Op != OpPPC64MOVBZload {
 22198  			break
 22199  		}
 22200  		i1 := x1.AuxInt
 22201  		if x1.Aux != s {
 22202  			break
 22203  		}
 22204  		_ = x1.Args[1]
 22205  		if p != x1.Args[0] {
 22206  			break
 22207  		}
 22208  		if mem != x1.Args[1] {
 22209  			break
 22210  		}
 22211  		s2 := o2.Args[1]
 22212  		if s2.Op != OpPPC64SLDconst {
 22213  			break
 22214  		}
 22215  		if s2.AuxInt != 24 {
 22216  			break
 22217  		}
 22218  		x3 := s2.Args[0]
 22219  		if x3.Op != OpPPC64MOVBZload {
 22220  			break
 22221  		}
 22222  		i3 := x3.AuxInt
 22223  		if x3.Aux != s {
 22224  			break
 22225  		}
 22226  		_ = x3.Args[1]
 22227  		if p != x3.Args[0] {
 22228  			break
 22229  		}
 22230  		if mem != x3.Args[1] {
 22231  			break
 22232  		}
 22233  		s4 := o4.Args[1]
 22234  		if s4.Op != OpPPC64SLDconst {
 22235  			break
 22236  		}
 22237  		if s4.AuxInt != 40 {
 22238  			break
 22239  		}
 22240  		x5 := s4.Args[0]
 22241  		if x5.Op != OpPPC64MOVBZload {
 22242  			break
 22243  		}
 22244  		i5 := x5.AuxInt
 22245  		if x5.Aux != s {
 22246  			break
 22247  		}
 22248  		_ = x5.Args[1]
 22249  		if p != x5.Args[0] {
 22250  			break
 22251  		}
 22252  		if mem != x5.Args[1] {
 22253  			break
 22254  		}
 22255  		s5 := o5.Args[1]
 22256  		if s5.Op != OpPPC64SLDconst {
 22257  			break
 22258  		}
 22259  		if s5.AuxInt != 48 {
 22260  			break
 22261  		}
 22262  		x6 := s5.Args[0]
 22263  		if x6.Op != OpPPC64MOVBZload {
 22264  			break
 22265  		}
 22266  		i6 := x6.AuxInt
 22267  		if x6.Aux != s {
 22268  			break
 22269  		}
 22270  		_ = x6.Args[1]
 22271  		if p != x6.Args[0] {
 22272  			break
 22273  		}
 22274  		if mem != x6.Args[1] {
 22275  			break
 22276  		}
 22277  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22278  			break
 22279  		}
 22280  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22281  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22282  		v.reset(OpCopy)
 22283  		v.AddArg(v0)
 22284  		v0.AuxInt = i0
 22285  		v0.Aux = s
 22286  		v0.AddArg(p)
 22287  		v0.AddArg(mem)
 22288  		return true
 22289  	}
 22290  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22291  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22292  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22293  	for {
 22294  		t := v.Type
 22295  		_ = v.Args[1]
 22296  		s6 := v.Args[0]
 22297  		if s6.Op != OpPPC64SLDconst {
 22298  			break
 22299  		}
 22300  		if s6.AuxInt != 56 {
 22301  			break
 22302  		}
 22303  		x7 := s6.Args[0]
 22304  		if x7.Op != OpPPC64MOVBZload {
 22305  			break
 22306  		}
 22307  		i7 := x7.AuxInt
 22308  		s := x7.Aux
 22309  		_ = x7.Args[1]
 22310  		p := x7.Args[0]
 22311  		mem := x7.Args[1]
 22312  		o5 := v.Args[1]
 22313  		if o5.Op != OpPPC64OR {
 22314  			break
 22315  		}
 22316  		if o5.Type != t {
 22317  			break
 22318  		}
 22319  		_ = o5.Args[1]
 22320  		o4 := o5.Args[0]
 22321  		if o4.Op != OpPPC64OR {
 22322  			break
 22323  		}
 22324  		if o4.Type != t {
 22325  			break
 22326  		}
 22327  		_ = o4.Args[1]
 22328  		o3 := o4.Args[0]
 22329  		if o3.Op != OpPPC64OR {
 22330  			break
 22331  		}
 22332  		if o3.Type != t {
 22333  			break
 22334  		}
 22335  		_ = o3.Args[1]
 22336  		s3 := o3.Args[0]
 22337  		if s3.Op != OpPPC64SLDconst {
 22338  			break
 22339  		}
 22340  		if s3.AuxInt != 32 {
 22341  			break
 22342  		}
 22343  		x4 := s3.Args[0]
 22344  		if x4.Op != OpPPC64MOVBZload {
 22345  			break
 22346  		}
 22347  		i4 := x4.AuxInt
 22348  		if x4.Aux != s {
 22349  			break
 22350  		}
 22351  		_ = x4.Args[1]
 22352  		if p != x4.Args[0] {
 22353  			break
 22354  		}
 22355  		if mem != x4.Args[1] {
 22356  			break
 22357  		}
 22358  		o2 := o3.Args[1]
 22359  		if o2.Op != OpPPC64OR {
 22360  			break
 22361  		}
 22362  		if o2.Type != t {
 22363  			break
 22364  		}
 22365  		_ = o2.Args[1]
 22366  		o1 := o2.Args[0]
 22367  		if o1.Op != OpPPC64OR {
 22368  			break
 22369  		}
 22370  		if o1.Type != t {
 22371  			break
 22372  		}
 22373  		_ = o1.Args[1]
 22374  		o0 := o1.Args[0]
 22375  		if o0.Op != OpPPC64OR {
 22376  			break
 22377  		}
 22378  		if o0.Type != t {
 22379  			break
 22380  		}
 22381  		_ = o0.Args[1]
 22382  		s0 := o0.Args[0]
 22383  		if s0.Op != OpPPC64SLDconst {
 22384  			break
 22385  		}
 22386  		if s0.AuxInt != 8 {
 22387  			break
 22388  		}
 22389  		x1 := s0.Args[0]
 22390  		if x1.Op != OpPPC64MOVBZload {
 22391  			break
 22392  		}
 22393  		i1 := x1.AuxInt
 22394  		if x1.Aux != s {
 22395  			break
 22396  		}
 22397  		_ = x1.Args[1]
 22398  		if p != x1.Args[0] {
 22399  			break
 22400  		}
 22401  		if mem != x1.Args[1] {
 22402  			break
 22403  		}
 22404  		x0 := o0.Args[1]
 22405  		if x0.Op != OpPPC64MOVBZload {
 22406  			break
 22407  		}
 22408  		i0 := x0.AuxInt
 22409  		if x0.Aux != s {
 22410  			break
 22411  		}
 22412  		_ = x0.Args[1]
 22413  		if p != x0.Args[0] {
 22414  			break
 22415  		}
 22416  		if mem != x0.Args[1] {
 22417  			break
 22418  		}
 22419  		s1 := o1.Args[1]
 22420  		if s1.Op != OpPPC64SLDconst {
 22421  			break
 22422  		}
 22423  		if s1.AuxInt != 16 {
 22424  			break
 22425  		}
 22426  		x2 := s1.Args[0]
 22427  		if x2.Op != OpPPC64MOVBZload {
 22428  			break
 22429  		}
 22430  		i2 := x2.AuxInt
 22431  		if x2.Aux != s {
 22432  			break
 22433  		}
 22434  		_ = x2.Args[1]
 22435  		if p != x2.Args[0] {
 22436  			break
 22437  		}
 22438  		if mem != x2.Args[1] {
 22439  			break
 22440  		}
 22441  		s2 := o2.Args[1]
 22442  		if s2.Op != OpPPC64SLDconst {
 22443  			break
 22444  		}
 22445  		if s2.AuxInt != 24 {
 22446  			break
 22447  		}
 22448  		x3 := s2.Args[0]
 22449  		if x3.Op != OpPPC64MOVBZload {
 22450  			break
 22451  		}
 22452  		i3 := x3.AuxInt
 22453  		if x3.Aux != s {
 22454  			break
 22455  		}
 22456  		_ = x3.Args[1]
 22457  		if p != x3.Args[0] {
 22458  			break
 22459  		}
 22460  		if mem != x3.Args[1] {
 22461  			break
 22462  		}
 22463  		s4 := o4.Args[1]
 22464  		if s4.Op != OpPPC64SLDconst {
 22465  			break
 22466  		}
 22467  		if s4.AuxInt != 40 {
 22468  			break
 22469  		}
 22470  		x5 := s4.Args[0]
 22471  		if x5.Op != OpPPC64MOVBZload {
 22472  			break
 22473  		}
 22474  		i5 := x5.AuxInt
 22475  		if x5.Aux != s {
 22476  			break
 22477  		}
 22478  		_ = x5.Args[1]
 22479  		if p != x5.Args[0] {
 22480  			break
 22481  		}
 22482  		if mem != x5.Args[1] {
 22483  			break
 22484  		}
 22485  		s5 := o5.Args[1]
 22486  		if s5.Op != OpPPC64SLDconst {
 22487  			break
 22488  		}
 22489  		if s5.AuxInt != 48 {
 22490  			break
 22491  		}
 22492  		x6 := s5.Args[0]
 22493  		if x6.Op != OpPPC64MOVBZload {
 22494  			break
 22495  		}
 22496  		i6 := x6.AuxInt
 22497  		if x6.Aux != s {
 22498  			break
 22499  		}
 22500  		_ = x6.Args[1]
 22501  		if p != x6.Args[0] {
 22502  			break
 22503  		}
 22504  		if mem != x6.Args[1] {
 22505  			break
 22506  		}
 22507  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22508  			break
 22509  		}
 22510  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22511  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22512  		v.reset(OpCopy)
 22513  		v.AddArg(v0)
 22514  		v0.AuxInt = i0
 22515  		v0.Aux = s
 22516  		v0.AddArg(p)
 22517  		v0.AddArg(mem)
 22518  		return true
 22519  	}
 22520  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22521  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22522  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22523  	for {
 22524  		t := v.Type
 22525  		_ = v.Args[1]
 22526  		s6 := v.Args[0]
 22527  		if s6.Op != OpPPC64SLDconst {
 22528  			break
 22529  		}
 22530  		if s6.AuxInt != 56 {
 22531  			break
 22532  		}
 22533  		x7 := s6.Args[0]
 22534  		if x7.Op != OpPPC64MOVBZload {
 22535  			break
 22536  		}
 22537  		i7 := x7.AuxInt
 22538  		s := x7.Aux
 22539  		_ = x7.Args[1]
 22540  		p := x7.Args[0]
 22541  		mem := x7.Args[1]
 22542  		o5 := v.Args[1]
 22543  		if o5.Op != OpPPC64OR {
 22544  			break
 22545  		}
 22546  		if o5.Type != t {
 22547  			break
 22548  		}
 22549  		_ = o5.Args[1]
 22550  		o4 := o5.Args[0]
 22551  		if o4.Op != OpPPC64OR {
 22552  			break
 22553  		}
 22554  		if o4.Type != t {
 22555  			break
 22556  		}
 22557  		_ = o4.Args[1]
 22558  		o3 := o4.Args[0]
 22559  		if o3.Op != OpPPC64OR {
 22560  			break
 22561  		}
 22562  		if o3.Type != t {
 22563  			break
 22564  		}
 22565  		_ = o3.Args[1]
 22566  		s3 := o3.Args[0]
 22567  		if s3.Op != OpPPC64SLDconst {
 22568  			break
 22569  		}
 22570  		if s3.AuxInt != 32 {
 22571  			break
 22572  		}
 22573  		x4 := s3.Args[0]
 22574  		if x4.Op != OpPPC64MOVBZload {
 22575  			break
 22576  		}
 22577  		i4 := x4.AuxInt
 22578  		if x4.Aux != s {
 22579  			break
 22580  		}
 22581  		_ = x4.Args[1]
 22582  		if p != x4.Args[0] {
 22583  			break
 22584  		}
 22585  		if mem != x4.Args[1] {
 22586  			break
 22587  		}
 22588  		o2 := o3.Args[1]
 22589  		if o2.Op != OpPPC64OR {
 22590  			break
 22591  		}
 22592  		if o2.Type != t {
 22593  			break
 22594  		}
 22595  		_ = o2.Args[1]
 22596  		o1 := o2.Args[0]
 22597  		if o1.Op != OpPPC64OR {
 22598  			break
 22599  		}
 22600  		if o1.Type != t {
 22601  			break
 22602  		}
 22603  		_ = o1.Args[1]
 22604  		o0 := o1.Args[0]
 22605  		if o0.Op != OpPPC64OR {
 22606  			break
 22607  		}
 22608  		if o0.Type != t {
 22609  			break
 22610  		}
 22611  		_ = o0.Args[1]
 22612  		x0 := o0.Args[0]
 22613  		if x0.Op != OpPPC64MOVBZload {
 22614  			break
 22615  		}
 22616  		i0 := x0.AuxInt
 22617  		if x0.Aux != s {
 22618  			break
 22619  		}
 22620  		_ = x0.Args[1]
 22621  		if p != x0.Args[0] {
 22622  			break
 22623  		}
 22624  		if mem != x0.Args[1] {
 22625  			break
 22626  		}
 22627  		s0 := o0.Args[1]
 22628  		if s0.Op != OpPPC64SLDconst {
 22629  			break
 22630  		}
 22631  		if s0.AuxInt != 8 {
 22632  			break
 22633  		}
 22634  		x1 := s0.Args[0]
 22635  		if x1.Op != OpPPC64MOVBZload {
 22636  			break
 22637  		}
 22638  		i1 := x1.AuxInt
 22639  		if x1.Aux != s {
 22640  			break
 22641  		}
 22642  		_ = x1.Args[1]
 22643  		if p != x1.Args[0] {
 22644  			break
 22645  		}
 22646  		if mem != x1.Args[1] {
 22647  			break
 22648  		}
 22649  		s1 := o1.Args[1]
 22650  		if s1.Op != OpPPC64SLDconst {
 22651  			break
 22652  		}
 22653  		if s1.AuxInt != 16 {
 22654  			break
 22655  		}
 22656  		x2 := s1.Args[0]
 22657  		if x2.Op != OpPPC64MOVBZload {
 22658  			break
 22659  		}
 22660  		i2 := x2.AuxInt
 22661  		if x2.Aux != s {
 22662  			break
 22663  		}
 22664  		_ = x2.Args[1]
 22665  		if p != x2.Args[0] {
 22666  			break
 22667  		}
 22668  		if mem != x2.Args[1] {
 22669  			break
 22670  		}
 22671  		s2 := o2.Args[1]
 22672  		if s2.Op != OpPPC64SLDconst {
 22673  			break
 22674  		}
 22675  		if s2.AuxInt != 24 {
 22676  			break
 22677  		}
 22678  		x3 := s2.Args[0]
 22679  		if x3.Op != OpPPC64MOVBZload {
 22680  			break
 22681  		}
 22682  		i3 := x3.AuxInt
 22683  		if x3.Aux != s {
 22684  			break
 22685  		}
 22686  		_ = x3.Args[1]
 22687  		if p != x3.Args[0] {
 22688  			break
 22689  		}
 22690  		if mem != x3.Args[1] {
 22691  			break
 22692  		}
 22693  		s4 := o4.Args[1]
 22694  		if s4.Op != OpPPC64SLDconst {
 22695  			break
 22696  		}
 22697  		if s4.AuxInt != 40 {
 22698  			break
 22699  		}
 22700  		x5 := s4.Args[0]
 22701  		if x5.Op != OpPPC64MOVBZload {
 22702  			break
 22703  		}
 22704  		i5 := x5.AuxInt
 22705  		if x5.Aux != s {
 22706  			break
 22707  		}
 22708  		_ = x5.Args[1]
 22709  		if p != x5.Args[0] {
 22710  			break
 22711  		}
 22712  		if mem != x5.Args[1] {
 22713  			break
 22714  		}
 22715  		s5 := o5.Args[1]
 22716  		if s5.Op != OpPPC64SLDconst {
 22717  			break
 22718  		}
 22719  		if s5.AuxInt != 48 {
 22720  			break
 22721  		}
 22722  		x6 := s5.Args[0]
 22723  		if x6.Op != OpPPC64MOVBZload {
 22724  			break
 22725  		}
 22726  		i6 := x6.AuxInt
 22727  		if x6.Aux != s {
 22728  			break
 22729  		}
 22730  		_ = x6.Args[1]
 22731  		if p != x6.Args[0] {
 22732  			break
 22733  		}
 22734  		if mem != x6.Args[1] {
 22735  			break
 22736  		}
 22737  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22738  			break
 22739  		}
 22740  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22741  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22742  		v.reset(OpCopy)
 22743  		v.AddArg(v0)
 22744  		v0.AuxInt = i0
 22745  		v0.Aux = s
 22746  		v0.AddArg(p)
 22747  		v0.AddArg(mem)
 22748  		return true
 22749  	}
 22750  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22751  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22752  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22753  	for {
 22754  		t := v.Type
 22755  		_ = v.Args[1]
 22756  		s6 := v.Args[0]
 22757  		if s6.Op != OpPPC64SLDconst {
 22758  			break
 22759  		}
 22760  		if s6.AuxInt != 56 {
 22761  			break
 22762  		}
 22763  		x7 := s6.Args[0]
 22764  		if x7.Op != OpPPC64MOVBZload {
 22765  			break
 22766  		}
 22767  		i7 := x7.AuxInt
 22768  		s := x7.Aux
 22769  		_ = x7.Args[1]
 22770  		p := x7.Args[0]
 22771  		mem := x7.Args[1]
 22772  		o5 := v.Args[1]
 22773  		if o5.Op != OpPPC64OR {
 22774  			break
 22775  		}
 22776  		if o5.Type != t {
 22777  			break
 22778  		}
 22779  		_ = o5.Args[1]
 22780  		o4 := o5.Args[0]
 22781  		if o4.Op != OpPPC64OR {
 22782  			break
 22783  		}
 22784  		if o4.Type != t {
 22785  			break
 22786  		}
 22787  		_ = o4.Args[1]
 22788  		o3 := o4.Args[0]
 22789  		if o3.Op != OpPPC64OR {
 22790  			break
 22791  		}
 22792  		if o3.Type != t {
 22793  			break
 22794  		}
 22795  		_ = o3.Args[1]
 22796  		o2 := o3.Args[0]
 22797  		if o2.Op != OpPPC64OR {
 22798  			break
 22799  		}
 22800  		if o2.Type != t {
 22801  			break
 22802  		}
 22803  		_ = o2.Args[1]
 22804  		s2 := o2.Args[0]
 22805  		if s2.Op != OpPPC64SLDconst {
 22806  			break
 22807  		}
 22808  		if s2.AuxInt != 24 {
 22809  			break
 22810  		}
 22811  		x3 := s2.Args[0]
 22812  		if x3.Op != OpPPC64MOVBZload {
 22813  			break
 22814  		}
 22815  		i3 := x3.AuxInt
 22816  		if x3.Aux != s {
 22817  			break
 22818  		}
 22819  		_ = x3.Args[1]
 22820  		if p != x3.Args[0] {
 22821  			break
 22822  		}
 22823  		if mem != x3.Args[1] {
 22824  			break
 22825  		}
 22826  		o1 := o2.Args[1]
 22827  		if o1.Op != OpPPC64OR {
 22828  			break
 22829  		}
 22830  		if o1.Type != t {
 22831  			break
 22832  		}
 22833  		_ = o1.Args[1]
 22834  		s1 := o1.Args[0]
 22835  		if s1.Op != OpPPC64SLDconst {
 22836  			break
 22837  		}
 22838  		if s1.AuxInt != 16 {
 22839  			break
 22840  		}
 22841  		x2 := s1.Args[0]
 22842  		if x2.Op != OpPPC64MOVBZload {
 22843  			break
 22844  		}
 22845  		i2 := x2.AuxInt
 22846  		if x2.Aux != s {
 22847  			break
 22848  		}
 22849  		_ = x2.Args[1]
 22850  		if p != x2.Args[0] {
 22851  			break
 22852  		}
 22853  		if mem != x2.Args[1] {
 22854  			break
 22855  		}
 22856  		o0 := o1.Args[1]
 22857  		if o0.Op != OpPPC64OR {
 22858  			break
 22859  		}
 22860  		if o0.Type != t {
 22861  			break
 22862  		}
 22863  		_ = o0.Args[1]
 22864  		s0 := o0.Args[0]
 22865  		if s0.Op != OpPPC64SLDconst {
 22866  			break
 22867  		}
 22868  		if s0.AuxInt != 8 {
 22869  			break
 22870  		}
 22871  		x1 := s0.Args[0]
 22872  		if x1.Op != OpPPC64MOVBZload {
 22873  			break
 22874  		}
 22875  		i1 := x1.AuxInt
 22876  		if x1.Aux != s {
 22877  			break
 22878  		}
 22879  		_ = x1.Args[1]
 22880  		if p != x1.Args[0] {
 22881  			break
 22882  		}
 22883  		if mem != x1.Args[1] {
 22884  			break
 22885  		}
 22886  		x0 := o0.Args[1]
 22887  		if x0.Op != OpPPC64MOVBZload {
 22888  			break
 22889  		}
 22890  		i0 := x0.AuxInt
 22891  		if x0.Aux != s {
 22892  			break
 22893  		}
 22894  		_ = x0.Args[1]
 22895  		if p != x0.Args[0] {
 22896  			break
 22897  		}
 22898  		if mem != x0.Args[1] {
 22899  			break
 22900  		}
 22901  		s3 := o3.Args[1]
 22902  		if s3.Op != OpPPC64SLDconst {
 22903  			break
 22904  		}
 22905  		if s3.AuxInt != 32 {
 22906  			break
 22907  		}
 22908  		x4 := s3.Args[0]
 22909  		if x4.Op != OpPPC64MOVBZload {
 22910  			break
 22911  		}
 22912  		i4 := x4.AuxInt
 22913  		if x4.Aux != s {
 22914  			break
 22915  		}
 22916  		_ = x4.Args[1]
 22917  		if p != x4.Args[0] {
 22918  			break
 22919  		}
 22920  		if mem != x4.Args[1] {
 22921  			break
 22922  		}
 22923  		s4 := o4.Args[1]
 22924  		if s4.Op != OpPPC64SLDconst {
 22925  			break
 22926  		}
 22927  		if s4.AuxInt != 40 {
 22928  			break
 22929  		}
 22930  		x5 := s4.Args[0]
 22931  		if x5.Op != OpPPC64MOVBZload {
 22932  			break
 22933  		}
 22934  		i5 := x5.AuxInt
 22935  		if x5.Aux != s {
 22936  			break
 22937  		}
 22938  		_ = x5.Args[1]
 22939  		if p != x5.Args[0] {
 22940  			break
 22941  		}
 22942  		if mem != x5.Args[1] {
 22943  			break
 22944  		}
 22945  		s5 := o5.Args[1]
 22946  		if s5.Op != OpPPC64SLDconst {
 22947  			break
 22948  		}
 22949  		if s5.AuxInt != 48 {
 22950  			break
 22951  		}
 22952  		x6 := s5.Args[0]
 22953  		if x6.Op != OpPPC64MOVBZload {
 22954  			break
 22955  		}
 22956  		i6 := x6.AuxInt
 22957  		if x6.Aux != s {
 22958  			break
 22959  		}
 22960  		_ = x6.Args[1]
 22961  		if p != x6.Args[0] {
 22962  			break
 22963  		}
 22964  		if mem != x6.Args[1] {
 22965  			break
 22966  		}
 22967  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 22968  			break
 22969  		}
 22970  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 22971  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 22972  		v.reset(OpCopy)
 22973  		v.AddArg(v0)
 22974  		v0.AuxInt = i0
 22975  		v0.Aux = s
 22976  		v0.AddArg(p)
 22977  		v0.AddArg(mem)
 22978  		return true
 22979  	}
 22980  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 22981  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 22982  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 22983  	for {
 22984  		t := v.Type
 22985  		_ = v.Args[1]
 22986  		s6 := v.Args[0]
 22987  		if s6.Op != OpPPC64SLDconst {
 22988  			break
 22989  		}
 22990  		if s6.AuxInt != 56 {
 22991  			break
 22992  		}
 22993  		x7 := s6.Args[0]
 22994  		if x7.Op != OpPPC64MOVBZload {
 22995  			break
 22996  		}
 22997  		i7 := x7.AuxInt
 22998  		s := x7.Aux
 22999  		_ = x7.Args[1]
 23000  		p := x7.Args[0]
 23001  		mem := x7.Args[1]
 23002  		o5 := v.Args[1]
 23003  		if o5.Op != OpPPC64OR {
 23004  			break
 23005  		}
 23006  		if o5.Type != t {
 23007  			break
 23008  		}
 23009  		_ = o5.Args[1]
 23010  		o4 := o5.Args[0]
 23011  		if o4.Op != OpPPC64OR {
 23012  			break
 23013  		}
 23014  		if o4.Type != t {
 23015  			break
 23016  		}
 23017  		_ = o4.Args[1]
 23018  		o3 := o4.Args[0]
 23019  		if o3.Op != OpPPC64OR {
 23020  			break
 23021  		}
 23022  		if o3.Type != t {
 23023  			break
 23024  		}
 23025  		_ = o3.Args[1]
 23026  		o2 := o3.Args[0]
 23027  		if o2.Op != OpPPC64OR {
 23028  			break
 23029  		}
 23030  		if o2.Type != t {
 23031  			break
 23032  		}
 23033  		_ = o2.Args[1]
 23034  		s2 := o2.Args[0]
 23035  		if s2.Op != OpPPC64SLDconst {
 23036  			break
 23037  		}
 23038  		if s2.AuxInt != 24 {
 23039  			break
 23040  		}
 23041  		x3 := s2.Args[0]
 23042  		if x3.Op != OpPPC64MOVBZload {
 23043  			break
 23044  		}
 23045  		i3 := x3.AuxInt
 23046  		if x3.Aux != s {
 23047  			break
 23048  		}
 23049  		_ = x3.Args[1]
 23050  		if p != x3.Args[0] {
 23051  			break
 23052  		}
 23053  		if mem != x3.Args[1] {
 23054  			break
 23055  		}
 23056  		o1 := o2.Args[1]
 23057  		if o1.Op != OpPPC64OR {
 23058  			break
 23059  		}
 23060  		if o1.Type != t {
 23061  			break
 23062  		}
 23063  		_ = o1.Args[1]
 23064  		s1 := o1.Args[0]
 23065  		if s1.Op != OpPPC64SLDconst {
 23066  			break
 23067  		}
 23068  		if s1.AuxInt != 16 {
 23069  			break
 23070  		}
 23071  		x2 := s1.Args[0]
 23072  		if x2.Op != OpPPC64MOVBZload {
 23073  			break
 23074  		}
 23075  		i2 := x2.AuxInt
 23076  		if x2.Aux != s {
 23077  			break
 23078  		}
 23079  		_ = x2.Args[1]
 23080  		if p != x2.Args[0] {
 23081  			break
 23082  		}
 23083  		if mem != x2.Args[1] {
 23084  			break
 23085  		}
 23086  		o0 := o1.Args[1]
 23087  		if o0.Op != OpPPC64OR {
 23088  			break
 23089  		}
 23090  		if o0.Type != t {
 23091  			break
 23092  		}
 23093  		_ = o0.Args[1]
 23094  		x0 := o0.Args[0]
 23095  		if x0.Op != OpPPC64MOVBZload {
 23096  			break
 23097  		}
 23098  		i0 := x0.AuxInt
 23099  		if x0.Aux != s {
 23100  			break
 23101  		}
 23102  		_ = x0.Args[1]
 23103  		if p != x0.Args[0] {
 23104  			break
 23105  		}
 23106  		if mem != x0.Args[1] {
 23107  			break
 23108  		}
 23109  		s0 := o0.Args[1]
 23110  		if s0.Op != OpPPC64SLDconst {
 23111  			break
 23112  		}
 23113  		if s0.AuxInt != 8 {
 23114  			break
 23115  		}
 23116  		x1 := s0.Args[0]
 23117  		if x1.Op != OpPPC64MOVBZload {
 23118  			break
 23119  		}
 23120  		i1 := x1.AuxInt
 23121  		if x1.Aux != s {
 23122  			break
 23123  		}
 23124  		_ = x1.Args[1]
 23125  		if p != x1.Args[0] {
 23126  			break
 23127  		}
 23128  		if mem != x1.Args[1] {
 23129  			break
 23130  		}
 23131  		s3 := o3.Args[1]
 23132  		if s3.Op != OpPPC64SLDconst {
 23133  			break
 23134  		}
 23135  		if s3.AuxInt != 32 {
 23136  			break
 23137  		}
 23138  		x4 := s3.Args[0]
 23139  		if x4.Op != OpPPC64MOVBZload {
 23140  			break
 23141  		}
 23142  		i4 := x4.AuxInt
 23143  		if x4.Aux != s {
 23144  			break
 23145  		}
 23146  		_ = x4.Args[1]
 23147  		if p != x4.Args[0] {
 23148  			break
 23149  		}
 23150  		if mem != x4.Args[1] {
 23151  			break
 23152  		}
 23153  		s4 := o4.Args[1]
 23154  		if s4.Op != OpPPC64SLDconst {
 23155  			break
 23156  		}
 23157  		if s4.AuxInt != 40 {
 23158  			break
 23159  		}
 23160  		x5 := s4.Args[0]
 23161  		if x5.Op != OpPPC64MOVBZload {
 23162  			break
 23163  		}
 23164  		i5 := x5.AuxInt
 23165  		if x5.Aux != s {
 23166  			break
 23167  		}
 23168  		_ = x5.Args[1]
 23169  		if p != x5.Args[0] {
 23170  			break
 23171  		}
 23172  		if mem != x5.Args[1] {
 23173  			break
 23174  		}
 23175  		s5 := o5.Args[1]
 23176  		if s5.Op != OpPPC64SLDconst {
 23177  			break
 23178  		}
 23179  		if s5.AuxInt != 48 {
 23180  			break
 23181  		}
 23182  		x6 := s5.Args[0]
 23183  		if x6.Op != OpPPC64MOVBZload {
 23184  			break
 23185  		}
 23186  		i6 := x6.AuxInt
 23187  		if x6.Aux != s {
 23188  			break
 23189  		}
 23190  		_ = x6.Args[1]
 23191  		if p != x6.Args[0] {
 23192  			break
 23193  		}
 23194  		if mem != x6.Args[1] {
 23195  			break
 23196  		}
 23197  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 23198  			break
 23199  		}
 23200  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 23201  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 23202  		v.reset(OpCopy)
 23203  		v.AddArg(v0)
 23204  		v0.AuxInt = i0
 23205  		v0.Aux = s
 23206  		v0.AddArg(p)
 23207  		v0.AddArg(mem)
 23208  		return true
 23209  	}
 23210  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 23211  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 23212  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 23213  	for {
 23214  		t := v.Type
 23215  		_ = v.Args[1]
 23216  		s6 := v.Args[0]
 23217  		if s6.Op != OpPPC64SLDconst {
 23218  			break
 23219  		}
 23220  		if s6.AuxInt != 56 {
 23221  			break
 23222  		}
 23223  		x7 := s6.Args[0]
 23224  		if x7.Op != OpPPC64MOVBZload {
 23225  			break
 23226  		}
 23227  		i7 := x7.AuxInt
 23228  		s := x7.Aux
 23229  		_ = x7.Args[1]
 23230  		p := x7.Args[0]
 23231  		mem := x7.Args[1]
 23232  		o5 := v.Args[1]
 23233  		if o5.Op != OpPPC64OR {
 23234  			break
 23235  		}
 23236  		if o5.Type != t {
 23237  			break
 23238  		}
 23239  		_ = o5.Args[1]
 23240  		o4 := o5.Args[0]
 23241  		if o4.Op != OpPPC64OR {
 23242  			break
 23243  		}
 23244  		if o4.Type != t {
 23245  			break
 23246  		}
 23247  		_ = o4.Args[1]
 23248  		o3 := o4.Args[0]
 23249  		if o3.Op != OpPPC64OR {
 23250  			break
 23251  		}
 23252  		if o3.Type != t {
 23253  			break
 23254  		}
 23255  		_ = o3.Args[1]
 23256  		o2 := o3.Args[0]
 23257  		if o2.Op != OpPPC64OR {
 23258  			break
 23259  		}
 23260  		if o2.Type != t {
 23261  			break
 23262  		}
 23263  		_ = o2.Args[1]
 23264  		s2 := o2.Args[0]
 23265  		if s2.Op != OpPPC64SLDconst {
 23266  			break
 23267  		}
 23268  		if s2.AuxInt != 24 {
 23269  			break
 23270  		}
 23271  		x3 := s2.Args[0]
 23272  		if x3.Op != OpPPC64MOVBZload {
 23273  			break
 23274  		}
 23275  		i3 := x3.AuxInt
 23276  		if x3.Aux != s {
 23277  			break
 23278  		}
 23279  		_ = x3.Args[1]
 23280  		if p != x3.Args[0] {
 23281  			break
 23282  		}
 23283  		if mem != x3.Args[1] {
 23284  			break
 23285  		}
 23286  		o1 := o2.Args[1]
 23287  		if o1.Op != OpPPC64OR {
 23288  			break
 23289  		}
 23290  		if o1.Type != t {
 23291  			break
 23292  		}
 23293  		_ = o1.Args[1]
 23294  		o0 := o1.Args[0]
 23295  		if o0.Op != OpPPC64OR {
 23296  			break
 23297  		}
 23298  		if o0.Type != t {
 23299  			break
 23300  		}
 23301  		_ = o0.Args[1]
 23302  		s0 := o0.Args[0]
 23303  		if s0.Op != OpPPC64SLDconst {
 23304  			break
 23305  		}
 23306  		if s0.AuxInt != 8 {
 23307  			break
 23308  		}
 23309  		x1 := s0.Args[0]
 23310  		if x1.Op != OpPPC64MOVBZload {
 23311  			break
 23312  		}
 23313  		i1 := x1.AuxInt
 23314  		if x1.Aux != s {
 23315  			break
 23316  		}
 23317  		_ = x1.Args[1]
 23318  		if p != x1.Args[0] {
 23319  			break
 23320  		}
 23321  		if mem != x1.Args[1] {
 23322  			break
 23323  		}
 23324  		x0 := o0.Args[1]
 23325  		if x0.Op != OpPPC64MOVBZload {
 23326  			break
 23327  		}
 23328  		i0 := x0.AuxInt
 23329  		if x0.Aux != s {
 23330  			break
 23331  		}
 23332  		_ = x0.Args[1]
 23333  		if p != x0.Args[0] {
 23334  			break
 23335  		}
 23336  		if mem != x0.Args[1] {
 23337  			break
 23338  		}
 23339  		s1 := o1.Args[1]
 23340  		if s1.Op != OpPPC64SLDconst {
 23341  			break
 23342  		}
 23343  		if s1.AuxInt != 16 {
 23344  			break
 23345  		}
 23346  		x2 := s1.Args[0]
 23347  		if x2.Op != OpPPC64MOVBZload {
 23348  			break
 23349  		}
 23350  		i2 := x2.AuxInt
 23351  		if x2.Aux != s {
 23352  			break
 23353  		}
 23354  		_ = x2.Args[1]
 23355  		if p != x2.Args[0] {
 23356  			break
 23357  		}
 23358  		if mem != x2.Args[1] {
 23359  			break
 23360  		}
 23361  		s3 := o3.Args[1]
 23362  		if s3.Op != OpPPC64SLDconst {
 23363  			break
 23364  		}
 23365  		if s3.AuxInt != 32 {
 23366  			break
 23367  		}
 23368  		x4 := s3.Args[0]
 23369  		if x4.Op != OpPPC64MOVBZload {
 23370  			break
 23371  		}
 23372  		i4 := x4.AuxInt
 23373  		if x4.Aux != s {
 23374  			break
 23375  		}
 23376  		_ = x4.Args[1]
 23377  		if p != x4.Args[0] {
 23378  			break
 23379  		}
 23380  		if mem != x4.Args[1] {
 23381  			break
 23382  		}
 23383  		s4 := o4.Args[1]
 23384  		if s4.Op != OpPPC64SLDconst {
 23385  			break
 23386  		}
 23387  		if s4.AuxInt != 40 {
 23388  			break
 23389  		}
 23390  		x5 := s4.Args[0]
 23391  		if x5.Op != OpPPC64MOVBZload {
 23392  			break
 23393  		}
 23394  		i5 := x5.AuxInt
 23395  		if x5.Aux != s {
 23396  			break
 23397  		}
 23398  		_ = x5.Args[1]
 23399  		if p != x5.Args[0] {
 23400  			break
 23401  		}
 23402  		if mem != x5.Args[1] {
 23403  			break
 23404  		}
 23405  		s5 := o5.Args[1]
 23406  		if s5.Op != OpPPC64SLDconst {
 23407  			break
 23408  		}
 23409  		if s5.AuxInt != 48 {
 23410  			break
 23411  		}
 23412  		x6 := s5.Args[0]
 23413  		if x6.Op != OpPPC64MOVBZload {
 23414  			break
 23415  		}
 23416  		i6 := x6.AuxInt
 23417  		if x6.Aux != s {
 23418  			break
 23419  		}
 23420  		_ = x6.Args[1]
 23421  		if p != x6.Args[0] {
 23422  			break
 23423  		}
 23424  		if mem != x6.Args[1] {
 23425  			break
 23426  		}
 23427  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 23428  			break
 23429  		}
 23430  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 23431  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 23432  		v.reset(OpCopy)
 23433  		v.AddArg(v0)
 23434  		v0.AuxInt = i0
 23435  		v0.Aux = s
 23436  		v0.AddArg(p)
 23437  		v0.AddArg(mem)
 23438  		return true
 23439  	}
 23440  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 23441  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 23442  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 23443  	for {
 23444  		t := v.Type
 23445  		_ = v.Args[1]
 23446  		s6 := v.Args[0]
 23447  		if s6.Op != OpPPC64SLDconst {
 23448  			break
 23449  		}
 23450  		if s6.AuxInt != 56 {
 23451  			break
 23452  		}
 23453  		x7 := s6.Args[0]
 23454  		if x7.Op != OpPPC64MOVBZload {
 23455  			break
 23456  		}
 23457  		i7 := x7.AuxInt
 23458  		s := x7.Aux
 23459  		_ = x7.Args[1]
 23460  		p := x7.Args[0]
 23461  		mem := x7.Args[1]
 23462  		o5 := v.Args[1]
 23463  		if o5.Op != OpPPC64OR {
 23464  			break
 23465  		}
 23466  		if o5.Type != t {
 23467  			break
 23468  		}
 23469  		_ = o5.Args[1]
 23470  		o4 := o5.Args[0]
 23471  		if o4.Op != OpPPC64OR {
 23472  			break
 23473  		}
 23474  		if o4.Type != t {
 23475  			break
 23476  		}
 23477  		_ = o4.Args[1]
 23478  		o3 := o4.Args[0]
 23479  		if o3.Op != OpPPC64OR {
 23480  			break
 23481  		}
 23482  		if o3.Type != t {
 23483  			break
 23484  		}
 23485  		_ = o3.Args[1]
 23486  		o2 := o3.Args[0]
 23487  		if o2.Op != OpPPC64OR {
 23488  			break
 23489  		}
 23490  		if o2.Type != t {
 23491  			break
 23492  		}
 23493  		_ = o2.Args[1]
 23494  		s2 := o2.Args[0]
 23495  		if s2.Op != OpPPC64SLDconst {
 23496  			break
 23497  		}
 23498  		if s2.AuxInt != 24 {
 23499  			break
 23500  		}
 23501  		x3 := s2.Args[0]
 23502  		if x3.Op != OpPPC64MOVBZload {
 23503  			break
 23504  		}
 23505  		i3 := x3.AuxInt
 23506  		if x3.Aux != s {
 23507  			break
 23508  		}
 23509  		_ = x3.Args[1]
 23510  		if p != x3.Args[0] {
 23511  			break
 23512  		}
 23513  		if mem != x3.Args[1] {
 23514  			break
 23515  		}
 23516  		o1 := o2.Args[1]
 23517  		if o1.Op != OpPPC64OR {
 23518  			break
 23519  		}
 23520  		if o1.Type != t {
 23521  			break
 23522  		}
 23523  		_ = o1.Args[1]
 23524  		o0 := o1.Args[0]
 23525  		if o0.Op != OpPPC64OR {
 23526  			break
 23527  		}
 23528  		if o0.Type != t {
 23529  			break
 23530  		}
 23531  		_ = o0.Args[1]
 23532  		x0 := o0.Args[0]
 23533  		if x0.Op != OpPPC64MOVBZload {
 23534  			break
 23535  		}
 23536  		i0 := x0.AuxInt
 23537  		if x0.Aux != s {
 23538  			break
 23539  		}
 23540  		_ = x0.Args[1]
 23541  		if p != x0.Args[0] {
 23542  			break
 23543  		}
 23544  		if mem != x0.Args[1] {
 23545  			break
 23546  		}
 23547  		s0 := o0.Args[1]
 23548  		if s0.Op != OpPPC64SLDconst {
 23549  			break
 23550  		}
 23551  		if s0.AuxInt != 8 {
 23552  			break
 23553  		}
 23554  		x1 := s0.Args[0]
 23555  		if x1.Op != OpPPC64MOVBZload {
 23556  			break
 23557  		}
 23558  		i1 := x1.AuxInt
 23559  		if x1.Aux != s {
 23560  			break
 23561  		}
 23562  		_ = x1.Args[1]
 23563  		if p != x1.Args[0] {
 23564  			break
 23565  		}
 23566  		if mem != x1.Args[1] {
 23567  			break
 23568  		}
 23569  		s1 := o1.Args[1]
 23570  		if s1.Op != OpPPC64SLDconst {
 23571  			break
 23572  		}
 23573  		if s1.AuxInt != 16 {
 23574  			break
 23575  		}
 23576  		x2 := s1.Args[0]
 23577  		if x2.Op != OpPPC64MOVBZload {
 23578  			break
 23579  		}
 23580  		i2 := x2.AuxInt
 23581  		if x2.Aux != s {
 23582  			break
 23583  		}
 23584  		_ = x2.Args[1]
 23585  		if p != x2.Args[0] {
 23586  			break
 23587  		}
 23588  		if mem != x2.Args[1] {
 23589  			break
 23590  		}
 23591  		s3 := o3.Args[1]
 23592  		if s3.Op != OpPPC64SLDconst {
 23593  			break
 23594  		}
 23595  		if s3.AuxInt != 32 {
 23596  			break
 23597  		}
 23598  		x4 := s3.Args[0]
 23599  		if x4.Op != OpPPC64MOVBZload {
 23600  			break
 23601  		}
 23602  		i4 := x4.AuxInt
 23603  		if x4.Aux != s {
 23604  			break
 23605  		}
 23606  		_ = x4.Args[1]
 23607  		if p != x4.Args[0] {
 23608  			break
 23609  		}
 23610  		if mem != x4.Args[1] {
 23611  			break
 23612  		}
 23613  		s4 := o4.Args[1]
 23614  		if s4.Op != OpPPC64SLDconst {
 23615  			break
 23616  		}
 23617  		if s4.AuxInt != 40 {
 23618  			break
 23619  		}
 23620  		x5 := s4.Args[0]
 23621  		if x5.Op != OpPPC64MOVBZload {
 23622  			break
 23623  		}
 23624  		i5 := x5.AuxInt
 23625  		if x5.Aux != s {
 23626  			break
 23627  		}
 23628  		_ = x5.Args[1]
 23629  		if p != x5.Args[0] {
 23630  			break
 23631  		}
 23632  		if mem != x5.Args[1] {
 23633  			break
 23634  		}
 23635  		s5 := o5.Args[1]
 23636  		if s5.Op != OpPPC64SLDconst {
 23637  			break
 23638  		}
 23639  		if s5.AuxInt != 48 {
 23640  			break
 23641  		}
 23642  		x6 := s5.Args[0]
 23643  		if x6.Op != OpPPC64MOVBZload {
 23644  			break
 23645  		}
 23646  		i6 := x6.AuxInt
 23647  		if x6.Aux != s {
 23648  			break
 23649  		}
 23650  		_ = x6.Args[1]
 23651  		if p != x6.Args[0] {
 23652  			break
 23653  		}
 23654  		if mem != x6.Args[1] {
 23655  			break
 23656  		}
 23657  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 23658  			break
 23659  		}
 23660  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 23661  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 23662  		v.reset(OpCopy)
 23663  		v.AddArg(v0)
 23664  		v0.AuxInt = i0
 23665  		v0.Aux = s
 23666  		v0.AddArg(p)
 23667  		v0.AddArg(mem)
 23668  		return true
 23669  	}
 23670  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 23671  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 23672  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 23673  	for {
 23674  		t := v.Type
 23675  		_ = v.Args[1]
 23676  		s6 := v.Args[0]
 23677  		if s6.Op != OpPPC64SLDconst {
 23678  			break
 23679  		}
 23680  		if s6.AuxInt != 56 {
 23681  			break
 23682  		}
 23683  		x7 := s6.Args[0]
 23684  		if x7.Op != OpPPC64MOVBZload {
 23685  			break
 23686  		}
 23687  		i7 := x7.AuxInt
 23688  		s := x7.Aux
 23689  		_ = x7.Args[1]
 23690  		p := x7.Args[0]
 23691  		mem := x7.Args[1]
 23692  		o5 := v.Args[1]
 23693  		if o5.Op != OpPPC64OR {
 23694  			break
 23695  		}
 23696  		if o5.Type != t {
 23697  			break
 23698  		}
 23699  		_ = o5.Args[1]
 23700  		o4 := o5.Args[0]
 23701  		if o4.Op != OpPPC64OR {
 23702  			break
 23703  		}
 23704  		if o4.Type != t {
 23705  			break
 23706  		}
 23707  		_ = o4.Args[1]
 23708  		o3 := o4.Args[0]
 23709  		if o3.Op != OpPPC64OR {
 23710  			break
 23711  		}
 23712  		if o3.Type != t {
 23713  			break
 23714  		}
 23715  		_ = o3.Args[1]
 23716  		o2 := o3.Args[0]
 23717  		if o2.Op != OpPPC64OR {
 23718  			break
 23719  		}
 23720  		if o2.Type != t {
 23721  			break
 23722  		}
 23723  		_ = o2.Args[1]
 23724  		o1 := o2.Args[0]
 23725  		if o1.Op != OpPPC64OR {
 23726  			break
 23727  		}
 23728  		if o1.Type != t {
 23729  			break
 23730  		}
 23731  		_ = o1.Args[1]
 23732  		s1 := o1.Args[0]
 23733  		if s1.Op != OpPPC64SLDconst {
 23734  			break
 23735  		}
 23736  		if s1.AuxInt != 16 {
 23737  			break
 23738  		}
 23739  		x2 := s1.Args[0]
 23740  		if x2.Op != OpPPC64MOVBZload {
 23741  			break
 23742  		}
 23743  		i2 := x2.AuxInt
 23744  		if x2.Aux != s {
 23745  			break
 23746  		}
 23747  		_ = x2.Args[1]
 23748  		if p != x2.Args[0] {
 23749  			break
 23750  		}
 23751  		if mem != x2.Args[1] {
 23752  			break
 23753  		}
 23754  		o0 := o1.Args[1]
 23755  		if o0.Op != OpPPC64OR {
 23756  			break
 23757  		}
 23758  		if o0.Type != t {
 23759  			break
 23760  		}
 23761  		_ = o0.Args[1]
 23762  		s0 := o0.Args[0]
 23763  		if s0.Op != OpPPC64SLDconst {
 23764  			break
 23765  		}
 23766  		if s0.AuxInt != 8 {
 23767  			break
 23768  		}
 23769  		x1 := s0.Args[0]
 23770  		if x1.Op != OpPPC64MOVBZload {
 23771  			break
 23772  		}
 23773  		i1 := x1.AuxInt
 23774  		if x1.Aux != s {
 23775  			break
 23776  		}
 23777  		_ = x1.Args[1]
 23778  		if p != x1.Args[0] {
 23779  			break
 23780  		}
 23781  		if mem != x1.Args[1] {
 23782  			break
 23783  		}
 23784  		x0 := o0.Args[1]
 23785  		if x0.Op != OpPPC64MOVBZload {
 23786  			break
 23787  		}
 23788  		i0 := x0.AuxInt
 23789  		if x0.Aux != s {
 23790  			break
 23791  		}
 23792  		_ = x0.Args[1]
 23793  		if p != x0.Args[0] {
 23794  			break
 23795  		}
 23796  		if mem != x0.Args[1] {
 23797  			break
 23798  		}
 23799  		s2 := o2.Args[1]
 23800  		if s2.Op != OpPPC64SLDconst {
 23801  			break
 23802  		}
 23803  		if s2.AuxInt != 24 {
 23804  			break
 23805  		}
 23806  		x3 := s2.Args[0]
 23807  		if x3.Op != OpPPC64MOVBZload {
 23808  			break
 23809  		}
 23810  		i3 := x3.AuxInt
 23811  		if x3.Aux != s {
 23812  			break
 23813  		}
 23814  		_ = x3.Args[1]
 23815  		if p != x3.Args[0] {
 23816  			break
 23817  		}
 23818  		if mem != x3.Args[1] {
 23819  			break
 23820  		}
 23821  		s3 := o3.Args[1]
 23822  		if s3.Op != OpPPC64SLDconst {
 23823  			break
 23824  		}
 23825  		if s3.AuxInt != 32 {
 23826  			break
 23827  		}
 23828  		x4 := s3.Args[0]
 23829  		if x4.Op != OpPPC64MOVBZload {
 23830  			break
 23831  		}
 23832  		i4 := x4.AuxInt
 23833  		if x4.Aux != s {
 23834  			break
 23835  		}
 23836  		_ = x4.Args[1]
 23837  		if p != x4.Args[0] {
 23838  			break
 23839  		}
 23840  		if mem != x4.Args[1] {
 23841  			break
 23842  		}
 23843  		s4 := o4.Args[1]
 23844  		if s4.Op != OpPPC64SLDconst {
 23845  			break
 23846  		}
 23847  		if s4.AuxInt != 40 {
 23848  			break
 23849  		}
 23850  		x5 := s4.Args[0]
 23851  		if x5.Op != OpPPC64MOVBZload {
 23852  			break
 23853  		}
 23854  		i5 := x5.AuxInt
 23855  		if x5.Aux != s {
 23856  			break
 23857  		}
 23858  		_ = x5.Args[1]
 23859  		if p != x5.Args[0] {
 23860  			break
 23861  		}
 23862  		if mem != x5.Args[1] {
 23863  			break
 23864  		}
 23865  		s5 := o5.Args[1]
 23866  		if s5.Op != OpPPC64SLDconst {
 23867  			break
 23868  		}
 23869  		if s5.AuxInt != 48 {
 23870  			break
 23871  		}
 23872  		x6 := s5.Args[0]
 23873  		if x6.Op != OpPPC64MOVBZload {
 23874  			break
 23875  		}
 23876  		i6 := x6.AuxInt
 23877  		if x6.Aux != s {
 23878  			break
 23879  		}
 23880  		_ = x6.Args[1]
 23881  		if p != x6.Args[0] {
 23882  			break
 23883  		}
 23884  		if mem != x6.Args[1] {
 23885  			break
 23886  		}
 23887  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 23888  			break
 23889  		}
 23890  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 23891  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 23892  		v.reset(OpCopy)
 23893  		v.AddArg(v0)
 23894  		v0.AuxInt = i0
 23895  		v0.Aux = s
 23896  		v0.AddArg(p)
 23897  		v0.AddArg(mem)
 23898  		return true
 23899  	}
 23900  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 23901  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 23902  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 23903  	for {
 23904  		t := v.Type
 23905  		_ = v.Args[1]
 23906  		s6 := v.Args[0]
 23907  		if s6.Op != OpPPC64SLDconst {
 23908  			break
 23909  		}
 23910  		if s6.AuxInt != 56 {
 23911  			break
 23912  		}
 23913  		x7 := s6.Args[0]
 23914  		if x7.Op != OpPPC64MOVBZload {
 23915  			break
 23916  		}
 23917  		i7 := x7.AuxInt
 23918  		s := x7.Aux
 23919  		_ = x7.Args[1]
 23920  		p := x7.Args[0]
 23921  		mem := x7.Args[1]
 23922  		o5 := v.Args[1]
 23923  		if o5.Op != OpPPC64OR {
 23924  			break
 23925  		}
 23926  		if o5.Type != t {
 23927  			break
 23928  		}
 23929  		_ = o5.Args[1]
 23930  		o4 := o5.Args[0]
 23931  		if o4.Op != OpPPC64OR {
 23932  			break
 23933  		}
 23934  		if o4.Type != t {
 23935  			break
 23936  		}
 23937  		_ = o4.Args[1]
 23938  		o3 := o4.Args[0]
 23939  		if o3.Op != OpPPC64OR {
 23940  			break
 23941  		}
 23942  		if o3.Type != t {
 23943  			break
 23944  		}
 23945  		_ = o3.Args[1]
 23946  		o2 := o3.Args[0]
 23947  		if o2.Op != OpPPC64OR {
 23948  			break
 23949  		}
 23950  		if o2.Type != t {
 23951  			break
 23952  		}
 23953  		_ = o2.Args[1]
 23954  		o1 := o2.Args[0]
 23955  		if o1.Op != OpPPC64OR {
 23956  			break
 23957  		}
 23958  		if o1.Type != t {
 23959  			break
 23960  		}
 23961  		_ = o1.Args[1]
 23962  		s1 := o1.Args[0]
 23963  		if s1.Op != OpPPC64SLDconst {
 23964  			break
 23965  		}
 23966  		if s1.AuxInt != 16 {
 23967  			break
 23968  		}
 23969  		x2 := s1.Args[0]
 23970  		if x2.Op != OpPPC64MOVBZload {
 23971  			break
 23972  		}
 23973  		i2 := x2.AuxInt
 23974  		if x2.Aux != s {
 23975  			break
 23976  		}
 23977  		_ = x2.Args[1]
 23978  		if p != x2.Args[0] {
 23979  			break
 23980  		}
 23981  		if mem != x2.Args[1] {
 23982  			break
 23983  		}
 23984  		o0 := o1.Args[1]
 23985  		if o0.Op != OpPPC64OR {
 23986  			break
 23987  		}
 23988  		if o0.Type != t {
 23989  			break
 23990  		}
 23991  		_ = o0.Args[1]
 23992  		x0 := o0.Args[0]
 23993  		if x0.Op != OpPPC64MOVBZload {
 23994  			break
 23995  		}
 23996  		i0 := x0.AuxInt
 23997  		if x0.Aux != s {
 23998  			break
 23999  		}
 24000  		_ = x0.Args[1]
 24001  		if p != x0.Args[0] {
 24002  			break
 24003  		}
 24004  		if mem != x0.Args[1] {
 24005  			break
 24006  		}
 24007  		s0 := o0.Args[1]
 24008  		if s0.Op != OpPPC64SLDconst {
 24009  			break
 24010  		}
 24011  		if s0.AuxInt != 8 {
 24012  			break
 24013  		}
 24014  		x1 := s0.Args[0]
 24015  		if x1.Op != OpPPC64MOVBZload {
 24016  			break
 24017  		}
 24018  		i1 := x1.AuxInt
 24019  		if x1.Aux != s {
 24020  			break
 24021  		}
 24022  		_ = x1.Args[1]
 24023  		if p != x1.Args[0] {
 24024  			break
 24025  		}
 24026  		if mem != x1.Args[1] {
 24027  			break
 24028  		}
 24029  		s2 := o2.Args[1]
 24030  		if s2.Op != OpPPC64SLDconst {
 24031  			break
 24032  		}
 24033  		if s2.AuxInt != 24 {
 24034  			break
 24035  		}
 24036  		x3 := s2.Args[0]
 24037  		if x3.Op != OpPPC64MOVBZload {
 24038  			break
 24039  		}
 24040  		i3 := x3.AuxInt
 24041  		if x3.Aux != s {
 24042  			break
 24043  		}
 24044  		_ = x3.Args[1]
 24045  		if p != x3.Args[0] {
 24046  			break
 24047  		}
 24048  		if mem != x3.Args[1] {
 24049  			break
 24050  		}
 24051  		s3 := o3.Args[1]
 24052  		if s3.Op != OpPPC64SLDconst {
 24053  			break
 24054  		}
 24055  		if s3.AuxInt != 32 {
 24056  			break
 24057  		}
 24058  		x4 := s3.Args[0]
 24059  		if x4.Op != OpPPC64MOVBZload {
 24060  			break
 24061  		}
 24062  		i4 := x4.AuxInt
 24063  		if x4.Aux != s {
 24064  			break
 24065  		}
 24066  		_ = x4.Args[1]
 24067  		if p != x4.Args[0] {
 24068  			break
 24069  		}
 24070  		if mem != x4.Args[1] {
 24071  			break
 24072  		}
 24073  		s4 := o4.Args[1]
 24074  		if s4.Op != OpPPC64SLDconst {
 24075  			break
 24076  		}
 24077  		if s4.AuxInt != 40 {
 24078  			break
 24079  		}
 24080  		x5 := s4.Args[0]
 24081  		if x5.Op != OpPPC64MOVBZload {
 24082  			break
 24083  		}
 24084  		i5 := x5.AuxInt
 24085  		if x5.Aux != s {
 24086  			break
 24087  		}
 24088  		_ = x5.Args[1]
 24089  		if p != x5.Args[0] {
 24090  			break
 24091  		}
 24092  		if mem != x5.Args[1] {
 24093  			break
 24094  		}
 24095  		s5 := o5.Args[1]
 24096  		if s5.Op != OpPPC64SLDconst {
 24097  			break
 24098  		}
 24099  		if s5.AuxInt != 48 {
 24100  			break
 24101  		}
 24102  		x6 := s5.Args[0]
 24103  		if x6.Op != OpPPC64MOVBZload {
 24104  			break
 24105  		}
 24106  		i6 := x6.AuxInt
 24107  		if x6.Aux != s {
 24108  			break
 24109  		}
 24110  		_ = x6.Args[1]
 24111  		if p != x6.Args[0] {
 24112  			break
 24113  		}
 24114  		if mem != x6.Args[1] {
 24115  			break
 24116  		}
 24117  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 24118  			break
 24119  		}
 24120  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 24121  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 24122  		v.reset(OpCopy)
 24123  		v.AddArg(v0)
 24124  		v0.AuxInt = i0
 24125  		v0.Aux = s
 24126  		v0.AddArg(p)
 24127  		v0.AddArg(mem)
 24128  		return true
 24129  	}
 24130  	return false
 24131  }
 24132  func rewriteValuePPC64_OpPPC64OR_80(v *Value) bool {
 24133  	b := v.Block
 24134  	_ = b
 24135  	config := b.Func.Config
 24136  	_ = config
 24137  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 24138  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 24139  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 24140  	for {
 24141  		t := v.Type
 24142  		_ = v.Args[1]
 24143  		s6 := v.Args[0]
 24144  		if s6.Op != OpPPC64SLDconst {
 24145  			break
 24146  		}
 24147  		if s6.AuxInt != 56 {
 24148  			break
 24149  		}
 24150  		x7 := s6.Args[0]
 24151  		if x7.Op != OpPPC64MOVBZload {
 24152  			break
 24153  		}
 24154  		i7 := x7.AuxInt
 24155  		s := x7.Aux
 24156  		_ = x7.Args[1]
 24157  		p := x7.Args[0]
 24158  		mem := x7.Args[1]
 24159  		o5 := v.Args[1]
 24160  		if o5.Op != OpPPC64OR {
 24161  			break
 24162  		}
 24163  		if o5.Type != t {
 24164  			break
 24165  		}
 24166  		_ = o5.Args[1]
 24167  		o4 := o5.Args[0]
 24168  		if o4.Op != OpPPC64OR {
 24169  			break
 24170  		}
 24171  		if o4.Type != t {
 24172  			break
 24173  		}
 24174  		_ = o4.Args[1]
 24175  		o3 := o4.Args[0]
 24176  		if o3.Op != OpPPC64OR {
 24177  			break
 24178  		}
 24179  		if o3.Type != t {
 24180  			break
 24181  		}
 24182  		_ = o3.Args[1]
 24183  		o2 := o3.Args[0]
 24184  		if o2.Op != OpPPC64OR {
 24185  			break
 24186  		}
 24187  		if o2.Type != t {
 24188  			break
 24189  		}
 24190  		_ = o2.Args[1]
 24191  		o1 := o2.Args[0]
 24192  		if o1.Op != OpPPC64OR {
 24193  			break
 24194  		}
 24195  		if o1.Type != t {
 24196  			break
 24197  		}
 24198  		_ = o1.Args[1]
 24199  		o0 := o1.Args[0]
 24200  		if o0.Op != OpPPC64OR {
 24201  			break
 24202  		}
 24203  		if o0.Type != t {
 24204  			break
 24205  		}
 24206  		_ = o0.Args[1]
 24207  		s0 := o0.Args[0]
 24208  		if s0.Op != OpPPC64SLDconst {
 24209  			break
 24210  		}
 24211  		if s0.AuxInt != 8 {
 24212  			break
 24213  		}
 24214  		x1 := s0.Args[0]
 24215  		if x1.Op != OpPPC64MOVBZload {
 24216  			break
 24217  		}
 24218  		i1 := x1.AuxInt
 24219  		if x1.Aux != s {
 24220  			break
 24221  		}
 24222  		_ = x1.Args[1]
 24223  		if p != x1.Args[0] {
 24224  			break
 24225  		}
 24226  		if mem != x1.Args[1] {
 24227  			break
 24228  		}
 24229  		x0 := o0.Args[1]
 24230  		if x0.Op != OpPPC64MOVBZload {
 24231  			break
 24232  		}
 24233  		i0 := x0.AuxInt
 24234  		if x0.Aux != s {
 24235  			break
 24236  		}
 24237  		_ = x0.Args[1]
 24238  		if p != x0.Args[0] {
 24239  			break
 24240  		}
 24241  		if mem != x0.Args[1] {
 24242  			break
 24243  		}
 24244  		s1 := o1.Args[1]
 24245  		if s1.Op != OpPPC64SLDconst {
 24246  			break
 24247  		}
 24248  		if s1.AuxInt != 16 {
 24249  			break
 24250  		}
 24251  		x2 := s1.Args[0]
 24252  		if x2.Op != OpPPC64MOVBZload {
 24253  			break
 24254  		}
 24255  		i2 := x2.AuxInt
 24256  		if x2.Aux != s {
 24257  			break
 24258  		}
 24259  		_ = x2.Args[1]
 24260  		if p != x2.Args[0] {
 24261  			break
 24262  		}
 24263  		if mem != x2.Args[1] {
 24264  			break
 24265  		}
 24266  		s2 := o2.Args[1]
 24267  		if s2.Op != OpPPC64SLDconst {
 24268  			break
 24269  		}
 24270  		if s2.AuxInt != 24 {
 24271  			break
 24272  		}
 24273  		x3 := s2.Args[0]
 24274  		if x3.Op != OpPPC64MOVBZload {
 24275  			break
 24276  		}
 24277  		i3 := x3.AuxInt
 24278  		if x3.Aux != s {
 24279  			break
 24280  		}
 24281  		_ = x3.Args[1]
 24282  		if p != x3.Args[0] {
 24283  			break
 24284  		}
 24285  		if mem != x3.Args[1] {
 24286  			break
 24287  		}
 24288  		s3 := o3.Args[1]
 24289  		if s3.Op != OpPPC64SLDconst {
 24290  			break
 24291  		}
 24292  		if s3.AuxInt != 32 {
 24293  			break
 24294  		}
 24295  		x4 := s3.Args[0]
 24296  		if x4.Op != OpPPC64MOVBZload {
 24297  			break
 24298  		}
 24299  		i4 := x4.AuxInt
 24300  		if x4.Aux != s {
 24301  			break
 24302  		}
 24303  		_ = x4.Args[1]
 24304  		if p != x4.Args[0] {
 24305  			break
 24306  		}
 24307  		if mem != x4.Args[1] {
 24308  			break
 24309  		}
 24310  		s4 := o4.Args[1]
 24311  		if s4.Op != OpPPC64SLDconst {
 24312  			break
 24313  		}
 24314  		if s4.AuxInt != 40 {
 24315  			break
 24316  		}
 24317  		x5 := s4.Args[0]
 24318  		if x5.Op != OpPPC64MOVBZload {
 24319  			break
 24320  		}
 24321  		i5 := x5.AuxInt
 24322  		if x5.Aux != s {
 24323  			break
 24324  		}
 24325  		_ = x5.Args[1]
 24326  		if p != x5.Args[0] {
 24327  			break
 24328  		}
 24329  		if mem != x5.Args[1] {
 24330  			break
 24331  		}
 24332  		s5 := o5.Args[1]
 24333  		if s5.Op != OpPPC64SLDconst {
 24334  			break
 24335  		}
 24336  		if s5.AuxInt != 48 {
 24337  			break
 24338  		}
 24339  		x6 := s5.Args[0]
 24340  		if x6.Op != OpPPC64MOVBZload {
 24341  			break
 24342  		}
 24343  		i6 := x6.AuxInt
 24344  		if x6.Aux != s {
 24345  			break
 24346  		}
 24347  		_ = x6.Args[1]
 24348  		if p != x6.Args[0] {
 24349  			break
 24350  		}
 24351  		if mem != x6.Args[1] {
 24352  			break
 24353  		}
 24354  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 24355  			break
 24356  		}
 24357  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 24358  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 24359  		v.reset(OpCopy)
 24360  		v.AddArg(v0)
 24361  		v0.AuxInt = i0
 24362  		v0.Aux = s
 24363  		v0.AddArg(p)
 24364  		v0.AddArg(mem)
 24365  		return true
 24366  	}
 24367  	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
 24368  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 24369  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 24370  	for {
 24371  		t := v.Type
 24372  		_ = v.Args[1]
 24373  		s6 := v.Args[0]
 24374  		if s6.Op != OpPPC64SLDconst {
 24375  			break
 24376  		}
 24377  		if s6.AuxInt != 56 {
 24378  			break
 24379  		}
 24380  		x7 := s6.Args[0]
 24381  		if x7.Op != OpPPC64MOVBZload {
 24382  			break
 24383  		}
 24384  		i7 := x7.AuxInt
 24385  		s := x7.Aux
 24386  		_ = x7.Args[1]
 24387  		p := x7.Args[0]
 24388  		mem := x7.Args[1]
 24389  		o5 := v.Args[1]
 24390  		if o5.Op != OpPPC64OR {
 24391  			break
 24392  		}
 24393  		if o5.Type != t {
 24394  			break
 24395  		}
 24396  		_ = o5.Args[1]
 24397  		o4 := o5.Args[0]
 24398  		if o4.Op != OpPPC64OR {
 24399  			break
 24400  		}
 24401  		if o4.Type != t {
 24402  			break
 24403  		}
 24404  		_ = o4.Args[1]
 24405  		o3 := o4.Args[0]
 24406  		if o3.Op != OpPPC64OR {
 24407  			break
 24408  		}
 24409  		if o3.Type != t {
 24410  			break
 24411  		}
 24412  		_ = o3.Args[1]
 24413  		o2 := o3.Args[0]
 24414  		if o2.Op != OpPPC64OR {
 24415  			break
 24416  		}
 24417  		if o2.Type != t {
 24418  			break
 24419  		}
 24420  		_ = o2.Args[1]
 24421  		o1 := o2.Args[0]
 24422  		if o1.Op != OpPPC64OR {
 24423  			break
 24424  		}
 24425  		if o1.Type != t {
 24426  			break
 24427  		}
 24428  		_ = o1.Args[1]
 24429  		o0 := o1.Args[0]
 24430  		if o0.Op != OpPPC64OR {
 24431  			break
 24432  		}
 24433  		if o0.Type != t {
 24434  			break
 24435  		}
 24436  		_ = o0.Args[1]
 24437  		x0 := o0.Args[0]
 24438  		if x0.Op != OpPPC64MOVBZload {
 24439  			break
 24440  		}
 24441  		i0 := x0.AuxInt
 24442  		if x0.Aux != s {
 24443  			break
 24444  		}
 24445  		_ = x0.Args[1]
 24446  		if p != x0.Args[0] {
 24447  			break
 24448  		}
 24449  		if mem != x0.Args[1] {
 24450  			break
 24451  		}
 24452  		s0 := o0.Args[1]
 24453  		if s0.Op != OpPPC64SLDconst {
 24454  			break
 24455  		}
 24456  		if s0.AuxInt != 8 {
 24457  			break
 24458  		}
 24459  		x1 := s0.Args[0]
 24460  		if x1.Op != OpPPC64MOVBZload {
 24461  			break
 24462  		}
 24463  		i1 := x1.AuxInt
 24464  		if x1.Aux != s {
 24465  			break
 24466  		}
 24467  		_ = x1.Args[1]
 24468  		if p != x1.Args[0] {
 24469  			break
 24470  		}
 24471  		if mem != x1.Args[1] {
 24472  			break
 24473  		}
 24474  		s1 := o1.Args[1]
 24475  		if s1.Op != OpPPC64SLDconst {
 24476  			break
 24477  		}
 24478  		if s1.AuxInt != 16 {
 24479  			break
 24480  		}
 24481  		x2 := s1.Args[0]
 24482  		if x2.Op != OpPPC64MOVBZload {
 24483  			break
 24484  		}
 24485  		i2 := x2.AuxInt
 24486  		if x2.Aux != s {
 24487  			break
 24488  		}
 24489  		_ = x2.Args[1]
 24490  		if p != x2.Args[0] {
 24491  			break
 24492  		}
 24493  		if mem != x2.Args[1] {
 24494  			break
 24495  		}
 24496  		s2 := o2.Args[1]
 24497  		if s2.Op != OpPPC64SLDconst {
 24498  			break
 24499  		}
 24500  		if s2.AuxInt != 24 {
 24501  			break
 24502  		}
 24503  		x3 := s2.Args[0]
 24504  		if x3.Op != OpPPC64MOVBZload {
 24505  			break
 24506  		}
 24507  		i3 := x3.AuxInt
 24508  		if x3.Aux != s {
 24509  			break
 24510  		}
 24511  		_ = x3.Args[1]
 24512  		if p != x3.Args[0] {
 24513  			break
 24514  		}
 24515  		if mem != x3.Args[1] {
 24516  			break
 24517  		}
 24518  		s3 := o3.Args[1]
 24519  		if s3.Op != OpPPC64SLDconst {
 24520  			break
 24521  		}
 24522  		if s3.AuxInt != 32 {
 24523  			break
 24524  		}
 24525  		x4 := s3.Args[0]
 24526  		if x4.Op != OpPPC64MOVBZload {
 24527  			break
 24528  		}
 24529  		i4 := x4.AuxInt
 24530  		if x4.Aux != s {
 24531  			break
 24532  		}
 24533  		_ = x4.Args[1]
 24534  		if p != x4.Args[0] {
 24535  			break
 24536  		}
 24537  		if mem != x4.Args[1] {
 24538  			break
 24539  		}
 24540  		s4 := o4.Args[1]
 24541  		if s4.Op != OpPPC64SLDconst {
 24542  			break
 24543  		}
 24544  		if s4.AuxInt != 40 {
 24545  			break
 24546  		}
 24547  		x5 := s4.Args[0]
 24548  		if x5.Op != OpPPC64MOVBZload {
 24549  			break
 24550  		}
 24551  		i5 := x5.AuxInt
 24552  		if x5.Aux != s {
 24553  			break
 24554  		}
 24555  		_ = x5.Args[1]
 24556  		if p != x5.Args[0] {
 24557  			break
 24558  		}
 24559  		if mem != x5.Args[1] {
 24560  			break
 24561  		}
 24562  		s5 := o5.Args[1]
 24563  		if s5.Op != OpPPC64SLDconst {
 24564  			break
 24565  		}
 24566  		if s5.AuxInt != 48 {
 24567  			break
 24568  		}
 24569  		x6 := s5.Args[0]
 24570  		if x6.Op != OpPPC64MOVBZload {
 24571  			break
 24572  		}
 24573  		i6 := x6.AuxInt
 24574  		if x6.Aux != s {
 24575  			break
 24576  		}
 24577  		_ = x6.Args[1]
 24578  		if p != x6.Args[0] {
 24579  			break
 24580  		}
 24581  		if mem != x6.Args[1] {
 24582  			break
 24583  		}
 24584  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 24585  			break
 24586  		}
 24587  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 24588  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 24589  		v.reset(OpCopy)
 24590  		v.AddArg(v0)
 24591  		v0.AuxInt = i0
 24592  		v0.Aux = s
 24593  		v0.AddArg(p)
 24594  		v0.AddArg(mem)
 24595  		return true
 24596  	}
 24597  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 24598  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 24599  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 24600  	for {
 24601  		t := v.Type
 24602  		_ = v.Args[1]
 24603  		o5 := v.Args[0]
 24604  		if o5.Op != OpPPC64OR {
 24605  			break
 24606  		}
 24607  		if o5.Type != t {
 24608  			break
 24609  		}
 24610  		_ = o5.Args[1]
 24611  		s5 := o5.Args[0]
 24612  		if s5.Op != OpPPC64SLDconst {
 24613  			break
 24614  		}
 24615  		if s5.AuxInt != 48 {
 24616  			break
 24617  		}
 24618  		x6 := s5.Args[0]
 24619  		if x6.Op != OpPPC64MOVBZload {
 24620  			break
 24621  		}
 24622  		i6 := x6.AuxInt
 24623  		s := x6.Aux
 24624  		_ = x6.Args[1]
 24625  		p := x6.Args[0]
 24626  		mem := x6.Args[1]
 24627  		o4 := o5.Args[1]
 24628  		if o4.Op != OpPPC64OR {
 24629  			break
 24630  		}
 24631  		if o4.Type != t {
 24632  			break
 24633  		}
 24634  		_ = o4.Args[1]
 24635  		s4 := o4.Args[0]
 24636  		if s4.Op != OpPPC64SLDconst {
 24637  			break
 24638  		}
 24639  		if s4.AuxInt != 40 {
 24640  			break
 24641  		}
 24642  		x5 := s4.Args[0]
 24643  		if x5.Op != OpPPC64MOVBZload {
 24644  			break
 24645  		}
 24646  		i5 := x5.AuxInt
 24647  		if x5.Aux != s {
 24648  			break
 24649  		}
 24650  		_ = x5.Args[1]
 24651  		if p != x5.Args[0] {
 24652  			break
 24653  		}
 24654  		if mem != x5.Args[1] {
 24655  			break
 24656  		}
 24657  		o3 := o4.Args[1]
 24658  		if o3.Op != OpPPC64OR {
 24659  			break
 24660  		}
 24661  		if o3.Type != t {
 24662  			break
 24663  		}
 24664  		_ = o3.Args[1]
 24665  		s3 := o3.Args[0]
 24666  		if s3.Op != OpPPC64SLDconst {
 24667  			break
 24668  		}
 24669  		if s3.AuxInt != 32 {
 24670  			break
 24671  		}
 24672  		x4 := s3.Args[0]
 24673  		if x4.Op != OpPPC64MOVBZload {
 24674  			break
 24675  		}
 24676  		i4 := x4.AuxInt
 24677  		if x4.Aux != s {
 24678  			break
 24679  		}
 24680  		_ = x4.Args[1]
 24681  		if p != x4.Args[0] {
 24682  			break
 24683  		}
 24684  		if mem != x4.Args[1] {
 24685  			break
 24686  		}
 24687  		o2 := o3.Args[1]
 24688  		if o2.Op != OpPPC64OR {
 24689  			break
 24690  		}
 24691  		if o2.Type != t {
 24692  			break
 24693  		}
 24694  		_ = o2.Args[1]
 24695  		s2 := o2.Args[0]
 24696  		if s2.Op != OpPPC64SLDconst {
 24697  			break
 24698  		}
 24699  		if s2.AuxInt != 24 {
 24700  			break
 24701  		}
 24702  		x3 := s2.Args[0]
 24703  		if x3.Op != OpPPC64MOVBZload {
 24704  			break
 24705  		}
 24706  		i3 := x3.AuxInt
 24707  		if x3.Aux != s {
 24708  			break
 24709  		}
 24710  		_ = x3.Args[1]
 24711  		if p != x3.Args[0] {
 24712  			break
 24713  		}
 24714  		if mem != x3.Args[1] {
 24715  			break
 24716  		}
 24717  		o1 := o2.Args[1]
 24718  		if o1.Op != OpPPC64OR {
 24719  			break
 24720  		}
 24721  		if o1.Type != t {
 24722  			break
 24723  		}
 24724  		_ = o1.Args[1]
 24725  		s1 := o1.Args[0]
 24726  		if s1.Op != OpPPC64SLDconst {
 24727  			break
 24728  		}
 24729  		if s1.AuxInt != 16 {
 24730  			break
 24731  		}
 24732  		x2 := s1.Args[0]
 24733  		if x2.Op != OpPPC64MOVBZload {
 24734  			break
 24735  		}
 24736  		i2 := x2.AuxInt
 24737  		if x2.Aux != s {
 24738  			break
 24739  		}
 24740  		_ = x2.Args[1]
 24741  		if p != x2.Args[0] {
 24742  			break
 24743  		}
 24744  		if mem != x2.Args[1] {
 24745  			break
 24746  		}
 24747  		o0 := o1.Args[1]
 24748  		if o0.Op != OpPPC64OR {
 24749  			break
 24750  		}
 24751  		if o0.Type != t {
 24752  			break
 24753  		}
 24754  		_ = o0.Args[1]
 24755  		s0 := o0.Args[0]
 24756  		if s0.Op != OpPPC64SLDconst {
 24757  			break
 24758  		}
 24759  		if s0.AuxInt != 8 {
 24760  			break
 24761  		}
 24762  		x1 := s0.Args[0]
 24763  		if x1.Op != OpPPC64MOVBZload {
 24764  			break
 24765  		}
 24766  		i1 := x1.AuxInt
 24767  		if x1.Aux != s {
 24768  			break
 24769  		}
 24770  		_ = x1.Args[1]
 24771  		if p != x1.Args[0] {
 24772  			break
 24773  		}
 24774  		if mem != x1.Args[1] {
 24775  			break
 24776  		}
 24777  		x0 := o0.Args[1]
 24778  		if x0.Op != OpPPC64MOVBZload {
 24779  			break
 24780  		}
 24781  		i0 := x0.AuxInt
 24782  		if x0.Aux != s {
 24783  			break
 24784  		}
 24785  		_ = x0.Args[1]
 24786  		if p != x0.Args[0] {
 24787  			break
 24788  		}
 24789  		if mem != x0.Args[1] {
 24790  			break
 24791  		}
 24792  		s6 := v.Args[1]
 24793  		if s6.Op != OpPPC64SLDconst {
 24794  			break
 24795  		}
 24796  		if s6.AuxInt != 56 {
 24797  			break
 24798  		}
 24799  		x7 := s6.Args[0]
 24800  		if x7.Op != OpPPC64MOVBZload {
 24801  			break
 24802  		}
 24803  		i7 := x7.AuxInt
 24804  		if x7.Aux != s {
 24805  			break
 24806  		}
 24807  		_ = x7.Args[1]
 24808  		if p != x7.Args[0] {
 24809  			break
 24810  		}
 24811  		if mem != x7.Args[1] {
 24812  			break
 24813  		}
 24814  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 24815  			break
 24816  		}
 24817  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 24818  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 24819  		v.reset(OpCopy)
 24820  		v.AddArg(v0)
 24821  		v0.AuxInt = i0
 24822  		v0.Aux = s
 24823  		v0.AddArg(p)
 24824  		v0.AddArg(mem)
 24825  		return true
 24826  	}
 24827  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 24828  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 24829  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 24830  	for {
 24831  		t := v.Type
 24832  		_ = v.Args[1]
 24833  		o5 := v.Args[0]
 24834  		if o5.Op != OpPPC64OR {
 24835  			break
 24836  		}
 24837  		if o5.Type != t {
 24838  			break
 24839  		}
 24840  		_ = o5.Args[1]
 24841  		s5 := o5.Args[0]
 24842  		if s5.Op != OpPPC64SLDconst {
 24843  			break
 24844  		}
 24845  		if s5.AuxInt != 48 {
 24846  			break
 24847  		}
 24848  		x6 := s5.Args[0]
 24849  		if x6.Op != OpPPC64MOVBZload {
 24850  			break
 24851  		}
 24852  		i6 := x6.AuxInt
 24853  		s := x6.Aux
 24854  		_ = x6.Args[1]
 24855  		p := x6.Args[0]
 24856  		mem := x6.Args[1]
 24857  		o4 := o5.Args[1]
 24858  		if o4.Op != OpPPC64OR {
 24859  			break
 24860  		}
 24861  		if o4.Type != t {
 24862  			break
 24863  		}
 24864  		_ = o4.Args[1]
 24865  		s4 := o4.Args[0]
 24866  		if s4.Op != OpPPC64SLDconst {
 24867  			break
 24868  		}
 24869  		if s4.AuxInt != 40 {
 24870  			break
 24871  		}
 24872  		x5 := s4.Args[0]
 24873  		if x5.Op != OpPPC64MOVBZload {
 24874  			break
 24875  		}
 24876  		i5 := x5.AuxInt
 24877  		if x5.Aux != s {
 24878  			break
 24879  		}
 24880  		_ = x5.Args[1]
 24881  		if p != x5.Args[0] {
 24882  			break
 24883  		}
 24884  		if mem != x5.Args[1] {
 24885  			break
 24886  		}
 24887  		o3 := o4.Args[1]
 24888  		if o3.Op != OpPPC64OR {
 24889  			break
 24890  		}
 24891  		if o3.Type != t {
 24892  			break
 24893  		}
 24894  		_ = o3.Args[1]
 24895  		s3 := o3.Args[0]
 24896  		if s3.Op != OpPPC64SLDconst {
 24897  			break
 24898  		}
 24899  		if s3.AuxInt != 32 {
 24900  			break
 24901  		}
 24902  		x4 := s3.Args[0]
 24903  		if x4.Op != OpPPC64MOVBZload {
 24904  			break
 24905  		}
 24906  		i4 := x4.AuxInt
 24907  		if x4.Aux != s {
 24908  			break
 24909  		}
 24910  		_ = x4.Args[1]
 24911  		if p != x4.Args[0] {
 24912  			break
 24913  		}
 24914  		if mem != x4.Args[1] {
 24915  			break
 24916  		}
 24917  		o2 := o3.Args[1]
 24918  		if o2.Op != OpPPC64OR {
 24919  			break
 24920  		}
 24921  		if o2.Type != t {
 24922  			break
 24923  		}
 24924  		_ = o2.Args[1]
 24925  		s2 := o2.Args[0]
 24926  		if s2.Op != OpPPC64SLDconst {
 24927  			break
 24928  		}
 24929  		if s2.AuxInt != 24 {
 24930  			break
 24931  		}
 24932  		x3 := s2.Args[0]
 24933  		if x3.Op != OpPPC64MOVBZload {
 24934  			break
 24935  		}
 24936  		i3 := x3.AuxInt
 24937  		if x3.Aux != s {
 24938  			break
 24939  		}
 24940  		_ = x3.Args[1]
 24941  		if p != x3.Args[0] {
 24942  			break
 24943  		}
 24944  		if mem != x3.Args[1] {
 24945  			break
 24946  		}
 24947  		o1 := o2.Args[1]
 24948  		if o1.Op != OpPPC64OR {
 24949  			break
 24950  		}
 24951  		if o1.Type != t {
 24952  			break
 24953  		}
 24954  		_ = o1.Args[1]
 24955  		s1 := o1.Args[0]
 24956  		if s1.Op != OpPPC64SLDconst {
 24957  			break
 24958  		}
 24959  		if s1.AuxInt != 16 {
 24960  			break
 24961  		}
 24962  		x2 := s1.Args[0]
 24963  		if x2.Op != OpPPC64MOVBZload {
 24964  			break
 24965  		}
 24966  		i2 := x2.AuxInt
 24967  		if x2.Aux != s {
 24968  			break
 24969  		}
 24970  		_ = x2.Args[1]
 24971  		if p != x2.Args[0] {
 24972  			break
 24973  		}
 24974  		if mem != x2.Args[1] {
 24975  			break
 24976  		}
 24977  		o0 := o1.Args[1]
 24978  		if o0.Op != OpPPC64OR {
 24979  			break
 24980  		}
 24981  		if o0.Type != t {
 24982  			break
 24983  		}
 24984  		_ = o0.Args[1]
 24985  		x0 := o0.Args[0]
 24986  		if x0.Op != OpPPC64MOVBZload {
 24987  			break
 24988  		}
 24989  		i0 := x0.AuxInt
 24990  		if x0.Aux != s {
 24991  			break
 24992  		}
 24993  		_ = x0.Args[1]
 24994  		if p != x0.Args[0] {
 24995  			break
 24996  		}
 24997  		if mem != x0.Args[1] {
 24998  			break
 24999  		}
 25000  		s0 := o0.Args[1]
 25001  		if s0.Op != OpPPC64SLDconst {
 25002  			break
 25003  		}
 25004  		if s0.AuxInt != 8 {
 25005  			break
 25006  		}
 25007  		x1 := s0.Args[0]
 25008  		if x1.Op != OpPPC64MOVBZload {
 25009  			break
 25010  		}
 25011  		i1 := x1.AuxInt
 25012  		if x1.Aux != s {
 25013  			break
 25014  		}
 25015  		_ = x1.Args[1]
 25016  		if p != x1.Args[0] {
 25017  			break
 25018  		}
 25019  		if mem != x1.Args[1] {
 25020  			break
 25021  		}
 25022  		s6 := v.Args[1]
 25023  		if s6.Op != OpPPC64SLDconst {
 25024  			break
 25025  		}
 25026  		if s6.AuxInt != 56 {
 25027  			break
 25028  		}
 25029  		x7 := s6.Args[0]
 25030  		if x7.Op != OpPPC64MOVBZload {
 25031  			break
 25032  		}
 25033  		i7 := x7.AuxInt
 25034  		if x7.Aux != s {
 25035  			break
 25036  		}
 25037  		_ = x7.Args[1]
 25038  		if p != x7.Args[0] {
 25039  			break
 25040  		}
 25041  		if mem != x7.Args[1] {
 25042  			break
 25043  		}
 25044  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25045  			break
 25046  		}
 25047  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25048  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25049  		v.reset(OpCopy)
 25050  		v.AddArg(v0)
 25051  		v0.AuxInt = i0
 25052  		v0.Aux = s
 25053  		v0.AddArg(p)
 25054  		v0.AddArg(mem)
 25055  		return true
 25056  	}
 25057  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25058  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25059  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25060  	for {
 25061  		t := v.Type
 25062  		_ = v.Args[1]
 25063  		o5 := v.Args[0]
 25064  		if o5.Op != OpPPC64OR {
 25065  			break
 25066  		}
 25067  		if o5.Type != t {
 25068  			break
 25069  		}
 25070  		_ = o5.Args[1]
 25071  		s5 := o5.Args[0]
 25072  		if s5.Op != OpPPC64SLDconst {
 25073  			break
 25074  		}
 25075  		if s5.AuxInt != 48 {
 25076  			break
 25077  		}
 25078  		x6 := s5.Args[0]
 25079  		if x6.Op != OpPPC64MOVBZload {
 25080  			break
 25081  		}
 25082  		i6 := x6.AuxInt
 25083  		s := x6.Aux
 25084  		_ = x6.Args[1]
 25085  		p := x6.Args[0]
 25086  		mem := x6.Args[1]
 25087  		o4 := o5.Args[1]
 25088  		if o4.Op != OpPPC64OR {
 25089  			break
 25090  		}
 25091  		if o4.Type != t {
 25092  			break
 25093  		}
 25094  		_ = o4.Args[1]
 25095  		s4 := o4.Args[0]
 25096  		if s4.Op != OpPPC64SLDconst {
 25097  			break
 25098  		}
 25099  		if s4.AuxInt != 40 {
 25100  			break
 25101  		}
 25102  		x5 := s4.Args[0]
 25103  		if x5.Op != OpPPC64MOVBZload {
 25104  			break
 25105  		}
 25106  		i5 := x5.AuxInt
 25107  		if x5.Aux != s {
 25108  			break
 25109  		}
 25110  		_ = x5.Args[1]
 25111  		if p != x5.Args[0] {
 25112  			break
 25113  		}
 25114  		if mem != x5.Args[1] {
 25115  			break
 25116  		}
 25117  		o3 := o4.Args[1]
 25118  		if o3.Op != OpPPC64OR {
 25119  			break
 25120  		}
 25121  		if o3.Type != t {
 25122  			break
 25123  		}
 25124  		_ = o3.Args[1]
 25125  		s3 := o3.Args[0]
 25126  		if s3.Op != OpPPC64SLDconst {
 25127  			break
 25128  		}
 25129  		if s3.AuxInt != 32 {
 25130  			break
 25131  		}
 25132  		x4 := s3.Args[0]
 25133  		if x4.Op != OpPPC64MOVBZload {
 25134  			break
 25135  		}
 25136  		i4 := x4.AuxInt
 25137  		if x4.Aux != s {
 25138  			break
 25139  		}
 25140  		_ = x4.Args[1]
 25141  		if p != x4.Args[0] {
 25142  			break
 25143  		}
 25144  		if mem != x4.Args[1] {
 25145  			break
 25146  		}
 25147  		o2 := o3.Args[1]
 25148  		if o2.Op != OpPPC64OR {
 25149  			break
 25150  		}
 25151  		if o2.Type != t {
 25152  			break
 25153  		}
 25154  		_ = o2.Args[1]
 25155  		s2 := o2.Args[0]
 25156  		if s2.Op != OpPPC64SLDconst {
 25157  			break
 25158  		}
 25159  		if s2.AuxInt != 24 {
 25160  			break
 25161  		}
 25162  		x3 := s2.Args[0]
 25163  		if x3.Op != OpPPC64MOVBZload {
 25164  			break
 25165  		}
 25166  		i3 := x3.AuxInt
 25167  		if x3.Aux != s {
 25168  			break
 25169  		}
 25170  		_ = x3.Args[1]
 25171  		if p != x3.Args[0] {
 25172  			break
 25173  		}
 25174  		if mem != x3.Args[1] {
 25175  			break
 25176  		}
 25177  		o1 := o2.Args[1]
 25178  		if o1.Op != OpPPC64OR {
 25179  			break
 25180  		}
 25181  		if o1.Type != t {
 25182  			break
 25183  		}
 25184  		_ = o1.Args[1]
 25185  		o0 := o1.Args[0]
 25186  		if o0.Op != OpPPC64OR {
 25187  			break
 25188  		}
 25189  		if o0.Type != t {
 25190  			break
 25191  		}
 25192  		_ = o0.Args[1]
 25193  		s0 := o0.Args[0]
 25194  		if s0.Op != OpPPC64SLDconst {
 25195  			break
 25196  		}
 25197  		if s0.AuxInt != 8 {
 25198  			break
 25199  		}
 25200  		x1 := s0.Args[0]
 25201  		if x1.Op != OpPPC64MOVBZload {
 25202  			break
 25203  		}
 25204  		i1 := x1.AuxInt
 25205  		if x1.Aux != s {
 25206  			break
 25207  		}
 25208  		_ = x1.Args[1]
 25209  		if p != x1.Args[0] {
 25210  			break
 25211  		}
 25212  		if mem != x1.Args[1] {
 25213  			break
 25214  		}
 25215  		x0 := o0.Args[1]
 25216  		if x0.Op != OpPPC64MOVBZload {
 25217  			break
 25218  		}
 25219  		i0 := x0.AuxInt
 25220  		if x0.Aux != s {
 25221  			break
 25222  		}
 25223  		_ = x0.Args[1]
 25224  		if p != x0.Args[0] {
 25225  			break
 25226  		}
 25227  		if mem != x0.Args[1] {
 25228  			break
 25229  		}
 25230  		s1 := o1.Args[1]
 25231  		if s1.Op != OpPPC64SLDconst {
 25232  			break
 25233  		}
 25234  		if s1.AuxInt != 16 {
 25235  			break
 25236  		}
 25237  		x2 := s1.Args[0]
 25238  		if x2.Op != OpPPC64MOVBZload {
 25239  			break
 25240  		}
 25241  		i2 := x2.AuxInt
 25242  		if x2.Aux != s {
 25243  			break
 25244  		}
 25245  		_ = x2.Args[1]
 25246  		if p != x2.Args[0] {
 25247  			break
 25248  		}
 25249  		if mem != x2.Args[1] {
 25250  			break
 25251  		}
 25252  		s6 := v.Args[1]
 25253  		if s6.Op != OpPPC64SLDconst {
 25254  			break
 25255  		}
 25256  		if s6.AuxInt != 56 {
 25257  			break
 25258  		}
 25259  		x7 := s6.Args[0]
 25260  		if x7.Op != OpPPC64MOVBZload {
 25261  			break
 25262  		}
 25263  		i7 := x7.AuxInt
 25264  		if x7.Aux != s {
 25265  			break
 25266  		}
 25267  		_ = x7.Args[1]
 25268  		if p != x7.Args[0] {
 25269  			break
 25270  		}
 25271  		if mem != x7.Args[1] {
 25272  			break
 25273  		}
 25274  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25275  			break
 25276  		}
 25277  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25278  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25279  		v.reset(OpCopy)
 25280  		v.AddArg(v0)
 25281  		v0.AuxInt = i0
 25282  		v0.Aux = s
 25283  		v0.AddArg(p)
 25284  		v0.AddArg(mem)
 25285  		return true
 25286  	}
 25287  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25288  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25289  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25290  	for {
 25291  		t := v.Type
 25292  		_ = v.Args[1]
 25293  		o5 := v.Args[0]
 25294  		if o5.Op != OpPPC64OR {
 25295  			break
 25296  		}
 25297  		if o5.Type != t {
 25298  			break
 25299  		}
 25300  		_ = o5.Args[1]
 25301  		s5 := o5.Args[0]
 25302  		if s5.Op != OpPPC64SLDconst {
 25303  			break
 25304  		}
 25305  		if s5.AuxInt != 48 {
 25306  			break
 25307  		}
 25308  		x6 := s5.Args[0]
 25309  		if x6.Op != OpPPC64MOVBZload {
 25310  			break
 25311  		}
 25312  		i6 := x6.AuxInt
 25313  		s := x6.Aux
 25314  		_ = x6.Args[1]
 25315  		p := x6.Args[0]
 25316  		mem := x6.Args[1]
 25317  		o4 := o5.Args[1]
 25318  		if o4.Op != OpPPC64OR {
 25319  			break
 25320  		}
 25321  		if o4.Type != t {
 25322  			break
 25323  		}
 25324  		_ = o4.Args[1]
 25325  		s4 := o4.Args[0]
 25326  		if s4.Op != OpPPC64SLDconst {
 25327  			break
 25328  		}
 25329  		if s4.AuxInt != 40 {
 25330  			break
 25331  		}
 25332  		x5 := s4.Args[0]
 25333  		if x5.Op != OpPPC64MOVBZload {
 25334  			break
 25335  		}
 25336  		i5 := x5.AuxInt
 25337  		if x5.Aux != s {
 25338  			break
 25339  		}
 25340  		_ = x5.Args[1]
 25341  		if p != x5.Args[0] {
 25342  			break
 25343  		}
 25344  		if mem != x5.Args[1] {
 25345  			break
 25346  		}
 25347  		o3 := o4.Args[1]
 25348  		if o3.Op != OpPPC64OR {
 25349  			break
 25350  		}
 25351  		if o3.Type != t {
 25352  			break
 25353  		}
 25354  		_ = o3.Args[1]
 25355  		s3 := o3.Args[0]
 25356  		if s3.Op != OpPPC64SLDconst {
 25357  			break
 25358  		}
 25359  		if s3.AuxInt != 32 {
 25360  			break
 25361  		}
 25362  		x4 := s3.Args[0]
 25363  		if x4.Op != OpPPC64MOVBZload {
 25364  			break
 25365  		}
 25366  		i4 := x4.AuxInt
 25367  		if x4.Aux != s {
 25368  			break
 25369  		}
 25370  		_ = x4.Args[1]
 25371  		if p != x4.Args[0] {
 25372  			break
 25373  		}
 25374  		if mem != x4.Args[1] {
 25375  			break
 25376  		}
 25377  		o2 := o3.Args[1]
 25378  		if o2.Op != OpPPC64OR {
 25379  			break
 25380  		}
 25381  		if o2.Type != t {
 25382  			break
 25383  		}
 25384  		_ = o2.Args[1]
 25385  		s2 := o2.Args[0]
 25386  		if s2.Op != OpPPC64SLDconst {
 25387  			break
 25388  		}
 25389  		if s2.AuxInt != 24 {
 25390  			break
 25391  		}
 25392  		x3 := s2.Args[0]
 25393  		if x3.Op != OpPPC64MOVBZload {
 25394  			break
 25395  		}
 25396  		i3 := x3.AuxInt
 25397  		if x3.Aux != s {
 25398  			break
 25399  		}
 25400  		_ = x3.Args[1]
 25401  		if p != x3.Args[0] {
 25402  			break
 25403  		}
 25404  		if mem != x3.Args[1] {
 25405  			break
 25406  		}
 25407  		o1 := o2.Args[1]
 25408  		if o1.Op != OpPPC64OR {
 25409  			break
 25410  		}
 25411  		if o1.Type != t {
 25412  			break
 25413  		}
 25414  		_ = o1.Args[1]
 25415  		o0 := o1.Args[0]
 25416  		if o0.Op != OpPPC64OR {
 25417  			break
 25418  		}
 25419  		if o0.Type != t {
 25420  			break
 25421  		}
 25422  		_ = o0.Args[1]
 25423  		x0 := o0.Args[0]
 25424  		if x0.Op != OpPPC64MOVBZload {
 25425  			break
 25426  		}
 25427  		i0 := x0.AuxInt
 25428  		if x0.Aux != s {
 25429  			break
 25430  		}
 25431  		_ = x0.Args[1]
 25432  		if p != x0.Args[0] {
 25433  			break
 25434  		}
 25435  		if mem != x0.Args[1] {
 25436  			break
 25437  		}
 25438  		s0 := o0.Args[1]
 25439  		if s0.Op != OpPPC64SLDconst {
 25440  			break
 25441  		}
 25442  		if s0.AuxInt != 8 {
 25443  			break
 25444  		}
 25445  		x1 := s0.Args[0]
 25446  		if x1.Op != OpPPC64MOVBZload {
 25447  			break
 25448  		}
 25449  		i1 := x1.AuxInt
 25450  		if x1.Aux != s {
 25451  			break
 25452  		}
 25453  		_ = x1.Args[1]
 25454  		if p != x1.Args[0] {
 25455  			break
 25456  		}
 25457  		if mem != x1.Args[1] {
 25458  			break
 25459  		}
 25460  		s1 := o1.Args[1]
 25461  		if s1.Op != OpPPC64SLDconst {
 25462  			break
 25463  		}
 25464  		if s1.AuxInt != 16 {
 25465  			break
 25466  		}
 25467  		x2 := s1.Args[0]
 25468  		if x2.Op != OpPPC64MOVBZload {
 25469  			break
 25470  		}
 25471  		i2 := x2.AuxInt
 25472  		if x2.Aux != s {
 25473  			break
 25474  		}
 25475  		_ = x2.Args[1]
 25476  		if p != x2.Args[0] {
 25477  			break
 25478  		}
 25479  		if mem != x2.Args[1] {
 25480  			break
 25481  		}
 25482  		s6 := v.Args[1]
 25483  		if s6.Op != OpPPC64SLDconst {
 25484  			break
 25485  		}
 25486  		if s6.AuxInt != 56 {
 25487  			break
 25488  		}
 25489  		x7 := s6.Args[0]
 25490  		if x7.Op != OpPPC64MOVBZload {
 25491  			break
 25492  		}
 25493  		i7 := x7.AuxInt
 25494  		if x7.Aux != s {
 25495  			break
 25496  		}
 25497  		_ = x7.Args[1]
 25498  		if p != x7.Args[0] {
 25499  			break
 25500  		}
 25501  		if mem != x7.Args[1] {
 25502  			break
 25503  		}
 25504  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25505  			break
 25506  		}
 25507  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25508  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25509  		v.reset(OpCopy)
 25510  		v.AddArg(v0)
 25511  		v0.AuxInt = i0
 25512  		v0.Aux = s
 25513  		v0.AddArg(p)
 25514  		v0.AddArg(mem)
 25515  		return true
 25516  	}
 25517  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25518  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25519  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25520  	for {
 25521  		t := v.Type
 25522  		_ = v.Args[1]
 25523  		o5 := v.Args[0]
 25524  		if o5.Op != OpPPC64OR {
 25525  			break
 25526  		}
 25527  		if o5.Type != t {
 25528  			break
 25529  		}
 25530  		_ = o5.Args[1]
 25531  		s5 := o5.Args[0]
 25532  		if s5.Op != OpPPC64SLDconst {
 25533  			break
 25534  		}
 25535  		if s5.AuxInt != 48 {
 25536  			break
 25537  		}
 25538  		x6 := s5.Args[0]
 25539  		if x6.Op != OpPPC64MOVBZload {
 25540  			break
 25541  		}
 25542  		i6 := x6.AuxInt
 25543  		s := x6.Aux
 25544  		_ = x6.Args[1]
 25545  		p := x6.Args[0]
 25546  		mem := x6.Args[1]
 25547  		o4 := o5.Args[1]
 25548  		if o4.Op != OpPPC64OR {
 25549  			break
 25550  		}
 25551  		if o4.Type != t {
 25552  			break
 25553  		}
 25554  		_ = o4.Args[1]
 25555  		s4 := o4.Args[0]
 25556  		if s4.Op != OpPPC64SLDconst {
 25557  			break
 25558  		}
 25559  		if s4.AuxInt != 40 {
 25560  			break
 25561  		}
 25562  		x5 := s4.Args[0]
 25563  		if x5.Op != OpPPC64MOVBZload {
 25564  			break
 25565  		}
 25566  		i5 := x5.AuxInt
 25567  		if x5.Aux != s {
 25568  			break
 25569  		}
 25570  		_ = x5.Args[1]
 25571  		if p != x5.Args[0] {
 25572  			break
 25573  		}
 25574  		if mem != x5.Args[1] {
 25575  			break
 25576  		}
 25577  		o3 := o4.Args[1]
 25578  		if o3.Op != OpPPC64OR {
 25579  			break
 25580  		}
 25581  		if o3.Type != t {
 25582  			break
 25583  		}
 25584  		_ = o3.Args[1]
 25585  		s3 := o3.Args[0]
 25586  		if s3.Op != OpPPC64SLDconst {
 25587  			break
 25588  		}
 25589  		if s3.AuxInt != 32 {
 25590  			break
 25591  		}
 25592  		x4 := s3.Args[0]
 25593  		if x4.Op != OpPPC64MOVBZload {
 25594  			break
 25595  		}
 25596  		i4 := x4.AuxInt
 25597  		if x4.Aux != s {
 25598  			break
 25599  		}
 25600  		_ = x4.Args[1]
 25601  		if p != x4.Args[0] {
 25602  			break
 25603  		}
 25604  		if mem != x4.Args[1] {
 25605  			break
 25606  		}
 25607  		o2 := o3.Args[1]
 25608  		if o2.Op != OpPPC64OR {
 25609  			break
 25610  		}
 25611  		if o2.Type != t {
 25612  			break
 25613  		}
 25614  		_ = o2.Args[1]
 25615  		o1 := o2.Args[0]
 25616  		if o1.Op != OpPPC64OR {
 25617  			break
 25618  		}
 25619  		if o1.Type != t {
 25620  			break
 25621  		}
 25622  		_ = o1.Args[1]
 25623  		s1 := o1.Args[0]
 25624  		if s1.Op != OpPPC64SLDconst {
 25625  			break
 25626  		}
 25627  		if s1.AuxInt != 16 {
 25628  			break
 25629  		}
 25630  		x2 := s1.Args[0]
 25631  		if x2.Op != OpPPC64MOVBZload {
 25632  			break
 25633  		}
 25634  		i2 := x2.AuxInt
 25635  		if x2.Aux != s {
 25636  			break
 25637  		}
 25638  		_ = x2.Args[1]
 25639  		if p != x2.Args[0] {
 25640  			break
 25641  		}
 25642  		if mem != x2.Args[1] {
 25643  			break
 25644  		}
 25645  		o0 := o1.Args[1]
 25646  		if o0.Op != OpPPC64OR {
 25647  			break
 25648  		}
 25649  		if o0.Type != t {
 25650  			break
 25651  		}
 25652  		_ = o0.Args[1]
 25653  		s0 := o0.Args[0]
 25654  		if s0.Op != OpPPC64SLDconst {
 25655  			break
 25656  		}
 25657  		if s0.AuxInt != 8 {
 25658  			break
 25659  		}
 25660  		x1 := s0.Args[0]
 25661  		if x1.Op != OpPPC64MOVBZload {
 25662  			break
 25663  		}
 25664  		i1 := x1.AuxInt
 25665  		if x1.Aux != s {
 25666  			break
 25667  		}
 25668  		_ = x1.Args[1]
 25669  		if p != x1.Args[0] {
 25670  			break
 25671  		}
 25672  		if mem != x1.Args[1] {
 25673  			break
 25674  		}
 25675  		x0 := o0.Args[1]
 25676  		if x0.Op != OpPPC64MOVBZload {
 25677  			break
 25678  		}
 25679  		i0 := x0.AuxInt
 25680  		if x0.Aux != s {
 25681  			break
 25682  		}
 25683  		_ = x0.Args[1]
 25684  		if p != x0.Args[0] {
 25685  			break
 25686  		}
 25687  		if mem != x0.Args[1] {
 25688  			break
 25689  		}
 25690  		s2 := o2.Args[1]
 25691  		if s2.Op != OpPPC64SLDconst {
 25692  			break
 25693  		}
 25694  		if s2.AuxInt != 24 {
 25695  			break
 25696  		}
 25697  		x3 := s2.Args[0]
 25698  		if x3.Op != OpPPC64MOVBZload {
 25699  			break
 25700  		}
 25701  		i3 := x3.AuxInt
 25702  		if x3.Aux != s {
 25703  			break
 25704  		}
 25705  		_ = x3.Args[1]
 25706  		if p != x3.Args[0] {
 25707  			break
 25708  		}
 25709  		if mem != x3.Args[1] {
 25710  			break
 25711  		}
 25712  		s6 := v.Args[1]
 25713  		if s6.Op != OpPPC64SLDconst {
 25714  			break
 25715  		}
 25716  		if s6.AuxInt != 56 {
 25717  			break
 25718  		}
 25719  		x7 := s6.Args[0]
 25720  		if x7.Op != OpPPC64MOVBZload {
 25721  			break
 25722  		}
 25723  		i7 := x7.AuxInt
 25724  		if x7.Aux != s {
 25725  			break
 25726  		}
 25727  		_ = x7.Args[1]
 25728  		if p != x7.Args[0] {
 25729  			break
 25730  		}
 25731  		if mem != x7.Args[1] {
 25732  			break
 25733  		}
 25734  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25735  			break
 25736  		}
 25737  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25738  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25739  		v.reset(OpCopy)
 25740  		v.AddArg(v0)
 25741  		v0.AuxInt = i0
 25742  		v0.Aux = s
 25743  		v0.AddArg(p)
 25744  		v0.AddArg(mem)
 25745  		return true
 25746  	}
 25747  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25748  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25749  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25750  	for {
 25751  		t := v.Type
 25752  		_ = v.Args[1]
 25753  		o5 := v.Args[0]
 25754  		if o5.Op != OpPPC64OR {
 25755  			break
 25756  		}
 25757  		if o5.Type != t {
 25758  			break
 25759  		}
 25760  		_ = o5.Args[1]
 25761  		s5 := o5.Args[0]
 25762  		if s5.Op != OpPPC64SLDconst {
 25763  			break
 25764  		}
 25765  		if s5.AuxInt != 48 {
 25766  			break
 25767  		}
 25768  		x6 := s5.Args[0]
 25769  		if x6.Op != OpPPC64MOVBZload {
 25770  			break
 25771  		}
 25772  		i6 := x6.AuxInt
 25773  		s := x6.Aux
 25774  		_ = x6.Args[1]
 25775  		p := x6.Args[0]
 25776  		mem := x6.Args[1]
 25777  		o4 := o5.Args[1]
 25778  		if o4.Op != OpPPC64OR {
 25779  			break
 25780  		}
 25781  		if o4.Type != t {
 25782  			break
 25783  		}
 25784  		_ = o4.Args[1]
 25785  		s4 := o4.Args[0]
 25786  		if s4.Op != OpPPC64SLDconst {
 25787  			break
 25788  		}
 25789  		if s4.AuxInt != 40 {
 25790  			break
 25791  		}
 25792  		x5 := s4.Args[0]
 25793  		if x5.Op != OpPPC64MOVBZload {
 25794  			break
 25795  		}
 25796  		i5 := x5.AuxInt
 25797  		if x5.Aux != s {
 25798  			break
 25799  		}
 25800  		_ = x5.Args[1]
 25801  		if p != x5.Args[0] {
 25802  			break
 25803  		}
 25804  		if mem != x5.Args[1] {
 25805  			break
 25806  		}
 25807  		o3 := o4.Args[1]
 25808  		if o3.Op != OpPPC64OR {
 25809  			break
 25810  		}
 25811  		if o3.Type != t {
 25812  			break
 25813  		}
 25814  		_ = o3.Args[1]
 25815  		s3 := o3.Args[0]
 25816  		if s3.Op != OpPPC64SLDconst {
 25817  			break
 25818  		}
 25819  		if s3.AuxInt != 32 {
 25820  			break
 25821  		}
 25822  		x4 := s3.Args[0]
 25823  		if x4.Op != OpPPC64MOVBZload {
 25824  			break
 25825  		}
 25826  		i4 := x4.AuxInt
 25827  		if x4.Aux != s {
 25828  			break
 25829  		}
 25830  		_ = x4.Args[1]
 25831  		if p != x4.Args[0] {
 25832  			break
 25833  		}
 25834  		if mem != x4.Args[1] {
 25835  			break
 25836  		}
 25837  		o2 := o3.Args[1]
 25838  		if o2.Op != OpPPC64OR {
 25839  			break
 25840  		}
 25841  		if o2.Type != t {
 25842  			break
 25843  		}
 25844  		_ = o2.Args[1]
 25845  		o1 := o2.Args[0]
 25846  		if o1.Op != OpPPC64OR {
 25847  			break
 25848  		}
 25849  		if o1.Type != t {
 25850  			break
 25851  		}
 25852  		_ = o1.Args[1]
 25853  		s1 := o1.Args[0]
 25854  		if s1.Op != OpPPC64SLDconst {
 25855  			break
 25856  		}
 25857  		if s1.AuxInt != 16 {
 25858  			break
 25859  		}
 25860  		x2 := s1.Args[0]
 25861  		if x2.Op != OpPPC64MOVBZload {
 25862  			break
 25863  		}
 25864  		i2 := x2.AuxInt
 25865  		if x2.Aux != s {
 25866  			break
 25867  		}
 25868  		_ = x2.Args[1]
 25869  		if p != x2.Args[0] {
 25870  			break
 25871  		}
 25872  		if mem != x2.Args[1] {
 25873  			break
 25874  		}
 25875  		o0 := o1.Args[1]
 25876  		if o0.Op != OpPPC64OR {
 25877  			break
 25878  		}
 25879  		if o0.Type != t {
 25880  			break
 25881  		}
 25882  		_ = o0.Args[1]
 25883  		x0 := o0.Args[0]
 25884  		if x0.Op != OpPPC64MOVBZload {
 25885  			break
 25886  		}
 25887  		i0 := x0.AuxInt
 25888  		if x0.Aux != s {
 25889  			break
 25890  		}
 25891  		_ = x0.Args[1]
 25892  		if p != x0.Args[0] {
 25893  			break
 25894  		}
 25895  		if mem != x0.Args[1] {
 25896  			break
 25897  		}
 25898  		s0 := o0.Args[1]
 25899  		if s0.Op != OpPPC64SLDconst {
 25900  			break
 25901  		}
 25902  		if s0.AuxInt != 8 {
 25903  			break
 25904  		}
 25905  		x1 := s0.Args[0]
 25906  		if x1.Op != OpPPC64MOVBZload {
 25907  			break
 25908  		}
 25909  		i1 := x1.AuxInt
 25910  		if x1.Aux != s {
 25911  			break
 25912  		}
 25913  		_ = x1.Args[1]
 25914  		if p != x1.Args[0] {
 25915  			break
 25916  		}
 25917  		if mem != x1.Args[1] {
 25918  			break
 25919  		}
 25920  		s2 := o2.Args[1]
 25921  		if s2.Op != OpPPC64SLDconst {
 25922  			break
 25923  		}
 25924  		if s2.AuxInt != 24 {
 25925  			break
 25926  		}
 25927  		x3 := s2.Args[0]
 25928  		if x3.Op != OpPPC64MOVBZload {
 25929  			break
 25930  		}
 25931  		i3 := x3.AuxInt
 25932  		if x3.Aux != s {
 25933  			break
 25934  		}
 25935  		_ = x3.Args[1]
 25936  		if p != x3.Args[0] {
 25937  			break
 25938  		}
 25939  		if mem != x3.Args[1] {
 25940  			break
 25941  		}
 25942  		s6 := v.Args[1]
 25943  		if s6.Op != OpPPC64SLDconst {
 25944  			break
 25945  		}
 25946  		if s6.AuxInt != 56 {
 25947  			break
 25948  		}
 25949  		x7 := s6.Args[0]
 25950  		if x7.Op != OpPPC64MOVBZload {
 25951  			break
 25952  		}
 25953  		i7 := x7.AuxInt
 25954  		if x7.Aux != s {
 25955  			break
 25956  		}
 25957  		_ = x7.Args[1]
 25958  		if p != x7.Args[0] {
 25959  			break
 25960  		}
 25961  		if mem != x7.Args[1] {
 25962  			break
 25963  		}
 25964  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 25965  			break
 25966  		}
 25967  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 25968  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 25969  		v.reset(OpCopy)
 25970  		v.AddArg(v0)
 25971  		v0.AuxInt = i0
 25972  		v0.Aux = s
 25973  		v0.AddArg(p)
 25974  		v0.AddArg(mem)
 25975  		return true
 25976  	}
 25977  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 25978  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 25979  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 25980  	for {
 25981  		t := v.Type
 25982  		_ = v.Args[1]
 25983  		o5 := v.Args[0]
 25984  		if o5.Op != OpPPC64OR {
 25985  			break
 25986  		}
 25987  		if o5.Type != t {
 25988  			break
 25989  		}
 25990  		_ = o5.Args[1]
 25991  		s5 := o5.Args[0]
 25992  		if s5.Op != OpPPC64SLDconst {
 25993  			break
 25994  		}
 25995  		if s5.AuxInt != 48 {
 25996  			break
 25997  		}
 25998  		x6 := s5.Args[0]
 25999  		if x6.Op != OpPPC64MOVBZload {
 26000  			break
 26001  		}
 26002  		i6 := x6.AuxInt
 26003  		s := x6.Aux
 26004  		_ = x6.Args[1]
 26005  		p := x6.Args[0]
 26006  		mem := x6.Args[1]
 26007  		o4 := o5.Args[1]
 26008  		if o4.Op != OpPPC64OR {
 26009  			break
 26010  		}
 26011  		if o4.Type != t {
 26012  			break
 26013  		}
 26014  		_ = o4.Args[1]
 26015  		s4 := o4.Args[0]
 26016  		if s4.Op != OpPPC64SLDconst {
 26017  			break
 26018  		}
 26019  		if s4.AuxInt != 40 {
 26020  			break
 26021  		}
 26022  		x5 := s4.Args[0]
 26023  		if x5.Op != OpPPC64MOVBZload {
 26024  			break
 26025  		}
 26026  		i5 := x5.AuxInt
 26027  		if x5.Aux != s {
 26028  			break
 26029  		}
 26030  		_ = x5.Args[1]
 26031  		if p != x5.Args[0] {
 26032  			break
 26033  		}
 26034  		if mem != x5.Args[1] {
 26035  			break
 26036  		}
 26037  		o3 := o4.Args[1]
 26038  		if o3.Op != OpPPC64OR {
 26039  			break
 26040  		}
 26041  		if o3.Type != t {
 26042  			break
 26043  		}
 26044  		_ = o3.Args[1]
 26045  		s3 := o3.Args[0]
 26046  		if s3.Op != OpPPC64SLDconst {
 26047  			break
 26048  		}
 26049  		if s3.AuxInt != 32 {
 26050  			break
 26051  		}
 26052  		x4 := s3.Args[0]
 26053  		if x4.Op != OpPPC64MOVBZload {
 26054  			break
 26055  		}
 26056  		i4 := x4.AuxInt
 26057  		if x4.Aux != s {
 26058  			break
 26059  		}
 26060  		_ = x4.Args[1]
 26061  		if p != x4.Args[0] {
 26062  			break
 26063  		}
 26064  		if mem != x4.Args[1] {
 26065  			break
 26066  		}
 26067  		o2 := o3.Args[1]
 26068  		if o2.Op != OpPPC64OR {
 26069  			break
 26070  		}
 26071  		if o2.Type != t {
 26072  			break
 26073  		}
 26074  		_ = o2.Args[1]
 26075  		o1 := o2.Args[0]
 26076  		if o1.Op != OpPPC64OR {
 26077  			break
 26078  		}
 26079  		if o1.Type != t {
 26080  			break
 26081  		}
 26082  		_ = o1.Args[1]
 26083  		o0 := o1.Args[0]
 26084  		if o0.Op != OpPPC64OR {
 26085  			break
 26086  		}
 26087  		if o0.Type != t {
 26088  			break
 26089  		}
 26090  		_ = o0.Args[1]
 26091  		s0 := o0.Args[0]
 26092  		if s0.Op != OpPPC64SLDconst {
 26093  			break
 26094  		}
 26095  		if s0.AuxInt != 8 {
 26096  			break
 26097  		}
 26098  		x1 := s0.Args[0]
 26099  		if x1.Op != OpPPC64MOVBZload {
 26100  			break
 26101  		}
 26102  		i1 := x1.AuxInt
 26103  		if x1.Aux != s {
 26104  			break
 26105  		}
 26106  		_ = x1.Args[1]
 26107  		if p != x1.Args[0] {
 26108  			break
 26109  		}
 26110  		if mem != x1.Args[1] {
 26111  			break
 26112  		}
 26113  		x0 := o0.Args[1]
 26114  		if x0.Op != OpPPC64MOVBZload {
 26115  			break
 26116  		}
 26117  		i0 := x0.AuxInt
 26118  		if x0.Aux != s {
 26119  			break
 26120  		}
 26121  		_ = x0.Args[1]
 26122  		if p != x0.Args[0] {
 26123  			break
 26124  		}
 26125  		if mem != x0.Args[1] {
 26126  			break
 26127  		}
 26128  		s1 := o1.Args[1]
 26129  		if s1.Op != OpPPC64SLDconst {
 26130  			break
 26131  		}
 26132  		if s1.AuxInt != 16 {
 26133  			break
 26134  		}
 26135  		x2 := s1.Args[0]
 26136  		if x2.Op != OpPPC64MOVBZload {
 26137  			break
 26138  		}
 26139  		i2 := x2.AuxInt
 26140  		if x2.Aux != s {
 26141  			break
 26142  		}
 26143  		_ = x2.Args[1]
 26144  		if p != x2.Args[0] {
 26145  			break
 26146  		}
 26147  		if mem != x2.Args[1] {
 26148  			break
 26149  		}
 26150  		s2 := o2.Args[1]
 26151  		if s2.Op != OpPPC64SLDconst {
 26152  			break
 26153  		}
 26154  		if s2.AuxInt != 24 {
 26155  			break
 26156  		}
 26157  		x3 := s2.Args[0]
 26158  		if x3.Op != OpPPC64MOVBZload {
 26159  			break
 26160  		}
 26161  		i3 := x3.AuxInt
 26162  		if x3.Aux != s {
 26163  			break
 26164  		}
 26165  		_ = x3.Args[1]
 26166  		if p != x3.Args[0] {
 26167  			break
 26168  		}
 26169  		if mem != x3.Args[1] {
 26170  			break
 26171  		}
 26172  		s6 := v.Args[1]
 26173  		if s6.Op != OpPPC64SLDconst {
 26174  			break
 26175  		}
 26176  		if s6.AuxInt != 56 {
 26177  			break
 26178  		}
 26179  		x7 := s6.Args[0]
 26180  		if x7.Op != OpPPC64MOVBZload {
 26181  			break
 26182  		}
 26183  		i7 := x7.AuxInt
 26184  		if x7.Aux != s {
 26185  			break
 26186  		}
 26187  		_ = x7.Args[1]
 26188  		if p != x7.Args[0] {
 26189  			break
 26190  		}
 26191  		if mem != x7.Args[1] {
 26192  			break
 26193  		}
 26194  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 26195  			break
 26196  		}
 26197  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 26198  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 26199  		v.reset(OpCopy)
 26200  		v.AddArg(v0)
 26201  		v0.AuxInt = i0
 26202  		v0.Aux = s
 26203  		v0.AddArg(p)
 26204  		v0.AddArg(mem)
 26205  		return true
 26206  	}
 26207  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 26208  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 26209  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 26210  	for {
 26211  		t := v.Type
 26212  		_ = v.Args[1]
 26213  		o5 := v.Args[0]
 26214  		if o5.Op != OpPPC64OR {
 26215  			break
 26216  		}
 26217  		if o5.Type != t {
 26218  			break
 26219  		}
 26220  		_ = o5.Args[1]
 26221  		s5 := o5.Args[0]
 26222  		if s5.Op != OpPPC64SLDconst {
 26223  			break
 26224  		}
 26225  		if s5.AuxInt != 48 {
 26226  			break
 26227  		}
 26228  		x6 := s5.Args[0]
 26229  		if x6.Op != OpPPC64MOVBZload {
 26230  			break
 26231  		}
 26232  		i6 := x6.AuxInt
 26233  		s := x6.Aux
 26234  		_ = x6.Args[1]
 26235  		p := x6.Args[0]
 26236  		mem := x6.Args[1]
 26237  		o4 := o5.Args[1]
 26238  		if o4.Op != OpPPC64OR {
 26239  			break
 26240  		}
 26241  		if o4.Type != t {
 26242  			break
 26243  		}
 26244  		_ = o4.Args[1]
 26245  		s4 := o4.Args[0]
 26246  		if s4.Op != OpPPC64SLDconst {
 26247  			break
 26248  		}
 26249  		if s4.AuxInt != 40 {
 26250  			break
 26251  		}
 26252  		x5 := s4.Args[0]
 26253  		if x5.Op != OpPPC64MOVBZload {
 26254  			break
 26255  		}
 26256  		i5 := x5.AuxInt
 26257  		if x5.Aux != s {
 26258  			break
 26259  		}
 26260  		_ = x5.Args[1]
 26261  		if p != x5.Args[0] {
 26262  			break
 26263  		}
 26264  		if mem != x5.Args[1] {
 26265  			break
 26266  		}
 26267  		o3 := o4.Args[1]
 26268  		if o3.Op != OpPPC64OR {
 26269  			break
 26270  		}
 26271  		if o3.Type != t {
 26272  			break
 26273  		}
 26274  		_ = o3.Args[1]
 26275  		s3 := o3.Args[0]
 26276  		if s3.Op != OpPPC64SLDconst {
 26277  			break
 26278  		}
 26279  		if s3.AuxInt != 32 {
 26280  			break
 26281  		}
 26282  		x4 := s3.Args[0]
 26283  		if x4.Op != OpPPC64MOVBZload {
 26284  			break
 26285  		}
 26286  		i4 := x4.AuxInt
 26287  		if x4.Aux != s {
 26288  			break
 26289  		}
 26290  		_ = x4.Args[1]
 26291  		if p != x4.Args[0] {
 26292  			break
 26293  		}
 26294  		if mem != x4.Args[1] {
 26295  			break
 26296  		}
 26297  		o2 := o3.Args[1]
 26298  		if o2.Op != OpPPC64OR {
 26299  			break
 26300  		}
 26301  		if o2.Type != t {
 26302  			break
 26303  		}
 26304  		_ = o2.Args[1]
 26305  		o1 := o2.Args[0]
 26306  		if o1.Op != OpPPC64OR {
 26307  			break
 26308  		}
 26309  		if o1.Type != t {
 26310  			break
 26311  		}
 26312  		_ = o1.Args[1]
 26313  		o0 := o1.Args[0]
 26314  		if o0.Op != OpPPC64OR {
 26315  			break
 26316  		}
 26317  		if o0.Type != t {
 26318  			break
 26319  		}
 26320  		_ = o0.Args[1]
 26321  		x0 := o0.Args[0]
 26322  		if x0.Op != OpPPC64MOVBZload {
 26323  			break
 26324  		}
 26325  		i0 := x0.AuxInt
 26326  		if x0.Aux != s {
 26327  			break
 26328  		}
 26329  		_ = x0.Args[1]
 26330  		if p != x0.Args[0] {
 26331  			break
 26332  		}
 26333  		if mem != x0.Args[1] {
 26334  			break
 26335  		}
 26336  		s0 := o0.Args[1]
 26337  		if s0.Op != OpPPC64SLDconst {
 26338  			break
 26339  		}
 26340  		if s0.AuxInt != 8 {
 26341  			break
 26342  		}
 26343  		x1 := s0.Args[0]
 26344  		if x1.Op != OpPPC64MOVBZload {
 26345  			break
 26346  		}
 26347  		i1 := x1.AuxInt
 26348  		if x1.Aux != s {
 26349  			break
 26350  		}
 26351  		_ = x1.Args[1]
 26352  		if p != x1.Args[0] {
 26353  			break
 26354  		}
 26355  		if mem != x1.Args[1] {
 26356  			break
 26357  		}
 26358  		s1 := o1.Args[1]
 26359  		if s1.Op != OpPPC64SLDconst {
 26360  			break
 26361  		}
 26362  		if s1.AuxInt != 16 {
 26363  			break
 26364  		}
 26365  		x2 := s1.Args[0]
 26366  		if x2.Op != OpPPC64MOVBZload {
 26367  			break
 26368  		}
 26369  		i2 := x2.AuxInt
 26370  		if x2.Aux != s {
 26371  			break
 26372  		}
 26373  		_ = x2.Args[1]
 26374  		if p != x2.Args[0] {
 26375  			break
 26376  		}
 26377  		if mem != x2.Args[1] {
 26378  			break
 26379  		}
 26380  		s2 := o2.Args[1]
 26381  		if s2.Op != OpPPC64SLDconst {
 26382  			break
 26383  		}
 26384  		if s2.AuxInt != 24 {
 26385  			break
 26386  		}
 26387  		x3 := s2.Args[0]
 26388  		if x3.Op != OpPPC64MOVBZload {
 26389  			break
 26390  		}
 26391  		i3 := x3.AuxInt
 26392  		if x3.Aux != s {
 26393  			break
 26394  		}
 26395  		_ = x3.Args[1]
 26396  		if p != x3.Args[0] {
 26397  			break
 26398  		}
 26399  		if mem != x3.Args[1] {
 26400  			break
 26401  		}
 26402  		s6 := v.Args[1]
 26403  		if s6.Op != OpPPC64SLDconst {
 26404  			break
 26405  		}
 26406  		if s6.AuxInt != 56 {
 26407  			break
 26408  		}
 26409  		x7 := s6.Args[0]
 26410  		if x7.Op != OpPPC64MOVBZload {
 26411  			break
 26412  		}
 26413  		i7 := x7.AuxInt
 26414  		if x7.Aux != s {
 26415  			break
 26416  		}
 26417  		_ = x7.Args[1]
 26418  		if p != x7.Args[0] {
 26419  			break
 26420  		}
 26421  		if mem != x7.Args[1] {
 26422  			break
 26423  		}
 26424  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 26425  			break
 26426  		}
 26427  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 26428  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 26429  		v.reset(OpCopy)
 26430  		v.AddArg(v0)
 26431  		v0.AuxInt = i0
 26432  		v0.Aux = s
 26433  		v0.AddArg(p)
 26434  		v0.AddArg(mem)
 26435  		return true
 26436  	}
 26437  	return false
 26438  }
 26439  func rewriteValuePPC64_OpPPC64OR_90(v *Value) bool {
 26440  	b := v.Block
 26441  	_ = b
 26442  	config := b.Func.Config
 26443  	_ = config
 26444  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 26445  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 26446  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 26447  	for {
 26448  		t := v.Type
 26449  		_ = v.Args[1]
 26450  		o5 := v.Args[0]
 26451  		if o5.Op != OpPPC64OR {
 26452  			break
 26453  		}
 26454  		if o5.Type != t {
 26455  			break
 26456  		}
 26457  		_ = o5.Args[1]
 26458  		s5 := o5.Args[0]
 26459  		if s5.Op != OpPPC64SLDconst {
 26460  			break
 26461  		}
 26462  		if s5.AuxInt != 48 {
 26463  			break
 26464  		}
 26465  		x6 := s5.Args[0]
 26466  		if x6.Op != OpPPC64MOVBZload {
 26467  			break
 26468  		}
 26469  		i6 := x6.AuxInt
 26470  		s := x6.Aux
 26471  		_ = x6.Args[1]
 26472  		p := x6.Args[0]
 26473  		mem := x6.Args[1]
 26474  		o4 := o5.Args[1]
 26475  		if o4.Op != OpPPC64OR {
 26476  			break
 26477  		}
 26478  		if o4.Type != t {
 26479  			break
 26480  		}
 26481  		_ = o4.Args[1]
 26482  		s4 := o4.Args[0]
 26483  		if s4.Op != OpPPC64SLDconst {
 26484  			break
 26485  		}
 26486  		if s4.AuxInt != 40 {
 26487  			break
 26488  		}
 26489  		x5 := s4.Args[0]
 26490  		if x5.Op != OpPPC64MOVBZload {
 26491  			break
 26492  		}
 26493  		i5 := x5.AuxInt
 26494  		if x5.Aux != s {
 26495  			break
 26496  		}
 26497  		_ = x5.Args[1]
 26498  		if p != x5.Args[0] {
 26499  			break
 26500  		}
 26501  		if mem != x5.Args[1] {
 26502  			break
 26503  		}
 26504  		o3 := o4.Args[1]
 26505  		if o3.Op != OpPPC64OR {
 26506  			break
 26507  		}
 26508  		if o3.Type != t {
 26509  			break
 26510  		}
 26511  		_ = o3.Args[1]
 26512  		o2 := o3.Args[0]
 26513  		if o2.Op != OpPPC64OR {
 26514  			break
 26515  		}
 26516  		if o2.Type != t {
 26517  			break
 26518  		}
 26519  		_ = o2.Args[1]
 26520  		s2 := o2.Args[0]
 26521  		if s2.Op != OpPPC64SLDconst {
 26522  			break
 26523  		}
 26524  		if s2.AuxInt != 24 {
 26525  			break
 26526  		}
 26527  		x3 := s2.Args[0]
 26528  		if x3.Op != OpPPC64MOVBZload {
 26529  			break
 26530  		}
 26531  		i3 := x3.AuxInt
 26532  		if x3.Aux != s {
 26533  			break
 26534  		}
 26535  		_ = x3.Args[1]
 26536  		if p != x3.Args[0] {
 26537  			break
 26538  		}
 26539  		if mem != x3.Args[1] {
 26540  			break
 26541  		}
 26542  		o1 := o2.Args[1]
 26543  		if o1.Op != OpPPC64OR {
 26544  			break
 26545  		}
 26546  		if o1.Type != t {
 26547  			break
 26548  		}
 26549  		_ = o1.Args[1]
 26550  		s1 := o1.Args[0]
 26551  		if s1.Op != OpPPC64SLDconst {
 26552  			break
 26553  		}
 26554  		if s1.AuxInt != 16 {
 26555  			break
 26556  		}
 26557  		x2 := s1.Args[0]
 26558  		if x2.Op != OpPPC64MOVBZload {
 26559  			break
 26560  		}
 26561  		i2 := x2.AuxInt
 26562  		if x2.Aux != s {
 26563  			break
 26564  		}
 26565  		_ = x2.Args[1]
 26566  		if p != x2.Args[0] {
 26567  			break
 26568  		}
 26569  		if mem != x2.Args[1] {
 26570  			break
 26571  		}
 26572  		o0 := o1.Args[1]
 26573  		if o0.Op != OpPPC64OR {
 26574  			break
 26575  		}
 26576  		if o0.Type != t {
 26577  			break
 26578  		}
 26579  		_ = o0.Args[1]
 26580  		s0 := o0.Args[0]
 26581  		if s0.Op != OpPPC64SLDconst {
 26582  			break
 26583  		}
 26584  		if s0.AuxInt != 8 {
 26585  			break
 26586  		}
 26587  		x1 := s0.Args[0]
 26588  		if x1.Op != OpPPC64MOVBZload {
 26589  			break
 26590  		}
 26591  		i1 := x1.AuxInt
 26592  		if x1.Aux != s {
 26593  			break
 26594  		}
 26595  		_ = x1.Args[1]
 26596  		if p != x1.Args[0] {
 26597  			break
 26598  		}
 26599  		if mem != x1.Args[1] {
 26600  			break
 26601  		}
 26602  		x0 := o0.Args[1]
 26603  		if x0.Op != OpPPC64MOVBZload {
 26604  			break
 26605  		}
 26606  		i0 := x0.AuxInt
 26607  		if x0.Aux != s {
 26608  			break
 26609  		}
 26610  		_ = x0.Args[1]
 26611  		if p != x0.Args[0] {
 26612  			break
 26613  		}
 26614  		if mem != x0.Args[1] {
 26615  			break
 26616  		}
 26617  		s3 := o3.Args[1]
 26618  		if s3.Op != OpPPC64SLDconst {
 26619  			break
 26620  		}
 26621  		if s3.AuxInt != 32 {
 26622  			break
 26623  		}
 26624  		x4 := s3.Args[0]
 26625  		if x4.Op != OpPPC64MOVBZload {
 26626  			break
 26627  		}
 26628  		i4 := x4.AuxInt
 26629  		if x4.Aux != s {
 26630  			break
 26631  		}
 26632  		_ = x4.Args[1]
 26633  		if p != x4.Args[0] {
 26634  			break
 26635  		}
 26636  		if mem != x4.Args[1] {
 26637  			break
 26638  		}
 26639  		s6 := v.Args[1]
 26640  		if s6.Op != OpPPC64SLDconst {
 26641  			break
 26642  		}
 26643  		if s6.AuxInt != 56 {
 26644  			break
 26645  		}
 26646  		x7 := s6.Args[0]
 26647  		if x7.Op != OpPPC64MOVBZload {
 26648  			break
 26649  		}
 26650  		i7 := x7.AuxInt
 26651  		if x7.Aux != s {
 26652  			break
 26653  		}
 26654  		_ = x7.Args[1]
 26655  		if p != x7.Args[0] {
 26656  			break
 26657  		}
 26658  		if mem != x7.Args[1] {
 26659  			break
 26660  		}
 26661  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 26662  			break
 26663  		}
 26664  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 26665  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 26666  		v.reset(OpCopy)
 26667  		v.AddArg(v0)
 26668  		v0.AuxInt = i0
 26669  		v0.Aux = s
 26670  		v0.AddArg(p)
 26671  		v0.AddArg(mem)
 26672  		return true
 26673  	}
 26674  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 26675  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 26676  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 26677  	for {
 26678  		t := v.Type
 26679  		_ = v.Args[1]
 26680  		o5 := v.Args[0]
 26681  		if o5.Op != OpPPC64OR {
 26682  			break
 26683  		}
 26684  		if o5.Type != t {
 26685  			break
 26686  		}
 26687  		_ = o5.Args[1]
 26688  		s5 := o5.Args[0]
 26689  		if s5.Op != OpPPC64SLDconst {
 26690  			break
 26691  		}
 26692  		if s5.AuxInt != 48 {
 26693  			break
 26694  		}
 26695  		x6 := s5.Args[0]
 26696  		if x6.Op != OpPPC64MOVBZload {
 26697  			break
 26698  		}
 26699  		i6 := x6.AuxInt
 26700  		s := x6.Aux
 26701  		_ = x6.Args[1]
 26702  		p := x6.Args[0]
 26703  		mem := x6.Args[1]
 26704  		o4 := o5.Args[1]
 26705  		if o4.Op != OpPPC64OR {
 26706  			break
 26707  		}
 26708  		if o4.Type != t {
 26709  			break
 26710  		}
 26711  		_ = o4.Args[1]
 26712  		s4 := o4.Args[0]
 26713  		if s4.Op != OpPPC64SLDconst {
 26714  			break
 26715  		}
 26716  		if s4.AuxInt != 40 {
 26717  			break
 26718  		}
 26719  		x5 := s4.Args[0]
 26720  		if x5.Op != OpPPC64MOVBZload {
 26721  			break
 26722  		}
 26723  		i5 := x5.AuxInt
 26724  		if x5.Aux != s {
 26725  			break
 26726  		}
 26727  		_ = x5.Args[1]
 26728  		if p != x5.Args[0] {
 26729  			break
 26730  		}
 26731  		if mem != x5.Args[1] {
 26732  			break
 26733  		}
 26734  		o3 := o4.Args[1]
 26735  		if o3.Op != OpPPC64OR {
 26736  			break
 26737  		}
 26738  		if o3.Type != t {
 26739  			break
 26740  		}
 26741  		_ = o3.Args[1]
 26742  		o2 := o3.Args[0]
 26743  		if o2.Op != OpPPC64OR {
 26744  			break
 26745  		}
 26746  		if o2.Type != t {
 26747  			break
 26748  		}
 26749  		_ = o2.Args[1]
 26750  		s2 := o2.Args[0]
 26751  		if s2.Op != OpPPC64SLDconst {
 26752  			break
 26753  		}
 26754  		if s2.AuxInt != 24 {
 26755  			break
 26756  		}
 26757  		x3 := s2.Args[0]
 26758  		if x3.Op != OpPPC64MOVBZload {
 26759  			break
 26760  		}
 26761  		i3 := x3.AuxInt
 26762  		if x3.Aux != s {
 26763  			break
 26764  		}
 26765  		_ = x3.Args[1]
 26766  		if p != x3.Args[0] {
 26767  			break
 26768  		}
 26769  		if mem != x3.Args[1] {
 26770  			break
 26771  		}
 26772  		o1 := o2.Args[1]
 26773  		if o1.Op != OpPPC64OR {
 26774  			break
 26775  		}
 26776  		if o1.Type != t {
 26777  			break
 26778  		}
 26779  		_ = o1.Args[1]
 26780  		s1 := o1.Args[0]
 26781  		if s1.Op != OpPPC64SLDconst {
 26782  			break
 26783  		}
 26784  		if s1.AuxInt != 16 {
 26785  			break
 26786  		}
 26787  		x2 := s1.Args[0]
 26788  		if x2.Op != OpPPC64MOVBZload {
 26789  			break
 26790  		}
 26791  		i2 := x2.AuxInt
 26792  		if x2.Aux != s {
 26793  			break
 26794  		}
 26795  		_ = x2.Args[1]
 26796  		if p != x2.Args[0] {
 26797  			break
 26798  		}
 26799  		if mem != x2.Args[1] {
 26800  			break
 26801  		}
 26802  		o0 := o1.Args[1]
 26803  		if o0.Op != OpPPC64OR {
 26804  			break
 26805  		}
 26806  		if o0.Type != t {
 26807  			break
 26808  		}
 26809  		_ = o0.Args[1]
 26810  		x0 := o0.Args[0]
 26811  		if x0.Op != OpPPC64MOVBZload {
 26812  			break
 26813  		}
 26814  		i0 := x0.AuxInt
 26815  		if x0.Aux != s {
 26816  			break
 26817  		}
 26818  		_ = x0.Args[1]
 26819  		if p != x0.Args[0] {
 26820  			break
 26821  		}
 26822  		if mem != x0.Args[1] {
 26823  			break
 26824  		}
 26825  		s0 := o0.Args[1]
 26826  		if s0.Op != OpPPC64SLDconst {
 26827  			break
 26828  		}
 26829  		if s0.AuxInt != 8 {
 26830  			break
 26831  		}
 26832  		x1 := s0.Args[0]
 26833  		if x1.Op != OpPPC64MOVBZload {
 26834  			break
 26835  		}
 26836  		i1 := x1.AuxInt
 26837  		if x1.Aux != s {
 26838  			break
 26839  		}
 26840  		_ = x1.Args[1]
 26841  		if p != x1.Args[0] {
 26842  			break
 26843  		}
 26844  		if mem != x1.Args[1] {
 26845  			break
 26846  		}
 26847  		s3 := o3.Args[1]
 26848  		if s3.Op != OpPPC64SLDconst {
 26849  			break
 26850  		}
 26851  		if s3.AuxInt != 32 {
 26852  			break
 26853  		}
 26854  		x4 := s3.Args[0]
 26855  		if x4.Op != OpPPC64MOVBZload {
 26856  			break
 26857  		}
 26858  		i4 := x4.AuxInt
 26859  		if x4.Aux != s {
 26860  			break
 26861  		}
 26862  		_ = x4.Args[1]
 26863  		if p != x4.Args[0] {
 26864  			break
 26865  		}
 26866  		if mem != x4.Args[1] {
 26867  			break
 26868  		}
 26869  		s6 := v.Args[1]
 26870  		if s6.Op != OpPPC64SLDconst {
 26871  			break
 26872  		}
 26873  		if s6.AuxInt != 56 {
 26874  			break
 26875  		}
 26876  		x7 := s6.Args[0]
 26877  		if x7.Op != OpPPC64MOVBZload {
 26878  			break
 26879  		}
 26880  		i7 := x7.AuxInt
 26881  		if x7.Aux != s {
 26882  			break
 26883  		}
 26884  		_ = x7.Args[1]
 26885  		if p != x7.Args[0] {
 26886  			break
 26887  		}
 26888  		if mem != x7.Args[1] {
 26889  			break
 26890  		}
 26891  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 26892  			break
 26893  		}
 26894  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 26895  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 26896  		v.reset(OpCopy)
 26897  		v.AddArg(v0)
 26898  		v0.AuxInt = i0
 26899  		v0.Aux = s
 26900  		v0.AddArg(p)
 26901  		v0.AddArg(mem)
 26902  		return true
 26903  	}
 26904  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 26905  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 26906  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 26907  	for {
 26908  		t := v.Type
 26909  		_ = v.Args[1]
 26910  		o5 := v.Args[0]
 26911  		if o5.Op != OpPPC64OR {
 26912  			break
 26913  		}
 26914  		if o5.Type != t {
 26915  			break
 26916  		}
 26917  		_ = o5.Args[1]
 26918  		s5 := o5.Args[0]
 26919  		if s5.Op != OpPPC64SLDconst {
 26920  			break
 26921  		}
 26922  		if s5.AuxInt != 48 {
 26923  			break
 26924  		}
 26925  		x6 := s5.Args[0]
 26926  		if x6.Op != OpPPC64MOVBZload {
 26927  			break
 26928  		}
 26929  		i6 := x6.AuxInt
 26930  		s := x6.Aux
 26931  		_ = x6.Args[1]
 26932  		p := x6.Args[0]
 26933  		mem := x6.Args[1]
 26934  		o4 := o5.Args[1]
 26935  		if o4.Op != OpPPC64OR {
 26936  			break
 26937  		}
 26938  		if o4.Type != t {
 26939  			break
 26940  		}
 26941  		_ = o4.Args[1]
 26942  		s4 := o4.Args[0]
 26943  		if s4.Op != OpPPC64SLDconst {
 26944  			break
 26945  		}
 26946  		if s4.AuxInt != 40 {
 26947  			break
 26948  		}
 26949  		x5 := s4.Args[0]
 26950  		if x5.Op != OpPPC64MOVBZload {
 26951  			break
 26952  		}
 26953  		i5 := x5.AuxInt
 26954  		if x5.Aux != s {
 26955  			break
 26956  		}
 26957  		_ = x5.Args[1]
 26958  		if p != x5.Args[0] {
 26959  			break
 26960  		}
 26961  		if mem != x5.Args[1] {
 26962  			break
 26963  		}
 26964  		o3 := o4.Args[1]
 26965  		if o3.Op != OpPPC64OR {
 26966  			break
 26967  		}
 26968  		if o3.Type != t {
 26969  			break
 26970  		}
 26971  		_ = o3.Args[1]
 26972  		o2 := o3.Args[0]
 26973  		if o2.Op != OpPPC64OR {
 26974  			break
 26975  		}
 26976  		if o2.Type != t {
 26977  			break
 26978  		}
 26979  		_ = o2.Args[1]
 26980  		s2 := o2.Args[0]
 26981  		if s2.Op != OpPPC64SLDconst {
 26982  			break
 26983  		}
 26984  		if s2.AuxInt != 24 {
 26985  			break
 26986  		}
 26987  		x3 := s2.Args[0]
 26988  		if x3.Op != OpPPC64MOVBZload {
 26989  			break
 26990  		}
 26991  		i3 := x3.AuxInt
 26992  		if x3.Aux != s {
 26993  			break
 26994  		}
 26995  		_ = x3.Args[1]
 26996  		if p != x3.Args[0] {
 26997  			break
 26998  		}
 26999  		if mem != x3.Args[1] {
 27000  			break
 27001  		}
 27002  		o1 := o2.Args[1]
 27003  		if o1.Op != OpPPC64OR {
 27004  			break
 27005  		}
 27006  		if o1.Type != t {
 27007  			break
 27008  		}
 27009  		_ = o1.Args[1]
 27010  		o0 := o1.Args[0]
 27011  		if o0.Op != OpPPC64OR {
 27012  			break
 27013  		}
 27014  		if o0.Type != t {
 27015  			break
 27016  		}
 27017  		_ = o0.Args[1]
 27018  		s0 := o0.Args[0]
 27019  		if s0.Op != OpPPC64SLDconst {
 27020  			break
 27021  		}
 27022  		if s0.AuxInt != 8 {
 27023  			break
 27024  		}
 27025  		x1 := s0.Args[0]
 27026  		if x1.Op != OpPPC64MOVBZload {
 27027  			break
 27028  		}
 27029  		i1 := x1.AuxInt
 27030  		if x1.Aux != s {
 27031  			break
 27032  		}
 27033  		_ = x1.Args[1]
 27034  		if p != x1.Args[0] {
 27035  			break
 27036  		}
 27037  		if mem != x1.Args[1] {
 27038  			break
 27039  		}
 27040  		x0 := o0.Args[1]
 27041  		if x0.Op != OpPPC64MOVBZload {
 27042  			break
 27043  		}
 27044  		i0 := x0.AuxInt
 27045  		if x0.Aux != s {
 27046  			break
 27047  		}
 27048  		_ = x0.Args[1]
 27049  		if p != x0.Args[0] {
 27050  			break
 27051  		}
 27052  		if mem != x0.Args[1] {
 27053  			break
 27054  		}
 27055  		s1 := o1.Args[1]
 27056  		if s1.Op != OpPPC64SLDconst {
 27057  			break
 27058  		}
 27059  		if s1.AuxInt != 16 {
 27060  			break
 27061  		}
 27062  		x2 := s1.Args[0]
 27063  		if x2.Op != OpPPC64MOVBZload {
 27064  			break
 27065  		}
 27066  		i2 := x2.AuxInt
 27067  		if x2.Aux != s {
 27068  			break
 27069  		}
 27070  		_ = x2.Args[1]
 27071  		if p != x2.Args[0] {
 27072  			break
 27073  		}
 27074  		if mem != x2.Args[1] {
 27075  			break
 27076  		}
 27077  		s3 := o3.Args[1]
 27078  		if s3.Op != OpPPC64SLDconst {
 27079  			break
 27080  		}
 27081  		if s3.AuxInt != 32 {
 27082  			break
 27083  		}
 27084  		x4 := s3.Args[0]
 27085  		if x4.Op != OpPPC64MOVBZload {
 27086  			break
 27087  		}
 27088  		i4 := x4.AuxInt
 27089  		if x4.Aux != s {
 27090  			break
 27091  		}
 27092  		_ = x4.Args[1]
 27093  		if p != x4.Args[0] {
 27094  			break
 27095  		}
 27096  		if mem != x4.Args[1] {
 27097  			break
 27098  		}
 27099  		s6 := v.Args[1]
 27100  		if s6.Op != OpPPC64SLDconst {
 27101  			break
 27102  		}
 27103  		if s6.AuxInt != 56 {
 27104  			break
 27105  		}
 27106  		x7 := s6.Args[0]
 27107  		if x7.Op != OpPPC64MOVBZload {
 27108  			break
 27109  		}
 27110  		i7 := x7.AuxInt
 27111  		if x7.Aux != s {
 27112  			break
 27113  		}
 27114  		_ = x7.Args[1]
 27115  		if p != x7.Args[0] {
 27116  			break
 27117  		}
 27118  		if mem != x7.Args[1] {
 27119  			break
 27120  		}
 27121  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 27122  			break
 27123  		}
 27124  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 27125  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 27126  		v.reset(OpCopy)
 27127  		v.AddArg(v0)
 27128  		v0.AuxInt = i0
 27129  		v0.Aux = s
 27130  		v0.AddArg(p)
 27131  		v0.AddArg(mem)
 27132  		return true
 27133  	}
 27134  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 27135  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 27136  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 27137  	for {
 27138  		t := v.Type
 27139  		_ = v.Args[1]
 27140  		o5 := v.Args[0]
 27141  		if o5.Op != OpPPC64OR {
 27142  			break
 27143  		}
 27144  		if o5.Type != t {
 27145  			break
 27146  		}
 27147  		_ = o5.Args[1]
 27148  		s5 := o5.Args[0]
 27149  		if s5.Op != OpPPC64SLDconst {
 27150  			break
 27151  		}
 27152  		if s5.AuxInt != 48 {
 27153  			break
 27154  		}
 27155  		x6 := s5.Args[0]
 27156  		if x6.Op != OpPPC64MOVBZload {
 27157  			break
 27158  		}
 27159  		i6 := x6.AuxInt
 27160  		s := x6.Aux
 27161  		_ = x6.Args[1]
 27162  		p := x6.Args[0]
 27163  		mem := x6.Args[1]
 27164  		o4 := o5.Args[1]
 27165  		if o4.Op != OpPPC64OR {
 27166  			break
 27167  		}
 27168  		if o4.Type != t {
 27169  			break
 27170  		}
 27171  		_ = o4.Args[1]
 27172  		s4 := o4.Args[0]
 27173  		if s4.Op != OpPPC64SLDconst {
 27174  			break
 27175  		}
 27176  		if s4.AuxInt != 40 {
 27177  			break
 27178  		}
 27179  		x5 := s4.Args[0]
 27180  		if x5.Op != OpPPC64MOVBZload {
 27181  			break
 27182  		}
 27183  		i5 := x5.AuxInt
 27184  		if x5.Aux != s {
 27185  			break
 27186  		}
 27187  		_ = x5.Args[1]
 27188  		if p != x5.Args[0] {
 27189  			break
 27190  		}
 27191  		if mem != x5.Args[1] {
 27192  			break
 27193  		}
 27194  		o3 := o4.Args[1]
 27195  		if o3.Op != OpPPC64OR {
 27196  			break
 27197  		}
 27198  		if o3.Type != t {
 27199  			break
 27200  		}
 27201  		_ = o3.Args[1]
 27202  		o2 := o3.Args[0]
 27203  		if o2.Op != OpPPC64OR {
 27204  			break
 27205  		}
 27206  		if o2.Type != t {
 27207  			break
 27208  		}
 27209  		_ = o2.Args[1]
 27210  		s2 := o2.Args[0]
 27211  		if s2.Op != OpPPC64SLDconst {
 27212  			break
 27213  		}
 27214  		if s2.AuxInt != 24 {
 27215  			break
 27216  		}
 27217  		x3 := s2.Args[0]
 27218  		if x3.Op != OpPPC64MOVBZload {
 27219  			break
 27220  		}
 27221  		i3 := x3.AuxInt
 27222  		if x3.Aux != s {
 27223  			break
 27224  		}
 27225  		_ = x3.Args[1]
 27226  		if p != x3.Args[0] {
 27227  			break
 27228  		}
 27229  		if mem != x3.Args[1] {
 27230  			break
 27231  		}
 27232  		o1 := o2.Args[1]
 27233  		if o1.Op != OpPPC64OR {
 27234  			break
 27235  		}
 27236  		if o1.Type != t {
 27237  			break
 27238  		}
 27239  		_ = o1.Args[1]
 27240  		o0 := o1.Args[0]
 27241  		if o0.Op != OpPPC64OR {
 27242  			break
 27243  		}
 27244  		if o0.Type != t {
 27245  			break
 27246  		}
 27247  		_ = o0.Args[1]
 27248  		x0 := o0.Args[0]
 27249  		if x0.Op != OpPPC64MOVBZload {
 27250  			break
 27251  		}
 27252  		i0 := x0.AuxInt
 27253  		if x0.Aux != s {
 27254  			break
 27255  		}
 27256  		_ = x0.Args[1]
 27257  		if p != x0.Args[0] {
 27258  			break
 27259  		}
 27260  		if mem != x0.Args[1] {
 27261  			break
 27262  		}
 27263  		s0 := o0.Args[1]
 27264  		if s0.Op != OpPPC64SLDconst {
 27265  			break
 27266  		}
 27267  		if s0.AuxInt != 8 {
 27268  			break
 27269  		}
 27270  		x1 := s0.Args[0]
 27271  		if x1.Op != OpPPC64MOVBZload {
 27272  			break
 27273  		}
 27274  		i1 := x1.AuxInt
 27275  		if x1.Aux != s {
 27276  			break
 27277  		}
 27278  		_ = x1.Args[1]
 27279  		if p != x1.Args[0] {
 27280  			break
 27281  		}
 27282  		if mem != x1.Args[1] {
 27283  			break
 27284  		}
 27285  		s1 := o1.Args[1]
 27286  		if s1.Op != OpPPC64SLDconst {
 27287  			break
 27288  		}
 27289  		if s1.AuxInt != 16 {
 27290  			break
 27291  		}
 27292  		x2 := s1.Args[0]
 27293  		if x2.Op != OpPPC64MOVBZload {
 27294  			break
 27295  		}
 27296  		i2 := x2.AuxInt
 27297  		if x2.Aux != s {
 27298  			break
 27299  		}
 27300  		_ = x2.Args[1]
 27301  		if p != x2.Args[0] {
 27302  			break
 27303  		}
 27304  		if mem != x2.Args[1] {
 27305  			break
 27306  		}
 27307  		s3 := o3.Args[1]
 27308  		if s3.Op != OpPPC64SLDconst {
 27309  			break
 27310  		}
 27311  		if s3.AuxInt != 32 {
 27312  			break
 27313  		}
 27314  		x4 := s3.Args[0]
 27315  		if x4.Op != OpPPC64MOVBZload {
 27316  			break
 27317  		}
 27318  		i4 := x4.AuxInt
 27319  		if x4.Aux != s {
 27320  			break
 27321  		}
 27322  		_ = x4.Args[1]
 27323  		if p != x4.Args[0] {
 27324  			break
 27325  		}
 27326  		if mem != x4.Args[1] {
 27327  			break
 27328  		}
 27329  		s6 := v.Args[1]
 27330  		if s6.Op != OpPPC64SLDconst {
 27331  			break
 27332  		}
 27333  		if s6.AuxInt != 56 {
 27334  			break
 27335  		}
 27336  		x7 := s6.Args[0]
 27337  		if x7.Op != OpPPC64MOVBZload {
 27338  			break
 27339  		}
 27340  		i7 := x7.AuxInt
 27341  		if x7.Aux != s {
 27342  			break
 27343  		}
 27344  		_ = x7.Args[1]
 27345  		if p != x7.Args[0] {
 27346  			break
 27347  		}
 27348  		if mem != x7.Args[1] {
 27349  			break
 27350  		}
 27351  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 27352  			break
 27353  		}
 27354  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 27355  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 27356  		v.reset(OpCopy)
 27357  		v.AddArg(v0)
 27358  		v0.AuxInt = i0
 27359  		v0.Aux = s
 27360  		v0.AddArg(p)
 27361  		v0.AddArg(mem)
 27362  		return true
 27363  	}
 27364  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 27365  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 27366  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 27367  	for {
 27368  		t := v.Type
 27369  		_ = v.Args[1]
 27370  		o5 := v.Args[0]
 27371  		if o5.Op != OpPPC64OR {
 27372  			break
 27373  		}
 27374  		if o5.Type != t {
 27375  			break
 27376  		}
 27377  		_ = o5.Args[1]
 27378  		s5 := o5.Args[0]
 27379  		if s5.Op != OpPPC64SLDconst {
 27380  			break
 27381  		}
 27382  		if s5.AuxInt != 48 {
 27383  			break
 27384  		}
 27385  		x6 := s5.Args[0]
 27386  		if x6.Op != OpPPC64MOVBZload {
 27387  			break
 27388  		}
 27389  		i6 := x6.AuxInt
 27390  		s := x6.Aux
 27391  		_ = x6.Args[1]
 27392  		p := x6.Args[0]
 27393  		mem := x6.Args[1]
 27394  		o4 := o5.Args[1]
 27395  		if o4.Op != OpPPC64OR {
 27396  			break
 27397  		}
 27398  		if o4.Type != t {
 27399  			break
 27400  		}
 27401  		_ = o4.Args[1]
 27402  		s4 := o4.Args[0]
 27403  		if s4.Op != OpPPC64SLDconst {
 27404  			break
 27405  		}
 27406  		if s4.AuxInt != 40 {
 27407  			break
 27408  		}
 27409  		x5 := s4.Args[0]
 27410  		if x5.Op != OpPPC64MOVBZload {
 27411  			break
 27412  		}
 27413  		i5 := x5.AuxInt
 27414  		if x5.Aux != s {
 27415  			break
 27416  		}
 27417  		_ = x5.Args[1]
 27418  		if p != x5.Args[0] {
 27419  			break
 27420  		}
 27421  		if mem != x5.Args[1] {
 27422  			break
 27423  		}
 27424  		o3 := o4.Args[1]
 27425  		if o3.Op != OpPPC64OR {
 27426  			break
 27427  		}
 27428  		if o3.Type != t {
 27429  			break
 27430  		}
 27431  		_ = o3.Args[1]
 27432  		o2 := o3.Args[0]
 27433  		if o2.Op != OpPPC64OR {
 27434  			break
 27435  		}
 27436  		if o2.Type != t {
 27437  			break
 27438  		}
 27439  		_ = o2.Args[1]
 27440  		o1 := o2.Args[0]
 27441  		if o1.Op != OpPPC64OR {
 27442  			break
 27443  		}
 27444  		if o1.Type != t {
 27445  			break
 27446  		}
 27447  		_ = o1.Args[1]
 27448  		s1 := o1.Args[0]
 27449  		if s1.Op != OpPPC64SLDconst {
 27450  			break
 27451  		}
 27452  		if s1.AuxInt != 16 {
 27453  			break
 27454  		}
 27455  		x2 := s1.Args[0]
 27456  		if x2.Op != OpPPC64MOVBZload {
 27457  			break
 27458  		}
 27459  		i2 := x2.AuxInt
 27460  		if x2.Aux != s {
 27461  			break
 27462  		}
 27463  		_ = x2.Args[1]
 27464  		if p != x2.Args[0] {
 27465  			break
 27466  		}
 27467  		if mem != x2.Args[1] {
 27468  			break
 27469  		}
 27470  		o0 := o1.Args[1]
 27471  		if o0.Op != OpPPC64OR {
 27472  			break
 27473  		}
 27474  		if o0.Type != t {
 27475  			break
 27476  		}
 27477  		_ = o0.Args[1]
 27478  		s0 := o0.Args[0]
 27479  		if s0.Op != OpPPC64SLDconst {
 27480  			break
 27481  		}
 27482  		if s0.AuxInt != 8 {
 27483  			break
 27484  		}
 27485  		x1 := s0.Args[0]
 27486  		if x1.Op != OpPPC64MOVBZload {
 27487  			break
 27488  		}
 27489  		i1 := x1.AuxInt
 27490  		if x1.Aux != s {
 27491  			break
 27492  		}
 27493  		_ = x1.Args[1]
 27494  		if p != x1.Args[0] {
 27495  			break
 27496  		}
 27497  		if mem != x1.Args[1] {
 27498  			break
 27499  		}
 27500  		x0 := o0.Args[1]
 27501  		if x0.Op != OpPPC64MOVBZload {
 27502  			break
 27503  		}
 27504  		i0 := x0.AuxInt
 27505  		if x0.Aux != s {
 27506  			break
 27507  		}
 27508  		_ = x0.Args[1]
 27509  		if p != x0.Args[0] {
 27510  			break
 27511  		}
 27512  		if mem != x0.Args[1] {
 27513  			break
 27514  		}
 27515  		s2 := o2.Args[1]
 27516  		if s2.Op != OpPPC64SLDconst {
 27517  			break
 27518  		}
 27519  		if s2.AuxInt != 24 {
 27520  			break
 27521  		}
 27522  		x3 := s2.Args[0]
 27523  		if x3.Op != OpPPC64MOVBZload {
 27524  			break
 27525  		}
 27526  		i3 := x3.AuxInt
 27527  		if x3.Aux != s {
 27528  			break
 27529  		}
 27530  		_ = x3.Args[1]
 27531  		if p != x3.Args[0] {
 27532  			break
 27533  		}
 27534  		if mem != x3.Args[1] {
 27535  			break
 27536  		}
 27537  		s3 := o3.Args[1]
 27538  		if s3.Op != OpPPC64SLDconst {
 27539  			break
 27540  		}
 27541  		if s3.AuxInt != 32 {
 27542  			break
 27543  		}
 27544  		x4 := s3.Args[0]
 27545  		if x4.Op != OpPPC64MOVBZload {
 27546  			break
 27547  		}
 27548  		i4 := x4.AuxInt
 27549  		if x4.Aux != s {
 27550  			break
 27551  		}
 27552  		_ = x4.Args[1]
 27553  		if p != x4.Args[0] {
 27554  			break
 27555  		}
 27556  		if mem != x4.Args[1] {
 27557  			break
 27558  		}
 27559  		s6 := v.Args[1]
 27560  		if s6.Op != OpPPC64SLDconst {
 27561  			break
 27562  		}
 27563  		if s6.AuxInt != 56 {
 27564  			break
 27565  		}
 27566  		x7 := s6.Args[0]
 27567  		if x7.Op != OpPPC64MOVBZload {
 27568  			break
 27569  		}
 27570  		i7 := x7.AuxInt
 27571  		if x7.Aux != s {
 27572  			break
 27573  		}
 27574  		_ = x7.Args[1]
 27575  		if p != x7.Args[0] {
 27576  			break
 27577  		}
 27578  		if mem != x7.Args[1] {
 27579  			break
 27580  		}
 27581  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 27582  			break
 27583  		}
 27584  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 27585  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 27586  		v.reset(OpCopy)
 27587  		v.AddArg(v0)
 27588  		v0.AuxInt = i0
 27589  		v0.Aux = s
 27590  		v0.AddArg(p)
 27591  		v0.AddArg(mem)
 27592  		return true
 27593  	}
 27594  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 27595  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 27596  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 27597  	for {
 27598  		t := v.Type
 27599  		_ = v.Args[1]
 27600  		o5 := v.Args[0]
 27601  		if o5.Op != OpPPC64OR {
 27602  			break
 27603  		}
 27604  		if o5.Type != t {
 27605  			break
 27606  		}
 27607  		_ = o5.Args[1]
 27608  		s5 := o5.Args[0]
 27609  		if s5.Op != OpPPC64SLDconst {
 27610  			break
 27611  		}
 27612  		if s5.AuxInt != 48 {
 27613  			break
 27614  		}
 27615  		x6 := s5.Args[0]
 27616  		if x6.Op != OpPPC64MOVBZload {
 27617  			break
 27618  		}
 27619  		i6 := x6.AuxInt
 27620  		s := x6.Aux
 27621  		_ = x6.Args[1]
 27622  		p := x6.Args[0]
 27623  		mem := x6.Args[1]
 27624  		o4 := o5.Args[1]
 27625  		if o4.Op != OpPPC64OR {
 27626  			break
 27627  		}
 27628  		if o4.Type != t {
 27629  			break
 27630  		}
 27631  		_ = o4.Args[1]
 27632  		s4 := o4.Args[0]
 27633  		if s4.Op != OpPPC64SLDconst {
 27634  			break
 27635  		}
 27636  		if s4.AuxInt != 40 {
 27637  			break
 27638  		}
 27639  		x5 := s4.Args[0]
 27640  		if x5.Op != OpPPC64MOVBZload {
 27641  			break
 27642  		}
 27643  		i5 := x5.AuxInt
 27644  		if x5.Aux != s {
 27645  			break
 27646  		}
 27647  		_ = x5.Args[1]
 27648  		if p != x5.Args[0] {
 27649  			break
 27650  		}
 27651  		if mem != x5.Args[1] {
 27652  			break
 27653  		}
 27654  		o3 := o4.Args[1]
 27655  		if o3.Op != OpPPC64OR {
 27656  			break
 27657  		}
 27658  		if o3.Type != t {
 27659  			break
 27660  		}
 27661  		_ = o3.Args[1]
 27662  		o2 := o3.Args[0]
 27663  		if o2.Op != OpPPC64OR {
 27664  			break
 27665  		}
 27666  		if o2.Type != t {
 27667  			break
 27668  		}
 27669  		_ = o2.Args[1]
 27670  		o1 := o2.Args[0]
 27671  		if o1.Op != OpPPC64OR {
 27672  			break
 27673  		}
 27674  		if o1.Type != t {
 27675  			break
 27676  		}
 27677  		_ = o1.Args[1]
 27678  		s1 := o1.Args[0]
 27679  		if s1.Op != OpPPC64SLDconst {
 27680  			break
 27681  		}
 27682  		if s1.AuxInt != 16 {
 27683  			break
 27684  		}
 27685  		x2 := s1.Args[0]
 27686  		if x2.Op != OpPPC64MOVBZload {
 27687  			break
 27688  		}
 27689  		i2 := x2.AuxInt
 27690  		if x2.Aux != s {
 27691  			break
 27692  		}
 27693  		_ = x2.Args[1]
 27694  		if p != x2.Args[0] {
 27695  			break
 27696  		}
 27697  		if mem != x2.Args[1] {
 27698  			break
 27699  		}
 27700  		o0 := o1.Args[1]
 27701  		if o0.Op != OpPPC64OR {
 27702  			break
 27703  		}
 27704  		if o0.Type != t {
 27705  			break
 27706  		}
 27707  		_ = o0.Args[1]
 27708  		x0 := o0.Args[0]
 27709  		if x0.Op != OpPPC64MOVBZload {
 27710  			break
 27711  		}
 27712  		i0 := x0.AuxInt
 27713  		if x0.Aux != s {
 27714  			break
 27715  		}
 27716  		_ = x0.Args[1]
 27717  		if p != x0.Args[0] {
 27718  			break
 27719  		}
 27720  		if mem != x0.Args[1] {
 27721  			break
 27722  		}
 27723  		s0 := o0.Args[1]
 27724  		if s0.Op != OpPPC64SLDconst {
 27725  			break
 27726  		}
 27727  		if s0.AuxInt != 8 {
 27728  			break
 27729  		}
 27730  		x1 := s0.Args[0]
 27731  		if x1.Op != OpPPC64MOVBZload {
 27732  			break
 27733  		}
 27734  		i1 := x1.AuxInt
 27735  		if x1.Aux != s {
 27736  			break
 27737  		}
 27738  		_ = x1.Args[1]
 27739  		if p != x1.Args[0] {
 27740  			break
 27741  		}
 27742  		if mem != x1.Args[1] {
 27743  			break
 27744  		}
 27745  		s2 := o2.Args[1]
 27746  		if s2.Op != OpPPC64SLDconst {
 27747  			break
 27748  		}
 27749  		if s2.AuxInt != 24 {
 27750  			break
 27751  		}
 27752  		x3 := s2.Args[0]
 27753  		if x3.Op != OpPPC64MOVBZload {
 27754  			break
 27755  		}
 27756  		i3 := x3.AuxInt
 27757  		if x3.Aux != s {
 27758  			break
 27759  		}
 27760  		_ = x3.Args[1]
 27761  		if p != x3.Args[0] {
 27762  			break
 27763  		}
 27764  		if mem != x3.Args[1] {
 27765  			break
 27766  		}
 27767  		s3 := o3.Args[1]
 27768  		if s3.Op != OpPPC64SLDconst {
 27769  			break
 27770  		}
 27771  		if s3.AuxInt != 32 {
 27772  			break
 27773  		}
 27774  		x4 := s3.Args[0]
 27775  		if x4.Op != OpPPC64MOVBZload {
 27776  			break
 27777  		}
 27778  		i4 := x4.AuxInt
 27779  		if x4.Aux != s {
 27780  			break
 27781  		}
 27782  		_ = x4.Args[1]
 27783  		if p != x4.Args[0] {
 27784  			break
 27785  		}
 27786  		if mem != x4.Args[1] {
 27787  			break
 27788  		}
 27789  		s6 := v.Args[1]
 27790  		if s6.Op != OpPPC64SLDconst {
 27791  			break
 27792  		}
 27793  		if s6.AuxInt != 56 {
 27794  			break
 27795  		}
 27796  		x7 := s6.Args[0]
 27797  		if x7.Op != OpPPC64MOVBZload {
 27798  			break
 27799  		}
 27800  		i7 := x7.AuxInt
 27801  		if x7.Aux != s {
 27802  			break
 27803  		}
 27804  		_ = x7.Args[1]
 27805  		if p != x7.Args[0] {
 27806  			break
 27807  		}
 27808  		if mem != x7.Args[1] {
 27809  			break
 27810  		}
 27811  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 27812  			break
 27813  		}
 27814  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 27815  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 27816  		v.reset(OpCopy)
 27817  		v.AddArg(v0)
 27818  		v0.AuxInt = i0
 27819  		v0.Aux = s
 27820  		v0.AddArg(p)
 27821  		v0.AddArg(mem)
 27822  		return true
 27823  	}
 27824  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 27825  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 27826  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 27827  	for {
 27828  		t := v.Type
 27829  		_ = v.Args[1]
 27830  		o5 := v.Args[0]
 27831  		if o5.Op != OpPPC64OR {
 27832  			break
 27833  		}
 27834  		if o5.Type != t {
 27835  			break
 27836  		}
 27837  		_ = o5.Args[1]
 27838  		s5 := o5.Args[0]
 27839  		if s5.Op != OpPPC64SLDconst {
 27840  			break
 27841  		}
 27842  		if s5.AuxInt != 48 {
 27843  			break
 27844  		}
 27845  		x6 := s5.Args[0]
 27846  		if x6.Op != OpPPC64MOVBZload {
 27847  			break
 27848  		}
 27849  		i6 := x6.AuxInt
 27850  		s := x6.Aux
 27851  		_ = x6.Args[1]
 27852  		p := x6.Args[0]
 27853  		mem := x6.Args[1]
 27854  		o4 := o5.Args[1]
 27855  		if o4.Op != OpPPC64OR {
 27856  			break
 27857  		}
 27858  		if o4.Type != t {
 27859  			break
 27860  		}
 27861  		_ = o4.Args[1]
 27862  		s4 := o4.Args[0]
 27863  		if s4.Op != OpPPC64SLDconst {
 27864  			break
 27865  		}
 27866  		if s4.AuxInt != 40 {
 27867  			break
 27868  		}
 27869  		x5 := s4.Args[0]
 27870  		if x5.Op != OpPPC64MOVBZload {
 27871  			break
 27872  		}
 27873  		i5 := x5.AuxInt
 27874  		if x5.Aux != s {
 27875  			break
 27876  		}
 27877  		_ = x5.Args[1]
 27878  		if p != x5.Args[0] {
 27879  			break
 27880  		}
 27881  		if mem != x5.Args[1] {
 27882  			break
 27883  		}
 27884  		o3 := o4.Args[1]
 27885  		if o3.Op != OpPPC64OR {
 27886  			break
 27887  		}
 27888  		if o3.Type != t {
 27889  			break
 27890  		}
 27891  		_ = o3.Args[1]
 27892  		o2 := o3.Args[0]
 27893  		if o2.Op != OpPPC64OR {
 27894  			break
 27895  		}
 27896  		if o2.Type != t {
 27897  			break
 27898  		}
 27899  		_ = o2.Args[1]
 27900  		o1 := o2.Args[0]
 27901  		if o1.Op != OpPPC64OR {
 27902  			break
 27903  		}
 27904  		if o1.Type != t {
 27905  			break
 27906  		}
 27907  		_ = o1.Args[1]
 27908  		o0 := o1.Args[0]
 27909  		if o0.Op != OpPPC64OR {
 27910  			break
 27911  		}
 27912  		if o0.Type != t {
 27913  			break
 27914  		}
 27915  		_ = o0.Args[1]
 27916  		s0 := o0.Args[0]
 27917  		if s0.Op != OpPPC64SLDconst {
 27918  			break
 27919  		}
 27920  		if s0.AuxInt != 8 {
 27921  			break
 27922  		}
 27923  		x1 := s0.Args[0]
 27924  		if x1.Op != OpPPC64MOVBZload {
 27925  			break
 27926  		}
 27927  		i1 := x1.AuxInt
 27928  		if x1.Aux != s {
 27929  			break
 27930  		}
 27931  		_ = x1.Args[1]
 27932  		if p != x1.Args[0] {
 27933  			break
 27934  		}
 27935  		if mem != x1.Args[1] {
 27936  			break
 27937  		}
 27938  		x0 := o0.Args[1]
 27939  		if x0.Op != OpPPC64MOVBZload {
 27940  			break
 27941  		}
 27942  		i0 := x0.AuxInt
 27943  		if x0.Aux != s {
 27944  			break
 27945  		}
 27946  		_ = x0.Args[1]
 27947  		if p != x0.Args[0] {
 27948  			break
 27949  		}
 27950  		if mem != x0.Args[1] {
 27951  			break
 27952  		}
 27953  		s1 := o1.Args[1]
 27954  		if s1.Op != OpPPC64SLDconst {
 27955  			break
 27956  		}
 27957  		if s1.AuxInt != 16 {
 27958  			break
 27959  		}
 27960  		x2 := s1.Args[0]
 27961  		if x2.Op != OpPPC64MOVBZload {
 27962  			break
 27963  		}
 27964  		i2 := x2.AuxInt
 27965  		if x2.Aux != s {
 27966  			break
 27967  		}
 27968  		_ = x2.Args[1]
 27969  		if p != x2.Args[0] {
 27970  			break
 27971  		}
 27972  		if mem != x2.Args[1] {
 27973  			break
 27974  		}
 27975  		s2 := o2.Args[1]
 27976  		if s2.Op != OpPPC64SLDconst {
 27977  			break
 27978  		}
 27979  		if s2.AuxInt != 24 {
 27980  			break
 27981  		}
 27982  		x3 := s2.Args[0]
 27983  		if x3.Op != OpPPC64MOVBZload {
 27984  			break
 27985  		}
 27986  		i3 := x3.AuxInt
 27987  		if x3.Aux != s {
 27988  			break
 27989  		}
 27990  		_ = x3.Args[1]
 27991  		if p != x3.Args[0] {
 27992  			break
 27993  		}
 27994  		if mem != x3.Args[1] {
 27995  			break
 27996  		}
 27997  		s3 := o3.Args[1]
 27998  		if s3.Op != OpPPC64SLDconst {
 27999  			break
 28000  		}
 28001  		if s3.AuxInt != 32 {
 28002  			break
 28003  		}
 28004  		x4 := s3.Args[0]
 28005  		if x4.Op != OpPPC64MOVBZload {
 28006  			break
 28007  		}
 28008  		i4 := x4.AuxInt
 28009  		if x4.Aux != s {
 28010  			break
 28011  		}
 28012  		_ = x4.Args[1]
 28013  		if p != x4.Args[0] {
 28014  			break
 28015  		}
 28016  		if mem != x4.Args[1] {
 28017  			break
 28018  		}
 28019  		s6 := v.Args[1]
 28020  		if s6.Op != OpPPC64SLDconst {
 28021  			break
 28022  		}
 28023  		if s6.AuxInt != 56 {
 28024  			break
 28025  		}
 28026  		x7 := s6.Args[0]
 28027  		if x7.Op != OpPPC64MOVBZload {
 28028  			break
 28029  		}
 28030  		i7 := x7.AuxInt
 28031  		if x7.Aux != s {
 28032  			break
 28033  		}
 28034  		_ = x7.Args[1]
 28035  		if p != x7.Args[0] {
 28036  			break
 28037  		}
 28038  		if mem != x7.Args[1] {
 28039  			break
 28040  		}
 28041  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28042  			break
 28043  		}
 28044  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28045  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28046  		v.reset(OpCopy)
 28047  		v.AddArg(v0)
 28048  		v0.AuxInt = i0
 28049  		v0.Aux = s
 28050  		v0.AddArg(p)
 28051  		v0.AddArg(mem)
 28052  		return true
 28053  	}
 28054  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28055  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28056  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28057  	for {
 28058  		t := v.Type
 28059  		_ = v.Args[1]
 28060  		o5 := v.Args[0]
 28061  		if o5.Op != OpPPC64OR {
 28062  			break
 28063  		}
 28064  		if o5.Type != t {
 28065  			break
 28066  		}
 28067  		_ = o5.Args[1]
 28068  		s5 := o5.Args[0]
 28069  		if s5.Op != OpPPC64SLDconst {
 28070  			break
 28071  		}
 28072  		if s5.AuxInt != 48 {
 28073  			break
 28074  		}
 28075  		x6 := s5.Args[0]
 28076  		if x6.Op != OpPPC64MOVBZload {
 28077  			break
 28078  		}
 28079  		i6 := x6.AuxInt
 28080  		s := x6.Aux
 28081  		_ = x6.Args[1]
 28082  		p := x6.Args[0]
 28083  		mem := x6.Args[1]
 28084  		o4 := o5.Args[1]
 28085  		if o4.Op != OpPPC64OR {
 28086  			break
 28087  		}
 28088  		if o4.Type != t {
 28089  			break
 28090  		}
 28091  		_ = o4.Args[1]
 28092  		s4 := o4.Args[0]
 28093  		if s4.Op != OpPPC64SLDconst {
 28094  			break
 28095  		}
 28096  		if s4.AuxInt != 40 {
 28097  			break
 28098  		}
 28099  		x5 := s4.Args[0]
 28100  		if x5.Op != OpPPC64MOVBZload {
 28101  			break
 28102  		}
 28103  		i5 := x5.AuxInt
 28104  		if x5.Aux != s {
 28105  			break
 28106  		}
 28107  		_ = x5.Args[1]
 28108  		if p != x5.Args[0] {
 28109  			break
 28110  		}
 28111  		if mem != x5.Args[1] {
 28112  			break
 28113  		}
 28114  		o3 := o4.Args[1]
 28115  		if o3.Op != OpPPC64OR {
 28116  			break
 28117  		}
 28118  		if o3.Type != t {
 28119  			break
 28120  		}
 28121  		_ = o3.Args[1]
 28122  		o2 := o3.Args[0]
 28123  		if o2.Op != OpPPC64OR {
 28124  			break
 28125  		}
 28126  		if o2.Type != t {
 28127  			break
 28128  		}
 28129  		_ = o2.Args[1]
 28130  		o1 := o2.Args[0]
 28131  		if o1.Op != OpPPC64OR {
 28132  			break
 28133  		}
 28134  		if o1.Type != t {
 28135  			break
 28136  		}
 28137  		_ = o1.Args[1]
 28138  		o0 := o1.Args[0]
 28139  		if o0.Op != OpPPC64OR {
 28140  			break
 28141  		}
 28142  		if o0.Type != t {
 28143  			break
 28144  		}
 28145  		_ = o0.Args[1]
 28146  		x0 := o0.Args[0]
 28147  		if x0.Op != OpPPC64MOVBZload {
 28148  			break
 28149  		}
 28150  		i0 := x0.AuxInt
 28151  		if x0.Aux != s {
 28152  			break
 28153  		}
 28154  		_ = x0.Args[1]
 28155  		if p != x0.Args[0] {
 28156  			break
 28157  		}
 28158  		if mem != x0.Args[1] {
 28159  			break
 28160  		}
 28161  		s0 := o0.Args[1]
 28162  		if s0.Op != OpPPC64SLDconst {
 28163  			break
 28164  		}
 28165  		if s0.AuxInt != 8 {
 28166  			break
 28167  		}
 28168  		x1 := s0.Args[0]
 28169  		if x1.Op != OpPPC64MOVBZload {
 28170  			break
 28171  		}
 28172  		i1 := x1.AuxInt
 28173  		if x1.Aux != s {
 28174  			break
 28175  		}
 28176  		_ = x1.Args[1]
 28177  		if p != x1.Args[0] {
 28178  			break
 28179  		}
 28180  		if mem != x1.Args[1] {
 28181  			break
 28182  		}
 28183  		s1 := o1.Args[1]
 28184  		if s1.Op != OpPPC64SLDconst {
 28185  			break
 28186  		}
 28187  		if s1.AuxInt != 16 {
 28188  			break
 28189  		}
 28190  		x2 := s1.Args[0]
 28191  		if x2.Op != OpPPC64MOVBZload {
 28192  			break
 28193  		}
 28194  		i2 := x2.AuxInt
 28195  		if x2.Aux != s {
 28196  			break
 28197  		}
 28198  		_ = x2.Args[1]
 28199  		if p != x2.Args[0] {
 28200  			break
 28201  		}
 28202  		if mem != x2.Args[1] {
 28203  			break
 28204  		}
 28205  		s2 := o2.Args[1]
 28206  		if s2.Op != OpPPC64SLDconst {
 28207  			break
 28208  		}
 28209  		if s2.AuxInt != 24 {
 28210  			break
 28211  		}
 28212  		x3 := s2.Args[0]
 28213  		if x3.Op != OpPPC64MOVBZload {
 28214  			break
 28215  		}
 28216  		i3 := x3.AuxInt
 28217  		if x3.Aux != s {
 28218  			break
 28219  		}
 28220  		_ = x3.Args[1]
 28221  		if p != x3.Args[0] {
 28222  			break
 28223  		}
 28224  		if mem != x3.Args[1] {
 28225  			break
 28226  		}
 28227  		s3 := o3.Args[1]
 28228  		if s3.Op != OpPPC64SLDconst {
 28229  			break
 28230  		}
 28231  		if s3.AuxInt != 32 {
 28232  			break
 28233  		}
 28234  		x4 := s3.Args[0]
 28235  		if x4.Op != OpPPC64MOVBZload {
 28236  			break
 28237  		}
 28238  		i4 := x4.AuxInt
 28239  		if x4.Aux != s {
 28240  			break
 28241  		}
 28242  		_ = x4.Args[1]
 28243  		if p != x4.Args[0] {
 28244  			break
 28245  		}
 28246  		if mem != x4.Args[1] {
 28247  			break
 28248  		}
 28249  		s6 := v.Args[1]
 28250  		if s6.Op != OpPPC64SLDconst {
 28251  			break
 28252  		}
 28253  		if s6.AuxInt != 56 {
 28254  			break
 28255  		}
 28256  		x7 := s6.Args[0]
 28257  		if x7.Op != OpPPC64MOVBZload {
 28258  			break
 28259  		}
 28260  		i7 := x7.AuxInt
 28261  		if x7.Aux != s {
 28262  			break
 28263  		}
 28264  		_ = x7.Args[1]
 28265  		if p != x7.Args[0] {
 28266  			break
 28267  		}
 28268  		if mem != x7.Args[1] {
 28269  			break
 28270  		}
 28271  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28272  			break
 28273  		}
 28274  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28275  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28276  		v.reset(OpCopy)
 28277  		v.AddArg(v0)
 28278  		v0.AuxInt = i0
 28279  		v0.Aux = s
 28280  		v0.AddArg(p)
 28281  		v0.AddArg(mem)
 28282  		return true
 28283  	}
 28284  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28285  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28286  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28287  	for {
 28288  		t := v.Type
 28289  		_ = v.Args[1]
 28290  		o5 := v.Args[0]
 28291  		if o5.Op != OpPPC64OR {
 28292  			break
 28293  		}
 28294  		if o5.Type != t {
 28295  			break
 28296  		}
 28297  		_ = o5.Args[1]
 28298  		s5 := o5.Args[0]
 28299  		if s5.Op != OpPPC64SLDconst {
 28300  			break
 28301  		}
 28302  		if s5.AuxInt != 48 {
 28303  			break
 28304  		}
 28305  		x6 := s5.Args[0]
 28306  		if x6.Op != OpPPC64MOVBZload {
 28307  			break
 28308  		}
 28309  		i6 := x6.AuxInt
 28310  		s := x6.Aux
 28311  		_ = x6.Args[1]
 28312  		p := x6.Args[0]
 28313  		mem := x6.Args[1]
 28314  		o4 := o5.Args[1]
 28315  		if o4.Op != OpPPC64OR {
 28316  			break
 28317  		}
 28318  		if o4.Type != t {
 28319  			break
 28320  		}
 28321  		_ = o4.Args[1]
 28322  		o3 := o4.Args[0]
 28323  		if o3.Op != OpPPC64OR {
 28324  			break
 28325  		}
 28326  		if o3.Type != t {
 28327  			break
 28328  		}
 28329  		_ = o3.Args[1]
 28330  		s3 := o3.Args[0]
 28331  		if s3.Op != OpPPC64SLDconst {
 28332  			break
 28333  		}
 28334  		if s3.AuxInt != 32 {
 28335  			break
 28336  		}
 28337  		x4 := s3.Args[0]
 28338  		if x4.Op != OpPPC64MOVBZload {
 28339  			break
 28340  		}
 28341  		i4 := x4.AuxInt
 28342  		if x4.Aux != s {
 28343  			break
 28344  		}
 28345  		_ = x4.Args[1]
 28346  		if p != x4.Args[0] {
 28347  			break
 28348  		}
 28349  		if mem != x4.Args[1] {
 28350  			break
 28351  		}
 28352  		o2 := o3.Args[1]
 28353  		if o2.Op != OpPPC64OR {
 28354  			break
 28355  		}
 28356  		if o2.Type != t {
 28357  			break
 28358  		}
 28359  		_ = o2.Args[1]
 28360  		s2 := o2.Args[0]
 28361  		if s2.Op != OpPPC64SLDconst {
 28362  			break
 28363  		}
 28364  		if s2.AuxInt != 24 {
 28365  			break
 28366  		}
 28367  		x3 := s2.Args[0]
 28368  		if x3.Op != OpPPC64MOVBZload {
 28369  			break
 28370  		}
 28371  		i3 := x3.AuxInt
 28372  		if x3.Aux != s {
 28373  			break
 28374  		}
 28375  		_ = x3.Args[1]
 28376  		if p != x3.Args[0] {
 28377  			break
 28378  		}
 28379  		if mem != x3.Args[1] {
 28380  			break
 28381  		}
 28382  		o1 := o2.Args[1]
 28383  		if o1.Op != OpPPC64OR {
 28384  			break
 28385  		}
 28386  		if o1.Type != t {
 28387  			break
 28388  		}
 28389  		_ = o1.Args[1]
 28390  		s1 := o1.Args[0]
 28391  		if s1.Op != OpPPC64SLDconst {
 28392  			break
 28393  		}
 28394  		if s1.AuxInt != 16 {
 28395  			break
 28396  		}
 28397  		x2 := s1.Args[0]
 28398  		if x2.Op != OpPPC64MOVBZload {
 28399  			break
 28400  		}
 28401  		i2 := x2.AuxInt
 28402  		if x2.Aux != s {
 28403  			break
 28404  		}
 28405  		_ = x2.Args[1]
 28406  		if p != x2.Args[0] {
 28407  			break
 28408  		}
 28409  		if mem != x2.Args[1] {
 28410  			break
 28411  		}
 28412  		o0 := o1.Args[1]
 28413  		if o0.Op != OpPPC64OR {
 28414  			break
 28415  		}
 28416  		if o0.Type != t {
 28417  			break
 28418  		}
 28419  		_ = o0.Args[1]
 28420  		s0 := o0.Args[0]
 28421  		if s0.Op != OpPPC64SLDconst {
 28422  			break
 28423  		}
 28424  		if s0.AuxInt != 8 {
 28425  			break
 28426  		}
 28427  		x1 := s0.Args[0]
 28428  		if x1.Op != OpPPC64MOVBZload {
 28429  			break
 28430  		}
 28431  		i1 := x1.AuxInt
 28432  		if x1.Aux != s {
 28433  			break
 28434  		}
 28435  		_ = x1.Args[1]
 28436  		if p != x1.Args[0] {
 28437  			break
 28438  		}
 28439  		if mem != x1.Args[1] {
 28440  			break
 28441  		}
 28442  		x0 := o0.Args[1]
 28443  		if x0.Op != OpPPC64MOVBZload {
 28444  			break
 28445  		}
 28446  		i0 := x0.AuxInt
 28447  		if x0.Aux != s {
 28448  			break
 28449  		}
 28450  		_ = x0.Args[1]
 28451  		if p != x0.Args[0] {
 28452  			break
 28453  		}
 28454  		if mem != x0.Args[1] {
 28455  			break
 28456  		}
 28457  		s4 := o4.Args[1]
 28458  		if s4.Op != OpPPC64SLDconst {
 28459  			break
 28460  		}
 28461  		if s4.AuxInt != 40 {
 28462  			break
 28463  		}
 28464  		x5 := s4.Args[0]
 28465  		if x5.Op != OpPPC64MOVBZload {
 28466  			break
 28467  		}
 28468  		i5 := x5.AuxInt
 28469  		if x5.Aux != s {
 28470  			break
 28471  		}
 28472  		_ = x5.Args[1]
 28473  		if p != x5.Args[0] {
 28474  			break
 28475  		}
 28476  		if mem != x5.Args[1] {
 28477  			break
 28478  		}
 28479  		s6 := v.Args[1]
 28480  		if s6.Op != OpPPC64SLDconst {
 28481  			break
 28482  		}
 28483  		if s6.AuxInt != 56 {
 28484  			break
 28485  		}
 28486  		x7 := s6.Args[0]
 28487  		if x7.Op != OpPPC64MOVBZload {
 28488  			break
 28489  		}
 28490  		i7 := x7.AuxInt
 28491  		if x7.Aux != s {
 28492  			break
 28493  		}
 28494  		_ = x7.Args[1]
 28495  		if p != x7.Args[0] {
 28496  			break
 28497  		}
 28498  		if mem != x7.Args[1] {
 28499  			break
 28500  		}
 28501  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28502  			break
 28503  		}
 28504  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28505  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28506  		v.reset(OpCopy)
 28507  		v.AddArg(v0)
 28508  		v0.AuxInt = i0
 28509  		v0.Aux = s
 28510  		v0.AddArg(p)
 28511  		v0.AddArg(mem)
 28512  		return true
 28513  	}
 28514  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28515  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28516  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28517  	for {
 28518  		t := v.Type
 28519  		_ = v.Args[1]
 28520  		o5 := v.Args[0]
 28521  		if o5.Op != OpPPC64OR {
 28522  			break
 28523  		}
 28524  		if o5.Type != t {
 28525  			break
 28526  		}
 28527  		_ = o5.Args[1]
 28528  		s5 := o5.Args[0]
 28529  		if s5.Op != OpPPC64SLDconst {
 28530  			break
 28531  		}
 28532  		if s5.AuxInt != 48 {
 28533  			break
 28534  		}
 28535  		x6 := s5.Args[0]
 28536  		if x6.Op != OpPPC64MOVBZload {
 28537  			break
 28538  		}
 28539  		i6 := x6.AuxInt
 28540  		s := x6.Aux
 28541  		_ = x6.Args[1]
 28542  		p := x6.Args[0]
 28543  		mem := x6.Args[1]
 28544  		o4 := o5.Args[1]
 28545  		if o4.Op != OpPPC64OR {
 28546  			break
 28547  		}
 28548  		if o4.Type != t {
 28549  			break
 28550  		}
 28551  		_ = o4.Args[1]
 28552  		o3 := o4.Args[0]
 28553  		if o3.Op != OpPPC64OR {
 28554  			break
 28555  		}
 28556  		if o3.Type != t {
 28557  			break
 28558  		}
 28559  		_ = o3.Args[1]
 28560  		s3 := o3.Args[0]
 28561  		if s3.Op != OpPPC64SLDconst {
 28562  			break
 28563  		}
 28564  		if s3.AuxInt != 32 {
 28565  			break
 28566  		}
 28567  		x4 := s3.Args[0]
 28568  		if x4.Op != OpPPC64MOVBZload {
 28569  			break
 28570  		}
 28571  		i4 := x4.AuxInt
 28572  		if x4.Aux != s {
 28573  			break
 28574  		}
 28575  		_ = x4.Args[1]
 28576  		if p != x4.Args[0] {
 28577  			break
 28578  		}
 28579  		if mem != x4.Args[1] {
 28580  			break
 28581  		}
 28582  		o2 := o3.Args[1]
 28583  		if o2.Op != OpPPC64OR {
 28584  			break
 28585  		}
 28586  		if o2.Type != t {
 28587  			break
 28588  		}
 28589  		_ = o2.Args[1]
 28590  		s2 := o2.Args[0]
 28591  		if s2.Op != OpPPC64SLDconst {
 28592  			break
 28593  		}
 28594  		if s2.AuxInt != 24 {
 28595  			break
 28596  		}
 28597  		x3 := s2.Args[0]
 28598  		if x3.Op != OpPPC64MOVBZload {
 28599  			break
 28600  		}
 28601  		i3 := x3.AuxInt
 28602  		if x3.Aux != s {
 28603  			break
 28604  		}
 28605  		_ = x3.Args[1]
 28606  		if p != x3.Args[0] {
 28607  			break
 28608  		}
 28609  		if mem != x3.Args[1] {
 28610  			break
 28611  		}
 28612  		o1 := o2.Args[1]
 28613  		if o1.Op != OpPPC64OR {
 28614  			break
 28615  		}
 28616  		if o1.Type != t {
 28617  			break
 28618  		}
 28619  		_ = o1.Args[1]
 28620  		s1 := o1.Args[0]
 28621  		if s1.Op != OpPPC64SLDconst {
 28622  			break
 28623  		}
 28624  		if s1.AuxInt != 16 {
 28625  			break
 28626  		}
 28627  		x2 := s1.Args[0]
 28628  		if x2.Op != OpPPC64MOVBZload {
 28629  			break
 28630  		}
 28631  		i2 := x2.AuxInt
 28632  		if x2.Aux != s {
 28633  			break
 28634  		}
 28635  		_ = x2.Args[1]
 28636  		if p != x2.Args[0] {
 28637  			break
 28638  		}
 28639  		if mem != x2.Args[1] {
 28640  			break
 28641  		}
 28642  		o0 := o1.Args[1]
 28643  		if o0.Op != OpPPC64OR {
 28644  			break
 28645  		}
 28646  		if o0.Type != t {
 28647  			break
 28648  		}
 28649  		_ = o0.Args[1]
 28650  		x0 := o0.Args[0]
 28651  		if x0.Op != OpPPC64MOVBZload {
 28652  			break
 28653  		}
 28654  		i0 := x0.AuxInt
 28655  		if x0.Aux != s {
 28656  			break
 28657  		}
 28658  		_ = x0.Args[1]
 28659  		if p != x0.Args[0] {
 28660  			break
 28661  		}
 28662  		if mem != x0.Args[1] {
 28663  			break
 28664  		}
 28665  		s0 := o0.Args[1]
 28666  		if s0.Op != OpPPC64SLDconst {
 28667  			break
 28668  		}
 28669  		if s0.AuxInt != 8 {
 28670  			break
 28671  		}
 28672  		x1 := s0.Args[0]
 28673  		if x1.Op != OpPPC64MOVBZload {
 28674  			break
 28675  		}
 28676  		i1 := x1.AuxInt
 28677  		if x1.Aux != s {
 28678  			break
 28679  		}
 28680  		_ = x1.Args[1]
 28681  		if p != x1.Args[0] {
 28682  			break
 28683  		}
 28684  		if mem != x1.Args[1] {
 28685  			break
 28686  		}
 28687  		s4 := o4.Args[1]
 28688  		if s4.Op != OpPPC64SLDconst {
 28689  			break
 28690  		}
 28691  		if s4.AuxInt != 40 {
 28692  			break
 28693  		}
 28694  		x5 := s4.Args[0]
 28695  		if x5.Op != OpPPC64MOVBZload {
 28696  			break
 28697  		}
 28698  		i5 := x5.AuxInt
 28699  		if x5.Aux != s {
 28700  			break
 28701  		}
 28702  		_ = x5.Args[1]
 28703  		if p != x5.Args[0] {
 28704  			break
 28705  		}
 28706  		if mem != x5.Args[1] {
 28707  			break
 28708  		}
 28709  		s6 := v.Args[1]
 28710  		if s6.Op != OpPPC64SLDconst {
 28711  			break
 28712  		}
 28713  		if s6.AuxInt != 56 {
 28714  			break
 28715  		}
 28716  		x7 := s6.Args[0]
 28717  		if x7.Op != OpPPC64MOVBZload {
 28718  			break
 28719  		}
 28720  		i7 := x7.AuxInt
 28721  		if x7.Aux != s {
 28722  			break
 28723  		}
 28724  		_ = x7.Args[1]
 28725  		if p != x7.Args[0] {
 28726  			break
 28727  		}
 28728  		if mem != x7.Args[1] {
 28729  			break
 28730  		}
 28731  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28732  			break
 28733  		}
 28734  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28735  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28736  		v.reset(OpCopy)
 28737  		v.AddArg(v0)
 28738  		v0.AuxInt = i0
 28739  		v0.Aux = s
 28740  		v0.AddArg(p)
 28741  		v0.AddArg(mem)
 28742  		return true
 28743  	}
 28744  	return false
 28745  }
 28746  func rewriteValuePPC64_OpPPC64OR_100(v *Value) bool {
 28747  	b := v.Block
 28748  	_ = b
 28749  	config := b.Func.Config
 28750  	_ = config
 28751  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28752  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28753  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28754  	for {
 28755  		t := v.Type
 28756  		_ = v.Args[1]
 28757  		o5 := v.Args[0]
 28758  		if o5.Op != OpPPC64OR {
 28759  			break
 28760  		}
 28761  		if o5.Type != t {
 28762  			break
 28763  		}
 28764  		_ = o5.Args[1]
 28765  		s5 := o5.Args[0]
 28766  		if s5.Op != OpPPC64SLDconst {
 28767  			break
 28768  		}
 28769  		if s5.AuxInt != 48 {
 28770  			break
 28771  		}
 28772  		x6 := s5.Args[0]
 28773  		if x6.Op != OpPPC64MOVBZload {
 28774  			break
 28775  		}
 28776  		i6 := x6.AuxInt
 28777  		s := x6.Aux
 28778  		_ = x6.Args[1]
 28779  		p := x6.Args[0]
 28780  		mem := x6.Args[1]
 28781  		o4 := o5.Args[1]
 28782  		if o4.Op != OpPPC64OR {
 28783  			break
 28784  		}
 28785  		if o4.Type != t {
 28786  			break
 28787  		}
 28788  		_ = o4.Args[1]
 28789  		o3 := o4.Args[0]
 28790  		if o3.Op != OpPPC64OR {
 28791  			break
 28792  		}
 28793  		if o3.Type != t {
 28794  			break
 28795  		}
 28796  		_ = o3.Args[1]
 28797  		s3 := o3.Args[0]
 28798  		if s3.Op != OpPPC64SLDconst {
 28799  			break
 28800  		}
 28801  		if s3.AuxInt != 32 {
 28802  			break
 28803  		}
 28804  		x4 := s3.Args[0]
 28805  		if x4.Op != OpPPC64MOVBZload {
 28806  			break
 28807  		}
 28808  		i4 := x4.AuxInt
 28809  		if x4.Aux != s {
 28810  			break
 28811  		}
 28812  		_ = x4.Args[1]
 28813  		if p != x4.Args[0] {
 28814  			break
 28815  		}
 28816  		if mem != x4.Args[1] {
 28817  			break
 28818  		}
 28819  		o2 := o3.Args[1]
 28820  		if o2.Op != OpPPC64OR {
 28821  			break
 28822  		}
 28823  		if o2.Type != t {
 28824  			break
 28825  		}
 28826  		_ = o2.Args[1]
 28827  		s2 := o2.Args[0]
 28828  		if s2.Op != OpPPC64SLDconst {
 28829  			break
 28830  		}
 28831  		if s2.AuxInt != 24 {
 28832  			break
 28833  		}
 28834  		x3 := s2.Args[0]
 28835  		if x3.Op != OpPPC64MOVBZload {
 28836  			break
 28837  		}
 28838  		i3 := x3.AuxInt
 28839  		if x3.Aux != s {
 28840  			break
 28841  		}
 28842  		_ = x3.Args[1]
 28843  		if p != x3.Args[0] {
 28844  			break
 28845  		}
 28846  		if mem != x3.Args[1] {
 28847  			break
 28848  		}
 28849  		o1 := o2.Args[1]
 28850  		if o1.Op != OpPPC64OR {
 28851  			break
 28852  		}
 28853  		if o1.Type != t {
 28854  			break
 28855  		}
 28856  		_ = o1.Args[1]
 28857  		o0 := o1.Args[0]
 28858  		if o0.Op != OpPPC64OR {
 28859  			break
 28860  		}
 28861  		if o0.Type != t {
 28862  			break
 28863  		}
 28864  		_ = o0.Args[1]
 28865  		s0 := o0.Args[0]
 28866  		if s0.Op != OpPPC64SLDconst {
 28867  			break
 28868  		}
 28869  		if s0.AuxInt != 8 {
 28870  			break
 28871  		}
 28872  		x1 := s0.Args[0]
 28873  		if x1.Op != OpPPC64MOVBZload {
 28874  			break
 28875  		}
 28876  		i1 := x1.AuxInt
 28877  		if x1.Aux != s {
 28878  			break
 28879  		}
 28880  		_ = x1.Args[1]
 28881  		if p != x1.Args[0] {
 28882  			break
 28883  		}
 28884  		if mem != x1.Args[1] {
 28885  			break
 28886  		}
 28887  		x0 := o0.Args[1]
 28888  		if x0.Op != OpPPC64MOVBZload {
 28889  			break
 28890  		}
 28891  		i0 := x0.AuxInt
 28892  		if x0.Aux != s {
 28893  			break
 28894  		}
 28895  		_ = x0.Args[1]
 28896  		if p != x0.Args[0] {
 28897  			break
 28898  		}
 28899  		if mem != x0.Args[1] {
 28900  			break
 28901  		}
 28902  		s1 := o1.Args[1]
 28903  		if s1.Op != OpPPC64SLDconst {
 28904  			break
 28905  		}
 28906  		if s1.AuxInt != 16 {
 28907  			break
 28908  		}
 28909  		x2 := s1.Args[0]
 28910  		if x2.Op != OpPPC64MOVBZload {
 28911  			break
 28912  		}
 28913  		i2 := x2.AuxInt
 28914  		if x2.Aux != s {
 28915  			break
 28916  		}
 28917  		_ = x2.Args[1]
 28918  		if p != x2.Args[0] {
 28919  			break
 28920  		}
 28921  		if mem != x2.Args[1] {
 28922  			break
 28923  		}
 28924  		s4 := o4.Args[1]
 28925  		if s4.Op != OpPPC64SLDconst {
 28926  			break
 28927  		}
 28928  		if s4.AuxInt != 40 {
 28929  			break
 28930  		}
 28931  		x5 := s4.Args[0]
 28932  		if x5.Op != OpPPC64MOVBZload {
 28933  			break
 28934  		}
 28935  		i5 := x5.AuxInt
 28936  		if x5.Aux != s {
 28937  			break
 28938  		}
 28939  		_ = x5.Args[1]
 28940  		if p != x5.Args[0] {
 28941  			break
 28942  		}
 28943  		if mem != x5.Args[1] {
 28944  			break
 28945  		}
 28946  		s6 := v.Args[1]
 28947  		if s6.Op != OpPPC64SLDconst {
 28948  			break
 28949  		}
 28950  		if s6.AuxInt != 56 {
 28951  			break
 28952  		}
 28953  		x7 := s6.Args[0]
 28954  		if x7.Op != OpPPC64MOVBZload {
 28955  			break
 28956  		}
 28957  		i7 := x7.AuxInt
 28958  		if x7.Aux != s {
 28959  			break
 28960  		}
 28961  		_ = x7.Args[1]
 28962  		if p != x7.Args[0] {
 28963  			break
 28964  		}
 28965  		if mem != x7.Args[1] {
 28966  			break
 28967  		}
 28968  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 28969  			break
 28970  		}
 28971  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 28972  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 28973  		v.reset(OpCopy)
 28974  		v.AddArg(v0)
 28975  		v0.AuxInt = i0
 28976  		v0.Aux = s
 28977  		v0.AddArg(p)
 28978  		v0.AddArg(mem)
 28979  		return true
 28980  	}
 28981  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 28982  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 28983  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 28984  	for {
 28985  		t := v.Type
 28986  		_ = v.Args[1]
 28987  		o5 := v.Args[0]
 28988  		if o5.Op != OpPPC64OR {
 28989  			break
 28990  		}
 28991  		if o5.Type != t {
 28992  			break
 28993  		}
 28994  		_ = o5.Args[1]
 28995  		s5 := o5.Args[0]
 28996  		if s5.Op != OpPPC64SLDconst {
 28997  			break
 28998  		}
 28999  		if s5.AuxInt != 48 {
 29000  			break
 29001  		}
 29002  		x6 := s5.Args[0]
 29003  		if x6.Op != OpPPC64MOVBZload {
 29004  			break
 29005  		}
 29006  		i6 := x6.AuxInt
 29007  		s := x6.Aux
 29008  		_ = x6.Args[1]
 29009  		p := x6.Args[0]
 29010  		mem := x6.Args[1]
 29011  		o4 := o5.Args[1]
 29012  		if o4.Op != OpPPC64OR {
 29013  			break
 29014  		}
 29015  		if o4.Type != t {
 29016  			break
 29017  		}
 29018  		_ = o4.Args[1]
 29019  		o3 := o4.Args[0]
 29020  		if o3.Op != OpPPC64OR {
 29021  			break
 29022  		}
 29023  		if o3.Type != t {
 29024  			break
 29025  		}
 29026  		_ = o3.Args[1]
 29027  		s3 := o3.Args[0]
 29028  		if s3.Op != OpPPC64SLDconst {
 29029  			break
 29030  		}
 29031  		if s3.AuxInt != 32 {
 29032  			break
 29033  		}
 29034  		x4 := s3.Args[0]
 29035  		if x4.Op != OpPPC64MOVBZload {
 29036  			break
 29037  		}
 29038  		i4 := x4.AuxInt
 29039  		if x4.Aux != s {
 29040  			break
 29041  		}
 29042  		_ = x4.Args[1]
 29043  		if p != x4.Args[0] {
 29044  			break
 29045  		}
 29046  		if mem != x4.Args[1] {
 29047  			break
 29048  		}
 29049  		o2 := o3.Args[1]
 29050  		if o2.Op != OpPPC64OR {
 29051  			break
 29052  		}
 29053  		if o2.Type != t {
 29054  			break
 29055  		}
 29056  		_ = o2.Args[1]
 29057  		s2 := o2.Args[0]
 29058  		if s2.Op != OpPPC64SLDconst {
 29059  			break
 29060  		}
 29061  		if s2.AuxInt != 24 {
 29062  			break
 29063  		}
 29064  		x3 := s2.Args[0]
 29065  		if x3.Op != OpPPC64MOVBZload {
 29066  			break
 29067  		}
 29068  		i3 := x3.AuxInt
 29069  		if x3.Aux != s {
 29070  			break
 29071  		}
 29072  		_ = x3.Args[1]
 29073  		if p != x3.Args[0] {
 29074  			break
 29075  		}
 29076  		if mem != x3.Args[1] {
 29077  			break
 29078  		}
 29079  		o1 := o2.Args[1]
 29080  		if o1.Op != OpPPC64OR {
 29081  			break
 29082  		}
 29083  		if o1.Type != t {
 29084  			break
 29085  		}
 29086  		_ = o1.Args[1]
 29087  		o0 := o1.Args[0]
 29088  		if o0.Op != OpPPC64OR {
 29089  			break
 29090  		}
 29091  		if o0.Type != t {
 29092  			break
 29093  		}
 29094  		_ = o0.Args[1]
 29095  		x0 := o0.Args[0]
 29096  		if x0.Op != OpPPC64MOVBZload {
 29097  			break
 29098  		}
 29099  		i0 := x0.AuxInt
 29100  		if x0.Aux != s {
 29101  			break
 29102  		}
 29103  		_ = x0.Args[1]
 29104  		if p != x0.Args[0] {
 29105  			break
 29106  		}
 29107  		if mem != x0.Args[1] {
 29108  			break
 29109  		}
 29110  		s0 := o0.Args[1]
 29111  		if s0.Op != OpPPC64SLDconst {
 29112  			break
 29113  		}
 29114  		if s0.AuxInt != 8 {
 29115  			break
 29116  		}
 29117  		x1 := s0.Args[0]
 29118  		if x1.Op != OpPPC64MOVBZload {
 29119  			break
 29120  		}
 29121  		i1 := x1.AuxInt
 29122  		if x1.Aux != s {
 29123  			break
 29124  		}
 29125  		_ = x1.Args[1]
 29126  		if p != x1.Args[0] {
 29127  			break
 29128  		}
 29129  		if mem != x1.Args[1] {
 29130  			break
 29131  		}
 29132  		s1 := o1.Args[1]
 29133  		if s1.Op != OpPPC64SLDconst {
 29134  			break
 29135  		}
 29136  		if s1.AuxInt != 16 {
 29137  			break
 29138  		}
 29139  		x2 := s1.Args[0]
 29140  		if x2.Op != OpPPC64MOVBZload {
 29141  			break
 29142  		}
 29143  		i2 := x2.AuxInt
 29144  		if x2.Aux != s {
 29145  			break
 29146  		}
 29147  		_ = x2.Args[1]
 29148  		if p != x2.Args[0] {
 29149  			break
 29150  		}
 29151  		if mem != x2.Args[1] {
 29152  			break
 29153  		}
 29154  		s4 := o4.Args[1]
 29155  		if s4.Op != OpPPC64SLDconst {
 29156  			break
 29157  		}
 29158  		if s4.AuxInt != 40 {
 29159  			break
 29160  		}
 29161  		x5 := s4.Args[0]
 29162  		if x5.Op != OpPPC64MOVBZload {
 29163  			break
 29164  		}
 29165  		i5 := x5.AuxInt
 29166  		if x5.Aux != s {
 29167  			break
 29168  		}
 29169  		_ = x5.Args[1]
 29170  		if p != x5.Args[0] {
 29171  			break
 29172  		}
 29173  		if mem != x5.Args[1] {
 29174  			break
 29175  		}
 29176  		s6 := v.Args[1]
 29177  		if s6.Op != OpPPC64SLDconst {
 29178  			break
 29179  		}
 29180  		if s6.AuxInt != 56 {
 29181  			break
 29182  		}
 29183  		x7 := s6.Args[0]
 29184  		if x7.Op != OpPPC64MOVBZload {
 29185  			break
 29186  		}
 29187  		i7 := x7.AuxInt
 29188  		if x7.Aux != s {
 29189  			break
 29190  		}
 29191  		_ = x7.Args[1]
 29192  		if p != x7.Args[0] {
 29193  			break
 29194  		}
 29195  		if mem != x7.Args[1] {
 29196  			break
 29197  		}
 29198  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 29199  			break
 29200  		}
 29201  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 29202  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 29203  		v.reset(OpCopy)
 29204  		v.AddArg(v0)
 29205  		v0.AuxInt = i0
 29206  		v0.Aux = s
 29207  		v0.AddArg(p)
 29208  		v0.AddArg(mem)
 29209  		return true
 29210  	}
 29211  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 29212  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 29213  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 29214  	for {
 29215  		t := v.Type
 29216  		_ = v.Args[1]
 29217  		o5 := v.Args[0]
 29218  		if o5.Op != OpPPC64OR {
 29219  			break
 29220  		}
 29221  		if o5.Type != t {
 29222  			break
 29223  		}
 29224  		_ = o5.Args[1]
 29225  		s5 := o5.Args[0]
 29226  		if s5.Op != OpPPC64SLDconst {
 29227  			break
 29228  		}
 29229  		if s5.AuxInt != 48 {
 29230  			break
 29231  		}
 29232  		x6 := s5.Args[0]
 29233  		if x6.Op != OpPPC64MOVBZload {
 29234  			break
 29235  		}
 29236  		i6 := x6.AuxInt
 29237  		s := x6.Aux
 29238  		_ = x6.Args[1]
 29239  		p := x6.Args[0]
 29240  		mem := x6.Args[1]
 29241  		o4 := o5.Args[1]
 29242  		if o4.Op != OpPPC64OR {
 29243  			break
 29244  		}
 29245  		if o4.Type != t {
 29246  			break
 29247  		}
 29248  		_ = o4.Args[1]
 29249  		o3 := o4.Args[0]
 29250  		if o3.Op != OpPPC64OR {
 29251  			break
 29252  		}
 29253  		if o3.Type != t {
 29254  			break
 29255  		}
 29256  		_ = o3.Args[1]
 29257  		s3 := o3.Args[0]
 29258  		if s3.Op != OpPPC64SLDconst {
 29259  			break
 29260  		}
 29261  		if s3.AuxInt != 32 {
 29262  			break
 29263  		}
 29264  		x4 := s3.Args[0]
 29265  		if x4.Op != OpPPC64MOVBZload {
 29266  			break
 29267  		}
 29268  		i4 := x4.AuxInt
 29269  		if x4.Aux != s {
 29270  			break
 29271  		}
 29272  		_ = x4.Args[1]
 29273  		if p != x4.Args[0] {
 29274  			break
 29275  		}
 29276  		if mem != x4.Args[1] {
 29277  			break
 29278  		}
 29279  		o2 := o3.Args[1]
 29280  		if o2.Op != OpPPC64OR {
 29281  			break
 29282  		}
 29283  		if o2.Type != t {
 29284  			break
 29285  		}
 29286  		_ = o2.Args[1]
 29287  		o1 := o2.Args[0]
 29288  		if o1.Op != OpPPC64OR {
 29289  			break
 29290  		}
 29291  		if o1.Type != t {
 29292  			break
 29293  		}
 29294  		_ = o1.Args[1]
 29295  		s1 := o1.Args[0]
 29296  		if s1.Op != OpPPC64SLDconst {
 29297  			break
 29298  		}
 29299  		if s1.AuxInt != 16 {
 29300  			break
 29301  		}
 29302  		x2 := s1.Args[0]
 29303  		if x2.Op != OpPPC64MOVBZload {
 29304  			break
 29305  		}
 29306  		i2 := x2.AuxInt
 29307  		if x2.Aux != s {
 29308  			break
 29309  		}
 29310  		_ = x2.Args[1]
 29311  		if p != x2.Args[0] {
 29312  			break
 29313  		}
 29314  		if mem != x2.Args[1] {
 29315  			break
 29316  		}
 29317  		o0 := o1.Args[1]
 29318  		if o0.Op != OpPPC64OR {
 29319  			break
 29320  		}
 29321  		if o0.Type != t {
 29322  			break
 29323  		}
 29324  		_ = o0.Args[1]
 29325  		s0 := o0.Args[0]
 29326  		if s0.Op != OpPPC64SLDconst {
 29327  			break
 29328  		}
 29329  		if s0.AuxInt != 8 {
 29330  			break
 29331  		}
 29332  		x1 := s0.Args[0]
 29333  		if x1.Op != OpPPC64MOVBZload {
 29334  			break
 29335  		}
 29336  		i1 := x1.AuxInt
 29337  		if x1.Aux != s {
 29338  			break
 29339  		}
 29340  		_ = x1.Args[1]
 29341  		if p != x1.Args[0] {
 29342  			break
 29343  		}
 29344  		if mem != x1.Args[1] {
 29345  			break
 29346  		}
 29347  		x0 := o0.Args[1]
 29348  		if x0.Op != OpPPC64MOVBZload {
 29349  			break
 29350  		}
 29351  		i0 := x0.AuxInt
 29352  		if x0.Aux != s {
 29353  			break
 29354  		}
 29355  		_ = x0.Args[1]
 29356  		if p != x0.Args[0] {
 29357  			break
 29358  		}
 29359  		if mem != x0.Args[1] {
 29360  			break
 29361  		}
 29362  		s2 := o2.Args[1]
 29363  		if s2.Op != OpPPC64SLDconst {
 29364  			break
 29365  		}
 29366  		if s2.AuxInt != 24 {
 29367  			break
 29368  		}
 29369  		x3 := s2.Args[0]
 29370  		if x3.Op != OpPPC64MOVBZload {
 29371  			break
 29372  		}
 29373  		i3 := x3.AuxInt
 29374  		if x3.Aux != s {
 29375  			break
 29376  		}
 29377  		_ = x3.Args[1]
 29378  		if p != x3.Args[0] {
 29379  			break
 29380  		}
 29381  		if mem != x3.Args[1] {
 29382  			break
 29383  		}
 29384  		s4 := o4.Args[1]
 29385  		if s4.Op != OpPPC64SLDconst {
 29386  			break
 29387  		}
 29388  		if s4.AuxInt != 40 {
 29389  			break
 29390  		}
 29391  		x5 := s4.Args[0]
 29392  		if x5.Op != OpPPC64MOVBZload {
 29393  			break
 29394  		}
 29395  		i5 := x5.AuxInt
 29396  		if x5.Aux != s {
 29397  			break
 29398  		}
 29399  		_ = x5.Args[1]
 29400  		if p != x5.Args[0] {
 29401  			break
 29402  		}
 29403  		if mem != x5.Args[1] {
 29404  			break
 29405  		}
 29406  		s6 := v.Args[1]
 29407  		if s6.Op != OpPPC64SLDconst {
 29408  			break
 29409  		}
 29410  		if s6.AuxInt != 56 {
 29411  			break
 29412  		}
 29413  		x7 := s6.Args[0]
 29414  		if x7.Op != OpPPC64MOVBZload {
 29415  			break
 29416  		}
 29417  		i7 := x7.AuxInt
 29418  		if x7.Aux != s {
 29419  			break
 29420  		}
 29421  		_ = x7.Args[1]
 29422  		if p != x7.Args[0] {
 29423  			break
 29424  		}
 29425  		if mem != x7.Args[1] {
 29426  			break
 29427  		}
 29428  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 29429  			break
 29430  		}
 29431  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 29432  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 29433  		v.reset(OpCopy)
 29434  		v.AddArg(v0)
 29435  		v0.AuxInt = i0
 29436  		v0.Aux = s
 29437  		v0.AddArg(p)
 29438  		v0.AddArg(mem)
 29439  		return true
 29440  	}
 29441  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 29442  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 29443  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 29444  	for {
 29445  		t := v.Type
 29446  		_ = v.Args[1]
 29447  		o5 := v.Args[0]
 29448  		if o5.Op != OpPPC64OR {
 29449  			break
 29450  		}
 29451  		if o5.Type != t {
 29452  			break
 29453  		}
 29454  		_ = o5.Args[1]
 29455  		s5 := o5.Args[0]
 29456  		if s5.Op != OpPPC64SLDconst {
 29457  			break
 29458  		}
 29459  		if s5.AuxInt != 48 {
 29460  			break
 29461  		}
 29462  		x6 := s5.Args[0]
 29463  		if x6.Op != OpPPC64MOVBZload {
 29464  			break
 29465  		}
 29466  		i6 := x6.AuxInt
 29467  		s := x6.Aux
 29468  		_ = x6.Args[1]
 29469  		p := x6.Args[0]
 29470  		mem := x6.Args[1]
 29471  		o4 := o5.Args[1]
 29472  		if o4.Op != OpPPC64OR {
 29473  			break
 29474  		}
 29475  		if o4.Type != t {
 29476  			break
 29477  		}
 29478  		_ = o4.Args[1]
 29479  		o3 := o4.Args[0]
 29480  		if o3.Op != OpPPC64OR {
 29481  			break
 29482  		}
 29483  		if o3.Type != t {
 29484  			break
 29485  		}
 29486  		_ = o3.Args[1]
 29487  		s3 := o3.Args[0]
 29488  		if s3.Op != OpPPC64SLDconst {
 29489  			break
 29490  		}
 29491  		if s3.AuxInt != 32 {
 29492  			break
 29493  		}
 29494  		x4 := s3.Args[0]
 29495  		if x4.Op != OpPPC64MOVBZload {
 29496  			break
 29497  		}
 29498  		i4 := x4.AuxInt
 29499  		if x4.Aux != s {
 29500  			break
 29501  		}
 29502  		_ = x4.Args[1]
 29503  		if p != x4.Args[0] {
 29504  			break
 29505  		}
 29506  		if mem != x4.Args[1] {
 29507  			break
 29508  		}
 29509  		o2 := o3.Args[1]
 29510  		if o2.Op != OpPPC64OR {
 29511  			break
 29512  		}
 29513  		if o2.Type != t {
 29514  			break
 29515  		}
 29516  		_ = o2.Args[1]
 29517  		o1 := o2.Args[0]
 29518  		if o1.Op != OpPPC64OR {
 29519  			break
 29520  		}
 29521  		if o1.Type != t {
 29522  			break
 29523  		}
 29524  		_ = o1.Args[1]
 29525  		s1 := o1.Args[0]
 29526  		if s1.Op != OpPPC64SLDconst {
 29527  			break
 29528  		}
 29529  		if s1.AuxInt != 16 {
 29530  			break
 29531  		}
 29532  		x2 := s1.Args[0]
 29533  		if x2.Op != OpPPC64MOVBZload {
 29534  			break
 29535  		}
 29536  		i2 := x2.AuxInt
 29537  		if x2.Aux != s {
 29538  			break
 29539  		}
 29540  		_ = x2.Args[1]
 29541  		if p != x2.Args[0] {
 29542  			break
 29543  		}
 29544  		if mem != x2.Args[1] {
 29545  			break
 29546  		}
 29547  		o0 := o1.Args[1]
 29548  		if o0.Op != OpPPC64OR {
 29549  			break
 29550  		}
 29551  		if o0.Type != t {
 29552  			break
 29553  		}
 29554  		_ = o0.Args[1]
 29555  		x0 := o0.Args[0]
 29556  		if x0.Op != OpPPC64MOVBZload {
 29557  			break
 29558  		}
 29559  		i0 := x0.AuxInt
 29560  		if x0.Aux != s {
 29561  			break
 29562  		}
 29563  		_ = x0.Args[1]
 29564  		if p != x0.Args[0] {
 29565  			break
 29566  		}
 29567  		if mem != x0.Args[1] {
 29568  			break
 29569  		}
 29570  		s0 := o0.Args[1]
 29571  		if s0.Op != OpPPC64SLDconst {
 29572  			break
 29573  		}
 29574  		if s0.AuxInt != 8 {
 29575  			break
 29576  		}
 29577  		x1 := s0.Args[0]
 29578  		if x1.Op != OpPPC64MOVBZload {
 29579  			break
 29580  		}
 29581  		i1 := x1.AuxInt
 29582  		if x1.Aux != s {
 29583  			break
 29584  		}
 29585  		_ = x1.Args[1]
 29586  		if p != x1.Args[0] {
 29587  			break
 29588  		}
 29589  		if mem != x1.Args[1] {
 29590  			break
 29591  		}
 29592  		s2 := o2.Args[1]
 29593  		if s2.Op != OpPPC64SLDconst {
 29594  			break
 29595  		}
 29596  		if s2.AuxInt != 24 {
 29597  			break
 29598  		}
 29599  		x3 := s2.Args[0]
 29600  		if x3.Op != OpPPC64MOVBZload {
 29601  			break
 29602  		}
 29603  		i3 := x3.AuxInt
 29604  		if x3.Aux != s {
 29605  			break
 29606  		}
 29607  		_ = x3.Args[1]
 29608  		if p != x3.Args[0] {
 29609  			break
 29610  		}
 29611  		if mem != x3.Args[1] {
 29612  			break
 29613  		}
 29614  		s4 := o4.Args[1]
 29615  		if s4.Op != OpPPC64SLDconst {
 29616  			break
 29617  		}
 29618  		if s4.AuxInt != 40 {
 29619  			break
 29620  		}
 29621  		x5 := s4.Args[0]
 29622  		if x5.Op != OpPPC64MOVBZload {
 29623  			break
 29624  		}
 29625  		i5 := x5.AuxInt
 29626  		if x5.Aux != s {
 29627  			break
 29628  		}
 29629  		_ = x5.Args[1]
 29630  		if p != x5.Args[0] {
 29631  			break
 29632  		}
 29633  		if mem != x5.Args[1] {
 29634  			break
 29635  		}
 29636  		s6 := v.Args[1]
 29637  		if s6.Op != OpPPC64SLDconst {
 29638  			break
 29639  		}
 29640  		if s6.AuxInt != 56 {
 29641  			break
 29642  		}
 29643  		x7 := s6.Args[0]
 29644  		if x7.Op != OpPPC64MOVBZload {
 29645  			break
 29646  		}
 29647  		i7 := x7.AuxInt
 29648  		if x7.Aux != s {
 29649  			break
 29650  		}
 29651  		_ = x7.Args[1]
 29652  		if p != x7.Args[0] {
 29653  			break
 29654  		}
 29655  		if mem != x7.Args[1] {
 29656  			break
 29657  		}
 29658  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 29659  			break
 29660  		}
 29661  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 29662  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 29663  		v.reset(OpCopy)
 29664  		v.AddArg(v0)
 29665  		v0.AuxInt = i0
 29666  		v0.Aux = s
 29667  		v0.AddArg(p)
 29668  		v0.AddArg(mem)
 29669  		return true
 29670  	}
 29671  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 29672  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 29673  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 29674  	for {
 29675  		t := v.Type
 29676  		_ = v.Args[1]
 29677  		o5 := v.Args[0]
 29678  		if o5.Op != OpPPC64OR {
 29679  			break
 29680  		}
 29681  		if o5.Type != t {
 29682  			break
 29683  		}
 29684  		_ = o5.Args[1]
 29685  		s5 := o5.Args[0]
 29686  		if s5.Op != OpPPC64SLDconst {
 29687  			break
 29688  		}
 29689  		if s5.AuxInt != 48 {
 29690  			break
 29691  		}
 29692  		x6 := s5.Args[0]
 29693  		if x6.Op != OpPPC64MOVBZload {
 29694  			break
 29695  		}
 29696  		i6 := x6.AuxInt
 29697  		s := x6.Aux
 29698  		_ = x6.Args[1]
 29699  		p := x6.Args[0]
 29700  		mem := x6.Args[1]
 29701  		o4 := o5.Args[1]
 29702  		if o4.Op != OpPPC64OR {
 29703  			break
 29704  		}
 29705  		if o4.Type != t {
 29706  			break
 29707  		}
 29708  		_ = o4.Args[1]
 29709  		o3 := o4.Args[0]
 29710  		if o3.Op != OpPPC64OR {
 29711  			break
 29712  		}
 29713  		if o3.Type != t {
 29714  			break
 29715  		}
 29716  		_ = o3.Args[1]
 29717  		s3 := o3.Args[0]
 29718  		if s3.Op != OpPPC64SLDconst {
 29719  			break
 29720  		}
 29721  		if s3.AuxInt != 32 {
 29722  			break
 29723  		}
 29724  		x4 := s3.Args[0]
 29725  		if x4.Op != OpPPC64MOVBZload {
 29726  			break
 29727  		}
 29728  		i4 := x4.AuxInt
 29729  		if x4.Aux != s {
 29730  			break
 29731  		}
 29732  		_ = x4.Args[1]
 29733  		if p != x4.Args[0] {
 29734  			break
 29735  		}
 29736  		if mem != x4.Args[1] {
 29737  			break
 29738  		}
 29739  		o2 := o3.Args[1]
 29740  		if o2.Op != OpPPC64OR {
 29741  			break
 29742  		}
 29743  		if o2.Type != t {
 29744  			break
 29745  		}
 29746  		_ = o2.Args[1]
 29747  		o1 := o2.Args[0]
 29748  		if o1.Op != OpPPC64OR {
 29749  			break
 29750  		}
 29751  		if o1.Type != t {
 29752  			break
 29753  		}
 29754  		_ = o1.Args[1]
 29755  		o0 := o1.Args[0]
 29756  		if o0.Op != OpPPC64OR {
 29757  			break
 29758  		}
 29759  		if o0.Type != t {
 29760  			break
 29761  		}
 29762  		_ = o0.Args[1]
 29763  		s0 := o0.Args[0]
 29764  		if s0.Op != OpPPC64SLDconst {
 29765  			break
 29766  		}
 29767  		if s0.AuxInt != 8 {
 29768  			break
 29769  		}
 29770  		x1 := s0.Args[0]
 29771  		if x1.Op != OpPPC64MOVBZload {
 29772  			break
 29773  		}
 29774  		i1 := x1.AuxInt
 29775  		if x1.Aux != s {
 29776  			break
 29777  		}
 29778  		_ = x1.Args[1]
 29779  		if p != x1.Args[0] {
 29780  			break
 29781  		}
 29782  		if mem != x1.Args[1] {
 29783  			break
 29784  		}
 29785  		x0 := o0.Args[1]
 29786  		if x0.Op != OpPPC64MOVBZload {
 29787  			break
 29788  		}
 29789  		i0 := x0.AuxInt
 29790  		if x0.Aux != s {
 29791  			break
 29792  		}
 29793  		_ = x0.Args[1]
 29794  		if p != x0.Args[0] {
 29795  			break
 29796  		}
 29797  		if mem != x0.Args[1] {
 29798  			break
 29799  		}
 29800  		s1 := o1.Args[1]
 29801  		if s1.Op != OpPPC64SLDconst {
 29802  			break
 29803  		}
 29804  		if s1.AuxInt != 16 {
 29805  			break
 29806  		}
 29807  		x2 := s1.Args[0]
 29808  		if x2.Op != OpPPC64MOVBZload {
 29809  			break
 29810  		}
 29811  		i2 := x2.AuxInt
 29812  		if x2.Aux != s {
 29813  			break
 29814  		}
 29815  		_ = x2.Args[1]
 29816  		if p != x2.Args[0] {
 29817  			break
 29818  		}
 29819  		if mem != x2.Args[1] {
 29820  			break
 29821  		}
 29822  		s2 := o2.Args[1]
 29823  		if s2.Op != OpPPC64SLDconst {
 29824  			break
 29825  		}
 29826  		if s2.AuxInt != 24 {
 29827  			break
 29828  		}
 29829  		x3 := s2.Args[0]
 29830  		if x3.Op != OpPPC64MOVBZload {
 29831  			break
 29832  		}
 29833  		i3 := x3.AuxInt
 29834  		if x3.Aux != s {
 29835  			break
 29836  		}
 29837  		_ = x3.Args[1]
 29838  		if p != x3.Args[0] {
 29839  			break
 29840  		}
 29841  		if mem != x3.Args[1] {
 29842  			break
 29843  		}
 29844  		s4 := o4.Args[1]
 29845  		if s4.Op != OpPPC64SLDconst {
 29846  			break
 29847  		}
 29848  		if s4.AuxInt != 40 {
 29849  			break
 29850  		}
 29851  		x5 := s4.Args[0]
 29852  		if x5.Op != OpPPC64MOVBZload {
 29853  			break
 29854  		}
 29855  		i5 := x5.AuxInt
 29856  		if x5.Aux != s {
 29857  			break
 29858  		}
 29859  		_ = x5.Args[1]
 29860  		if p != x5.Args[0] {
 29861  			break
 29862  		}
 29863  		if mem != x5.Args[1] {
 29864  			break
 29865  		}
 29866  		s6 := v.Args[1]
 29867  		if s6.Op != OpPPC64SLDconst {
 29868  			break
 29869  		}
 29870  		if s6.AuxInt != 56 {
 29871  			break
 29872  		}
 29873  		x7 := s6.Args[0]
 29874  		if x7.Op != OpPPC64MOVBZload {
 29875  			break
 29876  		}
 29877  		i7 := x7.AuxInt
 29878  		if x7.Aux != s {
 29879  			break
 29880  		}
 29881  		_ = x7.Args[1]
 29882  		if p != x7.Args[0] {
 29883  			break
 29884  		}
 29885  		if mem != x7.Args[1] {
 29886  			break
 29887  		}
 29888  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 29889  			break
 29890  		}
 29891  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 29892  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 29893  		v.reset(OpCopy)
 29894  		v.AddArg(v0)
 29895  		v0.AuxInt = i0
 29896  		v0.Aux = s
 29897  		v0.AddArg(p)
 29898  		v0.AddArg(mem)
 29899  		return true
 29900  	}
 29901  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 29902  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 29903  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 29904  	for {
 29905  		t := v.Type
 29906  		_ = v.Args[1]
 29907  		o5 := v.Args[0]
 29908  		if o5.Op != OpPPC64OR {
 29909  			break
 29910  		}
 29911  		if o5.Type != t {
 29912  			break
 29913  		}
 29914  		_ = o5.Args[1]
 29915  		s5 := o5.Args[0]
 29916  		if s5.Op != OpPPC64SLDconst {
 29917  			break
 29918  		}
 29919  		if s5.AuxInt != 48 {
 29920  			break
 29921  		}
 29922  		x6 := s5.Args[0]
 29923  		if x6.Op != OpPPC64MOVBZload {
 29924  			break
 29925  		}
 29926  		i6 := x6.AuxInt
 29927  		s := x6.Aux
 29928  		_ = x6.Args[1]
 29929  		p := x6.Args[0]
 29930  		mem := x6.Args[1]
 29931  		o4 := o5.Args[1]
 29932  		if o4.Op != OpPPC64OR {
 29933  			break
 29934  		}
 29935  		if o4.Type != t {
 29936  			break
 29937  		}
 29938  		_ = o4.Args[1]
 29939  		o3 := o4.Args[0]
 29940  		if o3.Op != OpPPC64OR {
 29941  			break
 29942  		}
 29943  		if o3.Type != t {
 29944  			break
 29945  		}
 29946  		_ = o3.Args[1]
 29947  		s3 := o3.Args[0]
 29948  		if s3.Op != OpPPC64SLDconst {
 29949  			break
 29950  		}
 29951  		if s3.AuxInt != 32 {
 29952  			break
 29953  		}
 29954  		x4 := s3.Args[0]
 29955  		if x4.Op != OpPPC64MOVBZload {
 29956  			break
 29957  		}
 29958  		i4 := x4.AuxInt
 29959  		if x4.Aux != s {
 29960  			break
 29961  		}
 29962  		_ = x4.Args[1]
 29963  		if p != x4.Args[0] {
 29964  			break
 29965  		}
 29966  		if mem != x4.Args[1] {
 29967  			break
 29968  		}
 29969  		o2 := o3.Args[1]
 29970  		if o2.Op != OpPPC64OR {
 29971  			break
 29972  		}
 29973  		if o2.Type != t {
 29974  			break
 29975  		}
 29976  		_ = o2.Args[1]
 29977  		o1 := o2.Args[0]
 29978  		if o1.Op != OpPPC64OR {
 29979  			break
 29980  		}
 29981  		if o1.Type != t {
 29982  			break
 29983  		}
 29984  		_ = o1.Args[1]
 29985  		o0 := o1.Args[0]
 29986  		if o0.Op != OpPPC64OR {
 29987  			break
 29988  		}
 29989  		if o0.Type != t {
 29990  			break
 29991  		}
 29992  		_ = o0.Args[1]
 29993  		x0 := o0.Args[0]
 29994  		if x0.Op != OpPPC64MOVBZload {
 29995  			break
 29996  		}
 29997  		i0 := x0.AuxInt
 29998  		if x0.Aux != s {
 29999  			break
 30000  		}
 30001  		_ = x0.Args[1]
 30002  		if p != x0.Args[0] {
 30003  			break
 30004  		}
 30005  		if mem != x0.Args[1] {
 30006  			break
 30007  		}
 30008  		s0 := o0.Args[1]
 30009  		if s0.Op != OpPPC64SLDconst {
 30010  			break
 30011  		}
 30012  		if s0.AuxInt != 8 {
 30013  			break
 30014  		}
 30015  		x1 := s0.Args[0]
 30016  		if x1.Op != OpPPC64MOVBZload {
 30017  			break
 30018  		}
 30019  		i1 := x1.AuxInt
 30020  		if x1.Aux != s {
 30021  			break
 30022  		}
 30023  		_ = x1.Args[1]
 30024  		if p != x1.Args[0] {
 30025  			break
 30026  		}
 30027  		if mem != x1.Args[1] {
 30028  			break
 30029  		}
 30030  		s1 := o1.Args[1]
 30031  		if s1.Op != OpPPC64SLDconst {
 30032  			break
 30033  		}
 30034  		if s1.AuxInt != 16 {
 30035  			break
 30036  		}
 30037  		x2 := s1.Args[0]
 30038  		if x2.Op != OpPPC64MOVBZload {
 30039  			break
 30040  		}
 30041  		i2 := x2.AuxInt
 30042  		if x2.Aux != s {
 30043  			break
 30044  		}
 30045  		_ = x2.Args[1]
 30046  		if p != x2.Args[0] {
 30047  			break
 30048  		}
 30049  		if mem != x2.Args[1] {
 30050  			break
 30051  		}
 30052  		s2 := o2.Args[1]
 30053  		if s2.Op != OpPPC64SLDconst {
 30054  			break
 30055  		}
 30056  		if s2.AuxInt != 24 {
 30057  			break
 30058  		}
 30059  		x3 := s2.Args[0]
 30060  		if x3.Op != OpPPC64MOVBZload {
 30061  			break
 30062  		}
 30063  		i3 := x3.AuxInt
 30064  		if x3.Aux != s {
 30065  			break
 30066  		}
 30067  		_ = x3.Args[1]
 30068  		if p != x3.Args[0] {
 30069  			break
 30070  		}
 30071  		if mem != x3.Args[1] {
 30072  			break
 30073  		}
 30074  		s4 := o4.Args[1]
 30075  		if s4.Op != OpPPC64SLDconst {
 30076  			break
 30077  		}
 30078  		if s4.AuxInt != 40 {
 30079  			break
 30080  		}
 30081  		x5 := s4.Args[0]
 30082  		if x5.Op != OpPPC64MOVBZload {
 30083  			break
 30084  		}
 30085  		i5 := x5.AuxInt
 30086  		if x5.Aux != s {
 30087  			break
 30088  		}
 30089  		_ = x5.Args[1]
 30090  		if p != x5.Args[0] {
 30091  			break
 30092  		}
 30093  		if mem != x5.Args[1] {
 30094  			break
 30095  		}
 30096  		s6 := v.Args[1]
 30097  		if s6.Op != OpPPC64SLDconst {
 30098  			break
 30099  		}
 30100  		if s6.AuxInt != 56 {
 30101  			break
 30102  		}
 30103  		x7 := s6.Args[0]
 30104  		if x7.Op != OpPPC64MOVBZload {
 30105  			break
 30106  		}
 30107  		i7 := x7.AuxInt
 30108  		if x7.Aux != s {
 30109  			break
 30110  		}
 30111  		_ = x7.Args[1]
 30112  		if p != x7.Args[0] {
 30113  			break
 30114  		}
 30115  		if mem != x7.Args[1] {
 30116  			break
 30117  		}
 30118  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 30119  			break
 30120  		}
 30121  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 30122  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 30123  		v.reset(OpCopy)
 30124  		v.AddArg(v0)
 30125  		v0.AuxInt = i0
 30126  		v0.Aux = s
 30127  		v0.AddArg(p)
 30128  		v0.AddArg(mem)
 30129  		return true
 30130  	}
 30131  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 30132  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 30133  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 30134  	for {
 30135  		t := v.Type
 30136  		_ = v.Args[1]
 30137  		o5 := v.Args[0]
 30138  		if o5.Op != OpPPC64OR {
 30139  			break
 30140  		}
 30141  		if o5.Type != t {
 30142  			break
 30143  		}
 30144  		_ = o5.Args[1]
 30145  		s5 := o5.Args[0]
 30146  		if s5.Op != OpPPC64SLDconst {
 30147  			break
 30148  		}
 30149  		if s5.AuxInt != 48 {
 30150  			break
 30151  		}
 30152  		x6 := s5.Args[0]
 30153  		if x6.Op != OpPPC64MOVBZload {
 30154  			break
 30155  		}
 30156  		i6 := x6.AuxInt
 30157  		s := x6.Aux
 30158  		_ = x6.Args[1]
 30159  		p := x6.Args[0]
 30160  		mem := x6.Args[1]
 30161  		o4 := o5.Args[1]
 30162  		if o4.Op != OpPPC64OR {
 30163  			break
 30164  		}
 30165  		if o4.Type != t {
 30166  			break
 30167  		}
 30168  		_ = o4.Args[1]
 30169  		o3 := o4.Args[0]
 30170  		if o3.Op != OpPPC64OR {
 30171  			break
 30172  		}
 30173  		if o3.Type != t {
 30174  			break
 30175  		}
 30176  		_ = o3.Args[1]
 30177  		o2 := o3.Args[0]
 30178  		if o2.Op != OpPPC64OR {
 30179  			break
 30180  		}
 30181  		if o2.Type != t {
 30182  			break
 30183  		}
 30184  		_ = o2.Args[1]
 30185  		s2 := o2.Args[0]
 30186  		if s2.Op != OpPPC64SLDconst {
 30187  			break
 30188  		}
 30189  		if s2.AuxInt != 24 {
 30190  			break
 30191  		}
 30192  		x3 := s2.Args[0]
 30193  		if x3.Op != OpPPC64MOVBZload {
 30194  			break
 30195  		}
 30196  		i3 := x3.AuxInt
 30197  		if x3.Aux != s {
 30198  			break
 30199  		}
 30200  		_ = x3.Args[1]
 30201  		if p != x3.Args[0] {
 30202  			break
 30203  		}
 30204  		if mem != x3.Args[1] {
 30205  			break
 30206  		}
 30207  		o1 := o2.Args[1]
 30208  		if o1.Op != OpPPC64OR {
 30209  			break
 30210  		}
 30211  		if o1.Type != t {
 30212  			break
 30213  		}
 30214  		_ = o1.Args[1]
 30215  		s1 := o1.Args[0]
 30216  		if s1.Op != OpPPC64SLDconst {
 30217  			break
 30218  		}
 30219  		if s1.AuxInt != 16 {
 30220  			break
 30221  		}
 30222  		x2 := s1.Args[0]
 30223  		if x2.Op != OpPPC64MOVBZload {
 30224  			break
 30225  		}
 30226  		i2 := x2.AuxInt
 30227  		if x2.Aux != s {
 30228  			break
 30229  		}
 30230  		_ = x2.Args[1]
 30231  		if p != x2.Args[0] {
 30232  			break
 30233  		}
 30234  		if mem != x2.Args[1] {
 30235  			break
 30236  		}
 30237  		o0 := o1.Args[1]
 30238  		if o0.Op != OpPPC64OR {
 30239  			break
 30240  		}
 30241  		if o0.Type != t {
 30242  			break
 30243  		}
 30244  		_ = o0.Args[1]
 30245  		s0 := o0.Args[0]
 30246  		if s0.Op != OpPPC64SLDconst {
 30247  			break
 30248  		}
 30249  		if s0.AuxInt != 8 {
 30250  			break
 30251  		}
 30252  		x1 := s0.Args[0]
 30253  		if x1.Op != OpPPC64MOVBZload {
 30254  			break
 30255  		}
 30256  		i1 := x1.AuxInt
 30257  		if x1.Aux != s {
 30258  			break
 30259  		}
 30260  		_ = x1.Args[1]
 30261  		if p != x1.Args[0] {
 30262  			break
 30263  		}
 30264  		if mem != x1.Args[1] {
 30265  			break
 30266  		}
 30267  		x0 := o0.Args[1]
 30268  		if x0.Op != OpPPC64MOVBZload {
 30269  			break
 30270  		}
 30271  		i0 := x0.AuxInt
 30272  		if x0.Aux != s {
 30273  			break
 30274  		}
 30275  		_ = x0.Args[1]
 30276  		if p != x0.Args[0] {
 30277  			break
 30278  		}
 30279  		if mem != x0.Args[1] {
 30280  			break
 30281  		}
 30282  		s3 := o3.Args[1]
 30283  		if s3.Op != OpPPC64SLDconst {
 30284  			break
 30285  		}
 30286  		if s3.AuxInt != 32 {
 30287  			break
 30288  		}
 30289  		x4 := s3.Args[0]
 30290  		if x4.Op != OpPPC64MOVBZload {
 30291  			break
 30292  		}
 30293  		i4 := x4.AuxInt
 30294  		if x4.Aux != s {
 30295  			break
 30296  		}
 30297  		_ = x4.Args[1]
 30298  		if p != x4.Args[0] {
 30299  			break
 30300  		}
 30301  		if mem != x4.Args[1] {
 30302  			break
 30303  		}
 30304  		s4 := o4.Args[1]
 30305  		if s4.Op != OpPPC64SLDconst {
 30306  			break
 30307  		}
 30308  		if s4.AuxInt != 40 {
 30309  			break
 30310  		}
 30311  		x5 := s4.Args[0]
 30312  		if x5.Op != OpPPC64MOVBZload {
 30313  			break
 30314  		}
 30315  		i5 := x5.AuxInt
 30316  		if x5.Aux != s {
 30317  			break
 30318  		}
 30319  		_ = x5.Args[1]
 30320  		if p != x5.Args[0] {
 30321  			break
 30322  		}
 30323  		if mem != x5.Args[1] {
 30324  			break
 30325  		}
 30326  		s6 := v.Args[1]
 30327  		if s6.Op != OpPPC64SLDconst {
 30328  			break
 30329  		}
 30330  		if s6.AuxInt != 56 {
 30331  			break
 30332  		}
 30333  		x7 := s6.Args[0]
 30334  		if x7.Op != OpPPC64MOVBZload {
 30335  			break
 30336  		}
 30337  		i7 := x7.AuxInt
 30338  		if x7.Aux != s {
 30339  			break
 30340  		}
 30341  		_ = x7.Args[1]
 30342  		if p != x7.Args[0] {
 30343  			break
 30344  		}
 30345  		if mem != x7.Args[1] {
 30346  			break
 30347  		}
 30348  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 30349  			break
 30350  		}
 30351  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 30352  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 30353  		v.reset(OpCopy)
 30354  		v.AddArg(v0)
 30355  		v0.AuxInt = i0
 30356  		v0.Aux = s
 30357  		v0.AddArg(p)
 30358  		v0.AddArg(mem)
 30359  		return true
 30360  	}
 30361  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 30362  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 30363  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 30364  	for {
 30365  		t := v.Type
 30366  		_ = v.Args[1]
 30367  		o5 := v.Args[0]
 30368  		if o5.Op != OpPPC64OR {
 30369  			break
 30370  		}
 30371  		if o5.Type != t {
 30372  			break
 30373  		}
 30374  		_ = o5.Args[1]
 30375  		s5 := o5.Args[0]
 30376  		if s5.Op != OpPPC64SLDconst {
 30377  			break
 30378  		}
 30379  		if s5.AuxInt != 48 {
 30380  			break
 30381  		}
 30382  		x6 := s5.Args[0]
 30383  		if x6.Op != OpPPC64MOVBZload {
 30384  			break
 30385  		}
 30386  		i6 := x6.AuxInt
 30387  		s := x6.Aux
 30388  		_ = x6.Args[1]
 30389  		p := x6.Args[0]
 30390  		mem := x6.Args[1]
 30391  		o4 := o5.Args[1]
 30392  		if o4.Op != OpPPC64OR {
 30393  			break
 30394  		}
 30395  		if o4.Type != t {
 30396  			break
 30397  		}
 30398  		_ = o4.Args[1]
 30399  		o3 := o4.Args[0]
 30400  		if o3.Op != OpPPC64OR {
 30401  			break
 30402  		}
 30403  		if o3.Type != t {
 30404  			break
 30405  		}
 30406  		_ = o3.Args[1]
 30407  		o2 := o3.Args[0]
 30408  		if o2.Op != OpPPC64OR {
 30409  			break
 30410  		}
 30411  		if o2.Type != t {
 30412  			break
 30413  		}
 30414  		_ = o2.Args[1]
 30415  		s2 := o2.Args[0]
 30416  		if s2.Op != OpPPC64SLDconst {
 30417  			break
 30418  		}
 30419  		if s2.AuxInt != 24 {
 30420  			break
 30421  		}
 30422  		x3 := s2.Args[0]
 30423  		if x3.Op != OpPPC64MOVBZload {
 30424  			break
 30425  		}
 30426  		i3 := x3.AuxInt
 30427  		if x3.Aux != s {
 30428  			break
 30429  		}
 30430  		_ = x3.Args[1]
 30431  		if p != x3.Args[0] {
 30432  			break
 30433  		}
 30434  		if mem != x3.Args[1] {
 30435  			break
 30436  		}
 30437  		o1 := o2.Args[1]
 30438  		if o1.Op != OpPPC64OR {
 30439  			break
 30440  		}
 30441  		if o1.Type != t {
 30442  			break
 30443  		}
 30444  		_ = o1.Args[1]
 30445  		s1 := o1.Args[0]
 30446  		if s1.Op != OpPPC64SLDconst {
 30447  			break
 30448  		}
 30449  		if s1.AuxInt != 16 {
 30450  			break
 30451  		}
 30452  		x2 := s1.Args[0]
 30453  		if x2.Op != OpPPC64MOVBZload {
 30454  			break
 30455  		}
 30456  		i2 := x2.AuxInt
 30457  		if x2.Aux != s {
 30458  			break
 30459  		}
 30460  		_ = x2.Args[1]
 30461  		if p != x2.Args[0] {
 30462  			break
 30463  		}
 30464  		if mem != x2.Args[1] {
 30465  			break
 30466  		}
 30467  		o0 := o1.Args[1]
 30468  		if o0.Op != OpPPC64OR {
 30469  			break
 30470  		}
 30471  		if o0.Type != t {
 30472  			break
 30473  		}
 30474  		_ = o0.Args[1]
 30475  		x0 := o0.Args[0]
 30476  		if x0.Op != OpPPC64MOVBZload {
 30477  			break
 30478  		}
 30479  		i0 := x0.AuxInt
 30480  		if x0.Aux != s {
 30481  			break
 30482  		}
 30483  		_ = x0.Args[1]
 30484  		if p != x0.Args[0] {
 30485  			break
 30486  		}
 30487  		if mem != x0.Args[1] {
 30488  			break
 30489  		}
 30490  		s0 := o0.Args[1]
 30491  		if s0.Op != OpPPC64SLDconst {
 30492  			break
 30493  		}
 30494  		if s0.AuxInt != 8 {
 30495  			break
 30496  		}
 30497  		x1 := s0.Args[0]
 30498  		if x1.Op != OpPPC64MOVBZload {
 30499  			break
 30500  		}
 30501  		i1 := x1.AuxInt
 30502  		if x1.Aux != s {
 30503  			break
 30504  		}
 30505  		_ = x1.Args[1]
 30506  		if p != x1.Args[0] {
 30507  			break
 30508  		}
 30509  		if mem != x1.Args[1] {
 30510  			break
 30511  		}
 30512  		s3 := o3.Args[1]
 30513  		if s3.Op != OpPPC64SLDconst {
 30514  			break
 30515  		}
 30516  		if s3.AuxInt != 32 {
 30517  			break
 30518  		}
 30519  		x4 := s3.Args[0]
 30520  		if x4.Op != OpPPC64MOVBZload {
 30521  			break
 30522  		}
 30523  		i4 := x4.AuxInt
 30524  		if x4.Aux != s {
 30525  			break
 30526  		}
 30527  		_ = x4.Args[1]
 30528  		if p != x4.Args[0] {
 30529  			break
 30530  		}
 30531  		if mem != x4.Args[1] {
 30532  			break
 30533  		}
 30534  		s4 := o4.Args[1]
 30535  		if s4.Op != OpPPC64SLDconst {
 30536  			break
 30537  		}
 30538  		if s4.AuxInt != 40 {
 30539  			break
 30540  		}
 30541  		x5 := s4.Args[0]
 30542  		if x5.Op != OpPPC64MOVBZload {
 30543  			break
 30544  		}
 30545  		i5 := x5.AuxInt
 30546  		if x5.Aux != s {
 30547  			break
 30548  		}
 30549  		_ = x5.Args[1]
 30550  		if p != x5.Args[0] {
 30551  			break
 30552  		}
 30553  		if mem != x5.Args[1] {
 30554  			break
 30555  		}
 30556  		s6 := v.Args[1]
 30557  		if s6.Op != OpPPC64SLDconst {
 30558  			break
 30559  		}
 30560  		if s6.AuxInt != 56 {
 30561  			break
 30562  		}
 30563  		x7 := s6.Args[0]
 30564  		if x7.Op != OpPPC64MOVBZload {
 30565  			break
 30566  		}
 30567  		i7 := x7.AuxInt
 30568  		if x7.Aux != s {
 30569  			break
 30570  		}
 30571  		_ = x7.Args[1]
 30572  		if p != x7.Args[0] {
 30573  			break
 30574  		}
 30575  		if mem != x7.Args[1] {
 30576  			break
 30577  		}
 30578  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 30579  			break
 30580  		}
 30581  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 30582  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 30583  		v.reset(OpCopy)
 30584  		v.AddArg(v0)
 30585  		v0.AuxInt = i0
 30586  		v0.Aux = s
 30587  		v0.AddArg(p)
 30588  		v0.AddArg(mem)
 30589  		return true
 30590  	}
 30591  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 30592  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 30593  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 30594  	for {
 30595  		t := v.Type
 30596  		_ = v.Args[1]
 30597  		o5 := v.Args[0]
 30598  		if o5.Op != OpPPC64OR {
 30599  			break
 30600  		}
 30601  		if o5.Type != t {
 30602  			break
 30603  		}
 30604  		_ = o5.Args[1]
 30605  		s5 := o5.Args[0]
 30606  		if s5.Op != OpPPC64SLDconst {
 30607  			break
 30608  		}
 30609  		if s5.AuxInt != 48 {
 30610  			break
 30611  		}
 30612  		x6 := s5.Args[0]
 30613  		if x6.Op != OpPPC64MOVBZload {
 30614  			break
 30615  		}
 30616  		i6 := x6.AuxInt
 30617  		s := x6.Aux
 30618  		_ = x6.Args[1]
 30619  		p := x6.Args[0]
 30620  		mem := x6.Args[1]
 30621  		o4 := o5.Args[1]
 30622  		if o4.Op != OpPPC64OR {
 30623  			break
 30624  		}
 30625  		if o4.Type != t {
 30626  			break
 30627  		}
 30628  		_ = o4.Args[1]
 30629  		o3 := o4.Args[0]
 30630  		if o3.Op != OpPPC64OR {
 30631  			break
 30632  		}
 30633  		if o3.Type != t {
 30634  			break
 30635  		}
 30636  		_ = o3.Args[1]
 30637  		o2 := o3.Args[0]
 30638  		if o2.Op != OpPPC64OR {
 30639  			break
 30640  		}
 30641  		if o2.Type != t {
 30642  			break
 30643  		}
 30644  		_ = o2.Args[1]
 30645  		s2 := o2.Args[0]
 30646  		if s2.Op != OpPPC64SLDconst {
 30647  			break
 30648  		}
 30649  		if s2.AuxInt != 24 {
 30650  			break
 30651  		}
 30652  		x3 := s2.Args[0]
 30653  		if x3.Op != OpPPC64MOVBZload {
 30654  			break
 30655  		}
 30656  		i3 := x3.AuxInt
 30657  		if x3.Aux != s {
 30658  			break
 30659  		}
 30660  		_ = x3.Args[1]
 30661  		if p != x3.Args[0] {
 30662  			break
 30663  		}
 30664  		if mem != x3.Args[1] {
 30665  			break
 30666  		}
 30667  		o1 := o2.Args[1]
 30668  		if o1.Op != OpPPC64OR {
 30669  			break
 30670  		}
 30671  		if o1.Type != t {
 30672  			break
 30673  		}
 30674  		_ = o1.Args[1]
 30675  		o0 := o1.Args[0]
 30676  		if o0.Op != OpPPC64OR {
 30677  			break
 30678  		}
 30679  		if o0.Type != t {
 30680  			break
 30681  		}
 30682  		_ = o0.Args[1]
 30683  		s0 := o0.Args[0]
 30684  		if s0.Op != OpPPC64SLDconst {
 30685  			break
 30686  		}
 30687  		if s0.AuxInt != 8 {
 30688  			break
 30689  		}
 30690  		x1 := s0.Args[0]
 30691  		if x1.Op != OpPPC64MOVBZload {
 30692  			break
 30693  		}
 30694  		i1 := x1.AuxInt
 30695  		if x1.Aux != s {
 30696  			break
 30697  		}
 30698  		_ = x1.Args[1]
 30699  		if p != x1.Args[0] {
 30700  			break
 30701  		}
 30702  		if mem != x1.Args[1] {
 30703  			break
 30704  		}
 30705  		x0 := o0.Args[1]
 30706  		if x0.Op != OpPPC64MOVBZload {
 30707  			break
 30708  		}
 30709  		i0 := x0.AuxInt
 30710  		if x0.Aux != s {
 30711  			break
 30712  		}
 30713  		_ = x0.Args[1]
 30714  		if p != x0.Args[0] {
 30715  			break
 30716  		}
 30717  		if mem != x0.Args[1] {
 30718  			break
 30719  		}
 30720  		s1 := o1.Args[1]
 30721  		if s1.Op != OpPPC64SLDconst {
 30722  			break
 30723  		}
 30724  		if s1.AuxInt != 16 {
 30725  			break
 30726  		}
 30727  		x2 := s1.Args[0]
 30728  		if x2.Op != OpPPC64MOVBZload {
 30729  			break
 30730  		}
 30731  		i2 := x2.AuxInt
 30732  		if x2.Aux != s {
 30733  			break
 30734  		}
 30735  		_ = x2.Args[1]
 30736  		if p != x2.Args[0] {
 30737  			break
 30738  		}
 30739  		if mem != x2.Args[1] {
 30740  			break
 30741  		}
 30742  		s3 := o3.Args[1]
 30743  		if s3.Op != OpPPC64SLDconst {
 30744  			break
 30745  		}
 30746  		if s3.AuxInt != 32 {
 30747  			break
 30748  		}
 30749  		x4 := s3.Args[0]
 30750  		if x4.Op != OpPPC64MOVBZload {
 30751  			break
 30752  		}
 30753  		i4 := x4.AuxInt
 30754  		if x4.Aux != s {
 30755  			break
 30756  		}
 30757  		_ = x4.Args[1]
 30758  		if p != x4.Args[0] {
 30759  			break
 30760  		}
 30761  		if mem != x4.Args[1] {
 30762  			break
 30763  		}
 30764  		s4 := o4.Args[1]
 30765  		if s4.Op != OpPPC64SLDconst {
 30766  			break
 30767  		}
 30768  		if s4.AuxInt != 40 {
 30769  			break
 30770  		}
 30771  		x5 := s4.Args[0]
 30772  		if x5.Op != OpPPC64MOVBZload {
 30773  			break
 30774  		}
 30775  		i5 := x5.AuxInt
 30776  		if x5.Aux != s {
 30777  			break
 30778  		}
 30779  		_ = x5.Args[1]
 30780  		if p != x5.Args[0] {
 30781  			break
 30782  		}
 30783  		if mem != x5.Args[1] {
 30784  			break
 30785  		}
 30786  		s6 := v.Args[1]
 30787  		if s6.Op != OpPPC64SLDconst {
 30788  			break
 30789  		}
 30790  		if s6.AuxInt != 56 {
 30791  			break
 30792  		}
 30793  		x7 := s6.Args[0]
 30794  		if x7.Op != OpPPC64MOVBZload {
 30795  			break
 30796  		}
 30797  		i7 := x7.AuxInt
 30798  		if x7.Aux != s {
 30799  			break
 30800  		}
 30801  		_ = x7.Args[1]
 30802  		if p != x7.Args[0] {
 30803  			break
 30804  		}
 30805  		if mem != x7.Args[1] {
 30806  			break
 30807  		}
 30808  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 30809  			break
 30810  		}
 30811  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 30812  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 30813  		v.reset(OpCopy)
 30814  		v.AddArg(v0)
 30815  		v0.AuxInt = i0
 30816  		v0.Aux = s
 30817  		v0.AddArg(p)
 30818  		v0.AddArg(mem)
 30819  		return true
 30820  	}
 30821  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 30822  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 30823  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 30824  	for {
 30825  		t := v.Type
 30826  		_ = v.Args[1]
 30827  		o5 := v.Args[0]
 30828  		if o5.Op != OpPPC64OR {
 30829  			break
 30830  		}
 30831  		if o5.Type != t {
 30832  			break
 30833  		}
 30834  		_ = o5.Args[1]
 30835  		s5 := o5.Args[0]
 30836  		if s5.Op != OpPPC64SLDconst {
 30837  			break
 30838  		}
 30839  		if s5.AuxInt != 48 {
 30840  			break
 30841  		}
 30842  		x6 := s5.Args[0]
 30843  		if x6.Op != OpPPC64MOVBZload {
 30844  			break
 30845  		}
 30846  		i6 := x6.AuxInt
 30847  		s := x6.Aux
 30848  		_ = x6.Args[1]
 30849  		p := x6.Args[0]
 30850  		mem := x6.Args[1]
 30851  		o4 := o5.Args[1]
 30852  		if o4.Op != OpPPC64OR {
 30853  			break
 30854  		}
 30855  		if o4.Type != t {
 30856  			break
 30857  		}
 30858  		_ = o4.Args[1]
 30859  		o3 := o4.Args[0]
 30860  		if o3.Op != OpPPC64OR {
 30861  			break
 30862  		}
 30863  		if o3.Type != t {
 30864  			break
 30865  		}
 30866  		_ = o3.Args[1]
 30867  		o2 := o3.Args[0]
 30868  		if o2.Op != OpPPC64OR {
 30869  			break
 30870  		}
 30871  		if o2.Type != t {
 30872  			break
 30873  		}
 30874  		_ = o2.Args[1]
 30875  		s2 := o2.Args[0]
 30876  		if s2.Op != OpPPC64SLDconst {
 30877  			break
 30878  		}
 30879  		if s2.AuxInt != 24 {
 30880  			break
 30881  		}
 30882  		x3 := s2.Args[0]
 30883  		if x3.Op != OpPPC64MOVBZload {
 30884  			break
 30885  		}
 30886  		i3 := x3.AuxInt
 30887  		if x3.Aux != s {
 30888  			break
 30889  		}
 30890  		_ = x3.Args[1]
 30891  		if p != x3.Args[0] {
 30892  			break
 30893  		}
 30894  		if mem != x3.Args[1] {
 30895  			break
 30896  		}
 30897  		o1 := o2.Args[1]
 30898  		if o1.Op != OpPPC64OR {
 30899  			break
 30900  		}
 30901  		if o1.Type != t {
 30902  			break
 30903  		}
 30904  		_ = o1.Args[1]
 30905  		o0 := o1.Args[0]
 30906  		if o0.Op != OpPPC64OR {
 30907  			break
 30908  		}
 30909  		if o0.Type != t {
 30910  			break
 30911  		}
 30912  		_ = o0.Args[1]
 30913  		x0 := o0.Args[0]
 30914  		if x0.Op != OpPPC64MOVBZload {
 30915  			break
 30916  		}
 30917  		i0 := x0.AuxInt
 30918  		if x0.Aux != s {
 30919  			break
 30920  		}
 30921  		_ = x0.Args[1]
 30922  		if p != x0.Args[0] {
 30923  			break
 30924  		}
 30925  		if mem != x0.Args[1] {
 30926  			break
 30927  		}
 30928  		s0 := o0.Args[1]
 30929  		if s0.Op != OpPPC64SLDconst {
 30930  			break
 30931  		}
 30932  		if s0.AuxInt != 8 {
 30933  			break
 30934  		}
 30935  		x1 := s0.Args[0]
 30936  		if x1.Op != OpPPC64MOVBZload {
 30937  			break
 30938  		}
 30939  		i1 := x1.AuxInt
 30940  		if x1.Aux != s {
 30941  			break
 30942  		}
 30943  		_ = x1.Args[1]
 30944  		if p != x1.Args[0] {
 30945  			break
 30946  		}
 30947  		if mem != x1.Args[1] {
 30948  			break
 30949  		}
 30950  		s1 := o1.Args[1]
 30951  		if s1.Op != OpPPC64SLDconst {
 30952  			break
 30953  		}
 30954  		if s1.AuxInt != 16 {
 30955  			break
 30956  		}
 30957  		x2 := s1.Args[0]
 30958  		if x2.Op != OpPPC64MOVBZload {
 30959  			break
 30960  		}
 30961  		i2 := x2.AuxInt
 30962  		if x2.Aux != s {
 30963  			break
 30964  		}
 30965  		_ = x2.Args[1]
 30966  		if p != x2.Args[0] {
 30967  			break
 30968  		}
 30969  		if mem != x2.Args[1] {
 30970  			break
 30971  		}
 30972  		s3 := o3.Args[1]
 30973  		if s3.Op != OpPPC64SLDconst {
 30974  			break
 30975  		}
 30976  		if s3.AuxInt != 32 {
 30977  			break
 30978  		}
 30979  		x4 := s3.Args[0]
 30980  		if x4.Op != OpPPC64MOVBZload {
 30981  			break
 30982  		}
 30983  		i4 := x4.AuxInt
 30984  		if x4.Aux != s {
 30985  			break
 30986  		}
 30987  		_ = x4.Args[1]
 30988  		if p != x4.Args[0] {
 30989  			break
 30990  		}
 30991  		if mem != x4.Args[1] {
 30992  			break
 30993  		}
 30994  		s4 := o4.Args[1]
 30995  		if s4.Op != OpPPC64SLDconst {
 30996  			break
 30997  		}
 30998  		if s4.AuxInt != 40 {
 30999  			break
 31000  		}
 31001  		x5 := s4.Args[0]
 31002  		if x5.Op != OpPPC64MOVBZload {
 31003  			break
 31004  		}
 31005  		i5 := x5.AuxInt
 31006  		if x5.Aux != s {
 31007  			break
 31008  		}
 31009  		_ = x5.Args[1]
 31010  		if p != x5.Args[0] {
 31011  			break
 31012  		}
 31013  		if mem != x5.Args[1] {
 31014  			break
 31015  		}
 31016  		s6 := v.Args[1]
 31017  		if s6.Op != OpPPC64SLDconst {
 31018  			break
 31019  		}
 31020  		if s6.AuxInt != 56 {
 31021  			break
 31022  		}
 31023  		x7 := s6.Args[0]
 31024  		if x7.Op != OpPPC64MOVBZload {
 31025  			break
 31026  		}
 31027  		i7 := x7.AuxInt
 31028  		if x7.Aux != s {
 31029  			break
 31030  		}
 31031  		_ = x7.Args[1]
 31032  		if p != x7.Args[0] {
 31033  			break
 31034  		}
 31035  		if mem != x7.Args[1] {
 31036  			break
 31037  		}
 31038  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31039  			break
 31040  		}
 31041  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31042  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31043  		v.reset(OpCopy)
 31044  		v.AddArg(v0)
 31045  		v0.AuxInt = i0
 31046  		v0.Aux = s
 31047  		v0.AddArg(p)
 31048  		v0.AddArg(mem)
 31049  		return true
 31050  	}
 31051  	return false
 31052  }
 31053  func rewriteValuePPC64_OpPPC64OR_110(v *Value) bool {
 31054  	b := v.Block
 31055  	_ = b
 31056  	config := b.Func.Config
 31057  	_ = config
 31058  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31059  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31060  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31061  	for {
 31062  		t := v.Type
 31063  		_ = v.Args[1]
 31064  		o5 := v.Args[0]
 31065  		if o5.Op != OpPPC64OR {
 31066  			break
 31067  		}
 31068  		if o5.Type != t {
 31069  			break
 31070  		}
 31071  		_ = o5.Args[1]
 31072  		s5 := o5.Args[0]
 31073  		if s5.Op != OpPPC64SLDconst {
 31074  			break
 31075  		}
 31076  		if s5.AuxInt != 48 {
 31077  			break
 31078  		}
 31079  		x6 := s5.Args[0]
 31080  		if x6.Op != OpPPC64MOVBZload {
 31081  			break
 31082  		}
 31083  		i6 := x6.AuxInt
 31084  		s := x6.Aux
 31085  		_ = x6.Args[1]
 31086  		p := x6.Args[0]
 31087  		mem := x6.Args[1]
 31088  		o4 := o5.Args[1]
 31089  		if o4.Op != OpPPC64OR {
 31090  			break
 31091  		}
 31092  		if o4.Type != t {
 31093  			break
 31094  		}
 31095  		_ = o4.Args[1]
 31096  		o3 := o4.Args[0]
 31097  		if o3.Op != OpPPC64OR {
 31098  			break
 31099  		}
 31100  		if o3.Type != t {
 31101  			break
 31102  		}
 31103  		_ = o3.Args[1]
 31104  		o2 := o3.Args[0]
 31105  		if o2.Op != OpPPC64OR {
 31106  			break
 31107  		}
 31108  		if o2.Type != t {
 31109  			break
 31110  		}
 31111  		_ = o2.Args[1]
 31112  		o1 := o2.Args[0]
 31113  		if o1.Op != OpPPC64OR {
 31114  			break
 31115  		}
 31116  		if o1.Type != t {
 31117  			break
 31118  		}
 31119  		_ = o1.Args[1]
 31120  		s1 := o1.Args[0]
 31121  		if s1.Op != OpPPC64SLDconst {
 31122  			break
 31123  		}
 31124  		if s1.AuxInt != 16 {
 31125  			break
 31126  		}
 31127  		x2 := s1.Args[0]
 31128  		if x2.Op != OpPPC64MOVBZload {
 31129  			break
 31130  		}
 31131  		i2 := x2.AuxInt
 31132  		if x2.Aux != s {
 31133  			break
 31134  		}
 31135  		_ = x2.Args[1]
 31136  		if p != x2.Args[0] {
 31137  			break
 31138  		}
 31139  		if mem != x2.Args[1] {
 31140  			break
 31141  		}
 31142  		o0 := o1.Args[1]
 31143  		if o0.Op != OpPPC64OR {
 31144  			break
 31145  		}
 31146  		if o0.Type != t {
 31147  			break
 31148  		}
 31149  		_ = o0.Args[1]
 31150  		s0 := o0.Args[0]
 31151  		if s0.Op != OpPPC64SLDconst {
 31152  			break
 31153  		}
 31154  		if s0.AuxInt != 8 {
 31155  			break
 31156  		}
 31157  		x1 := s0.Args[0]
 31158  		if x1.Op != OpPPC64MOVBZload {
 31159  			break
 31160  		}
 31161  		i1 := x1.AuxInt
 31162  		if x1.Aux != s {
 31163  			break
 31164  		}
 31165  		_ = x1.Args[1]
 31166  		if p != x1.Args[0] {
 31167  			break
 31168  		}
 31169  		if mem != x1.Args[1] {
 31170  			break
 31171  		}
 31172  		x0 := o0.Args[1]
 31173  		if x0.Op != OpPPC64MOVBZload {
 31174  			break
 31175  		}
 31176  		i0 := x0.AuxInt
 31177  		if x0.Aux != s {
 31178  			break
 31179  		}
 31180  		_ = x0.Args[1]
 31181  		if p != x0.Args[0] {
 31182  			break
 31183  		}
 31184  		if mem != x0.Args[1] {
 31185  			break
 31186  		}
 31187  		s2 := o2.Args[1]
 31188  		if s2.Op != OpPPC64SLDconst {
 31189  			break
 31190  		}
 31191  		if s2.AuxInt != 24 {
 31192  			break
 31193  		}
 31194  		x3 := s2.Args[0]
 31195  		if x3.Op != OpPPC64MOVBZload {
 31196  			break
 31197  		}
 31198  		i3 := x3.AuxInt
 31199  		if x3.Aux != s {
 31200  			break
 31201  		}
 31202  		_ = x3.Args[1]
 31203  		if p != x3.Args[0] {
 31204  			break
 31205  		}
 31206  		if mem != x3.Args[1] {
 31207  			break
 31208  		}
 31209  		s3 := o3.Args[1]
 31210  		if s3.Op != OpPPC64SLDconst {
 31211  			break
 31212  		}
 31213  		if s3.AuxInt != 32 {
 31214  			break
 31215  		}
 31216  		x4 := s3.Args[0]
 31217  		if x4.Op != OpPPC64MOVBZload {
 31218  			break
 31219  		}
 31220  		i4 := x4.AuxInt
 31221  		if x4.Aux != s {
 31222  			break
 31223  		}
 31224  		_ = x4.Args[1]
 31225  		if p != x4.Args[0] {
 31226  			break
 31227  		}
 31228  		if mem != x4.Args[1] {
 31229  			break
 31230  		}
 31231  		s4 := o4.Args[1]
 31232  		if s4.Op != OpPPC64SLDconst {
 31233  			break
 31234  		}
 31235  		if s4.AuxInt != 40 {
 31236  			break
 31237  		}
 31238  		x5 := s4.Args[0]
 31239  		if x5.Op != OpPPC64MOVBZload {
 31240  			break
 31241  		}
 31242  		i5 := x5.AuxInt
 31243  		if x5.Aux != s {
 31244  			break
 31245  		}
 31246  		_ = x5.Args[1]
 31247  		if p != x5.Args[0] {
 31248  			break
 31249  		}
 31250  		if mem != x5.Args[1] {
 31251  			break
 31252  		}
 31253  		s6 := v.Args[1]
 31254  		if s6.Op != OpPPC64SLDconst {
 31255  			break
 31256  		}
 31257  		if s6.AuxInt != 56 {
 31258  			break
 31259  		}
 31260  		x7 := s6.Args[0]
 31261  		if x7.Op != OpPPC64MOVBZload {
 31262  			break
 31263  		}
 31264  		i7 := x7.AuxInt
 31265  		if x7.Aux != s {
 31266  			break
 31267  		}
 31268  		_ = x7.Args[1]
 31269  		if p != x7.Args[0] {
 31270  			break
 31271  		}
 31272  		if mem != x7.Args[1] {
 31273  			break
 31274  		}
 31275  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31276  			break
 31277  		}
 31278  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31279  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31280  		v.reset(OpCopy)
 31281  		v.AddArg(v0)
 31282  		v0.AuxInt = i0
 31283  		v0.Aux = s
 31284  		v0.AddArg(p)
 31285  		v0.AddArg(mem)
 31286  		return true
 31287  	}
 31288  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31289  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31290  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31291  	for {
 31292  		t := v.Type
 31293  		_ = v.Args[1]
 31294  		o5 := v.Args[0]
 31295  		if o5.Op != OpPPC64OR {
 31296  			break
 31297  		}
 31298  		if o5.Type != t {
 31299  			break
 31300  		}
 31301  		_ = o5.Args[1]
 31302  		s5 := o5.Args[0]
 31303  		if s5.Op != OpPPC64SLDconst {
 31304  			break
 31305  		}
 31306  		if s5.AuxInt != 48 {
 31307  			break
 31308  		}
 31309  		x6 := s5.Args[0]
 31310  		if x6.Op != OpPPC64MOVBZload {
 31311  			break
 31312  		}
 31313  		i6 := x6.AuxInt
 31314  		s := x6.Aux
 31315  		_ = x6.Args[1]
 31316  		p := x6.Args[0]
 31317  		mem := x6.Args[1]
 31318  		o4 := o5.Args[1]
 31319  		if o4.Op != OpPPC64OR {
 31320  			break
 31321  		}
 31322  		if o4.Type != t {
 31323  			break
 31324  		}
 31325  		_ = o4.Args[1]
 31326  		o3 := o4.Args[0]
 31327  		if o3.Op != OpPPC64OR {
 31328  			break
 31329  		}
 31330  		if o3.Type != t {
 31331  			break
 31332  		}
 31333  		_ = o3.Args[1]
 31334  		o2 := o3.Args[0]
 31335  		if o2.Op != OpPPC64OR {
 31336  			break
 31337  		}
 31338  		if o2.Type != t {
 31339  			break
 31340  		}
 31341  		_ = o2.Args[1]
 31342  		o1 := o2.Args[0]
 31343  		if o1.Op != OpPPC64OR {
 31344  			break
 31345  		}
 31346  		if o1.Type != t {
 31347  			break
 31348  		}
 31349  		_ = o1.Args[1]
 31350  		s1 := o1.Args[0]
 31351  		if s1.Op != OpPPC64SLDconst {
 31352  			break
 31353  		}
 31354  		if s1.AuxInt != 16 {
 31355  			break
 31356  		}
 31357  		x2 := s1.Args[0]
 31358  		if x2.Op != OpPPC64MOVBZload {
 31359  			break
 31360  		}
 31361  		i2 := x2.AuxInt
 31362  		if x2.Aux != s {
 31363  			break
 31364  		}
 31365  		_ = x2.Args[1]
 31366  		if p != x2.Args[0] {
 31367  			break
 31368  		}
 31369  		if mem != x2.Args[1] {
 31370  			break
 31371  		}
 31372  		o0 := o1.Args[1]
 31373  		if o0.Op != OpPPC64OR {
 31374  			break
 31375  		}
 31376  		if o0.Type != t {
 31377  			break
 31378  		}
 31379  		_ = o0.Args[1]
 31380  		x0 := o0.Args[0]
 31381  		if x0.Op != OpPPC64MOVBZload {
 31382  			break
 31383  		}
 31384  		i0 := x0.AuxInt
 31385  		if x0.Aux != s {
 31386  			break
 31387  		}
 31388  		_ = x0.Args[1]
 31389  		if p != x0.Args[0] {
 31390  			break
 31391  		}
 31392  		if mem != x0.Args[1] {
 31393  			break
 31394  		}
 31395  		s0 := o0.Args[1]
 31396  		if s0.Op != OpPPC64SLDconst {
 31397  			break
 31398  		}
 31399  		if s0.AuxInt != 8 {
 31400  			break
 31401  		}
 31402  		x1 := s0.Args[0]
 31403  		if x1.Op != OpPPC64MOVBZload {
 31404  			break
 31405  		}
 31406  		i1 := x1.AuxInt
 31407  		if x1.Aux != s {
 31408  			break
 31409  		}
 31410  		_ = x1.Args[1]
 31411  		if p != x1.Args[0] {
 31412  			break
 31413  		}
 31414  		if mem != x1.Args[1] {
 31415  			break
 31416  		}
 31417  		s2 := o2.Args[1]
 31418  		if s2.Op != OpPPC64SLDconst {
 31419  			break
 31420  		}
 31421  		if s2.AuxInt != 24 {
 31422  			break
 31423  		}
 31424  		x3 := s2.Args[0]
 31425  		if x3.Op != OpPPC64MOVBZload {
 31426  			break
 31427  		}
 31428  		i3 := x3.AuxInt
 31429  		if x3.Aux != s {
 31430  			break
 31431  		}
 31432  		_ = x3.Args[1]
 31433  		if p != x3.Args[0] {
 31434  			break
 31435  		}
 31436  		if mem != x3.Args[1] {
 31437  			break
 31438  		}
 31439  		s3 := o3.Args[1]
 31440  		if s3.Op != OpPPC64SLDconst {
 31441  			break
 31442  		}
 31443  		if s3.AuxInt != 32 {
 31444  			break
 31445  		}
 31446  		x4 := s3.Args[0]
 31447  		if x4.Op != OpPPC64MOVBZload {
 31448  			break
 31449  		}
 31450  		i4 := x4.AuxInt
 31451  		if x4.Aux != s {
 31452  			break
 31453  		}
 31454  		_ = x4.Args[1]
 31455  		if p != x4.Args[0] {
 31456  			break
 31457  		}
 31458  		if mem != x4.Args[1] {
 31459  			break
 31460  		}
 31461  		s4 := o4.Args[1]
 31462  		if s4.Op != OpPPC64SLDconst {
 31463  			break
 31464  		}
 31465  		if s4.AuxInt != 40 {
 31466  			break
 31467  		}
 31468  		x5 := s4.Args[0]
 31469  		if x5.Op != OpPPC64MOVBZload {
 31470  			break
 31471  		}
 31472  		i5 := x5.AuxInt
 31473  		if x5.Aux != s {
 31474  			break
 31475  		}
 31476  		_ = x5.Args[1]
 31477  		if p != x5.Args[0] {
 31478  			break
 31479  		}
 31480  		if mem != x5.Args[1] {
 31481  			break
 31482  		}
 31483  		s6 := v.Args[1]
 31484  		if s6.Op != OpPPC64SLDconst {
 31485  			break
 31486  		}
 31487  		if s6.AuxInt != 56 {
 31488  			break
 31489  		}
 31490  		x7 := s6.Args[0]
 31491  		if x7.Op != OpPPC64MOVBZload {
 31492  			break
 31493  		}
 31494  		i7 := x7.AuxInt
 31495  		if x7.Aux != s {
 31496  			break
 31497  		}
 31498  		_ = x7.Args[1]
 31499  		if p != x7.Args[0] {
 31500  			break
 31501  		}
 31502  		if mem != x7.Args[1] {
 31503  			break
 31504  		}
 31505  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31506  			break
 31507  		}
 31508  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31509  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31510  		v.reset(OpCopy)
 31511  		v.AddArg(v0)
 31512  		v0.AuxInt = i0
 31513  		v0.Aux = s
 31514  		v0.AddArg(p)
 31515  		v0.AddArg(mem)
 31516  		return true
 31517  	}
 31518  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31519  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31520  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31521  	for {
 31522  		t := v.Type
 31523  		_ = v.Args[1]
 31524  		o5 := v.Args[0]
 31525  		if o5.Op != OpPPC64OR {
 31526  			break
 31527  		}
 31528  		if o5.Type != t {
 31529  			break
 31530  		}
 31531  		_ = o5.Args[1]
 31532  		s5 := o5.Args[0]
 31533  		if s5.Op != OpPPC64SLDconst {
 31534  			break
 31535  		}
 31536  		if s5.AuxInt != 48 {
 31537  			break
 31538  		}
 31539  		x6 := s5.Args[0]
 31540  		if x6.Op != OpPPC64MOVBZload {
 31541  			break
 31542  		}
 31543  		i6 := x6.AuxInt
 31544  		s := x6.Aux
 31545  		_ = x6.Args[1]
 31546  		p := x6.Args[0]
 31547  		mem := x6.Args[1]
 31548  		o4 := o5.Args[1]
 31549  		if o4.Op != OpPPC64OR {
 31550  			break
 31551  		}
 31552  		if o4.Type != t {
 31553  			break
 31554  		}
 31555  		_ = o4.Args[1]
 31556  		o3 := o4.Args[0]
 31557  		if o3.Op != OpPPC64OR {
 31558  			break
 31559  		}
 31560  		if o3.Type != t {
 31561  			break
 31562  		}
 31563  		_ = o3.Args[1]
 31564  		o2 := o3.Args[0]
 31565  		if o2.Op != OpPPC64OR {
 31566  			break
 31567  		}
 31568  		if o2.Type != t {
 31569  			break
 31570  		}
 31571  		_ = o2.Args[1]
 31572  		o1 := o2.Args[0]
 31573  		if o1.Op != OpPPC64OR {
 31574  			break
 31575  		}
 31576  		if o1.Type != t {
 31577  			break
 31578  		}
 31579  		_ = o1.Args[1]
 31580  		o0 := o1.Args[0]
 31581  		if o0.Op != OpPPC64OR {
 31582  			break
 31583  		}
 31584  		if o0.Type != t {
 31585  			break
 31586  		}
 31587  		_ = o0.Args[1]
 31588  		s0 := o0.Args[0]
 31589  		if s0.Op != OpPPC64SLDconst {
 31590  			break
 31591  		}
 31592  		if s0.AuxInt != 8 {
 31593  			break
 31594  		}
 31595  		x1 := s0.Args[0]
 31596  		if x1.Op != OpPPC64MOVBZload {
 31597  			break
 31598  		}
 31599  		i1 := x1.AuxInt
 31600  		if x1.Aux != s {
 31601  			break
 31602  		}
 31603  		_ = x1.Args[1]
 31604  		if p != x1.Args[0] {
 31605  			break
 31606  		}
 31607  		if mem != x1.Args[1] {
 31608  			break
 31609  		}
 31610  		x0 := o0.Args[1]
 31611  		if x0.Op != OpPPC64MOVBZload {
 31612  			break
 31613  		}
 31614  		i0 := x0.AuxInt
 31615  		if x0.Aux != s {
 31616  			break
 31617  		}
 31618  		_ = x0.Args[1]
 31619  		if p != x0.Args[0] {
 31620  			break
 31621  		}
 31622  		if mem != x0.Args[1] {
 31623  			break
 31624  		}
 31625  		s1 := o1.Args[1]
 31626  		if s1.Op != OpPPC64SLDconst {
 31627  			break
 31628  		}
 31629  		if s1.AuxInt != 16 {
 31630  			break
 31631  		}
 31632  		x2 := s1.Args[0]
 31633  		if x2.Op != OpPPC64MOVBZload {
 31634  			break
 31635  		}
 31636  		i2 := x2.AuxInt
 31637  		if x2.Aux != s {
 31638  			break
 31639  		}
 31640  		_ = x2.Args[1]
 31641  		if p != x2.Args[0] {
 31642  			break
 31643  		}
 31644  		if mem != x2.Args[1] {
 31645  			break
 31646  		}
 31647  		s2 := o2.Args[1]
 31648  		if s2.Op != OpPPC64SLDconst {
 31649  			break
 31650  		}
 31651  		if s2.AuxInt != 24 {
 31652  			break
 31653  		}
 31654  		x3 := s2.Args[0]
 31655  		if x3.Op != OpPPC64MOVBZload {
 31656  			break
 31657  		}
 31658  		i3 := x3.AuxInt
 31659  		if x3.Aux != s {
 31660  			break
 31661  		}
 31662  		_ = x3.Args[1]
 31663  		if p != x3.Args[0] {
 31664  			break
 31665  		}
 31666  		if mem != x3.Args[1] {
 31667  			break
 31668  		}
 31669  		s3 := o3.Args[1]
 31670  		if s3.Op != OpPPC64SLDconst {
 31671  			break
 31672  		}
 31673  		if s3.AuxInt != 32 {
 31674  			break
 31675  		}
 31676  		x4 := s3.Args[0]
 31677  		if x4.Op != OpPPC64MOVBZload {
 31678  			break
 31679  		}
 31680  		i4 := x4.AuxInt
 31681  		if x4.Aux != s {
 31682  			break
 31683  		}
 31684  		_ = x4.Args[1]
 31685  		if p != x4.Args[0] {
 31686  			break
 31687  		}
 31688  		if mem != x4.Args[1] {
 31689  			break
 31690  		}
 31691  		s4 := o4.Args[1]
 31692  		if s4.Op != OpPPC64SLDconst {
 31693  			break
 31694  		}
 31695  		if s4.AuxInt != 40 {
 31696  			break
 31697  		}
 31698  		x5 := s4.Args[0]
 31699  		if x5.Op != OpPPC64MOVBZload {
 31700  			break
 31701  		}
 31702  		i5 := x5.AuxInt
 31703  		if x5.Aux != s {
 31704  			break
 31705  		}
 31706  		_ = x5.Args[1]
 31707  		if p != x5.Args[0] {
 31708  			break
 31709  		}
 31710  		if mem != x5.Args[1] {
 31711  			break
 31712  		}
 31713  		s6 := v.Args[1]
 31714  		if s6.Op != OpPPC64SLDconst {
 31715  			break
 31716  		}
 31717  		if s6.AuxInt != 56 {
 31718  			break
 31719  		}
 31720  		x7 := s6.Args[0]
 31721  		if x7.Op != OpPPC64MOVBZload {
 31722  			break
 31723  		}
 31724  		i7 := x7.AuxInt
 31725  		if x7.Aux != s {
 31726  			break
 31727  		}
 31728  		_ = x7.Args[1]
 31729  		if p != x7.Args[0] {
 31730  			break
 31731  		}
 31732  		if mem != x7.Args[1] {
 31733  			break
 31734  		}
 31735  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31736  			break
 31737  		}
 31738  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31739  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31740  		v.reset(OpCopy)
 31741  		v.AddArg(v0)
 31742  		v0.AuxInt = i0
 31743  		v0.Aux = s
 31744  		v0.AddArg(p)
 31745  		v0.AddArg(mem)
 31746  		return true
 31747  	}
 31748  	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31749  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31750  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31751  	for {
 31752  		t := v.Type
 31753  		_ = v.Args[1]
 31754  		o5 := v.Args[0]
 31755  		if o5.Op != OpPPC64OR {
 31756  			break
 31757  		}
 31758  		if o5.Type != t {
 31759  			break
 31760  		}
 31761  		_ = o5.Args[1]
 31762  		s5 := o5.Args[0]
 31763  		if s5.Op != OpPPC64SLDconst {
 31764  			break
 31765  		}
 31766  		if s5.AuxInt != 48 {
 31767  			break
 31768  		}
 31769  		x6 := s5.Args[0]
 31770  		if x6.Op != OpPPC64MOVBZload {
 31771  			break
 31772  		}
 31773  		i6 := x6.AuxInt
 31774  		s := x6.Aux
 31775  		_ = x6.Args[1]
 31776  		p := x6.Args[0]
 31777  		mem := x6.Args[1]
 31778  		o4 := o5.Args[1]
 31779  		if o4.Op != OpPPC64OR {
 31780  			break
 31781  		}
 31782  		if o4.Type != t {
 31783  			break
 31784  		}
 31785  		_ = o4.Args[1]
 31786  		o3 := o4.Args[0]
 31787  		if o3.Op != OpPPC64OR {
 31788  			break
 31789  		}
 31790  		if o3.Type != t {
 31791  			break
 31792  		}
 31793  		_ = o3.Args[1]
 31794  		o2 := o3.Args[0]
 31795  		if o2.Op != OpPPC64OR {
 31796  			break
 31797  		}
 31798  		if o2.Type != t {
 31799  			break
 31800  		}
 31801  		_ = o2.Args[1]
 31802  		o1 := o2.Args[0]
 31803  		if o1.Op != OpPPC64OR {
 31804  			break
 31805  		}
 31806  		if o1.Type != t {
 31807  			break
 31808  		}
 31809  		_ = o1.Args[1]
 31810  		o0 := o1.Args[0]
 31811  		if o0.Op != OpPPC64OR {
 31812  			break
 31813  		}
 31814  		if o0.Type != t {
 31815  			break
 31816  		}
 31817  		_ = o0.Args[1]
 31818  		x0 := o0.Args[0]
 31819  		if x0.Op != OpPPC64MOVBZload {
 31820  			break
 31821  		}
 31822  		i0 := x0.AuxInt
 31823  		if x0.Aux != s {
 31824  			break
 31825  		}
 31826  		_ = x0.Args[1]
 31827  		if p != x0.Args[0] {
 31828  			break
 31829  		}
 31830  		if mem != x0.Args[1] {
 31831  			break
 31832  		}
 31833  		s0 := o0.Args[1]
 31834  		if s0.Op != OpPPC64SLDconst {
 31835  			break
 31836  		}
 31837  		if s0.AuxInt != 8 {
 31838  			break
 31839  		}
 31840  		x1 := s0.Args[0]
 31841  		if x1.Op != OpPPC64MOVBZload {
 31842  			break
 31843  		}
 31844  		i1 := x1.AuxInt
 31845  		if x1.Aux != s {
 31846  			break
 31847  		}
 31848  		_ = x1.Args[1]
 31849  		if p != x1.Args[0] {
 31850  			break
 31851  		}
 31852  		if mem != x1.Args[1] {
 31853  			break
 31854  		}
 31855  		s1 := o1.Args[1]
 31856  		if s1.Op != OpPPC64SLDconst {
 31857  			break
 31858  		}
 31859  		if s1.AuxInt != 16 {
 31860  			break
 31861  		}
 31862  		x2 := s1.Args[0]
 31863  		if x2.Op != OpPPC64MOVBZload {
 31864  			break
 31865  		}
 31866  		i2 := x2.AuxInt
 31867  		if x2.Aux != s {
 31868  			break
 31869  		}
 31870  		_ = x2.Args[1]
 31871  		if p != x2.Args[0] {
 31872  			break
 31873  		}
 31874  		if mem != x2.Args[1] {
 31875  			break
 31876  		}
 31877  		s2 := o2.Args[1]
 31878  		if s2.Op != OpPPC64SLDconst {
 31879  			break
 31880  		}
 31881  		if s2.AuxInt != 24 {
 31882  			break
 31883  		}
 31884  		x3 := s2.Args[0]
 31885  		if x3.Op != OpPPC64MOVBZload {
 31886  			break
 31887  		}
 31888  		i3 := x3.AuxInt
 31889  		if x3.Aux != s {
 31890  			break
 31891  		}
 31892  		_ = x3.Args[1]
 31893  		if p != x3.Args[0] {
 31894  			break
 31895  		}
 31896  		if mem != x3.Args[1] {
 31897  			break
 31898  		}
 31899  		s3 := o3.Args[1]
 31900  		if s3.Op != OpPPC64SLDconst {
 31901  			break
 31902  		}
 31903  		if s3.AuxInt != 32 {
 31904  			break
 31905  		}
 31906  		x4 := s3.Args[0]
 31907  		if x4.Op != OpPPC64MOVBZload {
 31908  			break
 31909  		}
 31910  		i4 := x4.AuxInt
 31911  		if x4.Aux != s {
 31912  			break
 31913  		}
 31914  		_ = x4.Args[1]
 31915  		if p != x4.Args[0] {
 31916  			break
 31917  		}
 31918  		if mem != x4.Args[1] {
 31919  			break
 31920  		}
 31921  		s4 := o4.Args[1]
 31922  		if s4.Op != OpPPC64SLDconst {
 31923  			break
 31924  		}
 31925  		if s4.AuxInt != 40 {
 31926  			break
 31927  		}
 31928  		x5 := s4.Args[0]
 31929  		if x5.Op != OpPPC64MOVBZload {
 31930  			break
 31931  		}
 31932  		i5 := x5.AuxInt
 31933  		if x5.Aux != s {
 31934  			break
 31935  		}
 31936  		_ = x5.Args[1]
 31937  		if p != x5.Args[0] {
 31938  			break
 31939  		}
 31940  		if mem != x5.Args[1] {
 31941  			break
 31942  		}
 31943  		s6 := v.Args[1]
 31944  		if s6.Op != OpPPC64SLDconst {
 31945  			break
 31946  		}
 31947  		if s6.AuxInt != 56 {
 31948  			break
 31949  		}
 31950  		x7 := s6.Args[0]
 31951  		if x7.Op != OpPPC64MOVBZload {
 31952  			break
 31953  		}
 31954  		i7 := x7.AuxInt
 31955  		if x7.Aux != s {
 31956  			break
 31957  		}
 31958  		_ = x7.Args[1]
 31959  		if p != x7.Args[0] {
 31960  			break
 31961  		}
 31962  		if mem != x7.Args[1] {
 31963  			break
 31964  		}
 31965  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 31966  			break
 31967  		}
 31968  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 31969  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 31970  		v.reset(OpCopy)
 31971  		v.AddArg(v0)
 31972  		v0.AuxInt = i0
 31973  		v0.Aux = s
 31974  		v0.AddArg(p)
 31975  		v0.AddArg(mem)
 31976  		return true
 31977  	}
 31978  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 31979  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 31980  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 31981  	for {
 31982  		t := v.Type
 31983  		_ = v.Args[1]
 31984  		o5 := v.Args[0]
 31985  		if o5.Op != OpPPC64OR {
 31986  			break
 31987  		}
 31988  		if o5.Type != t {
 31989  			break
 31990  		}
 31991  		_ = o5.Args[1]
 31992  		o4 := o5.Args[0]
 31993  		if o4.Op != OpPPC64OR {
 31994  			break
 31995  		}
 31996  		if o4.Type != t {
 31997  			break
 31998  		}
 31999  		_ = o4.Args[1]
 32000  		s4 := o4.Args[0]
 32001  		if s4.Op != OpPPC64SLDconst {
 32002  			break
 32003  		}
 32004  		if s4.AuxInt != 40 {
 32005  			break
 32006  		}
 32007  		x5 := s4.Args[0]
 32008  		if x5.Op != OpPPC64MOVBZload {
 32009  			break
 32010  		}
 32011  		i5 := x5.AuxInt
 32012  		s := x5.Aux
 32013  		_ = x5.Args[1]
 32014  		p := x5.Args[0]
 32015  		mem := x5.Args[1]
 32016  		o3 := o4.Args[1]
 32017  		if o3.Op != OpPPC64OR {
 32018  			break
 32019  		}
 32020  		if o3.Type != t {
 32021  			break
 32022  		}
 32023  		_ = o3.Args[1]
 32024  		s3 := o3.Args[0]
 32025  		if s3.Op != OpPPC64SLDconst {
 32026  			break
 32027  		}
 32028  		if s3.AuxInt != 32 {
 32029  			break
 32030  		}
 32031  		x4 := s3.Args[0]
 32032  		if x4.Op != OpPPC64MOVBZload {
 32033  			break
 32034  		}
 32035  		i4 := x4.AuxInt
 32036  		if x4.Aux != s {
 32037  			break
 32038  		}
 32039  		_ = x4.Args[1]
 32040  		if p != x4.Args[0] {
 32041  			break
 32042  		}
 32043  		if mem != x4.Args[1] {
 32044  			break
 32045  		}
 32046  		o2 := o3.Args[1]
 32047  		if o2.Op != OpPPC64OR {
 32048  			break
 32049  		}
 32050  		if o2.Type != t {
 32051  			break
 32052  		}
 32053  		_ = o2.Args[1]
 32054  		s2 := o2.Args[0]
 32055  		if s2.Op != OpPPC64SLDconst {
 32056  			break
 32057  		}
 32058  		if s2.AuxInt != 24 {
 32059  			break
 32060  		}
 32061  		x3 := s2.Args[0]
 32062  		if x3.Op != OpPPC64MOVBZload {
 32063  			break
 32064  		}
 32065  		i3 := x3.AuxInt
 32066  		if x3.Aux != s {
 32067  			break
 32068  		}
 32069  		_ = x3.Args[1]
 32070  		if p != x3.Args[0] {
 32071  			break
 32072  		}
 32073  		if mem != x3.Args[1] {
 32074  			break
 32075  		}
 32076  		o1 := o2.Args[1]
 32077  		if o1.Op != OpPPC64OR {
 32078  			break
 32079  		}
 32080  		if o1.Type != t {
 32081  			break
 32082  		}
 32083  		_ = o1.Args[1]
 32084  		s1 := o1.Args[0]
 32085  		if s1.Op != OpPPC64SLDconst {
 32086  			break
 32087  		}
 32088  		if s1.AuxInt != 16 {
 32089  			break
 32090  		}
 32091  		x2 := s1.Args[0]
 32092  		if x2.Op != OpPPC64MOVBZload {
 32093  			break
 32094  		}
 32095  		i2 := x2.AuxInt
 32096  		if x2.Aux != s {
 32097  			break
 32098  		}
 32099  		_ = x2.Args[1]
 32100  		if p != x2.Args[0] {
 32101  			break
 32102  		}
 32103  		if mem != x2.Args[1] {
 32104  			break
 32105  		}
 32106  		o0 := o1.Args[1]
 32107  		if o0.Op != OpPPC64OR {
 32108  			break
 32109  		}
 32110  		if o0.Type != t {
 32111  			break
 32112  		}
 32113  		_ = o0.Args[1]
 32114  		s0 := o0.Args[0]
 32115  		if s0.Op != OpPPC64SLDconst {
 32116  			break
 32117  		}
 32118  		if s0.AuxInt != 8 {
 32119  			break
 32120  		}
 32121  		x1 := s0.Args[0]
 32122  		if x1.Op != OpPPC64MOVBZload {
 32123  			break
 32124  		}
 32125  		i1 := x1.AuxInt
 32126  		if x1.Aux != s {
 32127  			break
 32128  		}
 32129  		_ = x1.Args[1]
 32130  		if p != x1.Args[0] {
 32131  			break
 32132  		}
 32133  		if mem != x1.Args[1] {
 32134  			break
 32135  		}
 32136  		x0 := o0.Args[1]
 32137  		if x0.Op != OpPPC64MOVBZload {
 32138  			break
 32139  		}
 32140  		i0 := x0.AuxInt
 32141  		if x0.Aux != s {
 32142  			break
 32143  		}
 32144  		_ = x0.Args[1]
 32145  		if p != x0.Args[0] {
 32146  			break
 32147  		}
 32148  		if mem != x0.Args[1] {
 32149  			break
 32150  		}
 32151  		s5 := o5.Args[1]
 32152  		if s5.Op != OpPPC64SLDconst {
 32153  			break
 32154  		}
 32155  		if s5.AuxInt != 48 {
 32156  			break
 32157  		}
 32158  		x6 := s5.Args[0]
 32159  		if x6.Op != OpPPC64MOVBZload {
 32160  			break
 32161  		}
 32162  		i6 := x6.AuxInt
 32163  		if x6.Aux != s {
 32164  			break
 32165  		}
 32166  		_ = x6.Args[1]
 32167  		if p != x6.Args[0] {
 32168  			break
 32169  		}
 32170  		if mem != x6.Args[1] {
 32171  			break
 32172  		}
 32173  		s6 := v.Args[1]
 32174  		if s6.Op != OpPPC64SLDconst {
 32175  			break
 32176  		}
 32177  		if s6.AuxInt != 56 {
 32178  			break
 32179  		}
 32180  		x7 := s6.Args[0]
 32181  		if x7.Op != OpPPC64MOVBZload {
 32182  			break
 32183  		}
 32184  		i7 := x7.AuxInt
 32185  		if x7.Aux != s {
 32186  			break
 32187  		}
 32188  		_ = x7.Args[1]
 32189  		if p != x7.Args[0] {
 32190  			break
 32191  		}
 32192  		if mem != x7.Args[1] {
 32193  			break
 32194  		}
 32195  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 32196  			break
 32197  		}
 32198  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 32199  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 32200  		v.reset(OpCopy)
 32201  		v.AddArg(v0)
 32202  		v0.AuxInt = i0
 32203  		v0.Aux = s
 32204  		v0.AddArg(p)
 32205  		v0.AddArg(mem)
 32206  		return true
 32207  	}
 32208  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 32209  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 32210  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 32211  	for {
 32212  		t := v.Type
 32213  		_ = v.Args[1]
 32214  		o5 := v.Args[0]
 32215  		if o5.Op != OpPPC64OR {
 32216  			break
 32217  		}
 32218  		if o5.Type != t {
 32219  			break
 32220  		}
 32221  		_ = o5.Args[1]
 32222  		o4 := o5.Args[0]
 32223  		if o4.Op != OpPPC64OR {
 32224  			break
 32225  		}
 32226  		if o4.Type != t {
 32227  			break
 32228  		}
 32229  		_ = o4.Args[1]
 32230  		s4 := o4.Args[0]
 32231  		if s4.Op != OpPPC64SLDconst {
 32232  			break
 32233  		}
 32234  		if s4.AuxInt != 40 {
 32235  			break
 32236  		}
 32237  		x5 := s4.Args[0]
 32238  		if x5.Op != OpPPC64MOVBZload {
 32239  			break
 32240  		}
 32241  		i5 := x5.AuxInt
 32242  		s := x5.Aux
 32243  		_ = x5.Args[1]
 32244  		p := x5.Args[0]
 32245  		mem := x5.Args[1]
 32246  		o3 := o4.Args[1]
 32247  		if o3.Op != OpPPC64OR {
 32248  			break
 32249  		}
 32250  		if o3.Type != t {
 32251  			break
 32252  		}
 32253  		_ = o3.Args[1]
 32254  		s3 := o3.Args[0]
 32255  		if s3.Op != OpPPC64SLDconst {
 32256  			break
 32257  		}
 32258  		if s3.AuxInt != 32 {
 32259  			break
 32260  		}
 32261  		x4 := s3.Args[0]
 32262  		if x4.Op != OpPPC64MOVBZload {
 32263  			break
 32264  		}
 32265  		i4 := x4.AuxInt
 32266  		if x4.Aux != s {
 32267  			break
 32268  		}
 32269  		_ = x4.Args[1]
 32270  		if p != x4.Args[0] {
 32271  			break
 32272  		}
 32273  		if mem != x4.Args[1] {
 32274  			break
 32275  		}
 32276  		o2 := o3.Args[1]
 32277  		if o2.Op != OpPPC64OR {
 32278  			break
 32279  		}
 32280  		if o2.Type != t {
 32281  			break
 32282  		}
 32283  		_ = o2.Args[1]
 32284  		s2 := o2.Args[0]
 32285  		if s2.Op != OpPPC64SLDconst {
 32286  			break
 32287  		}
 32288  		if s2.AuxInt != 24 {
 32289  			break
 32290  		}
 32291  		x3 := s2.Args[0]
 32292  		if x3.Op != OpPPC64MOVBZload {
 32293  			break
 32294  		}
 32295  		i3 := x3.AuxInt
 32296  		if x3.Aux != s {
 32297  			break
 32298  		}
 32299  		_ = x3.Args[1]
 32300  		if p != x3.Args[0] {
 32301  			break
 32302  		}
 32303  		if mem != x3.Args[1] {
 32304  			break
 32305  		}
 32306  		o1 := o2.Args[1]
 32307  		if o1.Op != OpPPC64OR {
 32308  			break
 32309  		}
 32310  		if o1.Type != t {
 32311  			break
 32312  		}
 32313  		_ = o1.Args[1]
 32314  		s1 := o1.Args[0]
 32315  		if s1.Op != OpPPC64SLDconst {
 32316  			break
 32317  		}
 32318  		if s1.AuxInt != 16 {
 32319  			break
 32320  		}
 32321  		x2 := s1.Args[0]
 32322  		if x2.Op != OpPPC64MOVBZload {
 32323  			break
 32324  		}
 32325  		i2 := x2.AuxInt
 32326  		if x2.Aux != s {
 32327  			break
 32328  		}
 32329  		_ = x2.Args[1]
 32330  		if p != x2.Args[0] {
 32331  			break
 32332  		}
 32333  		if mem != x2.Args[1] {
 32334  			break
 32335  		}
 32336  		o0 := o1.Args[1]
 32337  		if o0.Op != OpPPC64OR {
 32338  			break
 32339  		}
 32340  		if o0.Type != t {
 32341  			break
 32342  		}
 32343  		_ = o0.Args[1]
 32344  		x0 := o0.Args[0]
 32345  		if x0.Op != OpPPC64MOVBZload {
 32346  			break
 32347  		}
 32348  		i0 := x0.AuxInt
 32349  		if x0.Aux != s {
 32350  			break
 32351  		}
 32352  		_ = x0.Args[1]
 32353  		if p != x0.Args[0] {
 32354  			break
 32355  		}
 32356  		if mem != x0.Args[1] {
 32357  			break
 32358  		}
 32359  		s0 := o0.Args[1]
 32360  		if s0.Op != OpPPC64SLDconst {
 32361  			break
 32362  		}
 32363  		if s0.AuxInt != 8 {
 32364  			break
 32365  		}
 32366  		x1 := s0.Args[0]
 32367  		if x1.Op != OpPPC64MOVBZload {
 32368  			break
 32369  		}
 32370  		i1 := x1.AuxInt
 32371  		if x1.Aux != s {
 32372  			break
 32373  		}
 32374  		_ = x1.Args[1]
 32375  		if p != x1.Args[0] {
 32376  			break
 32377  		}
 32378  		if mem != x1.Args[1] {
 32379  			break
 32380  		}
 32381  		s5 := o5.Args[1]
 32382  		if s5.Op != OpPPC64SLDconst {
 32383  			break
 32384  		}
 32385  		if s5.AuxInt != 48 {
 32386  			break
 32387  		}
 32388  		x6 := s5.Args[0]
 32389  		if x6.Op != OpPPC64MOVBZload {
 32390  			break
 32391  		}
 32392  		i6 := x6.AuxInt
 32393  		if x6.Aux != s {
 32394  			break
 32395  		}
 32396  		_ = x6.Args[1]
 32397  		if p != x6.Args[0] {
 32398  			break
 32399  		}
 32400  		if mem != x6.Args[1] {
 32401  			break
 32402  		}
 32403  		s6 := v.Args[1]
 32404  		if s6.Op != OpPPC64SLDconst {
 32405  			break
 32406  		}
 32407  		if s6.AuxInt != 56 {
 32408  			break
 32409  		}
 32410  		x7 := s6.Args[0]
 32411  		if x7.Op != OpPPC64MOVBZload {
 32412  			break
 32413  		}
 32414  		i7 := x7.AuxInt
 32415  		if x7.Aux != s {
 32416  			break
 32417  		}
 32418  		_ = x7.Args[1]
 32419  		if p != x7.Args[0] {
 32420  			break
 32421  		}
 32422  		if mem != x7.Args[1] {
 32423  			break
 32424  		}
 32425  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 32426  			break
 32427  		}
 32428  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 32429  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 32430  		v.reset(OpCopy)
 32431  		v.AddArg(v0)
 32432  		v0.AuxInt = i0
 32433  		v0.Aux = s
 32434  		v0.AddArg(p)
 32435  		v0.AddArg(mem)
 32436  		return true
 32437  	}
 32438  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 32439  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 32440  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 32441  	for {
 32442  		t := v.Type
 32443  		_ = v.Args[1]
 32444  		o5 := v.Args[0]
 32445  		if o5.Op != OpPPC64OR {
 32446  			break
 32447  		}
 32448  		if o5.Type != t {
 32449  			break
 32450  		}
 32451  		_ = o5.Args[1]
 32452  		o4 := o5.Args[0]
 32453  		if o4.Op != OpPPC64OR {
 32454  			break
 32455  		}
 32456  		if o4.Type != t {
 32457  			break
 32458  		}
 32459  		_ = o4.Args[1]
 32460  		s4 := o4.Args[0]
 32461  		if s4.Op != OpPPC64SLDconst {
 32462  			break
 32463  		}
 32464  		if s4.AuxInt != 40 {
 32465  			break
 32466  		}
 32467  		x5 := s4.Args[0]
 32468  		if x5.Op != OpPPC64MOVBZload {
 32469  			break
 32470  		}
 32471  		i5 := x5.AuxInt
 32472  		s := x5.Aux
 32473  		_ = x5.Args[1]
 32474  		p := x5.Args[0]
 32475  		mem := x5.Args[1]
 32476  		o3 := o4.Args[1]
 32477  		if o3.Op != OpPPC64OR {
 32478  			break
 32479  		}
 32480  		if o3.Type != t {
 32481  			break
 32482  		}
 32483  		_ = o3.Args[1]
 32484  		s3 := o3.Args[0]
 32485  		if s3.Op != OpPPC64SLDconst {
 32486  			break
 32487  		}
 32488  		if s3.AuxInt != 32 {
 32489  			break
 32490  		}
 32491  		x4 := s3.Args[0]
 32492  		if x4.Op != OpPPC64MOVBZload {
 32493  			break
 32494  		}
 32495  		i4 := x4.AuxInt
 32496  		if x4.Aux != s {
 32497  			break
 32498  		}
 32499  		_ = x4.Args[1]
 32500  		if p != x4.Args[0] {
 32501  			break
 32502  		}
 32503  		if mem != x4.Args[1] {
 32504  			break
 32505  		}
 32506  		o2 := o3.Args[1]
 32507  		if o2.Op != OpPPC64OR {
 32508  			break
 32509  		}
 32510  		if o2.Type != t {
 32511  			break
 32512  		}
 32513  		_ = o2.Args[1]
 32514  		s2 := o2.Args[0]
 32515  		if s2.Op != OpPPC64SLDconst {
 32516  			break
 32517  		}
 32518  		if s2.AuxInt != 24 {
 32519  			break
 32520  		}
 32521  		x3 := s2.Args[0]
 32522  		if x3.Op != OpPPC64MOVBZload {
 32523  			break
 32524  		}
 32525  		i3 := x3.AuxInt
 32526  		if x3.Aux != s {
 32527  			break
 32528  		}
 32529  		_ = x3.Args[1]
 32530  		if p != x3.Args[0] {
 32531  			break
 32532  		}
 32533  		if mem != x3.Args[1] {
 32534  			break
 32535  		}
 32536  		o1 := o2.Args[1]
 32537  		if o1.Op != OpPPC64OR {
 32538  			break
 32539  		}
 32540  		if o1.Type != t {
 32541  			break
 32542  		}
 32543  		_ = o1.Args[1]
 32544  		o0 := o1.Args[0]
 32545  		if o0.Op != OpPPC64OR {
 32546  			break
 32547  		}
 32548  		if o0.Type != t {
 32549  			break
 32550  		}
 32551  		_ = o0.Args[1]
 32552  		s0 := o0.Args[0]
 32553  		if s0.Op != OpPPC64SLDconst {
 32554  			break
 32555  		}
 32556  		if s0.AuxInt != 8 {
 32557  			break
 32558  		}
 32559  		x1 := s0.Args[0]
 32560  		if x1.Op != OpPPC64MOVBZload {
 32561  			break
 32562  		}
 32563  		i1 := x1.AuxInt
 32564  		if x1.Aux != s {
 32565  			break
 32566  		}
 32567  		_ = x1.Args[1]
 32568  		if p != x1.Args[0] {
 32569  			break
 32570  		}
 32571  		if mem != x1.Args[1] {
 32572  			break
 32573  		}
 32574  		x0 := o0.Args[1]
 32575  		if x0.Op != OpPPC64MOVBZload {
 32576  			break
 32577  		}
 32578  		i0 := x0.AuxInt
 32579  		if x0.Aux != s {
 32580  			break
 32581  		}
 32582  		_ = x0.Args[1]
 32583  		if p != x0.Args[0] {
 32584  			break
 32585  		}
 32586  		if mem != x0.Args[1] {
 32587  			break
 32588  		}
 32589  		s1 := o1.Args[1]
 32590  		if s1.Op != OpPPC64SLDconst {
 32591  			break
 32592  		}
 32593  		if s1.AuxInt != 16 {
 32594  			break
 32595  		}
 32596  		x2 := s1.Args[0]
 32597  		if x2.Op != OpPPC64MOVBZload {
 32598  			break
 32599  		}
 32600  		i2 := x2.AuxInt
 32601  		if x2.Aux != s {
 32602  			break
 32603  		}
 32604  		_ = x2.Args[1]
 32605  		if p != x2.Args[0] {
 32606  			break
 32607  		}
 32608  		if mem != x2.Args[1] {
 32609  			break
 32610  		}
 32611  		s5 := o5.Args[1]
 32612  		if s5.Op != OpPPC64SLDconst {
 32613  			break
 32614  		}
 32615  		if s5.AuxInt != 48 {
 32616  			break
 32617  		}
 32618  		x6 := s5.Args[0]
 32619  		if x6.Op != OpPPC64MOVBZload {
 32620  			break
 32621  		}
 32622  		i6 := x6.AuxInt
 32623  		if x6.Aux != s {
 32624  			break
 32625  		}
 32626  		_ = x6.Args[1]
 32627  		if p != x6.Args[0] {
 32628  			break
 32629  		}
 32630  		if mem != x6.Args[1] {
 32631  			break
 32632  		}
 32633  		s6 := v.Args[1]
 32634  		if s6.Op != OpPPC64SLDconst {
 32635  			break
 32636  		}
 32637  		if s6.AuxInt != 56 {
 32638  			break
 32639  		}
 32640  		x7 := s6.Args[0]
 32641  		if x7.Op != OpPPC64MOVBZload {
 32642  			break
 32643  		}
 32644  		i7 := x7.AuxInt
 32645  		if x7.Aux != s {
 32646  			break
 32647  		}
 32648  		_ = x7.Args[1]
 32649  		if p != x7.Args[0] {
 32650  			break
 32651  		}
 32652  		if mem != x7.Args[1] {
 32653  			break
 32654  		}
 32655  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 32656  			break
 32657  		}
 32658  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 32659  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 32660  		v.reset(OpCopy)
 32661  		v.AddArg(v0)
 32662  		v0.AuxInt = i0
 32663  		v0.Aux = s
 32664  		v0.AddArg(p)
 32665  		v0.AddArg(mem)
 32666  		return true
 32667  	}
 32668  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 32669  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 32670  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 32671  	for {
 32672  		t := v.Type
 32673  		_ = v.Args[1]
 32674  		o5 := v.Args[0]
 32675  		if o5.Op != OpPPC64OR {
 32676  			break
 32677  		}
 32678  		if o5.Type != t {
 32679  			break
 32680  		}
 32681  		_ = o5.Args[1]
 32682  		o4 := o5.Args[0]
 32683  		if o4.Op != OpPPC64OR {
 32684  			break
 32685  		}
 32686  		if o4.Type != t {
 32687  			break
 32688  		}
 32689  		_ = o4.Args[1]
 32690  		s4 := o4.Args[0]
 32691  		if s4.Op != OpPPC64SLDconst {
 32692  			break
 32693  		}
 32694  		if s4.AuxInt != 40 {
 32695  			break
 32696  		}
 32697  		x5 := s4.Args[0]
 32698  		if x5.Op != OpPPC64MOVBZload {
 32699  			break
 32700  		}
 32701  		i5 := x5.AuxInt
 32702  		s := x5.Aux
 32703  		_ = x5.Args[1]
 32704  		p := x5.Args[0]
 32705  		mem := x5.Args[1]
 32706  		o3 := o4.Args[1]
 32707  		if o3.Op != OpPPC64OR {
 32708  			break
 32709  		}
 32710  		if o3.Type != t {
 32711  			break
 32712  		}
 32713  		_ = o3.Args[1]
 32714  		s3 := o3.Args[0]
 32715  		if s3.Op != OpPPC64SLDconst {
 32716  			break
 32717  		}
 32718  		if s3.AuxInt != 32 {
 32719  			break
 32720  		}
 32721  		x4 := s3.Args[0]
 32722  		if x4.Op != OpPPC64MOVBZload {
 32723  			break
 32724  		}
 32725  		i4 := x4.AuxInt
 32726  		if x4.Aux != s {
 32727  			break
 32728  		}
 32729  		_ = x4.Args[1]
 32730  		if p != x4.Args[0] {
 32731  			break
 32732  		}
 32733  		if mem != x4.Args[1] {
 32734  			break
 32735  		}
 32736  		o2 := o3.Args[1]
 32737  		if o2.Op != OpPPC64OR {
 32738  			break
 32739  		}
 32740  		if o2.Type != t {
 32741  			break
 32742  		}
 32743  		_ = o2.Args[1]
 32744  		s2 := o2.Args[0]
 32745  		if s2.Op != OpPPC64SLDconst {
 32746  			break
 32747  		}
 32748  		if s2.AuxInt != 24 {
 32749  			break
 32750  		}
 32751  		x3 := s2.Args[0]
 32752  		if x3.Op != OpPPC64MOVBZload {
 32753  			break
 32754  		}
 32755  		i3 := x3.AuxInt
 32756  		if x3.Aux != s {
 32757  			break
 32758  		}
 32759  		_ = x3.Args[1]
 32760  		if p != x3.Args[0] {
 32761  			break
 32762  		}
 32763  		if mem != x3.Args[1] {
 32764  			break
 32765  		}
 32766  		o1 := o2.Args[1]
 32767  		if o1.Op != OpPPC64OR {
 32768  			break
 32769  		}
 32770  		if o1.Type != t {
 32771  			break
 32772  		}
 32773  		_ = o1.Args[1]
 32774  		o0 := o1.Args[0]
 32775  		if o0.Op != OpPPC64OR {
 32776  			break
 32777  		}
 32778  		if o0.Type != t {
 32779  			break
 32780  		}
 32781  		_ = o0.Args[1]
 32782  		x0 := o0.Args[0]
 32783  		if x0.Op != OpPPC64MOVBZload {
 32784  			break
 32785  		}
 32786  		i0 := x0.AuxInt
 32787  		if x0.Aux != s {
 32788  			break
 32789  		}
 32790  		_ = x0.Args[1]
 32791  		if p != x0.Args[0] {
 32792  			break
 32793  		}
 32794  		if mem != x0.Args[1] {
 32795  			break
 32796  		}
 32797  		s0 := o0.Args[1]
 32798  		if s0.Op != OpPPC64SLDconst {
 32799  			break
 32800  		}
 32801  		if s0.AuxInt != 8 {
 32802  			break
 32803  		}
 32804  		x1 := s0.Args[0]
 32805  		if x1.Op != OpPPC64MOVBZload {
 32806  			break
 32807  		}
 32808  		i1 := x1.AuxInt
 32809  		if x1.Aux != s {
 32810  			break
 32811  		}
 32812  		_ = x1.Args[1]
 32813  		if p != x1.Args[0] {
 32814  			break
 32815  		}
 32816  		if mem != x1.Args[1] {
 32817  			break
 32818  		}
 32819  		s1 := o1.Args[1]
 32820  		if s1.Op != OpPPC64SLDconst {
 32821  			break
 32822  		}
 32823  		if s1.AuxInt != 16 {
 32824  			break
 32825  		}
 32826  		x2 := s1.Args[0]
 32827  		if x2.Op != OpPPC64MOVBZload {
 32828  			break
 32829  		}
 32830  		i2 := x2.AuxInt
 32831  		if x2.Aux != s {
 32832  			break
 32833  		}
 32834  		_ = x2.Args[1]
 32835  		if p != x2.Args[0] {
 32836  			break
 32837  		}
 32838  		if mem != x2.Args[1] {
 32839  			break
 32840  		}
 32841  		s5 := o5.Args[1]
 32842  		if s5.Op != OpPPC64SLDconst {
 32843  			break
 32844  		}
 32845  		if s5.AuxInt != 48 {
 32846  			break
 32847  		}
 32848  		x6 := s5.Args[0]
 32849  		if x6.Op != OpPPC64MOVBZload {
 32850  			break
 32851  		}
 32852  		i6 := x6.AuxInt
 32853  		if x6.Aux != s {
 32854  			break
 32855  		}
 32856  		_ = x6.Args[1]
 32857  		if p != x6.Args[0] {
 32858  			break
 32859  		}
 32860  		if mem != x6.Args[1] {
 32861  			break
 32862  		}
 32863  		s6 := v.Args[1]
 32864  		if s6.Op != OpPPC64SLDconst {
 32865  			break
 32866  		}
 32867  		if s6.AuxInt != 56 {
 32868  			break
 32869  		}
 32870  		x7 := s6.Args[0]
 32871  		if x7.Op != OpPPC64MOVBZload {
 32872  			break
 32873  		}
 32874  		i7 := x7.AuxInt
 32875  		if x7.Aux != s {
 32876  			break
 32877  		}
 32878  		_ = x7.Args[1]
 32879  		if p != x7.Args[0] {
 32880  			break
 32881  		}
 32882  		if mem != x7.Args[1] {
 32883  			break
 32884  		}
 32885  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 32886  			break
 32887  		}
 32888  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 32889  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 32890  		v.reset(OpCopy)
 32891  		v.AddArg(v0)
 32892  		v0.AuxInt = i0
 32893  		v0.Aux = s
 32894  		v0.AddArg(p)
 32895  		v0.AddArg(mem)
 32896  		return true
 32897  	}
 32898  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 32899  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 32900  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 32901  	for {
 32902  		t := v.Type
 32903  		_ = v.Args[1]
 32904  		o5 := v.Args[0]
 32905  		if o5.Op != OpPPC64OR {
 32906  			break
 32907  		}
 32908  		if o5.Type != t {
 32909  			break
 32910  		}
 32911  		_ = o5.Args[1]
 32912  		o4 := o5.Args[0]
 32913  		if o4.Op != OpPPC64OR {
 32914  			break
 32915  		}
 32916  		if o4.Type != t {
 32917  			break
 32918  		}
 32919  		_ = o4.Args[1]
 32920  		s4 := o4.Args[0]
 32921  		if s4.Op != OpPPC64SLDconst {
 32922  			break
 32923  		}
 32924  		if s4.AuxInt != 40 {
 32925  			break
 32926  		}
 32927  		x5 := s4.Args[0]
 32928  		if x5.Op != OpPPC64MOVBZload {
 32929  			break
 32930  		}
 32931  		i5 := x5.AuxInt
 32932  		s := x5.Aux
 32933  		_ = x5.Args[1]
 32934  		p := x5.Args[0]
 32935  		mem := x5.Args[1]
 32936  		o3 := o4.Args[1]
 32937  		if o3.Op != OpPPC64OR {
 32938  			break
 32939  		}
 32940  		if o3.Type != t {
 32941  			break
 32942  		}
 32943  		_ = o3.Args[1]
 32944  		s3 := o3.Args[0]
 32945  		if s3.Op != OpPPC64SLDconst {
 32946  			break
 32947  		}
 32948  		if s3.AuxInt != 32 {
 32949  			break
 32950  		}
 32951  		x4 := s3.Args[0]
 32952  		if x4.Op != OpPPC64MOVBZload {
 32953  			break
 32954  		}
 32955  		i4 := x4.AuxInt
 32956  		if x4.Aux != s {
 32957  			break
 32958  		}
 32959  		_ = x4.Args[1]
 32960  		if p != x4.Args[0] {
 32961  			break
 32962  		}
 32963  		if mem != x4.Args[1] {
 32964  			break
 32965  		}
 32966  		o2 := o3.Args[1]
 32967  		if o2.Op != OpPPC64OR {
 32968  			break
 32969  		}
 32970  		if o2.Type != t {
 32971  			break
 32972  		}
 32973  		_ = o2.Args[1]
 32974  		o1 := o2.Args[0]
 32975  		if o1.Op != OpPPC64OR {
 32976  			break
 32977  		}
 32978  		if o1.Type != t {
 32979  			break
 32980  		}
 32981  		_ = o1.Args[1]
 32982  		s1 := o1.Args[0]
 32983  		if s1.Op != OpPPC64SLDconst {
 32984  			break
 32985  		}
 32986  		if s1.AuxInt != 16 {
 32987  			break
 32988  		}
 32989  		x2 := s1.Args[0]
 32990  		if x2.Op != OpPPC64MOVBZload {
 32991  			break
 32992  		}
 32993  		i2 := x2.AuxInt
 32994  		if x2.Aux != s {
 32995  			break
 32996  		}
 32997  		_ = x2.Args[1]
 32998  		if p != x2.Args[0] {
 32999  			break
 33000  		}
 33001  		if mem != x2.Args[1] {
 33002  			break
 33003  		}
 33004  		o0 := o1.Args[1]
 33005  		if o0.Op != OpPPC64OR {
 33006  			break
 33007  		}
 33008  		if o0.Type != t {
 33009  			break
 33010  		}
 33011  		_ = o0.Args[1]
 33012  		s0 := o0.Args[0]
 33013  		if s0.Op != OpPPC64SLDconst {
 33014  			break
 33015  		}
 33016  		if s0.AuxInt != 8 {
 33017  			break
 33018  		}
 33019  		x1 := s0.Args[0]
 33020  		if x1.Op != OpPPC64MOVBZload {
 33021  			break
 33022  		}
 33023  		i1 := x1.AuxInt
 33024  		if x1.Aux != s {
 33025  			break
 33026  		}
 33027  		_ = x1.Args[1]
 33028  		if p != x1.Args[0] {
 33029  			break
 33030  		}
 33031  		if mem != x1.Args[1] {
 33032  			break
 33033  		}
 33034  		x0 := o0.Args[1]
 33035  		if x0.Op != OpPPC64MOVBZload {
 33036  			break
 33037  		}
 33038  		i0 := x0.AuxInt
 33039  		if x0.Aux != s {
 33040  			break
 33041  		}
 33042  		_ = x0.Args[1]
 33043  		if p != x0.Args[0] {
 33044  			break
 33045  		}
 33046  		if mem != x0.Args[1] {
 33047  			break
 33048  		}
 33049  		s2 := o2.Args[1]
 33050  		if s2.Op != OpPPC64SLDconst {
 33051  			break
 33052  		}
 33053  		if s2.AuxInt != 24 {
 33054  			break
 33055  		}
 33056  		x3 := s2.Args[0]
 33057  		if x3.Op != OpPPC64MOVBZload {
 33058  			break
 33059  		}
 33060  		i3 := x3.AuxInt
 33061  		if x3.Aux != s {
 33062  			break
 33063  		}
 33064  		_ = x3.Args[1]
 33065  		if p != x3.Args[0] {
 33066  			break
 33067  		}
 33068  		if mem != x3.Args[1] {
 33069  			break
 33070  		}
 33071  		s5 := o5.Args[1]
 33072  		if s5.Op != OpPPC64SLDconst {
 33073  			break
 33074  		}
 33075  		if s5.AuxInt != 48 {
 33076  			break
 33077  		}
 33078  		x6 := s5.Args[0]
 33079  		if x6.Op != OpPPC64MOVBZload {
 33080  			break
 33081  		}
 33082  		i6 := x6.AuxInt
 33083  		if x6.Aux != s {
 33084  			break
 33085  		}
 33086  		_ = x6.Args[1]
 33087  		if p != x6.Args[0] {
 33088  			break
 33089  		}
 33090  		if mem != x6.Args[1] {
 33091  			break
 33092  		}
 33093  		s6 := v.Args[1]
 33094  		if s6.Op != OpPPC64SLDconst {
 33095  			break
 33096  		}
 33097  		if s6.AuxInt != 56 {
 33098  			break
 33099  		}
 33100  		x7 := s6.Args[0]
 33101  		if x7.Op != OpPPC64MOVBZload {
 33102  			break
 33103  		}
 33104  		i7 := x7.AuxInt
 33105  		if x7.Aux != s {
 33106  			break
 33107  		}
 33108  		_ = x7.Args[1]
 33109  		if p != x7.Args[0] {
 33110  			break
 33111  		}
 33112  		if mem != x7.Args[1] {
 33113  			break
 33114  		}
 33115  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 33116  			break
 33117  		}
 33118  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 33119  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 33120  		v.reset(OpCopy)
 33121  		v.AddArg(v0)
 33122  		v0.AuxInt = i0
 33123  		v0.Aux = s
 33124  		v0.AddArg(p)
 33125  		v0.AddArg(mem)
 33126  		return true
 33127  	}
 33128  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 33129  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 33130  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 33131  	for {
 33132  		t := v.Type
 33133  		_ = v.Args[1]
 33134  		o5 := v.Args[0]
 33135  		if o5.Op != OpPPC64OR {
 33136  			break
 33137  		}
 33138  		if o5.Type != t {
 33139  			break
 33140  		}
 33141  		_ = o5.Args[1]
 33142  		o4 := o5.Args[0]
 33143  		if o4.Op != OpPPC64OR {
 33144  			break
 33145  		}
 33146  		if o4.Type != t {
 33147  			break
 33148  		}
 33149  		_ = o4.Args[1]
 33150  		s4 := o4.Args[0]
 33151  		if s4.Op != OpPPC64SLDconst {
 33152  			break
 33153  		}
 33154  		if s4.AuxInt != 40 {
 33155  			break
 33156  		}
 33157  		x5 := s4.Args[0]
 33158  		if x5.Op != OpPPC64MOVBZload {
 33159  			break
 33160  		}
 33161  		i5 := x5.AuxInt
 33162  		s := x5.Aux
 33163  		_ = x5.Args[1]
 33164  		p := x5.Args[0]
 33165  		mem := x5.Args[1]
 33166  		o3 := o4.Args[1]
 33167  		if o3.Op != OpPPC64OR {
 33168  			break
 33169  		}
 33170  		if o3.Type != t {
 33171  			break
 33172  		}
 33173  		_ = o3.Args[1]
 33174  		s3 := o3.Args[0]
 33175  		if s3.Op != OpPPC64SLDconst {
 33176  			break
 33177  		}
 33178  		if s3.AuxInt != 32 {
 33179  			break
 33180  		}
 33181  		x4 := s3.Args[0]
 33182  		if x4.Op != OpPPC64MOVBZload {
 33183  			break
 33184  		}
 33185  		i4 := x4.AuxInt
 33186  		if x4.Aux != s {
 33187  			break
 33188  		}
 33189  		_ = x4.Args[1]
 33190  		if p != x4.Args[0] {
 33191  			break
 33192  		}
 33193  		if mem != x4.Args[1] {
 33194  			break
 33195  		}
 33196  		o2 := o3.Args[1]
 33197  		if o2.Op != OpPPC64OR {
 33198  			break
 33199  		}
 33200  		if o2.Type != t {
 33201  			break
 33202  		}
 33203  		_ = o2.Args[1]
 33204  		o1 := o2.Args[0]
 33205  		if o1.Op != OpPPC64OR {
 33206  			break
 33207  		}
 33208  		if o1.Type != t {
 33209  			break
 33210  		}
 33211  		_ = o1.Args[1]
 33212  		s1 := o1.Args[0]
 33213  		if s1.Op != OpPPC64SLDconst {
 33214  			break
 33215  		}
 33216  		if s1.AuxInt != 16 {
 33217  			break
 33218  		}
 33219  		x2 := s1.Args[0]
 33220  		if x2.Op != OpPPC64MOVBZload {
 33221  			break
 33222  		}
 33223  		i2 := x2.AuxInt
 33224  		if x2.Aux != s {
 33225  			break
 33226  		}
 33227  		_ = x2.Args[1]
 33228  		if p != x2.Args[0] {
 33229  			break
 33230  		}
 33231  		if mem != x2.Args[1] {
 33232  			break
 33233  		}
 33234  		o0 := o1.Args[1]
 33235  		if o0.Op != OpPPC64OR {
 33236  			break
 33237  		}
 33238  		if o0.Type != t {
 33239  			break
 33240  		}
 33241  		_ = o0.Args[1]
 33242  		x0 := o0.Args[0]
 33243  		if x0.Op != OpPPC64MOVBZload {
 33244  			break
 33245  		}
 33246  		i0 := x0.AuxInt
 33247  		if x0.Aux != s {
 33248  			break
 33249  		}
 33250  		_ = x0.Args[1]
 33251  		if p != x0.Args[0] {
 33252  			break
 33253  		}
 33254  		if mem != x0.Args[1] {
 33255  			break
 33256  		}
 33257  		s0 := o0.Args[1]
 33258  		if s0.Op != OpPPC64SLDconst {
 33259  			break
 33260  		}
 33261  		if s0.AuxInt != 8 {
 33262  			break
 33263  		}
 33264  		x1 := s0.Args[0]
 33265  		if x1.Op != OpPPC64MOVBZload {
 33266  			break
 33267  		}
 33268  		i1 := x1.AuxInt
 33269  		if x1.Aux != s {
 33270  			break
 33271  		}
 33272  		_ = x1.Args[1]
 33273  		if p != x1.Args[0] {
 33274  			break
 33275  		}
 33276  		if mem != x1.Args[1] {
 33277  			break
 33278  		}
 33279  		s2 := o2.Args[1]
 33280  		if s2.Op != OpPPC64SLDconst {
 33281  			break
 33282  		}
 33283  		if s2.AuxInt != 24 {
 33284  			break
 33285  		}
 33286  		x3 := s2.Args[0]
 33287  		if x3.Op != OpPPC64MOVBZload {
 33288  			break
 33289  		}
 33290  		i3 := x3.AuxInt
 33291  		if x3.Aux != s {
 33292  			break
 33293  		}
 33294  		_ = x3.Args[1]
 33295  		if p != x3.Args[0] {
 33296  			break
 33297  		}
 33298  		if mem != x3.Args[1] {
 33299  			break
 33300  		}
 33301  		s5 := o5.Args[1]
 33302  		if s5.Op != OpPPC64SLDconst {
 33303  			break
 33304  		}
 33305  		if s5.AuxInt != 48 {
 33306  			break
 33307  		}
 33308  		x6 := s5.Args[0]
 33309  		if x6.Op != OpPPC64MOVBZload {
 33310  			break
 33311  		}
 33312  		i6 := x6.AuxInt
 33313  		if x6.Aux != s {
 33314  			break
 33315  		}
 33316  		_ = x6.Args[1]
 33317  		if p != x6.Args[0] {
 33318  			break
 33319  		}
 33320  		if mem != x6.Args[1] {
 33321  			break
 33322  		}
 33323  		s6 := v.Args[1]
 33324  		if s6.Op != OpPPC64SLDconst {
 33325  			break
 33326  		}
 33327  		if s6.AuxInt != 56 {
 33328  			break
 33329  		}
 33330  		x7 := s6.Args[0]
 33331  		if x7.Op != OpPPC64MOVBZload {
 33332  			break
 33333  		}
 33334  		i7 := x7.AuxInt
 33335  		if x7.Aux != s {
 33336  			break
 33337  		}
 33338  		_ = x7.Args[1]
 33339  		if p != x7.Args[0] {
 33340  			break
 33341  		}
 33342  		if mem != x7.Args[1] {
 33343  			break
 33344  		}
 33345  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 33346  			break
 33347  		}
 33348  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 33349  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 33350  		v.reset(OpCopy)
 33351  		v.AddArg(v0)
 33352  		v0.AuxInt = i0
 33353  		v0.Aux = s
 33354  		v0.AddArg(p)
 33355  		v0.AddArg(mem)
 33356  		return true
 33357  	}
 33358  	return false
 33359  }
 33360  func rewriteValuePPC64_OpPPC64OR_120(v *Value) bool {
 33361  	b := v.Block
 33362  	_ = b
 33363  	config := b.Func.Config
 33364  	_ = config
 33365  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 33366  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 33367  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 33368  	for {
 33369  		t := v.Type
 33370  		_ = v.Args[1]
 33371  		o5 := v.Args[0]
 33372  		if o5.Op != OpPPC64OR {
 33373  			break
 33374  		}
 33375  		if o5.Type != t {
 33376  			break
 33377  		}
 33378  		_ = o5.Args[1]
 33379  		o4 := o5.Args[0]
 33380  		if o4.Op != OpPPC64OR {
 33381  			break
 33382  		}
 33383  		if o4.Type != t {
 33384  			break
 33385  		}
 33386  		_ = o4.Args[1]
 33387  		s4 := o4.Args[0]
 33388  		if s4.Op != OpPPC64SLDconst {
 33389  			break
 33390  		}
 33391  		if s4.AuxInt != 40 {
 33392  			break
 33393  		}
 33394  		x5 := s4.Args[0]
 33395  		if x5.Op != OpPPC64MOVBZload {
 33396  			break
 33397  		}
 33398  		i5 := x5.AuxInt
 33399  		s := x5.Aux
 33400  		_ = x5.Args[1]
 33401  		p := x5.Args[0]
 33402  		mem := x5.Args[1]
 33403  		o3 := o4.Args[1]
 33404  		if o3.Op != OpPPC64OR {
 33405  			break
 33406  		}
 33407  		if o3.Type != t {
 33408  			break
 33409  		}
 33410  		_ = o3.Args[1]
 33411  		s3 := o3.Args[0]
 33412  		if s3.Op != OpPPC64SLDconst {
 33413  			break
 33414  		}
 33415  		if s3.AuxInt != 32 {
 33416  			break
 33417  		}
 33418  		x4 := s3.Args[0]
 33419  		if x4.Op != OpPPC64MOVBZload {
 33420  			break
 33421  		}
 33422  		i4 := x4.AuxInt
 33423  		if x4.Aux != s {
 33424  			break
 33425  		}
 33426  		_ = x4.Args[1]
 33427  		if p != x4.Args[0] {
 33428  			break
 33429  		}
 33430  		if mem != x4.Args[1] {
 33431  			break
 33432  		}
 33433  		o2 := o3.Args[1]
 33434  		if o2.Op != OpPPC64OR {
 33435  			break
 33436  		}
 33437  		if o2.Type != t {
 33438  			break
 33439  		}
 33440  		_ = o2.Args[1]
 33441  		o1 := o2.Args[0]
 33442  		if o1.Op != OpPPC64OR {
 33443  			break
 33444  		}
 33445  		if o1.Type != t {
 33446  			break
 33447  		}
 33448  		_ = o1.Args[1]
 33449  		o0 := o1.Args[0]
 33450  		if o0.Op != OpPPC64OR {
 33451  			break
 33452  		}
 33453  		if o0.Type != t {
 33454  			break
 33455  		}
 33456  		_ = o0.Args[1]
 33457  		s0 := o0.Args[0]
 33458  		if s0.Op != OpPPC64SLDconst {
 33459  			break
 33460  		}
 33461  		if s0.AuxInt != 8 {
 33462  			break
 33463  		}
 33464  		x1 := s0.Args[0]
 33465  		if x1.Op != OpPPC64MOVBZload {
 33466  			break
 33467  		}
 33468  		i1 := x1.AuxInt
 33469  		if x1.Aux != s {
 33470  			break
 33471  		}
 33472  		_ = x1.Args[1]
 33473  		if p != x1.Args[0] {
 33474  			break
 33475  		}
 33476  		if mem != x1.Args[1] {
 33477  			break
 33478  		}
 33479  		x0 := o0.Args[1]
 33480  		if x0.Op != OpPPC64MOVBZload {
 33481  			break
 33482  		}
 33483  		i0 := x0.AuxInt
 33484  		if x0.Aux != s {
 33485  			break
 33486  		}
 33487  		_ = x0.Args[1]
 33488  		if p != x0.Args[0] {
 33489  			break
 33490  		}
 33491  		if mem != x0.Args[1] {
 33492  			break
 33493  		}
 33494  		s1 := o1.Args[1]
 33495  		if s1.Op != OpPPC64SLDconst {
 33496  			break
 33497  		}
 33498  		if s1.AuxInt != 16 {
 33499  			break
 33500  		}
 33501  		x2 := s1.Args[0]
 33502  		if x2.Op != OpPPC64MOVBZload {
 33503  			break
 33504  		}
 33505  		i2 := x2.AuxInt
 33506  		if x2.Aux != s {
 33507  			break
 33508  		}
 33509  		_ = x2.Args[1]
 33510  		if p != x2.Args[0] {
 33511  			break
 33512  		}
 33513  		if mem != x2.Args[1] {
 33514  			break
 33515  		}
 33516  		s2 := o2.Args[1]
 33517  		if s2.Op != OpPPC64SLDconst {
 33518  			break
 33519  		}
 33520  		if s2.AuxInt != 24 {
 33521  			break
 33522  		}
 33523  		x3 := s2.Args[0]
 33524  		if x3.Op != OpPPC64MOVBZload {
 33525  			break
 33526  		}
 33527  		i3 := x3.AuxInt
 33528  		if x3.Aux != s {
 33529  			break
 33530  		}
 33531  		_ = x3.Args[1]
 33532  		if p != x3.Args[0] {
 33533  			break
 33534  		}
 33535  		if mem != x3.Args[1] {
 33536  			break
 33537  		}
 33538  		s5 := o5.Args[1]
 33539  		if s5.Op != OpPPC64SLDconst {
 33540  			break
 33541  		}
 33542  		if s5.AuxInt != 48 {
 33543  			break
 33544  		}
 33545  		x6 := s5.Args[0]
 33546  		if x6.Op != OpPPC64MOVBZload {
 33547  			break
 33548  		}
 33549  		i6 := x6.AuxInt
 33550  		if x6.Aux != s {
 33551  			break
 33552  		}
 33553  		_ = x6.Args[1]
 33554  		if p != x6.Args[0] {
 33555  			break
 33556  		}
 33557  		if mem != x6.Args[1] {
 33558  			break
 33559  		}
 33560  		s6 := v.Args[1]
 33561  		if s6.Op != OpPPC64SLDconst {
 33562  			break
 33563  		}
 33564  		if s6.AuxInt != 56 {
 33565  			break
 33566  		}
 33567  		x7 := s6.Args[0]
 33568  		if x7.Op != OpPPC64MOVBZload {
 33569  			break
 33570  		}
 33571  		i7 := x7.AuxInt
 33572  		if x7.Aux != s {
 33573  			break
 33574  		}
 33575  		_ = x7.Args[1]
 33576  		if p != x7.Args[0] {
 33577  			break
 33578  		}
 33579  		if mem != x7.Args[1] {
 33580  			break
 33581  		}
 33582  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 33583  			break
 33584  		}
 33585  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 33586  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 33587  		v.reset(OpCopy)
 33588  		v.AddArg(v0)
 33589  		v0.AuxInt = i0
 33590  		v0.Aux = s
 33591  		v0.AddArg(p)
 33592  		v0.AddArg(mem)
 33593  		return true
 33594  	}
 33595  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 33596  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 33597  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 33598  	for {
 33599  		t := v.Type
 33600  		_ = v.Args[1]
 33601  		o5 := v.Args[0]
 33602  		if o5.Op != OpPPC64OR {
 33603  			break
 33604  		}
 33605  		if o5.Type != t {
 33606  			break
 33607  		}
 33608  		_ = o5.Args[1]
 33609  		o4 := o5.Args[0]
 33610  		if o4.Op != OpPPC64OR {
 33611  			break
 33612  		}
 33613  		if o4.Type != t {
 33614  			break
 33615  		}
 33616  		_ = o4.Args[1]
 33617  		s4 := o4.Args[0]
 33618  		if s4.Op != OpPPC64SLDconst {
 33619  			break
 33620  		}
 33621  		if s4.AuxInt != 40 {
 33622  			break
 33623  		}
 33624  		x5 := s4.Args[0]
 33625  		if x5.Op != OpPPC64MOVBZload {
 33626  			break
 33627  		}
 33628  		i5 := x5.AuxInt
 33629  		s := x5.Aux
 33630  		_ = x5.Args[1]
 33631  		p := x5.Args[0]
 33632  		mem := x5.Args[1]
 33633  		o3 := o4.Args[1]
 33634  		if o3.Op != OpPPC64OR {
 33635  			break
 33636  		}
 33637  		if o3.Type != t {
 33638  			break
 33639  		}
 33640  		_ = o3.Args[1]
 33641  		s3 := o3.Args[0]
 33642  		if s3.Op != OpPPC64SLDconst {
 33643  			break
 33644  		}
 33645  		if s3.AuxInt != 32 {
 33646  			break
 33647  		}
 33648  		x4 := s3.Args[0]
 33649  		if x4.Op != OpPPC64MOVBZload {
 33650  			break
 33651  		}
 33652  		i4 := x4.AuxInt
 33653  		if x4.Aux != s {
 33654  			break
 33655  		}
 33656  		_ = x4.Args[1]
 33657  		if p != x4.Args[0] {
 33658  			break
 33659  		}
 33660  		if mem != x4.Args[1] {
 33661  			break
 33662  		}
 33663  		o2 := o3.Args[1]
 33664  		if o2.Op != OpPPC64OR {
 33665  			break
 33666  		}
 33667  		if o2.Type != t {
 33668  			break
 33669  		}
 33670  		_ = o2.Args[1]
 33671  		o1 := o2.Args[0]
 33672  		if o1.Op != OpPPC64OR {
 33673  			break
 33674  		}
 33675  		if o1.Type != t {
 33676  			break
 33677  		}
 33678  		_ = o1.Args[1]
 33679  		o0 := o1.Args[0]
 33680  		if o0.Op != OpPPC64OR {
 33681  			break
 33682  		}
 33683  		if o0.Type != t {
 33684  			break
 33685  		}
 33686  		_ = o0.Args[1]
 33687  		x0 := o0.Args[0]
 33688  		if x0.Op != OpPPC64MOVBZload {
 33689  			break
 33690  		}
 33691  		i0 := x0.AuxInt
 33692  		if x0.Aux != s {
 33693  			break
 33694  		}
 33695  		_ = x0.Args[1]
 33696  		if p != x0.Args[0] {
 33697  			break
 33698  		}
 33699  		if mem != x0.Args[1] {
 33700  			break
 33701  		}
 33702  		s0 := o0.Args[1]
 33703  		if s0.Op != OpPPC64SLDconst {
 33704  			break
 33705  		}
 33706  		if s0.AuxInt != 8 {
 33707  			break
 33708  		}
 33709  		x1 := s0.Args[0]
 33710  		if x1.Op != OpPPC64MOVBZload {
 33711  			break
 33712  		}
 33713  		i1 := x1.AuxInt
 33714  		if x1.Aux != s {
 33715  			break
 33716  		}
 33717  		_ = x1.Args[1]
 33718  		if p != x1.Args[0] {
 33719  			break
 33720  		}
 33721  		if mem != x1.Args[1] {
 33722  			break
 33723  		}
 33724  		s1 := o1.Args[1]
 33725  		if s1.Op != OpPPC64SLDconst {
 33726  			break
 33727  		}
 33728  		if s1.AuxInt != 16 {
 33729  			break
 33730  		}
 33731  		x2 := s1.Args[0]
 33732  		if x2.Op != OpPPC64MOVBZload {
 33733  			break
 33734  		}
 33735  		i2 := x2.AuxInt
 33736  		if x2.Aux != s {
 33737  			break
 33738  		}
 33739  		_ = x2.Args[1]
 33740  		if p != x2.Args[0] {
 33741  			break
 33742  		}
 33743  		if mem != x2.Args[1] {
 33744  			break
 33745  		}
 33746  		s2 := o2.Args[1]
 33747  		if s2.Op != OpPPC64SLDconst {
 33748  			break
 33749  		}
 33750  		if s2.AuxInt != 24 {
 33751  			break
 33752  		}
 33753  		x3 := s2.Args[0]
 33754  		if x3.Op != OpPPC64MOVBZload {
 33755  			break
 33756  		}
 33757  		i3 := x3.AuxInt
 33758  		if x3.Aux != s {
 33759  			break
 33760  		}
 33761  		_ = x3.Args[1]
 33762  		if p != x3.Args[0] {
 33763  			break
 33764  		}
 33765  		if mem != x3.Args[1] {
 33766  			break
 33767  		}
 33768  		s5 := o5.Args[1]
 33769  		if s5.Op != OpPPC64SLDconst {
 33770  			break
 33771  		}
 33772  		if s5.AuxInt != 48 {
 33773  			break
 33774  		}
 33775  		x6 := s5.Args[0]
 33776  		if x6.Op != OpPPC64MOVBZload {
 33777  			break
 33778  		}
 33779  		i6 := x6.AuxInt
 33780  		if x6.Aux != s {
 33781  			break
 33782  		}
 33783  		_ = x6.Args[1]
 33784  		if p != x6.Args[0] {
 33785  			break
 33786  		}
 33787  		if mem != x6.Args[1] {
 33788  			break
 33789  		}
 33790  		s6 := v.Args[1]
 33791  		if s6.Op != OpPPC64SLDconst {
 33792  			break
 33793  		}
 33794  		if s6.AuxInt != 56 {
 33795  			break
 33796  		}
 33797  		x7 := s6.Args[0]
 33798  		if x7.Op != OpPPC64MOVBZload {
 33799  			break
 33800  		}
 33801  		i7 := x7.AuxInt
 33802  		if x7.Aux != s {
 33803  			break
 33804  		}
 33805  		_ = x7.Args[1]
 33806  		if p != x7.Args[0] {
 33807  			break
 33808  		}
 33809  		if mem != x7.Args[1] {
 33810  			break
 33811  		}
 33812  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 33813  			break
 33814  		}
 33815  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 33816  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 33817  		v.reset(OpCopy)
 33818  		v.AddArg(v0)
 33819  		v0.AuxInt = i0
 33820  		v0.Aux = s
 33821  		v0.AddArg(p)
 33822  		v0.AddArg(mem)
 33823  		return true
 33824  	}
 33825  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 33826  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 33827  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 33828  	for {
 33829  		t := v.Type
 33830  		_ = v.Args[1]
 33831  		o5 := v.Args[0]
 33832  		if o5.Op != OpPPC64OR {
 33833  			break
 33834  		}
 33835  		if o5.Type != t {
 33836  			break
 33837  		}
 33838  		_ = o5.Args[1]
 33839  		o4 := o5.Args[0]
 33840  		if o4.Op != OpPPC64OR {
 33841  			break
 33842  		}
 33843  		if o4.Type != t {
 33844  			break
 33845  		}
 33846  		_ = o4.Args[1]
 33847  		s4 := o4.Args[0]
 33848  		if s4.Op != OpPPC64SLDconst {
 33849  			break
 33850  		}
 33851  		if s4.AuxInt != 40 {
 33852  			break
 33853  		}
 33854  		x5 := s4.Args[0]
 33855  		if x5.Op != OpPPC64MOVBZload {
 33856  			break
 33857  		}
 33858  		i5 := x5.AuxInt
 33859  		s := x5.Aux
 33860  		_ = x5.Args[1]
 33861  		p := x5.Args[0]
 33862  		mem := x5.Args[1]
 33863  		o3 := o4.Args[1]
 33864  		if o3.Op != OpPPC64OR {
 33865  			break
 33866  		}
 33867  		if o3.Type != t {
 33868  			break
 33869  		}
 33870  		_ = o3.Args[1]
 33871  		o2 := o3.Args[0]
 33872  		if o2.Op != OpPPC64OR {
 33873  			break
 33874  		}
 33875  		if o2.Type != t {
 33876  			break
 33877  		}
 33878  		_ = o2.Args[1]
 33879  		s2 := o2.Args[0]
 33880  		if s2.Op != OpPPC64SLDconst {
 33881  			break
 33882  		}
 33883  		if s2.AuxInt != 24 {
 33884  			break
 33885  		}
 33886  		x3 := s2.Args[0]
 33887  		if x3.Op != OpPPC64MOVBZload {
 33888  			break
 33889  		}
 33890  		i3 := x3.AuxInt
 33891  		if x3.Aux != s {
 33892  			break
 33893  		}
 33894  		_ = x3.Args[1]
 33895  		if p != x3.Args[0] {
 33896  			break
 33897  		}
 33898  		if mem != x3.Args[1] {
 33899  			break
 33900  		}
 33901  		o1 := o2.Args[1]
 33902  		if o1.Op != OpPPC64OR {
 33903  			break
 33904  		}
 33905  		if o1.Type != t {
 33906  			break
 33907  		}
 33908  		_ = o1.Args[1]
 33909  		s1 := o1.Args[0]
 33910  		if s1.Op != OpPPC64SLDconst {
 33911  			break
 33912  		}
 33913  		if s1.AuxInt != 16 {
 33914  			break
 33915  		}
 33916  		x2 := s1.Args[0]
 33917  		if x2.Op != OpPPC64MOVBZload {
 33918  			break
 33919  		}
 33920  		i2 := x2.AuxInt
 33921  		if x2.Aux != s {
 33922  			break
 33923  		}
 33924  		_ = x2.Args[1]
 33925  		if p != x2.Args[0] {
 33926  			break
 33927  		}
 33928  		if mem != x2.Args[1] {
 33929  			break
 33930  		}
 33931  		o0 := o1.Args[1]
 33932  		if o0.Op != OpPPC64OR {
 33933  			break
 33934  		}
 33935  		if o0.Type != t {
 33936  			break
 33937  		}
 33938  		_ = o0.Args[1]
 33939  		s0 := o0.Args[0]
 33940  		if s0.Op != OpPPC64SLDconst {
 33941  			break
 33942  		}
 33943  		if s0.AuxInt != 8 {
 33944  			break
 33945  		}
 33946  		x1 := s0.Args[0]
 33947  		if x1.Op != OpPPC64MOVBZload {
 33948  			break
 33949  		}
 33950  		i1 := x1.AuxInt
 33951  		if x1.Aux != s {
 33952  			break
 33953  		}
 33954  		_ = x1.Args[1]
 33955  		if p != x1.Args[0] {
 33956  			break
 33957  		}
 33958  		if mem != x1.Args[1] {
 33959  			break
 33960  		}
 33961  		x0 := o0.Args[1]
 33962  		if x0.Op != OpPPC64MOVBZload {
 33963  			break
 33964  		}
 33965  		i0 := x0.AuxInt
 33966  		if x0.Aux != s {
 33967  			break
 33968  		}
 33969  		_ = x0.Args[1]
 33970  		if p != x0.Args[0] {
 33971  			break
 33972  		}
 33973  		if mem != x0.Args[1] {
 33974  			break
 33975  		}
 33976  		s3 := o3.Args[1]
 33977  		if s3.Op != OpPPC64SLDconst {
 33978  			break
 33979  		}
 33980  		if s3.AuxInt != 32 {
 33981  			break
 33982  		}
 33983  		x4 := s3.Args[0]
 33984  		if x4.Op != OpPPC64MOVBZload {
 33985  			break
 33986  		}
 33987  		i4 := x4.AuxInt
 33988  		if x4.Aux != s {
 33989  			break
 33990  		}
 33991  		_ = x4.Args[1]
 33992  		if p != x4.Args[0] {
 33993  			break
 33994  		}
 33995  		if mem != x4.Args[1] {
 33996  			break
 33997  		}
 33998  		s5 := o5.Args[1]
 33999  		if s5.Op != OpPPC64SLDconst {
 34000  			break
 34001  		}
 34002  		if s5.AuxInt != 48 {
 34003  			break
 34004  		}
 34005  		x6 := s5.Args[0]
 34006  		if x6.Op != OpPPC64MOVBZload {
 34007  			break
 34008  		}
 34009  		i6 := x6.AuxInt
 34010  		if x6.Aux != s {
 34011  			break
 34012  		}
 34013  		_ = x6.Args[1]
 34014  		if p != x6.Args[0] {
 34015  			break
 34016  		}
 34017  		if mem != x6.Args[1] {
 34018  			break
 34019  		}
 34020  		s6 := v.Args[1]
 34021  		if s6.Op != OpPPC64SLDconst {
 34022  			break
 34023  		}
 34024  		if s6.AuxInt != 56 {
 34025  			break
 34026  		}
 34027  		x7 := s6.Args[0]
 34028  		if x7.Op != OpPPC64MOVBZload {
 34029  			break
 34030  		}
 34031  		i7 := x7.AuxInt
 34032  		if x7.Aux != s {
 34033  			break
 34034  		}
 34035  		_ = x7.Args[1]
 34036  		if p != x7.Args[0] {
 34037  			break
 34038  		}
 34039  		if mem != x7.Args[1] {
 34040  			break
 34041  		}
 34042  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34043  			break
 34044  		}
 34045  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34046  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34047  		v.reset(OpCopy)
 34048  		v.AddArg(v0)
 34049  		v0.AuxInt = i0
 34050  		v0.Aux = s
 34051  		v0.AddArg(p)
 34052  		v0.AddArg(mem)
 34053  		return true
 34054  	}
 34055  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34056  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34057  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34058  	for {
 34059  		t := v.Type
 34060  		_ = v.Args[1]
 34061  		o5 := v.Args[0]
 34062  		if o5.Op != OpPPC64OR {
 34063  			break
 34064  		}
 34065  		if o5.Type != t {
 34066  			break
 34067  		}
 34068  		_ = o5.Args[1]
 34069  		o4 := o5.Args[0]
 34070  		if o4.Op != OpPPC64OR {
 34071  			break
 34072  		}
 34073  		if o4.Type != t {
 34074  			break
 34075  		}
 34076  		_ = o4.Args[1]
 34077  		s4 := o4.Args[0]
 34078  		if s4.Op != OpPPC64SLDconst {
 34079  			break
 34080  		}
 34081  		if s4.AuxInt != 40 {
 34082  			break
 34083  		}
 34084  		x5 := s4.Args[0]
 34085  		if x5.Op != OpPPC64MOVBZload {
 34086  			break
 34087  		}
 34088  		i5 := x5.AuxInt
 34089  		s := x5.Aux
 34090  		_ = x5.Args[1]
 34091  		p := x5.Args[0]
 34092  		mem := x5.Args[1]
 34093  		o3 := o4.Args[1]
 34094  		if o3.Op != OpPPC64OR {
 34095  			break
 34096  		}
 34097  		if o3.Type != t {
 34098  			break
 34099  		}
 34100  		_ = o3.Args[1]
 34101  		o2 := o3.Args[0]
 34102  		if o2.Op != OpPPC64OR {
 34103  			break
 34104  		}
 34105  		if o2.Type != t {
 34106  			break
 34107  		}
 34108  		_ = o2.Args[1]
 34109  		s2 := o2.Args[0]
 34110  		if s2.Op != OpPPC64SLDconst {
 34111  			break
 34112  		}
 34113  		if s2.AuxInt != 24 {
 34114  			break
 34115  		}
 34116  		x3 := s2.Args[0]
 34117  		if x3.Op != OpPPC64MOVBZload {
 34118  			break
 34119  		}
 34120  		i3 := x3.AuxInt
 34121  		if x3.Aux != s {
 34122  			break
 34123  		}
 34124  		_ = x3.Args[1]
 34125  		if p != x3.Args[0] {
 34126  			break
 34127  		}
 34128  		if mem != x3.Args[1] {
 34129  			break
 34130  		}
 34131  		o1 := o2.Args[1]
 34132  		if o1.Op != OpPPC64OR {
 34133  			break
 34134  		}
 34135  		if o1.Type != t {
 34136  			break
 34137  		}
 34138  		_ = o1.Args[1]
 34139  		s1 := o1.Args[0]
 34140  		if s1.Op != OpPPC64SLDconst {
 34141  			break
 34142  		}
 34143  		if s1.AuxInt != 16 {
 34144  			break
 34145  		}
 34146  		x2 := s1.Args[0]
 34147  		if x2.Op != OpPPC64MOVBZload {
 34148  			break
 34149  		}
 34150  		i2 := x2.AuxInt
 34151  		if x2.Aux != s {
 34152  			break
 34153  		}
 34154  		_ = x2.Args[1]
 34155  		if p != x2.Args[0] {
 34156  			break
 34157  		}
 34158  		if mem != x2.Args[1] {
 34159  			break
 34160  		}
 34161  		o0 := o1.Args[1]
 34162  		if o0.Op != OpPPC64OR {
 34163  			break
 34164  		}
 34165  		if o0.Type != t {
 34166  			break
 34167  		}
 34168  		_ = o0.Args[1]
 34169  		x0 := o0.Args[0]
 34170  		if x0.Op != OpPPC64MOVBZload {
 34171  			break
 34172  		}
 34173  		i0 := x0.AuxInt
 34174  		if x0.Aux != s {
 34175  			break
 34176  		}
 34177  		_ = x0.Args[1]
 34178  		if p != x0.Args[0] {
 34179  			break
 34180  		}
 34181  		if mem != x0.Args[1] {
 34182  			break
 34183  		}
 34184  		s0 := o0.Args[1]
 34185  		if s0.Op != OpPPC64SLDconst {
 34186  			break
 34187  		}
 34188  		if s0.AuxInt != 8 {
 34189  			break
 34190  		}
 34191  		x1 := s0.Args[0]
 34192  		if x1.Op != OpPPC64MOVBZload {
 34193  			break
 34194  		}
 34195  		i1 := x1.AuxInt
 34196  		if x1.Aux != s {
 34197  			break
 34198  		}
 34199  		_ = x1.Args[1]
 34200  		if p != x1.Args[0] {
 34201  			break
 34202  		}
 34203  		if mem != x1.Args[1] {
 34204  			break
 34205  		}
 34206  		s3 := o3.Args[1]
 34207  		if s3.Op != OpPPC64SLDconst {
 34208  			break
 34209  		}
 34210  		if s3.AuxInt != 32 {
 34211  			break
 34212  		}
 34213  		x4 := s3.Args[0]
 34214  		if x4.Op != OpPPC64MOVBZload {
 34215  			break
 34216  		}
 34217  		i4 := x4.AuxInt
 34218  		if x4.Aux != s {
 34219  			break
 34220  		}
 34221  		_ = x4.Args[1]
 34222  		if p != x4.Args[0] {
 34223  			break
 34224  		}
 34225  		if mem != x4.Args[1] {
 34226  			break
 34227  		}
 34228  		s5 := o5.Args[1]
 34229  		if s5.Op != OpPPC64SLDconst {
 34230  			break
 34231  		}
 34232  		if s5.AuxInt != 48 {
 34233  			break
 34234  		}
 34235  		x6 := s5.Args[0]
 34236  		if x6.Op != OpPPC64MOVBZload {
 34237  			break
 34238  		}
 34239  		i6 := x6.AuxInt
 34240  		if x6.Aux != s {
 34241  			break
 34242  		}
 34243  		_ = x6.Args[1]
 34244  		if p != x6.Args[0] {
 34245  			break
 34246  		}
 34247  		if mem != x6.Args[1] {
 34248  			break
 34249  		}
 34250  		s6 := v.Args[1]
 34251  		if s6.Op != OpPPC64SLDconst {
 34252  			break
 34253  		}
 34254  		if s6.AuxInt != 56 {
 34255  			break
 34256  		}
 34257  		x7 := s6.Args[0]
 34258  		if x7.Op != OpPPC64MOVBZload {
 34259  			break
 34260  		}
 34261  		i7 := x7.AuxInt
 34262  		if x7.Aux != s {
 34263  			break
 34264  		}
 34265  		_ = x7.Args[1]
 34266  		if p != x7.Args[0] {
 34267  			break
 34268  		}
 34269  		if mem != x7.Args[1] {
 34270  			break
 34271  		}
 34272  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34273  			break
 34274  		}
 34275  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34276  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34277  		v.reset(OpCopy)
 34278  		v.AddArg(v0)
 34279  		v0.AuxInt = i0
 34280  		v0.Aux = s
 34281  		v0.AddArg(p)
 34282  		v0.AddArg(mem)
 34283  		return true
 34284  	}
 34285  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34286  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34287  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34288  	for {
 34289  		t := v.Type
 34290  		_ = v.Args[1]
 34291  		o5 := v.Args[0]
 34292  		if o5.Op != OpPPC64OR {
 34293  			break
 34294  		}
 34295  		if o5.Type != t {
 34296  			break
 34297  		}
 34298  		_ = o5.Args[1]
 34299  		o4 := o5.Args[0]
 34300  		if o4.Op != OpPPC64OR {
 34301  			break
 34302  		}
 34303  		if o4.Type != t {
 34304  			break
 34305  		}
 34306  		_ = o4.Args[1]
 34307  		s4 := o4.Args[0]
 34308  		if s4.Op != OpPPC64SLDconst {
 34309  			break
 34310  		}
 34311  		if s4.AuxInt != 40 {
 34312  			break
 34313  		}
 34314  		x5 := s4.Args[0]
 34315  		if x5.Op != OpPPC64MOVBZload {
 34316  			break
 34317  		}
 34318  		i5 := x5.AuxInt
 34319  		s := x5.Aux
 34320  		_ = x5.Args[1]
 34321  		p := x5.Args[0]
 34322  		mem := x5.Args[1]
 34323  		o3 := o4.Args[1]
 34324  		if o3.Op != OpPPC64OR {
 34325  			break
 34326  		}
 34327  		if o3.Type != t {
 34328  			break
 34329  		}
 34330  		_ = o3.Args[1]
 34331  		o2 := o3.Args[0]
 34332  		if o2.Op != OpPPC64OR {
 34333  			break
 34334  		}
 34335  		if o2.Type != t {
 34336  			break
 34337  		}
 34338  		_ = o2.Args[1]
 34339  		s2 := o2.Args[0]
 34340  		if s2.Op != OpPPC64SLDconst {
 34341  			break
 34342  		}
 34343  		if s2.AuxInt != 24 {
 34344  			break
 34345  		}
 34346  		x3 := s2.Args[0]
 34347  		if x3.Op != OpPPC64MOVBZload {
 34348  			break
 34349  		}
 34350  		i3 := x3.AuxInt
 34351  		if x3.Aux != s {
 34352  			break
 34353  		}
 34354  		_ = x3.Args[1]
 34355  		if p != x3.Args[0] {
 34356  			break
 34357  		}
 34358  		if mem != x3.Args[1] {
 34359  			break
 34360  		}
 34361  		o1 := o2.Args[1]
 34362  		if o1.Op != OpPPC64OR {
 34363  			break
 34364  		}
 34365  		if o1.Type != t {
 34366  			break
 34367  		}
 34368  		_ = o1.Args[1]
 34369  		o0 := o1.Args[0]
 34370  		if o0.Op != OpPPC64OR {
 34371  			break
 34372  		}
 34373  		if o0.Type != t {
 34374  			break
 34375  		}
 34376  		_ = o0.Args[1]
 34377  		s0 := o0.Args[0]
 34378  		if s0.Op != OpPPC64SLDconst {
 34379  			break
 34380  		}
 34381  		if s0.AuxInt != 8 {
 34382  			break
 34383  		}
 34384  		x1 := s0.Args[0]
 34385  		if x1.Op != OpPPC64MOVBZload {
 34386  			break
 34387  		}
 34388  		i1 := x1.AuxInt
 34389  		if x1.Aux != s {
 34390  			break
 34391  		}
 34392  		_ = x1.Args[1]
 34393  		if p != x1.Args[0] {
 34394  			break
 34395  		}
 34396  		if mem != x1.Args[1] {
 34397  			break
 34398  		}
 34399  		x0 := o0.Args[1]
 34400  		if x0.Op != OpPPC64MOVBZload {
 34401  			break
 34402  		}
 34403  		i0 := x0.AuxInt
 34404  		if x0.Aux != s {
 34405  			break
 34406  		}
 34407  		_ = x0.Args[1]
 34408  		if p != x0.Args[0] {
 34409  			break
 34410  		}
 34411  		if mem != x0.Args[1] {
 34412  			break
 34413  		}
 34414  		s1 := o1.Args[1]
 34415  		if s1.Op != OpPPC64SLDconst {
 34416  			break
 34417  		}
 34418  		if s1.AuxInt != 16 {
 34419  			break
 34420  		}
 34421  		x2 := s1.Args[0]
 34422  		if x2.Op != OpPPC64MOVBZload {
 34423  			break
 34424  		}
 34425  		i2 := x2.AuxInt
 34426  		if x2.Aux != s {
 34427  			break
 34428  		}
 34429  		_ = x2.Args[1]
 34430  		if p != x2.Args[0] {
 34431  			break
 34432  		}
 34433  		if mem != x2.Args[1] {
 34434  			break
 34435  		}
 34436  		s3 := o3.Args[1]
 34437  		if s3.Op != OpPPC64SLDconst {
 34438  			break
 34439  		}
 34440  		if s3.AuxInt != 32 {
 34441  			break
 34442  		}
 34443  		x4 := s3.Args[0]
 34444  		if x4.Op != OpPPC64MOVBZload {
 34445  			break
 34446  		}
 34447  		i4 := x4.AuxInt
 34448  		if x4.Aux != s {
 34449  			break
 34450  		}
 34451  		_ = x4.Args[1]
 34452  		if p != x4.Args[0] {
 34453  			break
 34454  		}
 34455  		if mem != x4.Args[1] {
 34456  			break
 34457  		}
 34458  		s5 := o5.Args[1]
 34459  		if s5.Op != OpPPC64SLDconst {
 34460  			break
 34461  		}
 34462  		if s5.AuxInt != 48 {
 34463  			break
 34464  		}
 34465  		x6 := s5.Args[0]
 34466  		if x6.Op != OpPPC64MOVBZload {
 34467  			break
 34468  		}
 34469  		i6 := x6.AuxInt
 34470  		if x6.Aux != s {
 34471  			break
 34472  		}
 34473  		_ = x6.Args[1]
 34474  		if p != x6.Args[0] {
 34475  			break
 34476  		}
 34477  		if mem != x6.Args[1] {
 34478  			break
 34479  		}
 34480  		s6 := v.Args[1]
 34481  		if s6.Op != OpPPC64SLDconst {
 34482  			break
 34483  		}
 34484  		if s6.AuxInt != 56 {
 34485  			break
 34486  		}
 34487  		x7 := s6.Args[0]
 34488  		if x7.Op != OpPPC64MOVBZload {
 34489  			break
 34490  		}
 34491  		i7 := x7.AuxInt
 34492  		if x7.Aux != s {
 34493  			break
 34494  		}
 34495  		_ = x7.Args[1]
 34496  		if p != x7.Args[0] {
 34497  			break
 34498  		}
 34499  		if mem != x7.Args[1] {
 34500  			break
 34501  		}
 34502  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34503  			break
 34504  		}
 34505  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34506  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34507  		v.reset(OpCopy)
 34508  		v.AddArg(v0)
 34509  		v0.AuxInt = i0
 34510  		v0.Aux = s
 34511  		v0.AddArg(p)
 34512  		v0.AddArg(mem)
 34513  		return true
 34514  	}
 34515  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34516  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34517  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34518  	for {
 34519  		t := v.Type
 34520  		_ = v.Args[1]
 34521  		o5 := v.Args[0]
 34522  		if o5.Op != OpPPC64OR {
 34523  			break
 34524  		}
 34525  		if o5.Type != t {
 34526  			break
 34527  		}
 34528  		_ = o5.Args[1]
 34529  		o4 := o5.Args[0]
 34530  		if o4.Op != OpPPC64OR {
 34531  			break
 34532  		}
 34533  		if o4.Type != t {
 34534  			break
 34535  		}
 34536  		_ = o4.Args[1]
 34537  		s4 := o4.Args[0]
 34538  		if s4.Op != OpPPC64SLDconst {
 34539  			break
 34540  		}
 34541  		if s4.AuxInt != 40 {
 34542  			break
 34543  		}
 34544  		x5 := s4.Args[0]
 34545  		if x5.Op != OpPPC64MOVBZload {
 34546  			break
 34547  		}
 34548  		i5 := x5.AuxInt
 34549  		s := x5.Aux
 34550  		_ = x5.Args[1]
 34551  		p := x5.Args[0]
 34552  		mem := x5.Args[1]
 34553  		o3 := o4.Args[1]
 34554  		if o3.Op != OpPPC64OR {
 34555  			break
 34556  		}
 34557  		if o3.Type != t {
 34558  			break
 34559  		}
 34560  		_ = o3.Args[1]
 34561  		o2 := o3.Args[0]
 34562  		if o2.Op != OpPPC64OR {
 34563  			break
 34564  		}
 34565  		if o2.Type != t {
 34566  			break
 34567  		}
 34568  		_ = o2.Args[1]
 34569  		s2 := o2.Args[0]
 34570  		if s2.Op != OpPPC64SLDconst {
 34571  			break
 34572  		}
 34573  		if s2.AuxInt != 24 {
 34574  			break
 34575  		}
 34576  		x3 := s2.Args[0]
 34577  		if x3.Op != OpPPC64MOVBZload {
 34578  			break
 34579  		}
 34580  		i3 := x3.AuxInt
 34581  		if x3.Aux != s {
 34582  			break
 34583  		}
 34584  		_ = x3.Args[1]
 34585  		if p != x3.Args[0] {
 34586  			break
 34587  		}
 34588  		if mem != x3.Args[1] {
 34589  			break
 34590  		}
 34591  		o1 := o2.Args[1]
 34592  		if o1.Op != OpPPC64OR {
 34593  			break
 34594  		}
 34595  		if o1.Type != t {
 34596  			break
 34597  		}
 34598  		_ = o1.Args[1]
 34599  		o0 := o1.Args[0]
 34600  		if o0.Op != OpPPC64OR {
 34601  			break
 34602  		}
 34603  		if o0.Type != t {
 34604  			break
 34605  		}
 34606  		_ = o0.Args[1]
 34607  		x0 := o0.Args[0]
 34608  		if x0.Op != OpPPC64MOVBZload {
 34609  			break
 34610  		}
 34611  		i0 := x0.AuxInt
 34612  		if x0.Aux != s {
 34613  			break
 34614  		}
 34615  		_ = x0.Args[1]
 34616  		if p != x0.Args[0] {
 34617  			break
 34618  		}
 34619  		if mem != x0.Args[1] {
 34620  			break
 34621  		}
 34622  		s0 := o0.Args[1]
 34623  		if s0.Op != OpPPC64SLDconst {
 34624  			break
 34625  		}
 34626  		if s0.AuxInt != 8 {
 34627  			break
 34628  		}
 34629  		x1 := s0.Args[0]
 34630  		if x1.Op != OpPPC64MOVBZload {
 34631  			break
 34632  		}
 34633  		i1 := x1.AuxInt
 34634  		if x1.Aux != s {
 34635  			break
 34636  		}
 34637  		_ = x1.Args[1]
 34638  		if p != x1.Args[0] {
 34639  			break
 34640  		}
 34641  		if mem != x1.Args[1] {
 34642  			break
 34643  		}
 34644  		s1 := o1.Args[1]
 34645  		if s1.Op != OpPPC64SLDconst {
 34646  			break
 34647  		}
 34648  		if s1.AuxInt != 16 {
 34649  			break
 34650  		}
 34651  		x2 := s1.Args[0]
 34652  		if x2.Op != OpPPC64MOVBZload {
 34653  			break
 34654  		}
 34655  		i2 := x2.AuxInt
 34656  		if x2.Aux != s {
 34657  			break
 34658  		}
 34659  		_ = x2.Args[1]
 34660  		if p != x2.Args[0] {
 34661  			break
 34662  		}
 34663  		if mem != x2.Args[1] {
 34664  			break
 34665  		}
 34666  		s3 := o3.Args[1]
 34667  		if s3.Op != OpPPC64SLDconst {
 34668  			break
 34669  		}
 34670  		if s3.AuxInt != 32 {
 34671  			break
 34672  		}
 34673  		x4 := s3.Args[0]
 34674  		if x4.Op != OpPPC64MOVBZload {
 34675  			break
 34676  		}
 34677  		i4 := x4.AuxInt
 34678  		if x4.Aux != s {
 34679  			break
 34680  		}
 34681  		_ = x4.Args[1]
 34682  		if p != x4.Args[0] {
 34683  			break
 34684  		}
 34685  		if mem != x4.Args[1] {
 34686  			break
 34687  		}
 34688  		s5 := o5.Args[1]
 34689  		if s5.Op != OpPPC64SLDconst {
 34690  			break
 34691  		}
 34692  		if s5.AuxInt != 48 {
 34693  			break
 34694  		}
 34695  		x6 := s5.Args[0]
 34696  		if x6.Op != OpPPC64MOVBZload {
 34697  			break
 34698  		}
 34699  		i6 := x6.AuxInt
 34700  		if x6.Aux != s {
 34701  			break
 34702  		}
 34703  		_ = x6.Args[1]
 34704  		if p != x6.Args[0] {
 34705  			break
 34706  		}
 34707  		if mem != x6.Args[1] {
 34708  			break
 34709  		}
 34710  		s6 := v.Args[1]
 34711  		if s6.Op != OpPPC64SLDconst {
 34712  			break
 34713  		}
 34714  		if s6.AuxInt != 56 {
 34715  			break
 34716  		}
 34717  		x7 := s6.Args[0]
 34718  		if x7.Op != OpPPC64MOVBZload {
 34719  			break
 34720  		}
 34721  		i7 := x7.AuxInt
 34722  		if x7.Aux != s {
 34723  			break
 34724  		}
 34725  		_ = x7.Args[1]
 34726  		if p != x7.Args[0] {
 34727  			break
 34728  		}
 34729  		if mem != x7.Args[1] {
 34730  			break
 34731  		}
 34732  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34733  			break
 34734  		}
 34735  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34736  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34737  		v.reset(OpCopy)
 34738  		v.AddArg(v0)
 34739  		v0.AuxInt = i0
 34740  		v0.Aux = s
 34741  		v0.AddArg(p)
 34742  		v0.AddArg(mem)
 34743  		return true
 34744  	}
 34745  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34746  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34747  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34748  	for {
 34749  		t := v.Type
 34750  		_ = v.Args[1]
 34751  		o5 := v.Args[0]
 34752  		if o5.Op != OpPPC64OR {
 34753  			break
 34754  		}
 34755  		if o5.Type != t {
 34756  			break
 34757  		}
 34758  		_ = o5.Args[1]
 34759  		o4 := o5.Args[0]
 34760  		if o4.Op != OpPPC64OR {
 34761  			break
 34762  		}
 34763  		if o4.Type != t {
 34764  			break
 34765  		}
 34766  		_ = o4.Args[1]
 34767  		s4 := o4.Args[0]
 34768  		if s4.Op != OpPPC64SLDconst {
 34769  			break
 34770  		}
 34771  		if s4.AuxInt != 40 {
 34772  			break
 34773  		}
 34774  		x5 := s4.Args[0]
 34775  		if x5.Op != OpPPC64MOVBZload {
 34776  			break
 34777  		}
 34778  		i5 := x5.AuxInt
 34779  		s := x5.Aux
 34780  		_ = x5.Args[1]
 34781  		p := x5.Args[0]
 34782  		mem := x5.Args[1]
 34783  		o3 := o4.Args[1]
 34784  		if o3.Op != OpPPC64OR {
 34785  			break
 34786  		}
 34787  		if o3.Type != t {
 34788  			break
 34789  		}
 34790  		_ = o3.Args[1]
 34791  		o2 := o3.Args[0]
 34792  		if o2.Op != OpPPC64OR {
 34793  			break
 34794  		}
 34795  		if o2.Type != t {
 34796  			break
 34797  		}
 34798  		_ = o2.Args[1]
 34799  		o1 := o2.Args[0]
 34800  		if o1.Op != OpPPC64OR {
 34801  			break
 34802  		}
 34803  		if o1.Type != t {
 34804  			break
 34805  		}
 34806  		_ = o1.Args[1]
 34807  		s1 := o1.Args[0]
 34808  		if s1.Op != OpPPC64SLDconst {
 34809  			break
 34810  		}
 34811  		if s1.AuxInt != 16 {
 34812  			break
 34813  		}
 34814  		x2 := s1.Args[0]
 34815  		if x2.Op != OpPPC64MOVBZload {
 34816  			break
 34817  		}
 34818  		i2 := x2.AuxInt
 34819  		if x2.Aux != s {
 34820  			break
 34821  		}
 34822  		_ = x2.Args[1]
 34823  		if p != x2.Args[0] {
 34824  			break
 34825  		}
 34826  		if mem != x2.Args[1] {
 34827  			break
 34828  		}
 34829  		o0 := o1.Args[1]
 34830  		if o0.Op != OpPPC64OR {
 34831  			break
 34832  		}
 34833  		if o0.Type != t {
 34834  			break
 34835  		}
 34836  		_ = o0.Args[1]
 34837  		s0 := o0.Args[0]
 34838  		if s0.Op != OpPPC64SLDconst {
 34839  			break
 34840  		}
 34841  		if s0.AuxInt != 8 {
 34842  			break
 34843  		}
 34844  		x1 := s0.Args[0]
 34845  		if x1.Op != OpPPC64MOVBZload {
 34846  			break
 34847  		}
 34848  		i1 := x1.AuxInt
 34849  		if x1.Aux != s {
 34850  			break
 34851  		}
 34852  		_ = x1.Args[1]
 34853  		if p != x1.Args[0] {
 34854  			break
 34855  		}
 34856  		if mem != x1.Args[1] {
 34857  			break
 34858  		}
 34859  		x0 := o0.Args[1]
 34860  		if x0.Op != OpPPC64MOVBZload {
 34861  			break
 34862  		}
 34863  		i0 := x0.AuxInt
 34864  		if x0.Aux != s {
 34865  			break
 34866  		}
 34867  		_ = x0.Args[1]
 34868  		if p != x0.Args[0] {
 34869  			break
 34870  		}
 34871  		if mem != x0.Args[1] {
 34872  			break
 34873  		}
 34874  		s2 := o2.Args[1]
 34875  		if s2.Op != OpPPC64SLDconst {
 34876  			break
 34877  		}
 34878  		if s2.AuxInt != 24 {
 34879  			break
 34880  		}
 34881  		x3 := s2.Args[0]
 34882  		if x3.Op != OpPPC64MOVBZload {
 34883  			break
 34884  		}
 34885  		i3 := x3.AuxInt
 34886  		if x3.Aux != s {
 34887  			break
 34888  		}
 34889  		_ = x3.Args[1]
 34890  		if p != x3.Args[0] {
 34891  			break
 34892  		}
 34893  		if mem != x3.Args[1] {
 34894  			break
 34895  		}
 34896  		s3 := o3.Args[1]
 34897  		if s3.Op != OpPPC64SLDconst {
 34898  			break
 34899  		}
 34900  		if s3.AuxInt != 32 {
 34901  			break
 34902  		}
 34903  		x4 := s3.Args[0]
 34904  		if x4.Op != OpPPC64MOVBZload {
 34905  			break
 34906  		}
 34907  		i4 := x4.AuxInt
 34908  		if x4.Aux != s {
 34909  			break
 34910  		}
 34911  		_ = x4.Args[1]
 34912  		if p != x4.Args[0] {
 34913  			break
 34914  		}
 34915  		if mem != x4.Args[1] {
 34916  			break
 34917  		}
 34918  		s5 := o5.Args[1]
 34919  		if s5.Op != OpPPC64SLDconst {
 34920  			break
 34921  		}
 34922  		if s5.AuxInt != 48 {
 34923  			break
 34924  		}
 34925  		x6 := s5.Args[0]
 34926  		if x6.Op != OpPPC64MOVBZload {
 34927  			break
 34928  		}
 34929  		i6 := x6.AuxInt
 34930  		if x6.Aux != s {
 34931  			break
 34932  		}
 34933  		_ = x6.Args[1]
 34934  		if p != x6.Args[0] {
 34935  			break
 34936  		}
 34937  		if mem != x6.Args[1] {
 34938  			break
 34939  		}
 34940  		s6 := v.Args[1]
 34941  		if s6.Op != OpPPC64SLDconst {
 34942  			break
 34943  		}
 34944  		if s6.AuxInt != 56 {
 34945  			break
 34946  		}
 34947  		x7 := s6.Args[0]
 34948  		if x7.Op != OpPPC64MOVBZload {
 34949  			break
 34950  		}
 34951  		i7 := x7.AuxInt
 34952  		if x7.Aux != s {
 34953  			break
 34954  		}
 34955  		_ = x7.Args[1]
 34956  		if p != x7.Args[0] {
 34957  			break
 34958  		}
 34959  		if mem != x7.Args[1] {
 34960  			break
 34961  		}
 34962  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 34963  			break
 34964  		}
 34965  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 34966  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 34967  		v.reset(OpCopy)
 34968  		v.AddArg(v0)
 34969  		v0.AuxInt = i0
 34970  		v0.Aux = s
 34971  		v0.AddArg(p)
 34972  		v0.AddArg(mem)
 34973  		return true
 34974  	}
 34975  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 34976  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 34977  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 34978  	for {
 34979  		t := v.Type
 34980  		_ = v.Args[1]
 34981  		o5 := v.Args[0]
 34982  		if o5.Op != OpPPC64OR {
 34983  			break
 34984  		}
 34985  		if o5.Type != t {
 34986  			break
 34987  		}
 34988  		_ = o5.Args[1]
 34989  		o4 := o5.Args[0]
 34990  		if o4.Op != OpPPC64OR {
 34991  			break
 34992  		}
 34993  		if o4.Type != t {
 34994  			break
 34995  		}
 34996  		_ = o4.Args[1]
 34997  		s4 := o4.Args[0]
 34998  		if s4.Op != OpPPC64SLDconst {
 34999  			break
 35000  		}
 35001  		if s4.AuxInt != 40 {
 35002  			break
 35003  		}
 35004  		x5 := s4.Args[0]
 35005  		if x5.Op != OpPPC64MOVBZload {
 35006  			break
 35007  		}
 35008  		i5 := x5.AuxInt
 35009  		s := x5.Aux
 35010  		_ = x5.Args[1]
 35011  		p := x5.Args[0]
 35012  		mem := x5.Args[1]
 35013  		o3 := o4.Args[1]
 35014  		if o3.Op != OpPPC64OR {
 35015  			break
 35016  		}
 35017  		if o3.Type != t {
 35018  			break
 35019  		}
 35020  		_ = o3.Args[1]
 35021  		o2 := o3.Args[0]
 35022  		if o2.Op != OpPPC64OR {
 35023  			break
 35024  		}
 35025  		if o2.Type != t {
 35026  			break
 35027  		}
 35028  		_ = o2.Args[1]
 35029  		o1 := o2.Args[0]
 35030  		if o1.Op != OpPPC64OR {
 35031  			break
 35032  		}
 35033  		if o1.Type != t {
 35034  			break
 35035  		}
 35036  		_ = o1.Args[1]
 35037  		s1 := o1.Args[0]
 35038  		if s1.Op != OpPPC64SLDconst {
 35039  			break
 35040  		}
 35041  		if s1.AuxInt != 16 {
 35042  			break
 35043  		}
 35044  		x2 := s1.Args[0]
 35045  		if x2.Op != OpPPC64MOVBZload {
 35046  			break
 35047  		}
 35048  		i2 := x2.AuxInt
 35049  		if x2.Aux != s {
 35050  			break
 35051  		}
 35052  		_ = x2.Args[1]
 35053  		if p != x2.Args[0] {
 35054  			break
 35055  		}
 35056  		if mem != x2.Args[1] {
 35057  			break
 35058  		}
 35059  		o0 := o1.Args[1]
 35060  		if o0.Op != OpPPC64OR {
 35061  			break
 35062  		}
 35063  		if o0.Type != t {
 35064  			break
 35065  		}
 35066  		_ = o0.Args[1]
 35067  		x0 := o0.Args[0]
 35068  		if x0.Op != OpPPC64MOVBZload {
 35069  			break
 35070  		}
 35071  		i0 := x0.AuxInt
 35072  		if x0.Aux != s {
 35073  			break
 35074  		}
 35075  		_ = x0.Args[1]
 35076  		if p != x0.Args[0] {
 35077  			break
 35078  		}
 35079  		if mem != x0.Args[1] {
 35080  			break
 35081  		}
 35082  		s0 := o0.Args[1]
 35083  		if s0.Op != OpPPC64SLDconst {
 35084  			break
 35085  		}
 35086  		if s0.AuxInt != 8 {
 35087  			break
 35088  		}
 35089  		x1 := s0.Args[0]
 35090  		if x1.Op != OpPPC64MOVBZload {
 35091  			break
 35092  		}
 35093  		i1 := x1.AuxInt
 35094  		if x1.Aux != s {
 35095  			break
 35096  		}
 35097  		_ = x1.Args[1]
 35098  		if p != x1.Args[0] {
 35099  			break
 35100  		}
 35101  		if mem != x1.Args[1] {
 35102  			break
 35103  		}
 35104  		s2 := o2.Args[1]
 35105  		if s2.Op != OpPPC64SLDconst {
 35106  			break
 35107  		}
 35108  		if s2.AuxInt != 24 {
 35109  			break
 35110  		}
 35111  		x3 := s2.Args[0]
 35112  		if x3.Op != OpPPC64MOVBZload {
 35113  			break
 35114  		}
 35115  		i3 := x3.AuxInt
 35116  		if x3.Aux != s {
 35117  			break
 35118  		}
 35119  		_ = x3.Args[1]
 35120  		if p != x3.Args[0] {
 35121  			break
 35122  		}
 35123  		if mem != x3.Args[1] {
 35124  			break
 35125  		}
 35126  		s3 := o3.Args[1]
 35127  		if s3.Op != OpPPC64SLDconst {
 35128  			break
 35129  		}
 35130  		if s3.AuxInt != 32 {
 35131  			break
 35132  		}
 35133  		x4 := s3.Args[0]
 35134  		if x4.Op != OpPPC64MOVBZload {
 35135  			break
 35136  		}
 35137  		i4 := x4.AuxInt
 35138  		if x4.Aux != s {
 35139  			break
 35140  		}
 35141  		_ = x4.Args[1]
 35142  		if p != x4.Args[0] {
 35143  			break
 35144  		}
 35145  		if mem != x4.Args[1] {
 35146  			break
 35147  		}
 35148  		s5 := o5.Args[1]
 35149  		if s5.Op != OpPPC64SLDconst {
 35150  			break
 35151  		}
 35152  		if s5.AuxInt != 48 {
 35153  			break
 35154  		}
 35155  		x6 := s5.Args[0]
 35156  		if x6.Op != OpPPC64MOVBZload {
 35157  			break
 35158  		}
 35159  		i6 := x6.AuxInt
 35160  		if x6.Aux != s {
 35161  			break
 35162  		}
 35163  		_ = x6.Args[1]
 35164  		if p != x6.Args[0] {
 35165  			break
 35166  		}
 35167  		if mem != x6.Args[1] {
 35168  			break
 35169  		}
 35170  		s6 := v.Args[1]
 35171  		if s6.Op != OpPPC64SLDconst {
 35172  			break
 35173  		}
 35174  		if s6.AuxInt != 56 {
 35175  			break
 35176  		}
 35177  		x7 := s6.Args[0]
 35178  		if x7.Op != OpPPC64MOVBZload {
 35179  			break
 35180  		}
 35181  		i7 := x7.AuxInt
 35182  		if x7.Aux != s {
 35183  			break
 35184  		}
 35185  		_ = x7.Args[1]
 35186  		if p != x7.Args[0] {
 35187  			break
 35188  		}
 35189  		if mem != x7.Args[1] {
 35190  			break
 35191  		}
 35192  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 35193  			break
 35194  		}
 35195  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 35196  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 35197  		v.reset(OpCopy)
 35198  		v.AddArg(v0)
 35199  		v0.AuxInt = i0
 35200  		v0.Aux = s
 35201  		v0.AddArg(p)
 35202  		v0.AddArg(mem)
 35203  		return true
 35204  	}
 35205  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 35206  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 35207  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 35208  	for {
 35209  		t := v.Type
 35210  		_ = v.Args[1]
 35211  		o5 := v.Args[0]
 35212  		if o5.Op != OpPPC64OR {
 35213  			break
 35214  		}
 35215  		if o5.Type != t {
 35216  			break
 35217  		}
 35218  		_ = o5.Args[1]
 35219  		o4 := o5.Args[0]
 35220  		if o4.Op != OpPPC64OR {
 35221  			break
 35222  		}
 35223  		if o4.Type != t {
 35224  			break
 35225  		}
 35226  		_ = o4.Args[1]
 35227  		s4 := o4.Args[0]
 35228  		if s4.Op != OpPPC64SLDconst {
 35229  			break
 35230  		}
 35231  		if s4.AuxInt != 40 {
 35232  			break
 35233  		}
 35234  		x5 := s4.Args[0]
 35235  		if x5.Op != OpPPC64MOVBZload {
 35236  			break
 35237  		}
 35238  		i5 := x5.AuxInt
 35239  		s := x5.Aux
 35240  		_ = x5.Args[1]
 35241  		p := x5.Args[0]
 35242  		mem := x5.Args[1]
 35243  		o3 := o4.Args[1]
 35244  		if o3.Op != OpPPC64OR {
 35245  			break
 35246  		}
 35247  		if o3.Type != t {
 35248  			break
 35249  		}
 35250  		_ = o3.Args[1]
 35251  		o2 := o3.Args[0]
 35252  		if o2.Op != OpPPC64OR {
 35253  			break
 35254  		}
 35255  		if o2.Type != t {
 35256  			break
 35257  		}
 35258  		_ = o2.Args[1]
 35259  		o1 := o2.Args[0]
 35260  		if o1.Op != OpPPC64OR {
 35261  			break
 35262  		}
 35263  		if o1.Type != t {
 35264  			break
 35265  		}
 35266  		_ = o1.Args[1]
 35267  		o0 := o1.Args[0]
 35268  		if o0.Op != OpPPC64OR {
 35269  			break
 35270  		}
 35271  		if o0.Type != t {
 35272  			break
 35273  		}
 35274  		_ = o0.Args[1]
 35275  		s0 := o0.Args[0]
 35276  		if s0.Op != OpPPC64SLDconst {
 35277  			break
 35278  		}
 35279  		if s0.AuxInt != 8 {
 35280  			break
 35281  		}
 35282  		x1 := s0.Args[0]
 35283  		if x1.Op != OpPPC64MOVBZload {
 35284  			break
 35285  		}
 35286  		i1 := x1.AuxInt
 35287  		if x1.Aux != s {
 35288  			break
 35289  		}
 35290  		_ = x1.Args[1]
 35291  		if p != x1.Args[0] {
 35292  			break
 35293  		}
 35294  		if mem != x1.Args[1] {
 35295  			break
 35296  		}
 35297  		x0 := o0.Args[1]
 35298  		if x0.Op != OpPPC64MOVBZload {
 35299  			break
 35300  		}
 35301  		i0 := x0.AuxInt
 35302  		if x0.Aux != s {
 35303  			break
 35304  		}
 35305  		_ = x0.Args[1]
 35306  		if p != x0.Args[0] {
 35307  			break
 35308  		}
 35309  		if mem != x0.Args[1] {
 35310  			break
 35311  		}
 35312  		s1 := o1.Args[1]
 35313  		if s1.Op != OpPPC64SLDconst {
 35314  			break
 35315  		}
 35316  		if s1.AuxInt != 16 {
 35317  			break
 35318  		}
 35319  		x2 := s1.Args[0]
 35320  		if x2.Op != OpPPC64MOVBZload {
 35321  			break
 35322  		}
 35323  		i2 := x2.AuxInt
 35324  		if x2.Aux != s {
 35325  			break
 35326  		}
 35327  		_ = x2.Args[1]
 35328  		if p != x2.Args[0] {
 35329  			break
 35330  		}
 35331  		if mem != x2.Args[1] {
 35332  			break
 35333  		}
 35334  		s2 := o2.Args[1]
 35335  		if s2.Op != OpPPC64SLDconst {
 35336  			break
 35337  		}
 35338  		if s2.AuxInt != 24 {
 35339  			break
 35340  		}
 35341  		x3 := s2.Args[0]
 35342  		if x3.Op != OpPPC64MOVBZload {
 35343  			break
 35344  		}
 35345  		i3 := x3.AuxInt
 35346  		if x3.Aux != s {
 35347  			break
 35348  		}
 35349  		_ = x3.Args[1]
 35350  		if p != x3.Args[0] {
 35351  			break
 35352  		}
 35353  		if mem != x3.Args[1] {
 35354  			break
 35355  		}
 35356  		s3 := o3.Args[1]
 35357  		if s3.Op != OpPPC64SLDconst {
 35358  			break
 35359  		}
 35360  		if s3.AuxInt != 32 {
 35361  			break
 35362  		}
 35363  		x4 := s3.Args[0]
 35364  		if x4.Op != OpPPC64MOVBZload {
 35365  			break
 35366  		}
 35367  		i4 := x4.AuxInt
 35368  		if x4.Aux != s {
 35369  			break
 35370  		}
 35371  		_ = x4.Args[1]
 35372  		if p != x4.Args[0] {
 35373  			break
 35374  		}
 35375  		if mem != x4.Args[1] {
 35376  			break
 35377  		}
 35378  		s5 := o5.Args[1]
 35379  		if s5.Op != OpPPC64SLDconst {
 35380  			break
 35381  		}
 35382  		if s5.AuxInt != 48 {
 35383  			break
 35384  		}
 35385  		x6 := s5.Args[0]
 35386  		if x6.Op != OpPPC64MOVBZload {
 35387  			break
 35388  		}
 35389  		i6 := x6.AuxInt
 35390  		if x6.Aux != s {
 35391  			break
 35392  		}
 35393  		_ = x6.Args[1]
 35394  		if p != x6.Args[0] {
 35395  			break
 35396  		}
 35397  		if mem != x6.Args[1] {
 35398  			break
 35399  		}
 35400  		s6 := v.Args[1]
 35401  		if s6.Op != OpPPC64SLDconst {
 35402  			break
 35403  		}
 35404  		if s6.AuxInt != 56 {
 35405  			break
 35406  		}
 35407  		x7 := s6.Args[0]
 35408  		if x7.Op != OpPPC64MOVBZload {
 35409  			break
 35410  		}
 35411  		i7 := x7.AuxInt
 35412  		if x7.Aux != s {
 35413  			break
 35414  		}
 35415  		_ = x7.Args[1]
 35416  		if p != x7.Args[0] {
 35417  			break
 35418  		}
 35419  		if mem != x7.Args[1] {
 35420  			break
 35421  		}
 35422  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 35423  			break
 35424  		}
 35425  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 35426  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 35427  		v.reset(OpCopy)
 35428  		v.AddArg(v0)
 35429  		v0.AuxInt = i0
 35430  		v0.Aux = s
 35431  		v0.AddArg(p)
 35432  		v0.AddArg(mem)
 35433  		return true
 35434  	}
 35435  	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 35436  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 35437  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 35438  	for {
 35439  		t := v.Type
 35440  		_ = v.Args[1]
 35441  		o5 := v.Args[0]
 35442  		if o5.Op != OpPPC64OR {
 35443  			break
 35444  		}
 35445  		if o5.Type != t {
 35446  			break
 35447  		}
 35448  		_ = o5.Args[1]
 35449  		o4 := o5.Args[0]
 35450  		if o4.Op != OpPPC64OR {
 35451  			break
 35452  		}
 35453  		if o4.Type != t {
 35454  			break
 35455  		}
 35456  		_ = o4.Args[1]
 35457  		s4 := o4.Args[0]
 35458  		if s4.Op != OpPPC64SLDconst {
 35459  			break
 35460  		}
 35461  		if s4.AuxInt != 40 {
 35462  			break
 35463  		}
 35464  		x5 := s4.Args[0]
 35465  		if x5.Op != OpPPC64MOVBZload {
 35466  			break
 35467  		}
 35468  		i5 := x5.AuxInt
 35469  		s := x5.Aux
 35470  		_ = x5.Args[1]
 35471  		p := x5.Args[0]
 35472  		mem := x5.Args[1]
 35473  		o3 := o4.Args[1]
 35474  		if o3.Op != OpPPC64OR {
 35475  			break
 35476  		}
 35477  		if o3.Type != t {
 35478  			break
 35479  		}
 35480  		_ = o3.Args[1]
 35481  		o2 := o3.Args[0]
 35482  		if o2.Op != OpPPC64OR {
 35483  			break
 35484  		}
 35485  		if o2.Type != t {
 35486  			break
 35487  		}
 35488  		_ = o2.Args[1]
 35489  		o1 := o2.Args[0]
 35490  		if o1.Op != OpPPC64OR {
 35491  			break
 35492  		}
 35493  		if o1.Type != t {
 35494  			break
 35495  		}
 35496  		_ = o1.Args[1]
 35497  		o0 := o1.Args[0]
 35498  		if o0.Op != OpPPC64OR {
 35499  			break
 35500  		}
 35501  		if o0.Type != t {
 35502  			break
 35503  		}
 35504  		_ = o0.Args[1]
 35505  		x0 := o0.Args[0]
 35506  		if x0.Op != OpPPC64MOVBZload {
 35507  			break
 35508  		}
 35509  		i0 := x0.AuxInt
 35510  		if x0.Aux != s {
 35511  			break
 35512  		}
 35513  		_ = x0.Args[1]
 35514  		if p != x0.Args[0] {
 35515  			break
 35516  		}
 35517  		if mem != x0.Args[1] {
 35518  			break
 35519  		}
 35520  		s0 := o0.Args[1]
 35521  		if s0.Op != OpPPC64SLDconst {
 35522  			break
 35523  		}
 35524  		if s0.AuxInt != 8 {
 35525  			break
 35526  		}
 35527  		x1 := s0.Args[0]
 35528  		if x1.Op != OpPPC64MOVBZload {
 35529  			break
 35530  		}
 35531  		i1 := x1.AuxInt
 35532  		if x1.Aux != s {
 35533  			break
 35534  		}
 35535  		_ = x1.Args[1]
 35536  		if p != x1.Args[0] {
 35537  			break
 35538  		}
 35539  		if mem != x1.Args[1] {
 35540  			break
 35541  		}
 35542  		s1 := o1.Args[1]
 35543  		if s1.Op != OpPPC64SLDconst {
 35544  			break
 35545  		}
 35546  		if s1.AuxInt != 16 {
 35547  			break
 35548  		}
 35549  		x2 := s1.Args[0]
 35550  		if x2.Op != OpPPC64MOVBZload {
 35551  			break
 35552  		}
 35553  		i2 := x2.AuxInt
 35554  		if x2.Aux != s {
 35555  			break
 35556  		}
 35557  		_ = x2.Args[1]
 35558  		if p != x2.Args[0] {
 35559  			break
 35560  		}
 35561  		if mem != x2.Args[1] {
 35562  			break
 35563  		}
 35564  		s2 := o2.Args[1]
 35565  		if s2.Op != OpPPC64SLDconst {
 35566  			break
 35567  		}
 35568  		if s2.AuxInt != 24 {
 35569  			break
 35570  		}
 35571  		x3 := s2.Args[0]
 35572  		if x3.Op != OpPPC64MOVBZload {
 35573  			break
 35574  		}
 35575  		i3 := x3.AuxInt
 35576  		if x3.Aux != s {
 35577  			break
 35578  		}
 35579  		_ = x3.Args[1]
 35580  		if p != x3.Args[0] {
 35581  			break
 35582  		}
 35583  		if mem != x3.Args[1] {
 35584  			break
 35585  		}
 35586  		s3 := o3.Args[1]
 35587  		if s3.Op != OpPPC64SLDconst {
 35588  			break
 35589  		}
 35590  		if s3.AuxInt != 32 {
 35591  			break
 35592  		}
 35593  		x4 := s3.Args[0]
 35594  		if x4.Op != OpPPC64MOVBZload {
 35595  			break
 35596  		}
 35597  		i4 := x4.AuxInt
 35598  		if x4.Aux != s {
 35599  			break
 35600  		}
 35601  		_ = x4.Args[1]
 35602  		if p != x4.Args[0] {
 35603  			break
 35604  		}
 35605  		if mem != x4.Args[1] {
 35606  			break
 35607  		}
 35608  		s5 := o5.Args[1]
 35609  		if s5.Op != OpPPC64SLDconst {
 35610  			break
 35611  		}
 35612  		if s5.AuxInt != 48 {
 35613  			break
 35614  		}
 35615  		x6 := s5.Args[0]
 35616  		if x6.Op != OpPPC64MOVBZload {
 35617  			break
 35618  		}
 35619  		i6 := x6.AuxInt
 35620  		if x6.Aux != s {
 35621  			break
 35622  		}
 35623  		_ = x6.Args[1]
 35624  		if p != x6.Args[0] {
 35625  			break
 35626  		}
 35627  		if mem != x6.Args[1] {
 35628  			break
 35629  		}
 35630  		s6 := v.Args[1]
 35631  		if s6.Op != OpPPC64SLDconst {
 35632  			break
 35633  		}
 35634  		if s6.AuxInt != 56 {
 35635  			break
 35636  		}
 35637  		x7 := s6.Args[0]
 35638  		if x7.Op != OpPPC64MOVBZload {
 35639  			break
 35640  		}
 35641  		i7 := x7.AuxInt
 35642  		if x7.Aux != s {
 35643  			break
 35644  		}
 35645  		_ = x7.Args[1]
 35646  		if p != x7.Args[0] {
 35647  			break
 35648  		}
 35649  		if mem != x7.Args[1] {
 35650  			break
 35651  		}
 35652  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 35653  			break
 35654  		}
 35655  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 35656  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 35657  		v.reset(OpCopy)
 35658  		v.AddArg(v0)
 35659  		v0.AuxInt = i0
 35660  		v0.Aux = s
 35661  		v0.AddArg(p)
 35662  		v0.AddArg(mem)
 35663  		return true
 35664  	}
 35665  	return false
 35666  }
 35667  func rewriteValuePPC64_OpPPC64OR_130(v *Value) bool {
 35668  	b := v.Block
 35669  	_ = b
 35670  	config := b.Func.Config
 35671  	_ = config
 35672  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 35673  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 35674  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 35675  	for {
 35676  		t := v.Type
 35677  		_ = v.Args[1]
 35678  		o5 := v.Args[0]
 35679  		if o5.Op != OpPPC64OR {
 35680  			break
 35681  		}
 35682  		if o5.Type != t {
 35683  			break
 35684  		}
 35685  		_ = o5.Args[1]
 35686  		o4 := o5.Args[0]
 35687  		if o4.Op != OpPPC64OR {
 35688  			break
 35689  		}
 35690  		if o4.Type != t {
 35691  			break
 35692  		}
 35693  		_ = o4.Args[1]
 35694  		o3 := o4.Args[0]
 35695  		if o3.Op != OpPPC64OR {
 35696  			break
 35697  		}
 35698  		if o3.Type != t {
 35699  			break
 35700  		}
 35701  		_ = o3.Args[1]
 35702  		s3 := o3.Args[0]
 35703  		if s3.Op != OpPPC64SLDconst {
 35704  			break
 35705  		}
 35706  		if s3.AuxInt != 32 {
 35707  			break
 35708  		}
 35709  		x4 := s3.Args[0]
 35710  		if x4.Op != OpPPC64MOVBZload {
 35711  			break
 35712  		}
 35713  		i4 := x4.AuxInt
 35714  		s := x4.Aux
 35715  		_ = x4.Args[1]
 35716  		p := x4.Args[0]
 35717  		mem := x4.Args[1]
 35718  		o2 := o3.Args[1]
 35719  		if o2.Op != OpPPC64OR {
 35720  			break
 35721  		}
 35722  		if o2.Type != t {
 35723  			break
 35724  		}
 35725  		_ = o2.Args[1]
 35726  		s2 := o2.Args[0]
 35727  		if s2.Op != OpPPC64SLDconst {
 35728  			break
 35729  		}
 35730  		if s2.AuxInt != 24 {
 35731  			break
 35732  		}
 35733  		x3 := s2.Args[0]
 35734  		if x3.Op != OpPPC64MOVBZload {
 35735  			break
 35736  		}
 35737  		i3 := x3.AuxInt
 35738  		if x3.Aux != s {
 35739  			break
 35740  		}
 35741  		_ = x3.Args[1]
 35742  		if p != x3.Args[0] {
 35743  			break
 35744  		}
 35745  		if mem != x3.Args[1] {
 35746  			break
 35747  		}
 35748  		o1 := o2.Args[1]
 35749  		if o1.Op != OpPPC64OR {
 35750  			break
 35751  		}
 35752  		if o1.Type != t {
 35753  			break
 35754  		}
 35755  		_ = o1.Args[1]
 35756  		s1 := o1.Args[0]
 35757  		if s1.Op != OpPPC64SLDconst {
 35758  			break
 35759  		}
 35760  		if s1.AuxInt != 16 {
 35761  			break
 35762  		}
 35763  		x2 := s1.Args[0]
 35764  		if x2.Op != OpPPC64MOVBZload {
 35765  			break
 35766  		}
 35767  		i2 := x2.AuxInt
 35768  		if x2.Aux != s {
 35769  			break
 35770  		}
 35771  		_ = x2.Args[1]
 35772  		if p != x2.Args[0] {
 35773  			break
 35774  		}
 35775  		if mem != x2.Args[1] {
 35776  			break
 35777  		}
 35778  		o0 := o1.Args[1]
 35779  		if o0.Op != OpPPC64OR {
 35780  			break
 35781  		}
 35782  		if o0.Type != t {
 35783  			break
 35784  		}
 35785  		_ = o0.Args[1]
 35786  		s0 := o0.Args[0]
 35787  		if s0.Op != OpPPC64SLDconst {
 35788  			break
 35789  		}
 35790  		if s0.AuxInt != 8 {
 35791  			break
 35792  		}
 35793  		x1 := s0.Args[0]
 35794  		if x1.Op != OpPPC64MOVBZload {
 35795  			break
 35796  		}
 35797  		i1 := x1.AuxInt
 35798  		if x1.Aux != s {
 35799  			break
 35800  		}
 35801  		_ = x1.Args[1]
 35802  		if p != x1.Args[0] {
 35803  			break
 35804  		}
 35805  		if mem != x1.Args[1] {
 35806  			break
 35807  		}
 35808  		x0 := o0.Args[1]
 35809  		if x0.Op != OpPPC64MOVBZload {
 35810  			break
 35811  		}
 35812  		i0 := x0.AuxInt
 35813  		if x0.Aux != s {
 35814  			break
 35815  		}
 35816  		_ = x0.Args[1]
 35817  		if p != x0.Args[0] {
 35818  			break
 35819  		}
 35820  		if mem != x0.Args[1] {
 35821  			break
 35822  		}
 35823  		s4 := o4.Args[1]
 35824  		if s4.Op != OpPPC64SLDconst {
 35825  			break
 35826  		}
 35827  		if s4.AuxInt != 40 {
 35828  			break
 35829  		}
 35830  		x5 := s4.Args[0]
 35831  		if x5.Op != OpPPC64MOVBZload {
 35832  			break
 35833  		}
 35834  		i5 := x5.AuxInt
 35835  		if x5.Aux != s {
 35836  			break
 35837  		}
 35838  		_ = x5.Args[1]
 35839  		if p != x5.Args[0] {
 35840  			break
 35841  		}
 35842  		if mem != x5.Args[1] {
 35843  			break
 35844  		}
 35845  		s5 := o5.Args[1]
 35846  		if s5.Op != OpPPC64SLDconst {
 35847  			break
 35848  		}
 35849  		if s5.AuxInt != 48 {
 35850  			break
 35851  		}
 35852  		x6 := s5.Args[0]
 35853  		if x6.Op != OpPPC64MOVBZload {
 35854  			break
 35855  		}
 35856  		i6 := x6.AuxInt
 35857  		if x6.Aux != s {
 35858  			break
 35859  		}
 35860  		_ = x6.Args[1]
 35861  		if p != x6.Args[0] {
 35862  			break
 35863  		}
 35864  		if mem != x6.Args[1] {
 35865  			break
 35866  		}
 35867  		s6 := v.Args[1]
 35868  		if s6.Op != OpPPC64SLDconst {
 35869  			break
 35870  		}
 35871  		if s6.AuxInt != 56 {
 35872  			break
 35873  		}
 35874  		x7 := s6.Args[0]
 35875  		if x7.Op != OpPPC64MOVBZload {
 35876  			break
 35877  		}
 35878  		i7 := x7.AuxInt
 35879  		if x7.Aux != s {
 35880  			break
 35881  		}
 35882  		_ = x7.Args[1]
 35883  		if p != x7.Args[0] {
 35884  			break
 35885  		}
 35886  		if mem != x7.Args[1] {
 35887  			break
 35888  		}
 35889  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 35890  			break
 35891  		}
 35892  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 35893  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 35894  		v.reset(OpCopy)
 35895  		v.AddArg(v0)
 35896  		v0.AuxInt = i0
 35897  		v0.Aux = s
 35898  		v0.AddArg(p)
 35899  		v0.AddArg(mem)
 35900  		return true
 35901  	}
 35902  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 35903  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 35904  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 35905  	for {
 35906  		t := v.Type
 35907  		_ = v.Args[1]
 35908  		o5 := v.Args[0]
 35909  		if o5.Op != OpPPC64OR {
 35910  			break
 35911  		}
 35912  		if o5.Type != t {
 35913  			break
 35914  		}
 35915  		_ = o5.Args[1]
 35916  		o4 := o5.Args[0]
 35917  		if o4.Op != OpPPC64OR {
 35918  			break
 35919  		}
 35920  		if o4.Type != t {
 35921  			break
 35922  		}
 35923  		_ = o4.Args[1]
 35924  		o3 := o4.Args[0]
 35925  		if o3.Op != OpPPC64OR {
 35926  			break
 35927  		}
 35928  		if o3.Type != t {
 35929  			break
 35930  		}
 35931  		_ = o3.Args[1]
 35932  		s3 := o3.Args[0]
 35933  		if s3.Op != OpPPC64SLDconst {
 35934  			break
 35935  		}
 35936  		if s3.AuxInt != 32 {
 35937  			break
 35938  		}
 35939  		x4 := s3.Args[0]
 35940  		if x4.Op != OpPPC64MOVBZload {
 35941  			break
 35942  		}
 35943  		i4 := x4.AuxInt
 35944  		s := x4.Aux
 35945  		_ = x4.Args[1]
 35946  		p := x4.Args[0]
 35947  		mem := x4.Args[1]
 35948  		o2 := o3.Args[1]
 35949  		if o2.Op != OpPPC64OR {
 35950  			break
 35951  		}
 35952  		if o2.Type != t {
 35953  			break
 35954  		}
 35955  		_ = o2.Args[1]
 35956  		s2 := o2.Args[0]
 35957  		if s2.Op != OpPPC64SLDconst {
 35958  			break
 35959  		}
 35960  		if s2.AuxInt != 24 {
 35961  			break
 35962  		}
 35963  		x3 := s2.Args[0]
 35964  		if x3.Op != OpPPC64MOVBZload {
 35965  			break
 35966  		}
 35967  		i3 := x3.AuxInt
 35968  		if x3.Aux != s {
 35969  			break
 35970  		}
 35971  		_ = x3.Args[1]
 35972  		if p != x3.Args[0] {
 35973  			break
 35974  		}
 35975  		if mem != x3.Args[1] {
 35976  			break
 35977  		}
 35978  		o1 := o2.Args[1]
 35979  		if o1.Op != OpPPC64OR {
 35980  			break
 35981  		}
 35982  		if o1.Type != t {
 35983  			break
 35984  		}
 35985  		_ = o1.Args[1]
 35986  		s1 := o1.Args[0]
 35987  		if s1.Op != OpPPC64SLDconst {
 35988  			break
 35989  		}
 35990  		if s1.AuxInt != 16 {
 35991  			break
 35992  		}
 35993  		x2 := s1.Args[0]
 35994  		if x2.Op != OpPPC64MOVBZload {
 35995  			break
 35996  		}
 35997  		i2 := x2.AuxInt
 35998  		if x2.Aux != s {
 35999  			break
 36000  		}
 36001  		_ = x2.Args[1]
 36002  		if p != x2.Args[0] {
 36003  			break
 36004  		}
 36005  		if mem != x2.Args[1] {
 36006  			break
 36007  		}
 36008  		o0 := o1.Args[1]
 36009  		if o0.Op != OpPPC64OR {
 36010  			break
 36011  		}
 36012  		if o0.Type != t {
 36013  			break
 36014  		}
 36015  		_ = o0.Args[1]
 36016  		x0 := o0.Args[0]
 36017  		if x0.Op != OpPPC64MOVBZload {
 36018  			break
 36019  		}
 36020  		i0 := x0.AuxInt
 36021  		if x0.Aux != s {
 36022  			break
 36023  		}
 36024  		_ = x0.Args[1]
 36025  		if p != x0.Args[0] {
 36026  			break
 36027  		}
 36028  		if mem != x0.Args[1] {
 36029  			break
 36030  		}
 36031  		s0 := o0.Args[1]
 36032  		if s0.Op != OpPPC64SLDconst {
 36033  			break
 36034  		}
 36035  		if s0.AuxInt != 8 {
 36036  			break
 36037  		}
 36038  		x1 := s0.Args[0]
 36039  		if x1.Op != OpPPC64MOVBZload {
 36040  			break
 36041  		}
 36042  		i1 := x1.AuxInt
 36043  		if x1.Aux != s {
 36044  			break
 36045  		}
 36046  		_ = x1.Args[1]
 36047  		if p != x1.Args[0] {
 36048  			break
 36049  		}
 36050  		if mem != x1.Args[1] {
 36051  			break
 36052  		}
 36053  		s4 := o4.Args[1]
 36054  		if s4.Op != OpPPC64SLDconst {
 36055  			break
 36056  		}
 36057  		if s4.AuxInt != 40 {
 36058  			break
 36059  		}
 36060  		x5 := s4.Args[0]
 36061  		if x5.Op != OpPPC64MOVBZload {
 36062  			break
 36063  		}
 36064  		i5 := x5.AuxInt
 36065  		if x5.Aux != s {
 36066  			break
 36067  		}
 36068  		_ = x5.Args[1]
 36069  		if p != x5.Args[0] {
 36070  			break
 36071  		}
 36072  		if mem != x5.Args[1] {
 36073  			break
 36074  		}
 36075  		s5 := o5.Args[1]
 36076  		if s5.Op != OpPPC64SLDconst {
 36077  			break
 36078  		}
 36079  		if s5.AuxInt != 48 {
 36080  			break
 36081  		}
 36082  		x6 := s5.Args[0]
 36083  		if x6.Op != OpPPC64MOVBZload {
 36084  			break
 36085  		}
 36086  		i6 := x6.AuxInt
 36087  		if x6.Aux != s {
 36088  			break
 36089  		}
 36090  		_ = x6.Args[1]
 36091  		if p != x6.Args[0] {
 36092  			break
 36093  		}
 36094  		if mem != x6.Args[1] {
 36095  			break
 36096  		}
 36097  		s6 := v.Args[1]
 36098  		if s6.Op != OpPPC64SLDconst {
 36099  			break
 36100  		}
 36101  		if s6.AuxInt != 56 {
 36102  			break
 36103  		}
 36104  		x7 := s6.Args[0]
 36105  		if x7.Op != OpPPC64MOVBZload {
 36106  			break
 36107  		}
 36108  		i7 := x7.AuxInt
 36109  		if x7.Aux != s {
 36110  			break
 36111  		}
 36112  		_ = x7.Args[1]
 36113  		if p != x7.Args[0] {
 36114  			break
 36115  		}
 36116  		if mem != x7.Args[1] {
 36117  			break
 36118  		}
 36119  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 36120  			break
 36121  		}
 36122  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 36123  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 36124  		v.reset(OpCopy)
 36125  		v.AddArg(v0)
 36126  		v0.AuxInt = i0
 36127  		v0.Aux = s
 36128  		v0.AddArg(p)
 36129  		v0.AddArg(mem)
 36130  		return true
 36131  	}
 36132  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 36133  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 36134  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 36135  	for {
 36136  		t := v.Type
 36137  		_ = v.Args[1]
 36138  		o5 := v.Args[0]
 36139  		if o5.Op != OpPPC64OR {
 36140  			break
 36141  		}
 36142  		if o5.Type != t {
 36143  			break
 36144  		}
 36145  		_ = o5.Args[1]
 36146  		o4 := o5.Args[0]
 36147  		if o4.Op != OpPPC64OR {
 36148  			break
 36149  		}
 36150  		if o4.Type != t {
 36151  			break
 36152  		}
 36153  		_ = o4.Args[1]
 36154  		o3 := o4.Args[0]
 36155  		if o3.Op != OpPPC64OR {
 36156  			break
 36157  		}
 36158  		if o3.Type != t {
 36159  			break
 36160  		}
 36161  		_ = o3.Args[1]
 36162  		s3 := o3.Args[0]
 36163  		if s3.Op != OpPPC64SLDconst {
 36164  			break
 36165  		}
 36166  		if s3.AuxInt != 32 {
 36167  			break
 36168  		}
 36169  		x4 := s3.Args[0]
 36170  		if x4.Op != OpPPC64MOVBZload {
 36171  			break
 36172  		}
 36173  		i4 := x4.AuxInt
 36174  		s := x4.Aux
 36175  		_ = x4.Args[1]
 36176  		p := x4.Args[0]
 36177  		mem := x4.Args[1]
 36178  		o2 := o3.Args[1]
 36179  		if o2.Op != OpPPC64OR {
 36180  			break
 36181  		}
 36182  		if o2.Type != t {
 36183  			break
 36184  		}
 36185  		_ = o2.Args[1]
 36186  		s2 := o2.Args[0]
 36187  		if s2.Op != OpPPC64SLDconst {
 36188  			break
 36189  		}
 36190  		if s2.AuxInt != 24 {
 36191  			break
 36192  		}
 36193  		x3 := s2.Args[0]
 36194  		if x3.Op != OpPPC64MOVBZload {
 36195  			break
 36196  		}
 36197  		i3 := x3.AuxInt
 36198  		if x3.Aux != s {
 36199  			break
 36200  		}
 36201  		_ = x3.Args[1]
 36202  		if p != x3.Args[0] {
 36203  			break
 36204  		}
 36205  		if mem != x3.Args[1] {
 36206  			break
 36207  		}
 36208  		o1 := o2.Args[1]
 36209  		if o1.Op != OpPPC64OR {
 36210  			break
 36211  		}
 36212  		if o1.Type != t {
 36213  			break
 36214  		}
 36215  		_ = o1.Args[1]
 36216  		o0 := o1.Args[0]
 36217  		if o0.Op != OpPPC64OR {
 36218  			break
 36219  		}
 36220  		if o0.Type != t {
 36221  			break
 36222  		}
 36223  		_ = o0.Args[1]
 36224  		s0 := o0.Args[0]
 36225  		if s0.Op != OpPPC64SLDconst {
 36226  			break
 36227  		}
 36228  		if s0.AuxInt != 8 {
 36229  			break
 36230  		}
 36231  		x1 := s0.Args[0]
 36232  		if x1.Op != OpPPC64MOVBZload {
 36233  			break
 36234  		}
 36235  		i1 := x1.AuxInt
 36236  		if x1.Aux != s {
 36237  			break
 36238  		}
 36239  		_ = x1.Args[1]
 36240  		if p != x1.Args[0] {
 36241  			break
 36242  		}
 36243  		if mem != x1.Args[1] {
 36244  			break
 36245  		}
 36246  		x0 := o0.Args[1]
 36247  		if x0.Op != OpPPC64MOVBZload {
 36248  			break
 36249  		}
 36250  		i0 := x0.AuxInt
 36251  		if x0.Aux != s {
 36252  			break
 36253  		}
 36254  		_ = x0.Args[1]
 36255  		if p != x0.Args[0] {
 36256  			break
 36257  		}
 36258  		if mem != x0.Args[1] {
 36259  			break
 36260  		}
 36261  		s1 := o1.Args[1]
 36262  		if s1.Op != OpPPC64SLDconst {
 36263  			break
 36264  		}
 36265  		if s1.AuxInt != 16 {
 36266  			break
 36267  		}
 36268  		x2 := s1.Args[0]
 36269  		if x2.Op != OpPPC64MOVBZload {
 36270  			break
 36271  		}
 36272  		i2 := x2.AuxInt
 36273  		if x2.Aux != s {
 36274  			break
 36275  		}
 36276  		_ = x2.Args[1]
 36277  		if p != x2.Args[0] {
 36278  			break
 36279  		}
 36280  		if mem != x2.Args[1] {
 36281  			break
 36282  		}
 36283  		s4 := o4.Args[1]
 36284  		if s4.Op != OpPPC64SLDconst {
 36285  			break
 36286  		}
 36287  		if s4.AuxInt != 40 {
 36288  			break
 36289  		}
 36290  		x5 := s4.Args[0]
 36291  		if x5.Op != OpPPC64MOVBZload {
 36292  			break
 36293  		}
 36294  		i5 := x5.AuxInt
 36295  		if x5.Aux != s {
 36296  			break
 36297  		}
 36298  		_ = x5.Args[1]
 36299  		if p != x5.Args[0] {
 36300  			break
 36301  		}
 36302  		if mem != x5.Args[1] {
 36303  			break
 36304  		}
 36305  		s5 := o5.Args[1]
 36306  		if s5.Op != OpPPC64SLDconst {
 36307  			break
 36308  		}
 36309  		if s5.AuxInt != 48 {
 36310  			break
 36311  		}
 36312  		x6 := s5.Args[0]
 36313  		if x6.Op != OpPPC64MOVBZload {
 36314  			break
 36315  		}
 36316  		i6 := x6.AuxInt
 36317  		if x6.Aux != s {
 36318  			break
 36319  		}
 36320  		_ = x6.Args[1]
 36321  		if p != x6.Args[0] {
 36322  			break
 36323  		}
 36324  		if mem != x6.Args[1] {
 36325  			break
 36326  		}
 36327  		s6 := v.Args[1]
 36328  		if s6.Op != OpPPC64SLDconst {
 36329  			break
 36330  		}
 36331  		if s6.AuxInt != 56 {
 36332  			break
 36333  		}
 36334  		x7 := s6.Args[0]
 36335  		if x7.Op != OpPPC64MOVBZload {
 36336  			break
 36337  		}
 36338  		i7 := x7.AuxInt
 36339  		if x7.Aux != s {
 36340  			break
 36341  		}
 36342  		_ = x7.Args[1]
 36343  		if p != x7.Args[0] {
 36344  			break
 36345  		}
 36346  		if mem != x7.Args[1] {
 36347  			break
 36348  		}
 36349  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 36350  			break
 36351  		}
 36352  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 36353  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 36354  		v.reset(OpCopy)
 36355  		v.AddArg(v0)
 36356  		v0.AuxInt = i0
 36357  		v0.Aux = s
 36358  		v0.AddArg(p)
 36359  		v0.AddArg(mem)
 36360  		return true
 36361  	}
 36362  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 36363  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 36364  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 36365  	for {
 36366  		t := v.Type
 36367  		_ = v.Args[1]
 36368  		o5 := v.Args[0]
 36369  		if o5.Op != OpPPC64OR {
 36370  			break
 36371  		}
 36372  		if o5.Type != t {
 36373  			break
 36374  		}
 36375  		_ = o5.Args[1]
 36376  		o4 := o5.Args[0]
 36377  		if o4.Op != OpPPC64OR {
 36378  			break
 36379  		}
 36380  		if o4.Type != t {
 36381  			break
 36382  		}
 36383  		_ = o4.Args[1]
 36384  		o3 := o4.Args[0]
 36385  		if o3.Op != OpPPC64OR {
 36386  			break
 36387  		}
 36388  		if o3.Type != t {
 36389  			break
 36390  		}
 36391  		_ = o3.Args[1]
 36392  		s3 := o3.Args[0]
 36393  		if s3.Op != OpPPC64SLDconst {
 36394  			break
 36395  		}
 36396  		if s3.AuxInt != 32 {
 36397  			break
 36398  		}
 36399  		x4 := s3.Args[0]
 36400  		if x4.Op != OpPPC64MOVBZload {
 36401  			break
 36402  		}
 36403  		i4 := x4.AuxInt
 36404  		s := x4.Aux
 36405  		_ = x4.Args[1]
 36406  		p := x4.Args[0]
 36407  		mem := x4.Args[1]
 36408  		o2 := o3.Args[1]
 36409  		if o2.Op != OpPPC64OR {
 36410  			break
 36411  		}
 36412  		if o2.Type != t {
 36413  			break
 36414  		}
 36415  		_ = o2.Args[1]
 36416  		s2 := o2.Args[0]
 36417  		if s2.Op != OpPPC64SLDconst {
 36418  			break
 36419  		}
 36420  		if s2.AuxInt != 24 {
 36421  			break
 36422  		}
 36423  		x3 := s2.Args[0]
 36424  		if x3.Op != OpPPC64MOVBZload {
 36425  			break
 36426  		}
 36427  		i3 := x3.AuxInt
 36428  		if x3.Aux != s {
 36429  			break
 36430  		}
 36431  		_ = x3.Args[1]
 36432  		if p != x3.Args[0] {
 36433  			break
 36434  		}
 36435  		if mem != x3.Args[1] {
 36436  			break
 36437  		}
 36438  		o1 := o2.Args[1]
 36439  		if o1.Op != OpPPC64OR {
 36440  			break
 36441  		}
 36442  		if o1.Type != t {
 36443  			break
 36444  		}
 36445  		_ = o1.Args[1]
 36446  		o0 := o1.Args[0]
 36447  		if o0.Op != OpPPC64OR {
 36448  			break
 36449  		}
 36450  		if o0.Type != t {
 36451  			break
 36452  		}
 36453  		_ = o0.Args[1]
 36454  		x0 := o0.Args[0]
 36455  		if x0.Op != OpPPC64MOVBZload {
 36456  			break
 36457  		}
 36458  		i0 := x0.AuxInt
 36459  		if x0.Aux != s {
 36460  			break
 36461  		}
 36462  		_ = x0.Args[1]
 36463  		if p != x0.Args[0] {
 36464  			break
 36465  		}
 36466  		if mem != x0.Args[1] {
 36467  			break
 36468  		}
 36469  		s0 := o0.Args[1]
 36470  		if s0.Op != OpPPC64SLDconst {
 36471  			break
 36472  		}
 36473  		if s0.AuxInt != 8 {
 36474  			break
 36475  		}
 36476  		x1 := s0.Args[0]
 36477  		if x1.Op != OpPPC64MOVBZload {
 36478  			break
 36479  		}
 36480  		i1 := x1.AuxInt
 36481  		if x1.Aux != s {
 36482  			break
 36483  		}
 36484  		_ = x1.Args[1]
 36485  		if p != x1.Args[0] {
 36486  			break
 36487  		}
 36488  		if mem != x1.Args[1] {
 36489  			break
 36490  		}
 36491  		s1 := o1.Args[1]
 36492  		if s1.Op != OpPPC64SLDconst {
 36493  			break
 36494  		}
 36495  		if s1.AuxInt != 16 {
 36496  			break
 36497  		}
 36498  		x2 := s1.Args[0]
 36499  		if x2.Op != OpPPC64MOVBZload {
 36500  			break
 36501  		}
 36502  		i2 := x2.AuxInt
 36503  		if x2.Aux != s {
 36504  			break
 36505  		}
 36506  		_ = x2.Args[1]
 36507  		if p != x2.Args[0] {
 36508  			break
 36509  		}
 36510  		if mem != x2.Args[1] {
 36511  			break
 36512  		}
 36513  		s4 := o4.Args[1]
 36514  		if s4.Op != OpPPC64SLDconst {
 36515  			break
 36516  		}
 36517  		if s4.AuxInt != 40 {
 36518  			break
 36519  		}
 36520  		x5 := s4.Args[0]
 36521  		if x5.Op != OpPPC64MOVBZload {
 36522  			break
 36523  		}
 36524  		i5 := x5.AuxInt
 36525  		if x5.Aux != s {
 36526  			break
 36527  		}
 36528  		_ = x5.Args[1]
 36529  		if p != x5.Args[0] {
 36530  			break
 36531  		}
 36532  		if mem != x5.Args[1] {
 36533  			break
 36534  		}
 36535  		s5 := o5.Args[1]
 36536  		if s5.Op != OpPPC64SLDconst {
 36537  			break
 36538  		}
 36539  		if s5.AuxInt != 48 {
 36540  			break
 36541  		}
 36542  		x6 := s5.Args[0]
 36543  		if x6.Op != OpPPC64MOVBZload {
 36544  			break
 36545  		}
 36546  		i6 := x6.AuxInt
 36547  		if x6.Aux != s {
 36548  			break
 36549  		}
 36550  		_ = x6.Args[1]
 36551  		if p != x6.Args[0] {
 36552  			break
 36553  		}
 36554  		if mem != x6.Args[1] {
 36555  			break
 36556  		}
 36557  		s6 := v.Args[1]
 36558  		if s6.Op != OpPPC64SLDconst {
 36559  			break
 36560  		}
 36561  		if s6.AuxInt != 56 {
 36562  			break
 36563  		}
 36564  		x7 := s6.Args[0]
 36565  		if x7.Op != OpPPC64MOVBZload {
 36566  			break
 36567  		}
 36568  		i7 := x7.AuxInt
 36569  		if x7.Aux != s {
 36570  			break
 36571  		}
 36572  		_ = x7.Args[1]
 36573  		if p != x7.Args[0] {
 36574  			break
 36575  		}
 36576  		if mem != x7.Args[1] {
 36577  			break
 36578  		}
 36579  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 36580  			break
 36581  		}
 36582  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 36583  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 36584  		v.reset(OpCopy)
 36585  		v.AddArg(v0)
 36586  		v0.AuxInt = i0
 36587  		v0.Aux = s
 36588  		v0.AddArg(p)
 36589  		v0.AddArg(mem)
 36590  		return true
 36591  	}
 36592  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 36593  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 36594  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 36595  	for {
 36596  		t := v.Type
 36597  		_ = v.Args[1]
 36598  		o5 := v.Args[0]
 36599  		if o5.Op != OpPPC64OR {
 36600  			break
 36601  		}
 36602  		if o5.Type != t {
 36603  			break
 36604  		}
 36605  		_ = o5.Args[1]
 36606  		o4 := o5.Args[0]
 36607  		if o4.Op != OpPPC64OR {
 36608  			break
 36609  		}
 36610  		if o4.Type != t {
 36611  			break
 36612  		}
 36613  		_ = o4.Args[1]
 36614  		o3 := o4.Args[0]
 36615  		if o3.Op != OpPPC64OR {
 36616  			break
 36617  		}
 36618  		if o3.Type != t {
 36619  			break
 36620  		}
 36621  		_ = o3.Args[1]
 36622  		s3 := o3.Args[0]
 36623  		if s3.Op != OpPPC64SLDconst {
 36624  			break
 36625  		}
 36626  		if s3.AuxInt != 32 {
 36627  			break
 36628  		}
 36629  		x4 := s3.Args[0]
 36630  		if x4.Op != OpPPC64MOVBZload {
 36631  			break
 36632  		}
 36633  		i4 := x4.AuxInt
 36634  		s := x4.Aux
 36635  		_ = x4.Args[1]
 36636  		p := x4.Args[0]
 36637  		mem := x4.Args[1]
 36638  		o2 := o3.Args[1]
 36639  		if o2.Op != OpPPC64OR {
 36640  			break
 36641  		}
 36642  		if o2.Type != t {
 36643  			break
 36644  		}
 36645  		_ = o2.Args[1]
 36646  		o1 := o2.Args[0]
 36647  		if o1.Op != OpPPC64OR {
 36648  			break
 36649  		}
 36650  		if o1.Type != t {
 36651  			break
 36652  		}
 36653  		_ = o1.Args[1]
 36654  		s1 := o1.Args[0]
 36655  		if s1.Op != OpPPC64SLDconst {
 36656  			break
 36657  		}
 36658  		if s1.AuxInt != 16 {
 36659  			break
 36660  		}
 36661  		x2 := s1.Args[0]
 36662  		if x2.Op != OpPPC64MOVBZload {
 36663  			break
 36664  		}
 36665  		i2 := x2.AuxInt
 36666  		if x2.Aux != s {
 36667  			break
 36668  		}
 36669  		_ = x2.Args[1]
 36670  		if p != x2.Args[0] {
 36671  			break
 36672  		}
 36673  		if mem != x2.Args[1] {
 36674  			break
 36675  		}
 36676  		o0 := o1.Args[1]
 36677  		if o0.Op != OpPPC64OR {
 36678  			break
 36679  		}
 36680  		if o0.Type != t {
 36681  			break
 36682  		}
 36683  		_ = o0.Args[1]
 36684  		s0 := o0.Args[0]
 36685  		if s0.Op != OpPPC64SLDconst {
 36686  			break
 36687  		}
 36688  		if s0.AuxInt != 8 {
 36689  			break
 36690  		}
 36691  		x1 := s0.Args[0]
 36692  		if x1.Op != OpPPC64MOVBZload {
 36693  			break
 36694  		}
 36695  		i1 := x1.AuxInt
 36696  		if x1.Aux != s {
 36697  			break
 36698  		}
 36699  		_ = x1.Args[1]
 36700  		if p != x1.Args[0] {
 36701  			break
 36702  		}
 36703  		if mem != x1.Args[1] {
 36704  			break
 36705  		}
 36706  		x0 := o0.Args[1]
 36707  		if x0.Op != OpPPC64MOVBZload {
 36708  			break
 36709  		}
 36710  		i0 := x0.AuxInt
 36711  		if x0.Aux != s {
 36712  			break
 36713  		}
 36714  		_ = x0.Args[1]
 36715  		if p != x0.Args[0] {
 36716  			break
 36717  		}
 36718  		if mem != x0.Args[1] {
 36719  			break
 36720  		}
 36721  		s2 := o2.Args[1]
 36722  		if s2.Op != OpPPC64SLDconst {
 36723  			break
 36724  		}
 36725  		if s2.AuxInt != 24 {
 36726  			break
 36727  		}
 36728  		x3 := s2.Args[0]
 36729  		if x3.Op != OpPPC64MOVBZload {
 36730  			break
 36731  		}
 36732  		i3 := x3.AuxInt
 36733  		if x3.Aux != s {
 36734  			break
 36735  		}
 36736  		_ = x3.Args[1]
 36737  		if p != x3.Args[0] {
 36738  			break
 36739  		}
 36740  		if mem != x3.Args[1] {
 36741  			break
 36742  		}
 36743  		s4 := o4.Args[1]
 36744  		if s4.Op != OpPPC64SLDconst {
 36745  			break
 36746  		}
 36747  		if s4.AuxInt != 40 {
 36748  			break
 36749  		}
 36750  		x5 := s4.Args[0]
 36751  		if x5.Op != OpPPC64MOVBZload {
 36752  			break
 36753  		}
 36754  		i5 := x5.AuxInt
 36755  		if x5.Aux != s {
 36756  			break
 36757  		}
 36758  		_ = x5.Args[1]
 36759  		if p != x5.Args[0] {
 36760  			break
 36761  		}
 36762  		if mem != x5.Args[1] {
 36763  			break
 36764  		}
 36765  		s5 := o5.Args[1]
 36766  		if s5.Op != OpPPC64SLDconst {
 36767  			break
 36768  		}
 36769  		if s5.AuxInt != 48 {
 36770  			break
 36771  		}
 36772  		x6 := s5.Args[0]
 36773  		if x6.Op != OpPPC64MOVBZload {
 36774  			break
 36775  		}
 36776  		i6 := x6.AuxInt
 36777  		if x6.Aux != s {
 36778  			break
 36779  		}
 36780  		_ = x6.Args[1]
 36781  		if p != x6.Args[0] {
 36782  			break
 36783  		}
 36784  		if mem != x6.Args[1] {
 36785  			break
 36786  		}
 36787  		s6 := v.Args[1]
 36788  		if s6.Op != OpPPC64SLDconst {
 36789  			break
 36790  		}
 36791  		if s6.AuxInt != 56 {
 36792  			break
 36793  		}
 36794  		x7 := s6.Args[0]
 36795  		if x7.Op != OpPPC64MOVBZload {
 36796  			break
 36797  		}
 36798  		i7 := x7.AuxInt
 36799  		if x7.Aux != s {
 36800  			break
 36801  		}
 36802  		_ = x7.Args[1]
 36803  		if p != x7.Args[0] {
 36804  			break
 36805  		}
 36806  		if mem != x7.Args[1] {
 36807  			break
 36808  		}
 36809  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 36810  			break
 36811  		}
 36812  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 36813  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 36814  		v.reset(OpCopy)
 36815  		v.AddArg(v0)
 36816  		v0.AuxInt = i0
 36817  		v0.Aux = s
 36818  		v0.AddArg(p)
 36819  		v0.AddArg(mem)
 36820  		return true
 36821  	}
 36822  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 36823  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 36824  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 36825  	for {
 36826  		t := v.Type
 36827  		_ = v.Args[1]
 36828  		o5 := v.Args[0]
 36829  		if o5.Op != OpPPC64OR {
 36830  			break
 36831  		}
 36832  		if o5.Type != t {
 36833  			break
 36834  		}
 36835  		_ = o5.Args[1]
 36836  		o4 := o5.Args[0]
 36837  		if o4.Op != OpPPC64OR {
 36838  			break
 36839  		}
 36840  		if o4.Type != t {
 36841  			break
 36842  		}
 36843  		_ = o4.Args[1]
 36844  		o3 := o4.Args[0]
 36845  		if o3.Op != OpPPC64OR {
 36846  			break
 36847  		}
 36848  		if o3.Type != t {
 36849  			break
 36850  		}
 36851  		_ = o3.Args[1]
 36852  		s3 := o3.Args[0]
 36853  		if s3.Op != OpPPC64SLDconst {
 36854  			break
 36855  		}
 36856  		if s3.AuxInt != 32 {
 36857  			break
 36858  		}
 36859  		x4 := s3.Args[0]
 36860  		if x4.Op != OpPPC64MOVBZload {
 36861  			break
 36862  		}
 36863  		i4 := x4.AuxInt
 36864  		s := x4.Aux
 36865  		_ = x4.Args[1]
 36866  		p := x4.Args[0]
 36867  		mem := x4.Args[1]
 36868  		o2 := o3.Args[1]
 36869  		if o2.Op != OpPPC64OR {
 36870  			break
 36871  		}
 36872  		if o2.Type != t {
 36873  			break
 36874  		}
 36875  		_ = o2.Args[1]
 36876  		o1 := o2.Args[0]
 36877  		if o1.Op != OpPPC64OR {
 36878  			break
 36879  		}
 36880  		if o1.Type != t {
 36881  			break
 36882  		}
 36883  		_ = o1.Args[1]
 36884  		s1 := o1.Args[0]
 36885  		if s1.Op != OpPPC64SLDconst {
 36886  			break
 36887  		}
 36888  		if s1.AuxInt != 16 {
 36889  			break
 36890  		}
 36891  		x2 := s1.Args[0]
 36892  		if x2.Op != OpPPC64MOVBZload {
 36893  			break
 36894  		}
 36895  		i2 := x2.AuxInt
 36896  		if x2.Aux != s {
 36897  			break
 36898  		}
 36899  		_ = x2.Args[1]
 36900  		if p != x2.Args[0] {
 36901  			break
 36902  		}
 36903  		if mem != x2.Args[1] {
 36904  			break
 36905  		}
 36906  		o0 := o1.Args[1]
 36907  		if o0.Op != OpPPC64OR {
 36908  			break
 36909  		}
 36910  		if o0.Type != t {
 36911  			break
 36912  		}
 36913  		_ = o0.Args[1]
 36914  		x0 := o0.Args[0]
 36915  		if x0.Op != OpPPC64MOVBZload {
 36916  			break
 36917  		}
 36918  		i0 := x0.AuxInt
 36919  		if x0.Aux != s {
 36920  			break
 36921  		}
 36922  		_ = x0.Args[1]
 36923  		if p != x0.Args[0] {
 36924  			break
 36925  		}
 36926  		if mem != x0.Args[1] {
 36927  			break
 36928  		}
 36929  		s0 := o0.Args[1]
 36930  		if s0.Op != OpPPC64SLDconst {
 36931  			break
 36932  		}
 36933  		if s0.AuxInt != 8 {
 36934  			break
 36935  		}
 36936  		x1 := s0.Args[0]
 36937  		if x1.Op != OpPPC64MOVBZload {
 36938  			break
 36939  		}
 36940  		i1 := x1.AuxInt
 36941  		if x1.Aux != s {
 36942  			break
 36943  		}
 36944  		_ = x1.Args[1]
 36945  		if p != x1.Args[0] {
 36946  			break
 36947  		}
 36948  		if mem != x1.Args[1] {
 36949  			break
 36950  		}
 36951  		s2 := o2.Args[1]
 36952  		if s2.Op != OpPPC64SLDconst {
 36953  			break
 36954  		}
 36955  		if s2.AuxInt != 24 {
 36956  			break
 36957  		}
 36958  		x3 := s2.Args[0]
 36959  		if x3.Op != OpPPC64MOVBZload {
 36960  			break
 36961  		}
 36962  		i3 := x3.AuxInt
 36963  		if x3.Aux != s {
 36964  			break
 36965  		}
 36966  		_ = x3.Args[1]
 36967  		if p != x3.Args[0] {
 36968  			break
 36969  		}
 36970  		if mem != x3.Args[1] {
 36971  			break
 36972  		}
 36973  		s4 := o4.Args[1]
 36974  		if s4.Op != OpPPC64SLDconst {
 36975  			break
 36976  		}
 36977  		if s4.AuxInt != 40 {
 36978  			break
 36979  		}
 36980  		x5 := s4.Args[0]
 36981  		if x5.Op != OpPPC64MOVBZload {
 36982  			break
 36983  		}
 36984  		i5 := x5.AuxInt
 36985  		if x5.Aux != s {
 36986  			break
 36987  		}
 36988  		_ = x5.Args[1]
 36989  		if p != x5.Args[0] {
 36990  			break
 36991  		}
 36992  		if mem != x5.Args[1] {
 36993  			break
 36994  		}
 36995  		s5 := o5.Args[1]
 36996  		if s5.Op != OpPPC64SLDconst {
 36997  			break
 36998  		}
 36999  		if s5.AuxInt != 48 {
 37000  			break
 37001  		}
 37002  		x6 := s5.Args[0]
 37003  		if x6.Op != OpPPC64MOVBZload {
 37004  			break
 37005  		}
 37006  		i6 := x6.AuxInt
 37007  		if x6.Aux != s {
 37008  			break
 37009  		}
 37010  		_ = x6.Args[1]
 37011  		if p != x6.Args[0] {
 37012  			break
 37013  		}
 37014  		if mem != x6.Args[1] {
 37015  			break
 37016  		}
 37017  		s6 := v.Args[1]
 37018  		if s6.Op != OpPPC64SLDconst {
 37019  			break
 37020  		}
 37021  		if s6.AuxInt != 56 {
 37022  			break
 37023  		}
 37024  		x7 := s6.Args[0]
 37025  		if x7.Op != OpPPC64MOVBZload {
 37026  			break
 37027  		}
 37028  		i7 := x7.AuxInt
 37029  		if x7.Aux != s {
 37030  			break
 37031  		}
 37032  		_ = x7.Args[1]
 37033  		if p != x7.Args[0] {
 37034  			break
 37035  		}
 37036  		if mem != x7.Args[1] {
 37037  			break
 37038  		}
 37039  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37040  			break
 37041  		}
 37042  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37043  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37044  		v.reset(OpCopy)
 37045  		v.AddArg(v0)
 37046  		v0.AuxInt = i0
 37047  		v0.Aux = s
 37048  		v0.AddArg(p)
 37049  		v0.AddArg(mem)
 37050  		return true
 37051  	}
 37052  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37053  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37054  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37055  	for {
 37056  		t := v.Type
 37057  		_ = v.Args[1]
 37058  		o5 := v.Args[0]
 37059  		if o5.Op != OpPPC64OR {
 37060  			break
 37061  		}
 37062  		if o5.Type != t {
 37063  			break
 37064  		}
 37065  		_ = o5.Args[1]
 37066  		o4 := o5.Args[0]
 37067  		if o4.Op != OpPPC64OR {
 37068  			break
 37069  		}
 37070  		if o4.Type != t {
 37071  			break
 37072  		}
 37073  		_ = o4.Args[1]
 37074  		o3 := o4.Args[0]
 37075  		if o3.Op != OpPPC64OR {
 37076  			break
 37077  		}
 37078  		if o3.Type != t {
 37079  			break
 37080  		}
 37081  		_ = o3.Args[1]
 37082  		s3 := o3.Args[0]
 37083  		if s3.Op != OpPPC64SLDconst {
 37084  			break
 37085  		}
 37086  		if s3.AuxInt != 32 {
 37087  			break
 37088  		}
 37089  		x4 := s3.Args[0]
 37090  		if x4.Op != OpPPC64MOVBZload {
 37091  			break
 37092  		}
 37093  		i4 := x4.AuxInt
 37094  		s := x4.Aux
 37095  		_ = x4.Args[1]
 37096  		p := x4.Args[0]
 37097  		mem := x4.Args[1]
 37098  		o2 := o3.Args[1]
 37099  		if o2.Op != OpPPC64OR {
 37100  			break
 37101  		}
 37102  		if o2.Type != t {
 37103  			break
 37104  		}
 37105  		_ = o2.Args[1]
 37106  		o1 := o2.Args[0]
 37107  		if o1.Op != OpPPC64OR {
 37108  			break
 37109  		}
 37110  		if o1.Type != t {
 37111  			break
 37112  		}
 37113  		_ = o1.Args[1]
 37114  		o0 := o1.Args[0]
 37115  		if o0.Op != OpPPC64OR {
 37116  			break
 37117  		}
 37118  		if o0.Type != t {
 37119  			break
 37120  		}
 37121  		_ = o0.Args[1]
 37122  		s0 := o0.Args[0]
 37123  		if s0.Op != OpPPC64SLDconst {
 37124  			break
 37125  		}
 37126  		if s0.AuxInt != 8 {
 37127  			break
 37128  		}
 37129  		x1 := s0.Args[0]
 37130  		if x1.Op != OpPPC64MOVBZload {
 37131  			break
 37132  		}
 37133  		i1 := x1.AuxInt
 37134  		if x1.Aux != s {
 37135  			break
 37136  		}
 37137  		_ = x1.Args[1]
 37138  		if p != x1.Args[0] {
 37139  			break
 37140  		}
 37141  		if mem != x1.Args[1] {
 37142  			break
 37143  		}
 37144  		x0 := o0.Args[1]
 37145  		if x0.Op != OpPPC64MOVBZload {
 37146  			break
 37147  		}
 37148  		i0 := x0.AuxInt
 37149  		if x0.Aux != s {
 37150  			break
 37151  		}
 37152  		_ = x0.Args[1]
 37153  		if p != x0.Args[0] {
 37154  			break
 37155  		}
 37156  		if mem != x0.Args[1] {
 37157  			break
 37158  		}
 37159  		s1 := o1.Args[1]
 37160  		if s1.Op != OpPPC64SLDconst {
 37161  			break
 37162  		}
 37163  		if s1.AuxInt != 16 {
 37164  			break
 37165  		}
 37166  		x2 := s1.Args[0]
 37167  		if x2.Op != OpPPC64MOVBZload {
 37168  			break
 37169  		}
 37170  		i2 := x2.AuxInt
 37171  		if x2.Aux != s {
 37172  			break
 37173  		}
 37174  		_ = x2.Args[1]
 37175  		if p != x2.Args[0] {
 37176  			break
 37177  		}
 37178  		if mem != x2.Args[1] {
 37179  			break
 37180  		}
 37181  		s2 := o2.Args[1]
 37182  		if s2.Op != OpPPC64SLDconst {
 37183  			break
 37184  		}
 37185  		if s2.AuxInt != 24 {
 37186  			break
 37187  		}
 37188  		x3 := s2.Args[0]
 37189  		if x3.Op != OpPPC64MOVBZload {
 37190  			break
 37191  		}
 37192  		i3 := x3.AuxInt
 37193  		if x3.Aux != s {
 37194  			break
 37195  		}
 37196  		_ = x3.Args[1]
 37197  		if p != x3.Args[0] {
 37198  			break
 37199  		}
 37200  		if mem != x3.Args[1] {
 37201  			break
 37202  		}
 37203  		s4 := o4.Args[1]
 37204  		if s4.Op != OpPPC64SLDconst {
 37205  			break
 37206  		}
 37207  		if s4.AuxInt != 40 {
 37208  			break
 37209  		}
 37210  		x5 := s4.Args[0]
 37211  		if x5.Op != OpPPC64MOVBZload {
 37212  			break
 37213  		}
 37214  		i5 := x5.AuxInt
 37215  		if x5.Aux != s {
 37216  			break
 37217  		}
 37218  		_ = x5.Args[1]
 37219  		if p != x5.Args[0] {
 37220  			break
 37221  		}
 37222  		if mem != x5.Args[1] {
 37223  			break
 37224  		}
 37225  		s5 := o5.Args[1]
 37226  		if s5.Op != OpPPC64SLDconst {
 37227  			break
 37228  		}
 37229  		if s5.AuxInt != 48 {
 37230  			break
 37231  		}
 37232  		x6 := s5.Args[0]
 37233  		if x6.Op != OpPPC64MOVBZload {
 37234  			break
 37235  		}
 37236  		i6 := x6.AuxInt
 37237  		if x6.Aux != s {
 37238  			break
 37239  		}
 37240  		_ = x6.Args[1]
 37241  		if p != x6.Args[0] {
 37242  			break
 37243  		}
 37244  		if mem != x6.Args[1] {
 37245  			break
 37246  		}
 37247  		s6 := v.Args[1]
 37248  		if s6.Op != OpPPC64SLDconst {
 37249  			break
 37250  		}
 37251  		if s6.AuxInt != 56 {
 37252  			break
 37253  		}
 37254  		x7 := s6.Args[0]
 37255  		if x7.Op != OpPPC64MOVBZload {
 37256  			break
 37257  		}
 37258  		i7 := x7.AuxInt
 37259  		if x7.Aux != s {
 37260  			break
 37261  		}
 37262  		_ = x7.Args[1]
 37263  		if p != x7.Args[0] {
 37264  			break
 37265  		}
 37266  		if mem != x7.Args[1] {
 37267  			break
 37268  		}
 37269  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37270  			break
 37271  		}
 37272  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37273  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37274  		v.reset(OpCopy)
 37275  		v.AddArg(v0)
 37276  		v0.AuxInt = i0
 37277  		v0.Aux = s
 37278  		v0.AddArg(p)
 37279  		v0.AddArg(mem)
 37280  		return true
 37281  	}
 37282  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]))) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37283  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37284  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37285  	for {
 37286  		t := v.Type
 37287  		_ = v.Args[1]
 37288  		o5 := v.Args[0]
 37289  		if o5.Op != OpPPC64OR {
 37290  			break
 37291  		}
 37292  		if o5.Type != t {
 37293  			break
 37294  		}
 37295  		_ = o5.Args[1]
 37296  		o4 := o5.Args[0]
 37297  		if o4.Op != OpPPC64OR {
 37298  			break
 37299  		}
 37300  		if o4.Type != t {
 37301  			break
 37302  		}
 37303  		_ = o4.Args[1]
 37304  		o3 := o4.Args[0]
 37305  		if o3.Op != OpPPC64OR {
 37306  			break
 37307  		}
 37308  		if o3.Type != t {
 37309  			break
 37310  		}
 37311  		_ = o3.Args[1]
 37312  		s3 := o3.Args[0]
 37313  		if s3.Op != OpPPC64SLDconst {
 37314  			break
 37315  		}
 37316  		if s3.AuxInt != 32 {
 37317  			break
 37318  		}
 37319  		x4 := s3.Args[0]
 37320  		if x4.Op != OpPPC64MOVBZload {
 37321  			break
 37322  		}
 37323  		i4 := x4.AuxInt
 37324  		s := x4.Aux
 37325  		_ = x4.Args[1]
 37326  		p := x4.Args[0]
 37327  		mem := x4.Args[1]
 37328  		o2 := o3.Args[1]
 37329  		if o2.Op != OpPPC64OR {
 37330  			break
 37331  		}
 37332  		if o2.Type != t {
 37333  			break
 37334  		}
 37335  		_ = o2.Args[1]
 37336  		o1 := o2.Args[0]
 37337  		if o1.Op != OpPPC64OR {
 37338  			break
 37339  		}
 37340  		if o1.Type != t {
 37341  			break
 37342  		}
 37343  		_ = o1.Args[1]
 37344  		o0 := o1.Args[0]
 37345  		if o0.Op != OpPPC64OR {
 37346  			break
 37347  		}
 37348  		if o0.Type != t {
 37349  			break
 37350  		}
 37351  		_ = o0.Args[1]
 37352  		x0 := o0.Args[0]
 37353  		if x0.Op != OpPPC64MOVBZload {
 37354  			break
 37355  		}
 37356  		i0 := x0.AuxInt
 37357  		if x0.Aux != s {
 37358  			break
 37359  		}
 37360  		_ = x0.Args[1]
 37361  		if p != x0.Args[0] {
 37362  			break
 37363  		}
 37364  		if mem != x0.Args[1] {
 37365  			break
 37366  		}
 37367  		s0 := o0.Args[1]
 37368  		if s0.Op != OpPPC64SLDconst {
 37369  			break
 37370  		}
 37371  		if s0.AuxInt != 8 {
 37372  			break
 37373  		}
 37374  		x1 := s0.Args[0]
 37375  		if x1.Op != OpPPC64MOVBZload {
 37376  			break
 37377  		}
 37378  		i1 := x1.AuxInt
 37379  		if x1.Aux != s {
 37380  			break
 37381  		}
 37382  		_ = x1.Args[1]
 37383  		if p != x1.Args[0] {
 37384  			break
 37385  		}
 37386  		if mem != x1.Args[1] {
 37387  			break
 37388  		}
 37389  		s1 := o1.Args[1]
 37390  		if s1.Op != OpPPC64SLDconst {
 37391  			break
 37392  		}
 37393  		if s1.AuxInt != 16 {
 37394  			break
 37395  		}
 37396  		x2 := s1.Args[0]
 37397  		if x2.Op != OpPPC64MOVBZload {
 37398  			break
 37399  		}
 37400  		i2 := x2.AuxInt
 37401  		if x2.Aux != s {
 37402  			break
 37403  		}
 37404  		_ = x2.Args[1]
 37405  		if p != x2.Args[0] {
 37406  			break
 37407  		}
 37408  		if mem != x2.Args[1] {
 37409  			break
 37410  		}
 37411  		s2 := o2.Args[1]
 37412  		if s2.Op != OpPPC64SLDconst {
 37413  			break
 37414  		}
 37415  		if s2.AuxInt != 24 {
 37416  			break
 37417  		}
 37418  		x3 := s2.Args[0]
 37419  		if x3.Op != OpPPC64MOVBZload {
 37420  			break
 37421  		}
 37422  		i3 := x3.AuxInt
 37423  		if x3.Aux != s {
 37424  			break
 37425  		}
 37426  		_ = x3.Args[1]
 37427  		if p != x3.Args[0] {
 37428  			break
 37429  		}
 37430  		if mem != x3.Args[1] {
 37431  			break
 37432  		}
 37433  		s4 := o4.Args[1]
 37434  		if s4.Op != OpPPC64SLDconst {
 37435  			break
 37436  		}
 37437  		if s4.AuxInt != 40 {
 37438  			break
 37439  		}
 37440  		x5 := s4.Args[0]
 37441  		if x5.Op != OpPPC64MOVBZload {
 37442  			break
 37443  		}
 37444  		i5 := x5.AuxInt
 37445  		if x5.Aux != s {
 37446  			break
 37447  		}
 37448  		_ = x5.Args[1]
 37449  		if p != x5.Args[0] {
 37450  			break
 37451  		}
 37452  		if mem != x5.Args[1] {
 37453  			break
 37454  		}
 37455  		s5 := o5.Args[1]
 37456  		if s5.Op != OpPPC64SLDconst {
 37457  			break
 37458  		}
 37459  		if s5.AuxInt != 48 {
 37460  			break
 37461  		}
 37462  		x6 := s5.Args[0]
 37463  		if x6.Op != OpPPC64MOVBZload {
 37464  			break
 37465  		}
 37466  		i6 := x6.AuxInt
 37467  		if x6.Aux != s {
 37468  			break
 37469  		}
 37470  		_ = x6.Args[1]
 37471  		if p != x6.Args[0] {
 37472  			break
 37473  		}
 37474  		if mem != x6.Args[1] {
 37475  			break
 37476  		}
 37477  		s6 := v.Args[1]
 37478  		if s6.Op != OpPPC64SLDconst {
 37479  			break
 37480  		}
 37481  		if s6.AuxInt != 56 {
 37482  			break
 37483  		}
 37484  		x7 := s6.Args[0]
 37485  		if x7.Op != OpPPC64MOVBZload {
 37486  			break
 37487  		}
 37488  		i7 := x7.AuxInt
 37489  		if x7.Aux != s {
 37490  			break
 37491  		}
 37492  		_ = x7.Args[1]
 37493  		if p != x7.Args[0] {
 37494  			break
 37495  		}
 37496  		if mem != x7.Args[1] {
 37497  			break
 37498  		}
 37499  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37500  			break
 37501  		}
 37502  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37503  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37504  		v.reset(OpCopy)
 37505  		v.AddArg(v0)
 37506  		v0.AuxInt = i0
 37507  		v0.Aux = s
 37508  		v0.AddArg(p)
 37509  		v0.AddArg(mem)
 37510  		return true
 37511  	}
 37512  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37513  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37514  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37515  	for {
 37516  		t := v.Type
 37517  		_ = v.Args[1]
 37518  		o5 := v.Args[0]
 37519  		if o5.Op != OpPPC64OR {
 37520  			break
 37521  		}
 37522  		if o5.Type != t {
 37523  			break
 37524  		}
 37525  		_ = o5.Args[1]
 37526  		o4 := o5.Args[0]
 37527  		if o4.Op != OpPPC64OR {
 37528  			break
 37529  		}
 37530  		if o4.Type != t {
 37531  			break
 37532  		}
 37533  		_ = o4.Args[1]
 37534  		o3 := o4.Args[0]
 37535  		if o3.Op != OpPPC64OR {
 37536  			break
 37537  		}
 37538  		if o3.Type != t {
 37539  			break
 37540  		}
 37541  		_ = o3.Args[1]
 37542  		o2 := o3.Args[0]
 37543  		if o2.Op != OpPPC64OR {
 37544  			break
 37545  		}
 37546  		if o2.Type != t {
 37547  			break
 37548  		}
 37549  		_ = o2.Args[1]
 37550  		s2 := o2.Args[0]
 37551  		if s2.Op != OpPPC64SLDconst {
 37552  			break
 37553  		}
 37554  		if s2.AuxInt != 24 {
 37555  			break
 37556  		}
 37557  		x3 := s2.Args[0]
 37558  		if x3.Op != OpPPC64MOVBZload {
 37559  			break
 37560  		}
 37561  		i3 := x3.AuxInt
 37562  		s := x3.Aux
 37563  		_ = x3.Args[1]
 37564  		p := x3.Args[0]
 37565  		mem := x3.Args[1]
 37566  		o1 := o2.Args[1]
 37567  		if o1.Op != OpPPC64OR {
 37568  			break
 37569  		}
 37570  		if o1.Type != t {
 37571  			break
 37572  		}
 37573  		_ = o1.Args[1]
 37574  		s1 := o1.Args[0]
 37575  		if s1.Op != OpPPC64SLDconst {
 37576  			break
 37577  		}
 37578  		if s1.AuxInt != 16 {
 37579  			break
 37580  		}
 37581  		x2 := s1.Args[0]
 37582  		if x2.Op != OpPPC64MOVBZload {
 37583  			break
 37584  		}
 37585  		i2 := x2.AuxInt
 37586  		if x2.Aux != s {
 37587  			break
 37588  		}
 37589  		_ = x2.Args[1]
 37590  		if p != x2.Args[0] {
 37591  			break
 37592  		}
 37593  		if mem != x2.Args[1] {
 37594  			break
 37595  		}
 37596  		o0 := o1.Args[1]
 37597  		if o0.Op != OpPPC64OR {
 37598  			break
 37599  		}
 37600  		if o0.Type != t {
 37601  			break
 37602  		}
 37603  		_ = o0.Args[1]
 37604  		s0 := o0.Args[0]
 37605  		if s0.Op != OpPPC64SLDconst {
 37606  			break
 37607  		}
 37608  		if s0.AuxInt != 8 {
 37609  			break
 37610  		}
 37611  		x1 := s0.Args[0]
 37612  		if x1.Op != OpPPC64MOVBZload {
 37613  			break
 37614  		}
 37615  		i1 := x1.AuxInt
 37616  		if x1.Aux != s {
 37617  			break
 37618  		}
 37619  		_ = x1.Args[1]
 37620  		if p != x1.Args[0] {
 37621  			break
 37622  		}
 37623  		if mem != x1.Args[1] {
 37624  			break
 37625  		}
 37626  		x0 := o0.Args[1]
 37627  		if x0.Op != OpPPC64MOVBZload {
 37628  			break
 37629  		}
 37630  		i0 := x0.AuxInt
 37631  		if x0.Aux != s {
 37632  			break
 37633  		}
 37634  		_ = x0.Args[1]
 37635  		if p != x0.Args[0] {
 37636  			break
 37637  		}
 37638  		if mem != x0.Args[1] {
 37639  			break
 37640  		}
 37641  		s3 := o3.Args[1]
 37642  		if s3.Op != OpPPC64SLDconst {
 37643  			break
 37644  		}
 37645  		if s3.AuxInt != 32 {
 37646  			break
 37647  		}
 37648  		x4 := s3.Args[0]
 37649  		if x4.Op != OpPPC64MOVBZload {
 37650  			break
 37651  		}
 37652  		i4 := x4.AuxInt
 37653  		if x4.Aux != s {
 37654  			break
 37655  		}
 37656  		_ = x4.Args[1]
 37657  		if p != x4.Args[0] {
 37658  			break
 37659  		}
 37660  		if mem != x4.Args[1] {
 37661  			break
 37662  		}
 37663  		s4 := o4.Args[1]
 37664  		if s4.Op != OpPPC64SLDconst {
 37665  			break
 37666  		}
 37667  		if s4.AuxInt != 40 {
 37668  			break
 37669  		}
 37670  		x5 := s4.Args[0]
 37671  		if x5.Op != OpPPC64MOVBZload {
 37672  			break
 37673  		}
 37674  		i5 := x5.AuxInt
 37675  		if x5.Aux != s {
 37676  			break
 37677  		}
 37678  		_ = x5.Args[1]
 37679  		if p != x5.Args[0] {
 37680  			break
 37681  		}
 37682  		if mem != x5.Args[1] {
 37683  			break
 37684  		}
 37685  		s5 := o5.Args[1]
 37686  		if s5.Op != OpPPC64SLDconst {
 37687  			break
 37688  		}
 37689  		if s5.AuxInt != 48 {
 37690  			break
 37691  		}
 37692  		x6 := s5.Args[0]
 37693  		if x6.Op != OpPPC64MOVBZload {
 37694  			break
 37695  		}
 37696  		i6 := x6.AuxInt
 37697  		if x6.Aux != s {
 37698  			break
 37699  		}
 37700  		_ = x6.Args[1]
 37701  		if p != x6.Args[0] {
 37702  			break
 37703  		}
 37704  		if mem != x6.Args[1] {
 37705  			break
 37706  		}
 37707  		s6 := v.Args[1]
 37708  		if s6.Op != OpPPC64SLDconst {
 37709  			break
 37710  		}
 37711  		if s6.AuxInt != 56 {
 37712  			break
 37713  		}
 37714  		x7 := s6.Args[0]
 37715  		if x7.Op != OpPPC64MOVBZload {
 37716  			break
 37717  		}
 37718  		i7 := x7.AuxInt
 37719  		if x7.Aux != s {
 37720  			break
 37721  		}
 37722  		_ = x7.Args[1]
 37723  		if p != x7.Args[0] {
 37724  			break
 37725  		}
 37726  		if mem != x7.Args[1] {
 37727  			break
 37728  		}
 37729  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37730  			break
 37731  		}
 37732  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37733  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37734  		v.reset(OpCopy)
 37735  		v.AddArg(v0)
 37736  		v0.AuxInt = i0
 37737  		v0.Aux = s
 37738  		v0.AddArg(p)
 37739  		v0.AddArg(mem)
 37740  		return true
 37741  	}
 37742  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37743  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37744  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37745  	for {
 37746  		t := v.Type
 37747  		_ = v.Args[1]
 37748  		o5 := v.Args[0]
 37749  		if o5.Op != OpPPC64OR {
 37750  			break
 37751  		}
 37752  		if o5.Type != t {
 37753  			break
 37754  		}
 37755  		_ = o5.Args[1]
 37756  		o4 := o5.Args[0]
 37757  		if o4.Op != OpPPC64OR {
 37758  			break
 37759  		}
 37760  		if o4.Type != t {
 37761  			break
 37762  		}
 37763  		_ = o4.Args[1]
 37764  		o3 := o4.Args[0]
 37765  		if o3.Op != OpPPC64OR {
 37766  			break
 37767  		}
 37768  		if o3.Type != t {
 37769  			break
 37770  		}
 37771  		_ = o3.Args[1]
 37772  		o2 := o3.Args[0]
 37773  		if o2.Op != OpPPC64OR {
 37774  			break
 37775  		}
 37776  		if o2.Type != t {
 37777  			break
 37778  		}
 37779  		_ = o2.Args[1]
 37780  		s2 := o2.Args[0]
 37781  		if s2.Op != OpPPC64SLDconst {
 37782  			break
 37783  		}
 37784  		if s2.AuxInt != 24 {
 37785  			break
 37786  		}
 37787  		x3 := s2.Args[0]
 37788  		if x3.Op != OpPPC64MOVBZload {
 37789  			break
 37790  		}
 37791  		i3 := x3.AuxInt
 37792  		s := x3.Aux
 37793  		_ = x3.Args[1]
 37794  		p := x3.Args[0]
 37795  		mem := x3.Args[1]
 37796  		o1 := o2.Args[1]
 37797  		if o1.Op != OpPPC64OR {
 37798  			break
 37799  		}
 37800  		if o1.Type != t {
 37801  			break
 37802  		}
 37803  		_ = o1.Args[1]
 37804  		s1 := o1.Args[0]
 37805  		if s1.Op != OpPPC64SLDconst {
 37806  			break
 37807  		}
 37808  		if s1.AuxInt != 16 {
 37809  			break
 37810  		}
 37811  		x2 := s1.Args[0]
 37812  		if x2.Op != OpPPC64MOVBZload {
 37813  			break
 37814  		}
 37815  		i2 := x2.AuxInt
 37816  		if x2.Aux != s {
 37817  			break
 37818  		}
 37819  		_ = x2.Args[1]
 37820  		if p != x2.Args[0] {
 37821  			break
 37822  		}
 37823  		if mem != x2.Args[1] {
 37824  			break
 37825  		}
 37826  		o0 := o1.Args[1]
 37827  		if o0.Op != OpPPC64OR {
 37828  			break
 37829  		}
 37830  		if o0.Type != t {
 37831  			break
 37832  		}
 37833  		_ = o0.Args[1]
 37834  		x0 := o0.Args[0]
 37835  		if x0.Op != OpPPC64MOVBZload {
 37836  			break
 37837  		}
 37838  		i0 := x0.AuxInt
 37839  		if x0.Aux != s {
 37840  			break
 37841  		}
 37842  		_ = x0.Args[1]
 37843  		if p != x0.Args[0] {
 37844  			break
 37845  		}
 37846  		if mem != x0.Args[1] {
 37847  			break
 37848  		}
 37849  		s0 := o0.Args[1]
 37850  		if s0.Op != OpPPC64SLDconst {
 37851  			break
 37852  		}
 37853  		if s0.AuxInt != 8 {
 37854  			break
 37855  		}
 37856  		x1 := s0.Args[0]
 37857  		if x1.Op != OpPPC64MOVBZload {
 37858  			break
 37859  		}
 37860  		i1 := x1.AuxInt
 37861  		if x1.Aux != s {
 37862  			break
 37863  		}
 37864  		_ = x1.Args[1]
 37865  		if p != x1.Args[0] {
 37866  			break
 37867  		}
 37868  		if mem != x1.Args[1] {
 37869  			break
 37870  		}
 37871  		s3 := o3.Args[1]
 37872  		if s3.Op != OpPPC64SLDconst {
 37873  			break
 37874  		}
 37875  		if s3.AuxInt != 32 {
 37876  			break
 37877  		}
 37878  		x4 := s3.Args[0]
 37879  		if x4.Op != OpPPC64MOVBZload {
 37880  			break
 37881  		}
 37882  		i4 := x4.AuxInt
 37883  		if x4.Aux != s {
 37884  			break
 37885  		}
 37886  		_ = x4.Args[1]
 37887  		if p != x4.Args[0] {
 37888  			break
 37889  		}
 37890  		if mem != x4.Args[1] {
 37891  			break
 37892  		}
 37893  		s4 := o4.Args[1]
 37894  		if s4.Op != OpPPC64SLDconst {
 37895  			break
 37896  		}
 37897  		if s4.AuxInt != 40 {
 37898  			break
 37899  		}
 37900  		x5 := s4.Args[0]
 37901  		if x5.Op != OpPPC64MOVBZload {
 37902  			break
 37903  		}
 37904  		i5 := x5.AuxInt
 37905  		if x5.Aux != s {
 37906  			break
 37907  		}
 37908  		_ = x5.Args[1]
 37909  		if p != x5.Args[0] {
 37910  			break
 37911  		}
 37912  		if mem != x5.Args[1] {
 37913  			break
 37914  		}
 37915  		s5 := o5.Args[1]
 37916  		if s5.Op != OpPPC64SLDconst {
 37917  			break
 37918  		}
 37919  		if s5.AuxInt != 48 {
 37920  			break
 37921  		}
 37922  		x6 := s5.Args[0]
 37923  		if x6.Op != OpPPC64MOVBZload {
 37924  			break
 37925  		}
 37926  		i6 := x6.AuxInt
 37927  		if x6.Aux != s {
 37928  			break
 37929  		}
 37930  		_ = x6.Args[1]
 37931  		if p != x6.Args[0] {
 37932  			break
 37933  		}
 37934  		if mem != x6.Args[1] {
 37935  			break
 37936  		}
 37937  		s6 := v.Args[1]
 37938  		if s6.Op != OpPPC64SLDconst {
 37939  			break
 37940  		}
 37941  		if s6.AuxInt != 56 {
 37942  			break
 37943  		}
 37944  		x7 := s6.Args[0]
 37945  		if x7.Op != OpPPC64MOVBZload {
 37946  			break
 37947  		}
 37948  		i7 := x7.AuxInt
 37949  		if x7.Aux != s {
 37950  			break
 37951  		}
 37952  		_ = x7.Args[1]
 37953  		if p != x7.Args[0] {
 37954  			break
 37955  		}
 37956  		if mem != x7.Args[1] {
 37957  			break
 37958  		}
 37959  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 37960  			break
 37961  		}
 37962  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 37963  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 37964  		v.reset(OpCopy)
 37965  		v.AddArg(v0)
 37966  		v0.AuxInt = i0
 37967  		v0.Aux = s
 37968  		v0.AddArg(p)
 37969  		v0.AddArg(mem)
 37970  		return true
 37971  	}
 37972  	return false
 37973  }
 37974  func rewriteValuePPC64_OpPPC64OR_140(v *Value) bool {
 37975  	b := v.Block
 37976  	_ = b
 37977  	config := b.Func.Config
 37978  	_ = config
 37979  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 37980  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 37981  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 37982  	for {
 37983  		t := v.Type
 37984  		_ = v.Args[1]
 37985  		o5 := v.Args[0]
 37986  		if o5.Op != OpPPC64OR {
 37987  			break
 37988  		}
 37989  		if o5.Type != t {
 37990  			break
 37991  		}
 37992  		_ = o5.Args[1]
 37993  		o4 := o5.Args[0]
 37994  		if o4.Op != OpPPC64OR {
 37995  			break
 37996  		}
 37997  		if o4.Type != t {
 37998  			break
 37999  		}
 38000  		_ = o4.Args[1]
 38001  		o3 := o4.Args[0]
 38002  		if o3.Op != OpPPC64OR {
 38003  			break
 38004  		}
 38005  		if o3.Type != t {
 38006  			break
 38007  		}
 38008  		_ = o3.Args[1]
 38009  		o2 := o3.Args[0]
 38010  		if o2.Op != OpPPC64OR {
 38011  			break
 38012  		}
 38013  		if o2.Type != t {
 38014  			break
 38015  		}
 38016  		_ = o2.Args[1]
 38017  		s2 := o2.Args[0]
 38018  		if s2.Op != OpPPC64SLDconst {
 38019  			break
 38020  		}
 38021  		if s2.AuxInt != 24 {
 38022  			break
 38023  		}
 38024  		x3 := s2.Args[0]
 38025  		if x3.Op != OpPPC64MOVBZload {
 38026  			break
 38027  		}
 38028  		i3 := x3.AuxInt
 38029  		s := x3.Aux
 38030  		_ = x3.Args[1]
 38031  		p := x3.Args[0]
 38032  		mem := x3.Args[1]
 38033  		o1 := o2.Args[1]
 38034  		if o1.Op != OpPPC64OR {
 38035  			break
 38036  		}
 38037  		if o1.Type != t {
 38038  			break
 38039  		}
 38040  		_ = o1.Args[1]
 38041  		o0 := o1.Args[0]
 38042  		if o0.Op != OpPPC64OR {
 38043  			break
 38044  		}
 38045  		if o0.Type != t {
 38046  			break
 38047  		}
 38048  		_ = o0.Args[1]
 38049  		s0 := o0.Args[0]
 38050  		if s0.Op != OpPPC64SLDconst {
 38051  			break
 38052  		}
 38053  		if s0.AuxInt != 8 {
 38054  			break
 38055  		}
 38056  		x1 := s0.Args[0]
 38057  		if x1.Op != OpPPC64MOVBZload {
 38058  			break
 38059  		}
 38060  		i1 := x1.AuxInt
 38061  		if x1.Aux != s {
 38062  			break
 38063  		}
 38064  		_ = x1.Args[1]
 38065  		if p != x1.Args[0] {
 38066  			break
 38067  		}
 38068  		if mem != x1.Args[1] {
 38069  			break
 38070  		}
 38071  		x0 := o0.Args[1]
 38072  		if x0.Op != OpPPC64MOVBZload {
 38073  			break
 38074  		}
 38075  		i0 := x0.AuxInt
 38076  		if x0.Aux != s {
 38077  			break
 38078  		}
 38079  		_ = x0.Args[1]
 38080  		if p != x0.Args[0] {
 38081  			break
 38082  		}
 38083  		if mem != x0.Args[1] {
 38084  			break
 38085  		}
 38086  		s1 := o1.Args[1]
 38087  		if s1.Op != OpPPC64SLDconst {
 38088  			break
 38089  		}
 38090  		if s1.AuxInt != 16 {
 38091  			break
 38092  		}
 38093  		x2 := s1.Args[0]
 38094  		if x2.Op != OpPPC64MOVBZload {
 38095  			break
 38096  		}
 38097  		i2 := x2.AuxInt
 38098  		if x2.Aux != s {
 38099  			break
 38100  		}
 38101  		_ = x2.Args[1]
 38102  		if p != x2.Args[0] {
 38103  			break
 38104  		}
 38105  		if mem != x2.Args[1] {
 38106  			break
 38107  		}
 38108  		s3 := o3.Args[1]
 38109  		if s3.Op != OpPPC64SLDconst {
 38110  			break
 38111  		}
 38112  		if s3.AuxInt != 32 {
 38113  			break
 38114  		}
 38115  		x4 := s3.Args[0]
 38116  		if x4.Op != OpPPC64MOVBZload {
 38117  			break
 38118  		}
 38119  		i4 := x4.AuxInt
 38120  		if x4.Aux != s {
 38121  			break
 38122  		}
 38123  		_ = x4.Args[1]
 38124  		if p != x4.Args[0] {
 38125  			break
 38126  		}
 38127  		if mem != x4.Args[1] {
 38128  			break
 38129  		}
 38130  		s4 := o4.Args[1]
 38131  		if s4.Op != OpPPC64SLDconst {
 38132  			break
 38133  		}
 38134  		if s4.AuxInt != 40 {
 38135  			break
 38136  		}
 38137  		x5 := s4.Args[0]
 38138  		if x5.Op != OpPPC64MOVBZload {
 38139  			break
 38140  		}
 38141  		i5 := x5.AuxInt
 38142  		if x5.Aux != s {
 38143  			break
 38144  		}
 38145  		_ = x5.Args[1]
 38146  		if p != x5.Args[0] {
 38147  			break
 38148  		}
 38149  		if mem != x5.Args[1] {
 38150  			break
 38151  		}
 38152  		s5 := o5.Args[1]
 38153  		if s5.Op != OpPPC64SLDconst {
 38154  			break
 38155  		}
 38156  		if s5.AuxInt != 48 {
 38157  			break
 38158  		}
 38159  		x6 := s5.Args[0]
 38160  		if x6.Op != OpPPC64MOVBZload {
 38161  			break
 38162  		}
 38163  		i6 := x6.AuxInt
 38164  		if x6.Aux != s {
 38165  			break
 38166  		}
 38167  		_ = x6.Args[1]
 38168  		if p != x6.Args[0] {
 38169  			break
 38170  		}
 38171  		if mem != x6.Args[1] {
 38172  			break
 38173  		}
 38174  		s6 := v.Args[1]
 38175  		if s6.Op != OpPPC64SLDconst {
 38176  			break
 38177  		}
 38178  		if s6.AuxInt != 56 {
 38179  			break
 38180  		}
 38181  		x7 := s6.Args[0]
 38182  		if x7.Op != OpPPC64MOVBZload {
 38183  			break
 38184  		}
 38185  		i7 := x7.AuxInt
 38186  		if x7.Aux != s {
 38187  			break
 38188  		}
 38189  		_ = x7.Args[1]
 38190  		if p != x7.Args[0] {
 38191  			break
 38192  		}
 38193  		if mem != x7.Args[1] {
 38194  			break
 38195  		}
 38196  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 38197  			break
 38198  		}
 38199  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 38200  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 38201  		v.reset(OpCopy)
 38202  		v.AddArg(v0)
 38203  		v0.AuxInt = i0
 38204  		v0.Aux = s
 38205  		v0.AddArg(p)
 38206  		v0.AddArg(mem)
 38207  		return true
 38208  	}
 38209  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24]) o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]))) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 38210  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 38211  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 38212  	for {
 38213  		t := v.Type
 38214  		_ = v.Args[1]
 38215  		o5 := v.Args[0]
 38216  		if o5.Op != OpPPC64OR {
 38217  			break
 38218  		}
 38219  		if o5.Type != t {
 38220  			break
 38221  		}
 38222  		_ = o5.Args[1]
 38223  		o4 := o5.Args[0]
 38224  		if o4.Op != OpPPC64OR {
 38225  			break
 38226  		}
 38227  		if o4.Type != t {
 38228  			break
 38229  		}
 38230  		_ = o4.Args[1]
 38231  		o3 := o4.Args[0]
 38232  		if o3.Op != OpPPC64OR {
 38233  			break
 38234  		}
 38235  		if o3.Type != t {
 38236  			break
 38237  		}
 38238  		_ = o3.Args[1]
 38239  		o2 := o3.Args[0]
 38240  		if o2.Op != OpPPC64OR {
 38241  			break
 38242  		}
 38243  		if o2.Type != t {
 38244  			break
 38245  		}
 38246  		_ = o2.Args[1]
 38247  		s2 := o2.Args[0]
 38248  		if s2.Op != OpPPC64SLDconst {
 38249  			break
 38250  		}
 38251  		if s2.AuxInt != 24 {
 38252  			break
 38253  		}
 38254  		x3 := s2.Args[0]
 38255  		if x3.Op != OpPPC64MOVBZload {
 38256  			break
 38257  		}
 38258  		i3 := x3.AuxInt
 38259  		s := x3.Aux
 38260  		_ = x3.Args[1]
 38261  		p := x3.Args[0]
 38262  		mem := x3.Args[1]
 38263  		o1 := o2.Args[1]
 38264  		if o1.Op != OpPPC64OR {
 38265  			break
 38266  		}
 38267  		if o1.Type != t {
 38268  			break
 38269  		}
 38270  		_ = o1.Args[1]
 38271  		o0 := o1.Args[0]
 38272  		if o0.Op != OpPPC64OR {
 38273  			break
 38274  		}
 38275  		if o0.Type != t {
 38276  			break
 38277  		}
 38278  		_ = o0.Args[1]
 38279  		x0 := o0.Args[0]
 38280  		if x0.Op != OpPPC64MOVBZload {
 38281  			break
 38282  		}
 38283  		i0 := x0.AuxInt
 38284  		if x0.Aux != s {
 38285  			break
 38286  		}
 38287  		_ = x0.Args[1]
 38288  		if p != x0.Args[0] {
 38289  			break
 38290  		}
 38291  		if mem != x0.Args[1] {
 38292  			break
 38293  		}
 38294  		s0 := o0.Args[1]
 38295  		if s0.Op != OpPPC64SLDconst {
 38296  			break
 38297  		}
 38298  		if s0.AuxInt != 8 {
 38299  			break
 38300  		}
 38301  		x1 := s0.Args[0]
 38302  		if x1.Op != OpPPC64MOVBZload {
 38303  			break
 38304  		}
 38305  		i1 := x1.AuxInt
 38306  		if x1.Aux != s {
 38307  			break
 38308  		}
 38309  		_ = x1.Args[1]
 38310  		if p != x1.Args[0] {
 38311  			break
 38312  		}
 38313  		if mem != x1.Args[1] {
 38314  			break
 38315  		}
 38316  		s1 := o1.Args[1]
 38317  		if s1.Op != OpPPC64SLDconst {
 38318  			break
 38319  		}
 38320  		if s1.AuxInt != 16 {
 38321  			break
 38322  		}
 38323  		x2 := s1.Args[0]
 38324  		if x2.Op != OpPPC64MOVBZload {
 38325  			break
 38326  		}
 38327  		i2 := x2.AuxInt
 38328  		if x2.Aux != s {
 38329  			break
 38330  		}
 38331  		_ = x2.Args[1]
 38332  		if p != x2.Args[0] {
 38333  			break
 38334  		}
 38335  		if mem != x2.Args[1] {
 38336  			break
 38337  		}
 38338  		s3 := o3.Args[1]
 38339  		if s3.Op != OpPPC64SLDconst {
 38340  			break
 38341  		}
 38342  		if s3.AuxInt != 32 {
 38343  			break
 38344  		}
 38345  		x4 := s3.Args[0]
 38346  		if x4.Op != OpPPC64MOVBZload {
 38347  			break
 38348  		}
 38349  		i4 := x4.AuxInt
 38350  		if x4.Aux != s {
 38351  			break
 38352  		}
 38353  		_ = x4.Args[1]
 38354  		if p != x4.Args[0] {
 38355  			break
 38356  		}
 38357  		if mem != x4.Args[1] {
 38358  			break
 38359  		}
 38360  		s4 := o4.Args[1]
 38361  		if s4.Op != OpPPC64SLDconst {
 38362  			break
 38363  		}
 38364  		if s4.AuxInt != 40 {
 38365  			break
 38366  		}
 38367  		x5 := s4.Args[0]
 38368  		if x5.Op != OpPPC64MOVBZload {
 38369  			break
 38370  		}
 38371  		i5 := x5.AuxInt
 38372  		if x5.Aux != s {
 38373  			break
 38374  		}
 38375  		_ = x5.Args[1]
 38376  		if p != x5.Args[0] {
 38377  			break
 38378  		}
 38379  		if mem != x5.Args[1] {
 38380  			break
 38381  		}
 38382  		s5 := o5.Args[1]
 38383  		if s5.Op != OpPPC64SLDconst {
 38384  			break
 38385  		}
 38386  		if s5.AuxInt != 48 {
 38387  			break
 38388  		}
 38389  		x6 := s5.Args[0]
 38390  		if x6.Op != OpPPC64MOVBZload {
 38391  			break
 38392  		}
 38393  		i6 := x6.AuxInt
 38394  		if x6.Aux != s {
 38395  			break
 38396  		}
 38397  		_ = x6.Args[1]
 38398  		if p != x6.Args[0] {
 38399  			break
 38400  		}
 38401  		if mem != x6.Args[1] {
 38402  			break
 38403  		}
 38404  		s6 := v.Args[1]
 38405  		if s6.Op != OpPPC64SLDconst {
 38406  			break
 38407  		}
 38408  		if s6.AuxInt != 56 {
 38409  			break
 38410  		}
 38411  		x7 := s6.Args[0]
 38412  		if x7.Op != OpPPC64MOVBZload {
 38413  			break
 38414  		}
 38415  		i7 := x7.AuxInt
 38416  		if x7.Aux != s {
 38417  			break
 38418  		}
 38419  		_ = x7.Args[1]
 38420  		if p != x7.Args[0] {
 38421  			break
 38422  		}
 38423  		if mem != x7.Args[1] {
 38424  			break
 38425  		}
 38426  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 38427  			break
 38428  		}
 38429  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 38430  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 38431  		v.reset(OpCopy)
 38432  		v.AddArg(v0)
 38433  		v0.AuxInt = i0
 38434  		v0.Aux = s
 38435  		v0.AddArg(p)
 38436  		v0.AddArg(mem)
 38437  		return true
 38438  	}
 38439  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 38440  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 38441  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 38442  	for {
 38443  		t := v.Type
 38444  		_ = v.Args[1]
 38445  		o5 := v.Args[0]
 38446  		if o5.Op != OpPPC64OR {
 38447  			break
 38448  		}
 38449  		if o5.Type != t {
 38450  			break
 38451  		}
 38452  		_ = o5.Args[1]
 38453  		o4 := o5.Args[0]
 38454  		if o4.Op != OpPPC64OR {
 38455  			break
 38456  		}
 38457  		if o4.Type != t {
 38458  			break
 38459  		}
 38460  		_ = o4.Args[1]
 38461  		o3 := o4.Args[0]
 38462  		if o3.Op != OpPPC64OR {
 38463  			break
 38464  		}
 38465  		if o3.Type != t {
 38466  			break
 38467  		}
 38468  		_ = o3.Args[1]
 38469  		o2 := o3.Args[0]
 38470  		if o2.Op != OpPPC64OR {
 38471  			break
 38472  		}
 38473  		if o2.Type != t {
 38474  			break
 38475  		}
 38476  		_ = o2.Args[1]
 38477  		o1 := o2.Args[0]
 38478  		if o1.Op != OpPPC64OR {
 38479  			break
 38480  		}
 38481  		if o1.Type != t {
 38482  			break
 38483  		}
 38484  		_ = o1.Args[1]
 38485  		s1 := o1.Args[0]
 38486  		if s1.Op != OpPPC64SLDconst {
 38487  			break
 38488  		}
 38489  		if s1.AuxInt != 16 {
 38490  			break
 38491  		}
 38492  		x2 := s1.Args[0]
 38493  		if x2.Op != OpPPC64MOVBZload {
 38494  			break
 38495  		}
 38496  		i2 := x2.AuxInt
 38497  		s := x2.Aux
 38498  		_ = x2.Args[1]
 38499  		p := x2.Args[0]
 38500  		mem := x2.Args[1]
 38501  		o0 := o1.Args[1]
 38502  		if o0.Op != OpPPC64OR {
 38503  			break
 38504  		}
 38505  		if o0.Type != t {
 38506  			break
 38507  		}
 38508  		_ = o0.Args[1]
 38509  		s0 := o0.Args[0]
 38510  		if s0.Op != OpPPC64SLDconst {
 38511  			break
 38512  		}
 38513  		if s0.AuxInt != 8 {
 38514  			break
 38515  		}
 38516  		x1 := s0.Args[0]
 38517  		if x1.Op != OpPPC64MOVBZload {
 38518  			break
 38519  		}
 38520  		i1 := x1.AuxInt
 38521  		if x1.Aux != s {
 38522  			break
 38523  		}
 38524  		_ = x1.Args[1]
 38525  		if p != x1.Args[0] {
 38526  			break
 38527  		}
 38528  		if mem != x1.Args[1] {
 38529  			break
 38530  		}
 38531  		x0 := o0.Args[1]
 38532  		if x0.Op != OpPPC64MOVBZload {
 38533  			break
 38534  		}
 38535  		i0 := x0.AuxInt
 38536  		if x0.Aux != s {
 38537  			break
 38538  		}
 38539  		_ = x0.Args[1]
 38540  		if p != x0.Args[0] {
 38541  			break
 38542  		}
 38543  		if mem != x0.Args[1] {
 38544  			break
 38545  		}
 38546  		s2 := o2.Args[1]
 38547  		if s2.Op != OpPPC64SLDconst {
 38548  			break
 38549  		}
 38550  		if s2.AuxInt != 24 {
 38551  			break
 38552  		}
 38553  		x3 := s2.Args[0]
 38554  		if x3.Op != OpPPC64MOVBZload {
 38555  			break
 38556  		}
 38557  		i3 := x3.AuxInt
 38558  		if x3.Aux != s {
 38559  			break
 38560  		}
 38561  		_ = x3.Args[1]
 38562  		if p != x3.Args[0] {
 38563  			break
 38564  		}
 38565  		if mem != x3.Args[1] {
 38566  			break
 38567  		}
 38568  		s3 := o3.Args[1]
 38569  		if s3.Op != OpPPC64SLDconst {
 38570  			break
 38571  		}
 38572  		if s3.AuxInt != 32 {
 38573  			break
 38574  		}
 38575  		x4 := s3.Args[0]
 38576  		if x4.Op != OpPPC64MOVBZload {
 38577  			break
 38578  		}
 38579  		i4 := x4.AuxInt
 38580  		if x4.Aux != s {
 38581  			break
 38582  		}
 38583  		_ = x4.Args[1]
 38584  		if p != x4.Args[0] {
 38585  			break
 38586  		}
 38587  		if mem != x4.Args[1] {
 38588  			break
 38589  		}
 38590  		s4 := o4.Args[1]
 38591  		if s4.Op != OpPPC64SLDconst {
 38592  			break
 38593  		}
 38594  		if s4.AuxInt != 40 {
 38595  			break
 38596  		}
 38597  		x5 := s4.Args[0]
 38598  		if x5.Op != OpPPC64MOVBZload {
 38599  			break
 38600  		}
 38601  		i5 := x5.AuxInt
 38602  		if x5.Aux != s {
 38603  			break
 38604  		}
 38605  		_ = x5.Args[1]
 38606  		if p != x5.Args[0] {
 38607  			break
 38608  		}
 38609  		if mem != x5.Args[1] {
 38610  			break
 38611  		}
 38612  		s5 := o5.Args[1]
 38613  		if s5.Op != OpPPC64SLDconst {
 38614  			break
 38615  		}
 38616  		if s5.AuxInt != 48 {
 38617  			break
 38618  		}
 38619  		x6 := s5.Args[0]
 38620  		if x6.Op != OpPPC64MOVBZload {
 38621  			break
 38622  		}
 38623  		i6 := x6.AuxInt
 38624  		if x6.Aux != s {
 38625  			break
 38626  		}
 38627  		_ = x6.Args[1]
 38628  		if p != x6.Args[0] {
 38629  			break
 38630  		}
 38631  		if mem != x6.Args[1] {
 38632  			break
 38633  		}
 38634  		s6 := v.Args[1]
 38635  		if s6.Op != OpPPC64SLDconst {
 38636  			break
 38637  		}
 38638  		if s6.AuxInt != 56 {
 38639  			break
 38640  		}
 38641  		x7 := s6.Args[0]
 38642  		if x7.Op != OpPPC64MOVBZload {
 38643  			break
 38644  		}
 38645  		i7 := x7.AuxInt
 38646  		if x7.Aux != s {
 38647  			break
 38648  		}
 38649  		_ = x7.Args[1]
 38650  		if p != x7.Args[0] {
 38651  			break
 38652  		}
 38653  		if mem != x7.Args[1] {
 38654  			break
 38655  		}
 38656  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 38657  			break
 38658  		}
 38659  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 38660  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 38661  		v.reset(OpCopy)
 38662  		v.AddArg(v0)
 38663  		v0.AuxInt = i0
 38664  		v0.Aux = s
 38665  		v0.AddArg(p)
 38666  		v0.AddArg(mem)
 38667  		return true
 38668  	}
 38669  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16]) o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 38670  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 38671  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 38672  	for {
 38673  		t := v.Type
 38674  		_ = v.Args[1]
 38675  		o5 := v.Args[0]
 38676  		if o5.Op != OpPPC64OR {
 38677  			break
 38678  		}
 38679  		if o5.Type != t {
 38680  			break
 38681  		}
 38682  		_ = o5.Args[1]
 38683  		o4 := o5.Args[0]
 38684  		if o4.Op != OpPPC64OR {
 38685  			break
 38686  		}
 38687  		if o4.Type != t {
 38688  			break
 38689  		}
 38690  		_ = o4.Args[1]
 38691  		o3 := o4.Args[0]
 38692  		if o3.Op != OpPPC64OR {
 38693  			break
 38694  		}
 38695  		if o3.Type != t {
 38696  			break
 38697  		}
 38698  		_ = o3.Args[1]
 38699  		o2 := o3.Args[0]
 38700  		if o2.Op != OpPPC64OR {
 38701  			break
 38702  		}
 38703  		if o2.Type != t {
 38704  			break
 38705  		}
 38706  		_ = o2.Args[1]
 38707  		o1 := o2.Args[0]
 38708  		if o1.Op != OpPPC64OR {
 38709  			break
 38710  		}
 38711  		if o1.Type != t {
 38712  			break
 38713  		}
 38714  		_ = o1.Args[1]
 38715  		s1 := o1.Args[0]
 38716  		if s1.Op != OpPPC64SLDconst {
 38717  			break
 38718  		}
 38719  		if s1.AuxInt != 16 {
 38720  			break
 38721  		}
 38722  		x2 := s1.Args[0]
 38723  		if x2.Op != OpPPC64MOVBZload {
 38724  			break
 38725  		}
 38726  		i2 := x2.AuxInt
 38727  		s := x2.Aux
 38728  		_ = x2.Args[1]
 38729  		p := x2.Args[0]
 38730  		mem := x2.Args[1]
 38731  		o0 := o1.Args[1]
 38732  		if o0.Op != OpPPC64OR {
 38733  			break
 38734  		}
 38735  		if o0.Type != t {
 38736  			break
 38737  		}
 38738  		_ = o0.Args[1]
 38739  		x0 := o0.Args[0]
 38740  		if x0.Op != OpPPC64MOVBZload {
 38741  			break
 38742  		}
 38743  		i0 := x0.AuxInt
 38744  		if x0.Aux != s {
 38745  			break
 38746  		}
 38747  		_ = x0.Args[1]
 38748  		if p != x0.Args[0] {
 38749  			break
 38750  		}
 38751  		if mem != x0.Args[1] {
 38752  			break
 38753  		}
 38754  		s0 := o0.Args[1]
 38755  		if s0.Op != OpPPC64SLDconst {
 38756  			break
 38757  		}
 38758  		if s0.AuxInt != 8 {
 38759  			break
 38760  		}
 38761  		x1 := s0.Args[0]
 38762  		if x1.Op != OpPPC64MOVBZload {
 38763  			break
 38764  		}
 38765  		i1 := x1.AuxInt
 38766  		if x1.Aux != s {
 38767  			break
 38768  		}
 38769  		_ = x1.Args[1]
 38770  		if p != x1.Args[0] {
 38771  			break
 38772  		}
 38773  		if mem != x1.Args[1] {
 38774  			break
 38775  		}
 38776  		s2 := o2.Args[1]
 38777  		if s2.Op != OpPPC64SLDconst {
 38778  			break
 38779  		}
 38780  		if s2.AuxInt != 24 {
 38781  			break
 38782  		}
 38783  		x3 := s2.Args[0]
 38784  		if x3.Op != OpPPC64MOVBZload {
 38785  			break
 38786  		}
 38787  		i3 := x3.AuxInt
 38788  		if x3.Aux != s {
 38789  			break
 38790  		}
 38791  		_ = x3.Args[1]
 38792  		if p != x3.Args[0] {
 38793  			break
 38794  		}
 38795  		if mem != x3.Args[1] {
 38796  			break
 38797  		}
 38798  		s3 := o3.Args[1]
 38799  		if s3.Op != OpPPC64SLDconst {
 38800  			break
 38801  		}
 38802  		if s3.AuxInt != 32 {
 38803  			break
 38804  		}
 38805  		x4 := s3.Args[0]
 38806  		if x4.Op != OpPPC64MOVBZload {
 38807  			break
 38808  		}
 38809  		i4 := x4.AuxInt
 38810  		if x4.Aux != s {
 38811  			break
 38812  		}
 38813  		_ = x4.Args[1]
 38814  		if p != x4.Args[0] {
 38815  			break
 38816  		}
 38817  		if mem != x4.Args[1] {
 38818  			break
 38819  		}
 38820  		s4 := o4.Args[1]
 38821  		if s4.Op != OpPPC64SLDconst {
 38822  			break
 38823  		}
 38824  		if s4.AuxInt != 40 {
 38825  			break
 38826  		}
 38827  		x5 := s4.Args[0]
 38828  		if x5.Op != OpPPC64MOVBZload {
 38829  			break
 38830  		}
 38831  		i5 := x5.AuxInt
 38832  		if x5.Aux != s {
 38833  			break
 38834  		}
 38835  		_ = x5.Args[1]
 38836  		if p != x5.Args[0] {
 38837  			break
 38838  		}
 38839  		if mem != x5.Args[1] {
 38840  			break
 38841  		}
 38842  		s5 := o5.Args[1]
 38843  		if s5.Op != OpPPC64SLDconst {
 38844  			break
 38845  		}
 38846  		if s5.AuxInt != 48 {
 38847  			break
 38848  		}
 38849  		x6 := s5.Args[0]
 38850  		if x6.Op != OpPPC64MOVBZload {
 38851  			break
 38852  		}
 38853  		i6 := x6.AuxInt
 38854  		if x6.Aux != s {
 38855  			break
 38856  		}
 38857  		_ = x6.Args[1]
 38858  		if p != x6.Args[0] {
 38859  			break
 38860  		}
 38861  		if mem != x6.Args[1] {
 38862  			break
 38863  		}
 38864  		s6 := v.Args[1]
 38865  		if s6.Op != OpPPC64SLDconst {
 38866  			break
 38867  		}
 38868  		if s6.AuxInt != 56 {
 38869  			break
 38870  		}
 38871  		x7 := s6.Args[0]
 38872  		if x7.Op != OpPPC64MOVBZload {
 38873  			break
 38874  		}
 38875  		i7 := x7.AuxInt
 38876  		if x7.Aux != s {
 38877  			break
 38878  		}
 38879  		_ = x7.Args[1]
 38880  		if p != x7.Args[0] {
 38881  			break
 38882  		}
 38883  		if mem != x7.Args[1] {
 38884  			break
 38885  		}
 38886  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 38887  			break
 38888  		}
 38889  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 38890  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 38891  		v.reset(OpCopy)
 38892  		v.AddArg(v0)
 38893  		v0.AuxInt = i0
 38894  		v0.Aux = s
 38895  		v0.AddArg(p)
 38896  		v0.AddArg(mem)
 38897  		return true
 38898  	}
 38899  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 38900  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 38901  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 38902  	for {
 38903  		t := v.Type
 38904  		_ = v.Args[1]
 38905  		o5 := v.Args[0]
 38906  		if o5.Op != OpPPC64OR {
 38907  			break
 38908  		}
 38909  		if o5.Type != t {
 38910  			break
 38911  		}
 38912  		_ = o5.Args[1]
 38913  		o4 := o5.Args[0]
 38914  		if o4.Op != OpPPC64OR {
 38915  			break
 38916  		}
 38917  		if o4.Type != t {
 38918  			break
 38919  		}
 38920  		_ = o4.Args[1]
 38921  		o3 := o4.Args[0]
 38922  		if o3.Op != OpPPC64OR {
 38923  			break
 38924  		}
 38925  		if o3.Type != t {
 38926  			break
 38927  		}
 38928  		_ = o3.Args[1]
 38929  		o2 := o3.Args[0]
 38930  		if o2.Op != OpPPC64OR {
 38931  			break
 38932  		}
 38933  		if o2.Type != t {
 38934  			break
 38935  		}
 38936  		_ = o2.Args[1]
 38937  		o1 := o2.Args[0]
 38938  		if o1.Op != OpPPC64OR {
 38939  			break
 38940  		}
 38941  		if o1.Type != t {
 38942  			break
 38943  		}
 38944  		_ = o1.Args[1]
 38945  		o0 := o1.Args[0]
 38946  		if o0.Op != OpPPC64OR {
 38947  			break
 38948  		}
 38949  		if o0.Type != t {
 38950  			break
 38951  		}
 38952  		_ = o0.Args[1]
 38953  		s0 := o0.Args[0]
 38954  		if s0.Op != OpPPC64SLDconst {
 38955  			break
 38956  		}
 38957  		if s0.AuxInt != 8 {
 38958  			break
 38959  		}
 38960  		x1 := s0.Args[0]
 38961  		if x1.Op != OpPPC64MOVBZload {
 38962  			break
 38963  		}
 38964  		i1 := x1.AuxInt
 38965  		s := x1.Aux
 38966  		_ = x1.Args[1]
 38967  		p := x1.Args[0]
 38968  		mem := x1.Args[1]
 38969  		x0 := o0.Args[1]
 38970  		if x0.Op != OpPPC64MOVBZload {
 38971  			break
 38972  		}
 38973  		i0 := x0.AuxInt
 38974  		if x0.Aux != s {
 38975  			break
 38976  		}
 38977  		_ = x0.Args[1]
 38978  		if p != x0.Args[0] {
 38979  			break
 38980  		}
 38981  		if mem != x0.Args[1] {
 38982  			break
 38983  		}
 38984  		s1 := o1.Args[1]
 38985  		if s1.Op != OpPPC64SLDconst {
 38986  			break
 38987  		}
 38988  		if s1.AuxInt != 16 {
 38989  			break
 38990  		}
 38991  		x2 := s1.Args[0]
 38992  		if x2.Op != OpPPC64MOVBZload {
 38993  			break
 38994  		}
 38995  		i2 := x2.AuxInt
 38996  		if x2.Aux != s {
 38997  			break
 38998  		}
 38999  		_ = x2.Args[1]
 39000  		if p != x2.Args[0] {
 39001  			break
 39002  		}
 39003  		if mem != x2.Args[1] {
 39004  			break
 39005  		}
 39006  		s2 := o2.Args[1]
 39007  		if s2.Op != OpPPC64SLDconst {
 39008  			break
 39009  		}
 39010  		if s2.AuxInt != 24 {
 39011  			break
 39012  		}
 39013  		x3 := s2.Args[0]
 39014  		if x3.Op != OpPPC64MOVBZload {
 39015  			break
 39016  		}
 39017  		i3 := x3.AuxInt
 39018  		if x3.Aux != s {
 39019  			break
 39020  		}
 39021  		_ = x3.Args[1]
 39022  		if p != x3.Args[0] {
 39023  			break
 39024  		}
 39025  		if mem != x3.Args[1] {
 39026  			break
 39027  		}
 39028  		s3 := o3.Args[1]
 39029  		if s3.Op != OpPPC64SLDconst {
 39030  			break
 39031  		}
 39032  		if s3.AuxInt != 32 {
 39033  			break
 39034  		}
 39035  		x4 := s3.Args[0]
 39036  		if x4.Op != OpPPC64MOVBZload {
 39037  			break
 39038  		}
 39039  		i4 := x4.AuxInt
 39040  		if x4.Aux != s {
 39041  			break
 39042  		}
 39043  		_ = x4.Args[1]
 39044  		if p != x4.Args[0] {
 39045  			break
 39046  		}
 39047  		if mem != x4.Args[1] {
 39048  			break
 39049  		}
 39050  		s4 := o4.Args[1]
 39051  		if s4.Op != OpPPC64SLDconst {
 39052  			break
 39053  		}
 39054  		if s4.AuxInt != 40 {
 39055  			break
 39056  		}
 39057  		x5 := s4.Args[0]
 39058  		if x5.Op != OpPPC64MOVBZload {
 39059  			break
 39060  		}
 39061  		i5 := x5.AuxInt
 39062  		if x5.Aux != s {
 39063  			break
 39064  		}
 39065  		_ = x5.Args[1]
 39066  		if p != x5.Args[0] {
 39067  			break
 39068  		}
 39069  		if mem != x5.Args[1] {
 39070  			break
 39071  		}
 39072  		s5 := o5.Args[1]
 39073  		if s5.Op != OpPPC64SLDconst {
 39074  			break
 39075  		}
 39076  		if s5.AuxInt != 48 {
 39077  			break
 39078  		}
 39079  		x6 := s5.Args[0]
 39080  		if x6.Op != OpPPC64MOVBZload {
 39081  			break
 39082  		}
 39083  		i6 := x6.AuxInt
 39084  		if x6.Aux != s {
 39085  			break
 39086  		}
 39087  		_ = x6.Args[1]
 39088  		if p != x6.Args[0] {
 39089  			break
 39090  		}
 39091  		if mem != x6.Args[1] {
 39092  			break
 39093  		}
 39094  		s6 := v.Args[1]
 39095  		if s6.Op != OpPPC64SLDconst {
 39096  			break
 39097  		}
 39098  		if s6.AuxInt != 56 {
 39099  			break
 39100  		}
 39101  		x7 := s6.Args[0]
 39102  		if x7.Op != OpPPC64MOVBZload {
 39103  			break
 39104  		}
 39105  		i7 := x7.AuxInt
 39106  		if x7.Aux != s {
 39107  			break
 39108  		}
 39109  		_ = x7.Args[1]
 39110  		if p != x7.Args[0] {
 39111  			break
 39112  		}
 39113  		if mem != x7.Args[1] {
 39114  			break
 39115  		}
 39116  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 39117  			break
 39118  		}
 39119  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 39120  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 39121  		v.reset(OpCopy)
 39122  		v.AddArg(v0)
 39123  		v0.AuxInt = i0
 39124  		v0.Aux = s
 39125  		v0.AddArg(p)
 39126  		v0.AddArg(mem)
 39127  		return true
 39128  	}
 39129  	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> o2:(OR <t> o1:(OR <t> o0:(OR <t> x0:(MOVBZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8])) s1:(SLDconst x2:(MOVBZload [i2] {s} p mem) [16])) s2:(SLDconst x3:(MOVBZload [i3] {s} p mem) [24])) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
 39130  	// cond: !config.BigEndian 	&& i0%4 == 0 	&& i1 == i0+1 	&& i2 == i0+2 	&& i3 == i0+3 	&& i4 == i0+4 	&& i5 == i0+5 	&& i6 == i0+6 	&& i7 == i0+7 	&& x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 	&& o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 	&& s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 	&& mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil 	&& clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 	&& clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) 	&& clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)
 39131  	// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
 39132  	for {
 39133  		t := v.Type
 39134  		_ = v.Args[1]
 39135  		o5 := v.Args[0]
 39136  		if o5.Op != OpPPC64OR {
 39137  			break
 39138  		}
 39139  		if o5.Type != t {
 39140  			break
 39141  		}
 39142  		_ = o5.Args[1]
 39143  		o4 := o5.Args[0]
 39144  		if o4.Op != OpPPC64OR {
 39145  			break
 39146  		}
 39147  		if o4.Type != t {
 39148  			break
 39149  		}
 39150  		_ = o4.Args[1]
 39151  		o3 := o4.Args[0]
 39152  		if o3.Op != OpPPC64OR {
 39153  			break
 39154  		}
 39155  		if o3.Type != t {
 39156  			break
 39157  		}
 39158  		_ = o3.Args[1]
 39159  		o2 := o3.Args[0]
 39160  		if o2.Op != OpPPC64OR {
 39161  			break
 39162  		}
 39163  		if o2.Type != t {
 39164  			break
 39165  		}
 39166  		_ = o2.Args[1]
 39167  		o1 := o2.Args[0]
 39168  		if o1.Op != OpPPC64OR {
 39169  			break
 39170  		}
 39171  		if o1.Type != t {
 39172  			break
 39173  		}
 39174  		_ = o1.Args[1]
 39175  		o0 := o1.Args[0]
 39176  		if o0.Op != OpPPC64OR {
 39177  			break
 39178  		}
 39179  		if o0.Type != t {
 39180  			break
 39181  		}
 39182  		_ = o0.Args[1]
 39183  		x0 := o0.Args[0]
 39184  		if x0.Op != OpPPC64MOVBZload {
 39185  			break
 39186  		}
 39187  		i0 := x0.AuxInt
 39188  		s := x0.Aux
 39189  		_ = x0.Args[1]
 39190  		p := x0.Args[0]
 39191  		mem := x0.Args[1]
 39192  		s0 := o0.Args[1]
 39193  		if s0.Op != OpPPC64SLDconst {
 39194  			break
 39195  		}
 39196  		if s0.AuxInt != 8 {
 39197  			break
 39198  		}
 39199  		x1 := s0.Args[0]
 39200  		if x1.Op != OpPPC64MOVBZload {
 39201  			break
 39202  		}
 39203  		i1 := x1.AuxInt
 39204  		if x1.Aux != s {
 39205  			break
 39206  		}
 39207  		_ = x1.Args[1]
 39208  		if p != x1.Args[0] {
 39209  			break
 39210  		}
 39211  		if mem != x1.Args[1] {
 39212  			break
 39213  		}
 39214  		s1 := o1.Args[1]
 39215  		if s1.Op != OpPPC64SLDconst {
 39216  			break
 39217  		}
 39218  		if s1.AuxInt != 16 {
 39219  			break
 39220  		}
 39221  		x2 := s1.Args[0]
 39222  		if x2.Op != OpPPC64MOVBZload {
 39223  			break
 39224  		}
 39225  		i2 := x2.AuxInt
 39226  		if x2.Aux != s {
 39227  			break
 39228  		}
 39229  		_ = x2.Args[1]
 39230  		if p != x2.Args[0] {
 39231  			break
 39232  		}
 39233  		if mem != x2.Args[1] {
 39234  			break
 39235  		}
 39236  		s2 := o2.Args[1]
 39237  		if s2.Op != OpPPC64SLDconst {
 39238  			break
 39239  		}
 39240  		if s2.AuxInt != 24 {
 39241  			break
 39242  		}
 39243  		x3 := s2.Args[0]
 39244  		if x3.Op != OpPPC64MOVBZload {
 39245  			break
 39246  		}
 39247  		i3 := x3.AuxInt
 39248  		if x3.Aux != s {
 39249  			break
 39250  		}
 39251  		_ = x3.Args[1]
 39252  		if p != x3.Args[0] {
 39253  			break
 39254  		}
 39255  		if mem != x3.Args[1] {
 39256  			break
 39257  		}
 39258  		s3 := o3.Args[1]
 39259  		if s3.Op != OpPPC64SLDconst {
 39260  			break
 39261  		}
 39262  		if s3.AuxInt != 32 {
 39263  			break
 39264  		}
 39265  		x4 := s3.Args[0]
 39266  		if x4.Op != OpPPC64MOVBZload {
 39267  			break
 39268  		}
 39269  		i4 := x4.AuxInt
 39270  		if x4.Aux != s {
 39271  			break
 39272  		}
 39273  		_ = x4.Args[1]
 39274  		if p != x4.Args[0] {
 39275  			break
 39276  		}
 39277  		if mem != x4.Args[1] {
 39278  			break
 39279  		}
 39280  		s4 := o4.Args[1]
 39281  		if s4.Op != OpPPC64SLDconst {
 39282  			break
 39283  		}
 39284  		if s4.AuxInt != 40 {
 39285  			break
 39286  		}
 39287  		x5 := s4.Args[0]
 39288  		if x5.Op != OpPPC64MOVBZload {
 39289  			break
 39290  		}
 39291  		i5 := x5.AuxInt
 39292  		if x5.Aux != s {
 39293  			break
 39294  		}
 39295  		_ = x5.Args[1]
 39296  		if p != x5.Args[0] {
 39297  			break
 39298  		}
 39299  		if mem != x5.Args[1] {
 39300  			break
 39301  		}
 39302  		s5 := o5.Args[1]
 39303  		if s5.Op != OpPPC64SLDconst {
 39304  			break
 39305  		}
 39306  		if s5.AuxInt != 48 {
 39307  			break
 39308  		}
 39309  		x6 := s5.Args[0]
 39310  		if x6.Op != OpPPC64MOVBZload {
 39311  			break
 39312  		}
 39313  		i6 := x6.AuxInt
 39314  		if x6.Aux != s {
 39315  			break
 39316  		}
 39317  		_ = x6.Args[1]
 39318  		if p != x6.Args[0] {
 39319  			break
 39320  		}
 39321  		if mem != x6.Args[1] {
 39322  			break
 39323  		}
 39324  		s6 := v.Args[1]
 39325  		if s6.Op != OpPPC64SLDconst {
 39326  			break
 39327  		}
 39328  		if s6.AuxInt != 56 {
 39329  			break
 39330  		}
 39331  		x7 := s6.Args[0]
 39332  		if x7.Op != OpPPC64MOVBZload {
 39333  			break
 39334  		}
 39335  		i7 := x7.AuxInt
 39336  		if x7.Aux != s {
 39337  			break
 39338  		}
 39339  		_ = x7.Args[1]
 39340  		if p != x7.Args[0] {
 39341  			break
 39342  		}
 39343  		if mem != x7.Args[1] {
 39344  			break
 39345  		}
 39346  		if !(!config.BigEndian && i0%4 == 0 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) {
 39347  			break
 39348  		}
 39349  		b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
 39350  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, t)
 39351  		v.reset(OpCopy)
 39352  		v.AddArg(v0)
 39353  		v0.AuxInt = i0
 39354  		v0.Aux = s
 39355  		v0.AddArg(p)
 39356  		v0.AddArg(mem)
 39357  		return true
 39358  	}
 39359  	return false
 39360  }
 39361  func rewriteValuePPC64_OpPPC64ORN_0(v *Value) bool {
 39362  	// match: (ORN x (MOVDconst [-1]))
 39363  	// cond:
 39364  	// result: x
 39365  	for {
 39366  		_ = v.Args[1]
 39367  		x := v.Args[0]
 39368  		v_1 := v.Args[1]
 39369  		if v_1.Op != OpPPC64MOVDconst {
 39370  			break
 39371  		}
 39372  		if v_1.AuxInt != -1 {
 39373  			break
 39374  		}
 39375  		v.reset(OpCopy)
 39376  		v.Type = x.Type
 39377  		v.AddArg(x)
 39378  		return true
 39379  	}
 39380  	return false
 39381  }
 39382  func rewriteValuePPC64_OpPPC64ORconst_0(v *Value) bool {
 39383  	// match: (ORconst [c] (ORconst [d] x))
 39384  	// cond:
 39385  	// result: (ORconst [c|d] x)
 39386  	for {
 39387  		c := v.AuxInt
 39388  		v_0 := v.Args[0]
 39389  		if v_0.Op != OpPPC64ORconst {
 39390  			break
 39391  		}
 39392  		d := v_0.AuxInt
 39393  		x := v_0.Args[0]
 39394  		v.reset(OpPPC64ORconst)
 39395  		v.AuxInt = c | d
 39396  		v.AddArg(x)
 39397  		return true
 39398  	}
 39399  	// match: (ORconst [-1] _)
 39400  	// cond:
 39401  	// result: (MOVDconst [-1])
 39402  	for {
 39403  		if v.AuxInt != -1 {
 39404  			break
 39405  		}
 39406  		v.reset(OpPPC64MOVDconst)
 39407  		v.AuxInt = -1
 39408  		return true
 39409  	}
 39410  	// match: (ORconst [0] x)
 39411  	// cond:
 39412  	// result: x
 39413  	for {
 39414  		if v.AuxInt != 0 {
 39415  			break
 39416  		}
 39417  		x := v.Args[0]
 39418  		v.reset(OpCopy)
 39419  		v.Type = x.Type
 39420  		v.AddArg(x)
 39421  		return true
 39422  	}
 39423  	return false
 39424  }
 39425  func rewriteValuePPC64_OpPPC64SUB_0(v *Value) bool {
 39426  	// match: (SUB x (MOVDconst [c]))
 39427  	// cond: is32Bit(-c)
 39428  	// result: (ADDconst [-c] x)
 39429  	for {
 39430  		_ = v.Args[1]
 39431  		x := v.Args[0]
 39432  		v_1 := v.Args[1]
 39433  		if v_1.Op != OpPPC64MOVDconst {
 39434  			break
 39435  		}
 39436  		c := v_1.AuxInt
 39437  		if !(is32Bit(-c)) {
 39438  			break
 39439  		}
 39440  		v.reset(OpPPC64ADDconst)
 39441  		v.AuxInt = -c
 39442  		v.AddArg(x)
 39443  		return true
 39444  	}
 39445  	return false
 39446  }
 39447  func rewriteValuePPC64_OpPPC64XOR_0(v *Value) bool {
 39448  	b := v.Block
 39449  	_ = b
 39450  	typ := &b.Func.Config.Types
 39451  	_ = typ
 39452  	// match: (XOR (SLDconst x [c]) (SRDconst x [d]))
 39453  	// cond: d == 64-c
 39454  	// result: (ROTLconst [c] x)
 39455  	for {
 39456  		_ = v.Args[1]
 39457  		v_0 := v.Args[0]
 39458  		if v_0.Op != OpPPC64SLDconst {
 39459  			break
 39460  		}
 39461  		c := v_0.AuxInt
 39462  		x := v_0.Args[0]
 39463  		v_1 := v.Args[1]
 39464  		if v_1.Op != OpPPC64SRDconst {
 39465  			break
 39466  		}
 39467  		d := v_1.AuxInt
 39468  		if x != v_1.Args[0] {
 39469  			break
 39470  		}
 39471  		if !(d == 64-c) {
 39472  			break
 39473  		}
 39474  		v.reset(OpPPC64ROTLconst)
 39475  		v.AuxInt = c
 39476  		v.AddArg(x)
 39477  		return true
 39478  	}
 39479  	// match: (XOR (SRDconst x [d]) (SLDconst x [c]))
 39480  	// cond: d == 64-c
 39481  	// result: (ROTLconst [c] x)
 39482  	for {
 39483  		_ = v.Args[1]
 39484  		v_0 := v.Args[0]
 39485  		if v_0.Op != OpPPC64SRDconst {
 39486  			break
 39487  		}
 39488  		d := v_0.AuxInt
 39489  		x := v_0.Args[0]
 39490  		v_1 := v.Args[1]
 39491  		if v_1.Op != OpPPC64SLDconst {
 39492  			break
 39493  		}
 39494  		c := v_1.AuxInt
 39495  		if x != v_1.Args[0] {
 39496  			break
 39497  		}
 39498  		if !(d == 64-c) {
 39499  			break
 39500  		}
 39501  		v.reset(OpPPC64ROTLconst)
 39502  		v.AuxInt = c
 39503  		v.AddArg(x)
 39504  		return true
 39505  	}
 39506  	// match: (XOR (SLWconst x [c]) (SRWconst x [d]))
 39507  	// cond: d == 32-c
 39508  	// result: (ROTLWconst [c] x)
 39509  	for {
 39510  		_ = v.Args[1]
 39511  		v_0 := v.Args[0]
 39512  		if v_0.Op != OpPPC64SLWconst {
 39513  			break
 39514  		}
 39515  		c := v_0.AuxInt
 39516  		x := v_0.Args[0]
 39517  		v_1 := v.Args[1]
 39518  		if v_1.Op != OpPPC64SRWconst {
 39519  			break
 39520  		}
 39521  		d := v_1.AuxInt
 39522  		if x != v_1.Args[0] {
 39523  			break
 39524  		}
 39525  		if !(d == 32-c) {
 39526  			break
 39527  		}
 39528  		v.reset(OpPPC64ROTLWconst)
 39529  		v.AuxInt = c
 39530  		v.AddArg(x)
 39531  		return true
 39532  	}
 39533  	// match: (XOR (SRWconst x [d]) (SLWconst x [c]))
 39534  	// cond: d == 32-c
 39535  	// result: (ROTLWconst [c] x)
 39536  	for {
 39537  		_ = v.Args[1]
 39538  		v_0 := v.Args[0]
 39539  		if v_0.Op != OpPPC64SRWconst {
 39540  			break
 39541  		}
 39542  		d := v_0.AuxInt
 39543  		x := v_0.Args[0]
 39544  		v_1 := v.Args[1]
 39545  		if v_1.Op != OpPPC64SLWconst {
 39546  			break
 39547  		}
 39548  		c := v_1.AuxInt
 39549  		if x != v_1.Args[0] {
 39550  			break
 39551  		}
 39552  		if !(d == 32-c) {
 39553  			break
 39554  		}
 39555  		v.reset(OpPPC64ROTLWconst)
 39556  		v.AuxInt = c
 39557  		v.AddArg(x)
 39558  		return true
 39559  	}
 39560  	// match: (XOR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
 39561  	// cond:
 39562  	// result: (ROTL x y)
 39563  	for {
 39564  		_ = v.Args[1]
 39565  		v_0 := v.Args[0]
 39566  		if v_0.Op != OpPPC64SLD {
 39567  			break
 39568  		}
 39569  		_ = v_0.Args[1]
 39570  		x := v_0.Args[0]
 39571  		v_0_1 := v_0.Args[1]
 39572  		if v_0_1.Op != OpPPC64ANDconst {
 39573  			break
 39574  		}
 39575  		if v_0_1.Type != typ.Int64 {
 39576  			break
 39577  		}
 39578  		if v_0_1.AuxInt != 63 {
 39579  			break
 39580  		}
 39581  		y := v_0_1.Args[0]
 39582  		v_1 := v.Args[1]
 39583  		if v_1.Op != OpPPC64SRD {
 39584  			break
 39585  		}
 39586  		_ = v_1.Args[1]
 39587  		if x != v_1.Args[0] {
 39588  			break
 39589  		}
 39590  		v_1_1 := v_1.Args[1]
 39591  		if v_1_1.Op != OpPPC64SUB {
 39592  			break
 39593  		}
 39594  		if v_1_1.Type != typ.UInt {
 39595  			break
 39596  		}
 39597  		_ = v_1_1.Args[1]
 39598  		v_1_1_0 := v_1_1.Args[0]
 39599  		if v_1_1_0.Op != OpPPC64MOVDconst {
 39600  			break
 39601  		}
 39602  		if v_1_1_0.AuxInt != 64 {
 39603  			break
 39604  		}
 39605  		v_1_1_1 := v_1_1.Args[1]
 39606  		if v_1_1_1.Op != OpPPC64ANDconst {
 39607  			break
 39608  		}
 39609  		if v_1_1_1.Type != typ.UInt {
 39610  			break
 39611  		}
 39612  		if v_1_1_1.AuxInt != 63 {
 39613  			break
 39614  		}
 39615  		if y != v_1_1_1.Args[0] {
 39616  			break
 39617  		}
 39618  		v.reset(OpPPC64ROTL)
 39619  		v.AddArg(x)
 39620  		v.AddArg(y)
 39621  		return true
 39622  	}
 39623  	// match: (XOR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
 39624  	// cond:
 39625  	// result: (ROTL x y)
 39626  	for {
 39627  		_ = v.Args[1]
 39628  		v_0 := v.Args[0]
 39629  		if v_0.Op != OpPPC64SRD {
 39630  			break
 39631  		}
 39632  		_ = v_0.Args[1]
 39633  		x := v_0.Args[0]
 39634  		v_0_1 := v_0.Args[1]
 39635  		if v_0_1.Op != OpPPC64SUB {
 39636  			break
 39637  		}
 39638  		if v_0_1.Type != typ.UInt {
 39639  			break
 39640  		}
 39641  		_ = v_0_1.Args[1]
 39642  		v_0_1_0 := v_0_1.Args[0]
 39643  		if v_0_1_0.Op != OpPPC64MOVDconst {
 39644  			break
 39645  		}
 39646  		if v_0_1_0.AuxInt != 64 {
 39647  			break
 39648  		}
 39649  		v_0_1_1 := v_0_1.Args[1]
 39650  		if v_0_1_1.Op != OpPPC64ANDconst {
 39651  			break
 39652  		}
 39653  		if v_0_1_1.Type != typ.UInt {
 39654  			break
 39655  		}
 39656  		if v_0_1_1.AuxInt != 63 {
 39657  			break
 39658  		}
 39659  		y := v_0_1_1.Args[0]
 39660  		v_1 := v.Args[1]
 39661  		if v_1.Op != OpPPC64SLD {
 39662  			break
 39663  		}
 39664  		_ = v_1.Args[1]
 39665  		if x != v_1.Args[0] {
 39666  			break
 39667  		}
 39668  		v_1_1 := v_1.Args[1]
 39669  		if v_1_1.Op != OpPPC64ANDconst {
 39670  			break
 39671  		}
 39672  		if v_1_1.Type != typ.Int64 {
 39673  			break
 39674  		}
 39675  		if v_1_1.AuxInt != 63 {
 39676  			break
 39677  		}
 39678  		if y != v_1_1.Args[0] {
 39679  			break
 39680  		}
 39681  		v.reset(OpPPC64ROTL)
 39682  		v.AddArg(x)
 39683  		v.AddArg(y)
 39684  		return true
 39685  	}
 39686  	// match: (XOR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
 39687  	// cond:
 39688  	// result: (ROTLW x y)
 39689  	for {
 39690  		_ = v.Args[1]
 39691  		v_0 := v.Args[0]
 39692  		if v_0.Op != OpPPC64SLW {
 39693  			break
 39694  		}
 39695  		_ = v_0.Args[1]
 39696  		x := v_0.Args[0]
 39697  		v_0_1 := v_0.Args[1]
 39698  		if v_0_1.Op != OpPPC64ANDconst {
 39699  			break
 39700  		}
 39701  		if v_0_1.Type != typ.Int32 {
 39702  			break
 39703  		}
 39704  		if v_0_1.AuxInt != 31 {
 39705  			break
 39706  		}
 39707  		y := v_0_1.Args[0]
 39708  		v_1 := v.Args[1]
 39709  		if v_1.Op != OpPPC64SRW {
 39710  			break
 39711  		}
 39712  		_ = v_1.Args[1]
 39713  		if x != v_1.Args[0] {
 39714  			break
 39715  		}
 39716  		v_1_1 := v_1.Args[1]
 39717  		if v_1_1.Op != OpPPC64SUB {
 39718  			break
 39719  		}
 39720  		if v_1_1.Type != typ.UInt {
 39721  			break
 39722  		}
 39723  		_ = v_1_1.Args[1]
 39724  		v_1_1_0 := v_1_1.Args[0]
 39725  		if v_1_1_0.Op != OpPPC64MOVDconst {
 39726  			break
 39727  		}
 39728  		if v_1_1_0.AuxInt != 32 {
 39729  			break
 39730  		}
 39731  		v_1_1_1 := v_1_1.Args[1]
 39732  		if v_1_1_1.Op != OpPPC64ANDconst {
 39733  			break
 39734  		}
 39735  		if v_1_1_1.Type != typ.UInt {
 39736  			break
 39737  		}
 39738  		if v_1_1_1.AuxInt != 31 {
 39739  			break
 39740  		}
 39741  		if y != v_1_1_1.Args[0] {
 39742  			break
 39743  		}
 39744  		v.reset(OpPPC64ROTLW)
 39745  		v.AddArg(x)
 39746  		v.AddArg(y)
 39747  		return true
 39748  	}
 39749  	// match: (XOR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
 39750  	// cond:
 39751  	// result: (ROTLW x y)
 39752  	for {
 39753  		_ = v.Args[1]
 39754  		v_0 := v.Args[0]
 39755  		if v_0.Op != OpPPC64SRW {
 39756  			break
 39757  		}
 39758  		_ = v_0.Args[1]
 39759  		x := v_0.Args[0]
 39760  		v_0_1 := v_0.Args[1]
 39761  		if v_0_1.Op != OpPPC64SUB {
 39762  			break
 39763  		}
 39764  		if v_0_1.Type != typ.UInt {
 39765  			break
 39766  		}
 39767  		_ = v_0_1.Args[1]
 39768  		v_0_1_0 := v_0_1.Args[0]
 39769  		if v_0_1_0.Op != OpPPC64MOVDconst {
 39770  			break
 39771  		}
 39772  		if v_0_1_0.AuxInt != 32 {
 39773  			break
 39774  		}
 39775  		v_0_1_1 := v_0_1.Args[1]
 39776  		if v_0_1_1.Op != OpPPC64ANDconst {
 39777  			break
 39778  		}
 39779  		if v_0_1_1.Type != typ.UInt {
 39780  			break
 39781  		}
 39782  		if v_0_1_1.AuxInt != 31 {
 39783  			break
 39784  		}
 39785  		y := v_0_1_1.Args[0]
 39786  		v_1 := v.Args[1]
 39787  		if v_1.Op != OpPPC64SLW {
 39788  			break
 39789  		}
 39790  		_ = v_1.Args[1]
 39791  		if x != v_1.Args[0] {
 39792  			break
 39793  		}
 39794  		v_1_1 := v_1.Args[1]
 39795  		if v_1_1.Op != OpPPC64ANDconst {
 39796  			break
 39797  		}
 39798  		if v_1_1.Type != typ.Int32 {
 39799  			break
 39800  		}
 39801  		if v_1_1.AuxInt != 31 {
 39802  			break
 39803  		}
 39804  		if y != v_1_1.Args[0] {
 39805  			break
 39806  		}
 39807  		v.reset(OpPPC64ROTLW)
 39808  		v.AddArg(x)
 39809  		v.AddArg(y)
 39810  		return true
 39811  	}
 39812  	// match: (XOR (MOVDconst [c]) (MOVDconst [d]))
 39813  	// cond:
 39814  	// result: (MOVDconst [c^d])
 39815  	for {
 39816  		_ = v.Args[1]
 39817  		v_0 := v.Args[0]
 39818  		if v_0.Op != OpPPC64MOVDconst {
 39819  			break
 39820  		}
 39821  		c := v_0.AuxInt
 39822  		v_1 := v.Args[1]
 39823  		if v_1.Op != OpPPC64MOVDconst {
 39824  			break
 39825  		}
 39826  		d := v_1.AuxInt
 39827  		v.reset(OpPPC64MOVDconst)
 39828  		v.AuxInt = c ^ d
 39829  		return true
 39830  	}
 39831  	// match: (XOR (MOVDconst [d]) (MOVDconst [c]))
 39832  	// cond:
 39833  	// result: (MOVDconst [c^d])
 39834  	for {
 39835  		_ = v.Args[1]
 39836  		v_0 := v.Args[0]
 39837  		if v_0.Op != OpPPC64MOVDconst {
 39838  			break
 39839  		}
 39840  		d := v_0.AuxInt
 39841  		v_1 := v.Args[1]
 39842  		if v_1.Op != OpPPC64MOVDconst {
 39843  			break
 39844  		}
 39845  		c := v_1.AuxInt
 39846  		v.reset(OpPPC64MOVDconst)
 39847  		v.AuxInt = c ^ d
 39848  		return true
 39849  	}
 39850  	return false
 39851  }
 39852  func rewriteValuePPC64_OpPPC64XOR_10(v *Value) bool {
 39853  	// match: (XOR x (MOVDconst [c]))
 39854  	// cond: isU32Bit(c)
 39855  	// result: (XORconst [c] x)
 39856  	for {
 39857  		_ = v.Args[1]
 39858  		x := v.Args[0]
 39859  		v_1 := v.Args[1]
 39860  		if v_1.Op != OpPPC64MOVDconst {
 39861  			break
 39862  		}
 39863  		c := v_1.AuxInt
 39864  		if !(isU32Bit(c)) {
 39865  			break
 39866  		}
 39867  		v.reset(OpPPC64XORconst)
 39868  		v.AuxInt = c
 39869  		v.AddArg(x)
 39870  		return true
 39871  	}
 39872  	// match: (XOR (MOVDconst [c]) x)
 39873  	// cond: isU32Bit(c)
 39874  	// result: (XORconst [c] x)
 39875  	for {
 39876  		_ = v.Args[1]
 39877  		v_0 := v.Args[0]
 39878  		if v_0.Op != OpPPC64MOVDconst {
 39879  			break
 39880  		}
 39881  		c := v_0.AuxInt
 39882  		x := v.Args[1]
 39883  		if !(isU32Bit(c)) {
 39884  			break
 39885  		}
 39886  		v.reset(OpPPC64XORconst)
 39887  		v.AuxInt = c
 39888  		v.AddArg(x)
 39889  		return true
 39890  	}
 39891  	return false
 39892  }
 39893  func rewriteValuePPC64_OpPPC64XORconst_0(v *Value) bool {
 39894  	// match: (XORconst [c] (XORconst [d] x))
 39895  	// cond:
 39896  	// result: (XORconst [c^d] x)
 39897  	for {
 39898  		c := v.AuxInt
 39899  		v_0 := v.Args[0]
 39900  		if v_0.Op != OpPPC64XORconst {
 39901  			break
 39902  		}
 39903  		d := v_0.AuxInt
 39904  		x := v_0.Args[0]
 39905  		v.reset(OpPPC64XORconst)
 39906  		v.AuxInt = c ^ d
 39907  		v.AddArg(x)
 39908  		return true
 39909  	}
 39910  	// match: (XORconst [0] x)
 39911  	// cond:
 39912  	// result: x
 39913  	for {
 39914  		if v.AuxInt != 0 {
 39915  			break
 39916  		}
 39917  		x := v.Args[0]
 39918  		v.reset(OpCopy)
 39919  		v.Type = x.Type
 39920  		v.AddArg(x)
 39921  		return true
 39922  	}
 39923  	return false
 39924  }
 39925  func rewriteValuePPC64_OpPopCount16_0(v *Value) bool {
 39926  	b := v.Block
 39927  	_ = b
 39928  	typ := &b.Func.Config.Types
 39929  	_ = typ
 39930  	// match: (PopCount16 x)
 39931  	// cond:
 39932  	// result: (POPCNTW (MOVHZreg x))
 39933  	for {
 39934  		x := v.Args[0]
 39935  		v.reset(OpPPC64POPCNTW)
 39936  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
 39937  		v0.AddArg(x)
 39938  		v.AddArg(v0)
 39939  		return true
 39940  	}
 39941  }
 39942  func rewriteValuePPC64_OpPopCount32_0(v *Value) bool {
 39943  	b := v.Block
 39944  	_ = b
 39945  	typ := &b.Func.Config.Types
 39946  	_ = typ
 39947  	// match: (PopCount32 x)
 39948  	// cond:
 39949  	// result: (POPCNTW (MOVWZreg x))
 39950  	for {
 39951  		x := v.Args[0]
 39952  		v.reset(OpPPC64POPCNTW)
 39953  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
 39954  		v0.AddArg(x)
 39955  		v.AddArg(v0)
 39956  		return true
 39957  	}
 39958  }
 39959  func rewriteValuePPC64_OpPopCount64_0(v *Value) bool {
 39960  	// match: (PopCount64 x)
 39961  	// cond:
 39962  	// result: (POPCNTD x)
 39963  	for {
 39964  		x := v.Args[0]
 39965  		v.reset(OpPPC64POPCNTD)
 39966  		v.AddArg(x)
 39967  		return true
 39968  	}
 39969  }
 39970  func rewriteValuePPC64_OpPopCount8_0(v *Value) bool {
 39971  	b := v.Block
 39972  	_ = b
 39973  	typ := &b.Func.Config.Types
 39974  	_ = typ
 39975  	// match: (PopCount8 x)
 39976  	// cond:
 39977  	// result: (POPCNTB (MOVBreg x))
 39978  	for {
 39979  		x := v.Args[0]
 39980  		v.reset(OpPPC64POPCNTB)
 39981  		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
 39982  		v0.AddArg(x)
 39983  		v.AddArg(v0)
 39984  		return true
 39985  	}
 39986  }
 39987  func rewriteValuePPC64_OpRound32F_0(v *Value) bool {
 39988  	// match: (Round32F x)
 39989  	// cond:
 39990  	// result: (LoweredRound32F x)
 39991  	for {
 39992  		x := v.Args[0]
 39993  		v.reset(OpPPC64LoweredRound32F)
 39994  		v.AddArg(x)
 39995  		return true
 39996  	}
 39997  }
 39998  func rewriteValuePPC64_OpRound64F_0(v *Value) bool {
 39999  	// match: (Round64F x)
 40000  	// cond:
 40001  	// result: (LoweredRound64F x)
 40002  	for {
 40003  		x := v.Args[0]
 40004  		v.reset(OpPPC64LoweredRound64F)
 40005  		v.AddArg(x)
 40006  		return true
 40007  	}
 40008  }
 40009  func rewriteValuePPC64_OpRsh16Ux16_0(v *Value) bool {
 40010  	b := v.Block
 40011  	_ = b
 40012  	typ := &b.Func.Config.Types
 40013  	_ = typ
 40014  	// match: (Rsh16Ux16 x y)
 40015  	// cond:
 40016  	// result: (SRW  (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 40017  	for {
 40018  		_ = v.Args[1]
 40019  		x := v.Args[0]
 40020  		y := v.Args[1]
 40021  		v.reset(OpPPC64SRW)
 40022  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40023  		v0.AddArg(x)
 40024  		v.AddArg(v0)
 40025  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40026  		v1.AddArg(y)
 40027  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40028  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40029  		v3.AuxInt = -16
 40030  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 40031  		v4.AddArg(y)
 40032  		v3.AddArg(v4)
 40033  		v2.AddArg(v3)
 40034  		v1.AddArg(v2)
 40035  		v.AddArg(v1)
 40036  		return true
 40037  	}
 40038  }
 40039  func rewriteValuePPC64_OpRsh16Ux32_0(v *Value) bool {
 40040  	b := v.Block
 40041  	_ = b
 40042  	typ := &b.Func.Config.Types
 40043  	_ = typ
 40044  	// match: (Rsh16Ux32 x (Const64 [c]))
 40045  	// cond: uint32(c) < 16
 40046  	// result: (SRWconst (ZeroExt16to32 x) [c])
 40047  	for {
 40048  		_ = v.Args[1]
 40049  		x := v.Args[0]
 40050  		v_1 := v.Args[1]
 40051  		if v_1.Op != OpConst64 {
 40052  			break
 40053  		}
 40054  		c := v_1.AuxInt
 40055  		if !(uint32(c) < 16) {
 40056  			break
 40057  		}
 40058  		v.reset(OpPPC64SRWconst)
 40059  		v.AuxInt = c
 40060  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40061  		v0.AddArg(x)
 40062  		v.AddArg(v0)
 40063  		return true
 40064  	}
 40065  	// match: (Rsh16Ux32 x (MOVDconst [c]))
 40066  	// cond: uint32(c) < 16
 40067  	// result: (SRWconst (ZeroExt16to32 x) [c])
 40068  	for {
 40069  		_ = v.Args[1]
 40070  		x := v.Args[0]
 40071  		v_1 := v.Args[1]
 40072  		if v_1.Op != OpPPC64MOVDconst {
 40073  			break
 40074  		}
 40075  		c := v_1.AuxInt
 40076  		if !(uint32(c) < 16) {
 40077  			break
 40078  		}
 40079  		v.reset(OpPPC64SRWconst)
 40080  		v.AuxInt = c
 40081  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40082  		v0.AddArg(x)
 40083  		v.AddArg(v0)
 40084  		return true
 40085  	}
 40086  	// match: (Rsh16Ux32 x y)
 40087  	// cond:
 40088  	// result: (SRW  (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 40089  	for {
 40090  		_ = v.Args[1]
 40091  		x := v.Args[0]
 40092  		y := v.Args[1]
 40093  		v.reset(OpPPC64SRW)
 40094  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40095  		v0.AddArg(x)
 40096  		v.AddArg(v0)
 40097  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40098  		v1.AddArg(y)
 40099  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40100  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40101  		v3.AuxInt = -16
 40102  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 40103  		v4.AddArg(y)
 40104  		v3.AddArg(v4)
 40105  		v2.AddArg(v3)
 40106  		v1.AddArg(v2)
 40107  		v.AddArg(v1)
 40108  		return true
 40109  	}
 40110  }
 40111  func rewriteValuePPC64_OpRsh16Ux64_0(v *Value) bool {
 40112  	b := v.Block
 40113  	_ = b
 40114  	typ := &b.Func.Config.Types
 40115  	_ = typ
 40116  	// match: (Rsh16Ux64 x (Const64 [c]))
 40117  	// cond: uint64(c) < 16
 40118  	// result: (SRWconst (ZeroExt16to32 x) [c])
 40119  	for {
 40120  		_ = v.Args[1]
 40121  		x := v.Args[0]
 40122  		v_1 := v.Args[1]
 40123  		if v_1.Op != OpConst64 {
 40124  			break
 40125  		}
 40126  		c := v_1.AuxInt
 40127  		if !(uint64(c) < 16) {
 40128  			break
 40129  		}
 40130  		v.reset(OpPPC64SRWconst)
 40131  		v.AuxInt = c
 40132  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40133  		v0.AddArg(x)
 40134  		v.AddArg(v0)
 40135  		return true
 40136  	}
 40137  	// match: (Rsh16Ux64 _ (Const64 [c]))
 40138  	// cond: uint64(c) >= 16
 40139  	// result: (MOVDconst [0])
 40140  	for {
 40141  		_ = v.Args[1]
 40142  		v_1 := v.Args[1]
 40143  		if v_1.Op != OpConst64 {
 40144  			break
 40145  		}
 40146  		c := v_1.AuxInt
 40147  		if !(uint64(c) >= 16) {
 40148  			break
 40149  		}
 40150  		v.reset(OpPPC64MOVDconst)
 40151  		v.AuxInt = 0
 40152  		return true
 40153  	}
 40154  	// match: (Rsh16Ux64 x (MOVDconst [c]))
 40155  	// cond: uint64(c) < 16
 40156  	// result: (SRWconst (ZeroExt16to32 x) [c])
 40157  	for {
 40158  		_ = v.Args[1]
 40159  		x := v.Args[0]
 40160  		v_1 := v.Args[1]
 40161  		if v_1.Op != OpPPC64MOVDconst {
 40162  			break
 40163  		}
 40164  		c := v_1.AuxInt
 40165  		if !(uint64(c) < 16) {
 40166  			break
 40167  		}
 40168  		v.reset(OpPPC64SRWconst)
 40169  		v.AuxInt = c
 40170  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40171  		v0.AddArg(x)
 40172  		v.AddArg(v0)
 40173  		return true
 40174  	}
 40175  	// match: (Rsh16Ux64 x y)
 40176  	// cond:
 40177  	// result: (SRW  (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 40178  	for {
 40179  		_ = v.Args[1]
 40180  		x := v.Args[0]
 40181  		y := v.Args[1]
 40182  		v.reset(OpPPC64SRW)
 40183  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40184  		v0.AddArg(x)
 40185  		v.AddArg(v0)
 40186  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40187  		v1.AddArg(y)
 40188  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40189  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40190  		v3.AuxInt = -16
 40191  		v3.AddArg(y)
 40192  		v2.AddArg(v3)
 40193  		v1.AddArg(v2)
 40194  		v.AddArg(v1)
 40195  		return true
 40196  	}
 40197  }
 40198  func rewriteValuePPC64_OpRsh16Ux8_0(v *Value) bool {
 40199  	b := v.Block
 40200  	_ = b
 40201  	typ := &b.Func.Config.Types
 40202  	_ = typ
 40203  	// match: (Rsh16Ux8 x y)
 40204  	// cond:
 40205  	// result: (SRW  (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 40206  	for {
 40207  		_ = v.Args[1]
 40208  		x := v.Args[0]
 40209  		y := v.Args[1]
 40210  		v.reset(OpPPC64SRW)
 40211  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
 40212  		v0.AddArg(x)
 40213  		v.AddArg(v0)
 40214  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40215  		v1.AddArg(y)
 40216  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40217  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40218  		v3.AuxInt = -16
 40219  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 40220  		v4.AddArg(y)
 40221  		v3.AddArg(v4)
 40222  		v2.AddArg(v3)
 40223  		v1.AddArg(v2)
 40224  		v.AddArg(v1)
 40225  		return true
 40226  	}
 40227  }
 40228  func rewriteValuePPC64_OpRsh16x16_0(v *Value) bool {
 40229  	b := v.Block
 40230  	_ = b
 40231  	typ := &b.Func.Config.Types
 40232  	_ = typ
 40233  	// match: (Rsh16x16 x y)
 40234  	// cond:
 40235  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
 40236  	for {
 40237  		_ = v.Args[1]
 40238  		x := v.Args[0]
 40239  		y := v.Args[1]
 40240  		v.reset(OpPPC64SRAW)
 40241  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40242  		v0.AddArg(x)
 40243  		v.AddArg(v0)
 40244  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40245  		v1.AddArg(y)
 40246  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40247  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40248  		v3.AuxInt = -16
 40249  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 40250  		v4.AddArg(y)
 40251  		v3.AddArg(v4)
 40252  		v2.AddArg(v3)
 40253  		v1.AddArg(v2)
 40254  		v.AddArg(v1)
 40255  		return true
 40256  	}
 40257  }
 40258  func rewriteValuePPC64_OpRsh16x32_0(v *Value) bool {
 40259  	b := v.Block
 40260  	_ = b
 40261  	typ := &b.Func.Config.Types
 40262  	_ = typ
 40263  	// match: (Rsh16x32 x (Const64 [c]))
 40264  	// cond: uint32(c) < 16
 40265  	// result: (SRAWconst (SignExt16to32 x) [c])
 40266  	for {
 40267  		_ = v.Args[1]
 40268  		x := v.Args[0]
 40269  		v_1 := v.Args[1]
 40270  		if v_1.Op != OpConst64 {
 40271  			break
 40272  		}
 40273  		c := v_1.AuxInt
 40274  		if !(uint32(c) < 16) {
 40275  			break
 40276  		}
 40277  		v.reset(OpPPC64SRAWconst)
 40278  		v.AuxInt = c
 40279  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40280  		v0.AddArg(x)
 40281  		v.AddArg(v0)
 40282  		return true
 40283  	}
 40284  	// match: (Rsh16x32 x (MOVDconst [c]))
 40285  	// cond: uint32(c) < 16
 40286  	// result: (SRAWconst (SignExt16to32 x) [c])
 40287  	for {
 40288  		_ = v.Args[1]
 40289  		x := v.Args[0]
 40290  		v_1 := v.Args[1]
 40291  		if v_1.Op != OpPPC64MOVDconst {
 40292  			break
 40293  		}
 40294  		c := v_1.AuxInt
 40295  		if !(uint32(c) < 16) {
 40296  			break
 40297  		}
 40298  		v.reset(OpPPC64SRAWconst)
 40299  		v.AuxInt = c
 40300  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40301  		v0.AddArg(x)
 40302  		v.AddArg(v0)
 40303  		return true
 40304  	}
 40305  	// match: (Rsh16x32 x y)
 40306  	// cond:
 40307  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
 40308  	for {
 40309  		_ = v.Args[1]
 40310  		x := v.Args[0]
 40311  		y := v.Args[1]
 40312  		v.reset(OpPPC64SRAW)
 40313  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40314  		v0.AddArg(x)
 40315  		v.AddArg(v0)
 40316  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40317  		v1.AddArg(y)
 40318  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40319  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40320  		v3.AuxInt = -16
 40321  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 40322  		v4.AddArg(y)
 40323  		v3.AddArg(v4)
 40324  		v2.AddArg(v3)
 40325  		v1.AddArg(v2)
 40326  		v.AddArg(v1)
 40327  		return true
 40328  	}
 40329  }
 40330  func rewriteValuePPC64_OpRsh16x64_0(v *Value) bool {
 40331  	b := v.Block
 40332  	_ = b
 40333  	typ := &b.Func.Config.Types
 40334  	_ = typ
 40335  	// match: (Rsh16x64 x (Const64 [c]))
 40336  	// cond: uint64(c) < 16
 40337  	// result: (SRAWconst (SignExt16to32 x) [c])
 40338  	for {
 40339  		_ = v.Args[1]
 40340  		x := v.Args[0]
 40341  		v_1 := v.Args[1]
 40342  		if v_1.Op != OpConst64 {
 40343  			break
 40344  		}
 40345  		c := v_1.AuxInt
 40346  		if !(uint64(c) < 16) {
 40347  			break
 40348  		}
 40349  		v.reset(OpPPC64SRAWconst)
 40350  		v.AuxInt = c
 40351  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40352  		v0.AddArg(x)
 40353  		v.AddArg(v0)
 40354  		return true
 40355  	}
 40356  	// match: (Rsh16x64 x (Const64 [c]))
 40357  	// cond: uint64(c) >= 16
 40358  	// result: (SRAWconst (SignExt16to32 x) [63])
 40359  	for {
 40360  		_ = v.Args[1]
 40361  		x := v.Args[0]
 40362  		v_1 := v.Args[1]
 40363  		if v_1.Op != OpConst64 {
 40364  			break
 40365  		}
 40366  		c := v_1.AuxInt
 40367  		if !(uint64(c) >= 16) {
 40368  			break
 40369  		}
 40370  		v.reset(OpPPC64SRAWconst)
 40371  		v.AuxInt = 63
 40372  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40373  		v0.AddArg(x)
 40374  		v.AddArg(v0)
 40375  		return true
 40376  	}
 40377  	// match: (Rsh16x64 x (MOVDconst [c]))
 40378  	// cond: uint64(c) < 16
 40379  	// result: (SRAWconst (SignExt16to32 x) [c])
 40380  	for {
 40381  		_ = v.Args[1]
 40382  		x := v.Args[0]
 40383  		v_1 := v.Args[1]
 40384  		if v_1.Op != OpPPC64MOVDconst {
 40385  			break
 40386  		}
 40387  		c := v_1.AuxInt
 40388  		if !(uint64(c) < 16) {
 40389  			break
 40390  		}
 40391  		v.reset(OpPPC64SRAWconst)
 40392  		v.AuxInt = c
 40393  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40394  		v0.AddArg(x)
 40395  		v.AddArg(v0)
 40396  		return true
 40397  	}
 40398  	// match: (Rsh16x64 x y)
 40399  	// cond:
 40400  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
 40401  	for {
 40402  		_ = v.Args[1]
 40403  		x := v.Args[0]
 40404  		y := v.Args[1]
 40405  		v.reset(OpPPC64SRAW)
 40406  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40407  		v0.AddArg(x)
 40408  		v.AddArg(v0)
 40409  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40410  		v1.AddArg(y)
 40411  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40412  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40413  		v3.AuxInt = -16
 40414  		v3.AddArg(y)
 40415  		v2.AddArg(v3)
 40416  		v1.AddArg(v2)
 40417  		v.AddArg(v1)
 40418  		return true
 40419  	}
 40420  }
 40421  func rewriteValuePPC64_OpRsh16x8_0(v *Value) bool {
 40422  	b := v.Block
 40423  	_ = b
 40424  	typ := &b.Func.Config.Types
 40425  	_ = typ
 40426  	// match: (Rsh16x8 x y)
 40427  	// cond:
 40428  	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
 40429  	for {
 40430  		_ = v.Args[1]
 40431  		x := v.Args[0]
 40432  		y := v.Args[1]
 40433  		v.reset(OpPPC64SRAW)
 40434  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
 40435  		v0.AddArg(x)
 40436  		v.AddArg(v0)
 40437  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40438  		v1.AddArg(y)
 40439  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40440  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40441  		v3.AuxInt = -16
 40442  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 40443  		v4.AddArg(y)
 40444  		v3.AddArg(v4)
 40445  		v2.AddArg(v3)
 40446  		v1.AddArg(v2)
 40447  		v.AddArg(v1)
 40448  		return true
 40449  	}
 40450  }
 40451  func rewriteValuePPC64_OpRsh32Ux16_0(v *Value) bool {
 40452  	b := v.Block
 40453  	_ = b
 40454  	typ := &b.Func.Config.Types
 40455  	_ = typ
 40456  	// match: (Rsh32Ux16 x y)
 40457  	// cond:
 40458  	// result: (SRW x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 40459  	for {
 40460  		_ = v.Args[1]
 40461  		x := v.Args[0]
 40462  		y := v.Args[1]
 40463  		v.reset(OpPPC64SRW)
 40464  		v.AddArg(x)
 40465  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40466  		v0.AddArg(y)
 40467  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40468  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40469  		v2.AuxInt = -32
 40470  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 40471  		v3.AddArg(y)
 40472  		v2.AddArg(v3)
 40473  		v1.AddArg(v2)
 40474  		v0.AddArg(v1)
 40475  		v.AddArg(v0)
 40476  		return true
 40477  	}
 40478  }
 40479  func rewriteValuePPC64_OpRsh32Ux32_0(v *Value) bool {
 40480  	b := v.Block
 40481  	_ = b
 40482  	typ := &b.Func.Config.Types
 40483  	_ = typ
 40484  	// match: (Rsh32Ux32 x (Const64 [c]))
 40485  	// cond: uint32(c) < 32
 40486  	// result: (SRWconst x [c])
 40487  	for {
 40488  		_ = v.Args[1]
 40489  		x := v.Args[0]
 40490  		v_1 := v.Args[1]
 40491  		if v_1.Op != OpConst64 {
 40492  			break
 40493  		}
 40494  		c := v_1.AuxInt
 40495  		if !(uint32(c) < 32) {
 40496  			break
 40497  		}
 40498  		v.reset(OpPPC64SRWconst)
 40499  		v.AuxInt = c
 40500  		v.AddArg(x)
 40501  		return true
 40502  	}
 40503  	// match: (Rsh32Ux32 x (MOVDconst [c]))
 40504  	// cond: uint32(c) < 32
 40505  	// result: (SRWconst x [c])
 40506  	for {
 40507  		_ = v.Args[1]
 40508  		x := v.Args[0]
 40509  		v_1 := v.Args[1]
 40510  		if v_1.Op != OpPPC64MOVDconst {
 40511  			break
 40512  		}
 40513  		c := v_1.AuxInt
 40514  		if !(uint32(c) < 32) {
 40515  			break
 40516  		}
 40517  		v.reset(OpPPC64SRWconst)
 40518  		v.AuxInt = c
 40519  		v.AddArg(x)
 40520  		return true
 40521  	}
 40522  	// match: (Rsh32Ux32 x y)
 40523  	// cond:
 40524  	// result: (SRW x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 40525  	for {
 40526  		_ = v.Args[1]
 40527  		x := v.Args[0]
 40528  		y := v.Args[1]
 40529  		v.reset(OpPPC64SRW)
 40530  		v.AddArg(x)
 40531  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40532  		v0.AddArg(y)
 40533  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40534  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40535  		v2.AuxInt = -32
 40536  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 40537  		v3.AddArg(y)
 40538  		v2.AddArg(v3)
 40539  		v1.AddArg(v2)
 40540  		v0.AddArg(v1)
 40541  		v.AddArg(v0)
 40542  		return true
 40543  	}
 40544  }
 40545  func rewriteValuePPC64_OpRsh32Ux64_0(v *Value) bool {
 40546  	b := v.Block
 40547  	_ = b
 40548  	typ := &b.Func.Config.Types
 40549  	_ = typ
 40550  	// match: (Rsh32Ux64 x (Const64 [c]))
 40551  	// cond: uint64(c) < 32
 40552  	// result: (SRWconst x [c])
 40553  	for {
 40554  		_ = v.Args[1]
 40555  		x := v.Args[0]
 40556  		v_1 := v.Args[1]
 40557  		if v_1.Op != OpConst64 {
 40558  			break
 40559  		}
 40560  		c := v_1.AuxInt
 40561  		if !(uint64(c) < 32) {
 40562  			break
 40563  		}
 40564  		v.reset(OpPPC64SRWconst)
 40565  		v.AuxInt = c
 40566  		v.AddArg(x)
 40567  		return true
 40568  	}
 40569  	// match: (Rsh32Ux64 _ (Const64 [c]))
 40570  	// cond: uint64(c) >= 32
 40571  	// result: (MOVDconst [0])
 40572  	for {
 40573  		_ = v.Args[1]
 40574  		v_1 := v.Args[1]
 40575  		if v_1.Op != OpConst64 {
 40576  			break
 40577  		}
 40578  		c := v_1.AuxInt
 40579  		if !(uint64(c) >= 32) {
 40580  			break
 40581  		}
 40582  		v.reset(OpPPC64MOVDconst)
 40583  		v.AuxInt = 0
 40584  		return true
 40585  	}
 40586  	// match: (Rsh32Ux64 x (MOVDconst [c]))
 40587  	// cond: uint64(c) < 32
 40588  	// result: (SRWconst x [c])
 40589  	for {
 40590  		_ = v.Args[1]
 40591  		x := v.Args[0]
 40592  		v_1 := v.Args[1]
 40593  		if v_1.Op != OpPPC64MOVDconst {
 40594  			break
 40595  		}
 40596  		c := v_1.AuxInt
 40597  		if !(uint64(c) < 32) {
 40598  			break
 40599  		}
 40600  		v.reset(OpPPC64SRWconst)
 40601  		v.AuxInt = c
 40602  		v.AddArg(x)
 40603  		return true
 40604  	}
 40605  	// match: (Rsh32Ux64 x (AND y (MOVDconst [31])))
 40606  	// cond:
 40607  	// result: (SRW x (ANDconst <typ.Int32> [31] y))
 40608  	for {
 40609  		_ = v.Args[1]
 40610  		x := v.Args[0]
 40611  		v_1 := v.Args[1]
 40612  		if v_1.Op != OpPPC64AND {
 40613  			break
 40614  		}
 40615  		_ = v_1.Args[1]
 40616  		y := v_1.Args[0]
 40617  		v_1_1 := v_1.Args[1]
 40618  		if v_1_1.Op != OpPPC64MOVDconst {
 40619  			break
 40620  		}
 40621  		if v_1_1.AuxInt != 31 {
 40622  			break
 40623  		}
 40624  		v.reset(OpPPC64SRW)
 40625  		v.AddArg(x)
 40626  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 40627  		v0.AuxInt = 31
 40628  		v0.AddArg(y)
 40629  		v.AddArg(v0)
 40630  		return true
 40631  	}
 40632  	// match: (Rsh32Ux64 x (AND (MOVDconst [31]) y))
 40633  	// cond:
 40634  	// result: (SRW x (ANDconst <typ.Int32> [31] y))
 40635  	for {
 40636  		_ = v.Args[1]
 40637  		x := v.Args[0]
 40638  		v_1 := v.Args[1]
 40639  		if v_1.Op != OpPPC64AND {
 40640  			break
 40641  		}
 40642  		_ = v_1.Args[1]
 40643  		v_1_0 := v_1.Args[0]
 40644  		if v_1_0.Op != OpPPC64MOVDconst {
 40645  			break
 40646  		}
 40647  		if v_1_0.AuxInt != 31 {
 40648  			break
 40649  		}
 40650  		y := v_1.Args[1]
 40651  		v.reset(OpPPC64SRW)
 40652  		v.AddArg(x)
 40653  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 40654  		v0.AuxInt = 31
 40655  		v0.AddArg(y)
 40656  		v.AddArg(v0)
 40657  		return true
 40658  	}
 40659  	// match: (Rsh32Ux64 x (ANDconst <typ.UInt> [31] y))
 40660  	// cond:
 40661  	// result: (SRW x (ANDconst <typ.UInt> [31] y))
 40662  	for {
 40663  		_ = v.Args[1]
 40664  		x := v.Args[0]
 40665  		v_1 := v.Args[1]
 40666  		if v_1.Op != OpPPC64ANDconst {
 40667  			break
 40668  		}
 40669  		if v_1.Type != typ.UInt {
 40670  			break
 40671  		}
 40672  		if v_1.AuxInt != 31 {
 40673  			break
 40674  		}
 40675  		y := v_1.Args[0]
 40676  		v.reset(OpPPC64SRW)
 40677  		v.AddArg(x)
 40678  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 40679  		v0.AuxInt = 31
 40680  		v0.AddArg(y)
 40681  		v.AddArg(v0)
 40682  		return true
 40683  	}
 40684  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 40685  	// cond:
 40686  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 40687  	for {
 40688  		_ = v.Args[1]
 40689  		x := v.Args[0]
 40690  		v_1 := v.Args[1]
 40691  		if v_1.Op != OpPPC64SUB {
 40692  			break
 40693  		}
 40694  		if v_1.Type != typ.UInt {
 40695  			break
 40696  		}
 40697  		_ = v_1.Args[1]
 40698  		v_1_0 := v_1.Args[0]
 40699  		if v_1_0.Op != OpPPC64MOVDconst {
 40700  			break
 40701  		}
 40702  		if v_1_0.AuxInt != 32 {
 40703  			break
 40704  		}
 40705  		v_1_1 := v_1.Args[1]
 40706  		if v_1_1.Op != OpPPC64ANDconst {
 40707  			break
 40708  		}
 40709  		if v_1_1.Type != typ.UInt {
 40710  			break
 40711  		}
 40712  		if v_1_1.AuxInt != 31 {
 40713  			break
 40714  		}
 40715  		y := v_1_1.Args[0]
 40716  		v.reset(OpPPC64SRW)
 40717  		v.AddArg(x)
 40718  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 40719  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 40720  		v1.AuxInt = 32
 40721  		v0.AddArg(v1)
 40722  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 40723  		v2.AuxInt = 31
 40724  		v2.AddArg(y)
 40725  		v0.AddArg(v2)
 40726  		v.AddArg(v0)
 40727  		return true
 40728  	}
 40729  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 40730  	// cond:
 40731  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 40732  	for {
 40733  		_ = v.Args[1]
 40734  		x := v.Args[0]
 40735  		v_1 := v.Args[1]
 40736  		if v_1.Op != OpPPC64SUB {
 40737  			break
 40738  		}
 40739  		if v_1.Type != typ.UInt {
 40740  			break
 40741  		}
 40742  		_ = v_1.Args[1]
 40743  		v_1_0 := v_1.Args[0]
 40744  		if v_1_0.Op != OpPPC64MOVDconst {
 40745  			break
 40746  		}
 40747  		if v_1_0.AuxInt != 32 {
 40748  			break
 40749  		}
 40750  		v_1_1 := v_1.Args[1]
 40751  		if v_1_1.Op != OpPPC64AND {
 40752  			break
 40753  		}
 40754  		if v_1_1.Type != typ.UInt {
 40755  			break
 40756  		}
 40757  		_ = v_1_1.Args[1]
 40758  		y := v_1_1.Args[0]
 40759  		v_1_1_1 := v_1_1.Args[1]
 40760  		if v_1_1_1.Op != OpPPC64MOVDconst {
 40761  			break
 40762  		}
 40763  		if v_1_1_1.AuxInt != 31 {
 40764  			break
 40765  		}
 40766  		v.reset(OpPPC64SRW)
 40767  		v.AddArg(x)
 40768  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 40769  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 40770  		v1.AuxInt = 32
 40771  		v0.AddArg(v1)
 40772  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 40773  		v2.AuxInt = 31
 40774  		v2.AddArg(y)
 40775  		v0.AddArg(v2)
 40776  		v.AddArg(v0)
 40777  		return true
 40778  	}
 40779  	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 40780  	// cond:
 40781  	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 40782  	for {
 40783  		_ = v.Args[1]
 40784  		x := v.Args[0]
 40785  		v_1 := v.Args[1]
 40786  		if v_1.Op != OpPPC64SUB {
 40787  			break
 40788  		}
 40789  		if v_1.Type != typ.UInt {
 40790  			break
 40791  		}
 40792  		_ = v_1.Args[1]
 40793  		v_1_0 := v_1.Args[0]
 40794  		if v_1_0.Op != OpPPC64MOVDconst {
 40795  			break
 40796  		}
 40797  		if v_1_0.AuxInt != 32 {
 40798  			break
 40799  		}
 40800  		v_1_1 := v_1.Args[1]
 40801  		if v_1_1.Op != OpPPC64AND {
 40802  			break
 40803  		}
 40804  		if v_1_1.Type != typ.UInt {
 40805  			break
 40806  		}
 40807  		_ = v_1_1.Args[1]
 40808  		v_1_1_0 := v_1_1.Args[0]
 40809  		if v_1_1_0.Op != OpPPC64MOVDconst {
 40810  			break
 40811  		}
 40812  		if v_1_1_0.AuxInt != 31 {
 40813  			break
 40814  		}
 40815  		y := v_1_1.Args[1]
 40816  		v.reset(OpPPC64SRW)
 40817  		v.AddArg(x)
 40818  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 40819  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 40820  		v1.AuxInt = 32
 40821  		v0.AddArg(v1)
 40822  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 40823  		v2.AuxInt = 31
 40824  		v2.AddArg(y)
 40825  		v0.AddArg(v2)
 40826  		v.AddArg(v0)
 40827  		return true
 40828  	}
 40829  	// match: (Rsh32Ux64 x y)
 40830  	// cond:
 40831  	// result: (SRW  x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 40832  	for {
 40833  		_ = v.Args[1]
 40834  		x := v.Args[0]
 40835  		y := v.Args[1]
 40836  		v.reset(OpPPC64SRW)
 40837  		v.AddArg(x)
 40838  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40839  		v0.AddArg(y)
 40840  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40841  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40842  		v2.AuxInt = -32
 40843  		v2.AddArg(y)
 40844  		v1.AddArg(v2)
 40845  		v0.AddArg(v1)
 40846  		v.AddArg(v0)
 40847  		return true
 40848  	}
 40849  }
 40850  func rewriteValuePPC64_OpRsh32Ux8_0(v *Value) bool {
 40851  	b := v.Block
 40852  	_ = b
 40853  	typ := &b.Func.Config.Types
 40854  	_ = typ
 40855  	// match: (Rsh32Ux8 x y)
 40856  	// cond:
 40857  	// result: (SRW x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 40858  	for {
 40859  		_ = v.Args[1]
 40860  		x := v.Args[0]
 40861  		y := v.Args[1]
 40862  		v.reset(OpPPC64SRW)
 40863  		v.AddArg(x)
 40864  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40865  		v0.AddArg(y)
 40866  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40867  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40868  		v2.AuxInt = -32
 40869  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 40870  		v3.AddArg(y)
 40871  		v2.AddArg(v3)
 40872  		v1.AddArg(v2)
 40873  		v0.AddArg(v1)
 40874  		v.AddArg(v0)
 40875  		return true
 40876  	}
 40877  }
 40878  func rewriteValuePPC64_OpRsh32x16_0(v *Value) bool {
 40879  	b := v.Block
 40880  	_ = b
 40881  	typ := &b.Func.Config.Types
 40882  	_ = typ
 40883  	// match: (Rsh32x16 x y)
 40884  	// cond:
 40885  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
 40886  	for {
 40887  		_ = v.Args[1]
 40888  		x := v.Args[0]
 40889  		y := v.Args[1]
 40890  		v.reset(OpPPC64SRAW)
 40891  		v.AddArg(x)
 40892  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40893  		v0.AddArg(y)
 40894  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40895  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40896  		v2.AuxInt = -32
 40897  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 40898  		v3.AddArg(y)
 40899  		v2.AddArg(v3)
 40900  		v1.AddArg(v2)
 40901  		v0.AddArg(v1)
 40902  		v.AddArg(v0)
 40903  		return true
 40904  	}
 40905  }
 40906  func rewriteValuePPC64_OpRsh32x32_0(v *Value) bool {
 40907  	b := v.Block
 40908  	_ = b
 40909  	typ := &b.Func.Config.Types
 40910  	_ = typ
 40911  	// match: (Rsh32x32 x (Const64 [c]))
 40912  	// cond: uint32(c) < 32
 40913  	// result: (SRAWconst x [c])
 40914  	for {
 40915  		_ = v.Args[1]
 40916  		x := v.Args[0]
 40917  		v_1 := v.Args[1]
 40918  		if v_1.Op != OpConst64 {
 40919  			break
 40920  		}
 40921  		c := v_1.AuxInt
 40922  		if !(uint32(c) < 32) {
 40923  			break
 40924  		}
 40925  		v.reset(OpPPC64SRAWconst)
 40926  		v.AuxInt = c
 40927  		v.AddArg(x)
 40928  		return true
 40929  	}
 40930  	// match: (Rsh32x32 x (MOVDconst [c]))
 40931  	// cond: uint32(c) < 32
 40932  	// result: (SRAWconst x [c])
 40933  	for {
 40934  		_ = v.Args[1]
 40935  		x := v.Args[0]
 40936  		v_1 := v.Args[1]
 40937  		if v_1.Op != OpPPC64MOVDconst {
 40938  			break
 40939  		}
 40940  		c := v_1.AuxInt
 40941  		if !(uint32(c) < 32) {
 40942  			break
 40943  		}
 40944  		v.reset(OpPPC64SRAWconst)
 40945  		v.AuxInt = c
 40946  		v.AddArg(x)
 40947  		return true
 40948  	}
 40949  	// match: (Rsh32x32 x y)
 40950  	// cond:
 40951  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
 40952  	for {
 40953  		_ = v.Args[1]
 40954  		x := v.Args[0]
 40955  		y := v.Args[1]
 40956  		v.reset(OpPPC64SRAW)
 40957  		v.AddArg(x)
 40958  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 40959  		v0.AddArg(y)
 40960  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 40961  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 40962  		v2.AuxInt = -32
 40963  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 40964  		v3.AddArg(y)
 40965  		v2.AddArg(v3)
 40966  		v1.AddArg(v2)
 40967  		v0.AddArg(v1)
 40968  		v.AddArg(v0)
 40969  		return true
 40970  	}
 40971  }
 40972  func rewriteValuePPC64_OpRsh32x64_0(v *Value) bool {
 40973  	b := v.Block
 40974  	_ = b
 40975  	typ := &b.Func.Config.Types
 40976  	_ = typ
 40977  	// match: (Rsh32x64 x (Const64 [c]))
 40978  	// cond: uint64(c) < 32
 40979  	// result: (SRAWconst x [c])
 40980  	for {
 40981  		_ = v.Args[1]
 40982  		x := v.Args[0]
 40983  		v_1 := v.Args[1]
 40984  		if v_1.Op != OpConst64 {
 40985  			break
 40986  		}
 40987  		c := v_1.AuxInt
 40988  		if !(uint64(c) < 32) {
 40989  			break
 40990  		}
 40991  		v.reset(OpPPC64SRAWconst)
 40992  		v.AuxInt = c
 40993  		v.AddArg(x)
 40994  		return true
 40995  	}
 40996  	// match: (Rsh32x64 x (Const64 [c]))
 40997  	// cond: uint64(c) >= 32
 40998  	// result: (SRAWconst x [63])
 40999  	for {
 41000  		_ = v.Args[1]
 41001  		x := v.Args[0]
 41002  		v_1 := v.Args[1]
 41003  		if v_1.Op != OpConst64 {
 41004  			break
 41005  		}
 41006  		c := v_1.AuxInt
 41007  		if !(uint64(c) >= 32) {
 41008  			break
 41009  		}
 41010  		v.reset(OpPPC64SRAWconst)
 41011  		v.AuxInt = 63
 41012  		v.AddArg(x)
 41013  		return true
 41014  	}
 41015  	// match: (Rsh32x64 x (MOVDconst [c]))
 41016  	// cond: uint64(c) < 32
 41017  	// result: (SRAWconst x [c])
 41018  	for {
 41019  		_ = v.Args[1]
 41020  		x := v.Args[0]
 41021  		v_1 := v.Args[1]
 41022  		if v_1.Op != OpPPC64MOVDconst {
 41023  			break
 41024  		}
 41025  		c := v_1.AuxInt
 41026  		if !(uint64(c) < 32) {
 41027  			break
 41028  		}
 41029  		v.reset(OpPPC64SRAWconst)
 41030  		v.AuxInt = c
 41031  		v.AddArg(x)
 41032  		return true
 41033  	}
 41034  	// match: (Rsh32x64 x (AND y (MOVDconst [31])))
 41035  	// cond:
 41036  	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 41037  	for {
 41038  		_ = v.Args[1]
 41039  		x := v.Args[0]
 41040  		v_1 := v.Args[1]
 41041  		if v_1.Op != OpPPC64AND {
 41042  			break
 41043  		}
 41044  		_ = v_1.Args[1]
 41045  		y := v_1.Args[0]
 41046  		v_1_1 := v_1.Args[1]
 41047  		if v_1_1.Op != OpPPC64MOVDconst {
 41048  			break
 41049  		}
 41050  		if v_1_1.AuxInt != 31 {
 41051  			break
 41052  		}
 41053  		v.reset(OpPPC64SRAW)
 41054  		v.AddArg(x)
 41055  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 41056  		v0.AuxInt = 31
 41057  		v0.AddArg(y)
 41058  		v.AddArg(v0)
 41059  		return true
 41060  	}
 41061  	// match: (Rsh32x64 x (AND (MOVDconst [31]) y))
 41062  	// cond:
 41063  	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
 41064  	for {
 41065  		_ = v.Args[1]
 41066  		x := v.Args[0]
 41067  		v_1 := v.Args[1]
 41068  		if v_1.Op != OpPPC64AND {
 41069  			break
 41070  		}
 41071  		_ = v_1.Args[1]
 41072  		v_1_0 := v_1.Args[0]
 41073  		if v_1_0.Op != OpPPC64MOVDconst {
 41074  			break
 41075  		}
 41076  		if v_1_0.AuxInt != 31 {
 41077  			break
 41078  		}
 41079  		y := v_1.Args[1]
 41080  		v.reset(OpPPC64SRAW)
 41081  		v.AddArg(x)
 41082  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
 41083  		v0.AuxInt = 31
 41084  		v0.AddArg(y)
 41085  		v.AddArg(v0)
 41086  		return true
 41087  	}
 41088  	// match: (Rsh32x64 x (ANDconst <typ.UInt> [31] y))
 41089  	// cond:
 41090  	// result: (SRAW x (ANDconst <typ.UInt> [31] y))
 41091  	for {
 41092  		_ = v.Args[1]
 41093  		x := v.Args[0]
 41094  		v_1 := v.Args[1]
 41095  		if v_1.Op != OpPPC64ANDconst {
 41096  			break
 41097  		}
 41098  		if v_1.Type != typ.UInt {
 41099  			break
 41100  		}
 41101  		if v_1.AuxInt != 31 {
 41102  			break
 41103  		}
 41104  		y := v_1.Args[0]
 41105  		v.reset(OpPPC64SRAW)
 41106  		v.AddArg(x)
 41107  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41108  		v0.AuxInt = 31
 41109  		v0.AddArg(y)
 41110  		v.AddArg(v0)
 41111  		return true
 41112  	}
 41113  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 41114  	// cond:
 41115  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 41116  	for {
 41117  		_ = v.Args[1]
 41118  		x := v.Args[0]
 41119  		v_1 := v.Args[1]
 41120  		if v_1.Op != OpPPC64SUB {
 41121  			break
 41122  		}
 41123  		if v_1.Type != typ.UInt {
 41124  			break
 41125  		}
 41126  		_ = v_1.Args[1]
 41127  		v_1_0 := v_1.Args[0]
 41128  		if v_1_0.Op != OpPPC64MOVDconst {
 41129  			break
 41130  		}
 41131  		if v_1_0.AuxInt != 32 {
 41132  			break
 41133  		}
 41134  		v_1_1 := v_1.Args[1]
 41135  		if v_1_1.Op != OpPPC64ANDconst {
 41136  			break
 41137  		}
 41138  		if v_1_1.Type != typ.UInt {
 41139  			break
 41140  		}
 41141  		if v_1_1.AuxInt != 31 {
 41142  			break
 41143  		}
 41144  		y := v_1_1.Args[0]
 41145  		v.reset(OpPPC64SRAW)
 41146  		v.AddArg(x)
 41147  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41148  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41149  		v1.AuxInt = 32
 41150  		v0.AddArg(v1)
 41151  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41152  		v2.AuxInt = 31
 41153  		v2.AddArg(y)
 41154  		v0.AddArg(v2)
 41155  		v.AddArg(v0)
 41156  		return true
 41157  	}
 41158  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
 41159  	// cond:
 41160  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 41161  	for {
 41162  		_ = v.Args[1]
 41163  		x := v.Args[0]
 41164  		v_1 := v.Args[1]
 41165  		if v_1.Op != OpPPC64SUB {
 41166  			break
 41167  		}
 41168  		if v_1.Type != typ.UInt {
 41169  			break
 41170  		}
 41171  		_ = v_1.Args[1]
 41172  		v_1_0 := v_1.Args[0]
 41173  		if v_1_0.Op != OpPPC64MOVDconst {
 41174  			break
 41175  		}
 41176  		if v_1_0.AuxInt != 32 {
 41177  			break
 41178  		}
 41179  		v_1_1 := v_1.Args[1]
 41180  		if v_1_1.Op != OpPPC64AND {
 41181  			break
 41182  		}
 41183  		if v_1_1.Type != typ.UInt {
 41184  			break
 41185  		}
 41186  		_ = v_1_1.Args[1]
 41187  		y := v_1_1.Args[0]
 41188  		v_1_1_1 := v_1_1.Args[1]
 41189  		if v_1_1_1.Op != OpPPC64MOVDconst {
 41190  			break
 41191  		}
 41192  		if v_1_1_1.AuxInt != 31 {
 41193  			break
 41194  		}
 41195  		v.reset(OpPPC64SRAW)
 41196  		v.AddArg(x)
 41197  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41198  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41199  		v1.AuxInt = 32
 41200  		v0.AddArg(v1)
 41201  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41202  		v2.AuxInt = 31
 41203  		v2.AddArg(y)
 41204  		v0.AddArg(v2)
 41205  		v.AddArg(v0)
 41206  		return true
 41207  	}
 41208  	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
 41209  	// cond:
 41210  	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
 41211  	for {
 41212  		_ = v.Args[1]
 41213  		x := v.Args[0]
 41214  		v_1 := v.Args[1]
 41215  		if v_1.Op != OpPPC64SUB {
 41216  			break
 41217  		}
 41218  		if v_1.Type != typ.UInt {
 41219  			break
 41220  		}
 41221  		_ = v_1.Args[1]
 41222  		v_1_0 := v_1.Args[0]
 41223  		if v_1_0.Op != OpPPC64MOVDconst {
 41224  			break
 41225  		}
 41226  		if v_1_0.AuxInt != 32 {
 41227  			break
 41228  		}
 41229  		v_1_1 := v_1.Args[1]
 41230  		if v_1_1.Op != OpPPC64AND {
 41231  			break
 41232  		}
 41233  		if v_1_1.Type != typ.UInt {
 41234  			break
 41235  		}
 41236  		_ = v_1_1.Args[1]
 41237  		v_1_1_0 := v_1_1.Args[0]
 41238  		if v_1_1_0.Op != OpPPC64MOVDconst {
 41239  			break
 41240  		}
 41241  		if v_1_1_0.AuxInt != 31 {
 41242  			break
 41243  		}
 41244  		y := v_1_1.Args[1]
 41245  		v.reset(OpPPC64SRAW)
 41246  		v.AddArg(x)
 41247  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41248  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41249  		v1.AuxInt = 32
 41250  		v0.AddArg(v1)
 41251  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41252  		v2.AuxInt = 31
 41253  		v2.AddArg(y)
 41254  		v0.AddArg(v2)
 41255  		v.AddArg(v0)
 41256  		return true
 41257  	}
 41258  	// match: (Rsh32x64 x y)
 41259  	// cond:
 41260  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
 41261  	for {
 41262  		_ = v.Args[1]
 41263  		x := v.Args[0]
 41264  		y := v.Args[1]
 41265  		v.reset(OpPPC64SRAW)
 41266  		v.AddArg(x)
 41267  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41268  		v0.AddArg(y)
 41269  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41270  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41271  		v2.AuxInt = -32
 41272  		v2.AddArg(y)
 41273  		v1.AddArg(v2)
 41274  		v0.AddArg(v1)
 41275  		v.AddArg(v0)
 41276  		return true
 41277  	}
 41278  }
 41279  func rewriteValuePPC64_OpRsh32x8_0(v *Value) bool {
 41280  	b := v.Block
 41281  	_ = b
 41282  	typ := &b.Func.Config.Types
 41283  	_ = typ
 41284  	// match: (Rsh32x8 x y)
 41285  	// cond:
 41286  	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
 41287  	for {
 41288  		_ = v.Args[1]
 41289  		x := v.Args[0]
 41290  		y := v.Args[1]
 41291  		v.reset(OpPPC64SRAW)
 41292  		v.AddArg(x)
 41293  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41294  		v0.AddArg(y)
 41295  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41296  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41297  		v2.AuxInt = -32
 41298  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 41299  		v3.AddArg(y)
 41300  		v2.AddArg(v3)
 41301  		v1.AddArg(v2)
 41302  		v0.AddArg(v1)
 41303  		v.AddArg(v0)
 41304  		return true
 41305  	}
 41306  }
 41307  func rewriteValuePPC64_OpRsh64Ux16_0(v *Value) bool {
 41308  	b := v.Block
 41309  	_ = b
 41310  	typ := &b.Func.Config.Types
 41311  	_ = typ
 41312  	// match: (Rsh64Ux16 x y)
 41313  	// cond:
 41314  	// result: (SRD x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 41315  	for {
 41316  		_ = v.Args[1]
 41317  		x := v.Args[0]
 41318  		y := v.Args[1]
 41319  		v.reset(OpPPC64SRD)
 41320  		v.AddArg(x)
 41321  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41322  		v0.AddArg(y)
 41323  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41324  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41325  		v2.AuxInt = -64
 41326  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 41327  		v3.AddArg(y)
 41328  		v2.AddArg(v3)
 41329  		v1.AddArg(v2)
 41330  		v0.AddArg(v1)
 41331  		v.AddArg(v0)
 41332  		return true
 41333  	}
 41334  }
 41335  func rewriteValuePPC64_OpRsh64Ux32_0(v *Value) bool {
 41336  	b := v.Block
 41337  	_ = b
 41338  	typ := &b.Func.Config.Types
 41339  	_ = typ
 41340  	// match: (Rsh64Ux32 x (Const64 [c]))
 41341  	// cond: uint32(c) < 64
 41342  	// result: (SRDconst x [c])
 41343  	for {
 41344  		_ = v.Args[1]
 41345  		x := v.Args[0]
 41346  		v_1 := v.Args[1]
 41347  		if v_1.Op != OpConst64 {
 41348  			break
 41349  		}
 41350  		c := v_1.AuxInt
 41351  		if !(uint32(c) < 64) {
 41352  			break
 41353  		}
 41354  		v.reset(OpPPC64SRDconst)
 41355  		v.AuxInt = c
 41356  		v.AddArg(x)
 41357  		return true
 41358  	}
 41359  	// match: (Rsh64Ux32 x (MOVDconst [c]))
 41360  	// cond: uint32(c) < 64
 41361  	// result: (SRDconst x [c])
 41362  	for {
 41363  		_ = v.Args[1]
 41364  		x := v.Args[0]
 41365  		v_1 := v.Args[1]
 41366  		if v_1.Op != OpPPC64MOVDconst {
 41367  			break
 41368  		}
 41369  		c := v_1.AuxInt
 41370  		if !(uint32(c) < 64) {
 41371  			break
 41372  		}
 41373  		v.reset(OpPPC64SRDconst)
 41374  		v.AuxInt = c
 41375  		v.AddArg(x)
 41376  		return true
 41377  	}
 41378  	// match: (Rsh64Ux32 x y)
 41379  	// cond:
 41380  	// result: (SRD x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 41381  	for {
 41382  		_ = v.Args[1]
 41383  		x := v.Args[0]
 41384  		y := v.Args[1]
 41385  		v.reset(OpPPC64SRD)
 41386  		v.AddArg(x)
 41387  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41388  		v0.AddArg(y)
 41389  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41390  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41391  		v2.AuxInt = -64
 41392  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 41393  		v3.AddArg(y)
 41394  		v2.AddArg(v3)
 41395  		v1.AddArg(v2)
 41396  		v0.AddArg(v1)
 41397  		v.AddArg(v0)
 41398  		return true
 41399  	}
 41400  }
 41401  func rewriteValuePPC64_OpRsh64Ux64_0(v *Value) bool {
 41402  	b := v.Block
 41403  	_ = b
 41404  	typ := &b.Func.Config.Types
 41405  	_ = typ
 41406  	// match: (Rsh64Ux64 x (Const64 [c]))
 41407  	// cond: uint64(c) < 64
 41408  	// result: (SRDconst x [c])
 41409  	for {
 41410  		_ = v.Args[1]
 41411  		x := v.Args[0]
 41412  		v_1 := v.Args[1]
 41413  		if v_1.Op != OpConst64 {
 41414  			break
 41415  		}
 41416  		c := v_1.AuxInt
 41417  		if !(uint64(c) < 64) {
 41418  			break
 41419  		}
 41420  		v.reset(OpPPC64SRDconst)
 41421  		v.AuxInt = c
 41422  		v.AddArg(x)
 41423  		return true
 41424  	}
 41425  	// match: (Rsh64Ux64 _ (Const64 [c]))
 41426  	// cond: uint64(c) >= 64
 41427  	// result: (MOVDconst [0])
 41428  	for {
 41429  		_ = v.Args[1]
 41430  		v_1 := v.Args[1]
 41431  		if v_1.Op != OpConst64 {
 41432  			break
 41433  		}
 41434  		c := v_1.AuxInt
 41435  		if !(uint64(c) >= 64) {
 41436  			break
 41437  		}
 41438  		v.reset(OpPPC64MOVDconst)
 41439  		v.AuxInt = 0
 41440  		return true
 41441  	}
 41442  	// match: (Rsh64Ux64 x (MOVDconst [c]))
 41443  	// cond: uint64(c) < 64
 41444  	// result: (SRDconst x [c])
 41445  	for {
 41446  		_ = v.Args[1]
 41447  		x := v.Args[0]
 41448  		v_1 := v.Args[1]
 41449  		if v_1.Op != OpPPC64MOVDconst {
 41450  			break
 41451  		}
 41452  		c := v_1.AuxInt
 41453  		if !(uint64(c) < 64) {
 41454  			break
 41455  		}
 41456  		v.reset(OpPPC64SRDconst)
 41457  		v.AuxInt = c
 41458  		v.AddArg(x)
 41459  		return true
 41460  	}
 41461  	// match: (Rsh64Ux64 x (AND y (MOVDconst [63])))
 41462  	// cond:
 41463  	// result: (SRD x (ANDconst <typ.Int64> [63] y))
 41464  	for {
 41465  		_ = v.Args[1]
 41466  		x := v.Args[0]
 41467  		v_1 := v.Args[1]
 41468  		if v_1.Op != OpPPC64AND {
 41469  			break
 41470  		}
 41471  		_ = v_1.Args[1]
 41472  		y := v_1.Args[0]
 41473  		v_1_1 := v_1.Args[1]
 41474  		if v_1_1.Op != OpPPC64MOVDconst {
 41475  			break
 41476  		}
 41477  		if v_1_1.AuxInt != 63 {
 41478  			break
 41479  		}
 41480  		v.reset(OpPPC64SRD)
 41481  		v.AddArg(x)
 41482  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 41483  		v0.AuxInt = 63
 41484  		v0.AddArg(y)
 41485  		v.AddArg(v0)
 41486  		return true
 41487  	}
 41488  	// match: (Rsh64Ux64 x (AND (MOVDconst [63]) y))
 41489  	// cond:
 41490  	// result: (SRD x (ANDconst <typ.Int64> [63] y))
 41491  	for {
 41492  		_ = v.Args[1]
 41493  		x := v.Args[0]
 41494  		v_1 := v.Args[1]
 41495  		if v_1.Op != OpPPC64AND {
 41496  			break
 41497  		}
 41498  		_ = v_1.Args[1]
 41499  		v_1_0 := v_1.Args[0]
 41500  		if v_1_0.Op != OpPPC64MOVDconst {
 41501  			break
 41502  		}
 41503  		if v_1_0.AuxInt != 63 {
 41504  			break
 41505  		}
 41506  		y := v_1.Args[1]
 41507  		v.reset(OpPPC64SRD)
 41508  		v.AddArg(x)
 41509  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 41510  		v0.AuxInt = 63
 41511  		v0.AddArg(y)
 41512  		v.AddArg(v0)
 41513  		return true
 41514  	}
 41515  	// match: (Rsh64Ux64 x (ANDconst <typ.UInt> [63] y))
 41516  	// cond:
 41517  	// result: (SRD x (ANDconst <typ.UInt> [63] y))
 41518  	for {
 41519  		_ = v.Args[1]
 41520  		x := v.Args[0]
 41521  		v_1 := v.Args[1]
 41522  		if v_1.Op != OpPPC64ANDconst {
 41523  			break
 41524  		}
 41525  		if v_1.Type != typ.UInt {
 41526  			break
 41527  		}
 41528  		if v_1.AuxInt != 63 {
 41529  			break
 41530  		}
 41531  		y := v_1.Args[0]
 41532  		v.reset(OpPPC64SRD)
 41533  		v.AddArg(x)
 41534  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41535  		v0.AuxInt = 63
 41536  		v0.AddArg(y)
 41537  		v.AddArg(v0)
 41538  		return true
 41539  	}
 41540  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41541  	// cond:
 41542  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41543  	for {
 41544  		_ = v.Args[1]
 41545  		x := v.Args[0]
 41546  		v_1 := v.Args[1]
 41547  		if v_1.Op != OpPPC64SUB {
 41548  			break
 41549  		}
 41550  		if v_1.Type != typ.UInt {
 41551  			break
 41552  		}
 41553  		_ = v_1.Args[1]
 41554  		v_1_0 := v_1.Args[0]
 41555  		if v_1_0.Op != OpPPC64MOVDconst {
 41556  			break
 41557  		}
 41558  		if v_1_0.AuxInt != 64 {
 41559  			break
 41560  		}
 41561  		v_1_1 := v_1.Args[1]
 41562  		if v_1_1.Op != OpPPC64ANDconst {
 41563  			break
 41564  		}
 41565  		if v_1_1.Type != typ.UInt {
 41566  			break
 41567  		}
 41568  		if v_1_1.AuxInt != 63 {
 41569  			break
 41570  		}
 41571  		y := v_1_1.Args[0]
 41572  		v.reset(OpPPC64SRD)
 41573  		v.AddArg(x)
 41574  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41575  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41576  		v1.AuxInt = 64
 41577  		v0.AddArg(v1)
 41578  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41579  		v2.AuxInt = 63
 41580  		v2.AddArg(y)
 41581  		v0.AddArg(v2)
 41582  		v.AddArg(v0)
 41583  		return true
 41584  	}
 41585  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 41586  	// cond:
 41587  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41588  	for {
 41589  		_ = v.Args[1]
 41590  		x := v.Args[0]
 41591  		v_1 := v.Args[1]
 41592  		if v_1.Op != OpPPC64SUB {
 41593  			break
 41594  		}
 41595  		if v_1.Type != typ.UInt {
 41596  			break
 41597  		}
 41598  		_ = v_1.Args[1]
 41599  		v_1_0 := v_1.Args[0]
 41600  		if v_1_0.Op != OpPPC64MOVDconst {
 41601  			break
 41602  		}
 41603  		if v_1_0.AuxInt != 64 {
 41604  			break
 41605  		}
 41606  		v_1_1 := v_1.Args[1]
 41607  		if v_1_1.Op != OpPPC64AND {
 41608  			break
 41609  		}
 41610  		if v_1_1.Type != typ.UInt {
 41611  			break
 41612  		}
 41613  		_ = v_1_1.Args[1]
 41614  		y := v_1_1.Args[0]
 41615  		v_1_1_1 := v_1_1.Args[1]
 41616  		if v_1_1_1.Op != OpPPC64MOVDconst {
 41617  			break
 41618  		}
 41619  		if v_1_1_1.AuxInt != 63 {
 41620  			break
 41621  		}
 41622  		v.reset(OpPPC64SRD)
 41623  		v.AddArg(x)
 41624  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41625  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41626  		v1.AuxInt = 64
 41627  		v0.AddArg(v1)
 41628  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41629  		v2.AuxInt = 63
 41630  		v2.AddArg(y)
 41631  		v0.AddArg(v2)
 41632  		v.AddArg(v0)
 41633  		return true
 41634  	}
 41635  	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 41636  	// cond:
 41637  	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41638  	for {
 41639  		_ = v.Args[1]
 41640  		x := v.Args[0]
 41641  		v_1 := v.Args[1]
 41642  		if v_1.Op != OpPPC64SUB {
 41643  			break
 41644  		}
 41645  		if v_1.Type != typ.UInt {
 41646  			break
 41647  		}
 41648  		_ = v_1.Args[1]
 41649  		v_1_0 := v_1.Args[0]
 41650  		if v_1_0.Op != OpPPC64MOVDconst {
 41651  			break
 41652  		}
 41653  		if v_1_0.AuxInt != 64 {
 41654  			break
 41655  		}
 41656  		v_1_1 := v_1.Args[1]
 41657  		if v_1_1.Op != OpPPC64AND {
 41658  			break
 41659  		}
 41660  		if v_1_1.Type != typ.UInt {
 41661  			break
 41662  		}
 41663  		_ = v_1_1.Args[1]
 41664  		v_1_1_0 := v_1_1.Args[0]
 41665  		if v_1_1_0.Op != OpPPC64MOVDconst {
 41666  			break
 41667  		}
 41668  		if v_1_1_0.AuxInt != 63 {
 41669  			break
 41670  		}
 41671  		y := v_1_1.Args[1]
 41672  		v.reset(OpPPC64SRD)
 41673  		v.AddArg(x)
 41674  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 41675  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 41676  		v1.AuxInt = 64
 41677  		v0.AddArg(v1)
 41678  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41679  		v2.AuxInt = 63
 41680  		v2.AddArg(y)
 41681  		v0.AddArg(v2)
 41682  		v.AddArg(v0)
 41683  		return true
 41684  	}
 41685  	// match: (Rsh64Ux64 x y)
 41686  	// cond:
 41687  	// result: (SRD  x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 41688  	for {
 41689  		_ = v.Args[1]
 41690  		x := v.Args[0]
 41691  		y := v.Args[1]
 41692  		v.reset(OpPPC64SRD)
 41693  		v.AddArg(x)
 41694  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41695  		v0.AddArg(y)
 41696  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41697  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41698  		v2.AuxInt = -64
 41699  		v2.AddArg(y)
 41700  		v1.AddArg(v2)
 41701  		v0.AddArg(v1)
 41702  		v.AddArg(v0)
 41703  		return true
 41704  	}
 41705  }
 41706  func rewriteValuePPC64_OpRsh64Ux8_0(v *Value) bool {
 41707  	b := v.Block
 41708  	_ = b
 41709  	typ := &b.Func.Config.Types
 41710  	_ = typ
 41711  	// match: (Rsh64Ux8 x y)
 41712  	// cond:
 41713  	// result: (SRD x  (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 41714  	for {
 41715  		_ = v.Args[1]
 41716  		x := v.Args[0]
 41717  		y := v.Args[1]
 41718  		v.reset(OpPPC64SRD)
 41719  		v.AddArg(x)
 41720  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41721  		v0.AddArg(y)
 41722  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41723  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41724  		v2.AuxInt = -64
 41725  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 41726  		v3.AddArg(y)
 41727  		v2.AddArg(v3)
 41728  		v1.AddArg(v2)
 41729  		v0.AddArg(v1)
 41730  		v.AddArg(v0)
 41731  		return true
 41732  	}
 41733  }
 41734  func rewriteValuePPC64_OpRsh64x16_0(v *Value) bool {
 41735  	b := v.Block
 41736  	_ = b
 41737  	typ := &b.Func.Config.Types
 41738  	_ = typ
 41739  	// match: (Rsh64x16 x y)
 41740  	// cond:
 41741  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
 41742  	for {
 41743  		_ = v.Args[1]
 41744  		x := v.Args[0]
 41745  		y := v.Args[1]
 41746  		v.reset(OpPPC64SRAD)
 41747  		v.AddArg(x)
 41748  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41749  		v0.AddArg(y)
 41750  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41751  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41752  		v2.AuxInt = -64
 41753  		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 41754  		v3.AddArg(y)
 41755  		v2.AddArg(v3)
 41756  		v1.AddArg(v2)
 41757  		v0.AddArg(v1)
 41758  		v.AddArg(v0)
 41759  		return true
 41760  	}
 41761  }
 41762  func rewriteValuePPC64_OpRsh64x32_0(v *Value) bool {
 41763  	b := v.Block
 41764  	_ = b
 41765  	typ := &b.Func.Config.Types
 41766  	_ = typ
 41767  	// match: (Rsh64x32 x (Const64 [c]))
 41768  	// cond: uint32(c) < 64
 41769  	// result: (SRADconst x [c])
 41770  	for {
 41771  		_ = v.Args[1]
 41772  		x := v.Args[0]
 41773  		v_1 := v.Args[1]
 41774  		if v_1.Op != OpConst64 {
 41775  			break
 41776  		}
 41777  		c := v_1.AuxInt
 41778  		if !(uint32(c) < 64) {
 41779  			break
 41780  		}
 41781  		v.reset(OpPPC64SRADconst)
 41782  		v.AuxInt = c
 41783  		v.AddArg(x)
 41784  		return true
 41785  	}
 41786  	// match: (Rsh64x32 x (MOVDconst [c]))
 41787  	// cond: uint32(c) < 64
 41788  	// result: (SRADconst x [c])
 41789  	for {
 41790  		_ = v.Args[1]
 41791  		x := v.Args[0]
 41792  		v_1 := v.Args[1]
 41793  		if v_1.Op != OpPPC64MOVDconst {
 41794  			break
 41795  		}
 41796  		c := v_1.AuxInt
 41797  		if !(uint32(c) < 64) {
 41798  			break
 41799  		}
 41800  		v.reset(OpPPC64SRADconst)
 41801  		v.AuxInt = c
 41802  		v.AddArg(x)
 41803  		return true
 41804  	}
 41805  	// match: (Rsh64x32 x y)
 41806  	// cond:
 41807  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
 41808  	for {
 41809  		_ = v.Args[1]
 41810  		x := v.Args[0]
 41811  		y := v.Args[1]
 41812  		v.reset(OpPPC64SRAD)
 41813  		v.AddArg(x)
 41814  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 41815  		v0.AddArg(y)
 41816  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 41817  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 41818  		v2.AuxInt = -64
 41819  		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 41820  		v3.AddArg(y)
 41821  		v2.AddArg(v3)
 41822  		v1.AddArg(v2)
 41823  		v0.AddArg(v1)
 41824  		v.AddArg(v0)
 41825  		return true
 41826  	}
 41827  }
 41828  func rewriteValuePPC64_OpRsh64x64_0(v *Value) bool {
 41829  	b := v.Block
 41830  	_ = b
 41831  	typ := &b.Func.Config.Types
 41832  	_ = typ
 41833  	// match: (Rsh64x64 x (Const64 [c]))
 41834  	// cond: uint64(c) < 64
 41835  	// result: (SRADconst x [c])
 41836  	for {
 41837  		_ = v.Args[1]
 41838  		x := v.Args[0]
 41839  		v_1 := v.Args[1]
 41840  		if v_1.Op != OpConst64 {
 41841  			break
 41842  		}
 41843  		c := v_1.AuxInt
 41844  		if !(uint64(c) < 64) {
 41845  			break
 41846  		}
 41847  		v.reset(OpPPC64SRADconst)
 41848  		v.AuxInt = c
 41849  		v.AddArg(x)
 41850  		return true
 41851  	}
 41852  	// match: (Rsh64x64 x (Const64 [c]))
 41853  	// cond: uint64(c) >= 64
 41854  	// result: (SRADconst x [63])
 41855  	for {
 41856  		_ = v.Args[1]
 41857  		x := v.Args[0]
 41858  		v_1 := v.Args[1]
 41859  		if v_1.Op != OpConst64 {
 41860  			break
 41861  		}
 41862  		c := v_1.AuxInt
 41863  		if !(uint64(c) >= 64) {
 41864  			break
 41865  		}
 41866  		v.reset(OpPPC64SRADconst)
 41867  		v.AuxInt = 63
 41868  		v.AddArg(x)
 41869  		return true
 41870  	}
 41871  	// match: (Rsh64x64 x (MOVDconst [c]))
 41872  	// cond: uint64(c) < 64
 41873  	// result: (SRADconst x [c])
 41874  	for {
 41875  		_ = v.Args[1]
 41876  		x := v.Args[0]
 41877  		v_1 := v.Args[1]
 41878  		if v_1.Op != OpPPC64MOVDconst {
 41879  			break
 41880  		}
 41881  		c := v_1.AuxInt
 41882  		if !(uint64(c) < 64) {
 41883  			break
 41884  		}
 41885  		v.reset(OpPPC64SRADconst)
 41886  		v.AuxInt = c
 41887  		v.AddArg(x)
 41888  		return true
 41889  	}
 41890  	// match: (Rsh64x64 x (AND y (MOVDconst [63])))
 41891  	// cond:
 41892  	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 41893  	for {
 41894  		_ = v.Args[1]
 41895  		x := v.Args[0]
 41896  		v_1 := v.Args[1]
 41897  		if v_1.Op != OpPPC64AND {
 41898  			break
 41899  		}
 41900  		_ = v_1.Args[1]
 41901  		y := v_1.Args[0]
 41902  		v_1_1 := v_1.Args[1]
 41903  		if v_1_1.Op != OpPPC64MOVDconst {
 41904  			break
 41905  		}
 41906  		if v_1_1.AuxInt != 63 {
 41907  			break
 41908  		}
 41909  		v.reset(OpPPC64SRAD)
 41910  		v.AddArg(x)
 41911  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 41912  		v0.AuxInt = 63
 41913  		v0.AddArg(y)
 41914  		v.AddArg(v0)
 41915  		return true
 41916  	}
 41917  	// match: (Rsh64x64 x (AND (MOVDconst [63]) y))
 41918  	// cond:
 41919  	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
 41920  	for {
 41921  		_ = v.Args[1]
 41922  		x := v.Args[0]
 41923  		v_1 := v.Args[1]
 41924  		if v_1.Op != OpPPC64AND {
 41925  			break
 41926  		}
 41927  		_ = v_1.Args[1]
 41928  		v_1_0 := v_1.Args[0]
 41929  		if v_1_0.Op != OpPPC64MOVDconst {
 41930  			break
 41931  		}
 41932  		if v_1_0.AuxInt != 63 {
 41933  			break
 41934  		}
 41935  		y := v_1.Args[1]
 41936  		v.reset(OpPPC64SRAD)
 41937  		v.AddArg(x)
 41938  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
 41939  		v0.AuxInt = 63
 41940  		v0.AddArg(y)
 41941  		v.AddArg(v0)
 41942  		return true
 41943  	}
 41944  	// match: (Rsh64x64 x (ANDconst <typ.UInt> [63] y))
 41945  	// cond:
 41946  	// result: (SRAD x (ANDconst <typ.UInt> [63] y))
 41947  	for {
 41948  		_ = v.Args[1]
 41949  		x := v.Args[0]
 41950  		v_1 := v.Args[1]
 41951  		if v_1.Op != OpPPC64ANDconst {
 41952  			break
 41953  		}
 41954  		if v_1.Type != typ.UInt {
 41955  			break
 41956  		}
 41957  		if v_1.AuxInt != 63 {
 41958  			break
 41959  		}
 41960  		y := v_1.Args[0]
 41961  		v.reset(OpPPC64SRAD)
 41962  		v.AddArg(x)
 41963  		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 41964  		v0.AuxInt = 63
 41965  		v0.AddArg(y)
 41966  		v.AddArg(v0)
 41967  		return true
 41968  	}
 41969  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41970  	// cond:
 41971  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 41972  	for {
 41973  		_ = v.Args[1]
 41974  		x := v.Args[0]
 41975  		v_1 := v.Args[1]
 41976  		if v_1.Op != OpPPC64SUB {
 41977  			break
 41978  		}
 41979  		if v_1.Type != typ.UInt {
 41980  			break
 41981  		}
 41982  		_ = v_1.Args[1]
 41983  		v_1_0 := v_1.Args[0]
 41984  		if v_1_0.Op != OpPPC64MOVDconst {
 41985  			break
 41986  		}
 41987  		if v_1_0.AuxInt != 64 {
 41988  			break
 41989  		}
 41990  		v_1_1 := v_1.Args[1]
 41991  		if v_1_1.Op != OpPPC64ANDconst {
 41992  			break
 41993  		}
 41994  		if v_1_1.Type != typ.UInt {
 41995  			break
 41996  		}
 41997  		if v_1_1.AuxInt != 63 {
 41998  			break
 41999  		}
 42000  		y := v_1_1.Args[0]
 42001  		v.reset(OpPPC64SRAD)
 42002  		v.AddArg(x)
 42003  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 42004  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 42005  		v1.AuxInt = 64
 42006  		v0.AddArg(v1)
 42007  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 42008  		v2.AuxInt = 63
 42009  		v2.AddArg(y)
 42010  		v0.AddArg(v2)
 42011  		v.AddArg(v0)
 42012  		return true
 42013  	}
 42014  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
 42015  	// cond:
 42016  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 42017  	for {
 42018  		_ = v.Args[1]
 42019  		x := v.Args[0]
 42020  		v_1 := v.Args[1]
 42021  		if v_1.Op != OpPPC64SUB {
 42022  			break
 42023  		}
 42024  		if v_1.Type != typ.UInt {
 42025  			break
 42026  		}
 42027  		_ = v_1.Args[1]
 42028  		v_1_0 := v_1.Args[0]
 42029  		if v_1_0.Op != OpPPC64MOVDconst {
 42030  			break
 42031  		}
 42032  		if v_1_0.AuxInt != 64 {
 42033  			break
 42034  		}
 42035  		v_1_1 := v_1.Args[1]
 42036  		if v_1_1.Op != OpPPC64AND {
 42037  			break
 42038  		}
 42039  		if v_1_1.Type != typ.UInt {
 42040  			break
 42041  		}
 42042  		_ = v_1_1.Args[1]
 42043  		y := v_1_1.Args[0]
 42044  		v_1_1_1 := v_1_1.Args[1]
 42045  		if v_1_1_1.Op != OpPPC64MOVDconst {
 42046  			break
 42047  		}
 42048  		if v_1_1_1.AuxInt != 63 {
 42049  			break
 42050  		}
 42051  		v.reset(OpPPC64SRAD)
 42052  		v.AddArg(x)
 42053  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 42054  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 42055  		v1.AuxInt = 64
 42056  		v0.AddArg(v1)
 42057  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 42058  		v2.AuxInt = 63
 42059  		v2.AddArg(y)
 42060  		v0.AddArg(v2)
 42061  		v.AddArg(v0)
 42062  		return true
 42063  	}
 42064  	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
 42065  	// cond:
 42066  	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
 42067  	for {
 42068  		_ = v.Args[1]
 42069  		x := v.Args[0]
 42070  		v_1 := v.Args[1]
 42071  		if v_1.Op != OpPPC64SUB {
 42072  			break
 42073  		}
 42074  		if v_1.Type != typ.UInt {
 42075  			break
 42076  		}
 42077  		_ = v_1.Args[1]
 42078  		v_1_0 := v_1.Args[0]
 42079  		if v_1_0.Op != OpPPC64MOVDconst {
 42080  			break
 42081  		}
 42082  		if v_1_0.AuxInt != 64 {
 42083  			break
 42084  		}
 42085  		v_1_1 := v_1.Args[1]
 42086  		if v_1_1.Op != OpPPC64AND {
 42087  			break
 42088  		}
 42089  		if v_1_1.Type != typ.UInt {
 42090  			break
 42091  		}
 42092  		_ = v_1_1.Args[1]
 42093  		v_1_1_0 := v_1_1.Args[0]
 42094  		if v_1_1_0.Op != OpPPC64MOVDconst {
 42095  			break
 42096  		}
 42097  		if v_1_1_0.AuxInt != 63 {
 42098  			break
 42099  		}
 42100  		y := v_1_1.Args[1]
 42101  		v.reset(OpPPC64SRAD)
 42102  		v.AddArg(x)
 42103  		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
 42104  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
 42105  		v1.AuxInt = 64
 42106  		v0.AddArg(v1)
 42107  		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
 42108  		v2.AuxInt = 63
 42109  		v2.AddArg(y)
 42110  		v0.AddArg(v2)
 42111  		v.AddArg(v0)
 42112  		return true
 42113  	}
 42114  	// match: (Rsh64x64 x y)
 42115  	// cond:
 42116  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
 42117  	for {
 42118  		_ = v.Args[1]
 42119  		x := v.Args[0]
 42120  		y := v.Args[1]
 42121  		v.reset(OpPPC64SRAD)
 42122  		v.AddArg(x)
 42123  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42124  		v0.AddArg(y)
 42125  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42126  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42127  		v2.AuxInt = -64
 42128  		v2.AddArg(y)
 42129  		v1.AddArg(v2)
 42130  		v0.AddArg(v1)
 42131  		v.AddArg(v0)
 42132  		return true
 42133  	}
 42134  }
 42135  func rewriteValuePPC64_OpRsh64x8_0(v *Value) bool {
 42136  	b := v.Block
 42137  	_ = b
 42138  	typ := &b.Func.Config.Types
 42139  	_ = typ
 42140  	// match: (Rsh64x8 x y)
 42141  	// cond:
 42142  	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
 42143  	for {
 42144  		_ = v.Args[1]
 42145  		x := v.Args[0]
 42146  		y := v.Args[1]
 42147  		v.reset(OpPPC64SRAD)
 42148  		v.AddArg(x)
 42149  		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42150  		v0.AddArg(y)
 42151  		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42152  		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42153  		v2.AuxInt = -64
 42154  		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 42155  		v3.AddArg(y)
 42156  		v2.AddArg(v3)
 42157  		v1.AddArg(v2)
 42158  		v0.AddArg(v1)
 42159  		v.AddArg(v0)
 42160  		return true
 42161  	}
 42162  }
 42163  func rewriteValuePPC64_OpRsh8Ux16_0(v *Value) bool {
 42164  	b := v.Block
 42165  	_ = b
 42166  	typ := &b.Func.Config.Types
 42167  	_ = typ
 42168  	// match: (Rsh8Ux16 x y)
 42169  	// cond:
 42170  	// result: (SRW  (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 42171  	for {
 42172  		_ = v.Args[1]
 42173  		x := v.Args[0]
 42174  		y := v.Args[1]
 42175  		v.reset(OpPPC64SRW)
 42176  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42177  		v0.AddArg(x)
 42178  		v.AddArg(v0)
 42179  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42180  		v1.AddArg(y)
 42181  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42182  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42183  		v3.AuxInt = -8
 42184  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 42185  		v4.AddArg(y)
 42186  		v3.AddArg(v4)
 42187  		v2.AddArg(v3)
 42188  		v1.AddArg(v2)
 42189  		v.AddArg(v1)
 42190  		return true
 42191  	}
 42192  }
 42193  func rewriteValuePPC64_OpRsh8Ux32_0(v *Value) bool {
 42194  	b := v.Block
 42195  	_ = b
 42196  	typ := &b.Func.Config.Types
 42197  	_ = typ
 42198  	// match: (Rsh8Ux32 x (Const64 [c]))
 42199  	// cond: uint32(c) < 8
 42200  	// result: (SRWconst (ZeroExt8to32  x) [c])
 42201  	for {
 42202  		_ = v.Args[1]
 42203  		x := v.Args[0]
 42204  		v_1 := v.Args[1]
 42205  		if v_1.Op != OpConst64 {
 42206  			break
 42207  		}
 42208  		c := v_1.AuxInt
 42209  		if !(uint32(c) < 8) {
 42210  			break
 42211  		}
 42212  		v.reset(OpPPC64SRWconst)
 42213  		v.AuxInt = c
 42214  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42215  		v0.AddArg(x)
 42216  		v.AddArg(v0)
 42217  		return true
 42218  	}
 42219  	// match: (Rsh8Ux32 x (MOVDconst [c]))
 42220  	// cond: uint32(c) < 8
 42221  	// result: (SRWconst (ZeroExt8to32  x) [c])
 42222  	for {
 42223  		_ = v.Args[1]
 42224  		x := v.Args[0]
 42225  		v_1 := v.Args[1]
 42226  		if v_1.Op != OpPPC64MOVDconst {
 42227  			break
 42228  		}
 42229  		c := v_1.AuxInt
 42230  		if !(uint32(c) < 8) {
 42231  			break
 42232  		}
 42233  		v.reset(OpPPC64SRWconst)
 42234  		v.AuxInt = c
 42235  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42236  		v0.AddArg(x)
 42237  		v.AddArg(v0)
 42238  		return true
 42239  	}
 42240  	// match: (Rsh8Ux32 x y)
 42241  	// cond:
 42242  	// result: (SRW  (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 42243  	for {
 42244  		_ = v.Args[1]
 42245  		x := v.Args[0]
 42246  		y := v.Args[1]
 42247  		v.reset(OpPPC64SRW)
 42248  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42249  		v0.AddArg(x)
 42250  		v.AddArg(v0)
 42251  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42252  		v1.AddArg(y)
 42253  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42254  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42255  		v3.AuxInt = -8
 42256  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 42257  		v4.AddArg(y)
 42258  		v3.AddArg(v4)
 42259  		v2.AddArg(v3)
 42260  		v1.AddArg(v2)
 42261  		v.AddArg(v1)
 42262  		return true
 42263  	}
 42264  }
 42265  func rewriteValuePPC64_OpRsh8Ux64_0(v *Value) bool {
 42266  	b := v.Block
 42267  	_ = b
 42268  	typ := &b.Func.Config.Types
 42269  	_ = typ
 42270  	// match: (Rsh8Ux64 x (Const64 [c]))
 42271  	// cond: uint64(c) < 8
 42272  	// result: (SRWconst (ZeroExt8to32  x) [c])
 42273  	for {
 42274  		_ = v.Args[1]
 42275  		x := v.Args[0]
 42276  		v_1 := v.Args[1]
 42277  		if v_1.Op != OpConst64 {
 42278  			break
 42279  		}
 42280  		c := v_1.AuxInt
 42281  		if !(uint64(c) < 8) {
 42282  			break
 42283  		}
 42284  		v.reset(OpPPC64SRWconst)
 42285  		v.AuxInt = c
 42286  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42287  		v0.AddArg(x)
 42288  		v.AddArg(v0)
 42289  		return true
 42290  	}
 42291  	// match: (Rsh8Ux64 _ (Const64 [c]))
 42292  	// cond: uint64(c) >= 8
 42293  	// result: (MOVDconst [0])
 42294  	for {
 42295  		_ = v.Args[1]
 42296  		v_1 := v.Args[1]
 42297  		if v_1.Op != OpConst64 {
 42298  			break
 42299  		}
 42300  		c := v_1.AuxInt
 42301  		if !(uint64(c) >= 8) {
 42302  			break
 42303  		}
 42304  		v.reset(OpPPC64MOVDconst)
 42305  		v.AuxInt = 0
 42306  		return true
 42307  	}
 42308  	// match: (Rsh8Ux64 x (MOVDconst [c]))
 42309  	// cond: uint64(c) < 8
 42310  	// result: (SRWconst (ZeroExt8to32  x) [c])
 42311  	for {
 42312  		_ = v.Args[1]
 42313  		x := v.Args[0]
 42314  		v_1 := v.Args[1]
 42315  		if v_1.Op != OpPPC64MOVDconst {
 42316  			break
 42317  		}
 42318  		c := v_1.AuxInt
 42319  		if !(uint64(c) < 8) {
 42320  			break
 42321  		}
 42322  		v.reset(OpPPC64SRWconst)
 42323  		v.AuxInt = c
 42324  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42325  		v0.AddArg(x)
 42326  		v.AddArg(v0)
 42327  		return true
 42328  	}
 42329  	// match: (Rsh8Ux64 x y)
 42330  	// cond:
 42331  	// result: (SRW  (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 42332  	for {
 42333  		_ = v.Args[1]
 42334  		x := v.Args[0]
 42335  		y := v.Args[1]
 42336  		v.reset(OpPPC64SRW)
 42337  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42338  		v0.AddArg(x)
 42339  		v.AddArg(v0)
 42340  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42341  		v1.AddArg(y)
 42342  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42343  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42344  		v3.AuxInt = -8
 42345  		v3.AddArg(y)
 42346  		v2.AddArg(v3)
 42347  		v1.AddArg(v2)
 42348  		v.AddArg(v1)
 42349  		return true
 42350  	}
 42351  }
 42352  func rewriteValuePPC64_OpRsh8Ux8_0(v *Value) bool {
 42353  	b := v.Block
 42354  	_ = b
 42355  	typ := &b.Func.Config.Types
 42356  	_ = typ
 42357  	// match: (Rsh8Ux8 x y)
 42358  	// cond:
 42359  	// result: (SRW  (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 42360  	for {
 42361  		_ = v.Args[1]
 42362  		x := v.Args[0]
 42363  		y := v.Args[1]
 42364  		v.reset(OpPPC64SRW)
 42365  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
 42366  		v0.AddArg(x)
 42367  		v.AddArg(v0)
 42368  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42369  		v1.AddArg(y)
 42370  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42371  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42372  		v3.AuxInt = -8
 42373  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 42374  		v4.AddArg(y)
 42375  		v3.AddArg(v4)
 42376  		v2.AddArg(v3)
 42377  		v1.AddArg(v2)
 42378  		v.AddArg(v1)
 42379  		return true
 42380  	}
 42381  }
 42382  func rewriteValuePPC64_OpRsh8x16_0(v *Value) bool {
 42383  	b := v.Block
 42384  	_ = b
 42385  	typ := &b.Func.Config.Types
 42386  	_ = typ
 42387  	// match: (Rsh8x16 x y)
 42388  	// cond:
 42389  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
 42390  	for {
 42391  		_ = v.Args[1]
 42392  		x := v.Args[0]
 42393  		y := v.Args[1]
 42394  		v.reset(OpPPC64SRAW)
 42395  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42396  		v0.AddArg(x)
 42397  		v.AddArg(v0)
 42398  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42399  		v1.AddArg(y)
 42400  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42401  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42402  		v3.AuxInt = -8
 42403  		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
 42404  		v4.AddArg(y)
 42405  		v3.AddArg(v4)
 42406  		v2.AddArg(v3)
 42407  		v1.AddArg(v2)
 42408  		v.AddArg(v1)
 42409  		return true
 42410  	}
 42411  }
 42412  func rewriteValuePPC64_OpRsh8x32_0(v *Value) bool {
 42413  	b := v.Block
 42414  	_ = b
 42415  	typ := &b.Func.Config.Types
 42416  	_ = typ
 42417  	// match: (Rsh8x32 x (Const64 [c]))
 42418  	// cond: uint32(c) < 8
 42419  	// result: (SRAWconst (SignExt8to32  x) [c])
 42420  	for {
 42421  		_ = v.Args[1]
 42422  		x := v.Args[0]
 42423  		v_1 := v.Args[1]
 42424  		if v_1.Op != OpConst64 {
 42425  			break
 42426  		}
 42427  		c := v_1.AuxInt
 42428  		if !(uint32(c) < 8) {
 42429  			break
 42430  		}
 42431  		v.reset(OpPPC64SRAWconst)
 42432  		v.AuxInt = c
 42433  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42434  		v0.AddArg(x)
 42435  		v.AddArg(v0)
 42436  		return true
 42437  	}
 42438  	// match: (Rsh8x32 x (MOVDconst [c]))
 42439  	// cond: uint32(c) < 8
 42440  	// result: (SRAWconst (SignExt8to32  x) [c])
 42441  	for {
 42442  		_ = v.Args[1]
 42443  		x := v.Args[0]
 42444  		v_1 := v.Args[1]
 42445  		if v_1.Op != OpPPC64MOVDconst {
 42446  			break
 42447  		}
 42448  		c := v_1.AuxInt
 42449  		if !(uint32(c) < 8) {
 42450  			break
 42451  		}
 42452  		v.reset(OpPPC64SRAWconst)
 42453  		v.AuxInt = c
 42454  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42455  		v0.AddArg(x)
 42456  		v.AddArg(v0)
 42457  		return true
 42458  	}
 42459  	// match: (Rsh8x32 x y)
 42460  	// cond:
 42461  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
 42462  	for {
 42463  		_ = v.Args[1]
 42464  		x := v.Args[0]
 42465  		y := v.Args[1]
 42466  		v.reset(OpPPC64SRAW)
 42467  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42468  		v0.AddArg(x)
 42469  		v.AddArg(v0)
 42470  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42471  		v1.AddArg(y)
 42472  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42473  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42474  		v3.AuxInt = -8
 42475  		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
 42476  		v4.AddArg(y)
 42477  		v3.AddArg(v4)
 42478  		v2.AddArg(v3)
 42479  		v1.AddArg(v2)
 42480  		v.AddArg(v1)
 42481  		return true
 42482  	}
 42483  }
 42484  func rewriteValuePPC64_OpRsh8x64_0(v *Value) bool {
 42485  	b := v.Block
 42486  	_ = b
 42487  	typ := &b.Func.Config.Types
 42488  	_ = typ
 42489  	// match: (Rsh8x64 x (Const64 [c]))
 42490  	// cond: uint64(c) < 8
 42491  	// result: (SRAWconst (SignExt8to32  x) [c])
 42492  	for {
 42493  		_ = v.Args[1]
 42494  		x := v.Args[0]
 42495  		v_1 := v.Args[1]
 42496  		if v_1.Op != OpConst64 {
 42497  			break
 42498  		}
 42499  		c := v_1.AuxInt
 42500  		if !(uint64(c) < 8) {
 42501  			break
 42502  		}
 42503  		v.reset(OpPPC64SRAWconst)
 42504  		v.AuxInt = c
 42505  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42506  		v0.AddArg(x)
 42507  		v.AddArg(v0)
 42508  		return true
 42509  	}
 42510  	// match: (Rsh8x64 x (Const64 [c]))
 42511  	// cond: uint64(c) >= 8
 42512  	// result: (SRAWconst (SignExt8to32  x) [63])
 42513  	for {
 42514  		_ = v.Args[1]
 42515  		x := v.Args[0]
 42516  		v_1 := v.Args[1]
 42517  		if v_1.Op != OpConst64 {
 42518  			break
 42519  		}
 42520  		c := v_1.AuxInt
 42521  		if !(uint64(c) >= 8) {
 42522  			break
 42523  		}
 42524  		v.reset(OpPPC64SRAWconst)
 42525  		v.AuxInt = 63
 42526  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42527  		v0.AddArg(x)
 42528  		v.AddArg(v0)
 42529  		return true
 42530  	}
 42531  	// match: (Rsh8x64 x (MOVDconst [c]))
 42532  	// cond: uint64(c) < 8
 42533  	// result: (SRAWconst (SignExt8to32  x) [c])
 42534  	for {
 42535  		_ = v.Args[1]
 42536  		x := v.Args[0]
 42537  		v_1 := v.Args[1]
 42538  		if v_1.Op != OpPPC64MOVDconst {
 42539  			break
 42540  		}
 42541  		c := v_1.AuxInt
 42542  		if !(uint64(c) < 8) {
 42543  			break
 42544  		}
 42545  		v.reset(OpPPC64SRAWconst)
 42546  		v.AuxInt = c
 42547  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42548  		v0.AddArg(x)
 42549  		v.AddArg(v0)
 42550  		return true
 42551  	}
 42552  	// match: (Rsh8x64 x y)
 42553  	// cond:
 42554  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
 42555  	for {
 42556  		_ = v.Args[1]
 42557  		x := v.Args[0]
 42558  		y := v.Args[1]
 42559  		v.reset(OpPPC64SRAW)
 42560  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42561  		v0.AddArg(x)
 42562  		v.AddArg(v0)
 42563  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42564  		v1.AddArg(y)
 42565  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42566  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42567  		v3.AuxInt = -8
 42568  		v3.AddArg(y)
 42569  		v2.AddArg(v3)
 42570  		v1.AddArg(v2)
 42571  		v.AddArg(v1)
 42572  		return true
 42573  	}
 42574  }
 42575  func rewriteValuePPC64_OpRsh8x8_0(v *Value) bool {
 42576  	b := v.Block
 42577  	_ = b
 42578  	typ := &b.Func.Config.Types
 42579  	_ = typ
 42580  	// match: (Rsh8x8 x y)
 42581  	// cond:
 42582  	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
 42583  	for {
 42584  		_ = v.Args[1]
 42585  		x := v.Args[0]
 42586  		y := v.Args[1]
 42587  		v.reset(OpPPC64SRAW)
 42588  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
 42589  		v0.AddArg(x)
 42590  		v.AddArg(v0)
 42591  		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
 42592  		v1.AddArg(y)
 42593  		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
 42594  		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
 42595  		v3.AuxInt = -8
 42596  		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
 42597  		v4.AddArg(y)
 42598  		v3.AddArg(v4)
 42599  		v2.AddArg(v3)
 42600  		v1.AddArg(v2)
 42601  		v.AddArg(v1)
 42602  		return true
 42603  	}
 42604  }
 42605  func rewriteValuePPC64_OpSignExt16to32_0(v *Value) bool {
 42606  	// match: (SignExt16to32 x)
 42607  	// cond:
 42608  	// result: (MOVHreg x)
 42609  	for {
 42610  		x := v.Args[0]
 42611  		v.reset(OpPPC64MOVHreg)
 42612  		v.AddArg(x)
 42613  		return true
 42614  	}
 42615  }
 42616  func rewriteValuePPC64_OpSignExt16to64_0(v *Value) bool {
 42617  	// match: (SignExt16to64 x)
 42618  	// cond:
 42619  	// result: (MOVHreg x)
 42620  	for {
 42621  		x := v.Args[0]
 42622  		v.reset(OpPPC64MOVHreg)
 42623  		v.AddArg(x)
 42624  		return true
 42625  	}
 42626  }
 42627  func rewriteValuePPC64_OpSignExt32to64_0(v *Value) bool {
 42628  	// match: (SignExt32to64 x)
 42629  	// cond:
 42630  	// result: (MOVWreg x)
 42631  	for {
 42632  		x := v.Args[0]
 42633  		v.reset(OpPPC64MOVWreg)
 42634  		v.AddArg(x)
 42635  		return true
 42636  	}
 42637  }
 42638  func rewriteValuePPC64_OpSignExt8to16_0(v *Value) bool {
 42639  	// match: (SignExt8to16 x)
 42640  	// cond:
 42641  	// result: (MOVBreg x)
 42642  	for {
 42643  		x := v.Args[0]
 42644  		v.reset(OpPPC64MOVBreg)
 42645  		v.AddArg(x)
 42646  		return true
 42647  	}
 42648  }
 42649  func rewriteValuePPC64_OpSignExt8to32_0(v *Value) bool {
 42650  	// match: (SignExt8to32 x)
 42651  	// cond:
 42652  	// result: (MOVBreg x)
 42653  	for {
 42654  		x := v.Args[0]
 42655  		v.reset(OpPPC64MOVBreg)
 42656  		v.AddArg(x)
 42657  		return true
 42658  	}
 42659  }
 42660  func rewriteValuePPC64_OpSignExt8to64_0(v *Value) bool {
 42661  	// match: (SignExt8to64 x)
 42662  	// cond:
 42663  	// result: (MOVBreg x)
 42664  	for {
 42665  		x := v.Args[0]
 42666  		v.reset(OpPPC64MOVBreg)
 42667  		v.AddArg(x)
 42668  		return true
 42669  	}
 42670  }
 42671  func rewriteValuePPC64_OpSlicemask_0(v *Value) bool {
 42672  	b := v.Block
 42673  	_ = b
 42674  	// match: (Slicemask <t> x)
 42675  	// cond:
 42676  	// result: (SRADconst (NEG <t> x) [63])
 42677  	for {
 42678  		t := v.Type
 42679  		x := v.Args[0]
 42680  		v.reset(OpPPC64SRADconst)
 42681  		v.AuxInt = 63
 42682  		v0 := b.NewValue0(v.Pos, OpPPC64NEG, t)
 42683  		v0.AddArg(x)
 42684  		v.AddArg(v0)
 42685  		return true
 42686  	}
 42687  }
 42688  func rewriteValuePPC64_OpSqrt_0(v *Value) bool {
 42689  	// match: (Sqrt x)
 42690  	// cond:
 42691  	// result: (FSQRT x)
 42692  	for {
 42693  		x := v.Args[0]
 42694  		v.reset(OpPPC64FSQRT)
 42695  		v.AddArg(x)
 42696  		return true
 42697  	}
 42698  }
 42699  func rewriteValuePPC64_OpStaticCall_0(v *Value) bool {
 42700  	// match: (StaticCall [argwid] {target} mem)
 42701  	// cond:
 42702  	// result: (CALLstatic [argwid] {target} mem)
 42703  	for {
 42704  		argwid := v.AuxInt
 42705  		target := v.Aux
 42706  		mem := v.Args[0]
 42707  		v.reset(OpPPC64CALLstatic)
 42708  		v.AuxInt = argwid
 42709  		v.Aux = target
 42710  		v.AddArg(mem)
 42711  		return true
 42712  	}
 42713  }
 42714  func rewriteValuePPC64_OpStore_0(v *Value) bool {
 42715  	// match: (Store {t} ptr val mem)
 42716  	// cond: t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)
 42717  	// result: (FMOVDstore ptr val mem)
 42718  	for {
 42719  		t := v.Aux
 42720  		_ = v.Args[2]
 42721  		ptr := v.Args[0]
 42722  		val := v.Args[1]
 42723  		mem := v.Args[2]
 42724  		if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
 42725  			break
 42726  		}
 42727  		v.reset(OpPPC64FMOVDstore)
 42728  		v.AddArg(ptr)
 42729  		v.AddArg(val)
 42730  		v.AddArg(mem)
 42731  		return true
 42732  	}
 42733  	// match: (Store {t} ptr val mem)
 42734  	// cond: t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)
 42735  	// result: (FMOVDstore ptr val mem)
 42736  	for {
 42737  		t := v.Aux
 42738  		_ = v.Args[2]
 42739  		ptr := v.Args[0]
 42740  		val := v.Args[1]
 42741  		mem := v.Args[2]
 42742  		if !(t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)) {
 42743  			break
 42744  		}
 42745  		v.reset(OpPPC64FMOVDstore)
 42746  		v.AddArg(ptr)
 42747  		v.AddArg(val)
 42748  		v.AddArg(mem)
 42749  		return true
 42750  	}
 42751  	// match: (Store {t} ptr val mem)
 42752  	// cond: t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)
 42753  	// result: (FMOVSstore ptr val mem)
 42754  	for {
 42755  		t := v.Aux
 42756  		_ = v.Args[2]
 42757  		ptr := v.Args[0]
 42758  		val := v.Args[1]
 42759  		mem := v.Args[2]
 42760  		if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
 42761  			break
 42762  		}
 42763  		v.reset(OpPPC64FMOVSstore)
 42764  		v.AddArg(ptr)
 42765  		v.AddArg(val)
 42766  		v.AddArg(mem)
 42767  		return true
 42768  	}
 42769  	// match: (Store {t} ptr val mem)
 42770  	// cond: t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))
 42771  	// result: (MOVDstore ptr val mem)
 42772  	for {
 42773  		t := v.Aux
 42774  		_ = v.Args[2]
 42775  		ptr := v.Args[0]
 42776  		val := v.Args[1]
 42777  		mem := v.Args[2]
 42778  		if !(t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))) {
 42779  			break
 42780  		}
 42781  		v.reset(OpPPC64MOVDstore)
 42782  		v.AddArg(ptr)
 42783  		v.AddArg(val)
 42784  		v.AddArg(mem)
 42785  		return true
 42786  	}
 42787  	// match: (Store {t} ptr val mem)
 42788  	// cond: t.(*types.Type).Size() == 4 && is32BitInt(val.Type)
 42789  	// result: (MOVWstore ptr val mem)
 42790  	for {
 42791  		t := v.Aux
 42792  		_ = v.Args[2]
 42793  		ptr := v.Args[0]
 42794  		val := v.Args[1]
 42795  		mem := v.Args[2]
 42796  		if !(t.(*types.Type).Size() == 4 && is32BitInt(val.Type)) {
 42797  			break
 42798  		}
 42799  		v.reset(OpPPC64MOVWstore)
 42800  		v.AddArg(ptr)
 42801  		v.AddArg(val)
 42802  		v.AddArg(mem)
 42803  		return true
 42804  	}
 42805  	// match: (Store {t} ptr val mem)
 42806  	// cond: t.(*types.Type).Size() == 2
 42807  	// result: (MOVHstore ptr val mem)
 42808  	for {
 42809  		t := v.Aux
 42810  		_ = v.Args[2]
 42811  		ptr := v.Args[0]
 42812  		val := v.Args[1]
 42813  		mem := v.Args[2]
 42814  		if !(t.(*types.Type).Size() == 2) {
 42815  			break
 42816  		}
 42817  		v.reset(OpPPC64MOVHstore)
 42818  		v.AddArg(ptr)
 42819  		v.AddArg(val)
 42820  		v.AddArg(mem)
 42821  		return true
 42822  	}
 42823  	// match: (Store {t} ptr val mem)
 42824  	// cond: t.(*types.Type).Size() == 1
 42825  	// result: (MOVBstore ptr val mem)
 42826  	for {
 42827  		t := v.Aux
 42828  		_ = v.Args[2]
 42829  		ptr := v.Args[0]
 42830  		val := v.Args[1]
 42831  		mem := v.Args[2]
 42832  		if !(t.(*types.Type).Size() == 1) {
 42833  			break
 42834  		}
 42835  		v.reset(OpPPC64MOVBstore)
 42836  		v.AddArg(ptr)
 42837  		v.AddArg(val)
 42838  		v.AddArg(mem)
 42839  		return true
 42840  	}
 42841  	return false
 42842  }
 42843  func rewriteValuePPC64_OpSub16_0(v *Value) bool {
 42844  	// match: (Sub16 x y)
 42845  	// cond:
 42846  	// result: (SUB x y)
 42847  	for {
 42848  		_ = v.Args[1]
 42849  		x := v.Args[0]
 42850  		y := v.Args[1]
 42851  		v.reset(OpPPC64SUB)
 42852  		v.AddArg(x)
 42853  		v.AddArg(y)
 42854  		return true
 42855  	}
 42856  }
 42857  func rewriteValuePPC64_OpSub32_0(v *Value) bool {
 42858  	// match: (Sub32 x y)
 42859  	// cond:
 42860  	// result: (SUB x y)
 42861  	for {
 42862  		_ = v.Args[1]
 42863  		x := v.Args[0]
 42864  		y := v.Args[1]
 42865  		v.reset(OpPPC64SUB)
 42866  		v.AddArg(x)
 42867  		v.AddArg(y)
 42868  		return true
 42869  	}
 42870  }
 42871  func rewriteValuePPC64_OpSub32F_0(v *Value) bool {
 42872  	// match: (Sub32F x y)
 42873  	// cond:
 42874  	// result: (FSUBS x y)
 42875  	for {
 42876  		_ = v.Args[1]
 42877  		x := v.Args[0]
 42878  		y := v.Args[1]
 42879  		v.reset(OpPPC64FSUBS)
 42880  		v.AddArg(x)
 42881  		v.AddArg(y)
 42882  		return true
 42883  	}
 42884  }
 42885  func rewriteValuePPC64_OpSub64_0(v *Value) bool {
 42886  	// match: (Sub64 x y)
 42887  	// cond:
 42888  	// result: (SUB  x y)
 42889  	for {
 42890  		_ = v.Args[1]
 42891  		x := v.Args[0]
 42892  		y := v.Args[1]
 42893  		v.reset(OpPPC64SUB)
 42894  		v.AddArg(x)
 42895  		v.AddArg(y)
 42896  		return true
 42897  	}
 42898  }
 42899  func rewriteValuePPC64_OpSub64F_0(v *Value) bool {
 42900  	// match: (Sub64F x y)
 42901  	// cond:
 42902  	// result: (FSUB x y)
 42903  	for {
 42904  		_ = v.Args[1]
 42905  		x := v.Args[0]
 42906  		y := v.Args[1]
 42907  		v.reset(OpPPC64FSUB)
 42908  		v.AddArg(x)
 42909  		v.AddArg(y)
 42910  		return true
 42911  	}
 42912  }
 42913  func rewriteValuePPC64_OpSub8_0(v *Value) bool {
 42914  	// match: (Sub8 x y)
 42915  	// cond:
 42916  	// result: (SUB x y)
 42917  	for {
 42918  		_ = v.Args[1]
 42919  		x := v.Args[0]
 42920  		y := v.Args[1]
 42921  		v.reset(OpPPC64SUB)
 42922  		v.AddArg(x)
 42923  		v.AddArg(y)
 42924  		return true
 42925  	}
 42926  }
 42927  func rewriteValuePPC64_OpSubPtr_0(v *Value) bool {
 42928  	// match: (SubPtr x y)
 42929  	// cond:
 42930  	// result: (SUB  x y)
 42931  	for {
 42932  		_ = v.Args[1]
 42933  		x := v.Args[0]
 42934  		y := v.Args[1]
 42935  		v.reset(OpPPC64SUB)
 42936  		v.AddArg(x)
 42937  		v.AddArg(y)
 42938  		return true
 42939  	}
 42940  }
 42941  func rewriteValuePPC64_OpTrunc_0(v *Value) bool {
 42942  	// match: (Trunc x)
 42943  	// cond:
 42944  	// result: (FTRUNC x)
 42945  	for {
 42946  		x := v.Args[0]
 42947  		v.reset(OpPPC64FTRUNC)
 42948  		v.AddArg(x)
 42949  		return true
 42950  	}
 42951  }
 42952  func rewriteValuePPC64_OpTrunc16to8_0(v *Value) bool {
 42953  	// match: (Trunc16to8 x)
 42954  	// cond:
 42955  	// result: (MOVBreg x)
 42956  	for {
 42957  		x := v.Args[0]
 42958  		v.reset(OpPPC64MOVBreg)
 42959  		v.AddArg(x)
 42960  		return true
 42961  	}
 42962  }
 42963  func rewriteValuePPC64_OpTrunc32to16_0(v *Value) bool {
 42964  	// match: (Trunc32to16 x)
 42965  	// cond:
 42966  	// result: (MOVHreg x)
 42967  	for {
 42968  		x := v.Args[0]
 42969  		v.reset(OpPPC64MOVHreg)
 42970  		v.AddArg(x)
 42971  		return true
 42972  	}
 42973  }
 42974  func rewriteValuePPC64_OpTrunc32to8_0(v *Value) bool {
 42975  	// match: (Trunc32to8 x)
 42976  	// cond:
 42977  	// result: (MOVBreg x)
 42978  	for {
 42979  		x := v.Args[0]
 42980  		v.reset(OpPPC64MOVBreg)
 42981  		v.AddArg(x)
 42982  		return true
 42983  	}
 42984  }
 42985  func rewriteValuePPC64_OpTrunc64to16_0(v *Value) bool {
 42986  	// match: (Trunc64to16 x)
 42987  	// cond:
 42988  	// result: (MOVHreg x)
 42989  	for {
 42990  		x := v.Args[0]
 42991  		v.reset(OpPPC64MOVHreg)
 42992  		v.AddArg(x)
 42993  		return true
 42994  	}
 42995  }
 42996  func rewriteValuePPC64_OpTrunc64to32_0(v *Value) bool {
 42997  	// match: (Trunc64to32 x)
 42998  	// cond:
 42999  	// result: (MOVWreg x)
 43000  	for {
 43001  		x := v.Args[0]
 43002  		v.reset(OpPPC64MOVWreg)
 43003  		v.AddArg(x)
 43004  		return true
 43005  	}
 43006  }
 43007  func rewriteValuePPC64_OpTrunc64to8_0(v *Value) bool {
 43008  	// match: (Trunc64to8 x)
 43009  	// cond:
 43010  	// result: (MOVBreg x)
 43011  	for {
 43012  		x := v.Args[0]
 43013  		v.reset(OpPPC64MOVBreg)
 43014  		v.AddArg(x)
 43015  		return true
 43016  	}
 43017  }
 43018  func rewriteValuePPC64_OpXor16_0(v *Value) bool {
 43019  	// match: (Xor16 x y)
 43020  	// cond:
 43021  	// result: (XOR x y)
 43022  	for {
 43023  		_ = v.Args[1]
 43024  		x := v.Args[0]
 43025  		y := v.Args[1]
 43026  		v.reset(OpPPC64XOR)
 43027  		v.AddArg(x)
 43028  		v.AddArg(y)
 43029  		return true
 43030  	}
 43031  }
 43032  func rewriteValuePPC64_OpXor32_0(v *Value) bool {
 43033  	// match: (Xor32 x y)
 43034  	// cond:
 43035  	// result: (XOR x y)
 43036  	for {
 43037  		_ = v.Args[1]
 43038  		x := v.Args[0]
 43039  		y := v.Args[1]
 43040  		v.reset(OpPPC64XOR)
 43041  		v.AddArg(x)
 43042  		v.AddArg(y)
 43043  		return true
 43044  	}
 43045  }
 43046  func rewriteValuePPC64_OpXor64_0(v *Value) bool {
 43047  	// match: (Xor64 x y)
 43048  	// cond:
 43049  	// result: (XOR x y)
 43050  	for {
 43051  		_ = v.Args[1]
 43052  		x := v.Args[0]
 43053  		y := v.Args[1]
 43054  		v.reset(OpPPC64XOR)
 43055  		v.AddArg(x)
 43056  		v.AddArg(y)
 43057  		return true
 43058  	}
 43059  }
 43060  func rewriteValuePPC64_OpXor8_0(v *Value) bool {
 43061  	// match: (Xor8 x y)
 43062  	// cond:
 43063  	// result: (XOR x y)
 43064  	for {
 43065  		_ = v.Args[1]
 43066  		x := v.Args[0]
 43067  		y := v.Args[1]
 43068  		v.reset(OpPPC64XOR)
 43069  		v.AddArg(x)
 43070  		v.AddArg(y)
 43071  		return true
 43072  	}
 43073  }
 43074  func rewriteValuePPC64_OpZero_0(v *Value) bool {
 43075  	b := v.Block
 43076  	_ = b
 43077  	// match: (Zero [0] _ mem)
 43078  	// cond:
 43079  	// result: mem
 43080  	for {
 43081  		if v.AuxInt != 0 {
 43082  			break
 43083  		}
 43084  		_ = v.Args[1]
 43085  		mem := v.Args[1]
 43086  		v.reset(OpCopy)
 43087  		v.Type = mem.Type
 43088  		v.AddArg(mem)
 43089  		return true
 43090  	}
 43091  	// match: (Zero [1] destptr mem)
 43092  	// cond:
 43093  	// result: (MOVBstorezero destptr mem)
 43094  	for {
 43095  		if v.AuxInt != 1 {
 43096  			break
 43097  		}
 43098  		_ = v.Args[1]
 43099  		destptr := v.Args[0]
 43100  		mem := v.Args[1]
 43101  		v.reset(OpPPC64MOVBstorezero)
 43102  		v.AddArg(destptr)
 43103  		v.AddArg(mem)
 43104  		return true
 43105  	}
 43106  	// match: (Zero [2] destptr mem)
 43107  	// cond:
 43108  	// result: (MOVHstorezero destptr mem)
 43109  	for {
 43110  		if v.AuxInt != 2 {
 43111  			break
 43112  		}
 43113  		_ = v.Args[1]
 43114  		destptr := v.Args[0]
 43115  		mem := v.Args[1]
 43116  		v.reset(OpPPC64MOVHstorezero)
 43117  		v.AddArg(destptr)
 43118  		v.AddArg(mem)
 43119  		return true
 43120  	}
 43121  	// match: (Zero [3] destptr mem)
 43122  	// cond:
 43123  	// result: (MOVBstorezero [2] destptr 		(MOVHstorezero destptr mem))
 43124  	for {
 43125  		if v.AuxInt != 3 {
 43126  			break
 43127  		}
 43128  		_ = v.Args[1]
 43129  		destptr := v.Args[0]
 43130  		mem := v.Args[1]
 43131  		v.reset(OpPPC64MOVBstorezero)
 43132  		v.AuxInt = 2
 43133  		v.AddArg(destptr)
 43134  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 43135  		v0.AddArg(destptr)
 43136  		v0.AddArg(mem)
 43137  		v.AddArg(v0)
 43138  		return true
 43139  	}
 43140  	// match: (Zero [4] destptr mem)
 43141  	// cond:
 43142  	// result: (MOVWstorezero destptr mem)
 43143  	for {
 43144  		if v.AuxInt != 4 {
 43145  			break
 43146  		}
 43147  		_ = v.Args[1]
 43148  		destptr := v.Args[0]
 43149  		mem := v.Args[1]
 43150  		v.reset(OpPPC64MOVWstorezero)
 43151  		v.AddArg(destptr)
 43152  		v.AddArg(mem)
 43153  		return true
 43154  	}
 43155  	// match: (Zero [5] destptr mem)
 43156  	// cond:
 43157  	// result: (MOVBstorezero [4] destptr         	(MOVWstorezero destptr mem))
 43158  	for {
 43159  		if v.AuxInt != 5 {
 43160  			break
 43161  		}
 43162  		_ = v.Args[1]
 43163  		destptr := v.Args[0]
 43164  		mem := v.Args[1]
 43165  		v.reset(OpPPC64MOVBstorezero)
 43166  		v.AuxInt = 4
 43167  		v.AddArg(destptr)
 43168  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 43169  		v0.AddArg(destptr)
 43170  		v0.AddArg(mem)
 43171  		v.AddArg(v0)
 43172  		return true
 43173  	}
 43174  	// match: (Zero [6] destptr mem)
 43175  	// cond:
 43176  	// result: (MOVHstorezero [4] destptr 		(MOVWstorezero destptr mem))
 43177  	for {
 43178  		if v.AuxInt != 6 {
 43179  			break
 43180  		}
 43181  		_ = v.Args[1]
 43182  		destptr := v.Args[0]
 43183  		mem := v.Args[1]
 43184  		v.reset(OpPPC64MOVHstorezero)
 43185  		v.AuxInt = 4
 43186  		v.AddArg(destptr)
 43187  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 43188  		v0.AddArg(destptr)
 43189  		v0.AddArg(mem)
 43190  		v.AddArg(v0)
 43191  		return true
 43192  	}
 43193  	// match: (Zero [7] destptr mem)
 43194  	// cond:
 43195  	// result: (MOVBstorezero [6] destptr 		(MOVHstorezero [4] destptr 			(MOVWstorezero destptr mem)))
 43196  	for {
 43197  		if v.AuxInt != 7 {
 43198  			break
 43199  		}
 43200  		_ = v.Args[1]
 43201  		destptr := v.Args[0]
 43202  		mem := v.Args[1]
 43203  		v.reset(OpPPC64MOVBstorezero)
 43204  		v.AuxInt = 6
 43205  		v.AddArg(destptr)
 43206  		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
 43207  		v0.AuxInt = 4
 43208  		v0.AddArg(destptr)
 43209  		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 43210  		v1.AddArg(destptr)
 43211  		v1.AddArg(mem)
 43212  		v0.AddArg(v1)
 43213  		v.AddArg(v0)
 43214  		return true
 43215  	}
 43216  	// match: (Zero [8] {t} destptr mem)
 43217  	// cond: t.(*types.Type).Alignment()%4 == 0
 43218  	// result: (MOVDstorezero destptr mem)
 43219  	for {
 43220  		if v.AuxInt != 8 {
 43221  			break
 43222  		}
 43223  		t := v.Aux
 43224  		_ = v.Args[1]
 43225  		destptr := v.Args[0]
 43226  		mem := v.Args[1]
 43227  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43228  			break
 43229  		}
 43230  		v.reset(OpPPC64MOVDstorezero)
 43231  		v.AddArg(destptr)
 43232  		v.AddArg(mem)
 43233  		return true
 43234  	}
 43235  	// match: (Zero [8] destptr mem)
 43236  	// cond:
 43237  	// result: (MOVWstorezero [4] destptr                 (MOVWstorezero [0] destptr mem))
 43238  	for {
 43239  		if v.AuxInt != 8 {
 43240  			break
 43241  		}
 43242  		_ = v.Args[1]
 43243  		destptr := v.Args[0]
 43244  		mem := v.Args[1]
 43245  		v.reset(OpPPC64MOVWstorezero)
 43246  		v.AuxInt = 4
 43247  		v.AddArg(destptr)
 43248  		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
 43249  		v0.AuxInt = 0
 43250  		v0.AddArg(destptr)
 43251  		v0.AddArg(mem)
 43252  		v.AddArg(v0)
 43253  		return true
 43254  	}
 43255  	return false
 43256  }
 43257  func rewriteValuePPC64_OpZero_10(v *Value) bool {
 43258  	b := v.Block
 43259  	_ = b
 43260  	// match: (Zero [12] {t} destptr mem)
 43261  	// cond: t.(*types.Type).Alignment()%4 == 0
 43262  	// result: (MOVWstorezero [8] destptr                 (MOVDstorezero [0] destptr mem))
 43263  	for {
 43264  		if v.AuxInt != 12 {
 43265  			break
 43266  		}
 43267  		t := v.Aux
 43268  		_ = v.Args[1]
 43269  		destptr := v.Args[0]
 43270  		mem := v.Args[1]
 43271  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43272  			break
 43273  		}
 43274  		v.reset(OpPPC64MOVWstorezero)
 43275  		v.AuxInt = 8
 43276  		v.AddArg(destptr)
 43277  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43278  		v0.AuxInt = 0
 43279  		v0.AddArg(destptr)
 43280  		v0.AddArg(mem)
 43281  		v.AddArg(v0)
 43282  		return true
 43283  	}
 43284  	// match: (Zero [16] {t} destptr mem)
 43285  	// cond: t.(*types.Type).Alignment()%4 == 0
 43286  	// result: (MOVDstorezero [8] destptr                 (MOVDstorezero [0] destptr mem))
 43287  	for {
 43288  		if v.AuxInt != 16 {
 43289  			break
 43290  		}
 43291  		t := v.Aux
 43292  		_ = v.Args[1]
 43293  		destptr := v.Args[0]
 43294  		mem := v.Args[1]
 43295  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43296  			break
 43297  		}
 43298  		v.reset(OpPPC64MOVDstorezero)
 43299  		v.AuxInt = 8
 43300  		v.AddArg(destptr)
 43301  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43302  		v0.AuxInt = 0
 43303  		v0.AddArg(destptr)
 43304  		v0.AddArg(mem)
 43305  		v.AddArg(v0)
 43306  		return true
 43307  	}
 43308  	// match: (Zero [24] {t} destptr mem)
 43309  	// cond: t.(*types.Type).Alignment()%4 == 0
 43310  	// result: (MOVDstorezero [16] destptr                (MOVDstorezero [8] destptr                        (MOVDstorezero [0] destptr mem)))
 43311  	for {
 43312  		if v.AuxInt != 24 {
 43313  			break
 43314  		}
 43315  		t := v.Aux
 43316  		_ = v.Args[1]
 43317  		destptr := v.Args[0]
 43318  		mem := v.Args[1]
 43319  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43320  			break
 43321  		}
 43322  		v.reset(OpPPC64MOVDstorezero)
 43323  		v.AuxInt = 16
 43324  		v.AddArg(destptr)
 43325  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43326  		v0.AuxInt = 8
 43327  		v0.AddArg(destptr)
 43328  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43329  		v1.AuxInt = 0
 43330  		v1.AddArg(destptr)
 43331  		v1.AddArg(mem)
 43332  		v0.AddArg(v1)
 43333  		v.AddArg(v0)
 43334  		return true
 43335  	}
 43336  	// match: (Zero [32] {t} destptr mem)
 43337  	// cond: t.(*types.Type).Alignment()%4 == 0
 43338  	// result: (MOVDstorezero [24] destptr                (MOVDstorezero [16] destptr                        (MOVDstorezero [8] destptr                                (MOVDstorezero [0] destptr mem))))
 43339  	for {
 43340  		if v.AuxInt != 32 {
 43341  			break
 43342  		}
 43343  		t := v.Aux
 43344  		_ = v.Args[1]
 43345  		destptr := v.Args[0]
 43346  		mem := v.Args[1]
 43347  		if !(t.(*types.Type).Alignment()%4 == 0) {
 43348  			break
 43349  		}
 43350  		v.reset(OpPPC64MOVDstorezero)
 43351  		v.AuxInt = 24
 43352  		v.AddArg(destptr)
 43353  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43354  		v0.AuxInt = 16
 43355  		v0.AddArg(destptr)
 43356  		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43357  		v1.AuxInt = 8
 43358  		v1.AddArg(destptr)
 43359  		v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
 43360  		v2.AuxInt = 0
 43361  		v2.AddArg(destptr)
 43362  		v2.AddArg(mem)
 43363  		v1.AddArg(v2)
 43364  		v0.AddArg(v1)
 43365  		v.AddArg(v0)
 43366  		return true
 43367  	}
 43368  	// match: (Zero [s] ptr mem)
 43369  	// cond:
 43370  	// result: (LoweredZero [s] ptr mem)
 43371  	for {
 43372  		s := v.AuxInt
 43373  		_ = v.Args[1]
 43374  		ptr := v.Args[0]
 43375  		mem := v.Args[1]
 43376  		v.reset(OpPPC64LoweredZero)
 43377  		v.AuxInt = s
 43378  		v.AddArg(ptr)
 43379  		v.AddArg(mem)
 43380  		return true
 43381  	}
 43382  }
 43383  func rewriteValuePPC64_OpZeroExt16to32_0(v *Value) bool {
 43384  	// match: (ZeroExt16to32 x)
 43385  	// cond:
 43386  	// result: (MOVHZreg x)
 43387  	for {
 43388  		x := v.Args[0]
 43389  		v.reset(OpPPC64MOVHZreg)
 43390  		v.AddArg(x)
 43391  		return true
 43392  	}
 43393  }
 43394  func rewriteValuePPC64_OpZeroExt16to64_0(v *Value) bool {
 43395  	// match: (ZeroExt16to64 x)
 43396  	// cond:
 43397  	// result: (MOVHZreg x)
 43398  	for {
 43399  		x := v.Args[0]
 43400  		v.reset(OpPPC64MOVHZreg)
 43401  		v.AddArg(x)
 43402  		return true
 43403  	}
 43404  }
 43405  func rewriteValuePPC64_OpZeroExt32to64_0(v *Value) bool {
 43406  	// match: (ZeroExt32to64 x)
 43407  	// cond:
 43408  	// result: (MOVWZreg x)
 43409  	for {
 43410  		x := v.Args[0]
 43411  		v.reset(OpPPC64MOVWZreg)
 43412  		v.AddArg(x)
 43413  		return true
 43414  	}
 43415  }
 43416  func rewriteValuePPC64_OpZeroExt8to16_0(v *Value) bool {
 43417  	// match: (ZeroExt8to16 x)
 43418  	// cond:
 43419  	// result: (MOVBZreg x)
 43420  	for {
 43421  		x := v.Args[0]
 43422  		v.reset(OpPPC64MOVBZreg)
 43423  		v.AddArg(x)
 43424  		return true
 43425  	}
 43426  }
 43427  func rewriteValuePPC64_OpZeroExt8to32_0(v *Value) bool {
 43428  	// match: (ZeroExt8to32 x)
 43429  	// cond:
 43430  	// result: (MOVBZreg x)
 43431  	for {
 43432  		x := v.Args[0]
 43433  		v.reset(OpPPC64MOVBZreg)
 43434  		v.AddArg(x)
 43435  		return true
 43436  	}
 43437  }
 43438  func rewriteValuePPC64_OpZeroExt8to64_0(v *Value) bool {
 43439  	// match: (ZeroExt8to64 x)
 43440  	// cond:
 43441  	// result: (MOVBZreg x)
 43442  	for {
 43443  		x := v.Args[0]
 43444  		v.reset(OpPPC64MOVBZreg)
 43445  		v.AddArg(x)
 43446  		return true
 43447  	}
 43448  }
 43449  func rewriteBlockPPC64(b *Block) bool {
 43450  	config := b.Func.Config
 43451  	_ = config
 43452  	fe := b.Func.fe
 43453  	_ = fe
 43454  	typ := &config.Types
 43455  	_ = typ
 43456  	switch b.Kind {
 43457  	case BlockPPC64EQ:
 43458  		// match: (EQ (CMPconst [0] (ANDconst [c] x)) yes no)
 43459  		// cond:
 43460  		// result: (EQ (ANDCCconst [c] x) yes no)
 43461  		for {
 43462  			v := b.Control
 43463  			if v.Op != OpPPC64CMPconst {
 43464  				break
 43465  			}
 43466  			if v.AuxInt != 0 {
 43467  				break
 43468  			}
 43469  			v_0 := v.Args[0]
 43470  			if v_0.Op != OpPPC64ANDconst {
 43471  				break
 43472  			}
 43473  			c := v_0.AuxInt
 43474  			x := v_0.Args[0]
 43475  			b.Kind = BlockPPC64EQ
 43476  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 43477  			v0.AuxInt = c
 43478  			v0.AddArg(x)
 43479  			b.SetControl(v0)
 43480  			b.Aux = nil
 43481  			return true
 43482  		}
 43483  		// match: (EQ (CMPWconst [0] (ANDconst [c] x)) yes no)
 43484  		// cond:
 43485  		// result: (EQ (ANDCCconst [c] x) yes no)
 43486  		for {
 43487  			v := b.Control
 43488  			if v.Op != OpPPC64CMPWconst {
 43489  				break
 43490  			}
 43491  			if v.AuxInt != 0 {
 43492  				break
 43493  			}
 43494  			v_0 := v.Args[0]
 43495  			if v_0.Op != OpPPC64ANDconst {
 43496  				break
 43497  			}
 43498  			c := v_0.AuxInt
 43499  			x := v_0.Args[0]
 43500  			b.Kind = BlockPPC64EQ
 43501  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 43502  			v0.AuxInt = c
 43503  			v0.AddArg(x)
 43504  			b.SetControl(v0)
 43505  			b.Aux = nil
 43506  			return true
 43507  		}
 43508  		// match: (EQ (FlagEQ) yes no)
 43509  		// cond:
 43510  		// result: (First nil yes no)
 43511  		for {
 43512  			v := b.Control
 43513  			if v.Op != OpPPC64FlagEQ {
 43514  				break
 43515  			}
 43516  			b.Kind = BlockFirst
 43517  			b.SetControl(nil)
 43518  			b.Aux = nil
 43519  			return true
 43520  		}
 43521  		// match: (EQ (FlagLT) yes no)
 43522  		// cond:
 43523  		// result: (First nil no yes)
 43524  		for {
 43525  			v := b.Control
 43526  			if v.Op != OpPPC64FlagLT {
 43527  				break
 43528  			}
 43529  			b.Kind = BlockFirst
 43530  			b.SetControl(nil)
 43531  			b.Aux = nil
 43532  			b.swapSuccessors()
 43533  			return true
 43534  		}
 43535  		// match: (EQ (FlagGT) yes no)
 43536  		// cond:
 43537  		// result: (First nil no yes)
 43538  		for {
 43539  			v := b.Control
 43540  			if v.Op != OpPPC64FlagGT {
 43541  				break
 43542  			}
 43543  			b.Kind = BlockFirst
 43544  			b.SetControl(nil)
 43545  			b.Aux = nil
 43546  			b.swapSuccessors()
 43547  			return true
 43548  		}
 43549  		// match: (EQ (InvertFlags cmp) yes no)
 43550  		// cond:
 43551  		// result: (EQ cmp yes no)
 43552  		for {
 43553  			v := b.Control
 43554  			if v.Op != OpPPC64InvertFlags {
 43555  				break
 43556  			}
 43557  			cmp := v.Args[0]
 43558  			b.Kind = BlockPPC64EQ
 43559  			b.SetControl(cmp)
 43560  			b.Aux = nil
 43561  			return true
 43562  		}
 43563  	case BlockPPC64GE:
 43564  		// match: (GE (FlagEQ) yes no)
 43565  		// cond:
 43566  		// result: (First nil yes no)
 43567  		for {
 43568  			v := b.Control
 43569  			if v.Op != OpPPC64FlagEQ {
 43570  				break
 43571  			}
 43572  			b.Kind = BlockFirst
 43573  			b.SetControl(nil)
 43574  			b.Aux = nil
 43575  			return true
 43576  		}
 43577  		// match: (GE (FlagLT) yes no)
 43578  		// cond:
 43579  		// result: (First nil no yes)
 43580  		for {
 43581  			v := b.Control
 43582  			if v.Op != OpPPC64FlagLT {
 43583  				break
 43584  			}
 43585  			b.Kind = BlockFirst
 43586  			b.SetControl(nil)
 43587  			b.Aux = nil
 43588  			b.swapSuccessors()
 43589  			return true
 43590  		}
 43591  		// match: (GE (FlagGT) yes no)
 43592  		// cond:
 43593  		// result: (First nil yes no)
 43594  		for {
 43595  			v := b.Control
 43596  			if v.Op != OpPPC64FlagGT {
 43597  				break
 43598  			}
 43599  			b.Kind = BlockFirst
 43600  			b.SetControl(nil)
 43601  			b.Aux = nil
 43602  			return true
 43603  		}
 43604  		// match: (GE (InvertFlags cmp) yes no)
 43605  		// cond:
 43606  		// result: (LE cmp yes no)
 43607  		for {
 43608  			v := b.Control
 43609  			if v.Op != OpPPC64InvertFlags {
 43610  				break
 43611  			}
 43612  			cmp := v.Args[0]
 43613  			b.Kind = BlockPPC64LE
 43614  			b.SetControl(cmp)
 43615  			b.Aux = nil
 43616  			return true
 43617  		}
 43618  	case BlockPPC64GT:
 43619  		// match: (GT (FlagEQ) yes no)
 43620  		// cond:
 43621  		// result: (First nil no yes)
 43622  		for {
 43623  			v := b.Control
 43624  			if v.Op != OpPPC64FlagEQ {
 43625  				break
 43626  			}
 43627  			b.Kind = BlockFirst
 43628  			b.SetControl(nil)
 43629  			b.Aux = nil
 43630  			b.swapSuccessors()
 43631  			return true
 43632  		}
 43633  		// match: (GT (FlagLT) yes no)
 43634  		// cond:
 43635  		// result: (First nil no yes)
 43636  		for {
 43637  			v := b.Control
 43638  			if v.Op != OpPPC64FlagLT {
 43639  				break
 43640  			}
 43641  			b.Kind = BlockFirst
 43642  			b.SetControl(nil)
 43643  			b.Aux = nil
 43644  			b.swapSuccessors()
 43645  			return true
 43646  		}
 43647  		// match: (GT (FlagGT) yes no)
 43648  		// cond:
 43649  		// result: (First nil yes no)
 43650  		for {
 43651  			v := b.Control
 43652  			if v.Op != OpPPC64FlagGT {
 43653  				break
 43654  			}
 43655  			b.Kind = BlockFirst
 43656  			b.SetControl(nil)
 43657  			b.Aux = nil
 43658  			return true
 43659  		}
 43660  		// match: (GT (InvertFlags cmp) yes no)
 43661  		// cond:
 43662  		// result: (LT cmp yes no)
 43663  		for {
 43664  			v := b.Control
 43665  			if v.Op != OpPPC64InvertFlags {
 43666  				break
 43667  			}
 43668  			cmp := v.Args[0]
 43669  			b.Kind = BlockPPC64LT
 43670  			b.SetControl(cmp)
 43671  			b.Aux = nil
 43672  			return true
 43673  		}
 43674  	case BlockIf:
 43675  		// match: (If (Equal cc) yes no)
 43676  		// cond:
 43677  		// result: (EQ cc yes no)
 43678  		for {
 43679  			v := b.Control
 43680  			if v.Op != OpPPC64Equal {
 43681  				break
 43682  			}
 43683  			cc := v.Args[0]
 43684  			b.Kind = BlockPPC64EQ
 43685  			b.SetControl(cc)
 43686  			b.Aux = nil
 43687  			return true
 43688  		}
 43689  		// match: (If (NotEqual cc) yes no)
 43690  		// cond:
 43691  		// result: (NE cc yes no)
 43692  		for {
 43693  			v := b.Control
 43694  			if v.Op != OpPPC64NotEqual {
 43695  				break
 43696  			}
 43697  			cc := v.Args[0]
 43698  			b.Kind = BlockPPC64NE
 43699  			b.SetControl(cc)
 43700  			b.Aux = nil
 43701  			return true
 43702  		}
 43703  		// match: (If (LessThan cc) yes no)
 43704  		// cond:
 43705  		// result: (LT cc yes no)
 43706  		for {
 43707  			v := b.Control
 43708  			if v.Op != OpPPC64LessThan {
 43709  				break
 43710  			}
 43711  			cc := v.Args[0]
 43712  			b.Kind = BlockPPC64LT
 43713  			b.SetControl(cc)
 43714  			b.Aux = nil
 43715  			return true
 43716  		}
 43717  		// match: (If (LessEqual cc) yes no)
 43718  		// cond:
 43719  		// result: (LE cc yes no)
 43720  		for {
 43721  			v := b.Control
 43722  			if v.Op != OpPPC64LessEqual {
 43723  				break
 43724  			}
 43725  			cc := v.Args[0]
 43726  			b.Kind = BlockPPC64LE
 43727  			b.SetControl(cc)
 43728  			b.Aux = nil
 43729  			return true
 43730  		}
 43731  		// match: (If (GreaterThan cc) yes no)
 43732  		// cond:
 43733  		// result: (GT cc yes no)
 43734  		for {
 43735  			v := b.Control
 43736  			if v.Op != OpPPC64GreaterThan {
 43737  				break
 43738  			}
 43739  			cc := v.Args[0]
 43740  			b.Kind = BlockPPC64GT
 43741  			b.SetControl(cc)
 43742  			b.Aux = nil
 43743  			return true
 43744  		}
 43745  		// match: (If (GreaterEqual cc) yes no)
 43746  		// cond:
 43747  		// result: (GE cc yes no)
 43748  		for {
 43749  			v := b.Control
 43750  			if v.Op != OpPPC64GreaterEqual {
 43751  				break
 43752  			}
 43753  			cc := v.Args[0]
 43754  			b.Kind = BlockPPC64GE
 43755  			b.SetControl(cc)
 43756  			b.Aux = nil
 43757  			return true
 43758  		}
 43759  		// match: (If (FLessThan cc) yes no)
 43760  		// cond:
 43761  		// result: (FLT cc yes no)
 43762  		for {
 43763  			v := b.Control
 43764  			if v.Op != OpPPC64FLessThan {
 43765  				break
 43766  			}
 43767  			cc := v.Args[0]
 43768  			b.Kind = BlockPPC64FLT
 43769  			b.SetControl(cc)
 43770  			b.Aux = nil
 43771  			return true
 43772  		}
 43773  		// match: (If (FLessEqual cc) yes no)
 43774  		// cond:
 43775  		// result: (FLE cc yes no)
 43776  		for {
 43777  			v := b.Control
 43778  			if v.Op != OpPPC64FLessEqual {
 43779  				break
 43780  			}
 43781  			cc := v.Args[0]
 43782  			b.Kind = BlockPPC64FLE
 43783  			b.SetControl(cc)
 43784  			b.Aux = nil
 43785  			return true
 43786  		}
 43787  		// match: (If (FGreaterThan cc) yes no)
 43788  		// cond:
 43789  		// result: (FGT cc yes no)
 43790  		for {
 43791  			v := b.Control
 43792  			if v.Op != OpPPC64FGreaterThan {
 43793  				break
 43794  			}
 43795  			cc := v.Args[0]
 43796  			b.Kind = BlockPPC64FGT
 43797  			b.SetControl(cc)
 43798  			b.Aux = nil
 43799  			return true
 43800  		}
 43801  		// match: (If (FGreaterEqual cc) yes no)
 43802  		// cond:
 43803  		// result: (FGE cc yes no)
 43804  		for {
 43805  			v := b.Control
 43806  			if v.Op != OpPPC64FGreaterEqual {
 43807  				break
 43808  			}
 43809  			cc := v.Args[0]
 43810  			b.Kind = BlockPPC64FGE
 43811  			b.SetControl(cc)
 43812  			b.Aux = nil
 43813  			return true
 43814  		}
 43815  		// match: (If cond yes no)
 43816  		// cond:
 43817  		// result: (NE (CMPWconst [0] cond) yes no)
 43818  		for {
 43819  			v := b.Control
 43820  			_ = v
 43821  			cond := b.Control
 43822  			b.Kind = BlockPPC64NE
 43823  			v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
 43824  			v0.AuxInt = 0
 43825  			v0.AddArg(cond)
 43826  			b.SetControl(v0)
 43827  			b.Aux = nil
 43828  			return true
 43829  		}
 43830  	case BlockPPC64LE:
 43831  		// match: (LE (FlagEQ) yes no)
 43832  		// cond:
 43833  		// result: (First nil yes no)
 43834  		for {
 43835  			v := b.Control
 43836  			if v.Op != OpPPC64FlagEQ {
 43837  				break
 43838  			}
 43839  			b.Kind = BlockFirst
 43840  			b.SetControl(nil)
 43841  			b.Aux = nil
 43842  			return true
 43843  		}
 43844  		// match: (LE (FlagLT) yes no)
 43845  		// cond:
 43846  		// result: (First nil yes no)
 43847  		for {
 43848  			v := b.Control
 43849  			if v.Op != OpPPC64FlagLT {
 43850  				break
 43851  			}
 43852  			b.Kind = BlockFirst
 43853  			b.SetControl(nil)
 43854  			b.Aux = nil
 43855  			return true
 43856  		}
 43857  		// match: (LE (FlagGT) yes no)
 43858  		// cond:
 43859  		// result: (First nil no yes)
 43860  		for {
 43861  			v := b.Control
 43862  			if v.Op != OpPPC64FlagGT {
 43863  				break
 43864  			}
 43865  			b.Kind = BlockFirst
 43866  			b.SetControl(nil)
 43867  			b.Aux = nil
 43868  			b.swapSuccessors()
 43869  			return true
 43870  		}
 43871  		// match: (LE (InvertFlags cmp) yes no)
 43872  		// cond:
 43873  		// result: (GE cmp yes no)
 43874  		for {
 43875  			v := b.Control
 43876  			if v.Op != OpPPC64InvertFlags {
 43877  				break
 43878  			}
 43879  			cmp := v.Args[0]
 43880  			b.Kind = BlockPPC64GE
 43881  			b.SetControl(cmp)
 43882  			b.Aux = nil
 43883  			return true
 43884  		}
 43885  	case BlockPPC64LT:
 43886  		// match: (LT (FlagEQ) yes no)
 43887  		// cond:
 43888  		// result: (First nil no yes)
 43889  		for {
 43890  			v := b.Control
 43891  			if v.Op != OpPPC64FlagEQ {
 43892  				break
 43893  			}
 43894  			b.Kind = BlockFirst
 43895  			b.SetControl(nil)
 43896  			b.Aux = nil
 43897  			b.swapSuccessors()
 43898  			return true
 43899  		}
 43900  		// match: (LT (FlagLT) yes no)
 43901  		// cond:
 43902  		// result: (First nil yes no)
 43903  		for {
 43904  			v := b.Control
 43905  			if v.Op != OpPPC64FlagLT {
 43906  				break
 43907  			}
 43908  			b.Kind = BlockFirst
 43909  			b.SetControl(nil)
 43910  			b.Aux = nil
 43911  			return true
 43912  		}
 43913  		// match: (LT (FlagGT) yes no)
 43914  		// cond:
 43915  		// result: (First nil no yes)
 43916  		for {
 43917  			v := b.Control
 43918  			if v.Op != OpPPC64FlagGT {
 43919  				break
 43920  			}
 43921  			b.Kind = BlockFirst
 43922  			b.SetControl(nil)
 43923  			b.Aux = nil
 43924  			b.swapSuccessors()
 43925  			return true
 43926  		}
 43927  		// match: (LT (InvertFlags cmp) yes no)
 43928  		// cond:
 43929  		// result: (GT cmp yes no)
 43930  		for {
 43931  			v := b.Control
 43932  			if v.Op != OpPPC64InvertFlags {
 43933  				break
 43934  			}
 43935  			cmp := v.Args[0]
 43936  			b.Kind = BlockPPC64GT
 43937  			b.SetControl(cmp)
 43938  			b.Aux = nil
 43939  			return true
 43940  		}
 43941  	case BlockPPC64NE:
 43942  		// match: (NE (CMPWconst [0] (Equal cc)) yes no)
 43943  		// cond:
 43944  		// result: (EQ cc yes no)
 43945  		for {
 43946  			v := b.Control
 43947  			if v.Op != OpPPC64CMPWconst {
 43948  				break
 43949  			}
 43950  			if v.AuxInt != 0 {
 43951  				break
 43952  			}
 43953  			v_0 := v.Args[0]
 43954  			if v_0.Op != OpPPC64Equal {
 43955  				break
 43956  			}
 43957  			cc := v_0.Args[0]
 43958  			b.Kind = BlockPPC64EQ
 43959  			b.SetControl(cc)
 43960  			b.Aux = nil
 43961  			return true
 43962  		}
 43963  		// match: (NE (CMPWconst [0] (NotEqual cc)) yes no)
 43964  		// cond:
 43965  		// result: (NE cc yes no)
 43966  		for {
 43967  			v := b.Control
 43968  			if v.Op != OpPPC64CMPWconst {
 43969  				break
 43970  			}
 43971  			if v.AuxInt != 0 {
 43972  				break
 43973  			}
 43974  			v_0 := v.Args[0]
 43975  			if v_0.Op != OpPPC64NotEqual {
 43976  				break
 43977  			}
 43978  			cc := v_0.Args[0]
 43979  			b.Kind = BlockPPC64NE
 43980  			b.SetControl(cc)
 43981  			b.Aux = nil
 43982  			return true
 43983  		}
 43984  		// match: (NE (CMPWconst [0] (LessThan cc)) yes no)
 43985  		// cond:
 43986  		// result: (LT cc yes no)
 43987  		for {
 43988  			v := b.Control
 43989  			if v.Op != OpPPC64CMPWconst {
 43990  				break
 43991  			}
 43992  			if v.AuxInt != 0 {
 43993  				break
 43994  			}
 43995  			v_0 := v.Args[0]
 43996  			if v_0.Op != OpPPC64LessThan {
 43997  				break
 43998  			}
 43999  			cc := v_0.Args[0]
 44000  			b.Kind = BlockPPC64LT
 44001  			b.SetControl(cc)
 44002  			b.Aux = nil
 44003  			return true
 44004  		}
 44005  		// match: (NE (CMPWconst [0] (LessEqual cc)) yes no)
 44006  		// cond:
 44007  		// result: (LE cc yes no)
 44008  		for {
 44009  			v := b.Control
 44010  			if v.Op != OpPPC64CMPWconst {
 44011  				break
 44012  			}
 44013  			if v.AuxInt != 0 {
 44014  				break
 44015  			}
 44016  			v_0 := v.Args[0]
 44017  			if v_0.Op != OpPPC64LessEqual {
 44018  				break
 44019  			}
 44020  			cc := v_0.Args[0]
 44021  			b.Kind = BlockPPC64LE
 44022  			b.SetControl(cc)
 44023  			b.Aux = nil
 44024  			return true
 44025  		}
 44026  		// match: (NE (CMPWconst [0] (GreaterThan cc)) yes no)
 44027  		// cond:
 44028  		// result: (GT cc yes no)
 44029  		for {
 44030  			v := b.Control
 44031  			if v.Op != OpPPC64CMPWconst {
 44032  				break
 44033  			}
 44034  			if v.AuxInt != 0 {
 44035  				break
 44036  			}
 44037  			v_0 := v.Args[0]
 44038  			if v_0.Op != OpPPC64GreaterThan {
 44039  				break
 44040  			}
 44041  			cc := v_0.Args[0]
 44042  			b.Kind = BlockPPC64GT
 44043  			b.SetControl(cc)
 44044  			b.Aux = nil
 44045  			return true
 44046  		}
 44047  		// match: (NE (CMPWconst [0] (GreaterEqual cc)) yes no)
 44048  		// cond:
 44049  		// result: (GE cc yes no)
 44050  		for {
 44051  			v := b.Control
 44052  			if v.Op != OpPPC64CMPWconst {
 44053  				break
 44054  			}
 44055  			if v.AuxInt != 0 {
 44056  				break
 44057  			}
 44058  			v_0 := v.Args[0]
 44059  			if v_0.Op != OpPPC64GreaterEqual {
 44060  				break
 44061  			}
 44062  			cc := v_0.Args[0]
 44063  			b.Kind = BlockPPC64GE
 44064  			b.SetControl(cc)
 44065  			b.Aux = nil
 44066  			return true
 44067  		}
 44068  		// match: (NE (CMPWconst [0] (FLessThan cc)) yes no)
 44069  		// cond:
 44070  		// result: (FLT cc yes no)
 44071  		for {
 44072  			v := b.Control
 44073  			if v.Op != OpPPC64CMPWconst {
 44074  				break
 44075  			}
 44076  			if v.AuxInt != 0 {
 44077  				break
 44078  			}
 44079  			v_0 := v.Args[0]
 44080  			if v_0.Op != OpPPC64FLessThan {
 44081  				break
 44082  			}
 44083  			cc := v_0.Args[0]
 44084  			b.Kind = BlockPPC64FLT
 44085  			b.SetControl(cc)
 44086  			b.Aux = nil
 44087  			return true
 44088  		}
 44089  		// match: (NE (CMPWconst [0] (FLessEqual cc)) yes no)
 44090  		// cond:
 44091  		// result: (FLE cc yes no)
 44092  		for {
 44093  			v := b.Control
 44094  			if v.Op != OpPPC64CMPWconst {
 44095  				break
 44096  			}
 44097  			if v.AuxInt != 0 {
 44098  				break
 44099  			}
 44100  			v_0 := v.Args[0]
 44101  			if v_0.Op != OpPPC64FLessEqual {
 44102  				break
 44103  			}
 44104  			cc := v_0.Args[0]
 44105  			b.Kind = BlockPPC64FLE
 44106  			b.SetControl(cc)
 44107  			b.Aux = nil
 44108  			return true
 44109  		}
 44110  		// match: (NE (CMPWconst [0] (FGreaterThan cc)) yes no)
 44111  		// cond:
 44112  		// result: (FGT cc yes no)
 44113  		for {
 44114  			v := b.Control
 44115  			if v.Op != OpPPC64CMPWconst {
 44116  				break
 44117  			}
 44118  			if v.AuxInt != 0 {
 44119  				break
 44120  			}
 44121  			v_0 := v.Args[0]
 44122  			if v_0.Op != OpPPC64FGreaterThan {
 44123  				break
 44124  			}
 44125  			cc := v_0.Args[0]
 44126  			b.Kind = BlockPPC64FGT
 44127  			b.SetControl(cc)
 44128  			b.Aux = nil
 44129  			return true
 44130  		}
 44131  		// match: (NE (CMPWconst [0] (FGreaterEqual cc)) yes no)
 44132  		// cond:
 44133  		// result: (FGE cc yes no)
 44134  		for {
 44135  			v := b.Control
 44136  			if v.Op != OpPPC64CMPWconst {
 44137  				break
 44138  			}
 44139  			if v.AuxInt != 0 {
 44140  				break
 44141  			}
 44142  			v_0 := v.Args[0]
 44143  			if v_0.Op != OpPPC64FGreaterEqual {
 44144  				break
 44145  			}
 44146  			cc := v_0.Args[0]
 44147  			b.Kind = BlockPPC64FGE
 44148  			b.SetControl(cc)
 44149  			b.Aux = nil
 44150  			return true
 44151  		}
 44152  		// match: (NE (CMPconst [0] (ANDconst [c] x)) yes no)
 44153  		// cond:
 44154  		// result: (NE (ANDCCconst [c] x) yes no)
 44155  		for {
 44156  			v := b.Control
 44157  			if v.Op != OpPPC64CMPconst {
 44158  				break
 44159  			}
 44160  			if v.AuxInt != 0 {
 44161  				break
 44162  			}
 44163  			v_0 := v.Args[0]
 44164  			if v_0.Op != OpPPC64ANDconst {
 44165  				break
 44166  			}
 44167  			c := v_0.AuxInt
 44168  			x := v_0.Args[0]
 44169  			b.Kind = BlockPPC64NE
 44170  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 44171  			v0.AuxInt = c
 44172  			v0.AddArg(x)
 44173  			b.SetControl(v0)
 44174  			b.Aux = nil
 44175  			return true
 44176  		}
 44177  		// match: (NE (CMPWconst [0] (ANDconst [c] x)) yes no)
 44178  		// cond:
 44179  		// result: (NE (ANDCCconst [c] x) yes no)
 44180  		for {
 44181  			v := b.Control
 44182  			if v.Op != OpPPC64CMPWconst {
 44183  				break
 44184  			}
 44185  			if v.AuxInt != 0 {
 44186  				break
 44187  			}
 44188  			v_0 := v.Args[0]
 44189  			if v_0.Op != OpPPC64ANDconst {
 44190  				break
 44191  			}
 44192  			c := v_0.AuxInt
 44193  			x := v_0.Args[0]
 44194  			b.Kind = BlockPPC64NE
 44195  			v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.TypeFlags)
 44196  			v0.AuxInt = c
 44197  			v0.AddArg(x)
 44198  			b.SetControl(v0)
 44199  			b.Aux = nil
 44200  			return true
 44201  		}
 44202  		// match: (NE (FlagEQ) yes no)
 44203  		// cond:
 44204  		// result: (First nil no yes)
 44205  		for {
 44206  			v := b.Control
 44207  			if v.Op != OpPPC64FlagEQ {
 44208  				break
 44209  			}
 44210  			b.Kind = BlockFirst
 44211  			b.SetControl(nil)
 44212  			b.Aux = nil
 44213  			b.swapSuccessors()
 44214  			return true
 44215  		}
 44216  		// match: (NE (FlagLT) yes no)
 44217  		// cond:
 44218  		// result: (First nil yes no)
 44219  		for {
 44220  			v := b.Control
 44221  			if v.Op != OpPPC64FlagLT {
 44222  				break
 44223  			}
 44224  			b.Kind = BlockFirst
 44225  			b.SetControl(nil)
 44226  			b.Aux = nil
 44227  			return true
 44228  		}
 44229  		// match: (NE (FlagGT) yes no)
 44230  		// cond:
 44231  		// result: (First nil yes no)
 44232  		for {
 44233  			v := b.Control
 44234  			if v.Op != OpPPC64FlagGT {
 44235  				break
 44236  			}
 44237  			b.Kind = BlockFirst
 44238  			b.SetControl(nil)
 44239  			b.Aux = nil
 44240  			return true
 44241  		}
 44242  		// match: (NE (InvertFlags cmp) yes no)
 44243  		// cond:
 44244  		// result: (NE cmp yes no)
 44245  		for {
 44246  			v := b.Control
 44247  			if v.Op != OpPPC64InvertFlags {
 44248  				break
 44249  			}
 44250  			cmp := v.Args[0]
 44251  			b.Kind = BlockPPC64NE
 44252  			b.SetControl(cmp)
 44253  			b.Aux = nil
 44254  			return true
 44255  		}
 44256  	}
 44257  	return false
 44258  }