github.com/zebozhuang/go@v0.0.0-20200207033046-f8a98f6f5c5d/src/cmd/internal/obj/arm/a.out.go (about) 1 // Inferno utils/5c/5.out.h 2 // https://bitbucket.org/inferno-os/inferno-os/src/default/utils/5c/5.out.h 3 // 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) 6 // Portions Copyright © 1997-1999 Vita Nuova Limited 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright © 2004,2006 Bruce Ellis 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright © 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 package arm 32 33 import "cmd/internal/obj" 34 35 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm 36 37 const ( 38 NSNAME = 8 39 NSYM = 50 40 NREG = 16 41 ) 42 43 /* -1 disables use of REGARG */ 44 const ( 45 REGARG = -1 46 ) 47 48 const ( 49 REG_R0 = obj.RBaseARM + iota // must be 16-aligned 50 REG_R1 51 REG_R2 52 REG_R3 53 REG_R4 54 REG_R5 55 REG_R6 56 REG_R7 57 REG_R8 58 REG_R9 59 REG_R10 60 REG_R11 61 REG_R12 62 REG_R13 63 REG_R14 64 REG_R15 65 66 REG_F0 // must be 16-aligned 67 REG_F1 68 REG_F2 69 REG_F3 70 REG_F4 71 REG_F5 72 REG_F6 73 REG_F7 74 REG_F8 75 REG_F9 76 REG_F10 77 REG_F11 78 REG_F12 79 REG_F13 80 REG_F14 81 REG_F15 82 83 REG_FPSR // must be 2-aligned 84 REG_FPCR 85 86 REG_CPSR // must be 2-aligned 87 REG_SPSR 88 89 MAXREG 90 REGRET = REG_R0 91 /* compiler allocates R1 up as temps */ 92 /* compiler allocates register variables R3 up */ 93 /* compiler allocates external registers R10 down */ 94 REGEXT = REG_R10 95 /* these two registers are declared in runtime.h */ 96 REGG = REGEXT - 0 97 REGM = REGEXT - 1 98 99 REGCTXT = REG_R7 100 REGTMP = REG_R11 101 REGSP = REG_R13 102 REGLINK = REG_R14 103 REGPC = REG_R15 104 105 NFREG = 16 106 /* compiler allocates register variables F0 up */ 107 /* compiler allocates external registers F7 down */ 108 FREGRET = REG_F0 109 FREGEXT = REG_F7 110 FREGTMP = REG_F15 111 ) 112 113 const ( 114 C_NONE = iota 115 C_REG 116 C_REGREG 117 C_REGREG2 118 C_REGLIST 119 C_SHIFT 120 C_FREG 121 C_PSR 122 C_FCR 123 124 C_RCON /* 0xff rotated */ 125 C_NCON /* ~RCON */ 126 C_RCON2A /* OR of two disjoint C_RCON constants */ 127 C_RCON2S /* subtraction of two disjoint C_RCON constants */ 128 C_SCON /* 0xffff */ 129 C_LCON 130 C_LCONADDR 131 C_ZFCON 132 C_SFCON 133 C_LFCON 134 135 C_RACON 136 C_LACON 137 138 C_SBRA 139 C_LBRA 140 141 C_HAUTO /* halfword insn offset (-0xff to 0xff) */ 142 C_FAUTO /* float insn offset (0 to 0x3fc, word aligned) */ 143 C_HFAUTO /* both H and F */ 144 C_SAUTO /* -0xfff to 0xfff */ 145 C_LAUTO 146 147 C_HOREG 148 C_FOREG 149 C_HFOREG 150 C_SOREG 151 C_ROREG 152 C_SROREG /* both nil and R */ 153 C_LOREG 154 155 C_PC 156 C_SP 157 C_HREG 158 159 C_ADDR /* reference to relocatable address */ 160 161 // TLS "var" in local exec mode: will become a constant offset from 162 // thread local base that is ultimately chosen by the program linker. 163 C_TLS_LE 164 165 // TLS "var" in initial exec mode: will become a memory address (chosen 166 // by the program linker) that the dynamic linker will fill with the 167 // offset from the thread local base. 168 C_TLS_IE 169 170 C_TEXTSIZE 171 172 C_GOK 173 174 C_NCLASS /* must be the last */ 175 ) 176 177 const ( 178 AAND = obj.ABaseARM + obj.A_ARCHSPECIFIC + iota 179 AEOR 180 ASUB 181 ARSB 182 AADD 183 AADC 184 ASBC 185 ARSC 186 ATST 187 ATEQ 188 ACMP 189 ACMN 190 AORR 191 ABIC 192 193 AMVN 194 195 /* 196 * Do not reorder or fragment the conditional branch 197 * opcodes, or the predication code will break 198 */ 199 ABEQ 200 ABNE 201 ABCS 202 ABHS 203 ABCC 204 ABLO 205 ABMI 206 ABPL 207 ABVS 208 ABVC 209 ABHI 210 ABLS 211 ABGE 212 ABLT 213 ABGT 214 ABLE 215 216 AMOVWD 217 AMOVWF 218 AMOVDW 219 AMOVFW 220 AMOVFD 221 AMOVDF 222 AMOVF 223 AMOVD 224 225 ACMPF 226 ACMPD 227 AADDF 228 AADDD 229 ASUBF 230 ASUBD 231 AMULF 232 AMULD 233 ADIVF 234 ADIVD 235 ASQRTF 236 ASQRTD 237 AABSF 238 AABSD 239 ANEGF 240 ANEGD 241 242 ASRL 243 ASRA 244 ASLL 245 AMULU 246 ADIVU 247 AMUL 248 AMMUL 249 ADIV 250 AMOD 251 AMODU 252 ADIVHW 253 ADIVUHW 254 255 AMOVB 256 AMOVBS 257 AMOVBU 258 AMOVH 259 AMOVHS 260 AMOVHU 261 AMOVW 262 AMOVM 263 ASWPBU 264 ASWPW 265 266 ARFE 267 ASWI 268 AMULA 269 AMULS 270 AMMULA 271 AMMULS 272 273 AWORD 274 275 AMULL 276 AMULAL 277 AMULLU 278 AMULALU 279 280 ABX 281 ABXRET 282 ADWORD 283 284 ALDREX 285 ASTREX 286 ALDREXD 287 ASTREXD 288 289 APLD 290 291 ACLZ 292 AREV 293 AREV16 294 AREVSH 295 ARBIT 296 297 AMULWT 298 AMULWB 299 AMULBB 300 AMULAWT 301 AMULAWB 302 AMULABB 303 304 ADATABUNDLE 305 ADATABUNDLEEND 306 307 AMRC // MRC/MCR 308 309 ALAST 310 311 // aliases 312 AB = obj.AJMP 313 ABL = obj.ACALL 314 ) 315 316 /* scond byte */ 317 const ( 318 C_SCOND = (1 << 4) - 1 319 C_SBIT = 1 << 4 320 C_PBIT = 1 << 5 321 C_WBIT = 1 << 6 322 C_FBIT = 1 << 7 /* psr flags-only */ 323 C_UBIT = 1 << 7 /* up bit, unsigned bit */ 324 325 // These constants are the ARM condition codes encodings, 326 // XORed with 14 so that C_SCOND_NONE has value 0, 327 // so that a zeroed Prog.scond means "always execute". 328 C_SCOND_XOR = 14 329 330 C_SCOND_EQ = 0 ^ C_SCOND_XOR 331 C_SCOND_NE = 1 ^ C_SCOND_XOR 332 C_SCOND_HS = 2 ^ C_SCOND_XOR 333 C_SCOND_LO = 3 ^ C_SCOND_XOR 334 C_SCOND_MI = 4 ^ C_SCOND_XOR 335 C_SCOND_PL = 5 ^ C_SCOND_XOR 336 C_SCOND_VS = 6 ^ C_SCOND_XOR 337 C_SCOND_VC = 7 ^ C_SCOND_XOR 338 C_SCOND_HI = 8 ^ C_SCOND_XOR 339 C_SCOND_LS = 9 ^ C_SCOND_XOR 340 C_SCOND_GE = 10 ^ C_SCOND_XOR 341 C_SCOND_LT = 11 ^ C_SCOND_XOR 342 C_SCOND_GT = 12 ^ C_SCOND_XOR 343 C_SCOND_LE = 13 ^ C_SCOND_XOR 344 C_SCOND_NONE = 14 ^ C_SCOND_XOR 345 C_SCOND_NV = 15 ^ C_SCOND_XOR 346 347 /* D_SHIFT type */ 348 SHIFT_LL = 0 << 5 349 SHIFT_LR = 1 << 5 350 SHIFT_AR = 2 << 5 351 SHIFT_RR = 3 << 5 352 )