github.com/zxy12/go_duplicate_112_new@v0.0.0-20200807091221-747231827200/src/runtime/internal/atomic/asm_mipsx.s (about) 1 // Copyright 2016 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 // +build mips mipsle 6 7 #include "textflag.h" 8 9 TEXT ·Cas(SB),NOSPLIT,$0-13 10 MOVW ptr+0(FP), R1 11 MOVW old+4(FP), R2 12 MOVW new+8(FP), R5 13 SYNC 14 try_cas: 15 MOVW R5, R3 16 LL (R1), R4 // R4 = *R1 17 BNE R2, R4, cas_fail 18 SC R3, (R1) // *R1 = R3 19 BEQ R3, try_cas 20 SYNC 21 MOVB R3, ret+12(FP) 22 RET 23 cas_fail: 24 MOVB R0, ret+12(FP) 25 RET 26 27 TEXT ·Store(SB),NOSPLIT,$0-8 28 MOVW ptr+0(FP), R1 29 MOVW val+4(FP), R2 30 SYNC 31 MOVW R2, 0(R1) 32 SYNC 33 RET 34 35 TEXT ·Load(SB),NOSPLIT,$0-8 36 MOVW ptr+0(FP), R1 37 SYNC 38 MOVW 0(R1), R1 39 SYNC 40 MOVW R1, ret+4(FP) 41 RET 42 43 TEXT ·Xadd(SB),NOSPLIT,$0-12 44 MOVW ptr+0(FP), R2 45 MOVW delta+4(FP), R3 46 SYNC 47 try_xadd: 48 LL (R2), R1 // R1 = *R2 49 ADDU R1, R3, R4 50 MOVW R4, R1 51 SC R4, (R2) // *R2 = R4 52 BEQ R4, try_xadd 53 SYNC 54 MOVW R1, ret+8(FP) 55 RET 56 57 TEXT ·Xchg(SB),NOSPLIT,$0-12 58 MOVW ptr+0(FP), R2 59 MOVW new+4(FP), R5 60 SYNC 61 try_xchg: 62 MOVW R5, R3 63 LL (R2), R1 // R1 = *R2 64 SC R3, (R2) // *R2 = R3 65 BEQ R3, try_xchg 66 SYNC 67 MOVW R1, ret+8(FP) 68 RET 69 70 TEXT ·Casuintptr(SB),NOSPLIT,$0-13 71 JMP ·Cas(SB) 72 73 TEXT ·CasRel(SB),NOSPLIT,$0-13 74 JMP ·Cas(SB) 75 76 TEXT ·Loaduintptr(SB),NOSPLIT,$0-8 77 JMP ·Load(SB) 78 79 TEXT ·Loaduint(SB),NOSPLIT,$0-8 80 JMP ·Load(SB) 81 82 TEXT ·Loadp(SB),NOSPLIT,$-0-8 83 JMP ·Load(SB) 84 85 TEXT ·Storeuintptr(SB),NOSPLIT,$0-8 86 JMP ·Store(SB) 87 88 TEXT ·Xadduintptr(SB),NOSPLIT,$0-12 89 JMP ·Xadd(SB) 90 91 TEXT ·Loadint64(SB),NOSPLIT,$0-12 92 JMP ·Load64(SB) 93 94 TEXT ·Xaddint64(SB),NOSPLIT,$0-20 95 JMP ·Xadd64(SB) 96 97 TEXT ·Casp1(SB),NOSPLIT,$0-13 98 JMP ·Cas(SB) 99 100 TEXT ·Xchguintptr(SB),NOSPLIT,$0-12 101 JMP ·Xchg(SB) 102 103 TEXT ·StorepNoWB(SB),NOSPLIT,$0-8 104 JMP ·Store(SB) 105 106 TEXT ·StoreRel(SB),NOSPLIT,$0-8 107 JMP ·Store(SB) 108 109 // void Or8(byte volatile*, byte); 110 TEXT ·Or8(SB),NOSPLIT,$0-5 111 MOVW ptr+0(FP), R1 112 MOVBU val+4(FP), R2 113 MOVW $~3, R3 // Align ptr down to 4 bytes so we can use 32-bit load/store. 114 AND R1, R3 115 #ifdef GOARCH_mips 116 // Big endian. ptr = ptr ^ 3 117 XOR $3, R1 118 #endif 119 AND $3, R1, R4 // R4 = ((ptr & 3) * 8) 120 SLL $3, R4 121 SLL R4, R2, R2 // Shift val for aligned ptr. R2 = val << R4 122 SYNC 123 try_or8: 124 LL (R3), R4 // R4 = *R3 125 OR R2, R4 126 SC R4, (R3) // *R3 = R4 127 BEQ R4, try_or8 128 SYNC 129 RET 130 131 // void And8(byte volatile*, byte); 132 TEXT ·And8(SB),NOSPLIT,$0-5 133 MOVW ptr+0(FP), R1 134 MOVBU val+4(FP), R2 135 MOVW $~3, R3 136 AND R1, R3 137 #ifdef GOARCH_mips 138 // Big endian. ptr = ptr ^ 3 139 XOR $3, R1 140 #endif 141 AND $3, R1, R4 // R4 = ((ptr & 3) * 8) 142 SLL $3, R4 143 MOVW $0xFF, R5 144 SLL R4, R2 145 SLL R4, R5 146 NOR R0, R5 147 OR R5, R2 // Shift val for aligned ptr. R2 = val << R4 | ^(0xFF << R4) 148 SYNC 149 try_and8: 150 LL (R3), R4 // R4 = *R3 151 AND R2, R4 152 SC R4, (R3) // *R3 = R4 153 BEQ R4, try_and8 154 SYNC 155 RET