gitlab.com/Raven-IO/raven-delve@v1.22.4/pkg/dwarf/regnum/ppc64le.go (about)

     1  package regnum
     2  
     3  import "fmt"
     4  
     5  // The mapping between hardware registers and DWARF registers is specified
     6  // in the 64-Bit ELF V2 ABI Specification of the Power Architecture in section
     7  // 2.4 DWARF Definition
     8  // https://openpowerfoundation.org/specifications/64bitelfabi/
     9  
    10  const (
    11  	// General Purpose Registers: from R0 to R31
    12  	PPC64LE_FIRST_GPR = 0
    13  	PPC64LE_R0        = PPC64LE_FIRST_GPR
    14  	PPC64LE_LAST_GPR  = 31
    15  	// Floating point registers: from F0 to F31
    16  	PPC64LE_FIRST_FPR = 32
    17  	PPC64LE_F0        = PPC64LE_FIRST_FPR
    18  	PPC64LE_LAST_FPR  = 63
    19  	// Vector (Altivec/VMX) registers: from V0 to V31
    20  	PPC64LE_FIRST_VMX = 77
    21  	PPC64LE_V0        = PPC64LE_FIRST_VMX
    22  	PPC64LE_LAST_VMX  = 108
    23  	// Vector Scalar (VSX) registers: from VS32 to VS63
    24  	// On ppc64le these are mapped to F0 to F31
    25  	PPC64LE_FIRST_VSX = 32
    26  	PPC64LE_VS0       = PPC64LE_FIRST_VSX
    27  	PPC64LE_LAST_VSX  = 63
    28  	// Condition Registers: from CR0 to CR7
    29  	PPC64LE_CR0 = 0
    30  	// Special registers
    31  	PPC64LE_SP = 1  // Stack frame pointer: Gpr[1]
    32  	PPC64LE_PC = 12 // The documentation refers to this as the CIA (Current Instruction Address)
    33  	PPC64LE_LR = 65 // Link register
    34  )
    35  
    36  func PPC64LEToName(num uint64) string {
    37  	switch {
    38  	case num == PPC64LE_SP:
    39  		return "SP"
    40  	case num == PPC64LE_PC:
    41  		return "PC"
    42  	case num == PPC64LE_LR:
    43  		return "LR"
    44  	case isGPR(num):
    45  		return fmt.Sprintf("r%d", int(num-PPC64LE_FIRST_GPR))
    46  	case isFPR(num):
    47  		return fmt.Sprintf("f%d", int(num-PPC64LE_FIRST_FPR))
    48  	case isVMX(num):
    49  		return fmt.Sprintf("v%d", int(num-PPC64LE_FIRST_VMX))
    50  	case isVSX(num):
    51  		return fmt.Sprintf("vs%d", int(num-PPC64LE_FIRST_VSX))
    52  	default:
    53  		return fmt.Sprintf("unknown%d", num)
    54  	}
    55  }
    56  
    57  // PPC64LEMaxRegNum is 172 registers in total, across 4 categories:
    58  // General Purpose Registers or GPR (32 GPR + 9 special registers)
    59  // Floating Point Registers or FPR (32 FPR + 1 special register)
    60  // Altivec/VMX Registers or VMX (32 VMX + 2 special registers)
    61  // VSX Registers or VSX (64 VSX)
    62  // Documentation: https://lldb.llvm.org/cpp_reference/RegisterContextPOSIX__ppc64le_8cpp_source.html
    63  func PPC64LEMaxRegNum() uint64 {
    64  	return 172
    65  }
    66  
    67  func isGPR(num uint64) bool {
    68  	return num < PPC64LE_LAST_GPR
    69  }
    70  
    71  func isFPR(num uint64) bool {
    72  	return num >= PPC64LE_FIRST_FPR && num <= PPC64LE_LAST_FPR
    73  }
    74  
    75  func isVMX(num uint64) bool {
    76  	return num >= PPC64LE_FIRST_VMX && num <= PPC64LE_LAST_VMX
    77  }
    78  
    79  func isVSX(num uint64) bool {
    80  	return num >= PPC64LE_FIRST_VSX && num <= PPC64LE_LAST_VSX
    81  }
    82  
    83  var PPC64LENameToDwarf = func() map[string]int {
    84  	r := make(map[string]int)
    85  
    86  	r["nip"] = PPC64LE_PC
    87  	r["sp"] = PPC64LE_SP
    88  	r["bp"] = PPC64LE_SP
    89  	r["link"] = PPC64LE_LR
    90  
    91  	// General Purpose Registers: from R0 to R31
    92  	for i := 0; i <= 31; i++ {
    93  		r[fmt.Sprintf("r%d", i)] = PPC64LE_R0 + i
    94  	}
    95  
    96  	// Floating point registers: from F0 to F31
    97  	for i := 0; i <= 31; i++ {
    98  		r[fmt.Sprintf("f%d", i)] = PPC64LE_F0 + i
    99  	}
   100  
   101  	// Vector (Altivec/VMX) registers: from V0 to V31
   102  	for i := 0; i <= 31; i++ {
   103  		r[fmt.Sprintf("v%d", i)] = PPC64LE_V0 + i
   104  	}
   105  
   106  	// Vector Scalar (VSX) registers: from VS0 to VS63
   107  	for i := 0; i <= 63; i++ {
   108  		r[fmt.Sprintf("vs%d", i)] = PPC64LE_VS0 + i
   109  	}
   110  
   111  	// Condition Registers: from CR0 to CR7
   112  	for i := 0; i <= 7; i++ {
   113  		r[fmt.Sprintf("cr%d", i)] = PPC64LE_CR0 + i
   114  	}
   115  	return r
   116  }()