gitlab.com/apertussolutions/u-root@v7.0.0+incompatible/cmds/core/msr/doc.go (about) 1 // Copyright 2018-2020 the u-root Authors. All rights reserved 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 // msr -- read and write MSRs with regular command or Forth 6 // 7 // Synopsis: 8 // msr [OPTIONS] r glob MSR 9 // msr [OPTIONS] w glob MSR value 10 // msr [OPTIONS] forth-word [forth-word ...] 11 // 12 // Description: 13 // This program reads and writes sets of MSRs, while allowing 14 // them to by changed on a core by core or collective basis. 15 // 16 // To read the msrs for 0 (sorry, the command is msr and the forth command 17 // is msr, making this a bit confusing): 18 // sudo msr 0 msr 0x3a reg rd 19 // Breaking that down: 20 // 0 - for cpu 0 21 // msr - for take the glob, in this case 0, and push all matching filenames on the stack 22 // 0x3a - for register 0x3a 23 // reg - convert to 32-bit integer and push 24 // rd - pop a 32-bit int and a []string and use them to read 1 or more MSRs 25 // 26 // for all: 27 // sudo msr "'*" msr 0x3a reg rd 28 // 29 // The "'" is needed to quote the * so forth does not think we're multiplying. 30 // 31 // Here is a breakdown, running msr with each command in turn: 32 // rminnich@xcpu:~/gopath/src/github.com/u-root/u-root/cmds/core/msr$ ./msr 0 33 // 0 34 // rminnich@xcpu:~/gopath/src/github.com/u-root/u-root/cmds/core/msr$ ./msr 0 msr 35 // [/dev/cpu/0/msr] 36 // rminnich@xcpu:~/gopath/src/github.com/u-root/u-root/cmds/core/msr$ ./msr 0 msr 0x3a 37 // [[/dev/cpu/0/msr] 0x3a] 38 // rminnich@xcpu:~/gopath/src/github.com/u-root/u-root/cmds/core/msr$ ./msr 0 msr 0x3a reg 39 // [[/dev/cpu/0/msr] 58] 40 // rminnich@xcpu:~/gopath/src/github.com/u-root/u-root/cmds/core/msr$ ./msr 0 msr 0x3a reg rd 41 // [0] 42 // rminnich@xcpu:~/gopath/src/github.com/u-root/u-root/cmds/core/msr$ 43 // 44 // To read, then write all of them 45 // (the dup is so we have the msr list at TOS -- it's just a convenience) 46 // sudo msr 0 msr dup 0x3a reg rd 0x3a reg swap 1 u64 or wr 47 // to just write them 48 // 49 // Also, note, all the types are checked by assertions. The reg has to be 50 // 32 bits, the val 64 51 // 52 // more examples: 53 // read reg 0x3a and leave the least of MSRs and values on TOS, to be 54 // printed at exit. 55 // 56 // sudo msr "'"* msr dup 0x3a reg rd 57 // [[/dev/cpu/0/msr /dev/cpu/1/msr /dev/cpu/2/msr /dev/cpu/3/msr] [5 5 5 5]] 58 // 59 // From there, the write is easy: 60 // sudo msr "'"* msr dup 0x3a reg rd 0x3a reg swap wr 61 // 62 // For convenience, we maintain the old read and write commands: 63 // msr r <glob> <register> 64 // msr w <glob> <register> <value> 65 // 66 // Yep, it's a bit inconvenient; the idea is that in the simple case, 67 // you will use the r and w commands. For programmatic cases, you can 68 // work to build up a working set of arguments. 69 // 70 // For example, I started with 71 // msr "'"* msr 72 // and, once I saw the MSR selection was OK, built the command up from 73 // there. At each step I could see the stack and whether I was going the 74 // right direction. 75 // 76 // The old commands remain: 77 // rminnich@xcpu:~/gopath/src/github.com/u-root/u-root/cmds/core/msr$ sudo ./msr r 0 0x3a 78 // [5] 79 // rminnich@xcpu:~/gopath/src/github.com/u-root/u-root/cmds/core/msr$ sudo ./msr w 0 0x3a 5 80 // [5] 81 // 82 // For a view of what Forth is doing, run with -d. 83 package main