golang.org/x/arch@v0.17.0/s390x/s390xasm/gnu.go (about) 1 // Copyright 2024 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 package s390xasm 6 7 // Instructions with extended mnemonics fall under various categories. 8 // To handle each of them in one single function, various different 9 // structure types are defined as below. Corresponding instruction 10 // structures are created with the help of these base structures. 11 // Different instruction types are as below: 12 13 // Typ1 - Instructions having different base and extended mnemonic strings. 14 // 15 // These instructions have single M-field value and single offset. 16 type typ1ExtndMnics struct { 17 BaseOpStr string 18 Value uint8 19 Offset uint8 20 ExtnOpStr string 21 } 22 23 // Typ2 - Instructions having couple of extra strings added to the base mnemonic string, 24 // 25 // depending on the condition code evaluation. 26 // These instructions have single M-field value and single offset. 27 type typ2ExtndMnics struct { 28 Value uint8 29 Offset uint8 30 ExtnOpStr string 31 } 32 33 // Typ3 - Instructions having couple of extra strings added to the base mnemonic string, 34 // 35 // depending on the condition code evaluation. 36 // These instructions have two M-field values and two offsets. 37 type typ3ExtndMnics struct { 38 Value1 uint8 39 Value2 uint8 40 Offset1 uint8 41 Offset2 uint8 42 ExtnOpStr string 43 } 44 45 // Typ4 - Instructions having different base and extended mnemonic strings. 46 // 47 // These instructions have two M-field values and two offsets. 48 type typ4ExtndMnics struct { 49 BaseOpStr string 50 Value1 uint8 51 Value2 uint8 52 Offset1 uint8 53 Offset2 uint8 54 ExtnOpStr string 55 } 56 57 // Typ5 - Instructions having different base and extended mnemonic strings. 58 // 59 // These instructions have three M-field values and three offsets. 60 type typ5ExtndMnics struct { 61 BaseOpStr string 62 Value1 uint8 63 Value2 uint8 64 Value3 uint8 65 Offset1 uint8 66 Offset2 uint8 67 Offset3 uint8 68 ExtnOpStr string 69 } 70 71 // "func Handleextndmnemonic" - This is the function where the extended mnemonic logic 72 // is implemented. This function defines various structures to keep a list of base 73 // instructions and their extended mnemonic strings. These structure will also have 74 // M-field values and offset values defined, based on their type. 75 // HandleExtndMnemonic takes "inst" structure as the input variable. 76 // Inst structure will have all the details related to an instruction. Based on the 77 // opcode base string, a switch-case statement is executed. In that, based on the 78 // M-field value and the offset value of that particular M-field, extended mnemonic 79 // string is either searched or constructed by adding couple of extra strings to the base 80 // opcode string from one of the structure defined below. 81 func HandleExtndMnemonic(inst *Inst) string { 82 83 brnchInstrExtndMnics := []typ1ExtndMnics{ 84 //BIC - BRANCH INDIRECT ON CONDITION instruction 85 typ1ExtndMnics{BaseOpStr: "bic", Value: 1, Offset: 0, ExtnOpStr: "bio"}, 86 typ1ExtndMnics{BaseOpStr: "bic", Value: 2, Offset: 0, ExtnOpStr: "bih"}, 87 typ1ExtndMnics{BaseOpStr: "bic", Value: 4, Offset: 0, ExtnOpStr: "bil"}, 88 typ1ExtndMnics{BaseOpStr: "bic", Value: 7, Offset: 0, ExtnOpStr: "bine"}, 89 typ1ExtndMnics{BaseOpStr: "bic", Value: 8, Offset: 0, ExtnOpStr: "bie"}, 90 typ1ExtndMnics{BaseOpStr: "bic", Value: 11, Offset: 0, ExtnOpStr: "binl"}, 91 typ1ExtndMnics{BaseOpStr: "bic", Value: 13, Offset: 0, ExtnOpStr: "binh"}, 92 typ1ExtndMnics{BaseOpStr: "bic", Value: 14, Offset: 0, ExtnOpStr: "bino"}, 93 typ1ExtndMnics{BaseOpStr: "bic", Value: 15, Offset: 0, ExtnOpStr: "bi"}, 94 95 //BCR - BRANCH ON CONDITION instruction 96 typ1ExtndMnics{BaseOpStr: "bcr", Value: 0, Offset: 0, ExtnOpStr: "nopr"}, 97 typ1ExtndMnics{BaseOpStr: "bcr", Value: 1, Offset: 0, ExtnOpStr: "bor"}, 98 typ1ExtndMnics{BaseOpStr: "bcr", Value: 2, Offset: 0, ExtnOpStr: "bhr"}, 99 typ1ExtndMnics{BaseOpStr: "bcr", Value: 4, Offset: 0, ExtnOpStr: "blr"}, 100 typ1ExtndMnics{BaseOpStr: "bcr", Value: 7, Offset: 0, ExtnOpStr: "bner"}, 101 typ1ExtndMnics{BaseOpStr: "bcr", Value: 8, Offset: 0, ExtnOpStr: "ber"}, 102 typ1ExtndMnics{BaseOpStr: "bcr", Value: 11, Offset: 0, ExtnOpStr: "bnlr"}, 103 typ1ExtndMnics{BaseOpStr: "bcr", Value: 13, Offset: 0, ExtnOpStr: "bnhr"}, 104 typ1ExtndMnics{BaseOpStr: "bcr", Value: 14, Offset: 0, ExtnOpStr: "bnor"}, 105 typ1ExtndMnics{BaseOpStr: "bcr", Value: 15, Offset: 0, ExtnOpStr: "br"}, 106 107 //BC - BRANCH ON CONDITION instruction 108 typ1ExtndMnics{BaseOpStr: "bc", Value: 0, Offset: 0, ExtnOpStr: "nopr"}, 109 typ1ExtndMnics{BaseOpStr: "bc", Value: 1, Offset: 0, ExtnOpStr: "bo"}, 110 typ1ExtndMnics{BaseOpStr: "bc", Value: 2, Offset: 0, ExtnOpStr: "bh"}, 111 typ1ExtndMnics{BaseOpStr: "bc", Value: 4, Offset: 0, ExtnOpStr: "bl"}, 112 typ1ExtndMnics{BaseOpStr: "bc", Value: 7, Offset: 0, ExtnOpStr: "bne"}, 113 typ1ExtndMnics{BaseOpStr: "bc", Value: 8, Offset: 0, ExtnOpStr: "be"}, 114 typ1ExtndMnics{BaseOpStr: "bc", Value: 11, Offset: 0, ExtnOpStr: "bnl"}, 115 typ1ExtndMnics{BaseOpStr: "bc", Value: 13, Offset: 0, ExtnOpStr: "bnh"}, 116 typ1ExtndMnics{BaseOpStr: "bc", Value: 14, Offset: 0, ExtnOpStr: "bno"}, 117 typ1ExtndMnics{BaseOpStr: "bc", Value: 15, Offset: 0, ExtnOpStr: "b"}, 118 119 //BRC - BRANCH RELATIVE ON CONDITION instruction 120 typ1ExtndMnics{BaseOpStr: "brc", Value: 0, Offset: 0, ExtnOpStr: "jnop"}, 121 typ1ExtndMnics{BaseOpStr: "brc", Value: 1, Offset: 0, ExtnOpStr: "jo"}, 122 typ1ExtndMnics{BaseOpStr: "brc", Value: 2, Offset: 0, ExtnOpStr: "jh"}, 123 typ1ExtndMnics{BaseOpStr: "brc", Value: 4, Offset: 0, ExtnOpStr: "jl"}, 124 typ1ExtndMnics{BaseOpStr: "brc", Value: 7, Offset: 0, ExtnOpStr: "jne"}, 125 typ1ExtndMnics{BaseOpStr: "brc", Value: 8, Offset: 0, ExtnOpStr: "je"}, 126 typ1ExtndMnics{BaseOpStr: "brc", Value: 11, Offset: 0, ExtnOpStr: "jnl"}, 127 typ1ExtndMnics{BaseOpStr: "brc", Value: 13, Offset: 0, ExtnOpStr: "jnh"}, 128 typ1ExtndMnics{BaseOpStr: "brc", Value: 14, Offset: 0, ExtnOpStr: "jno"}, 129 typ1ExtndMnics{BaseOpStr: "brc", Value: 15, Offset: 0, ExtnOpStr: "j"}, 130 131 //BRCL - BRANCH RELATIVE ON CONDITION LONG instruction 132 typ1ExtndMnics{BaseOpStr: "brcl", Value: 0, Offset: 0, ExtnOpStr: "jgnop"}, 133 typ1ExtndMnics{BaseOpStr: "brcl", Value: 1, Offset: 0, ExtnOpStr: "jgo"}, 134 typ1ExtndMnics{BaseOpStr: "brcl", Value: 2, Offset: 0, ExtnOpStr: "jgh"}, 135 typ1ExtndMnics{BaseOpStr: "brcl", Value: 4, Offset: 0, ExtnOpStr: "jgl"}, 136 typ1ExtndMnics{BaseOpStr: "brcl", Value: 7, Offset: 0, ExtnOpStr: "jgne"}, 137 typ1ExtndMnics{BaseOpStr: "brcl", Value: 8, Offset: 0, ExtnOpStr: "jge"}, 138 typ1ExtndMnics{BaseOpStr: "brcl", Value: 11, Offset: 0, ExtnOpStr: "jgnl"}, 139 typ1ExtndMnics{BaseOpStr: "brcl", Value: 13, Offset: 0, ExtnOpStr: "jgnh"}, 140 typ1ExtndMnics{BaseOpStr: "brcl", Value: 14, Offset: 0, ExtnOpStr: "jgno"}, 141 typ1ExtndMnics{BaseOpStr: "brcl", Value: 15, Offset: 0, ExtnOpStr: "jg"}, 142 } 143 144 //Compare instructions 145 cmpInstrExtndMnics := []typ2ExtndMnics{ 146 typ2ExtndMnics{Value: 2, Offset: 2, ExtnOpStr: "h"}, 147 typ2ExtndMnics{Value: 4, Offset: 2, ExtnOpStr: "l"}, 148 typ2ExtndMnics{Value: 6, Offset: 2, ExtnOpStr: "ne"}, 149 typ2ExtndMnics{Value: 8, Offset: 2, ExtnOpStr: "e"}, 150 typ2ExtndMnics{Value: 10, Offset: 2, ExtnOpStr: "nl"}, 151 typ2ExtndMnics{Value: 12, Offset: 2, ExtnOpStr: "nh"}, 152 } 153 154 //Load and Store instructions 155 ldSt_InstrExtndMnics := []typ2ExtndMnics{ 156 typ2ExtndMnics{Value: 1, Offset: 2, ExtnOpStr: "o"}, 157 typ2ExtndMnics{Value: 2, Offset: 2, ExtnOpStr: "h"}, 158 typ2ExtndMnics{Value: 3, Offset: 2, ExtnOpStr: "nle"}, 159 typ2ExtndMnics{Value: 4, Offset: 2, ExtnOpStr: "l"}, 160 typ2ExtndMnics{Value: 5, Offset: 2, ExtnOpStr: "nhe"}, 161 typ2ExtndMnics{Value: 6, Offset: 2, ExtnOpStr: "lh"}, 162 typ2ExtndMnics{Value: 7, Offset: 2, ExtnOpStr: "ne"}, 163 typ2ExtndMnics{Value: 8, Offset: 2, ExtnOpStr: "e"}, 164 typ2ExtndMnics{Value: 9, Offset: 2, ExtnOpStr: "nlh"}, 165 typ2ExtndMnics{Value: 10, Offset: 2, ExtnOpStr: "he"}, 166 typ2ExtndMnics{Value: 11, Offset: 2, ExtnOpStr: "nl"}, 167 typ2ExtndMnics{Value: 12, Offset: 2, ExtnOpStr: "le"}, 168 typ2ExtndMnics{Value: 13, Offset: 2, ExtnOpStr: "nh"}, 169 typ2ExtndMnics{Value: 14, Offset: 2, ExtnOpStr: "no"}, 170 } 171 172 vecInstrExtndMnics := []typ2ExtndMnics{ 173 typ2ExtndMnics{Value: 0, Offset: 3, ExtnOpStr: "b"}, 174 typ2ExtndMnics{Value: 1, Offset: 3, ExtnOpStr: "h"}, 175 typ2ExtndMnics{Value: 2, Offset: 3, ExtnOpStr: "f"}, 176 typ2ExtndMnics{Value: 3, Offset: 3, ExtnOpStr: "g"}, 177 typ2ExtndMnics{Value: 4, Offset: 3, ExtnOpStr: "q"}, 178 typ2ExtndMnics{Value: 6, Offset: 3, ExtnOpStr: "lf"}, 179 } 180 181 //VCEQ, VCH, VCHL 182 vec2InstrExtndMnics := []typ3ExtndMnics{ 183 typ3ExtndMnics{Value1: 0, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "b"}, 184 typ3ExtndMnics{Value1: 1, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "h"}, 185 typ3ExtndMnics{Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "f"}, 186 typ3ExtndMnics{Value1: 3, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "g"}, 187 typ3ExtndMnics{Value1: 0, Value2: 1, Offset1: 3, Offset2: 4, ExtnOpStr: "bs"}, 188 typ3ExtndMnics{Value1: 1, Value2: 1, Offset1: 3, Offset2: 4, ExtnOpStr: "hs"}, 189 typ3ExtndMnics{Value1: 2, Value2: 1, Offset1: 3, Offset2: 4, ExtnOpStr: "fs"}, 190 typ3ExtndMnics{Value1: 3, Value2: 1, Offset1: 3, Offset2: 4, ExtnOpStr: "gs"}, 191 } 192 193 //VFAE, VFEE, VFENE 194 vec21InstrExtndMnics := []typ3ExtndMnics{ 195 typ3ExtndMnics{Value1: 0, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "b"}, 196 typ3ExtndMnics{Value1: 1, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "h"}, 197 typ3ExtndMnics{Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "f"}, 198 typ3ExtndMnics{Value1: 0, Value2: 1, Offset1: 3, Offset2: 4, ExtnOpStr: "bs"}, 199 typ3ExtndMnics{Value1: 1, Value2: 1, Offset1: 3, Offset2: 4, ExtnOpStr: "hs"}, 200 typ3ExtndMnics{Value1: 2, Value2: 1, Offset1: 3, Offset2: 4, ExtnOpStr: "fs"}, 201 typ3ExtndMnics{Value1: 0, Value2: 2, Offset1: 3, Offset2: 4, ExtnOpStr: "zb"}, 202 typ3ExtndMnics{Value1: 1, Value2: 2, Offset1: 3, Offset2: 4, ExtnOpStr: "zh"}, 203 typ3ExtndMnics{Value1: 2, Value2: 2, Offset1: 3, Offset2: 4, ExtnOpStr: "zf"}, 204 typ3ExtndMnics{Value1: 0, Value2: 3, Offset1: 3, Offset2: 4, ExtnOpStr: "zbs"}, 205 typ3ExtndMnics{Value1: 1, Value2: 3, Offset1: 3, Offset2: 4, ExtnOpStr: "zhs"}, 206 typ3ExtndMnics{Value1: 2, Value2: 3, Offset1: 3, Offset2: 4, ExtnOpStr: "zfs"}, 207 } 208 209 vec3InstrExtndMnics := []typ3ExtndMnics{ 210 typ3ExtndMnics{Value1: 2, Value2: 0, Offset1: 2, Offset2: 3, ExtnOpStr: "sb"}, 211 typ3ExtndMnics{Value1: 3, Value2: 0, Offset1: 2, Offset2: 3, ExtnOpStr: "db"}, 212 typ3ExtndMnics{Value1: 4, Value2: 0, Offset1: 2, Offset2: 3, ExtnOpStr: "xb"}, 213 } 214 215 vec4InstrExtndMnics := []typ4ExtndMnics{ 216 // VFA - VECTOR FP ADD 217 typ4ExtndMnics{BaseOpStr: "vfa", Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfasb"}, 218 typ4ExtndMnics{BaseOpStr: "vfa", Value1: 3, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfadb"}, 219 typ4ExtndMnics{BaseOpStr: "vfa", Value1: 2, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfasb"}, 220 typ4ExtndMnics{BaseOpStr: "vfa", Value1: 3, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfadb"}, 221 typ4ExtndMnics{BaseOpStr: "vfa", Value1: 4, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfaxb"}, 222 223 // VFD - VECTOR FP DIVIDE 224 typ4ExtndMnics{BaseOpStr: "vfd", Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfdsb"}, 225 typ4ExtndMnics{BaseOpStr: "vfd", Value1: 3, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfddb"}, 226 typ4ExtndMnics{BaseOpStr: "vfd", Value1: 2, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfdsb"}, 227 typ4ExtndMnics{BaseOpStr: "vfd", Value1: 3, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfddb"}, 228 typ4ExtndMnics{BaseOpStr: "vfd", Value1: 4, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfdxb"}, 229 230 // VFLL - VECTOR FP LOAD LENGTHENED 231 typ4ExtndMnics{BaseOpStr: "vfll", Value1: 2, Value2: 0, Offset1: 2, Offset2: 3, ExtnOpStr: "vflfs"}, 232 typ4ExtndMnics{BaseOpStr: "vfll", Value1: 2, Value2: 8, Offset1: 2, Offset2: 3, ExtnOpStr: "wflls"}, 233 typ4ExtndMnics{BaseOpStr: "vfll", Value1: 3, Value2: 8, Offset1: 2, Offset2: 3, ExtnOpStr: "wflld"}, 234 235 // VFMAX - VECTOR FP MAXIMUM 236 typ4ExtndMnics{BaseOpStr: "vfmax", Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfmaxsb"}, 237 typ4ExtndMnics{BaseOpStr: "vfmax", Value1: 3, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfmaxdb"}, 238 typ4ExtndMnics{BaseOpStr: "vfmax", Value1: 2, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfmaxsb"}, 239 typ4ExtndMnics{BaseOpStr: "vfmax", Value1: 3, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfmaxdb"}, 240 typ4ExtndMnics{BaseOpStr: "vfmax", Value1: 4, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfmaxxb"}, 241 242 // VFMIN - VECTOR FP MINIMUM 243 typ4ExtndMnics{BaseOpStr: "vfmin", Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfminsb"}, 244 typ4ExtndMnics{BaseOpStr: "vfmin", Value1: 3, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfmindb"}, 245 typ4ExtndMnics{BaseOpStr: "vfmin", Value1: 2, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfminsb"}, 246 typ4ExtndMnics{BaseOpStr: "vfmin", Value1: 3, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfmindb"}, 247 typ4ExtndMnics{BaseOpStr: "vfmin", Value1: 4, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfminxb"}, 248 249 // VFM - VECTOR FP MULTIPLY 250 typ4ExtndMnics{BaseOpStr: "vfm", Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfmsb"}, 251 typ4ExtndMnics{BaseOpStr: "vfm", Value1: 3, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfmdb"}, 252 typ4ExtndMnics{BaseOpStr: "vfm", Value1: 2, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfmsb"}, 253 typ4ExtndMnics{BaseOpStr: "vfm", Value1: 3, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfmdb"}, 254 typ4ExtndMnics{BaseOpStr: "vfm", Value1: 4, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfmxb"}, 255 256 // VFSQ - VECTOR FP SQUARE ROOT 257 typ4ExtndMnics{BaseOpStr: "vfsq", Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfsqsb"}, 258 typ4ExtndMnics{BaseOpStr: "vfsq", Value1: 3, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfsqdb"}, 259 typ4ExtndMnics{BaseOpStr: "vfsq", Value1: 2, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfsqsb"}, 260 typ4ExtndMnics{BaseOpStr: "vfsq", Value1: 3, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfsqdb"}, 261 typ4ExtndMnics{BaseOpStr: "vfsq", Value1: 4, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfsqxb"}, 262 263 // VFS - VECTOR FP SUBTRACT 264 typ4ExtndMnics{BaseOpStr: "vfs", Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfssb"}, 265 typ4ExtndMnics{BaseOpStr: "vfs", Value1: 3, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vfsdb"}, 266 typ4ExtndMnics{BaseOpStr: "vfs", Value1: 2, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfssb"}, 267 typ4ExtndMnics{BaseOpStr: "vfs", Value1: 3, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfsdb"}, 268 typ4ExtndMnics{BaseOpStr: "vfs", Value1: 4, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wfsxb"}, 269 270 // VFTCI - VECTOR FP TEST DATA CLASS IMMEDIATE 271 typ4ExtndMnics{BaseOpStr: "vftci", Value1: 2, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vftcisb"}, 272 typ4ExtndMnics{BaseOpStr: "vftci", Value1: 3, Value2: 0, Offset1: 3, Offset2: 4, ExtnOpStr: "vftcidb"}, 273 typ4ExtndMnics{BaseOpStr: "vftci", Value1: 2, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wftcisb"}, 274 typ4ExtndMnics{BaseOpStr: "vftci", Value1: 3, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wftcidb"}, 275 typ4ExtndMnics{BaseOpStr: "vftci", Value1: 4, Value2: 8, Offset1: 3, Offset2: 4, ExtnOpStr: "wftcixb"}, 276 } 277 278 vec6InstrExtndMnics := []typ5ExtndMnics{ 279 // VFCE - VECTOR FP COMPARE EQUAL 280 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 2, Value2: 0, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfcesb"}, 281 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 2, Value2: 0, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfcesbs"}, 282 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 3, Value2: 0, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfcedb"}, 283 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 3, Value2: 0, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfcedbs"}, 284 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 2, Value2: 8, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfcesb"}, 285 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 2, Value2: 8, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfcesbs"}, 286 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 3, Value2: 8, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfcedb"}, 287 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 3, Value2: 8, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfcedbs"}, 288 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 4, Value2: 8, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfcexb"}, 289 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 4, Value2: 8, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfcexbs"}, 290 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 2, Value2: 4, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkesb"}, 291 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 2, Value2: 4, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkesbs"}, 292 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 3, Value2: 4, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkedb"}, 293 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 3, Value2: 4, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkedbs"}, 294 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 2, Value2: 12, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkesb"}, 295 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 2, Value2: 12, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkesbs"}, 296 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 3, Value2: 12, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkedb"}, 297 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 3, Value2: 12, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkedbs"}, 298 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 4, Value2: 12, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkexb"}, 299 typ5ExtndMnics{BaseOpStr: "vfce", Value1: 4, Value2: 12, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkexbs"}, 300 301 // VFCH - VECTOR FP COMPARE HIGH 302 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 2, Value2: 0, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfchsb"}, 303 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 2, Value2: 0, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfchsbs"}, 304 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 3, Value2: 0, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfchdb"}, 305 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 3, Value2: 0, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfchdbs"}, 306 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 2, Value2: 8, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchsb"}, 307 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 2, Value2: 8, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchsbs"}, 308 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 3, Value2: 8, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchdb"}, 309 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 3, Value2: 8, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchdbs"}, 310 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 4, Value2: 8, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchxb"}, 311 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 4, Value2: 8, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchxbs"}, 312 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 2, Value2: 4, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkhsb"}, 313 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 2, Value2: 4, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkhsbs"}, 314 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 3, Value2: 4, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkhdb"}, 315 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 3, Value2: 4, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkhdbs"}, 316 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 2, Value2: 12, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhsb"}, 317 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 2, Value2: 12, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhsbs"}, 318 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 3, Value2: 12, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhdb"}, 319 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 3, Value2: 12, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhdbs"}, 320 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 4, Value2: 12, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhxb"}, 321 typ5ExtndMnics{BaseOpStr: "vfch", Value1: 4, Value2: 12, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhxbs"}, 322 323 // VFCHE - VECTOR FP COMPARE HIGH OR EQUAL 324 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 2, Value2: 0, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfchesb"}, 325 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 2, Value2: 0, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfchesbs"}, 326 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 3, Value2: 0, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfchedb"}, 327 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 3, Value2: 0, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfchedbs"}, 328 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 2, Value2: 8, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchesb"}, 329 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 2, Value2: 8, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchesbs"}, 330 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 3, Value2: 8, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchedb"}, 331 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 3, Value2: 8, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchedbs"}, 332 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 4, Value2: 8, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchexb"}, 333 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 4, Value2: 8, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfchexbs"}, 334 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 2, Value2: 4, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkhesb"}, 335 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 2, Value2: 4, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkhesbs"}, 336 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 3, Value2: 4, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkhedb"}, 337 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 3, Value2: 4, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "vfkhedbs"}, 338 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 2, Value2: 12, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhesb"}, 339 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 2, Value2: 12, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhesbs"}, 340 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 3, Value2: 12, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhedb"}, 341 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 3, Value2: 12, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhedbs"}, 342 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 4, Value2: 12, Value3: 0, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhexb"}, 343 typ5ExtndMnics{BaseOpStr: "vfche", Value1: 4, Value2: 12, Value3: 1, Offset1: 3, Offset2: 4, Offset3: 5, ExtnOpStr: "wfkhexbs"}, 344 345 // VFPSO - VECTOR FP PERFORM SIGN OPERATION 346 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 2, Value2: 0, Value3: 0, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "vflcsb"}, 347 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 2, Value2: 8, Value3: 0, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "wflcsb"}, 348 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 2, Value2: 0, Value3: 1, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "vflnsb"}, 349 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 2, Value2: 8, Value3: 1, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "wflnsb"}, 350 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 2, Value2: 0, Value3: 2, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "vflpsb"}, 351 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 2, Value2: 8, Value3: 2, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "wflpsb"}, 352 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 3, Value2: 0, Value3: 0, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "vflcdb"}, 353 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 3, Value2: 8, Value3: 0, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "wflcdb"}, 354 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 3, Value2: 0, Value3: 1, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "vflndb"}, 355 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 3, Value2: 8, Value3: 1, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "wflndb"}, 356 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 3, Value2: 0, Value3: 2, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "vflpdb"}, 357 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 3, Value2: 8, Value3: 2, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "wflpdb"}, 358 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 4, Value2: 8, Value3: 0, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "wflcxb"}, 359 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 4, Value2: 8, Value3: 1, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "wflnxb"}, 360 typ5ExtndMnics{BaseOpStr: "vfpso", Value1: 4, Value2: 8, Value3: 2, Offset1: 2, Offset2: 3, Offset3: 4, ExtnOpStr: "wflpxb"}, 361 } 362 363 vec7InstrExtndMnics := []typ4ExtndMnics{ 364 // VFMA - VECTOR FP MULTIPLY AND ADD 365 typ4ExtndMnics{BaseOpStr: "vfma", Value1: 0, Value2: 2, Offset1: 4, Offset2: 5, ExtnOpStr: "vfmasb"}, 366 typ4ExtndMnics{BaseOpStr: "vfma", Value1: 0, Value2: 3, Offset1: 4, Offset2: 5, ExtnOpStr: "vfmadb"}, 367 typ4ExtndMnics{BaseOpStr: "vfma", Value1: 8, Value2: 2, Offset1: 4, Offset2: 5, ExtnOpStr: "wfmasb"}, 368 typ4ExtndMnics{BaseOpStr: "vfma", Value1: 8, Value2: 3, Offset1: 4, Offset2: 5, ExtnOpStr: "wfmadb"}, 369 typ4ExtndMnics{BaseOpStr: "vfma", Value1: 8, Value2: 4, Offset1: 4, Offset2: 5, ExtnOpStr: "wfmaxb"}, 370 371 // VFMS - VECTOR FP MULTIPLY AND SUBTRACT 372 typ4ExtndMnics{BaseOpStr: "vfms", Value1: 0, Value2: 2, Offset1: 4, Offset2: 5, ExtnOpStr: "vfmssb"}, 373 typ4ExtndMnics{BaseOpStr: "vfms", Value1: 0, Value2: 3, Offset1: 4, Offset2: 5, ExtnOpStr: "vfmsdb"}, 374 typ4ExtndMnics{BaseOpStr: "vfms", Value1: 8, Value2: 2, Offset1: 4, Offset2: 5, ExtnOpStr: "wfmssb"}, 375 typ4ExtndMnics{BaseOpStr: "vfms", Value1: 8, Value2: 3, Offset1: 4, Offset2: 5, ExtnOpStr: "wfmsdb"}, 376 typ4ExtndMnics{BaseOpStr: "vfms", Value1: 8, Value2: 4, Offset1: 4, Offset2: 5, ExtnOpStr: "wfmsxb"}, 377 378 // VFNMA - VECTOR FP NEGATIVE MULTIPLY AND ADD 379 typ4ExtndMnics{BaseOpStr: "vfnma", Value1: 0, Value2: 2, Offset1: 4, Offset2: 5, ExtnOpStr: "vfnmasb"}, 380 typ4ExtndMnics{BaseOpStr: "vfnma", Value1: 0, Value2: 3, Offset1: 4, Offset2: 5, ExtnOpStr: "vfnmadb"}, 381 typ4ExtndMnics{BaseOpStr: "vfnma", Value1: 8, Value2: 2, Offset1: 4, Offset2: 5, ExtnOpStr: "wfnmasb"}, 382 typ4ExtndMnics{BaseOpStr: "vfnma", Value1: 8, Value2: 3, Offset1: 4, Offset2: 5, ExtnOpStr: "wfnmadb"}, 383 typ4ExtndMnics{BaseOpStr: "vfnma", Value1: 8, Value2: 4, Offset1: 4, Offset2: 5, ExtnOpStr: "wfnmaxb"}, 384 385 // VFNMS - VECTOR FP NEGATIVE MULTIPLY AND SUBTRACT 386 typ4ExtndMnics{BaseOpStr: "vfnms", Value1: 0, Value2: 2, Offset1: 4, Offset2: 5, ExtnOpStr: "vfnmssb"}, 387 typ4ExtndMnics{BaseOpStr: "vfnms", Value1: 0, Value2: 3, Offset1: 4, Offset2: 5, ExtnOpStr: "vfnmsdb"}, 388 typ4ExtndMnics{BaseOpStr: "vfnms", Value1: 8, Value2: 2, Offset1: 4, Offset2: 5, ExtnOpStr: "wfnmssb"}, 389 typ4ExtndMnics{BaseOpStr: "vfnms", Value1: 8, Value2: 3, Offset1: 4, Offset2: 5, ExtnOpStr: "wfnmsdb"}, 390 typ4ExtndMnics{BaseOpStr: "vfnms", Value1: 8, Value2: 4, Offset1: 4, Offset2: 5, ExtnOpStr: "wfnmsxb"}, 391 } 392 393 opString := inst.Op.String() 394 newOpStr := opString 395 396 if inst.Enc == 0 { 397 return ".long 0x0" 398 } else if inst.Op == 0 { 399 return "error: unknown instruction" 400 } 401 402 switch opString { 403 // Case to handle all "branch" instructions with one M-field operand 404 case "bic", "bcr", "bc", "brc", "brcl": 405 406 for i := 0; i < len(brnchInstrExtndMnics); i++ { 407 if opString == brnchInstrExtndMnics[i].BaseOpStr && 408 uint8(inst.Args[brnchInstrExtndMnics[i].Offset].(Mask)) == brnchInstrExtndMnics[i].Value { 409 newOpStr = brnchInstrExtndMnics[i].ExtnOpStr 410 removeArg(inst, int8(brnchInstrExtndMnics[i].Offset)) 411 break 412 } 413 } 414 415 // Case to handle all "compare" instructions with one M-field operand 416 case "crb", "cgrb", "crj", "cgrj", "crt", "cgrt", "cib", "cgib", "cij", "cgij", "cit", "cgit", "clrb", "clgrb", 417 "clrj", "clgrj", "clrt", "clgrt", "clt", "clgt", "clib", "clgib", "clij", "clgij", "clfit", "clgit": 418 419 for i := 0; i < len(cmpInstrExtndMnics); i++ { 420 //For CLT and CLGT instructions, M-value is the second operand. 421 //Hence, set the offset to "1" 422 if opString == "clt" || opString == "clgt" { 423 cmpInstrExtndMnics[i].Offset = 1 424 } 425 426 if uint8(inst.Args[cmpInstrExtndMnics[i].Offset].(Mask)) == cmpInstrExtndMnics[i].Value { 427 newOpStr = opString + cmpInstrExtndMnics[i].ExtnOpStr 428 removeArg(inst, int8(cmpInstrExtndMnics[i].Offset)) 429 break 430 } 431 } 432 433 // Case to handle all "load" and "store" instructions with one M-field operand 434 case "lochhi", "lochi", "locghi", "locfhr", "locfh", "locr", "locgr", "loc", 435 "locg", "selr", "selgr", "selfhr", "stocfh", "stoc", "stocg": 436 437 for i := 0; i < len(ldSt_InstrExtndMnics); i++ { 438 439 //For LOCFH, LOC, LOCG, SELR, SELGR, SELFHR, STOCFH, STOC, STOCG instructions, 440 //M-value is the forth operand. Hence, set the offset to "3" 441 if opString == "locfh" || opString == "loc" || opString == "locg" || opString == "selr" || opString == "selgr" || 442 opString == "selfhr" || opString == "stocfh" || opString == "stoc" || opString == "stocg" { 443 ldSt_InstrExtndMnics[i].Offset = 3 444 } 445 446 if uint8(inst.Args[ldSt_InstrExtndMnics[i].Offset].(Mask)) == ldSt_InstrExtndMnics[i].Value { 447 newOpStr = opString + ldSt_InstrExtndMnics[i].ExtnOpStr 448 removeArg(inst, int8(ldSt_InstrExtndMnics[i].Offset)) 449 break 450 } 451 } 452 453 // Case to handle all "vector" instructions with one M-field operand 454 case "vavg", "vavgl", "verllv", "veslv", "vesrav", "vesrlv", "vgfm", "vgm", "vmx", "vmxl", "vmrh", "vmrl", "vmn", "vmnl", "vrep", 455 "vclz", "vctz", "vec", "vecl", "vlc", "vlp", "vpopct", "vrepi", "verim", "verll", "vesl", "vesra", "vesrl", "vgfma", "vlrep", 456 "vlgv", "vlvg", "vlbrrep", "vler", "vlbr", "vstbr", "vster", "vpk", "vme", "vmh", "vmle", "vmlh", "vmlo", "vml", "vmo", "vmae", 457 "vmale", "vmalo", "vmal", "vmah", "vmalh", "vmao", "vmph", "vmplh", "vupl", "vupll", "vscbi", "vs", "vsum", "vsumg", "vsumq", "va", "vacc": 458 459 switch opString { 460 461 case "vavg", "vavgl", "verllv", "veslv", "vesrav", "vesrlv", "vgfm", "vgm", "vmx", "vmxl", "vmrh", "vmrl", "vmn", "vmnl", "vrep": 462 //M-field is 3rd arg for all these instructions. Hence, set the offset to "2" 463 for i := 0; i < len(vecInstrExtndMnics)-2; i++ { // 0,1,2,3 464 if uint8(inst.Args[vecInstrExtndMnics[i].Offset].(Mask)) == vecInstrExtndMnics[i].Value { 465 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 466 removeArg(inst, int8(vecInstrExtndMnics[i].Offset)) 467 break 468 } 469 } 470 471 case "vclz", "vctz", "vec", "vecl", "vlc", "vlp", "vpopct", "vrepi": 472 for i := 0; i < len(vecInstrExtndMnics)-2; i++ { //0,1,2,3 473 if uint8(inst.Args[vecInstrExtndMnics[i].Offset-1].(Mask)) == vecInstrExtndMnics[i].Value { 474 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 475 removeArg(inst, int8(vecInstrExtndMnics[i].Offset-1)) 476 break 477 } 478 } 479 480 case "verim", "verll", "vesl", "vesra", "vesrl", "vgfma", "vlrep": 481 for i := 0; i < len(vecInstrExtndMnics)-2; i++ { //0,1,2,3 482 if uint8(inst.Args[vecInstrExtndMnics[i].Offset+1].(Mask)) == vecInstrExtndMnics[i].Value { 483 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 484 removeArg(inst, int8(vecInstrExtndMnics[i].Offset+1)) 485 break 486 } 487 } 488 489 case "vlgv", "vlvg": 490 for i := 0; i < len(vecInstrExtndMnics)-2; i++ { 491 if uint8(inst.Args[vecInstrExtndMnics[i].Offset+1].(Mask)) == vecInstrExtndMnics[i].Value { 492 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 493 removeArg(inst, int8(vecInstrExtndMnics[i].Offset+1)) 494 break 495 } 496 } 497 498 case "vlbrrep", "vler", "vster": 499 for i := 1; i < len(vecInstrExtndMnics)-2; i++ { 500 if uint8(inst.Args[vecInstrExtndMnics[i].Offset+1].(Mask)) == vecInstrExtndMnics[i].Value { 501 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 502 removeArg(inst, int8(vecInstrExtndMnics[i].Offset+1)) 503 break 504 } 505 } 506 507 case "vpk": 508 for i := 1; i < len(vecInstrExtndMnics)-2; i++ { 509 if uint8(inst.Args[vecInstrExtndMnics[i].Offset].(Mask)) == vecInstrExtndMnics[i].Value { 510 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 511 removeArg(inst, int8(vecInstrExtndMnics[i].Offset)) 512 break 513 } 514 } 515 516 case "vlbr", "vstbr": 517 for i := 1; i < len(vecInstrExtndMnics)-1; i++ { 518 if uint8(inst.Args[vecInstrExtndMnics[i].Offset+1].(Mask)) == vecInstrExtndMnics[i].Value { 519 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 520 removeArg(inst, int8(vecInstrExtndMnics[i].Offset+1)) 521 break 522 } 523 } 524 case "vme", "vmh", "vmle", "vmlh", "vmlo", "vmo": 525 for i := 0; i < len(vecInstrExtndMnics)-3; i++ { //0,1,2 526 if uint8(inst.Args[vecInstrExtndMnics[i].Offset].(Mask)) == vecInstrExtndMnics[i].Value { 527 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 528 removeArg(inst, int8(vecInstrExtndMnics[i].Offset)) 529 break 530 } 531 } 532 533 case "vml": 534 for i := 0; i < len(vecInstrExtndMnics)-3; i++ { //0,1,2 535 if uint8(inst.Args[vecInstrExtndMnics[i].Offset].(Mask)) == vecInstrExtndMnics[i].Value { 536 if uint8(inst.Args[vecInstrExtndMnics[i].Offset].(Mask)) == 1 { 537 newOpStr = opString + string("hw") 538 } else { 539 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 540 } 541 removeArg(inst, int8(vecInstrExtndMnics[i].Offset)) 542 break 543 } 544 } 545 546 case "vmae", "vmale", "vmalo", "vmal", "vmah", "vmalh", "vmao": 547 for i := 0; i < len(vecInstrExtndMnics)-3; i++ { //0,1,2 548 if uint8(inst.Args[vecInstrExtndMnics[i].Offset+1].(Mask)) == vecInstrExtndMnics[i].Value { 549 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 550 removeArg(inst, int8(vecInstrExtndMnics[i].Offset+1)) 551 break 552 } 553 } 554 555 case "vmph", "vmplh", "vupl", "vupll": //0,1,2 556 for i := 0; i < len(vecInstrExtndMnics)-3; i++ { 557 if uint8(inst.Args[vecInstrExtndMnics[i].Offset-1].(Mask)) == vecInstrExtndMnics[i].Value { 558 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 559 removeArg(inst, int8(vecInstrExtndMnics[i].Offset-1)) 560 break 561 } 562 } 563 564 case "vscbi", "vs", "va", "vacc": // 0,1,2,3,4 565 for i := 0; i < len(vecInstrExtndMnics)-1; i++ { 566 if uint8(inst.Args[vecInstrExtndMnics[i].Offset].(Mask)) == vecInstrExtndMnics[i].Value { 567 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 568 removeArg(inst, int8(vecInstrExtndMnics[i].Offset)) 569 break 570 } 571 } 572 case "vsum", "vsumg", "vsumq": 573 var off int 574 switch opString { 575 case "vsum": 576 off = 0 577 case "vsumg": 578 off = 1 579 case "vsumq": 580 off = 2 581 582 } 583 for i := off; i < len(vecInstrExtndMnics)-4+off; i++ { 584 if uint8(inst.Args[vecInstrExtndMnics[i].Offset].(Mask)) == vecInstrExtndMnics[i].Value { 585 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 586 removeArg(inst, int8(vecInstrExtndMnics[i].Offset)) 587 break 588 } 589 } 590 } 591 592 case "vllez": 593 for i := 0; i < len(vecInstrExtndMnics); i++ { 594 if i == 4 { 595 continue 596 } 597 if uint8(inst.Args[vecInstrExtndMnics[i].Offset+1].(Mask)) == vecInstrExtndMnics[i].Value { 598 newOpStr = opString + vecInstrExtndMnics[i].ExtnOpStr 599 removeArg(inst, int8(vecInstrExtndMnics[i].Offset+1)) 600 break 601 } 602 } 603 604 case "vgbm": 605 if uint16(inst.Args[1].(Imm)) == uint16(0) { 606 newOpStr = "vzeo" 607 removeArg(inst, int8(1)) 608 } else if uint16(inst.Args[1].(Imm)) == uint16(0xFFFF) { 609 newOpStr = "vone" 610 removeArg(inst, int8(1)) 611 } 612 case "vno": 613 if uint8(inst.Args[1].(VReg)) == uint8(inst.Args[2].(VReg)) { //Bitwise Not instruction(VNOT) if V2 equal to v3 614 newOpStr = opString + "t" 615 removeArg(inst, int8(2)) 616 } 617 618 case "vmsl": 619 if uint8(inst.Args[4].(Mask)) == uint8(3) { 620 newOpStr = opString + "g" 621 removeArg(inst, int8(4)) 622 } 623 624 case "vflr": 625 if uint8(inst.Args[2].(Mask)) == uint8(3) && ((inst.Args[3].(Mask)>>3)&0x1 == 0x1) { 626 inst.Args[3] = (inst.Args[3].(Mask) ^ 0x8) 627 newOpStr = "wflrd" 628 removeArg(inst, int8(2)) 629 } else if uint8(inst.Args[2].(Mask)) == uint8(4) && ((inst.Args[3].(Mask)>>3)&0x1 == 0x1) { 630 inst.Args[3] = (inst.Args[3].(Mask) ^ 0x8) 631 newOpStr = "wflrx" 632 removeArg(inst, int8(2)) 633 } else if uint8(inst.Args[2].(Mask)) == uint8(3) { 634 newOpStr = "vflrd" 635 removeArg(inst, int8(2)) 636 } 637 638 case "vllebrz": 639 if uint8(inst.Args[4].(Mask)) == uint8(1) { 640 newOpStr = opString + "h" 641 removeArg(inst, int8(4)) 642 } else if uint8(inst.Args[4].(Mask)) == uint8(2) { 643 newOpStr = opString + "f" 644 removeArg(inst, int8(4)) 645 } else if uint8(inst.Args[4].(Mask)) == uint8(3) { 646 newOpStr = "ldrv" 647 removeArg(inst, int8(4)) 648 } else if uint8(inst.Args[4].(Mask)) == uint8(6) { 649 newOpStr = "lerv" 650 removeArg(inst, int8(4)) 651 } 652 653 case "vschp": 654 if uint8(inst.Args[3].(Mask)) == uint8(2) { 655 newOpStr = "vschsp" 656 removeArg(inst, int8(3)) 657 } else if uint8(inst.Args[3].(Mask)) == uint8(3) { 658 newOpStr = "vschdp" 659 removeArg(inst, int8(3)) 660 } else if uint8(inst.Args[3].(Mask)) == uint8(4) { 661 newOpStr = "vschxp" 662 removeArg(inst, int8(3)) 663 } 664 665 case "vsbcbi", "vsbi": 666 if uint8(inst.Args[4].(Mask)) == uint8(4) { 667 newOpStr = opString + vecInstrExtndMnics[4].ExtnOpStr 668 removeArg(inst, int8(4)) 669 } 670 671 case "vac", "vaccc": 672 if uint8(inst.Args[4].(Mask)) == uint8(4) { 673 newOpStr = opString + vecInstrExtndMnics[4].ExtnOpStr 674 removeArg(inst, int8(4)) 675 } 676 677 case "vceq", "vch", "vchl": 678 for i := 0; i < len(vec2InstrExtndMnics)-6; i++ { 679 if uint8(inst.Args[vec2InstrExtndMnics[i].Offset1].(Mask)) == vec2InstrExtndMnics[i].Value1 && 680 uint8(inst.Args[vec2InstrExtndMnics[i].Offset2].(Mask)) == vec2InstrExtndMnics[i].Value2 { 681 newOpStr = opString + vec2InstrExtndMnics[i].ExtnOpStr 682 removeArg(inst, int8(vec2InstrExtndMnics[i].Offset1)) 683 removeArg(inst, int8(vec2InstrExtndMnics[i].Offset2-1)) 684 break 685 } 686 } 687 688 case "vpks", "vpkls": 689 for i := 1; i < len(vec2InstrExtndMnics)-6; i++ { 690 if i == 4 { 691 continue 692 } 693 if uint8(inst.Args[vec2InstrExtndMnics[i].Offset1].(Mask)) == vec2InstrExtndMnics[i].Value1 && 694 uint8(inst.Args[vec2InstrExtndMnics[i].Offset2].(Mask)) == vec2InstrExtndMnics[i].Value2 { 695 newOpStr = opString + vec2InstrExtndMnics[i].ExtnOpStr 696 removeArg(inst, int8(vec2InstrExtndMnics[i].Offset1)) 697 removeArg(inst, int8(vec2InstrExtndMnics[i].Offset2-1)) 698 break 699 } 700 } 701 case "vfee", "vfene": 702 var check bool 703 for i := 0; i < len(vec21InstrExtndMnics); i++ { 704 if uint8(inst.Args[vec21InstrExtndMnics[i].Offset1].(Mask)) == vec21InstrExtndMnics[i].Value1 && 705 uint8(inst.Args[vec21InstrExtndMnics[i].Offset2].(Mask)) == vec21InstrExtndMnics[i].Value2 { 706 newOpStr = opString + vec21InstrExtndMnics[i].ExtnOpStr 707 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset1)) 708 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset2-1)) 709 check = true 710 break 711 } 712 } 713 if !check { 714 if uint8(inst.Args[3].(Mask)) == 0 && (uint8(inst.Args[4].(Mask)) != uint8(0)) { 715 newOpStr = opString + vec21InstrExtndMnics[0].ExtnOpStr 716 removeArg(inst, int8(vec21InstrExtndMnics[0].Offset1)) 717 } else if uint8(inst.Args[3].(Mask)) == 1 && (uint8(inst.Args[4].(Mask)) != uint8(0)) { 718 newOpStr = opString + vec21InstrExtndMnics[1].ExtnOpStr 719 removeArg(inst, int8(vec21InstrExtndMnics[1].Offset1)) 720 } else if uint8(inst.Args[3].(Mask)) == 2 && (uint8(inst.Args[4].(Mask)) != uint8(0)) { 721 newOpStr = opString + vec21InstrExtndMnics[2].ExtnOpStr 722 removeArg(inst, int8(vec21InstrExtndMnics[2].Offset1)) 723 } else if uint8(inst.Args[4].(Mask)) == 0 { 724 removeArg(inst, int8(vec21InstrExtndMnics[2].Offset2)) 725 } 726 } 727 728 case "vfae", "vstrc": 729 off := uint8(0) 730 var check bool 731 if opString == "vstrc" { 732 off = uint8(1) 733 } 734 for i := 0; i < len(vec21InstrExtndMnics)-9; i++ { 735 if uint8(inst.Args[vec21InstrExtndMnics[i].Offset1+off].(Mask)) == vec21InstrExtndMnics[i].Value1 && 736 uint8(inst.Args[vec21InstrExtndMnics[i].Offset2+off].(Mask)) == vec21InstrExtndMnics[i].Value2 { 737 newOpStr = opString + vec21InstrExtndMnics[i].ExtnOpStr 738 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset1+off)) 739 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset2+off-1)) 740 check = true 741 break 742 } 743 } 744 745 for i := 0; !(check) && (i < len(vec21InstrExtndMnics)-9); i++ { 746 if uint8(inst.Args[vec21InstrExtndMnics[i].Offset1+off].(Mask)) == vec21InstrExtndMnics[i].Value1 && 747 uint8(inst.Args[vec21InstrExtndMnics[i].Offset2+off].(Mask)) == vec21InstrExtndMnics[i].Value2 { 748 newOpStr = opString + vec21InstrExtndMnics[i].ExtnOpStr 749 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset1+off)) 750 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset2+off-1)) 751 check = true 752 break 753 } 754 } 755 //for i := 3; !(check) && (i < len(vec21InstrExtndMnics)); i++ { 756 for i := len(vec21InstrExtndMnics) - 1; !(check) && (i > 2); i-- { 757 if uint8(inst.Args[vec21InstrExtndMnics[i].Offset1+off].(Mask)) == vec21InstrExtndMnics[i].Value1 && 758 uint8(inst.Args[vec21InstrExtndMnics[i].Offset2+off].(Mask))&(vec21InstrExtndMnics[i].Value2) == vec21InstrExtndMnics[i].Value2 { 759 x := uint8(inst.Args[vec21InstrExtndMnics[i].Offset2+off].(Mask)) ^ (vec21InstrExtndMnics[i].Value2) 760 newOpStr = opString + vec21InstrExtndMnics[i].ExtnOpStr 761 if x != 0 { 762 inst.Args[vec21InstrExtndMnics[i].Offset2+off] = Mask(x) 763 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset1+off)) 764 check = true 765 break 766 } else { 767 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset1+off)) 768 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset2+off-1)) 769 check = true 770 break 771 } 772 } 773 } 774 if !check && inst.Args[4+off].(Mask) == Mask(0) { 775 removeArg(inst, int8(4+off)) 776 break 777 } 778 779 case "vstrs": 780 var check bool 781 for i := 0; i < len(vec21InstrExtndMnics)-3; i++ { 782 if uint8(inst.Args[vec21InstrExtndMnics[i].Offset1+1].(Mask)) == vec21InstrExtndMnics[i].Value1 && 783 uint8(inst.Args[vec21InstrExtndMnics[i].Offset2+1].(Mask)) == vec21InstrExtndMnics[i].Value2 { 784 newOpStr = opString + vec21InstrExtndMnics[i].ExtnOpStr 785 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset1+1)) 786 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset2)) 787 check = true 788 break 789 } 790 if i == 2 { 791 i = i + 3 792 } 793 } 794 795 for i := 0; !(check) && (i < len(vec21InstrExtndMnics)-9); i++ { 796 if uint8(inst.Args[vec21InstrExtndMnics[i].Offset1+1].(Mask)) == vec21InstrExtndMnics[i].Value1 && 797 uint8(inst.Args[vec21InstrExtndMnics[i].Offset2+1].(Mask)) != 0 { 798 newOpStr = opString + vec21InstrExtndMnics[i].ExtnOpStr 799 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset1+1)) 800 break 801 } 802 } 803 804 case "vistr": 805 var check bool 806 for i := 0; i < len(vec21InstrExtndMnics)-6; i++ { 807 if uint8(inst.Args[vec21InstrExtndMnics[i].Offset1-1].(Mask)) == vec21InstrExtndMnics[i].Value1 && 808 uint8(inst.Args[vec21InstrExtndMnics[i].Offset2-1].(Mask)) == vec21InstrExtndMnics[i].Value2 { 809 newOpStr = opString + vec21InstrExtndMnics[i].ExtnOpStr 810 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset1-1)) 811 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset2-2)) 812 check = true 813 break 814 } 815 } 816 817 for i := 0; !(check) && (i < len(vec21InstrExtndMnics)-9); i++ { 818 if uint8(inst.Args[vec21InstrExtndMnics[i].Offset1-1].(Mask)) == vec21InstrExtndMnics[i].Value1 && 819 uint8(inst.Args[vec21InstrExtndMnics[i].Offset2-1].(Mask)) != 0 { 820 newOpStr = opString + vec21InstrExtndMnics[i].ExtnOpStr 821 removeArg(inst, int8(vec21InstrExtndMnics[i].Offset1-1)) 822 break 823 } 824 } 825 826 if uint8(inst.Args[3].(Mask)) == 0 { 827 removeArg(inst, int8(3)) 828 break 829 } 830 831 case "vcfps": 832 if inst.Args[2].(Mask) == Mask(2) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 833 inst.Args[3] = Mask((inst.Args[3].(Mask)) ^ (0x8)) 834 newOpStr = "wcefb" 835 removeArg(inst, int8(2)) 836 break 837 } else if inst.Args[2].(Mask) == Mask(3) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 838 inst.Args[3] = Mask((inst.Args[3].(Mask)) ^ (0x8)) 839 newOpStr = "wcdgb" 840 removeArg(inst, int8(2)) 841 break 842 } else if uint8(inst.Args[2].(Mask)) == uint8(2) { 843 newOpStr = "vcefb" 844 removeArg(inst, int8(2)) 845 break 846 } else if uint8(inst.Args[2].(Mask)) == uint8(3) { 847 newOpStr = "vcdgb" 848 removeArg(inst, int8(2)) 849 break 850 } 851 852 case "vcfpl": 853 if inst.Args[2].(Mask) == Mask(2) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 854 inst.Args[3] = Mask((inst.Args[3].(Mask)) ^ (0x8)) 855 newOpStr = "wcelfb" 856 removeArg(inst, int8(2)) 857 break 858 } else if inst.Args[2].(Mask) == Mask(3) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 859 inst.Args[3] = Mask((inst.Args[3].(Mask)) ^ (0x8)) 860 newOpStr = "wcdlgb" 861 removeArg(inst, int8(2)) 862 break 863 } else if inst.Args[2].(Mask) == Mask(2) { 864 newOpStr = "vcelfb" 865 removeArg(inst, int8(2)) 866 break 867 } else if inst.Args[2].(Mask) == Mask(3) { 868 newOpStr = "vcdlgb" 869 removeArg(inst, int8(2)) 870 break 871 } 872 873 case "vcsfp": 874 if inst.Args[2].(Mask) == Mask(2) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 875 inst.Args[3] = Mask((inst.Args[3].(Mask)) ^ (0x8)) 876 newOpStr = "wcfeb" 877 removeArg(inst, int8(2)) 878 break 879 } else if inst.Args[2].(Mask) == Mask(3) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 880 inst.Args[3] = Mask((inst.Args[3].(Mask)) ^ (0x8)) 881 newOpStr = "wcgdb" 882 removeArg(inst, int8(2)) 883 break 884 } else if inst.Args[2].(Mask) == Mask(2) { 885 newOpStr = "vcfeb" 886 removeArg(inst, int8(2)) 887 break 888 } else if inst.Args[2].(Mask) == Mask(3) { 889 newOpStr = "vcgdb" 890 removeArg(inst, int8(2)) 891 break 892 } 893 894 case "vclfp": 895 if inst.Args[2].(Mask) == Mask(2) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 896 inst.Args[3] = Mask((inst.Args[3].(Mask)) ^ (0x8)) 897 newOpStr = "wclfeb" 898 removeArg(inst, int8(2)) 899 break 900 } else if inst.Args[2].(Mask) == Mask(3) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 901 inst.Args[3] = Mask((inst.Args[3].(Mask)) ^ (0x8)) 902 newOpStr = "wclgdb" 903 removeArg(inst, int8(2)) 904 break 905 } else if inst.Args[2].(Mask) == Mask(2) { 906 newOpStr = "vclfeb" 907 removeArg(inst, int8(2)) 908 break 909 } else if inst.Args[2].(Mask) == Mask(3) { 910 newOpStr = "vclgdb" 911 removeArg(inst, int8(2)) 912 break 913 } 914 915 case "vfi": 916 if inst.Args[2].(Mask) == Mask(2) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 917 newOpStr = "wfisb" 918 removeArg(inst, int8(2)) 919 inst.Args[2] = Mask((inst.Args[2].(Mask)) ^ (0x8)) 920 break 921 } else if inst.Args[2].(Mask) == Mask(3) && ((inst.Args[3].(Mask)>>3)&(0x3) == 1) { 922 newOpStr = "wfidb" 923 removeArg(inst, int8(2)) 924 inst.Args[2] = Mask((inst.Args[2].(Mask)) ^ (0x8)) 925 break 926 } else if inst.Args[2].(Mask) == Mask(4) && ((inst.Args[3].(Mask)>>3)&(0x1) == 1) { 927 newOpStr = "wfixb" 928 removeArg(inst, int8(2)) 929 inst.Args[2] = Mask((inst.Args[2].(Mask)) ^ (0x8)) 930 break 931 } else if inst.Args[2].(Mask) == Mask(2) { 932 newOpStr = "vfisb" 933 removeArg(inst, int8(2)) 934 break 935 } else if inst.Args[2].(Mask) == Mask(3) { 936 newOpStr = "vfidb" 937 removeArg(inst, int8(2)) 938 break 939 } 940 941 // Case to handle few vector instructions with 2 M-field operands 942 case "vfa", "vfd", "vfll", "vfmax", "vfmin", "vfm": 943 for i := 0; i < len(vec4InstrExtndMnics); i++ { 944 if opString == vec4InstrExtndMnics[i].BaseOpStr && 945 uint8(inst.Args[vec4InstrExtndMnics[i].Offset1].(Mask)) == vec4InstrExtndMnics[i].Value1 && 946 uint8(inst.Args[vec4InstrExtndMnics[i].Offset2].(Mask)) == vec4InstrExtndMnics[i].Value2 { 947 newOpStr = vec4InstrExtndMnics[i].ExtnOpStr 948 removeArg(inst, int8(vec4InstrExtndMnics[i].Offset1)) 949 removeArg(inst, int8(vec4InstrExtndMnics[i].Offset2-1)) 950 break 951 } 952 } 953 954 // Case to handle few special "vector" instructions with 2 M-field operands 955 case "wfc", "wfk": 956 for i := 0; i < len(vec3InstrExtndMnics); i++ { 957 if uint8(inst.Args[vec3InstrExtndMnics[i].Offset1].(Mask)) == vec3InstrExtndMnics[i].Value1 && 958 uint8(inst.Args[vec3InstrExtndMnics[i].Offset2].(Mask)) == vec3InstrExtndMnics[i].Value2 { 959 newOpStr = opString + vec3InstrExtndMnics[i].ExtnOpStr 960 removeArg(inst, int8(vec3InstrExtndMnics[i].Offset1)) 961 removeArg(inst, int8(vec3InstrExtndMnics[i].Offset2-1)) 962 break 963 } 964 } 965 966 // Case to handle few vector instructions with 2 M-field operands 967 case "vfma", "vfms", "vfnma", "vfnms": 968 for i := 0; i < len(vec7InstrExtndMnics); i++ { 969 if opString == vec7InstrExtndMnics[i].BaseOpStr && 970 uint8(inst.Args[vec7InstrExtndMnics[i].Offset1].(Mask)) == vec7InstrExtndMnics[i].Value1 && 971 uint8(inst.Args[vec7InstrExtndMnics[i].Offset2].(Mask)) == vec7InstrExtndMnics[i].Value2 { 972 newOpStr = vec7InstrExtndMnics[i].ExtnOpStr 973 removeArg(inst, int8(vec7InstrExtndMnics[i].Offset1)) 974 removeArg(inst, int8(vec7InstrExtndMnics[i].Offset2-1)) 975 break 976 } 977 } 978 979 // List of instructions with 3 M-field operands. 980 case "vfce", "vfch", "vfche", "vfpso": 981 for i := 0; i < len(vec6InstrExtndMnics); i++ { 982 if opString == vec6InstrExtndMnics[i].BaseOpStr && 983 uint8(inst.Args[vec6InstrExtndMnics[i].Offset1].(Mask)) == vec6InstrExtndMnics[i].Value1 && 984 uint8(inst.Args[vec6InstrExtndMnics[i].Offset2].(Mask)) == vec6InstrExtndMnics[i].Value2 && 985 uint8(inst.Args[vec6InstrExtndMnics[i].Offset3].(Mask)) == vec6InstrExtndMnics[i].Value3 { 986 newOpStr = vec6InstrExtndMnics[i].ExtnOpStr 987 removeArg(inst, int8(vec6InstrExtndMnics[i].Offset1)) 988 removeArg(inst, int8(vec6InstrExtndMnics[i].Offset2-1)) 989 removeArg(inst, int8(vec6InstrExtndMnics[i].Offset3-2)) 990 break 991 } 992 } 993 994 default: 995 return opString 996 } 997 return newOpStr 998 } 999 1000 // This is the function that is called to print the disassembled instruction 1001 // in the GNU (AT&T) syntax form. 1002 func GNUSyntax(inst Inst, pc uint64) string { 1003 if inst.Enc == 0 { 1004 return ".long 0x0" 1005 } else if inst.Op == 0 { 1006 return "error: unknown instruction" 1007 } 1008 return inst.String(pc) 1009 } 1010 1011 // removeArg removes the arg in inst.Args[index]. 1012 func removeArg(inst *Inst, index int8) { 1013 for i := int(index); i < len(inst.Args); i++ { 1014 if i+1 < len(inst.Args) { 1015 inst.Args[i] = inst.Args[i+1] 1016 } else { 1017 inst.Args[i] = nil 1018 } 1019 } 1020 }