golang.org/x/arch@v0.17.0/x86/x86avxgen/testdata/xedpath/all-widths.txt (about) 1 2 3 ###FILE: ./datafiles/xed-operand-width.txt 4 5 #BEGIN_LEGAL 6 # 7 #Copyright (c) 2016 Intel Corporation 8 # 9 # Licensed under the Apache License, Version 2.0 (the "License"); 10 # you may not use this file except in compliance with the License. 11 # You may obtain a copy of the License at 12 # 13 # http://www.apache.org/licenses/LICENSE-2.0 14 # 15 # Unless required by applicable law or agreed to in writing, software 16 # distributed under the License is distributed on an "AS IS" BASIS, 17 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 18 # See the License for the specific language governing permissions and 19 # limitations under the License. 20 # 21 #END_LEGAL 22 # @file xed-operand-width.txt 23 24 # the default xtype can be overridden in each operand using a ":" followed by an explicit xtype 25 ## 26 ## the width defaults to bytes. But it can be bits if it has a "bits" suffix 27 ## 28 # 29 # default 30 #oc2-code XTYPE width16 width32 width64 (if only one width is shown, it is for all widths) 31 # 32 INVALID INVALID 0 33 # 34 # 3 strange things: 35 # 36 asz int 2 4 8 # varies with the effective address width 37 ssz int 2 4 8 # varies with the stack address width 38 pseudo struct 0 # these are for unusual registers 39 pseudox87 struct 0 # these are for unusual registers 40 # 41 # 42 # 43 #1 i1 1 # FIXME: this is not used... 44 a16 i16 4 # bound 45 a32 i32 8 # bound 46 b u8 1 47 d i32 4 48 # 49 i8 i8 1 50 u8 u8 1 51 i16 i16 2 52 u16 u16 2 53 i32 i32 4 54 u32 u32 4 55 i64 i64 8 56 u64 u64 8 57 f16 f16 2 # IVB converts 58 f32 f32 4 59 f64 f64 8 60 # 61 dq i32 16 62 # 63 xub u8 16 64 xuw u16 16 65 xud u32 16 66 xuq u64 16 67 x128 u128 16 68 # 69 xb i8 16 70 xw i16 16 71 xd i32 16 72 xq i64 16 73 # 74 # 75 mb i8 8 76 mw i16 8 77 md i32 8 78 mq i64 8 79 # 80 m64int i64 8 81 m64real f64 8 82 mem108 struct 108 83 mem14 struct 14 84 mem16 struct 2 85 mem16int i16 2 86 mem28 struct 28 87 mem32int i32 4 88 mem32real f32 4 89 mem80dec b80 10 90 mem80real f80 10 91 f80 f80 10 # for X87 registers: 92 mem94 struct 94 93 mfpxenv struct 512 94 mxsave struct 576 95 mprefetch i64 64 # made up width for prefetches 96 p struct 4 6 6 97 p2 struct 4 6 10 98 pd f64 16 99 ps f32 16 100 pi i32 8 101 q i64 8 102 s struct 6 6 10 103 s64 struct 10 104 sd f64 8 105 si i32 4 106 ss f32 4 107 v int 2 4 8 108 y int 4 4 8 109 w i16 2 110 z int 2 4 4 111 spw8 int 16 32 0 # varies (64b invalid) STACK POINTER WIDTH 112 spw int 2 4 8 # varies STACK POINTER WIDTH 113 spw5 int 10 20 40 # varies (IRET approx) STACK POINTER WIDTH 114 spw3 int 6 12 24 # varies (IRET approx) STACK POINTER WIDTH 115 spw2 int 4 8 16 # varies (FAR call/ret approx) STACK POINTER WIDTH 116 i1 int 1bits 117 i2 int 2bits 118 i3 int 3bits 119 i4 int 4bits 120 i5 int 5bits 121 i6 int 6bits 122 i7 int 7bits 123 i8 int 8bits 124 var var 0 # relies on NELEM * ELEMENT_SIZE to get the number of bits. 125 bnd32 u32 12 # MPX 32b BNDLDX/BNDSTX memop 3x4B 126 bnd64 u64 24 # MPX 32b BNDLDX/BNDSTX memop 3x8B 127 128 129 ###FILE: ./datafiles/avx/avx-operand-width.txt 130 131 #BEGIN_LEGAL 132 # 133 #Copyright (c) 2016 Intel Corporation 134 # 135 # Licensed under the Apache License, Version 2.0 (the "License"); 136 # you may not use this file except in compliance with the License. 137 # You may obtain a copy of the License at 138 # 139 # http://www.apache.org/licenses/LICENSE-2.0 140 # 141 # Unless required by applicable law or agreed to in writing, software 142 # distributed under the License is distributed on an "AS IS" BASIS, 143 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 144 # See the License for the specific language governing permissions and 145 # limitations under the License. 146 # 147 #END_LEGAL 148 # 149 #code XTYPE width16 width32 width64 (if only one width is presented, it is for all widths) 150 # 151 qq i32 32 152 yub u8 32 153 yuw u16 32 154 yud u32 32 155 yuq u64 32 156 y128 u128 32 157 158 yb i8 32 159 yw i16 32 160 yd i32 32 161 yq i64 32 162 163 yps f32 32 164 ypd f64 32 165 166 167 168 169 ###FILE: ./datafiles/avx512f/avx512-operand-widths.txt 170 171 #BEGIN_LEGAL 172 # 173 #Copyright (c) 2016 Intel Corporation 174 # 175 # Licensed under the Apache License, Version 2.0 (the "License"); 176 # you may not use this file except in compliance with the License. 177 # You may obtain a copy of the License at 178 # 179 # http://www.apache.org/licenses/LICENSE-2.0 180 # 181 # Unless required by applicable law or agreed to in writing, software 182 # distributed under the License is distributed on an "AS IS" BASIS, 183 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 184 # See the License for the specific language governing permissions and 185 # limitations under the License. 186 # 187 #END_LEGAL 188 # 189 #code XTYPE width16 width32 width64 (if only one width is presented, it is for all widths) 190 # 191 vv var 0 # relies on nelem * elem_size 192 zv var 0 # relies on nelem * elem_size 193 194 wrd u16 16bits 195 mskw i1 64bits # FIXME: bad name 196 197 zmskw i1 512bits 198 199 zf32 f32 512bits 200 zf64 f64 512bits 201 202 zb i8 512bits 203 zw i16 512bits 204 zd i32 512bits 205 zq i64 512bits 206 207 zub u8 512bits 208 zuw u16 512bits 209 zud u32 512bits 210 zuq u64 512bits 211 212 # alternative names... 213 zi8 i8 512bits 214 zi16 i16 512bits 215 zi32 i32 512bits 216 zi64 i64 512bits 217 218 zu8 u8 512bits 219 zu16 u16 512bits 220 zu32 u32 512bits 221 zu64 u64 512bits 222 zu128 u128 512bits 223 224