rsc.io/go@v0.0.0-20150416155037-e040fd465409/src/cmd/old5a/lex.go (about)

     1  // Inferno utils/5a/lex.c
     2  // http://code.google.com/p/inferno-os/source/browse/utils/5a/lex.c
     3  //
     4  //	Copyright © 1994-1999 Lucent Technologies Inc.	All rights reserved.
     5  //	Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
     6  //	Portions Copyright © 1997-1999 Vita Nuova Limited
     7  //	Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
     8  //	Portions Copyright © 2004,2006 Bruce Ellis
     9  //	Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
    10  //	Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
    11  //	Portions Copyright © 2009 The Go Authors.  All rights reserved.
    12  //
    13  // Permission is hereby granted, free of charge, to any person obtaining a copy
    14  // of this software and associated documentation files (the "Software"), to deal
    15  // in the Software without restriction, including without limitation the rights
    16  // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    17  // copies of the Software, and to permit persons to whom the Software is
    18  // furnished to do so, subject to the following conditions:
    19  //
    20  // The above copyright notice and this permission notice shall be included in
    21  // all copies or substantial portions of the Software.
    22  //
    23  // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    24  // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    25  // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
    26  // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    27  // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
    28  // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
    29  // THE SOFTWARE.
    30  
    31  //go:generate go tool yacc a.y
    32  
    33  package main
    34  
    35  import (
    36  	"cmd/internal/asm"
    37  	"cmd/internal/obj"
    38  	"cmd/internal/obj/arm"
    39  )
    40  
    41  var (
    42  	yyerror  = asm.Yyerror
    43  	nullgen  obj.Addr
    44  	stmtline int32
    45  )
    46  
    47  const Always = arm.C_SCOND_NONE
    48  
    49  func main() {
    50  	cinit()
    51  
    52  	asm.LSCONST = LSCONST
    53  	asm.LCONST = LCONST
    54  	asm.LFCONST = LFCONST
    55  	asm.LNAME = LNAME
    56  	asm.LVAR = LVAR
    57  	asm.LLAB = LLAB
    58  
    59  	asm.Lexinit = lexinit
    60  	asm.Cclean = cclean
    61  	asm.Yyparse = yyparse
    62  
    63  	asm.Thechar = '5'
    64  	asm.Thestring = "arm"
    65  	asm.Thelinkarch = &arm.Linkarm
    66  
    67  	asm.Main()
    68  }
    69  
    70  type yy struct{}
    71  
    72  func (yy) Lex(v *yySymType) int {
    73  	var av asm.Yylval
    74  	tok := asm.Yylex(&av)
    75  	v.sym = av.Sym
    76  	v.lval = int32(av.Lval)
    77  	v.sval = av.Sval
    78  	v.dval = av.Dval
    79  	return tok
    80  }
    81  
    82  func (yy) Error(msg string) {
    83  	asm.Yyerror("%s", msg)
    84  }
    85  
    86  func yyparse() {
    87  	yyParse(yy{})
    88  }
    89  
    90  var lexinit = []asm.Lextab{
    91  	{"SP", LSP, obj.NAME_AUTO},
    92  	{"SB", LSB, obj.NAME_EXTERN},
    93  	{"FP", LFP, obj.NAME_PARAM},
    94  	{"PC", LPC, obj.TYPE_BRANCH},
    95  
    96  	{"R", LR, 0},
    97  
    98  	{"R0", LREG, arm.REG_R0},
    99  	{"R1", LREG, arm.REG_R1},
   100  	{"R2", LREG, arm.REG_R2},
   101  	{"R3", LREG, arm.REG_R3},
   102  	{"R4", LREG, arm.REG_R4},
   103  	{"R5", LREG, arm.REG_R5},
   104  	{"R6", LREG, arm.REG_R6},
   105  	{"R7", LREG, arm.REG_R7},
   106  	{"R8", LREG, arm.REG_R8},
   107  	{"R9", LREG, arm.REG_R9},
   108  	{"g", LREG, arm.REG_R10}, // avoid unintentionally clobber g using R10
   109  	{"R11", LREG, arm.REG_R11},
   110  	{"R12", LREG, arm.REG_R12},
   111  	{"R13", LREG, arm.REG_R13},
   112  	{"R14", LREG, arm.REG_R14},
   113  	{"R15", LREG, arm.REG_R15},
   114  	{"F", LF, 0},
   115  	{"F0", LFREG, arm.REG_F0},
   116  	{"F1", LFREG, arm.REG_F1},
   117  	{"F2", LFREG, arm.REG_F2},
   118  	{"F3", LFREG, arm.REG_F3},
   119  	{"F4", LFREG, arm.REG_F4},
   120  	{"F5", LFREG, arm.REG_F5},
   121  	{"F6", LFREG, arm.REG_F6},
   122  	{"F7", LFREG, arm.REG_F7},
   123  	{"F8", LFREG, arm.REG_F8},
   124  	{"F9", LFREG, arm.REG_F9},
   125  	{"F10", LFREG, arm.REG_F10},
   126  	{"F11", LFREG, arm.REG_F11},
   127  	{"F12", LFREG, arm.REG_F12},
   128  	{"F13", LFREG, arm.REG_F13},
   129  	{"F14", LFREG, arm.REG_F14},
   130  	{"F15", LFREG, arm.REG_F15},
   131  	{"C", LC, 0},
   132  	{"C0", LCREG, 0},
   133  	{"C1", LCREG, 1},
   134  	{"C2", LCREG, 2},
   135  	{"C3", LCREG, 3},
   136  	{"C4", LCREG, 4},
   137  	{"C5", LCREG, 5},
   138  	{"C6", LCREG, 6},
   139  	{"C7", LCREG, 7},
   140  	{"C8", LCREG, 8},
   141  	{"C9", LCREG, 9},
   142  	{"C10", LCREG, 10},
   143  	{"C11", LCREG, 11},
   144  	{"C12", LCREG, 12},
   145  	{"C13", LCREG, 13},
   146  	{"C14", LCREG, 14},
   147  	{"C15", LCREG, 15},
   148  	{"CPSR", LPSR, arm.REG_CPSR},
   149  	{"SPSR", LPSR, arm.REG_SPSR},
   150  	{"FPSR", LFCR, arm.REG_FPSR},
   151  	{"FPCR", LFCR, arm.REG_FPCR},
   152  	{".EQ", LCOND, arm.C_SCOND_EQ},
   153  	{".NE", LCOND, arm.C_SCOND_NE},
   154  	{".CS", LCOND, arm.C_SCOND_HS},
   155  	{".HS", LCOND, arm.C_SCOND_HS},
   156  	{".CC", LCOND, arm.C_SCOND_LO},
   157  	{".LO", LCOND, arm.C_SCOND_LO},
   158  	{".MI", LCOND, arm.C_SCOND_MI},
   159  	{".PL", LCOND, arm.C_SCOND_PL},
   160  	{".VS", LCOND, arm.C_SCOND_VS},
   161  	{".VC", LCOND, arm.C_SCOND_VC},
   162  	{".HI", LCOND, arm.C_SCOND_HI},
   163  	{".LS", LCOND, arm.C_SCOND_LS},
   164  	{".GE", LCOND, arm.C_SCOND_GE},
   165  	{".LT", LCOND, arm.C_SCOND_LT},
   166  	{".GT", LCOND, arm.C_SCOND_GT},
   167  	{".LE", LCOND, arm.C_SCOND_LE},
   168  	{".AL", LCOND, arm.C_SCOND_NONE},
   169  	{".U", LS, arm.C_UBIT},
   170  	{".S", LS, arm.C_SBIT},
   171  	{".W", LS, arm.C_WBIT},
   172  	{".P", LS, arm.C_PBIT},
   173  	{".PW", LS, arm.C_WBIT | arm.C_PBIT},
   174  	{".WP", LS, arm.C_WBIT | arm.C_PBIT},
   175  	{".F", LS, arm.C_FBIT},
   176  	{".IBW", LS, arm.C_WBIT | arm.C_PBIT | arm.C_UBIT},
   177  	{".IAW", LS, arm.C_WBIT | arm.C_UBIT},
   178  	{".DBW", LS, arm.C_WBIT | arm.C_PBIT},
   179  	{".DAW", LS, arm.C_WBIT},
   180  	{".IB", LS, arm.C_PBIT | arm.C_UBIT},
   181  	{".IA", LS, arm.C_UBIT},
   182  	{".DB", LS, arm.C_PBIT},
   183  	{".DA", LS, 0},
   184  	{"@", LAT, 0},
   185  	{"AND", LTYPE1, arm.AAND},
   186  	{"EOR", LTYPE1, arm.AEOR},
   187  	{"SUB", LTYPE1, arm.ASUB},
   188  	{"RSB", LTYPE1, arm.ARSB},
   189  	{"ADD", LTYPE1, arm.AADD},
   190  	{"ADC", LTYPE1, arm.AADC},
   191  	{"SBC", LTYPE1, arm.ASBC},
   192  	{"RSC", LTYPE1, arm.ARSC},
   193  	{"ORR", LTYPE1, arm.AORR},
   194  	{"BIC", LTYPE1, arm.ABIC},
   195  	{"SLL", LTYPE1, arm.ASLL},
   196  	{"SRL", LTYPE1, arm.ASRL},
   197  	{"SRA", LTYPE1, arm.ASRA},
   198  	{"MUL", LTYPE1, arm.AMUL},
   199  	{"MULA", LTYPEN, arm.AMULA},
   200  	{"DIV", LTYPE1, arm.ADIV},
   201  	{"MOD", LTYPE1, arm.AMOD},
   202  	{"MULL", LTYPEM, arm.AMULL},
   203  	{"MULAL", LTYPEM, arm.AMULAL},
   204  	{"MULLU", LTYPEM, arm.AMULLU},
   205  	{"MULALU", LTYPEM, arm.AMULALU},
   206  	{"MVN", LTYPE2, arm.AMVN}, /* op2 ignored */
   207  	{"MOVB", LTYPE3, arm.AMOVB},
   208  	{"MOVBU", LTYPE3, arm.AMOVBU},
   209  	{"MOVH", LTYPE3, arm.AMOVH},
   210  	{"MOVHU", LTYPE3, arm.AMOVHU},
   211  	{"MOVW", LTYPE3, arm.AMOVW},
   212  	{"MOVD", LTYPE3, arm.AMOVD},
   213  	{"MOVDF", LTYPE3, arm.AMOVDF},
   214  	{"MOVDW", LTYPE3, arm.AMOVDW},
   215  	{"MOVF", LTYPE3, arm.AMOVF},
   216  	{"MOVFD", LTYPE3, arm.AMOVFD},
   217  	{"MOVFW", LTYPE3, arm.AMOVFW},
   218  	{"MOVWD", LTYPE3, arm.AMOVWD},
   219  	{"MOVWF", LTYPE3, arm.AMOVWF},
   220  	{"LDREX", LTYPE3, arm.ALDREX},
   221  	{"LDREXD", LTYPE3, arm.ALDREXD},
   222  	{"STREX", LTYPE9, arm.ASTREX},
   223  	{"STREXD", LTYPE9, arm.ASTREXD},
   224  
   225  	/*
   226  		{"NEGF",		LTYPEI, ANEGF},
   227  		{"NEGD",		LTYPEI, ANEGD},
   228  		{"SQTF",		LTYPEI,	ASQTF},
   229  		{"SQTD",		LTYPEI,	ASQTD},
   230  		{"RNDF",		LTYPEI,	ARNDF},
   231  		{"RNDD",		LTYPEI,	ARNDD},
   232  		{"URDF",		LTYPEI,	AURDF},
   233  		{"URDD",		LTYPEI,	AURDD},
   234  		{"NRMF",		LTYPEI,	ANRMF},
   235  		{"NRMD",		LTYPEI,	ANRMD},
   236  	*/
   237  	{"ABSF", LTYPEI, arm.AABSF},
   238  	{"ABSD", LTYPEI, arm.AABSD},
   239  	{"SQRTF", LTYPEI, arm.ASQRTF},
   240  	{"SQRTD", LTYPEI, arm.ASQRTD},
   241  	{"CMPF", LTYPEL, arm.ACMPF},
   242  	{"CMPD", LTYPEL, arm.ACMPD},
   243  	{"ADDF", LTYPEK, arm.AADDF},
   244  	{"ADDD", LTYPEK, arm.AADDD},
   245  	{"SUBF", LTYPEK, arm.ASUBF},
   246  	{"SUBD", LTYPEK, arm.ASUBD},
   247  	{"MULF", LTYPEK, arm.AMULF},
   248  	{"MULD", LTYPEK, arm.AMULD},
   249  	{"DIVF", LTYPEK, arm.ADIVF},
   250  	{"DIVD", LTYPEK, arm.ADIVD},
   251  	{"B", LTYPE4, arm.AB},
   252  	{"BL", LTYPE4, arm.ABL},
   253  	{"BX", LTYPEBX, arm.ABX},
   254  	{"BEQ", LTYPE5, arm.ABEQ},
   255  	{"BNE", LTYPE5, arm.ABNE},
   256  	{"BCS", LTYPE5, arm.ABCS},
   257  	{"BHS", LTYPE5, arm.ABHS},
   258  	{"BCC", LTYPE5, arm.ABCC},
   259  	{"BLO", LTYPE5, arm.ABLO},
   260  	{"BMI", LTYPE5, arm.ABMI},
   261  	{"BPL", LTYPE5, arm.ABPL},
   262  	{"BVS", LTYPE5, arm.ABVS},
   263  	{"BVC", LTYPE5, arm.ABVC},
   264  	{"BHI", LTYPE5, arm.ABHI},
   265  	{"BLS", LTYPE5, arm.ABLS},
   266  	{"BGE", LTYPE5, arm.ABGE},
   267  	{"BLT", LTYPE5, arm.ABLT},
   268  	{"BGT", LTYPE5, arm.ABGT},
   269  	{"BLE", LTYPE5, arm.ABLE},
   270  	{"BCASE", LTYPE5, arm.ABCASE},
   271  	{"SWI", LTYPE6, arm.ASWI},
   272  	{"CMP", LTYPE7, arm.ACMP},
   273  	{"TST", LTYPE7, arm.ATST},
   274  	{"TEQ", LTYPE7, arm.ATEQ},
   275  	{"CMN", LTYPE7, arm.ACMN},
   276  	{"MOVM", LTYPE8, arm.AMOVM},
   277  	{"SWPBU", LTYPE9, arm.ASWPBU},
   278  	{"SWPW", LTYPE9, arm.ASWPW},
   279  	{"RET", LTYPEA, obj.ARET},
   280  	{"RFE", LTYPEA, arm.ARFE},
   281  	{"TEXT", LTYPEB, obj.ATEXT},
   282  	{"GLOBL", LGLOBL, obj.AGLOBL},
   283  	{"DATA", LTYPEC, obj.ADATA},
   284  	{"CASE", LTYPED, arm.ACASE},
   285  	{"END", LTYPEE, obj.AEND},
   286  	{"WORD", LTYPEH, arm.AWORD},
   287  	{"NOP", LTYPEI, obj.ANOP},
   288  	{"MCR", LTYPEJ, 0},
   289  	{"MRC", LTYPEJ, 1},
   290  	{"PLD", LTYPEPLD, arm.APLD},
   291  	{"UNDEF", LTYPEE, obj.AUNDEF},
   292  	{"CLZ", LTYPE2, arm.ACLZ},
   293  	{"MULWT", LTYPE1, arm.AMULWT},
   294  	{"MULWB", LTYPE1, arm.AMULWB},
   295  	{"MULAWT", LTYPEN, arm.AMULAWT},
   296  	{"MULAWB", LTYPEN, arm.AMULAWB},
   297  	{"USEFIELD", LTYPEN, obj.AUSEFIELD},
   298  	{"PCDATA", LTYPEPC, obj.APCDATA},
   299  	{"FUNCDATA", LTYPEF, obj.AFUNCDATA},
   300  }
   301  
   302  func cinit() {
   303  }
   304  
   305  func isreg(g *obj.Addr) bool {
   306  	return true
   307  }
   308  
   309  func cclean() {
   310  	outcode(obj.AEND, Always, &nullgen, 0, &nullgen)
   311  }
   312  
   313  var bcode = []int{
   314  	arm.ABEQ,
   315  	arm.ABNE,
   316  	arm.ABCS,
   317  	arm.ABCC,
   318  	arm.ABMI,
   319  	arm.ABPL,
   320  	arm.ABVS,
   321  	arm.ABVC,
   322  	arm.ABHI,
   323  	arm.ABLS,
   324  	arm.ABGE,
   325  	arm.ABLT,
   326  	arm.ABGT,
   327  	arm.ABLE,
   328  	arm.AB,
   329  	obj.ANOP,
   330  }
   331  
   332  var lastpc *obj.Prog
   333  
   334  func outcode(a, scond int32, g1 *obj.Addr, reg int32, g2 *obj.Addr) {
   335  	var p *obj.Prog
   336  	var pl *obj.Plist
   337  
   338  	/* hack to make B.NE etc. work: turn it into the corresponding conditional */
   339  	if a == arm.AB {
   340  		a = int32(bcode[(scond^arm.C_SCOND_XOR)&0xf])
   341  		scond = (scond &^ 0xf) | Always
   342  	}
   343  
   344  	if asm.Pass == 1 {
   345  		goto out
   346  	}
   347  
   348  	p = new(obj.Prog)
   349  	*p = obj.Prog{}
   350  	p.Ctxt = asm.Ctxt
   351  	p.As = int16(a)
   352  	p.Lineno = stmtline
   353  	p.Scond = uint8(scond)
   354  	p.From = *g1
   355  	p.Reg = int16(reg)
   356  	p.To = *g2
   357  	p.Pc = int64(asm.PC)
   358  
   359  	if lastpc == nil {
   360  		pl = obj.Linknewplist(asm.Ctxt)
   361  		pl.Firstpc = p
   362  	} else {
   363  		lastpc.Link = p
   364  	}
   365  	lastpc = p
   366  
   367  out:
   368  	if a != obj.AGLOBL && a != obj.ADATA {
   369  		asm.PC++
   370  	}
   371  }