wa-lang.org/wazero@v1.0.2/internal/asm/arm64/assembler.go (about)

     1  package arm64
     2  
     3  import (
     4  	"wa-lang.org/wazero/internal/asm"
     5  )
     6  
     7  // Assembler is the interface for arm64 specific assembler.
     8  type Assembler interface {
     9  	asm.AssemblerBase
    10  
    11  	// CompileMemoryWithRegisterOffsetToRegister adds an instruction where source operand is the memory address
    12  	// specified as `srcBaseReg + srcOffsetReg` and dst is the register `dstReg`.
    13  	CompileMemoryWithRegisterOffsetToRegister(instruction asm.Instruction, srcBaseReg, srcOffsetReg, dstReg asm.Register)
    14  
    15  	// CompileRegisterToMemoryWithRegisterOffset adds an instruction where source operand is the register `srcReg`,
    16  	// and the destination is the memory address specified as `dstBaseReg + dstOffsetReg`
    17  	CompileRegisterToMemoryWithRegisterOffset(instruction asm.Instruction, srcReg, dstBaseReg, dstOffsetReg asm.Register)
    18  
    19  	// CompileTwoRegistersToRegister adds an instruction where source operands consists of two registers `src1` and `src2`,
    20  	// and the destination is the register `dst`.
    21  	CompileTwoRegistersToRegister(instruction asm.Instruction, src1, src2, dst asm.Register)
    22  
    23  	// CompileThreeRegistersToRegister adds an instruction where source operands consist of three registers
    24  	// `src1`, `src2` and `src3`, and destination operands consist of `dst` register.
    25  	CompileThreeRegistersToRegister(instruction asm.Instruction, src1, src2, src3, dst asm.Register)
    26  
    27  	// CompileTwoRegistersToNone adds an instruction where source operands consist of two registers `src1` and `src2`,
    28  	// and destination operand is unspecified.
    29  	CompileTwoRegistersToNone(instruction asm.Instruction, src1, src2 asm.Register)
    30  
    31  	// CompileRegisterAndConstToNone adds an instruction where source operands consist of one register `src` and
    32  	// constant `srcConst`, and destination operand is unspecified.
    33  	CompileRegisterAndConstToNone(instruction asm.Instruction, src asm.Register, srcConst asm.ConstantValue)
    34  
    35  	// CompileLeftShiftedRegisterToRegister adds an instruction where source operand is the "left shifted register"
    36  	// represented as `srcReg << shiftNum` and the destination is the register `dstReg`.
    37  	CompileLeftShiftedRegisterToRegister(
    38  		instruction asm.Instruction,
    39  		shiftedSourceReg asm.Register,
    40  		shiftNum asm.ConstantValue,
    41  		srcReg, dstReg asm.Register,
    42  	)
    43  
    44  	// CompileConditionalRegisterSet adds an instruction to set 1 on dstReg if the condition satisfies,
    45  	// otherwise set 0.
    46  	CompileConditionalRegisterSet(cond asm.ConditionalRegisterState, dstReg asm.Register)
    47  
    48  	// CompileMemoryToVectorRegister adds an instruction where source operands is the memory address specified by
    49  	// `srcBaseReg+srcOffset` and the destination is `dstReg` vector register.
    50  	CompileMemoryToVectorRegister(instruction asm.Instruction, srcBaseReg asm.Register, srcOffset asm.ConstantValue,
    51  		dstReg asm.Register, arrangement VectorArrangement)
    52  
    53  	// CompileMemoryWithRegisterOffsetToVectorRegister is the same as CompileMemoryToVectorRegister except that the
    54  	// offset is specified by the `srcOffsetRegister` register.
    55  	CompileMemoryWithRegisterOffsetToVectorRegister(instruction asm.Instruction, srcBaseReg,
    56  		srcOffsetRegister asm.Register, dstReg asm.Register, arrangement VectorArrangement)
    57  
    58  	// CompileVectorRegisterToMemory adds an instruction where source operand is `srcReg` vector register and the
    59  	// destination is the memory address specified by `dstBaseReg+dstOffset`.
    60  	CompileVectorRegisterToMemory(instruction asm.Instruction, srcReg, dstBaseReg asm.Register,
    61  		dstOffset asm.ConstantValue, arrangement VectorArrangement)
    62  
    63  	// CompileVectorRegisterToMemoryWithRegisterOffset is the same as CompileVectorRegisterToMemory except that the
    64  	// offset is specified by the `dstOffsetRegister` register.
    65  	CompileVectorRegisterToMemoryWithRegisterOffset(instruction asm.Instruction, srcReg, dstBaseReg,
    66  		dstOffsetRegister asm.Register, arrangement VectorArrangement)
    67  
    68  	// CompileRegisterToVectorRegister adds an instruction where source operand is `srcReg` general purpose register and
    69  	// the destination is the `dstReg` vector register. The destination vector's arrangement and index of element can be
    70  	// given by `arrangement` and `index`, but not all the instructions will use them.
    71  	CompileRegisterToVectorRegister(instruction asm.Instruction, srcReg, dstReg asm.Register,
    72  		arrangement VectorArrangement, index VectorIndex)
    73  
    74  	// CompileVectorRegisterToRegister adds an instruction where destination operand is `dstReg` general purpose register
    75  	// and the source is the `srcReg` vector register. The source vector's arrangement and index of element can be
    76  	// given by `arrangement` and `index`, but not all the instructions will use them.
    77  	CompileVectorRegisterToRegister(instruction asm.Instruction, srcReg, dstReg asm.Register,
    78  		arrangement VectorArrangement, index VectorIndex)
    79  
    80  	// CompileVectorRegisterToVectorRegister adds an instruction where both source and destination operands are vector
    81  	// registers. The vector's arrangement can be specified `arrangement`, and the source and destination element's
    82  	// index are given by `srcIndex` and `dstIndex` respectively, but not all the instructions will use them.
    83  	CompileVectorRegisterToVectorRegister(instruction asm.Instruction, srcReg, dstReg asm.Register,
    84  		arrangement VectorArrangement, srcIndex, dstIndex VectorIndex)
    85  
    86  	// CompileVectorRegisterToVectorRegisterWithConst is the same as CompileVectorRegisterToVectorRegister but the
    87  	// additional constant can be provided.
    88  	// For example, the const can be used to specify the shift amount for USHLL instruction.
    89  	CompileVectorRegisterToVectorRegisterWithConst(instruction asm.Instruction, srcReg, dstReg asm.Register,
    90  		arrangement VectorArrangement, c asm.ConstantValue)
    91  
    92  	// CompileStaticConstToRegister adds an instruction where the source operand is StaticConstant located in
    93  	// the memory and the destination is the dstReg.
    94  	CompileStaticConstToRegister(instruction asm.Instruction, c *asm.StaticConst, dstReg asm.Register)
    95  
    96  	// CompileStaticConstToVectorRegister adds an instruction where the source operand is StaticConstant located in
    97  	// the memory and the destination is the dstReg.
    98  	CompileStaticConstToVectorRegister(instruction asm.Instruction, c *asm.StaticConst, dstReg asm.Register,
    99  		arrangement VectorArrangement)
   100  
   101  	// CompileTwoVectorRegistersToVectorRegister adds an instruction where source are two vectors and destination is one
   102  	// vector. The vector's arrangement can be specified `arrangement`.
   103  	CompileTwoVectorRegistersToVectorRegister(instruction asm.Instruction, srcReg, srcReg2, dstReg asm.Register,
   104  		arrangement VectorArrangement)
   105  
   106  	// CompileTwoVectorRegistersToVectorRegisterWithConst is the same as CompileTwoVectorRegistersToVectorRegister except
   107  	// that this also accept additional constant.
   108  	// For example EXIT instruction needs the extraction target immediate as const.
   109  	CompileTwoVectorRegistersToVectorRegisterWithConst(instruction asm.Instruction, srcReg, srcReg2, dstReg asm.Register,
   110  		arrangement VectorArrangement, c asm.ConstantValue)
   111  }