wa-lang.org/wazero@v1.0.2/internal/asm/arm64/impl_5_test.go (about) 1 package arm64 2 3 import ( 4 "testing" 5 6 "wa-lang.org/wazero/internal/asm" 7 "wa-lang.org/wazero/internal/testing/require" 8 ) 9 10 func TestAssemblerImpl_EncodeRegisterToMemory(t *testing.T) { 11 t.Run("error", func(t *testing.T) { 12 tests := []struct { 13 n *nodeImpl 14 expErr string 15 }{ 16 { 17 n: &nodeImpl{instruction: ADR, types: operandTypesRegisterToMemory}, 18 expErr: "ADR is unsupported for from:register,to:memory type", 19 }, 20 } 21 22 for _, tt := range tests { 23 tc := tt 24 a := NewAssembler(asm.NilRegister) 25 err := a.encodeRegisterToMemory(tc.n) 26 require.EqualError(t, err, tc.expErr) 27 } 28 }) 29 30 tests := []struct { 31 name string 32 n *nodeImpl 33 exp []byte 34 }{ 35 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: -1}, exp: []byte{0x0, 0xf0, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 36 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x0", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 0}, exp: []byte{0x0, 0x0, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 37 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x1", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 1}, exp: []byte{0x0, 0x10, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 38 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x2", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 2}, exp: []byte{0x0, 0x20, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 39 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: -2}, exp: []byte{0x0, 0xe0, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 40 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x4", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 4}, exp: []byte{0x0, 0x40, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 41 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: -4}, exp: []byte{0x0, 0xc0, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 42 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xf", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 43 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: -15}, exp: []byte{0x0, 0x10, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 44 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x10", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 16}, exp: []byte{0x0, 0x8, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 45 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xf", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 46 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x11", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 17}, exp: []byte{0x0, 0x10, 0x1, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 47 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 48 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: -256}, exp: []byte{0x0, 0x0, 0x10, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 49 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x50", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 80}, exp: []byte{0x0, 0x28, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 50 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 51 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xff", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 255}, exp: []byte{0x0, 0xf0, 0xf, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 52 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x1000", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x0, 0x0, 0x8, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 53 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x2000", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x0, 0x0, 0x10, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 54 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x0, 0xfc, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 55 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xfff0", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x60, 0xfb, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 56 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xffe8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x60, 0xf7, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 57 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0xffe0", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 58 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x8000000", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 59 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x40000000", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 60 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x40000008", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 61 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 62 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x40000010", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 63 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 64 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 65 {name: "STRD/ConstOffset/src=R0,base=R0,offset=0x10000004", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 66 {name: "STRD/RegisterOffset/src=R0,base=R0,offset=RegR8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x0, 0x68, 0x28, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 67 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: -1}, exp: []byte{0xc0, 0xf3, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 68 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x0", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 0}, exp: []byte{0xc0, 0x3, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 69 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x1", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 1}, exp: []byte{0xc0, 0x13, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 70 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x2", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 2}, exp: []byte{0xc0, 0x23, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 71 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: -2}, exp: []byte{0xc0, 0xe3, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 72 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x4", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 4}, exp: []byte{0xc0, 0x43, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 73 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: -4}, exp: []byte{0xc0, 0xc3, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 74 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xf", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 75 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: -15}, exp: []byte{0xc0, 0x13, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 76 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x10", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 16}, exp: []byte{0xc0, 0xb, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 77 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xf", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 78 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x11", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 17}, exp: []byte{0xc0, 0x13, 0x1, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 79 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 80 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: -256}, exp: []byte{0xc0, 0x3, 0x10, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 81 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x50", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 80}, exp: []byte{0xc0, 0x2b, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 82 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 83 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xff", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 255}, exp: []byte{0xc0, 0xf3, 0xf, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 84 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x1000", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xc0, 0x3, 0x8, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 85 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x2000", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xc0, 0x3, 0x10, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 86 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xc0, 0xff, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 87 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xfff0", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x60, 0xfb, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 88 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xffe8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x60, 0xf7, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 89 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0xffe0", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 90 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x8000000", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 91 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x40000000", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 92 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x40000008", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 93 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 94 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x40000010", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 95 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 96 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 97 {name: "STRD/ConstOffset/src=R0,base=R30,offset=0x10000004", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 98 {name: "STRD/RegisterOffset/src=R0,base=R30,offset=RegR8", n: &nodeImpl{instruction: STRD, srcReg: RegR0, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xc0, 0x6b, 0x28, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 99 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: -1}, exp: []byte{0x1e, 0xf0, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 100 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x0", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 0}, exp: []byte{0x1e, 0x0, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 101 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x1", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 1}, exp: []byte{0x1e, 0x10, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 102 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x2", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 2}, exp: []byte{0x1e, 0x20, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 103 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: -2}, exp: []byte{0x1e, 0xe0, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 104 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x4", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 4}, exp: []byte{0x1e, 0x40, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 105 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: -4}, exp: []byte{0x1e, 0xc0, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 106 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xf", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 107 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: -15}, exp: []byte{0x1e, 0x10, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 108 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x10", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 16}, exp: []byte{0x1e, 0x8, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 109 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xf", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 110 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x11", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 17}, exp: []byte{0x1e, 0x10, 0x1, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 111 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 112 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: -256}, exp: []byte{0x1e, 0x0, 0x10, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 113 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x50", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 80}, exp: []byte{0x1e, 0x28, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 114 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 115 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xff", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 255}, exp: []byte{0x1e, 0xf0, 0xf, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 116 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x1000", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x1e, 0x0, 0x8, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 117 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x2000", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x1e, 0x0, 0x10, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 118 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1e, 0xfc, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 119 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xfff0", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x7e, 0xfb, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 120 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xffe8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x7e, 0xf7, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 121 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0xffe0", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 122 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x8000000", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 123 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x40000000", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 124 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x40000008", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 125 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 126 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x40000010", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 127 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 128 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 129 {name: "STRD/ConstOffset/src=R30,base=R0,offset=0x10000004", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 130 {name: "STRD/RegisterOffset/src=R30,base=R0,offset=RegR8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x1e, 0x68, 0x28, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 131 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: -1}, exp: []byte{0xde, 0xf3, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 132 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x0", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 0}, exp: []byte{0xde, 0x3, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 133 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x1", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 1}, exp: []byte{0xde, 0x13, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 134 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x2", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 2}, exp: []byte{0xde, 0x23, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 135 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: -2}, exp: []byte{0xde, 0xe3, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 136 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x4", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 4}, exp: []byte{0xde, 0x43, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 137 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: -4}, exp: []byte{0xde, 0xc3, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 138 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xf", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 139 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: -15}, exp: []byte{0xde, 0x13, 0x1f, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 140 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x10", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 16}, exp: []byte{0xde, 0xb, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 141 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xf", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 142 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x11", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 17}, exp: []byte{0xde, 0x13, 0x1, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 143 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 144 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: -256}, exp: []byte{0xde, 0x3, 0x10, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 145 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x50", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 80}, exp: []byte{0xde, 0x2b, 0x0, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 146 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 147 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xff", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 255}, exp: []byte{0xde, 0xf3, 0xf, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 148 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x1000", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xde, 0x3, 0x8, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 149 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x2000", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xde, 0x3, 0x10, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 150 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xde, 0xff, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 151 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xfff0", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x7e, 0xfb, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 152 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xffe8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x7e, 0xf7, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 153 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0xffe0", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0xf9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 154 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x8000000", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 155 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x40000000", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 156 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x40000008", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 157 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 158 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x40000010", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 159 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 160 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 161 {name: "STRD/ConstOffset/src=R30,base=R30,offset=0x10000004", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 162 {name: "STRD/RegisterOffset/src=R30,base=R30,offset=RegR8", n: &nodeImpl{instruction: STRD, srcReg: RegR30, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xde, 0x6b, 0x28, 0xf8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 163 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: -1}, exp: []byte{0x0, 0xf0, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 164 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x0", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 0}, exp: []byte{0x0, 0x0, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 165 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x1", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 1}, exp: []byte{0x0, 0x10, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 166 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x2", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 2}, exp: []byte{0x0, 0x20, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 167 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: -2}, exp: []byte{0x0, 0xe0, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 168 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x4", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 4}, exp: []byte{0x0, 0x4, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 169 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: -4}, exp: []byte{0x0, 0xc0, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 170 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xf", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 171 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: -15}, exp: []byte{0x0, 0x10, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 172 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x10", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 16}, exp: []byte{0x0, 0x10, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 173 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xf", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 174 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x11", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 17}, exp: []byte{0x0, 0x10, 0x1, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 175 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 176 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: -256}, exp: []byte{0x0, 0x0, 0x10, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 177 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x50", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 80}, exp: []byte{0x0, 0x50, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 178 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 179 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xff", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 255}, exp: []byte{0x0, 0xf0, 0xf, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 180 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x1000", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x0, 0x0, 0x10, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 181 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x2000", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x0, 0x0, 0x20, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 182 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1b, 0x10, 0x40, 0x91, 0x60, 0xfb, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 183 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xfff0", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 184 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xffe8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x60, 0xeb, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 185 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0xffe0", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x60, 0xe3, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 186 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x8000000", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 187 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x40000000", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 188 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x40000008", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 189 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 190 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x40000010", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 191 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 192 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 193 {name: "STRW/ConstOffset/src=R0,base=R0,offset=0x10000004", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 194 {name: "STRW/RegisterOffset/src=R0,base=R0,offset=RegR8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x0, 0x68, 0x28, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 195 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: -1}, exp: []byte{0xc0, 0xf3, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 196 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x0", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 0}, exp: []byte{0xc0, 0x3, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 197 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x1", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 1}, exp: []byte{0xc0, 0x13, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 198 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x2", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 2}, exp: []byte{0xc0, 0x23, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 199 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: -2}, exp: []byte{0xc0, 0xe3, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 200 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x4", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 4}, exp: []byte{0xc0, 0x7, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 201 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: -4}, exp: []byte{0xc0, 0xc3, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 202 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xf", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 203 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: -15}, exp: []byte{0xc0, 0x13, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 204 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x10", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 16}, exp: []byte{0xc0, 0x13, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 205 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xf", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 206 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x11", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 17}, exp: []byte{0xc0, 0x13, 0x1, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 207 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 208 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: -256}, exp: []byte{0xc0, 0x3, 0x10, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 209 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x50", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 80}, exp: []byte{0xc0, 0x53, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 210 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 211 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xff", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 255}, exp: []byte{0xc0, 0xf3, 0xf, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 212 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x1000", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xc0, 0x3, 0x10, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 213 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x2000", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xc0, 0x3, 0x20, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 214 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xdb, 0x13, 0x40, 0x91, 0x60, 0xfb, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 215 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xfff0", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 216 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xffe8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x60, 0xeb, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 217 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0xffe0", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x60, 0xe3, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 218 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x8000000", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 219 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x40000000", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 220 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x40000008", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 221 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 222 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x40000010", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 223 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 224 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 225 {name: "STRW/ConstOffset/src=R0,base=R30,offset=0x10000004", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 226 {name: "STRW/RegisterOffset/src=R0,base=R30,offset=RegR8", n: &nodeImpl{instruction: STRW, srcReg: RegR0, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xc0, 0x6b, 0x28, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 227 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: -1}, exp: []byte{0x1e, 0xf0, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 228 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x0", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 0}, exp: []byte{0x1e, 0x0, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 229 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x1", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 1}, exp: []byte{0x1e, 0x10, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 230 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x2", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 2}, exp: []byte{0x1e, 0x20, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 231 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: -2}, exp: []byte{0x1e, 0xe0, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 232 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x4", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 4}, exp: []byte{0x1e, 0x4, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 233 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: -4}, exp: []byte{0x1e, 0xc0, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 234 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xf", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 235 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: -15}, exp: []byte{0x1e, 0x10, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 236 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x10", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 16}, exp: []byte{0x1e, 0x10, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 237 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xf", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 238 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x11", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 17}, exp: []byte{0x1e, 0x10, 0x1, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 239 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 240 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: -256}, exp: []byte{0x1e, 0x0, 0x10, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 241 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x50", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 80}, exp: []byte{0x1e, 0x50, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 242 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 243 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xff", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 255}, exp: []byte{0x1e, 0xf0, 0xf, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 244 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x1000", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x1e, 0x0, 0x10, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 245 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x2000", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x1e, 0x0, 0x20, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 246 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1b, 0x10, 0x40, 0x91, 0x7e, 0xfb, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 247 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xfff0", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 248 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xffe8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x7e, 0xeb, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 249 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0xffe0", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x7e, 0xe3, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 250 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x8000000", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 251 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x40000000", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 252 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x40000008", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 253 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 254 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x40000010", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 255 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 256 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 257 {name: "STRW/ConstOffset/src=R30,base=R0,offset=0x10000004", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 258 {name: "STRW/RegisterOffset/src=R30,base=R0,offset=RegR8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x1e, 0x68, 0x28, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 259 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: -1}, exp: []byte{0xde, 0xf3, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 260 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x0", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 0}, exp: []byte{0xde, 0x3, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 261 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x1", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 1}, exp: []byte{0xde, 0x13, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 262 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x2", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 2}, exp: []byte{0xde, 0x23, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 263 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: -2}, exp: []byte{0xde, 0xe3, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 264 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x4", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 4}, exp: []byte{0xde, 0x7, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 265 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: -4}, exp: []byte{0xde, 0xc3, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 266 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xf", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 267 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: -15}, exp: []byte{0xde, 0x13, 0x1f, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 268 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x10", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 16}, exp: []byte{0xde, 0x13, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 269 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xf", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 270 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x11", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 17}, exp: []byte{0xde, 0x13, 0x1, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 271 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 272 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: -256}, exp: []byte{0xde, 0x3, 0x10, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 273 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x50", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 80}, exp: []byte{0xde, 0x53, 0x0, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 274 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 275 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xff", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 255}, exp: []byte{0xde, 0xf3, 0xf, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 276 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x1000", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xde, 0x3, 0x10, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 277 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x2000", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xde, 0x3, 0x20, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 278 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xdb, 0x13, 0x40, 0x91, 0x7e, 0xfb, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 279 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xfff0", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 280 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xffe8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x7e, 0xeb, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 281 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0xffe0", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x7e, 0xe3, 0x3f, 0xb9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 282 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x8000000", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 283 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x40000000", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 284 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x40000008", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 285 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 286 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x40000010", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 287 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 288 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 289 {name: "STRW/ConstOffset/src=R30,base=R30,offset=0x10000004", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 290 {name: "STRW/RegisterOffset/src=R30,base=R30,offset=RegR8", n: &nodeImpl{instruction: STRW, srcReg: RegR30, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xde, 0x6b, 0x28, 0xb8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 291 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: -1}, exp: []byte{0x0, 0xf0, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 292 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x0", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 0}, exp: []byte{0x0, 0x0, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 293 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x1", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 1}, exp: []byte{0x0, 0x10, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 294 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x2", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 2}, exp: []byte{0x0, 0x4, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 295 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: -2}, exp: []byte{0x0, 0xe0, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 296 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x4", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 4}, exp: []byte{0x0, 0x8, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 297 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: -4}, exp: []byte{0x0, 0xc0, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 298 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xf", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 299 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: -15}, exp: []byte{0x0, 0x10, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 300 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x10", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 16}, exp: []byte{0x0, 0x20, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 301 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xf", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 302 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x11", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 17}, exp: []byte{0x0, 0x10, 0x1, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 303 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 304 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: -256}, exp: []byte{0x0, 0x0, 0x10, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 305 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x50", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 80}, exp: []byte{0x0, 0xa0, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 306 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 307 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xff", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 255}, exp: []byte{0x0, 0xf0, 0xf, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 308 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x1000", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x0, 0x0, 0x20, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 309 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x2000", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x1b, 0x8, 0x40, 0x91, 0x60, 0x3, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 310 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1b, 0x18, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 311 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xfff0", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x38, 0x40, 0x91, 0x60, 0xe3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 312 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xffe8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x38, 0x40, 0x91, 0x60, 0xd3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 313 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0xffe0", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x38, 0x40, 0x91, 0x60, 0xc3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 314 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x8000000", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 315 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x40000000", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 316 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x40000008", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 317 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 318 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x40000010", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 319 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 320 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 321 {name: "STRH/ConstOffset/src=R0,base=R0,offset=0x10000004", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 322 {name: "STRH/RegisterOffset/src=R0,base=R0,offset=RegR8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x0, 0x68, 0x28, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 323 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: -1}, exp: []byte{0xc0, 0xf3, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 324 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x0", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 0}, exp: []byte{0xc0, 0x3, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 325 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x1", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 1}, exp: []byte{0xc0, 0x13, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 326 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x2", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 2}, exp: []byte{0xc0, 0x7, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 327 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: -2}, exp: []byte{0xc0, 0xe3, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 328 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x4", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 4}, exp: []byte{0xc0, 0xb, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 329 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: -4}, exp: []byte{0xc0, 0xc3, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 330 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xf", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 331 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: -15}, exp: []byte{0xc0, 0x13, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 332 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x10", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 16}, exp: []byte{0xc0, 0x23, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 333 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xf", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 334 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x11", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 17}, exp: []byte{0xc0, 0x13, 0x1, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 335 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 336 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: -256}, exp: []byte{0xc0, 0x3, 0x10, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 337 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x50", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 80}, exp: []byte{0xc0, 0xa3, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 338 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 339 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xff", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 255}, exp: []byte{0xc0, 0xf3, 0xf, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 340 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x1000", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xc0, 0x3, 0x20, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 341 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x2000", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xdb, 0xb, 0x40, 0x91, 0x60, 0x3, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 342 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xdb, 0x1b, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 343 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xfff0", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x3b, 0x40, 0x91, 0x60, 0xe3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 344 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xffe8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x3b, 0x40, 0x91, 0x60, 0xd3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 345 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0xffe0", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x3b, 0x40, 0x91, 0x60, 0xc3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 346 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x8000000", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 347 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x40000000", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 348 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x40000008", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 349 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 350 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x40000010", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 351 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 352 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 353 {name: "STRH/ConstOffset/src=R0,base=R30,offset=0x10000004", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 354 {name: "STRH/RegisterOffset/src=R0,base=R30,offset=RegR8", n: &nodeImpl{instruction: STRH, srcReg: RegR0, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xc0, 0x6b, 0x28, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 355 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: -1}, exp: []byte{0x1e, 0xf0, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 356 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x0", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 0}, exp: []byte{0x1e, 0x0, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 357 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x1", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 1}, exp: []byte{0x1e, 0x10, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 358 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x2", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 2}, exp: []byte{0x1e, 0x4, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 359 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: -2}, exp: []byte{0x1e, 0xe0, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 360 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x4", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 4}, exp: []byte{0x1e, 0x8, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 361 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: -4}, exp: []byte{0x1e, 0xc0, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 362 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xf", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 363 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: -15}, exp: []byte{0x1e, 0x10, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 364 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x10", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 16}, exp: []byte{0x1e, 0x20, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 365 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xf", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 366 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x11", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 17}, exp: []byte{0x1e, 0x10, 0x1, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 367 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 368 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: -256}, exp: []byte{0x1e, 0x0, 0x10, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 369 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x50", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 80}, exp: []byte{0x1e, 0xa0, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 370 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 371 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xff", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 255}, exp: []byte{0x1e, 0xf0, 0xf, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 372 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x1000", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x1e, 0x0, 0x20, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 373 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x2000", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x1b, 0x8, 0x40, 0x91, 0x7e, 0x3, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 374 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1b, 0x18, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 375 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xfff0", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x38, 0x40, 0x91, 0x7e, 0xe3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 376 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xffe8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x38, 0x40, 0x91, 0x7e, 0xd3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 377 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0xffe0", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x38, 0x40, 0x91, 0x7e, 0xc3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 378 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x8000000", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 379 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x40000000", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 380 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x40000008", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 381 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 382 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x40000010", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 383 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 384 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 385 {name: "STRH/ConstOffset/src=R30,base=R0,offset=0x10000004", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 386 {name: "STRH/RegisterOffset/src=R30,base=R0,offset=RegR8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x1e, 0x68, 0x28, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 387 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: -1}, exp: []byte{0xde, 0xf3, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 388 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x0", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 0}, exp: []byte{0xde, 0x3, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 389 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x1", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 1}, exp: []byte{0xde, 0x13, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 390 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x2", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 2}, exp: []byte{0xde, 0x7, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 391 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: -2}, exp: []byte{0xde, 0xe3, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 392 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x4", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 4}, exp: []byte{0xde, 0xb, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 393 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: -4}, exp: []byte{0xde, 0xc3, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 394 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xf", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 395 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: -15}, exp: []byte{0xde, 0x13, 0x1f, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 396 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x10", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 16}, exp: []byte{0xde, 0x23, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 397 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xf", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 398 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x11", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 17}, exp: []byte{0xde, 0x13, 0x1, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 399 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 400 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: -256}, exp: []byte{0xde, 0x3, 0x10, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 401 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x50", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 80}, exp: []byte{0xde, 0xa3, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 402 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 403 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xff", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 255}, exp: []byte{0xde, 0xf3, 0xf, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 404 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x1000", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xde, 0x3, 0x20, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 405 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x2000", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xdb, 0xb, 0x40, 0x91, 0x7e, 0x3, 0x0, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 406 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xdb, 0x1b, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 407 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xfff0", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x3b, 0x40, 0x91, 0x7e, 0xe3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 408 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xffe8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x3b, 0x40, 0x91, 0x7e, 0xd3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 409 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0xffe0", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x3b, 0x40, 0x91, 0x7e, 0xc3, 0x3f, 0x79, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 410 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x8000000", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 411 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x40000000", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 412 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x40000008", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 413 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 414 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x40000010", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 415 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 416 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 417 {name: "STRH/ConstOffset/src=R30,base=R30,offset=0x10000004", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 418 {name: "STRH/RegisterOffset/src=R30,base=R30,offset=RegR8", n: &nodeImpl{instruction: STRH, srcReg: RegR30, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xde, 0x6b, 0x28, 0x78, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 419 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: -1}, exp: []byte{0x0, 0xf0, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 420 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x0", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 0}, exp: []byte{0x0, 0x0, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 421 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x1", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 1}, exp: []byte{0x0, 0x4, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 422 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x2", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 2}, exp: []byte{0x0, 0x8, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 423 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: -2}, exp: []byte{0x0, 0xe0, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 424 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x4", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 4}, exp: []byte{0x0, 0x10, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 425 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: -4}, exp: []byte{0x0, 0xc0, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 426 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xf", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0x3c, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 427 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: -15}, exp: []byte{0x0, 0x10, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 428 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x10", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 16}, exp: []byte{0x0, 0x40, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 429 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xf", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0x3c, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 430 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x11", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 17}, exp: []byte{0x0, 0x44, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 431 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 432 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: -256}, exp: []byte{0x0, 0x0, 0x10, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 433 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x50", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 80}, exp: []byte{0x0, 0x40, 0x1, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 434 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 435 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xff", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 255}, exp: []byte{0x0, 0xfc, 0x3, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 436 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x1000", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x1b, 0x4, 0x40, 0x91, 0x60, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 437 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x2000", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x1b, 0x8, 0x40, 0x91, 0x60, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 438 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1b, 0x1c, 0x40, 0x91, 0x60, 0xe3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 439 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xfff0", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x3c, 0x40, 0x91, 0x60, 0xc3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 440 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xffe8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x3c, 0x40, 0x91, 0x60, 0xa3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 441 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0xffe0", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x3c, 0x40, 0x91, 0x60, 0x83, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 442 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x8000000", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 443 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x40000000", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 444 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x40000008", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 445 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 446 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x40000010", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 447 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 448 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 449 {name: "STRB/ConstOffset/src=R0,base=R0,offset=0x10000004", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 450 {name: "STRB/RegisterOffset/src=R0,base=R0,offset=RegR8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x0, 0x68, 0x28, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 451 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: -1}, exp: []byte{0xc0, 0xf3, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 452 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x0", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 0}, exp: []byte{0xc0, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 453 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x1", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 1}, exp: []byte{0xc0, 0x7, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 454 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x2", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 2}, exp: []byte{0xc0, 0xb, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 455 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: -2}, exp: []byte{0xc0, 0xe3, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 456 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x4", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 4}, exp: []byte{0xc0, 0x13, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 457 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: -4}, exp: []byte{0xc0, 0xc3, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 458 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xf", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0x3f, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 459 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: -15}, exp: []byte{0xc0, 0x13, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 460 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x10", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 16}, exp: []byte{0xc0, 0x43, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 461 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xf", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0x3f, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 462 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x11", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 17}, exp: []byte{0xc0, 0x47, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 463 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 464 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: -256}, exp: []byte{0xc0, 0x3, 0x10, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 465 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x50", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 80}, exp: []byte{0xc0, 0x43, 0x1, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 466 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 467 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xff", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 255}, exp: []byte{0xc0, 0xff, 0x3, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 468 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x1000", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xdb, 0x7, 0x40, 0x91, 0x60, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 469 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x2000", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xdb, 0xb, 0x40, 0x91, 0x60, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 470 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xdb, 0x1f, 0x40, 0x91, 0x60, 0xe3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 471 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xfff0", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x3f, 0x40, 0x91, 0x60, 0xc3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 472 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xffe8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x3f, 0x40, 0x91, 0x60, 0xa3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 473 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0xffe0", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x3f, 0x40, 0x91, 0x60, 0x83, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 474 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x8000000", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 475 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x40000000", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 476 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x40000008", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 477 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 478 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x40000010", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 479 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 480 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 481 {name: "STRB/ConstOffset/src=R0,base=R30,offset=0x10000004", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 482 {name: "STRB/RegisterOffset/src=R0,base=R30,offset=RegR8", n: &nodeImpl{instruction: STRB, srcReg: RegR0, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xc0, 0x6b, 0x28, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 483 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: -1}, exp: []byte{0x1e, 0xf0, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 484 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x0", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 0}, exp: []byte{0x1e, 0x0, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 485 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x1", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 1}, exp: []byte{0x1e, 0x4, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 486 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x2", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 2}, exp: []byte{0x1e, 0x8, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 487 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: -2}, exp: []byte{0x1e, 0xe0, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 488 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x4", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 4}, exp: []byte{0x1e, 0x10, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 489 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: -4}, exp: []byte{0x1e, 0xc0, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 490 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xf", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0x3c, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 491 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: -15}, exp: []byte{0x1e, 0x10, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 492 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x10", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 16}, exp: []byte{0x1e, 0x40, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 493 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xf", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0x3c, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 494 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x11", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 17}, exp: []byte{0x1e, 0x44, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 495 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 496 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: -256}, exp: []byte{0x1e, 0x0, 0x10, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 497 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x50", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 80}, exp: []byte{0x1e, 0x40, 0x1, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 498 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 499 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xff", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 255}, exp: []byte{0x1e, 0xfc, 0x3, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 500 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x1000", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x1b, 0x4, 0x40, 0x91, 0x7e, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 501 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x2000", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x1b, 0x8, 0x40, 0x91, 0x7e, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 502 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1b, 0x1c, 0x40, 0x91, 0x7e, 0xe3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 503 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xfff0", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x3c, 0x40, 0x91, 0x7e, 0xc3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 504 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xffe8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x3c, 0x40, 0x91, 0x7e, 0xa3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 505 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0xffe0", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x3c, 0x40, 0x91, 0x7e, 0x83, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 506 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x8000000", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 507 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x40000000", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 508 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x40000008", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 509 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 510 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x40000010", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 511 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 512 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 513 {name: "STRB/ConstOffset/src=R30,base=R0,offset=0x10000004", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 514 {name: "STRB/RegisterOffset/src=R30,base=R0,offset=RegR8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x1e, 0x68, 0x28, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 515 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: -1}, exp: []byte{0xde, 0xf3, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 516 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x0", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 0}, exp: []byte{0xde, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 517 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x1", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 1}, exp: []byte{0xde, 0x7, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 518 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x2", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 2}, exp: []byte{0xde, 0xb, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 519 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: -2}, exp: []byte{0xde, 0xe3, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 520 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x4", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 4}, exp: []byte{0xde, 0x13, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 521 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: -4}, exp: []byte{0xde, 0xc3, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 522 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xf", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0x3f, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 523 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: -15}, exp: []byte{0xde, 0x13, 0x1f, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 524 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x10", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 16}, exp: []byte{0xde, 0x43, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 525 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xf", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0x3f, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 526 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x11", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 17}, exp: []byte{0xde, 0x47, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 527 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 528 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: -256}, exp: []byte{0xde, 0x3, 0x10, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 529 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x50", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 80}, exp: []byte{0xde, 0x43, 0x1, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 530 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 531 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xff", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 255}, exp: []byte{0xde, 0xff, 0x3, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 532 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x1000", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xdb, 0x7, 0x40, 0x91, 0x7e, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 533 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x2000", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xdb, 0xb, 0x40, 0x91, 0x7e, 0x3, 0x0, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 534 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xdb, 0x1f, 0x40, 0x91, 0x7e, 0xe3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 535 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xfff0", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x3f, 0x40, 0x91, 0x7e, 0xc3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 536 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xffe8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x3f, 0x40, 0x91, 0x7e, 0xa3, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 537 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0xffe0", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x3f, 0x40, 0x91, 0x7e, 0x83, 0x3f, 0x39, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 538 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x8000000", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 539 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x40000000", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 540 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x40000008", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 541 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 542 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x40000010", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 543 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 544 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 545 {name: "STRB/ConstOffset/src=R30,base=R30,offset=0x10000004", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 546 {name: "STRB/RegisterOffset/src=R30,base=R30,offset=RegR8", n: &nodeImpl{instruction: STRB, srcReg: RegR30, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xde, 0x6b, 0x28, 0x38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 547 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: -1}, exp: []byte{0x0, 0xf0, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 548 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 0}, exp: []byte{0x0, 0x0, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 549 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x1", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 1}, exp: []byte{0x0, 0x10, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 550 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x2", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 2}, exp: []byte{0x0, 0x20, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 551 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: -2}, exp: []byte{0x0, 0xe0, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 552 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x4", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 4}, exp: []byte{0x0, 0x40, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 553 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: -4}, exp: []byte{0x0, 0xc0, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 554 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xf", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 555 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: -15}, exp: []byte{0x0, 0x10, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 556 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x10", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 16}, exp: []byte{0x0, 0x8, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 557 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xf", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 558 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x11", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 17}, exp: []byte{0x0, 0x10, 0x1, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 559 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 560 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: -256}, exp: []byte{0x0, 0x0, 0x10, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 561 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x50", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 80}, exp: []byte{0x0, 0x28, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 562 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 563 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xff", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 255}, exp: []byte{0x0, 0xf0, 0xf, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 564 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x1000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x0, 0x0, 0x8, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 565 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x2000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x0, 0x0, 0x10, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 566 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x0, 0xfc, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 567 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xfff0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x60, 0xfb, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 568 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xffe8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x60, 0xf7, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 569 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0xffe0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 570 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x8000000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 571 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x40000000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 572 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x40000008", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 573 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 574 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x40000010", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 575 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 576 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 577 {name: "FSTRD/ConstOffset/src=V0,base=R0,offset=0x10000004", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 578 {name: "FSTRD/RegisterOffset/src=V0,base=R0,offset=RegR8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x0, 0x68, 0x28, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 579 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: -1}, exp: []byte{0xc0, 0xf3, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 580 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 0}, exp: []byte{0xc0, 0x3, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 581 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x1", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 1}, exp: []byte{0xc0, 0x13, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 582 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x2", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 2}, exp: []byte{0xc0, 0x23, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 583 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: -2}, exp: []byte{0xc0, 0xe3, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 584 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x4", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 4}, exp: []byte{0xc0, 0x43, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 585 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: -4}, exp: []byte{0xc0, 0xc3, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 586 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xf", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 587 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: -15}, exp: []byte{0xc0, 0x13, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 588 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x10", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 16}, exp: []byte{0xc0, 0xb, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 589 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xf", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 590 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x11", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 17}, exp: []byte{0xc0, 0x13, 0x1, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 591 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 592 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: -256}, exp: []byte{0xc0, 0x3, 0x10, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 593 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x50", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 80}, exp: []byte{0xc0, 0x2b, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 594 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 595 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xff", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 255}, exp: []byte{0xc0, 0xf3, 0xf, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 596 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x1000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xc0, 0x3, 0x8, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 597 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x2000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xc0, 0x3, 0x10, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 598 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xc0, 0xff, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 599 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xfff0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x60, 0xfb, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 600 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xffe8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x60, 0xf7, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 601 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0xffe0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 602 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x8000000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 603 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x40000000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 604 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x40000008", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 605 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 606 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x40000010", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 607 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 608 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 609 {name: "FSTRD/ConstOffset/src=V0,base=R30,offset=0x10000004", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 610 {name: "FSTRD/RegisterOffset/src=V0,base=R30,offset=RegR8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV0, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xc0, 0x6b, 0x28, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 611 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: -1}, exp: []byte{0x1e, 0xf0, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 612 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 0}, exp: []byte{0x1e, 0x0, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 613 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x1", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 1}, exp: []byte{0x1e, 0x10, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 614 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x2", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 2}, exp: []byte{0x1e, 0x20, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 615 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: -2}, exp: []byte{0x1e, 0xe0, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 616 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x4", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 4}, exp: []byte{0x1e, 0x40, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 617 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: -4}, exp: []byte{0x1e, 0xc0, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 618 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xf", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 619 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: -15}, exp: []byte{0x1e, 0x10, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 620 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x10", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 16}, exp: []byte{0x1e, 0x8, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 621 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xf", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 622 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x11", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 17}, exp: []byte{0x1e, 0x10, 0x1, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 623 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 624 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: -256}, exp: []byte{0x1e, 0x0, 0x10, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 625 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x50", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 80}, exp: []byte{0x1e, 0x28, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 626 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 627 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xff", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 255}, exp: []byte{0x1e, 0xf0, 0xf, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 628 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x1000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x1e, 0x0, 0x8, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 629 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x2000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x1e, 0x0, 0x10, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 630 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1e, 0xfc, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 631 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xfff0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x7e, 0xfb, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 632 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xffe8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x7e, 0xf7, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 633 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0xffe0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x20, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 634 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x8000000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 635 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x40000000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 636 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x40000008", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 637 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 638 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x40000010", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 639 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 640 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 641 {name: "FSTRD/ConstOffset/src=V30,base=R0,offset=0x10000004", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 642 {name: "FSTRD/RegisterOffset/src=V30,base=R0,offset=RegR8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x1e, 0x68, 0x28, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 643 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: -1}, exp: []byte{0xde, 0xf3, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 644 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 0}, exp: []byte{0xde, 0x3, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 645 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x1", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 1}, exp: []byte{0xde, 0x13, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 646 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x2", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 2}, exp: []byte{0xde, 0x23, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 647 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: -2}, exp: []byte{0xde, 0xe3, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 648 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x4", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 4}, exp: []byte{0xde, 0x43, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 649 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: -4}, exp: []byte{0xde, 0xc3, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 650 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xf", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 651 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: -15}, exp: []byte{0xde, 0x13, 0x1f, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 652 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x10", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 16}, exp: []byte{0xde, 0xb, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 653 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xf", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 654 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x11", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 17}, exp: []byte{0xde, 0x13, 0x1, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 655 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 656 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: -256}, exp: []byte{0xde, 0x3, 0x10, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 657 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x50", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 80}, exp: []byte{0xde, 0x2b, 0x0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 658 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 659 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xff", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 255}, exp: []byte{0xde, 0xf3, 0xf, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 660 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x1000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xde, 0x3, 0x8, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 661 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x2000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xde, 0x3, 0x10, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 662 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xde, 0xff, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 663 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xfff0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x7e, 0xfb, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 664 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xffe8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x7e, 0xf7, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 665 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0xffe0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x23, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 666 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x8000000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 667 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x40000000", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 668 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x40000008", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 669 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 670 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x40000010", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 671 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 672 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 673 {name: "FSTRD/ConstOffset/src=V30,base=R30,offset=0x10000004", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 674 {name: "FSTRD/RegisterOffset/src=V30,base=R30,offset=RegR8", n: &nodeImpl{instruction: FSTRD, srcReg: RegV30, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xde, 0x6b, 0x28, 0xfc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 675 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: -1}, exp: []byte{0x0, 0xf0, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 676 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 0}, exp: []byte{0x0, 0x0, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 677 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x1", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 1}, exp: []byte{0x0, 0x10, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 678 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x2", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 2}, exp: []byte{0x0, 0x20, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 679 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: -2}, exp: []byte{0x0, 0xe0, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 680 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x4", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 4}, exp: []byte{0x0, 0x4, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 681 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: -4}, exp: []byte{0x0, 0xc0, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 682 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xf", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 683 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: -15}, exp: []byte{0x0, 0x10, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 684 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x10", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 16}, exp: []byte{0x0, 0x10, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 685 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xf", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 15}, exp: []byte{0x0, 0xf0, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 686 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x11", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 17}, exp: []byte{0x0, 0x10, 0x1, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 687 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 688 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: -256}, exp: []byte{0x0, 0x0, 0x10, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 689 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x50", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 80}, exp: []byte{0x0, 0x50, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 690 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: -128}, exp: []byte{0x0, 0x0, 0x18, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 691 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xff", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 255}, exp: []byte{0x0, 0xf0, 0xf, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 692 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x1000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x0, 0x0, 0x10, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 693 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x2000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x0, 0x0, 0x20, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 694 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1b, 0x10, 0x40, 0x91, 0x60, 0xfb, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 695 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xfff0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 696 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xffe8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x60, 0xeb, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 697 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0xffe0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x60, 0xe3, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 698 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x8000000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 699 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x40000000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 700 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x40000008", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 701 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 702 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x40000010", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 703 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 704 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 705 {name: "FSTRS/ConstOffset/src=V0,base=R0,offset=0x10000004", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x0, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 706 {name: "FSTRS/RegisterOffset/src=V0,base=R0,offset=RegR8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x0, 0x68, 0x28, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 707 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: -1}, exp: []byte{0xc0, 0xf3, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 708 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 0}, exp: []byte{0xc0, 0x3, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 709 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x1", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 1}, exp: []byte{0xc0, 0x13, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 710 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x2", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 2}, exp: []byte{0xc0, 0x23, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 711 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: -2}, exp: []byte{0xc0, 0xe3, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 712 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x4", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 4}, exp: []byte{0xc0, 0x7, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 713 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: -4}, exp: []byte{0xc0, 0xc3, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 714 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xf", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 715 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: -15}, exp: []byte{0xc0, 0x13, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 716 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x10", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 16}, exp: []byte{0xc0, 0x13, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 717 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xf", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 15}, exp: []byte{0xc0, 0xf3, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 718 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x11", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 17}, exp: []byte{0xc0, 0x13, 0x1, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 719 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 720 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: -256}, exp: []byte{0xc0, 0x3, 0x10, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 721 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x50", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 80}, exp: []byte{0xc0, 0x53, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 722 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: -128}, exp: []byte{0xc0, 0x3, 0x18, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 723 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xff", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 255}, exp: []byte{0xc0, 0xf3, 0xf, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 724 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x1000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xc0, 0x3, 0x10, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 725 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x2000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xc0, 0x3, 0x20, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 726 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xdb, 0x13, 0x40, 0x91, 0x60, 0xfb, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 727 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xfff0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x60, 0xf3, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 728 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xffe8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x60, 0xeb, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 729 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0xffe0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x60, 0xe3, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 730 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x8000000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 731 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x40000000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 732 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x40000008", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 733 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 734 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x40000010", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 735 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 736 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 737 {name: "FSTRS/ConstOffset/src=V0,base=R30,offset=0x10000004", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xc0, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 738 {name: "FSTRS/RegisterOffset/src=V0,base=R30,offset=RegR8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV0, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xc0, 0x6b, 0x28, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 739 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xffffffffffffffff", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: -1}, exp: []byte{0x1e, 0xf0, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 740 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 0}, exp: []byte{0x1e, 0x0, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 741 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x1", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 1}, exp: []byte{0x1e, 0x10, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 742 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x2", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 2}, exp: []byte{0x1e, 0x20, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 743 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: -2}, exp: []byte{0x1e, 0xe0, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 744 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x4", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 4}, exp: []byte{0x1e, 0x4, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 745 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: -4}, exp: []byte{0x1e, 0xc0, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 746 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xf", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 747 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: -15}, exp: []byte{0x1e, 0x10, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 748 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x10", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 16}, exp: []byte{0x1e, 0x10, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 749 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xf", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 15}, exp: []byte{0x1e, 0xf0, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 750 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x11", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 17}, exp: []byte{0x1e, 0x10, 0x1, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 751 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 752 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xffffffffffffff00", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: -256}, exp: []byte{0x1e, 0x0, 0x10, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 753 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x50", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 80}, exp: []byte{0x1e, 0x50, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 754 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: -128}, exp: []byte{0x1e, 0x0, 0x18, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 755 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xff", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 255}, exp: []byte{0x1e, 0xf0, 0xf, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 756 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x1000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 4096}, exp: []byte{0x1e, 0x0, 0x10, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 757 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x2000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 8192}, exp: []byte{0x1e, 0x0, 0x20, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 758 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x7ff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 32760}, exp: []byte{0x1b, 0x10, 0x40, 0x91, 0x7e, 0xfb, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 759 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xfff0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 65520}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 760 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xffe8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 65512}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x7e, 0xeb, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 761 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0xffe0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 65504}, exp: []byte{0x1b, 0x30, 0x40, 0x91, 0x7e, 0xe3, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 762 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x8000000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 763 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x40000000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 764 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x40000008", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 765 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x3ffffff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 766 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x40000010", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 767 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x3ffffff0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 768 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x7ffffff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 769 {name: "FSTRS/ConstOffset/src=V30,base=R0,offset=0x10000004", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0x1e, 0x68, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 770 {name: "FSTRS/RegisterOffset/src=V30,base=R0,offset=RegR8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR0, dstReg2: RegR8}, exp: []byte{0x1e, 0x68, 0x28, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 771 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xffffffffffffffff", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: -1}, exp: []byte{0xde, 0xf3, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 772 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 0}, exp: []byte{0xde, 0x3, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 773 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x1", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 1}, exp: []byte{0xde, 0x13, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 774 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x2", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 2}, exp: []byte{0xde, 0x23, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 775 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xfffffffffffffffe", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: -2}, exp: []byte{0xde, 0xe3, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 776 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x4", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 4}, exp: []byte{0xde, 0x7, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 777 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xfffffffffffffffc", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: -4}, exp: []byte{0xde, 0xc3, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 778 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xf", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 779 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xfffffffffffffff1", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: -15}, exp: []byte{0xde, 0x13, 0x1f, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 780 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x10", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 16}, exp: []byte{0xde, 0x13, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 781 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xf", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 15}, exp: []byte{0xde, 0xf3, 0x0, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 782 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x11", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 17}, exp: []byte{0xde, 0x13, 0x1, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 783 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 784 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xffffffffffffff00", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: -256}, exp: []byte{0xde, 0x3, 0x10, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 785 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x50", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 80}, exp: []byte{0xde, 0x53, 0x0, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 786 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xffffffffffffff80", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: -128}, exp: []byte{0xde, 0x3, 0x18, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 787 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xff", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 255}, exp: []byte{0xde, 0xf3, 0xf, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 788 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x1000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 4096}, exp: []byte{0xde, 0x3, 0x10, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 789 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x2000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 8192}, exp: []byte{0xde, 0x3, 0x20, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 790 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x7ff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 32760}, exp: []byte{0xdb, 0x13, 0x40, 0x91, 0x7e, 0xfb, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 791 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xfff0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 65520}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x7e, 0xf3, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 792 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xffe8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 65512}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x7e, 0xeb, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 793 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0xffe0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 65504}, exp: []byte{0xdb, 0x33, 0x40, 0x91, 0x7e, 0xe3, 0x3f, 0xbd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 794 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x8000000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 134217728}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 795 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x40000000", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741824}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 796 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x40000008", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741832}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 797 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x3ffffff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741816}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 798 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x40000010", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741840}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 799 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x3ffffff0", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 1073741808}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 800 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x7ffffff8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 2147483640}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 801 {name: "FSTRS/ConstOffset/src=V30,base=R30,offset=0x10000004", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstConst: 268435460}, exp: []byte{0x1b, 0x0, 0x0, 0x18, 0xde, 0x6b, 0x3b, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 802 {name: "FSTRS/RegisterOffset/src=V30,base=R30,offset=RegR8", n: &nodeImpl{instruction: FSTRS, srcReg: RegV30, dstReg: RegR30, dstReg2: RegR8}, exp: []byte{0xde, 0x6b, 0x28, 0xbc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}, 803 } 804 805 for _, tc := range tests { 806 t.Run(tc.name, func(t *testing.T) { 807 a := NewAssembler(RegR27) 808 tc.n.types = operandTypesRegisterToMemory 809 err := a.encodeRegisterToMemory(tc.n) 810 require.NoError(t, err) 811 actual, err := a.Assemble() 812 require.NoError(t, err) 813 require.Equal(t, tc.exp, actual) 814 }) 815 } 816 }